detectors/slsDetectorPackage
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fix in ltc, added moench, separated servers, left to do max1932, client side for moench and more detailed in ctb server side

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This commit is contained in:
maliakal_d
2018-12-19 16:38:18 +01:00
parent 89d9204e1c
commit f161d68efc
12 changed files with 36 additions and 51 deletions
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5
slsDetectorServers/ctbDetectorServer/RegisterDefs.h
View File

@ -1,11 +1,7 @@
#pragma once
/* Definitions for FPGA */
#ifdef JCTB
#define MEM_MAP_SHIFT 11
#else
#define MEM_MAP_SHIFT 1
#endif
/* FPGA Version RO register */
#define FPGA_VERSION_REG (0x00 << MEM_MAP_SHIFT)
@ -14,7 +10,6 @@
#define FPGA_VERSION_BRD_RVSN_MSK (0x00FFFFFF << FPGA_VERSION_BRD_RVSN_OFST)
#define FPGA_VERSION_DTCTR_TYP_OFST (24)
#define FPGA_VERSION_DTCTR_TYP_MSK (0x000000FF << FPGA_VERSION_DTCTR_TYP_OFST)
#define FPGA_VERSION_DTCTR_TYP_JCTB_VAL ((0x2 << FPGA_VERSION_DTCTR_TYP_OFST) & FPGA_VERSION_DTCTR_TYP_MSK)
#define FPGA_VERSION_DTCTR_TYP_CTB_VAL ((0x3 << FPGA_VERSION_DTCTR_TYP_OFST) & FPGA_VERSION_DTCTR_TYP_MSK)
/* Fix pattern RO register */

16
slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c
View File

@ -64,7 +64,7 @@ void basictests() {
firmware_check_done = 0;
memset(firmware_message, 0, MAX_STR_LENGTH);
#ifdef VIRTUAL
FILE_LOG(logINFOBLUE, ("******** %s Virtual Server *****************\n", DETNAME));
FILE_LOG(logINFOBLUE, ("******** Chip Test Board Virtual Server *****************\n"));
if (mapCSP0() == FAIL) {
strcpy(firmware_message,
"Could not map to memory. Dangerous to continue.\n");
@ -110,7 +110,7 @@ void basictests() {
if (fwversion >= MIN_REQRD_VRSN_T_RD_API)
sw_fw_apiversion = getDetectorId(SOFTWARE_FIRMWARE_API_VERSION);
FILE_LOG(logINFOBLUE, ("************ %s Server *********************\n"
FILE_LOG(logINFOBLUE, ("************ Chip Test Board Server *********************\n"
"Hardware Version:\t\t 0x%x\n"
"Hardware Serial Nr:\t\t 0x%x\n"
@ -123,7 +123,6 @@ void basictests() {
"Required Firmware Version:\t 0x%x\n"
"Client-Software API Version:\t 0x%llx\n"
"********************************************************\n",
DETNAME,
hversion, hsnumber,
ipadd,
(long long unsigned int)macadd,
@ -189,13 +188,10 @@ int checkType() {
uint32_t type = ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_DTCTR_TYP_MSK) >> FPGA_VERSION_DTCTR_TYP_OFST);
uint32_t expectedType = FPGA_VERSION_DTCTR_TYP_CTB_VAL;
#ifdef JCTB
expectedType = FPGA_VERSION_DTCTR_TYP_JCTB_VAL;
#endif
if (type != expectedType) {
FILE_LOG(logERROR, ("This is not a %s Server (read %d, expected %d)\n",
DETNAME, type, expectedType));
FILE_LOG(logERROR, ("This is not a Chip Test Board Server (read %d, expected %d)\n",
type, expectedType));
return FAIL;
}
return OK;
@ -529,7 +525,7 @@ void setupDetector() {
resetCore();
//Initialization of acquistion parameters
setTimer(SAMPLES_JCTB, DEFAULT_NUM_SAMPLES); // update databytes and allocate ram
setTimer(SAMPLES, DEFAULT_NUM_SAMPLES); // update databytes and allocate ram
setTimer(FRAME_NUMBER, DEFAULT_NUM_FRAMES);
setTimer(CYCLES_NUMBER, DEFAULT_NUM_CYCLES);
setTimer(FRAME_PERIOD, DEFAULT_PERIOD);
@ -937,7 +933,7 @@ int64_t setTimer(enum timerIndex ind, int64_t val) {
FILE_LOG(logDEBUG1, ("Getting #cycles: %lld\n", (long long int)retval));
break;
case SAMPLES_JCTB:
case SAMPLES:
if(val >= 0) {
FILE_LOG(logINFO, ("Setting #samples: %lld\n", (long long int)val));
nSamples = val;

10
slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h
View File

@ -10,12 +10,6 @@
#define PROGRAMMING_MODE (0x2)
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
#ifdef JCTB
#define DETNAME = "Jungfrau Chip Test Board";
#else
#define DETNAME = "Chip Test Board";
#endif
/* Struct Definitions */
typedef struct ip_header_struct {
uint16_t ip_len;
@ -86,11 +80,7 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
#define VCHIP_POWER_INCRMNT (200)
#define IP_PACKETSIZE (0x2032)
#ifndef JCTB
#define ADC_PORT_INVERT_VAL (0x453b2593)
#else
#define ADC_PORT_INVERT_VAL (0x453b2593)
#endif
#define MAXIMUM_ADC_CLK (40)
#define PLL_VCO_FREQ_MHZ (400)