mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-26 08:10:02 +02:00
confirm if it is really moench detector;optimized code;option to start moench server with gotthard module
git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@530 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
l_maliakal_d
parent
679a7dfd7e
commit
f006d289a3
@ -50,6 +50,7 @@ int masterMode=NO_MASTER, syncMode=NO_SYNCHRONIZATION, timingMode=AUTO_TIMING;
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enum externalSignalFlag signals[4]={EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF};
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int withGotthard = 0;
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#ifdef MCB_FUNCS
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extern const int nChans;
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@ -177,6 +178,7 @@ int mapCSP0(void) {
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address = FIFO_DATA_REG_OFF;
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values=(u_int16_t*)(CSP0BASE+address*2);
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printf("statusreg=%08x\n",bus_r(STATUS_REG));
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printf("\n\n");
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return OK;
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}
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@ -256,7 +258,7 @@ int setPhaseShiftOnce(){
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int cleanFifo(){
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u_int32_t addr, reg, val;
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printf("\nCleaning FIFO\n");
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printf("Cleaning FIFO\n");
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addr=ADC_SYNC_REG;
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//88332214
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@ -295,7 +297,7 @@ int setDAQRegister()
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//depended on pcb rev
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int tokenTiming = TOKEN_TIMING_REV2;
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if(bus_r(PCB_REV_REG)==1)
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if((bus_r(PCB_REV_REG)&BOARD_REVISION_MASK)==1)
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tokenTiming= TOKEN_TIMING_REV1;
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@ -763,7 +765,7 @@ u_int32_t getFirmwareSVNVersion(){
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// for fpga test
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u_int32_t testFpga(void) {
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printf("Test FPGA:\n");
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printf("Testing FPGA:\n");
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volatile u_int32_t val,addr,val2;
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int result=OK,i;
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//fixed pattern
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@ -812,8 +814,9 @@ u_int32_t testFpga(void) {
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{
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printf("----------------------------------------------------------------------------------------------");
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printf("\nATTEMPT 1000000: FPGA DUMMY REGISTER OK!!!\n");
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printf("----------------------------------------------------------------------------------------------\n");
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printf("----------------------------------------------------------------------------------------------");
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}
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printf("\n");
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return result;
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}
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@ -825,7 +828,7 @@ u_int32_t testRAM(void) {
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allocateRAM();
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// while(i<100000) {
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memcpy(ram_values, values, dataBytes);
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printf ("Test RAM:\t%d: copied fifo %x to memory %x size %d\n",i++, (unsigned int)(values), (unsigned int)(ram_values), dataBytes);
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printf ("Testing RAM:\t%d: copied fifo %x to memory %x size %d\n",i++, (unsigned int)(values), (unsigned int)(ram_values), dataBytes);
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// }
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return result;
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}
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@ -1192,7 +1195,7 @@ int initConfGain(int isettings,int val,int imod){
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int setADC(int adc){
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int reg,nchips,mask;
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int reg,nchips,mask,nchans;
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if(adc==-1) ROI_flag=0;
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else ROI_flag=1;
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@ -1200,33 +1203,46 @@ int setADC(int adc){
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setDAQRegister();//token timing
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cleanFifo();//adc sync
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//all adc
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if(adc==-1){
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//with gotthard module
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if(withGotthard){
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//set packet size
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ipPacketSize= DEFAULT_IP_PACKETSIZE;
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udpPacketSize=DEFAULT_UDP_PACKETSIZE;
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//set channel mask
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nchips = GOTTHARDNCHIP;
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nchans = GOTTHARDNCHAN;
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mask = ACTIVE_ADC_MASK;
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}
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//1 adc
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//with moench module all adc
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else{/* if(adc==-1){*/
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//set packet size
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ipPacketSize= DEFAULT_IP_PACKETSIZE;
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udpPacketSize=DEFAULT_UDP_PACKETSIZE;
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//set channel mask
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nchips = NCHIP;
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nchans = NCHANS;
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mask = ACTIVE_ADC_MASK;
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}/*
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//with moench module 1 adc -- NOT IMPLEMENTED
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else{
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ipPacketSize= ADC1_IP_PACKETSIZE;
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udpPacketSize=ADC1_UDP_PACKETSIZE;
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//set channel mask
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nchips = NCHIPS_PER_ADC;
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nchans = GOTTHARDNCHAN;
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mask = 1<<adc;
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}
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}*/
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//set channel mask
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reg = (GOTTHARDNCHAN*nchips)<<CHANNEL_OFFSET;
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reg = (nchans*nchips)<<CHANNEL_OFFSET;
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reg&=CHANNEL_MASK;
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reg|=(ACTIVE_ADC_MASK & mask);
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bus_w(CHIP_OF_INTRST_REG,reg);
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#ifdef DDEBUG
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printf("Chip of Intrst Reg:%x\n",bus_r(CHIP_OF_INTRST_REG));
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#endif
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//#ifdef DDEBUG
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printf("Chip of Interest Reg:%x\n",bus_r(CHIP_OF_INTRST_REG));
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//#endif
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adcConfigured = adc;
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@ -1458,22 +1474,15 @@ u_int32_t runState(void) {
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int startStateMachine(){
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//#ifdef VERBOSE
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printf("*******Starting State Machine***************\n");
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printf("*******Starting State Machine*******\n");
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//#endif
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cleanFifo();
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// fifoReset(); printf("Starting State Machine\n");
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// fifoReset();
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now_ptr=(char*)ram_values;
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#ifdef SHAREDMEMORY
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write_stop_sm(0);
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write_status_sm("Started");
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#endif
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/*
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#ifdef MCB_FUNCS
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setCSregister(ALLMOD);
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clearSSregister(ALLMOD);
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#endif
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*/
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//putout("0000000000000000",ALLMOD);
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bus_w16(CONTROL_REG, START_ACQ_BIT | START_EXPOSURE_BIT);
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bus_w16(CONTROL_REG, 0x0);
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printf("statusreg=%08x\n",bus_r(STATUS_REG));
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@ -1485,9 +1494,9 @@ int startStateMachine(){
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int stopStateMachine(){
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#ifdef VERBOSE
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printf("Stopping State Machine\n");
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#endif
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//#ifdef VERBOSE
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printf("*******Stopping State Machine*******\n");
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//#endif
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#ifdef SHAREDMEMORY
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write_stop_sm(1);
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write_status_sm("Stopped");
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@ -1691,39 +1700,6 @@ u_int32_t* decode_data(int *datain)
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int setDynamicRange(int dr) {
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/*
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int ow;
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int nm;
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u_int32_t np=getProbes();
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#ifdef VERYVERBOSE
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printf("probes==%02x\n",np);
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#endif
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if (dr>0) {
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nm=setNMod(-1);
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if (dr==1) {
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dynamicRange=1;
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ow=5;
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} else if (dr<=4) {
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dynamicRange=4;
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ow=4;
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} else if (dr<=8) {
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dynamicRange=8;
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ow=3;
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} else if (dr<=16) {
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dynamicRange=16;
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ow=2;
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} else {
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dynamicRange=32;
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ow=0; //or 1?
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}
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setCSregister(ALLMOD);
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initChipWithProbes(0, ow,np, ALLMOD);
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putout("0000000000000000",ALLMOD);
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setNMod(nm);
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}
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*/
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return getDynamicRange();
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}
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@ -1733,46 +1709,6 @@ int setDynamicRange(int dr) {
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int getDynamicRange() {
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/*
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int dr;
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u_int32_t shiftin=bus_r(GET_SHIFT_IN_REG);
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u_int32_t outmux=(shiftin >> OUTMUX_OFF) & OUTMUX_MASK;
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u_int32_t probes=(shiftin >> PROBES_OFF) & PROBES_MASK;
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#ifdef VERYVERBOSE
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printf("%08x ",shiftin);
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printf("outmux=%02x probes=%d\n",outmux,probes);
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#endif
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switch (outmux) {
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case 2:
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dr=16;
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break;
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case 4:
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dr=8;
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break;
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case 8:
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dr=4;
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break;
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case 16:
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dr=1;
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break;
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default:
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dr=32;
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}
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dynamicRange=dr;
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if (probes==0) {
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dataBytes=nModX*nModY*NCHIP*NCHAN*dynamicRange/8;
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} else {
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dataBytes=nModX*nModY*NCHIP*NCHAN*4;///
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}
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#ifdef VERBOSE
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printf("Number of data bytes %d - probes %d dr %d\n", dataBytes, probes, dr);
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#endif
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if (allocateRAM()==OK) {
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;
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} else
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printf("ram not allocated\n");
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*/
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dynamicRange=16;
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return dynamicRange;
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@ -1891,6 +1827,7 @@ int allocateRAM() {
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}
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int prepareADC(){
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printf("Preparing ADC\n");
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u_int32_t valw,codata,csmask;
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int i,cdx,ddx;
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cdx=0; ddx=1;
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@ -1902,11 +1839,17 @@ int prepareADC(){
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valw=((0xffffffff&(~csmask)));bus_w(ADC_WRITE_REG,valw); //chip sel bar down
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for (i=0;i<24;i++) {
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valw=valw&(~(0x1<<cdx));bus_w(ADC_WRITE_REG,valw);usleep(0); //cldwn
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#ifdef VERBOSE
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printf("DOWN 0x%x \n",valw);
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#endif
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valw=(valw&(~(0x1<<ddx)))+(((codata>>(23-i))&0x1)<<ddx); bus_w(ADC_WRITE_REG,valw); usleep(0); //write data (i)
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#ifdef VERBOSE
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printf("LOW 0x%x \n",valw);
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#endif
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valw=valw+(0x1<<cdx);bus_w(ADC_WRITE_REG,valw); usleep(0); //clkup
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printf("up 0x%x \n",valw);
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#ifdef VERBOSE
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printf("up 0x%x \n",valw);
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#endif
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}
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valw=valw&(~(0x1<<cdx));usleep(0);
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@ -21,43 +21,73 @@ void error(char *msg)
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int main(int argc, char *argv[])
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{
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int portno, b;
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char cmd[100];
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char cmd[500];
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int retval=OK;
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int sd, fd;
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int iarg;
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int checkType = 1;
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for(iarg=1; iarg<argc; iarg++){
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if(!strcasecmp(argv[iarg],"-phaseshift")){
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if(argc==iarg+1){
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printf("No phaseshift given. Exiting.\n");
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return 1;
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}
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if ( sscanf(argv[iarg+1],"%d",&phase_shift)==0) {
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printf("could not decode phase shift\n");
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return 1;
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}
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argc=1;
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}
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else if(!strcasecmp(argv[iarg],"-test")){
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if(argc==iarg+1){
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printf("No test condition given. Exiting.\n");
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return 1;
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}
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if(!strcasecmp(argv[iarg+1],"with_gotthard")){
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checkType = 0;
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}else{
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printf("could not decode test condition. Possible arguments: with_gotthard. Exiting\n");
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return 1;
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}
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}
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}
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if (argc==1) {
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portno = DEFAULT_PORTNO;
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sprintf(cmd,"%s %d &",argv[0],DEFAULT_PORTNO+1);
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printf("opening control server on port %d\n",portno );
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system(cmd);
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b=1;
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} else {
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//stop server
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if ((argc > 2) && (!strcasecmp(argv[2],"stopserver"))){
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portno = DEFAULT_PORTNO+1;
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if ( sscanf(argv[1],"%d",&portno) ==0) {
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printf("could not open stop server: unknown port\n");
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return 1;
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}
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b=0;
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printf("opening stop server on port %d\n",portno);
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printf("\n\nStop Server\nOpening stop server on port %d\n",portno);
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}
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init_detector(b);
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//control server
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else {
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portno = DEFAULT_PORTNO;
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if(checkType)
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sprintf(cmd,"%s %d stopserver &",argv[0],DEFAULT_PORTNO+1);
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else
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sprintf(cmd,"%s %d stopserver -test with_gotthard &",argv[0],DEFAULT_PORTNO+1);
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printf("\n\nControl Server\nOpening control server on port %d\n",portno );
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//printf("\n\ncmd:%s\n",cmd);
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system(cmd);
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b=1;
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}
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init_detector(b, checkType);
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sd=bindSocket(portno);
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sockfd=sd;
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if (getServerError(sd)) {
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printf("server error!\n");
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return -1;
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@ -8,23 +8,23 @@
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// Hardware definitions
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#define NCHAN 160*160
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#define NCHAN (160*160)
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#define NCHIP 1
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#define NMAXMODX 1
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#define NMAXMODY 1
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#define NMAXMOD NMAXMODX*NMAXMODY
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#define NMAXMOD (NMAXMODX*NMAXMODY)
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#define NDAC 8
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#define NADC 1
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/**change this for the real moench chip*/
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/**when moench readout tested with gotthard module*/
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#define GOTTHARDNCHAN 128
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#define GOTTHARDNCHIP 10
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#define NCHANS NCHAN*NCHIP*NMAXMOD
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#define NDACS NDAC*NMAXMOD
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#define NCHANS (NCHAN*NCHIP*NMAXMOD)
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#define NDACS (NDAC*NMAXMOD)
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#define NTRIMBITS 6
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#define NCOUNTBITS 24
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@ -53,39 +53,44 @@ char mess[1000];
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int digitalTestBit = 0;
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extern int withGotthard;
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int init_detector( int b) {
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#ifndef PICASSOD
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printf("This is a MOENCH detector with %d chips per module\n", NCHIP);
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#else
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printf("This is a PICASSO detector with %d chips per module\n", NCHIP);
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#endif
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int init_detector(int b, int checkType) {
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if (mapCSP0()==FAIL) { printf("Could not map memory\n");
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exit(1);
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}
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//testFpga();
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//confirm if it is really moench
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if(((bus_r(PCB_REV_REG) & DETECTOR_TYPE_MASK)>>DETECTOR_TYPE_OFFSET) != MOENCH_MODULE ){
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if(checkType){
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printf("This is a Gotthard detector. Exiting Moench Server.\n\n");
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exit(-1);
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}
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//no check required as specified in command line arguments
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else if(b){
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printf("***This is a GOTTHARD detector with %d chips per module***\n",GOTTHARDNCHIP);
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printf("***Assuming this to be a MOENCH detector***\n");
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}
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withGotthard = 1;
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}
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if (b) {
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int reg;
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#ifdef MCB_FUNCS
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printf("\nBoard Revision:0x%x\n",(bus_r(PCB_REV_REG)&BOARD_REVISION_MASK));
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initDetector();
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printf("\n***initdetector done*** \n\n");
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printf("Initializing Detector\n");
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#endif
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testFpga();
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testRAM();
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//moench specific
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setPhaseShiftOnce();
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prepareADC();
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setADC(-1); //already does setdaqreg and clean fifo
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printf("in chip of interes reg:%d\n",bus_r(CHIP_OF_INTRST_REG));
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int reg = /*NCHAN*40;*/(GOTTHARDNCHAN*GOTTHARDNCHIP)<<CHANNEL_OFFSET;
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reg&=CHANNEL_MASK;
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reg|=ACTIVE_ADC_MASK;
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bus_w(CHIP_OF_INTRST_REG,reg);
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printf("in chip of interes reg:%d\n",bus_r(CHIP_OF_INTRST_REG));
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setSettings(GET_SETTINGS,-1);
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//Initialization
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setFrames(1);
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setTrains(1);
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@ -2279,6 +2284,10 @@ int set_roi(int file_des) {
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//#endif
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}
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/* execute action if the arguments correctly arrived*/
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ret = FAIL;
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/* NOT IMPLEMENTED
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#ifdef MCB_FUNCS
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if (lockStatus==1 && differentClients==1){//necessary???
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sprintf(mess,"Detector locked by %s\n", lastClientIP);
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@ -2294,8 +2303,7 @@ int set_roi(int file_des) {
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}
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#endif
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*/
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if(ret==OK && differentClients){
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printf("Force update\n");
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ret=FORCE_UPDATE;
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|
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@ -23,8 +23,7 @@ int sockfd;
|
||||
int function_table();
|
||||
|
||||
int decode_function(int);
|
||||
|
||||
int init_detector(int);
|
||||
int init_detector(int,int);
|
||||
|
||||
int M_nofunc(int);
|
||||
int exit_server(int);
|
||||
|
||||
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Reference in New Issue
Block a user