eiger server fixes:

- removed feb reset in stop acquisition as it caused processing bit to randomly not go high (leads to infinite loop waiting for it to go high). This is anyway done at prepare acquisition and set trimbits.
- left AND right registers monitored for processing bit done
- febProcessinginprogress returns STATUS_IDLE and not IDLE
- In feb stop acquisition, if processing bit is running forever, checks for 1 s, then if acq done bit is high, returns ok, else throws
- feb stop acquisition returns 1 if success and fucntion in list calling it compares properly instead of STATUS_IDLE (no effect, but incorrect logic)
- chipsignals to trimquad should only monitor right fpga (not both as it will throw)
- fixed error messages of readregister inconsistent values
- setmodule and read frame was returning fail without setting error messages (leading to broken tcp connection due to no error message)
-

slsSupportLib/include/sls/versionAPI.h

@@ -1,15 +1,15 @@
 // SPDX-License-Identifier: LGPL-3.0-or-other
 // Copyright (C) 2021 Contributors to the SLS Detector Package
 /** API versions */
-#define GITBRANCH "6.1.1"
+#define GITBRANCH "6.1.2.rc"
 
-#define APILIB 0x211125
-#define APIRECEIVER 0x211125
-#define APIGUI 0x211125
 #define APICTB 0x211125
 #define APIGOTTHARD 0x211125
 #define APIGOTTHARD2 0x211125
 #define APIMYTHEN3 0x211125
 #define APIMOENCH 0x211124
-#define APIEIGER 0x211125
 #define APIJUNGFRAU 0x220104
+#define APILIB 0x221021
+#define APIRECEIVER 0x221021
+#define APIGUI 0x221021
+#define APIEIGER 0x221021