ctb, moench, jungfrau server: changing phase only changes one clock in one direction. ctb and moench phase shift connected to adc clk, instead of run clk

This commit is contained in:
2019-03-13 08:37:45 +01:00
parent 6765fd0dc8
commit ec18db868f
12 changed files with 77 additions and 64 deletions

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@ -61,7 +61,8 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7};
/* Defines in the Firmware */
#define MAX_PATTERN_LENGTH (0xFFFF)
#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS)
#define MAX_PHASE_SHIFTS_ADC_CLK (320)
#define MAX_PHASE_SHIFTS_DBIT_CLK (32)
#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
#define WAIT_TIME_US_PLL (10 * 1000)