detectors/slsDetectorPackage
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maliakal_d
2025-01-31 12:27:35 +01:00
parent 0e45ae189d
commit e92578f89d
13 changed files with 135 additions and 126 deletions
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40
slsDetectorServers/gotthardDetectorServer/RegisterDefs.h
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@ -22,13 +22,13 @@
((0x1 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK)
/** Flow Control register */
//#define FLOW_CONTROL_REG (0x11 << MEM_MAP_SHIFT)
// #define FLOW_CONTROL_REG (0x11 << MEM_MAP_SHIFT)
/** Flow Status register */
//#define FLOW_STATUS_REG (0x12 << MEM_MAP_SHIFT)
// #define FLOW_STATUS_REG (0x12 << MEM_MAP_SHIFT)
/** Frame register */
//#define FRAME_REG (0x13 << MEM_MAP_SHIFT)
// #define FRAME_REG (0x13 << MEM_MAP_SHIFT)
/** Multi Purpose register */
#define MULTI_PURPOSE_REG (0x14 << MEM_MAP_SHIFT)
@ -79,7 +79,7 @@
((0x0007f << DAQ_PCKT_LNGTH_OFST) & DAQ_PCKT_LNGTH_MSK)
/** Time From Start register */
//#define TIME_FROM_START_REG (0x16 << MEM_MAP_SHIFT)
// #define TIME_FROM_START_REG (0x16 << MEM_MAP_SHIFT)
/** DAC Control register */
#define SPI_REG (0x17 << MEM_MAP_SHIFT)
@ -139,7 +139,7 @@
((0x1b << ADC_SYNC_ENET_DELAY_OFST) & ADC_SYNC_ENET_DELAY_MSK)
/** Time From Start register */
//#define MU_TIME_REG (0x1a << MEM_MAP_SHIFT)
// #define MU_TIME_REG (0x1a << MEM_MAP_SHIFT)
/** Temperatre SPI In register */
#define TEMP_SPI_IN_REG (0x1b << MEM_MAP_SHIFT)
@ -171,7 +171,7 @@
#define ENET_CONF_REG (0x1e << MEM_MAP_SHIFT)
/** Write TSE Shadow register */
//#define WRITE_TSE_SHADOW_REG (0x1f << MEM_MAP_SHIFT)
// #define WRITE_TSE_SHADOW_REG (0x1f << MEM_MAP_SHIFT)
/** High Voltage register */
#define HV_REG (0x20 << MEM_MAP_SHIFT)
@ -288,10 +288,10 @@
((0x4 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK)
/** Look at me register */
//#define LOOK_AT_ME_REG (0x28 << MEM_MAP_SHIFT)
// #define LOOK_AT_ME_REG (0x28 << MEM_MAP_SHIFT)
/** FPGA SVN register */
//#define FPGA_SVN_REG (0x29 << MEM_MAP_SHIFT)
// #define FPGA_SVN_REG (0x29 << MEM_MAP_SHIFT)
/** Chip of Interest register */
#define CHIP_OF_INTRST_REG (0x2a << MEM_MAP_SHIFT)
@ -303,7 +303,7 @@
(0x0000FFFF << CHIP_OF_INTRST_NUM_CHNNLS_OFST)
/** Out MUX register */
//#define OUT_MUX_REG (0x2b << MEM_MAP_SHIFT)
// #define OUT_MUX_REG (0x2b << MEM_MAP_SHIFT)
/** Board Version register */
#define BOARD_REVISION_REG (0x2c << MEM_MAP_SHIFT)
@ -312,29 +312,29 @@
#define BOARD_REVISION_MSK (0x0000FFFF << BOARD_REVISION_OFST)
#define DETECTOR_TYPE_OFST (16)
#define DETECTOR_TYPE_MSK (0x0000000F << DETECTOR_TYPE_OFST)
//#define DETECTOR_TYPE_GOTTHARD_VAL (??)
// #define DETECTOR_TYPE_GOTTHARD_VAL (??)
#define DETECTOR_TYPE_MOENCH_VAL (2)
/** Memory Test register */
//#define MEMORY_TEST_REG (0x2d << MEM_MAP_SHIFT)
// #define MEMORY_TEST_REG (0x2d << MEM_MAP_SHIFT)
/** Hit Threshold register */
//#define HIT_THRESHOLD_REG (0x2e << MEM_MAP_SHIFT)
// #define HIT_THRESHOLD_REG (0x2e << MEM_MAP_SHIFT)
/** Hit Count register */
//#define HIT_COUNT_REG (0x2f << MEM_MAP_SHIFT)
// #define HIT_COUNT_REG (0x2f << MEM_MAP_SHIFT)
/* 16 bit Fifo Data register */
#define FIFO_DATA_REG (0x50 << MEM_MAP_SHIFT) // Not used in FW and SW (16bit)
/** Dacs Set 1 register */
//#define DACS_SET_1_REG (0x65 << MEM_MAP_SHIFT)
// #define DACS_SET_1_REG (0x65 << MEM_MAP_SHIFT)
/** Dacs Set 2 register */
//#define DACS_SET_2_REG (0x66 << MEM_MAP_SHIFT)
// #define DACS_SET_2_REG (0x66 << MEM_MAP_SHIFT)
/** Dacs Set 3 register */
//#define DACS_SET_3_REG (0x67 << MEM_MAP_SHIFT)
// #define DACS_SET_3_REG (0x67 << MEM_MAP_SHIFT)
/* Set Delay 64 bit register */
#define SET_DELAY_LSB_REG (0x68 << MEM_MAP_SHIFT)
@ -377,12 +377,12 @@
#define GET_EXPTIME_MSB_REG (0x7b << MEM_MAP_SHIFT)
/* Set Gates 64 bit register */
//#define SET_GATES_LSB_REG (0x7c << MEM_MAP_SHIFT)
//#define SET_GATES_MSB_REG (0x7d << MEM_MAP_SHIFT)
// #define SET_GATES_LSB_REG (0x7c << MEM_MAP_SHIFT)
// #define SET_GATES_MSB_REG (0x7d << MEM_MAP_SHIFT)
/* Set Gates 64 bit register */
//#define GET_GATES_LSB_REG (0x7e << MEM_MAP_SHIFT)
//#define GET_GATES_MSB_REG (0x7f << MEM_MAP_SHIFT)
// #define GET_GATES_LSB_REG (0x7e << MEM_MAP_SHIFT)
// #define GET_GATES_MSB_REG (0x7f << MEM_MAP_SHIFT)
/* Dark Image starting address */
#define DARK_IMAGE_REG (0x81 << MEM_MAP_SHIFT)