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Pattern unification & Matterhorn Changes (#1303)
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* update ctb regDefs, included fill level of adc, transceiver and DBit fifos, added enable registers for cont. readout

* fix fifo fill level range bug

* updated ctb RegDefs, increased size of fifo fill level register

* added register to read the firmware git hash

* ctb: added altchip_id read register

* start with unification of pattern machinery for xctb, ctb, mythen

* udate addrs for d-server internal matterhorn startup

* update xctb reg defs

* move pattern loopdef start

* added zero trimbits to matterhorn config

* Revert "added zero trimbits to matterhorn config"

This reverts commit 7c347badd5.

* added adjustable clocks on Xilinx-CTB

* added support for fractional dividers of runclk

* XCTB: make frequencies adjustable from python gui

* update docs

* added support for patternstart command to XCTB

* XCTB: map pattern_ram directly into memory, removed rw strobe

* refactor Mythen pattern control addresses

* test altera ctb with common addresses, removed ifdefs

* change ordering of regdefs

* updated python help for dbitclk, adcclk and runclk (khz)

* xilinx: moved the wait for firmware to measure the actual frequency to the server side and removed it in the pyctbgui side

* will not be anymore in developer branch

* make format (exception RegisterDefs.h), rewrite XILINX PLL to have less consstants in the code

* bug: mixing && for &

---------

Co-authored-by: Martin Mueller <martin.mueller@psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
This commit is contained in:
Martin Mueller
2025-09-17 17:28:17 +02:00
committed by GitHub
parent 6e006665ef
commit e7a91d38f2
33 changed files with 795 additions and 951 deletions
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docs/src/pattern.rst
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@@ -28,7 +28,7 @@ This instructs the firmware to execute the commands from address 0 to 4 (includi
.. code-block::
start [Ctb, Xilinx_Ctb]
patternstart [Mythen3]
patternstart [Mythen3, Xilinx_Ctb]
The maximal number of patword addresses is 8192. However, it is possible to extend the length of the pattern sequence using loops and wait commands. Loops can be configured with the following commands: