SlsDetector client library and servers. First import.

git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@1 951219d9-93cf-4727-9268-0efd64621fa3

slsDetectorSoftware/mythenDetectorServer/.target-makefrag

@@ -0,0 +1 @@
+AXIS_BUILDTYPE ?= cris-axis-linux-gnu

slsDetectorSoftware/mythenDetectorServer/Makefile

@@ -0,0 +1,38 @@
+# $Id: Makefile,v 1.1.1.1 2006/02/04 03:35:01 freza Exp $
+# first compile
+# make cris-axis-linux-gnu
+
+AXIS_USABLE_LIBS = UCLIBC GLIBC
+include $(AXIS_TOP_DIR)/tools/build/Rules.axis
+
+PROGS= 		mythenDetectorServer
+
+INSTDIR= 	$(prefix)/bin
+INSTMODE= 	0777
+
+SRCS= 		 server.c server_funcs.c communication_funcs.c firmware_funcs.c mcb_funcs.c trimming_funcs.c  sharedmemory.c
+OBJS= 	$(SRCS:%.c=%.o) 
+
+CFLAGS+= 	-Wall -DC_ONLY -DMCB_FUNCS
+# -DVERBOSE
+#-Werror
+
+LDLIBS+= 	-lm
+
+all:	$(PROGS)
+
+boot: $(OBJS)
+
+$(PROGS): $(OBJS)
+	echo $(OBJS)
+	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
+
+install:	$(PROGS)
+	$(INSTALL) -d $(INSTDIR)
+	$(INSTALL) -m $(INSTMODE) $(PROGS) $(INSTDIR)
+
+clean:
+	rm -rf $(PROGS) *.o
+
+depend:
+	makedepend -Y -- $(CFLAGS) -- $(SRCS) 2>/dev/null

slsDetectorSoftware/mythenDetectorServer/Makefile.dum

@@ -0,0 +1,37 @@
+# $Id: Makefile,v 1.1.1.1 2006/02/04 03:35:01 freza Exp $
+# first compile
+# make cris-axis-linux-gnu
+
+AXIS_USABLE_LIBS = UCLIBC GLIBC
+include $(AXIS_TOP_DIR)/tools/build/Rules.axis
+
+PROGS= 		dummy
+
+INSTDIR= 	$(prefix)/bin
+INSTMODE= 	0777
+
+SRCS= 		 dummy_main.c server_funcs.c communication_funcs.c firmware_funcs.c mcb_funcs.c trimming_funcs.c  sharedmemory.c
+OBJS= 	$(SRCS:%.c=%.o) 
+
+CFLAGS+= 	-Wall -DC_ONLY -DVERBOSE
+#-Werror
+
+LDLIBS+= 	-lm
+
+all:	$(PROGS)
+
+boot: $(OBJS)
+
+$(PROGS): $(OBJS)
+	echo $(OBJS)
+	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
+
+install:	$(PROGS)
+	$(INSTALL) -d $(INSTDIR)
+	$(INSTALL) -m $(INSTMODE) $(PROGS) $(INSTDIR)
+
+clean:
+	rm -rf $(PROGS) *.o
+
+depend:
+	makedepend -Y -- $(CFLAGS) -- $(SRCS) 2>/dev/null

slsDetectorSoftware/mythenDetectorServer/communication_funcs.c

@@ -0,0 +1 @@
+../commonFiles/communication_funcs.c

slsDetectorSoftware/mythenDetectorServer/communication_funcs.h

@@ -0,0 +1 @@
+../commonFiles/communication_funcs.h

slsDetectorSoftware/mythenDetectorServer/firmware_funcs.c

@@ -0,0 +1,924 @@
+
+#include "server_defs.h"
+#include "firmware_funcs.h"
+#include "mcb_funcs.h"
+#include "registers.h"
+
+#ifdef SHAREDMEMORY
+#include "sharedmemory.h"
+#endif
+
+#include <sys/ipc.h>
+#include <sys/shm.h>
+#include <sys/stat.h>
+
+
+//for memory mapping
+u_int32_t CSP0BASE;
+
+FILE *debugfp, *datafp;
+
+int fr;
+int wait_time;
+int *fifocntrl;
+int *values;
+int *statusreg;
+const int nModY=1;
+int nModBoard;
+int nModX=NMAXMOD;
+int dynamicRange=32;
+int dataBytes=NMAXMOD*NCHIP*NCHAN*4;
+int storeInRAM=0;
+int *ram_values=NULL;
+char *now_ptr=NULL;
+int ram_size=0;
+
+
+int ififostart, ififostop, ififostep, ififo;
+
+
+#ifdef MCB_FUNCS
+extern const int nChans;
+extern const int nChips;
+extern const int nDacs;
+extern const int nAdcs;
+#endif
+#ifndef MCB_FUNCS
+
+const int nChans=NCHAN;
+const int nChips=NCHIP;
+const int nDacs=NDAC;
+const int nAdcs=NADC;
+#endif
+
+//int mybyte;
+//int mysize=dataBytes/8;
+
+int mapCSP0(void) {
+  printf("Mapping memory\n");
+#ifndef VIRTUAL
+  int fd;
+  fd = open("/dev/mem", O_RDWR | O_SYNC, 0);
+  if (fd == -1) {
+    printf("\nCan't find /dev/mem!\n");
+    return FAIL;
+  }
+  printf("/dev/mem opened\n");
+  CSP0BASE = (u_int32_t)mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, CSP0);
+  if (CSP0BASE == (u_int32_t)MAP_FAILED) {
+    printf("\nCan't map memmory area!!\n");
+    return FAIL;
+  } 
+  printf("CSP0 mapped\n");
+
+#endif
+#ifdef VIRTUAL
+  CSP0BASE = (u_int32_t)malloc(MEM_SIZE);
+  printf("memory allocated\n");
+#endif
+#ifdef SHAREDMEMORY 
+  if ( (res=inism(SMSV))<0) {
+    printf("error attaching shared memory! %i",res);
+    return FAIL;
+  }
+#endif
+  printf("CSPOBASE=from %08x to %x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
+  
+  values=(u_int32_t*)(CSP0BASE+FIFO_DATA_REG_OFF);
+  printf("values=%08x\n",values);
+  fifocntrl=(u_int32_t*)(CSP0BASE+FIFO_CNTRL_REG_OFF);
+  printf("fifcntrl=%08x\n",fifocntrl);
+  statusreg=(u_int32_t*)(CSP0BASE+STATUS_REG);
+  printf("statusreg=%08x\n",statusreg);
+
+  return OK;
+}
+
+
+u_int32_t bus_w(u_int32_t offset, u_int32_t data) {
+  u_int32_t *ptr1;
+
+
+  ptr1=(u_int32_t*)(CSP0BASE+offset);
+  *ptr1=data;
+
+  return OK;
+}
+
+
+u_int32_t bus_r(u_int32_t offset) {
+  u_int32_t *ptr1;
+  
+  ptr1=(u_int32_t*)(CSP0BASE+offset);
+  return *ptr1;
+}
+
+// direct pattern output 
+u_int32_t putout(char *s, int modnum) {
+  int i;
+  u_int32_t pat;
+  int addr;
+
+  if (strlen(s)<16) {
+    fprintf(stdout," *** putout error: incorrect pattern length ***\n");
+    fprintf(stdout," %s \n",s);
+    return FAIL;
+  }
+
+  pat=0;
+  for (i=0;i<16;i++) {
+    if (s[i]=='1') pat=pat+(1<<i);
+  }
+
+  //addr=MCB_CNTRL_REG_OFF+(modnum<<4);
+  addr=MCB_CNTRL_REG_OFF+(modnum<<SHIFTMOD);
+  bus_w(addr, pat);
+  return OK;
+}
+
+
+// read direct input 
+u_int32_t readin(int modnum) {
+  int addr;
+  u_int32_t val;
+  //addr=MCB_DOUT_REG_OFF+(modnum<<4);
+  addr=MCB_DOUT_REG_OFF+(modnum<<SHIFTMOD);
+  val=bus_r(addr) & 0x3ff;
+  //  printf("reading 0x%08x, value 0x%08x\n",addr,val);
+  return val;
+}
+
+u_int32_t setClockDivider(int d) {
+  u_int32_t c;
+  c=bus_r(SPEED_REG);
+  bus_w(SPEED_REG,(d<<CLK_DIVIDER_OFFSET)|(c&~(CLK_DIVIDER_MASK))); 
+  return ((bus_r(SPEED_REG)& CLK_DIVIDER_MASK)>>CLK_DIVIDER_OFFSET);    
+}
+
+u_int32_t getClockDivider() {
+  u_int32_t clk_div;
+  clk_div=((bus_r(SPEED_REG)&CLK_DIVIDER_MASK)>>CLK_DIVIDER_OFFSET);
+  return clk_div;    
+}
+
+u_int32_t setSetLength(int d) {
+  u_int32_t c;
+  c=bus_r(SPEED_REG);
+  bus_w(SPEED_REG,(d<<SET_LENGTH_OFFSET)|(c&~(SET_LENGTH_MASK))); 
+  return ((bus_r(SPEED_REG)& SET_LENGTH_MASK)>>SET_LENGTH_OFFSET);    
+}
+
+u_int32_t getSetLength() {
+  u_int32_t clk_div;
+  clk_div=((bus_r(SPEED_REG)& SET_LENGTH_MASK)>>SET_LENGTH_OFFSET);   
+  return clk_div;    
+}
+
+
+u_int32_t setWaitStates(int d1) {
+  u_int32_t c;
+  int d=d1-2;
+  char cmd[100];
+  sprintf(cmd,"bus -a 0xb0000000 -w 0xd000%1x",d1);
+  c=bus_r(SPEED_REG);
+  bus_w(SPEED_REG,(d<<WAIT_STATES_OFFSET)|(c&~(WAIT_STATES_MASK))); 
+  system(cmd);
+  return ((bus_r(SPEED_REG)& WAIT_STATES_MASK)>>WAIT_STATES_OFFSET);    
+}
+
+u_int32_t getWaitStates() {
+  u_int32_t clk_div;
+  clk_div=((bus_r(SPEED_REG)& WAIT_STATES_MASK)>>WAIT_STATES_OFFSET);
+  return clk_div;    
+}
+
+
+u_int32_t setTotClockDivider(int d) {
+  u_int32_t c;
+  c=bus_r(SPEED_REG);
+  bus_w(SPEED_REG,(d<<TOTCLK_DIVIDER_OFFSET)|(c&~(TOTCLK_DIVIDER_MASK))); 
+  return ((bus_r(SPEED_REG)& TOTCLK_DIVIDER_MASK)>>TOTCLK_DIVIDER_OFFSET);    
+}
+
+u_int32_t getTotClockDivider() {
+  u_int32_t clk_div;
+  clk_div=((bus_r(SPEED_REG)&TOTCLK_DIVIDER_MASK)>>TOTCLK_DIVIDER_OFFSET);
+  return clk_div;    
+}
+
+
+u_int32_t setExtSignal(int d, enum externalSignalFlag  mode) {
+  
+  int modes[]={-1,EXT_SIG_OFF, EXT_GATE_IN_ACTIVEHIGH, EXT_GATE_IN_ACTIVELOW,EXT_TRIG_IN_RISING,EXT_TRIG_IN_FALLING,EXT_RO_TRIG_IN_RISING, EXT_RO_TRIG_IN_FALLING,EXT_GATE_OUT_ACTIVEHIGH, EXT_GATE_OUT_ACTIVELOW, EXT_TRIG_OUT_RISING, EXT_TRIG_OUT_FALLING, EXT_RO_TRIG_OUT_RISING, EXT_RO_TRIG_OUT_FALLING};
+
+  u_int32_t c;
+  int off=d*SIGNAL_OFFSET;
+  c=bus_r(EXT_SIGNAL_REG);
+  if (mode<=RO_TRIGGER_OUT_FALLING_EDGE)
+    bus_w(EXT_SIGNAL_REG,((modes[mode])<<off)|(c&~(SIGNAL_MASK<<off))); 
+
+
+  return getExtSignal(d);
+}
+
+
+int getExtSignal(int d) {
+
+  int modes[]={SIGNAL_OFF, GATE_IN_ACTIVE_HIGH, GATE_IN_ACTIVE_LOW,TRIGGER_IN_RISING_EDGE, TRIGGER_IN_FALLING_EDGE,RO_TRIGGER_IN_RISING_EDGE, RO_TRIGGER_IN_FALLING_EDGE, GATE_OUT_ACTIVE_HIGH,   GATE_OUT_ACTIVE_LOW, TRIGGER_OUT_RISING_EDGE, TRIGGER_OUT_FALLING_EDGE, RO_TRIGGER_OUT_RISING_EDGE,RO_TRIGGER_OUT_FALLING_EDGE};
+    
+    int off=d*SIGNAL_OFFSET;
+    int mode=((bus_r(EXT_SIGNAL_REG)&(SIGNAL_MASK<<off))>>off);
+
+
+
+    if (mode<RO_TRIGGER_OUT_FALLING_EDGE)
+      return modes[mode];
+    else 
+      return -1;
+    
+}
+
+
+u_int64_t  getMcsNumber() {
+  
+  FILE *fp=NULL;
+  u_int64_t res;
+  char line[150];
+  int a[6];
+  
+  int n=0, i;
+  //u_int64_t a0,a1,a2,a3,a4,a5,n=0;
+  fp=fopen("/etc/conf.d/mac","r");
+  if (fp==NULL) {
+    printf("could not ope MAC file\n");;
+    return -1;
+  }
+  while (fgets(line,150,fp)) {
+    //MAC="00:40:8C:CD:00:00"
+    printf(line);
+    if (strstr(line,"MAC="))
+      n=sscanf(line,"MAC=\"%x:%x:%x:%x:%x:%x\"",a+5,a+4,a+3,a+2,a+1,a);
+  }
+  fclose(fp);
+  if (n!=6){ 
+    printf("could not scan MAC address\n");;
+    return -1;
+  } 
+  res=0;
+  for (i=0; i<n; i++) {
+    res=(res<<8)+a[n-1-i];
+  }
+  return res;
+}
+
+u_int32_t  getMcsVersion() {
+  return bus_r(FPGA_VERSION_REG);
+  //return MCSVERSION;
+}
+
+// for fpga test 
+u_int32_t testFpga(void) {
+  u_int32_t val;
+  int result=OK;
+
+  //fixed pattern
+  val=bus_r(FIX_PATT_REG);
+  if (val==FIXED_PATT_VAL) {
+    printf("fixed pattern ok!! %x\n",val);
+  } else {
+    printf("fixed pattern wrong!! %x\n",val);
+    result=FAIL;
+    //    return FAIL;
+  }
+  //FPGA code version
+  val=bus_r(FPGA_VERSION_REG)&0x00ffffff;
+  if (val>=(FPGA_VERSION_VAL&0x00ffffff)) {
+    printf("FPGA version ok!! %x\n",val);
+  } else {
+    printf("FPGA version too old! %x\n",val);
+    return FAIL;
+  }
+  //dummy register
+  val=0xF0F0F0F0;
+  bus_w(DUMMY_REG, val);
+  val=bus_r(DUMMY_REG);
+  if (val==0xF0F0F0F0) {
+    printf("FPGA dummy register ok!! %x\n",val);
+  } else {
+    printf("FPGA dummy register wrong!! %x\n",val);
+    result=FAIL;
+    //    return FAIL;
+  }
+  //dummy register
+  val=0x0F0F0F0F;
+  bus_w(DUMMY_REG, val);
+  val=bus_r(DUMMY_REG);
+  if (val==0x0F0F0F0F) {
+    printf("FPGA dummy register ok!! %x\n",val);
+  } else {
+    printf("FPGA dummy register wrong!! %x\n",val);
+    result=FAIL;
+    //    return FAIL;
+  }
+  return result;
+}
+
+int getNModBoard() {
+  int nmodboard;
+  u_int32_t val;
+  val=bus_r(FPGA_VERSION_REG)&0xff000000;
+  nmodboard=val >> 24;
+#ifdef VERY_VERBOSE
+  printf("The board hosts %d modules\n",nmodboard); 
+#endif
+  nModBoard=nmodboard;
+  //getNModBoard()=nmodboard;
+  return nmodboard;
+}
+
+int setNMod(int n) {
+  
+  int fifo;
+  int ifsta, ifsto, ifste;
+  if (n>0 && n<=getNModBoard()) {
+    nModX=n;
+    dataBytes=nModX*nModY*NCHIP*NCHAN*dynamicRange/8;
+    allocateRAM();
+  }
+
+
+  /* should enable all fifos*/
+  bus_w(FIFO_CNTRL_REG_OFF+(ALLFIFO<<SHIFTMOD), FIFO_RESET_BIT | FIFO_DISABLE_TOGGLE_BIT); 
+
+  /*disable the fifos relative to the unused modules */
+  
+  ifste=NCHAN*dynamicRange/32; 
+  ifsta=nModX*NCHIP*ifste;
+  ifsto=nModBoard*NCHIP*ifste;
+ 
+  for (ififo=ifsta; ififo<ifsto; ififo+=ifste) {
+    fifocntrl[ififo]=FIFO_DISABLE_TOGGLE_BIT;
+  } 
+
+
+  return nModX;
+}
+
+
+// fifo test 
+u_int32_t  testFifos(void) {
+  printf("Fifo test not implemented!\n");
+  bus_w(CONTROL_REG, START_FIFOTEST_BIT); 
+  return OK;
+}
+
+
+
+// program dacq settings 
+
+int64_t set64BitReg(int64_t value, int aLSB, int aMSB){
+  int64_t v64;
+  u_int32_t vLSB,vMSB;
+  if (value!=-1) {
+    vLSB=value&(0xffffffff);
+    bus_w(aLSB,vLSB);
+    v64=value>> 32;
+    vMSB=v64&(0xffffffff);
+    bus_w(aMSB,vMSB);
+  }
+  return get64BitReg(aLSB, aMSB);
+
+}
+
+int64_t get64BitReg(int aLSB, int aMSB){
+  int64_t v64;
+  u_int32_t vLSB,vMSB;
+  vLSB=bus_r(aLSB);
+  vMSB=bus_r(aMSB);
+  v64=vMSB;
+  v64=(v64<<32) | vLSB;
+  return v64;
+}
+  
+int64_t setFrames(int64_t value){
+  return set64BitReg(value,  SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
+}
+
+int64_t getFrames(){
+  return get64BitReg(GET_FRAMES_LSB_REG, GET_FRAMES_MSB_REG);
+}
+
+int64_t setExposureTime(int64_t value){
+  /* time is in ns */
+  if (value!=-1) {
+    value*=(1E-9*CLK_FREQ);
+  }
+  return set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-9*CLK_FREQ);
+}
+
+int64_t getExposureTime(){
+  return get64BitReg(GET_EXPTIME_LSB_REG, GET_EXPTIME_MSB_REG)/(1E-9*CLK_FREQ);   
+}
+
+int64_t setGates(int64_t value){
+  return set64BitReg(value, SET_GATES_LSB_REG, SET_GATES_MSB_REG);
+}
+
+int64_t getGates(){
+  return get64BitReg(GET_GATES_LSB_REG, GET_GATES_MSB_REG);
+}
+
+int64_t setPeriod(int64_t value){
+  /* time is in ns */
+  if (value!=-1) {
+    value*=(1E-9*CLK_FREQ);
+  }
+  return set64BitReg(value,SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/(1E-9*CLK_FREQ);
+}
+
+int64_t getPeriod(){
+  return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG)/(1E-9*CLK_FREQ);   
+}
+
+int64_t setDelay(int64_t value){
+  /* time is in ns */
+  if (value!=-1) {
+    value*=(1E-9*CLK_FREQ);
+  }
+  return set64BitReg(value,SET_DELAY_LSB_REG, SET_DELAY_MSB_REG)/(1E-9*CLK_FREQ);
+}
+
+int64_t getDelay(){
+  return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG)/(1E-9*CLK_FREQ);   
+}
+
+int64_t setTrains(int64_t value){
+  return set64BitReg(value,  SET_TRAINS_LSB_REG, SET_TRAINS_MSB_REG);
+}
+
+int64_t getTrains(){
+  return get64BitReg(GET_TRAINS_LSB_REG, GET_TRAINS_MSB_REG);
+}
+
+
+int64_t setProbes(int64_t value){
+  int ow;
+  switch (getDynamicRange()) {
+  case 32:
+    ow=1;
+    break;
+  case 16:
+    ow=2;
+    break;
+  case 8:
+    ow=4;
+    break;
+  case 4:
+    ow=8;
+    break;
+  case 1:
+    ow=5;
+  default:
+    ow=1;
+  }
+  
+  if (value>=0) {
+    setCSregister(ALLMOD);
+    initChipWithProbes(0, ow,value, ALLMOD);
+    putout("0000000000000000",ALLMOD);
+  }
+  return getProbes();
+}
+
+int64_t getProbes(){
+  u_int32_t shiftin=bus_r(GET_SHIFT_IN_REG);
+  u_int32_t np=(shiftin >>PROBES_OFF) & PROBES_MASK;
+#ifdef VERYVERBOSE
+  printf("%08x ",shiftin);
+  printf("probes==%01x\n",np);
+#endif
+  
+  return np;
+    
+}
+
+
+
+
+
+
+u_int32_t runBusy(void) {
+  return bus_r(STATUS_REG)&RUN_BUSY_BIT;
+}
+
+u_int32_t dataPresent(void) {
+  return bus_r(LOOK_AT_ME_REG);
+}
+
+u_int32_t runState(void) {
+  int s=bus_r(STATUS_REG);
+#ifdef SHAREDMEMORY
+  if (s&RUN_BUSY_BIT)
+    write_status_sm("Running");
+  else
+    write_status_sm("Stopped");  
+#endif
+  return s;
+}
+
+
+// State Machine 
+
+u_int32_t  startStateMachine(){
+#ifdef VERBOSE
+  printf("Starting State Machine\n");
+#endif
+  fifoReset(); 
+  now_ptr=(char*)ram_values;
+#ifdef SHAREDMEMORY
+  write_stop_sm(0);
+  write_status_sm("Started");
+#endif
+#ifdef MCB_FUNCS
+  setCSregister(ALLMOD);
+  clearSSregister(ALLMOD);
+#endif
+  putout("0000000000000000",ALLMOD);
+  bus_w(CONTROL_REG, START_ACQ_BIT |  START_EXPOSURE_BIT); 
+  return OK;
+}
+
+
+
+
+u_int32_t  stopStateMachine(){ 
+
+#ifdef VERBOSE
+  printf("Stopping State Machine\n");
+#endif
+#ifdef SHAREDMEMORY
+  write_stop_sm(1);
+  write_status_sm("Stopped");
+#endif
+  bus_w(CONTROL_REG, STOP_ACQ_BIT); 
+  usleep(500);
+  if (!runBusy())
+    return OK;
+  else
+    return FAIL;    
+}
+
+
+u_int32_t startReadOut(){ 
+  u_int32_t status;
+#ifdef VERBOSE
+  printf("Starting State Machine Readout\n");
+#endif
+  status=bus_r(STATUS_REG)&RUN_BUSY_BIT;
+#ifdef DEBUG
+  printf("State machine status is %08x\n",bus_r(STATUS_REG));
+#endif
+  bus_w(CONTROL_REG,  START_ACQ_BIT |START_READOUT_BIT);   //  start readout
+  return OK;
+}
+
+
+// fifo routines 
+
+u_int32_t fifoReset(void) {
+#ifdef DEBUG
+  printf("resetting fifo\n");
+#endif
+  bus_w(FIFO_CNTRL_REG_OFF+(ALLFIFO<<SHIFTMOD), FIFO_RESET_BIT); 
+  return OK;
+}
+
+
+u_int32_t setNBits(u_int32_t n) {
+  u_int32_t rval=0;
+  rval=bus_w(SET_NBITS_REG, n);
+  return bus_r(SET_NBITS_REG);
+}
+
+u_int32_t getNBits()
+{
+  return bus_r(SET_NBITS_REG);
+}
+
+
+u_int32_t fifoReadCounter(int fifonum)
+{
+  int rval=0;
+  rval=bus_r(FIFO_COUNTR_REG_OFF+(fifonum<<SHIFTFIFO));
+#ifdef VERBOSE
+  printf("FIFO %d countains %x words\n",fifonum, rval);
+#endif
+  return rval;
+}
+
+u_int32_t  fifoReadStatus()
+{
+  // reads from the global status register
+  
+   return bus_r(STATUS_REG)&(SOME_FIFO_FULL_BIT | ALL_FIFO_EMPTY_BIT);
+}
+
+u_int32_t  fifo_full(void)
+{
+  // checks fifo empty flag returns 1 if fifo is empty
+  //   otherwise 0
+  return bus_r(STATUS_REG)&SOME_FIFO_FULL_BIT;
+}
+
+
+u_int32_t* fifo_read_event()
+{
+
+#ifdef VERBOSE
+  int ichip;
+#endif
+#ifdef VIRTUAL
+  return NULL;
+#endif
+  while (bus_r(LOOK_AT_ME_REG)==0) {
+#ifdef VERYVERBOSE
+    printf("Waiting for data\n");
+#endif
+    if (runBusy()==0) {
+       if (bus_r(LOOK_AT_ME_REG)==0) {
+#ifdef VERYVERBOSE
+	 printf("no frame found\n");
+	 for (ichip=0; ichip<nModBoard*NCHIP; ichip++) {
+	   fifoReadCounter(ichip); 
+	 }
+#endif
+	 return NULL;
+       } else {
+	 break;
+       }
+    }
+   }
+#ifdef VERYVERBOSE
+  printf("before readout\n");
+  for (ichip=0; ichip<nModBoard*NCHIP; ichip++) {
+    fifoReadCounter(ichip); 
+  }
+#endif
+  memcpy(now_ptr, values, dataBytes);
+#ifdef VERYVERBOSE
+  printf("after readout\n");
+  for (ichip=0; ichip<nModBoard*NCHIP; ichip++) {
+    fifoReadCounter(ichip); 
+  }
+#endif
+  if (storeInRAM>0) {
+    now_ptr+=dataBytes;
+  }
+  return ram_values;
+  
+}
+
+
+
+u_int32_t* decode_data(int *datain)
+{
+  int *dataout;
+  const char one=1;
+  const int bytesize=8;
+  char *ptr=(char*)datain;
+  //int nbits=dynamicRange;
+  int  ipos=0, ichan=0;;
+  //int nch, boff=0;
+  int ibyte, ibit;
+  char iptr;
+
+  dataout=malloc(nChans*nChips*nModX*4);
+  ichan=0;
+  switch (dynamicRange) {
+  case 1:
+    for (ibyte=0; ibyte<dataBytes; ibyte++) {
+      iptr=ptr[ibyte];
+      for (ipos=0; ipos<bytesize; ipos++) {
+	//	dataout[ibyte*2+ichan]=((iptr&((0xf)<<ichan))>>ichan)&0xf;
+	dataout[ichan]=(iptr>>(ipos))&0x1;
+	ichan++;
+      }
+    }
+    break;
+  case 4:
+    for (ibyte=0; ibyte<dataBytes; ibyte++) {
+      iptr=ptr[ibyte]&0xff;
+      for (ipos=0; ipos<2; ipos++) {
+	//	dataout[ibyte*2+ichan]=((iptr&((0xf)<<ichan))>>ichan)&0xf;
+	dataout[ichan]=(iptr>>(ipos*4))&0xf;
+	ichan++;
+      }
+    }
+    break;
+  case 8:
+    for (ichan=0; ichan<dataBytes; ichan++) {
+      dataout[ichan]=ptr[ichan]&0xff;
+    }
+    break;
+  case 16:
+    for (ichan=0; ichan<nChans*nChips*nModX; ichan++) {
+      dataout[ichan]=0;
+      for (ibyte=0; ibyte<2; ibyte++) {
+	iptr=ptr[ichan*2+ibyte];
+	dataout[ichan]|=((iptr<<(ibyte*bytesize))&(0xff<<(ibyte*bytesize)));
+      }
+    }
+    break;
+  default:    
+    for (ichan=0; ichan<nChans*nChips*nModX; ichan++)
+      dataout[ichan]=datain[ichan];//&0xffffff;
+  }
+  
+#ifdef VERBOSE
+  printf("decoded %d  channels\n",ichan);
+#endif
+  return dataout;
+}
+
+
+
+int setDynamicRange(int dr) {
+
+
+
+
+  int ow;
+  u_int32_t np=getProbes();
+#ifdef VERYVERBOSE
+  printf("probes==%02x\n",np);
+#endif
+  
+  
+  if (dr>0) {
+    if (dr<=1) {
+      dynamicRange=1;
+      ow=5;
+    }    else if (dr<=4) {
+      dynamicRange=4;
+      ow=4;
+    }    else if (dr<=8) {
+      dynamicRange=8;
+      ow=3;
+    } else if (dr<=16) {
+      dynamicRange=16;
+      ow=2;
+    }    else {
+      dynamicRange=32;
+      ow=0; //or 1?
+    }
+    setCSregister(ALLMOD);
+    initChipWithProbes(0, ow,np, ALLMOD);
+    putout("0000000000000000",ALLMOD);
+    
+  }
+  
+
+  return   getDynamicRange();
+}
+
+
+
+
+
+
+int getDynamicRange() {
+  int dr;
+  u_int32_t shiftin=bus_r(GET_SHIFT_IN_REG);
+  u_int32_t outmux=(shiftin >> OUTMUX_OFF) & OUTMUX_MASK;
+#ifdef VERYVERBOSE
+  printf("%08x ",shiftin);
+  printf("outmux==%02x\n",outmux);
+#endif
+  
+  switch (outmux) {
+  case 2:
+    dr=16;
+    break;
+  case 4:
+    dr=8;
+    break;
+  case 8:
+    dr=4;
+    break;
+  case 16:
+    dr=1;
+    break;
+  default:
+    dr=32;
+  }
+  dynamicRange=dr;
+  dataBytes=nModX*nModY*NCHIP*NCHAN*dynamicRange/8;
+  if (allocateRAM()==OK) {
+      ;
+  } else
+    printf("ram not allocated\n");
+
+  return dynamicRange;
+
+}
+
+int testBus() {
+  int j;
+  char cmd[100];
+  u_int32_t val;
+  printf("%s\n",cmd);
+  system(cmd);
+  for (j=0; j<1000000; j++) {
+    val=bus_r(FIX_PATT_REG);
+    if (val!=0xacdc1980){
+      printf("%d %x\n",j, val);
+      return FAIL;
+    }
+  }
+  return OK;
+}
+
+
+int setStoreInRAM(int b) {
+  if (b)
+    storeInRAM=1;
+  else
+    storeInRAM=0;
+  return  allocateRAM();
+}
+
+
+int allocateRAM() {
+  size_t size;
+
+  // ret=clearRAM();
+  if (storeInRAM) {
+    size=dataBytes*setFrames(-1);
+#ifdef VERBOSE
+    //   printf("nmodx=%d nmody=%d dynamicRange=%d dataBytes=%d nFrames=%d size=%d\n",nModX,nModY,dynamicRange,dataBytes,setFrameNumber(-1),size );
+#endif
+    if (size<dataBytes)
+      size=dataBytes;
+  }  else 
+    size=dataBytes;
+
+  if (size==ram_size)
+    return OK;
+    
+  
+
+#ifdef VERBOSE
+    printf("reallocating ram %x\n",ram_values);
+#endif
+    //  clearRAM();
+    // ram_values=malloc(size);
+    ram_values=realloc(ram_values,size);
+
+  if (ram_values) {
+    now_ptr=(char*)ram_values;
+#ifdef VERBOSE
+    printf("ram allocated 0x%x of size %d to %x\n",now_ptr, size, now_ptr+size);
+#endif
+    ram_size=size;
+    return OK;
+  } else {
+    printf("could not allocate %d bytes\n",size);
+    if (storeInRAM==1) {
+      printf("retrying\n");
+      storeInRAM=0;
+      size=dataBytes;
+      ram_values=realloc(ram_values,size);
+      if (ram_values==NULL)
+	printf("Fatal error: there must be a memory leak somewhere! You can't allocate even one frame!\n");
+      else {
+	now_ptr=(char*)ram_values;
+#ifdef VERBOSE
+	printf("ram allocated 0x%x of size %d to %x\n",now_ptr, size, now_ptr+size);
+#endif
+      }
+    } else {
+      printf("Fatal error: there must be a memory leak somewhere! You can't allocate even one frame!\n");
+    }
+    return FAIL;
+  }
+
+
+    
+}
+
+
+
+int clearRAM() {
+  if (ram_values) {
+    //#ifdef VERBOSE
+    //printf("clearing RAM 0x%x\n", ram_values);
+    //#endif
+    free(ram_values);
+    ram_values=NULL;
+    now_ptr=NULL;
+  }
+  //#ifdef VERBOSE
+  //printf("done 0x%x\n", ram_values);
+  //#endif
+  return OK;
+}

slsDetectorSoftware/mythenDetectorServer/firmware_funcs.h

@@ -0,0 +1,125 @@
+#ifndef FIRMWARE_FUNCS_H
+#define FIRMWARE_FUNCS_H
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/mman.h>
+#include <fcntl.h>
+#include <stdarg.h>
+#include <unistd.h>
+#include <asm/page.h>
+#include <sys/mman.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <stdarg.h>
+#include <unistd.h>
+
+
+int mapCSP0(void);
+u_int32_t bus_w(u_int32_t offset, u_int32_t data);
+u_int32_t bus_r(u_int32_t offset);
+
+
+u_int32_t putout(char *s, int modnum);
+u_int32_t readin(int modnum);
+u_int32_t setClockDivider(int d);
+u_int32_t getClockDivider();
+u_int32_t setSetLength(int d);
+u_int32_t getSetLength();
+u_int32_t setWaitStates(int d);
+u_int32_t getWaitStates();
+u_int32_t setTotClockDivider(int d);
+u_int32_t getTotClockDivider();
+
+u_int32_t setExtSignal(int d, enum externalSignalFlag  mode);
+int  getExtSignal(int d);
+
+
+
+
+u_int64_t getMcsNumber();
+u_int32_t getMcsVersion();
+u_int32_t testFifos(void);
+u_int32_t testFpga(void);
+int testBus(void);
+int64_t set64BitReg(int64_t value, int aLSB, int aMSB);
+int64_t get64BitReg(int aLSB, int aMSB);
+
+int64_t setFrames(int64_t value);
+int64_t getFrames();
+
+int64_t setExposureTime(int64_t value);
+int64_t getExposureTime();
+
+int64_t setGates(int64_t value);
+int64_t getGates();
+
+int64_t setDelay(int64_t value);
+int64_t getDelaye();
+
+int64_t setPeriod(int64_t value);
+int64_t getPeriod();
+
+int64_t setTrains(int64_t value);
+int64_t getTrains();
+
+int64_t setProbes(int64_t value);
+int64_t getProbes();
+
+u_int32_t runBusy(void); 
+u_int32_t runState(void); 
+u_int32_t dataPresent(void); 
+
+
+u_int32_t startStateMachine();
+u_int32_t stopStateMachine();
+u_int32_t startReadOut();
+u_int32_t fifoReset(void);
+u_int32_t fifoReadCounter(int fifonum);
+u_int32_t fifoReadStatus();
+
+
+u_int32_t fifo_full(void);
+
+
+
+u_int32_t* fifo_read_event();
+u_int32_t* decode_data(int* datain);
+//u_int32_t move_data(u_int64_t* datain, u_int64_t* dataout);
+int setDynamicRange(int dr);
+int getDynamicRange();
+int getNModBoard();
+int setNMod(int n);
+int setStoreInRAM(int b);
+int allocateRAM();
+int clearRAM();
+
+/*
+
+u_int32_t setNBits(u_int32_t);
+u_int32_t getNBits();
+*/
+
+/*
+//move to mcb_funcs?
+
+int readOutChan(int *val);
+u_int32_t getModuleNumber(int modnum);
+int testShiftIn(int imod);
+int testShiftOut(int imod);
+int testShiftStSel(int imod);
+int testDataInOut(int num, int imod);
+int testExtPulse(int imod);
+int testExtPulseMux(int imod, int ow);
+int testDataInOutMux(int imod, int ow, int num);
+int testOutMux(int imod);
+int testFpgaMux(int imod);
+int calibration_sensor(int num, int *values, int *dacs) ;
+int calibration_chip(int num, int *values, int *dacs);
+*/
+
+
+#endif

slsDetectorSoftware/mythenDetectorServer/mcb_funcs.h

@@ -0,0 +1,157 @@
+#ifdef MCB_FUNCS
+
+#ifndef MCB_FUNCS_H
+#define MCB_FUNCS_H
+
+#include "sls_detector_defs.h"
+
+#define RGPRVALS {100,50,200}
+#define RGSH1VALS {300,200,400}
+#define RGSH2VALS {260,300,260}
+
+#define DEFAULTGAIN {11.66,9.32,14.99}
+#define DEFAULTOFFSET {817.5,828.6,804.2}
+
+
+
+// DAC definitions
+
+enum {VTRIM,VTHRESH,RGSH1,RGSH2,VCAL,RGPR};
+
+/* DAC adresses */
+#define DACCS {0,0,1,1,2,2}
+#define DACADDR {0,1,0,1,0,1}
+
+//dynamic range
+#define MAX5523
+#ifndef MAX5523
+#define MAX5533
+#endif
+#ifdef MAX5533
+#define DAC_DR 4096
+#endif
+#ifdef MAX5523
+#define DAC_DR 1024
+#endif
+
+
+//reference voltage
+#define DAC_REFOUT1
+#ifdef DAC_REFOUT2 
+#define DAC_MAX 2.425
+#define DAC_REFOUT 2 
+#define DAC_REFOUT1
+#endif
+#ifdef DAC_REFOUT3 
+#define DAC_MAX 3.885
+#define DAC_REFOUT 3
+#define DAC_REFOUT1
+#endif
+#ifdef DAC_REFOUT0
+#define DAC_MAX 1.214
+#define DAC_REFOUT 0
+#endif
+#ifdef DAC_REFOUT1
+#define DAC_MAX 1.940
+#define DAC_REFOUT 1
+#endif
+
+/* dac calibration constants */
+
+#define VA 1.11
+
+#define CVTRIM  52.430851
+#define BVTRIM  -0.102022
+#define AVTRIM  0.000050
+
+#define PARTREF {100,1.55,-2.5,-2.5,0,-2.5}
+#define PARTR1 {78,10,10,10,10,10}
+#define PARTR2 {0,4.7,27,47,22,47}
+
+
+//chip shiftin register meaning
+#define OUTMUX_OFFSET 20
+#define PROBES_OFFSET 4
+#define OUTBUF_OFFSET 0
+
+
+int initDetector();
+int copyChannel(sls_detector_channel *destChan, sls_detector_channel *srcChan);
+int copyChip(sls_detector_chip *destChip, sls_detector_chip *srcChip);
+int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod);
+
+/* Register commands */
+int clearDACSregister(int imod );
+int nextDAC(int imod );
+int clearCSregister(int imod );
+int setCSregister(int imod );
+int nextChip(int imod );
+int firstChip(int imod );
+int clearSSregister(int imod );
+int setSSregister(int imod );
+int nextStrip(int imod );
+int selChannel(int strip,int imod );
+int selChip(int chip,int imod );
+int selMod(int mod,int imod );
+
+/* DACs routines */
+int program_one_dac(int addr, int value,int imod );
+int set_one_dac(int imod);
+int initDAC(int dac_cs, int dac_addr, int value,int imod );
+int initDACs(int* v,int imod );
+int setSettings(int i);
+float initDACbyIndex(int ind,float val, int imod);
+float initDACbyIndexDACU(int ind,int val, int imod);
+float getDACbyIndexDACU(int ind,  int imod);
+int getThresholdEnergy();
+int setThresholdEnergy(int ethr);
+/* Initialization*/
+int initChannel(int ft,int cae, int ae, int coe, int ocoe, int counts,int imod );
+int initChannelbyNumber(sls_detector_channel myChan);
+int getChannelbyNumber(sls_detector_channel*);
+
+int getTrimbit(int imod, int ichip, int ichan);
+
+int initChip(int obe, int ow,int imod );
+
+int initChipWithProbes(int obe, int ow,int nprobes, int imod);
+//int getNProbes();
+
+int initChipbyNumber(sls_detector_chip myChip);
+int getChipbyNumber(sls_detector_chip*);
+int initMCBregisters(int cm,int imod );
+int initModulebyNumber(sls_detector_module);
+int getModulebyNumber(sls_detector_module*);
+
+/* To chips */
+int clearCounter(int imod );
+int clearOutReg(int imod);
+int setOutReg(int imod );
+int extPulse(int ncal,int imod );
+int calPulse(int ncal,int imod );
+int counterClear(int imod );
+int countEnable(int imod );
+int counterSet(int imod );
+
+
+/* moved from firmware_funcs */
+
+int readOutChan(int *val);
+
+int getModuleNumber(int modnum);
+int testShiftIn(int imod);
+int testShiftOut(int imod);
+int testShiftStSel(int imod);
+int testDataInOut(int num, int imod);
+int testExtPulse(int imod);
+int testExtPulseMux(int imod, int ow);
+int testDataInOutMux(int imod, int ow, int num);
+int testOutMux(int imod);
+int testFpgaMux(int imod);
+int calibration_sensor(int num, int *values, int *dacs) ;
+int calibration_chip(int num, int *values, int *dacs);
+
+
+#endif
+
+#endif

slsDetectorSoftware/mythenDetectorServer/registers.h

@@ -0,0 +1,158 @@
+#ifndef REGISTERS_H
+#define REGISTERS_H
+
+
+
+/* Definitions for FPGA*/
+#define CSP0 0x90000000 // Base Addresse CSP0
+#define CSP4 0xa0000000 // Base Addresse CSP4
+
+#define MEM_SIZE 0xFFFFFF // map so much memory
+
+
+/* registers defined in FPGA */
+#define FIX_PATT_REG     0x000000
+#define FPGA_VERSION_REG 0x001000
+#define DUMMY_REG        0x002000
+#define CONTROL_REG      0x003000
+#define STATUS_REG       0x004000
+#define CONFIG_REG       0x005000
+#define SPEED_REG        0x006000
+#define EXT_SIGNAL_REG   0x007000
+#define SET_NBITS_REG    0x008000
+#define LOOK_AT_ME_REG   0x009000
+
+#define SET_FRAMES_LSB_REG    0x00A000   
+#define SET_FRAMES_MSB_REG    0x00B000   
+#define GET_FRAMES_LSB_REG    0x00C000   
+#define GET_FRAMES_MSB_REG    0x00D000   
+
+#define SET_EXPTIME_LSB_REG    0x00E000   
+#define SET_EXPTIME_MSB_REG    0x00F000   
+#define GET_EXPTIME_LSB_REG    0x010000   
+#define GET_EXPTIME_MSB_REG    0x011000   
+
+#define SET_GATES_LSB_REG    0x012000   
+#define SET_GATES_MSB_REG    0x013000   
+#define GET_GATES_LSB_REG    0x014000   
+#define GET_GATES_MSB_REG    0x015000   
+
+#define SET_PERIOD_LSB_REG    0x016000   
+#define SET_PERIOD_MSB_REG    0x017000   
+#define GET_PERIOD_LSB_REG    0x018000   
+#define GET_PERIOD_MSB_REG    0x019000   
+
+#define SET_DELAY_LSB_REG    0x01A000   
+#define SET_DELAY_MSB_REG    0x01B000   
+#define GET_DELAY_LSB_REG    0x01C000   
+#define GET_DELAY_MSB_REG    0x01D000   
+
+#define SET_TRAINS_LSB_REG    0x01E000   
+#define SET_TRAINS_MSB_REG    0x01F000   
+#define GET_TRAINS_LSB_REG    0x020000   
+#define GET_TRAINS_MSB_REG    0x021000   
+
+#define GET_SHIFT_IN_REG      0x022000   
+
+#define MCB_CNTRL_REG_OFF       0x100000
+#define MCB_DOUT_REG_OFF        0x200000
+#define FIFO_CNTRL_REG_OFF      0x300000
+#define FIFO_COUNTR_REG_OFF     0x400000
+#define FIFO_DATA_REG_OFF       0x800000
+
+#define SHIFTMOD 2
+#define SHIFTFIFO 9
+
+
+/* values defined for FPGA */
+#define MCSNUM        0x0
+#define MCSVERSION    0x101
+#define FIXED_PATT_VAL 0xacdc1980
+#define FPGA_VERSION_VAL 0x00090514
+#define FPGA_INIT_PAT 0x60008
+#define FPGA_INIT_ADDR 0xb0000000
+
+/* for control register */
+#define START_ACQ_BIT      0x00000001
+#define STOP_ACQ_BIT       0x00000002
+#define START_FIFOTEST_BIT 0x00000004 // ?????
+#define STOP_FIFOTEST_BIT  0x00000008  // ??????
+#define START_READOUT_BIT  0x00000010  
+#define STOP_READOUT_BIT   0x00000020 
+#define START_EXPOSURE_BIT  0x00000040  
+#define STOP_EXPOSURE_BIT   0x00000080  
+#define START_TRAIN_BIT     0x00000100  
+#define STOP_TRAIN_BIT      0x00000200  
+#define SYNC_RESET          0x80000000
+
+/* for status register */
+#define RUN_BUSY_BIT             0x00000001
+#define READOUT_BUSY_BIT         0x00000002
+#define FIFOTEST_BUSY_BIT        0x00000004 //????
+#define WAITING_FOR_TRIGGER_BIT  0x00000008
+#define DELAYBEFORE_BIT          0x00000010
+#define DELAYAFTER_BIT           0x00000020
+#define EXPOSING_BIT             0x00000040
+#define COUNT_ENABLE_BIT         0x00000080
+#define SOME_FIFO_FULL_BIT       0x00008000 // error!
+#define ALL_FIFO_EMPTY_BIT       0x00010000 // data ready
+
+
+
+/* for config register */
+
+#define TOT_ENABLE_BIT           0x00000002
+#define TIMED_GATE_BIT           0x00000004
+#define TIMED_GATE_BIT           0x00000004
+#define CONT_RO_ENABLE_BIT       0x00080000  
+
+
+
+/* for speed register */
+
+#define CLK_DIVIDER_MASK              0x000000ff 
+#define CLK_DIVIDER_OFFSET            0 
+#define SET_LENGTH_MASK               0x00000f00 
+#define SET_LENGTH_OFFSET             8 
+#define WAIT_STATES_MASK              0x0000f000
+#define WAIT_STATES_OFFSET            12  
+#define TOTCLK_DIVIDER_MASK           0xff000000 
+#define TOTCLK_DIVIDER_OFFSET         24  
+
+
+/* for external signal register */
+
+#define SIGNAL_OFFSET                 4
+#define SIGNAL_MASK                   0xF
+#define EXT_SIG_OFF                   0x0
+#define EXT_GATE_IN_ACTIVEHIGH        0x1
+#define EXT_GATE_IN_ACTIVELOW         0x2
+#define EXT_TRIG_IN_RISING            0x3
+#define EXT_TRIG_IN_FALLING           0x4
+#define EXT_RO_TRIG_IN_RISING         0x5
+#define EXT_RO_TRIG_IN_FALLING        0x6
+#define EXT_GATE_OUT_ACTIVEHIGH        0x7
+#define EXT_GATE_OUT_ACTIVELOW         0x8
+#define EXT_TRIG_OUT_RISING            0x9
+#define EXT_TRIG_OUT_FALLING           0xA
+#define EXT_RO_TRIG_OUT_RISING         0xB
+#define EXT_RO_TRIG_OUT_FALLING        0xC
+
+
+
+/* fifo control register */
+#define FIFO_RESET_BIT              0x00000001 
+#define FIFO_DISABLE_TOGGLE_BIT     0x00000002 
+
+
+//chip shiftin register meaning
+
+#define OUTMUX_OFF 20
+#define OUTMUX_MASK   0x1f
+#define PROBES_OFF 4
+#define PROBES_MASK 0x7f
+#define OUTBUF_OFF 0
+#define OUTBUF_MASK 1
+
+
+#endif

slsDetectorSoftware/mythenDetectorServer/server.c

@@ -0,0 +1,68 @@
+/* A simple server in the internet domain using TCP
+   The port number is passed as an argument */
+#include "communication_funcs.h"
+#include "server_funcs.h"
+#include <stdlib.h>
+
+
+int sockfd;
+
+
+void error(char *msg)
+{
+    perror(msg);
+}
+
+int main(int argc, char *argv[])
+{
+  int  portno, b;
+  char cmd[100];
+  int retval=OK;
+
+  if (argc==1) {
+    portno = DEFAULT_PORTNO;
+    sprintf(cmd,"%s %d &",argv[0],DEFAULT_PORTNO+1);
+    printf("opening control server on port %d\n",portno );
+    system(cmd);
+    b=1;
+  } else {
+    portno = DEFAULT_PORTNO+1;
+    if ( sscanf(argv[1],"%d",&portno) ==0) {
+      printf("could not open stop server: unknown port\n");
+      return 1;
+    }
+    b=0;
+    printf("opening stop server on port %d\n",portno);
+  }
+   
+  init_detector(b); 
+
+
+  bindSocket(portno);
+  if (getServerError())
+    return -1;
+
+  /* assign function table */
+  function_table();
+
+
+
+  /* waits for connection */
+  while(retval!=GOODBYE) {
+#ifdef VERBOSE
+    printf("\n");
+#endif
+#ifdef VERY_VERBOSE
+    printf("Waiting for client call\n");
+#endif
+    acceptConnection();
+    retval=decode_function();
+    closeConnection();
+  }
+
+  exitServer();
+  printf("Goodbye!\n");
+
+  return 0; 
+}
+

slsDetectorSoftware/mythenDetectorServer/server_defs.h

@@ -0,0 +1,42 @@
+#ifndef SERVER_DEFS_H
+#define SERVER_DEFS_H
+
+#include "sls_detector_defs.h"
+
+#include <stdint.h> 
+
+
+// Hardware definitions
+
+#define NCHAN 128
+#define NCHIP 10
+#define NMAXMODX  24
+#define NMAXMODY 1
+#define NMAXMOD NMAXMODX*NMAXMODY
+#define NDAC 6
+#define NADC 0
+
+#define NCHANS NCHAN*NCHIP*NMAXMOD
+#define NDACS NDAC*NMAXMOD
+
+#define NTRIMBITS 6
+#define NCOUNTBITS 24
+
+//#define TRIM_DR ((2**NTRIMBITS)-1)
+//#define COUNT_DR ((2**NCOUNTBITS)-1) 
+#define TRIM_DR (((int)pow(2,NTRIMBITS))-1)
+#define COUNT_DR (((int)pow(2,NCOUNTBITS))-1)
+
+
+#define ALLMOD 0xffff
+#define ALLFIFO 0xffff
+
+#ifdef VIRTUAL
+#define DEBUGOUT
+#endif
+
+#define CLK_FREQ 100E+6
+
+
+#define THIS_SOFTWARE_VERSION 0x20090205
+#endif

slsDetectorSoftware/mythenDetectorServer/server_funcs.h

@@ -0,0 +1,70 @@
+#ifndef SERVER_FUNCS_H
+#define SERVER_FUNCS_H
+#include <stdio.h>
+/*
+#include <sys/types.h> 
+#include <sys/socket.h>
+#include <netinet/in.h>
+*/
+#include "communication_funcs.h"
+
+
+
+
+#define GOODBYE -200
+int function_table();
+
+int decode_function();
+
+int init_detector(int);
+
+int M_nofunc(int);
+int exit_server(int);
+
+
+
+
+  // General purpose functions
+int get_detector_type(int);
+int set_number_of_modules(int);
+int get_max_number_of_modules(int);
+
+
+int exec_command(int);
+int set_external_signal_flag(int);
+int set_external_communication_mode(int);
+int get_id(int);
+int digital_test(int);
+int write_register(int);
+int read_register(int);
+int set_dac(int);
+int get_adc(int);
+int set_channel(int);
+int set_chip(int);
+int set_module(int);
+int get_channel(int);
+int get_chip(int);
+int get_module(int);
+
+int get_threshold_energy(int); 
+int set_threshold_energy(int);  
+int set_settings(int);
+int start_acquisition(int);
+int stop_acquisition(int);
+int start_readout(int);
+int get_run_status(int);
+int read_frame(int);
+int read_all(int);
+int start_and_read_all(int);
+int set_timer(int);
+int get_time_left(int);
+int set_dynamic_range(int);
+int set_roi(int);
+int get_roi(int);
+int set_readout_flags(int);
+int execute_trimming(int);
+
+  
+
+
+#endif

slsDetectorSoftware/mythenDetectorServer/sharedmemory.c

@@ -0,0 +1,39 @@
+#include "sharedmemory.h"
+
+struct statusdata *stdata;
+
+int inism(int clsv) {
+
+static int scansmid;
+
+    if (clsv==SMSV) {
+	if ( (scansmid=shmget(SMKEY,1024,IPC_CREAT | 0666 ))==-1 ) {
+	    return -1;
+	}
+	if ( (stdata=shmat(scansmid,NULL,0))==(void*)-1) {
+	    return -2;
+	}
+    }
+
+    if (clsv==SMCL) {
+	if ( (scansmid=shmget(SMKEY,0,0) )==-1 ) {
+	    return -3;
+	}
+	if ( (stdata=shmat(scansmid,NULL,0))==(void*)-1) {
+	    return -4;
+	}
+    }
+    return 1;
+}
+
+void write_status_sm(char *status) {
+  strcpy(stdata->status,status);
+}
+
+void write_stop_sm(int v) {
+  stdata->stop=v;
+}
+
+void write_runnumber_sm(int v) {
+  stdata->runnumber=v;
+}

slsDetectorSoftware/mythenDetectorServer/sharedmemory.h

@@ -0,0 +1,47 @@
+#ifndef SM
+#define SM
+
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/mman.h>
+#include <fcntl.h>
+#include <stdarg.h>
+#include <unistd.h>
+#include <asm/page.h>
+#include <sys/mman.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <stdarg.h>
+#include <unistd.h>
+
+
+#include <sys/shm.h>
+
+#include <sys/ipc.h>
+#include <sys/stat.h>
+
+/* key for shared memory */
+#define SMKEY 10001
+
+#define SMSV 1
+#define SMCL 2
+
+
+struct statusdata {
+  int runnumber;
+  int stop;
+  char status[20];
+} ;
+
+
+/* for shared memory */
+
+int inism(int clsv);
+void write_status_sm(char *status);
+void write_stop_sm(int v);
+void write_runnumber_sm(int v);
+
+#endif

slsDetectorSoftware/mythenDetectorServer/sls_detector_defs.h

@@ -0,0 +1 @@
+../commonFiles/sls_detector_defs.h

slsDetectorSoftware/mythenDetectorServer/stop_server.c

@@ -0,0 +1,41 @@
+/* A simple server in the internet domain using TCP
+   The port number is passed as an argument */
+#include "communication_funcs.h"
+#include "firmware_funcs.h"
+
+
+int sockfd;
+
+int main(int argc, char *argv[])
+{
+  int  portno;
+  int retval=0;
+
+  portno = DEFAULT_PORTNO;
+
+
+  bindSocket(portno);
+  if (getServerError())
+    return -1;
+
+
+
+  /* waits for connection */
+  while(retval!=GOODBYE) {
+#ifdef VERBOSE
+    printf("\n");
+#endif
+#ifdef VERY_VERBOSE
+    printf("Stop server: waiting for client call\n");
+#endif
+    acceptConnection();
+    retval=stopStateMachine();
+    closeConnection();
+  }
+
+  exitServer();
+  printf("Goodbye!\n");
+
+  return 0; 
+}
+

slsDetectorSoftware/mythenDetectorServer/trimming_funcs.c

@@ -0,0 +1,661 @@
+
+#include "server_defs.h"
+#include "trimming_funcs.h"
+#include "mcb_funcs.h"
+#include "firmware_funcs.h"
+#include <math.h>
+
+
+
+extern int nModX;
+//extern int *values;
+
+extern const int nChans;
+extern const int nChips;
+extern const int nDacs;
+extern const int nAdcs;
+
+
+int trim_fixed_settings(int countlim, int par2, int im)
+{
+
+  int retval=OK;
+#ifdef VERBOSE
+  printf("Trimming with fixed settings\n");
+#endif
+#ifdef VIRTUAL
+  return OK;
+#endif
+
+  if (par2<=0)
+    retval=trim_with_level(countlim, im);
+  else
+    retval=trim_with_median(countlim,im);
+
+
+  return retval;
+}
+
+
+int trim_with_noise(int countlim, int nsigma, int im)
+{
+
+
+  int retval=OK, retval1=OK, retval2=OK;
+#ifdef VERBOSE
+  printf("Trimming using noise\n");
+#endif
+#ifdef VIRTUAL
+  return OK;
+#endif
+
+  /* threshold scan */
+
+#ifdef VERBOSE
+  printf("chosing vthresh and vtrim.....");
+#endif
+  retval1=choose_vthresh_and_vtrim(countlim,nsigma, im);
+ 
+#ifdef VERBOSE
+  printf("trimming with noise.....\n");
+#endif
+  retval2=trim_with_level(countlim, im);
+  
+#ifdef DEBUGOUT
+  printf("done\n");
+#endif
+  if (retval1==OK && retval2==OK)
+    retval=OK;
+  else
+    retval=FAIL;
+
+  return retval;
+
+}
+
+int trim_with_beam(int countlim, int nsigma, int im) //rpc
+{
+
+
+  int retval=OK, retval1=OK, retval2=OK;
+
+  printf("Trimming using beam\n");
+  //return OK;
+#ifdef VIRTUAL
+  printf("Trimming using beam\n");
+  return OK;
+#endif
+  /* threshold scan */
+#ifdef DEBUGOUT
+  printf("chosing vthresh and vtrim.....");
+#endif
+  
+  retval1=choose_vthresh_and_vtrim(countlim,nsigma,im);
+  retval2=trim_with_median(TRIM_DR, im);
+
+#ifdef DEBUGOUT
+    printf("done\n");
+#endif
+
+  if (retval1==OK && retval2==OK)
+    retval=OK;
+  else
+    retval=FAIL;
+
+  return retval;
+
+}
+
+
+int  trim_improve(int maxit, int par2, int im) //rpc
+{
+
+  int retval=OK, retval1=OK, retval2=OK;
+
+
+#ifdef VERBOSE
+  printf("Improve the trimming\n");
+#endif
+#ifdef VIRTUAL
+  return OK;
+#endif
+ 
+
+  if (par2!=0 && im==ALLMOD)
+    retval1=choose_vthresh();
+
+  retval2=trim_with_median(2*maxit+1, im);
+#ifdef DEBUGOUT
+    printf("done\n");
+#endif
+  if (retval1==OK && retval2==OK)
+    retval=OK;
+  else
+    retval=FAIL;
+
+  return retval;
+
+}
+
+int calcthr_from_vcal(int vcal) {
+  int thrmin;
+  //thrmin=140+3*vcal/5;
+  thrmin=180+3*vcal/5;
+  return thrmin;
+}
+
+int calccal_from_vthr(int vthr) {
+  int vcal;
+  vcal=5*(vthr-140)/3;
+  return vcal;
+}
+
+int choose_vthresh_and_vtrim(int countlim,  int nsigma, int im) {
+  int retval=OK;
+#ifdef MCB_FUNCS
+  int modma, modmi, nm;
+  int thr, thrstep=5, nthr=31;
+ 
+  float vthreshmean, vthreshSTDev;
+  int *thrmi, *thrma;
+  float c;
+  float b=BVTRIM;       
+  float a=AVTRIM; 
+  int *trim;
+  int ich, imod, ichan;
+  int nvalid=0;
+  int *scan;
+  int ithr;
+
+
+  setFrames(1);
+  // setNMod(getNModBoard());
+
+  if (im==ALLMOD){
+    modmi=0;
+    modma=nModX;
+  } else {
+    modmi=im;
+    modma=im+1;
+  } 
+  nm=modma-modmi;
+  
+  trim=malloc(sizeof(int)*nChans*nChips*nModX);
+  thrmi=malloc(sizeof(int)*nModX);
+  thrma=malloc(sizeof(int)*nModX);
+
+
+  for (ich=0; ich<nChans*nChips*nm; ich++)
+    trim[ich]=-1;
+  /*
+  setCSregister(im);
+  setSSregister(im);
+  initChannel(0,0,0,1,0,0,im);
+  counterClear(im);
+  clearSSregister(im); 
+  usleep(500); 
+  */
+
+
+
+  for (ithr=0; ithr<nthr; ithr++) {
+    fifoReset();
+    /* scanning threshold */
+    for (imod=modmi; imod<modma; imod++) {
+      thr=getDACbyIndexDACU(VTHRESH,imod);
+      if (ithr==0) {
+	thrmi[imod]=thr;
+	initDACbyIndexDACU(VTHRESH,thr,imod);
+      } else
+	initDACbyIndexDACU(VTHRESH,thr+thrstep,imod);
+    } 
+    setCSregister(ALLMOD);
+    setSSregister(ALLMOD);
+    initChannel(0,0,0,1,0,0,im);
+    counterClear(ALLMOD);
+    clearSSregister(ALLMOD); 
+    usleep(500); 
+    startStateMachine();
+    while (runBusy()) {
+    }
+    usleep(500);
+    scan=decode_data(fifo_read_event());
+    for (imod=modmi; imod<modma; imod++) {
+      for (ichan=0; ichan<nChans*nChips; ichan++){
+	ich=imod*nChips*nChans+ichan;
+	if (scan[ich]>countlim && trim[ich]==-1) {
+	  trim[ich]=getDACbyIndexDACU(VTHRESH,imod);
+#ifdef VERBOSE
+	  //	  printf("yes: %d %d %d\n",ich,ithr,scan[ich]);
+#endif
+	} 
+#ifdef VERBOSE
+	/*	else {
+	  printf("no: %d %d %d\n",ich,ithr,scan[ich]);
+	  }*/
+#endif
+      }
+    }
+    free(scan);
+  }
+  
+  for (imod=modmi; imod<modma; imod++) {
+    vthreshmean=0;
+    vthreshSTDev=0;
+    nvalid=0;
+    thrma[imod]=getDACbyIndexDACU(VTHRESH,imod);
+    
+    for (ichan=0; ichan<nChans*nChips; ichan++){
+      ich=imod*nChans*nChips+ichan;
+      if(trim[ich]>thrmi[imod] && trim[ich]<thrma[imod]) {
+	vthreshmean=vthreshmean+trim[ich];
+	vthreshSTDev=vthreshSTDev+trim[ich]*trim[ich];
+	nvalid++;
+      }	
+    }
+      
+    if (nvalid>0) {
+      vthreshmean=vthreshmean/nvalid;
+      vthreshSTDev=sqrt((vthreshSTDev/nvalid)-vthreshmean*vthreshmean);
+    } else {
+      vthreshmean=thrmi[imod];
+      vthreshSTDev=nthr*thrstep;
+      printf("No valid channel for module %d\n",imod);
+      retval=FAIL;
+    }
+
+#ifdef DEBUGOUT
+    printf("module= %d nvalid = %d mean=%f RMS=%f\n",imod, nvalid, vthreshmean,vthreshSTDev);
+#endif
+    // *vthresh=round(vthreshmean-nsigma*vthreshSTDev);
+    thr=(int)(vthreshmean-nsigma*vthreshSTDev);
+    if (thr<0 || thr>(DAC_DR-1)) {
+      thr=thrmi[imod]/2;
+      printf("Can't find correct threshold for module %d\n",imod);
+      retval=FAIL;
+    }
+    initDACbyIndexDACU(VTHRESH,thr,imod);
+#ifdef VERBOSE
+    printf("vthresh=%d  \n",thr);
+#endif 
+    c=CVTRIM-2.*nsigma*vthreshSTDev/63.;
+    thr=(int)((-b-sqrt(b*b-4*a*c))/(2*a));
+    if (thr<500 || thr>(DAC_DR-1)) {
+      thr=750;
+      printf("Can't find correct trimbit size for module %d\n",imod);
+      retval=FAIL;
+    }
+      
+    initDACbyIndexDACU(VTRIM,thr,imod);
+    
+#ifdef VERBOSE
+    printf("vtrim=%d  \n",thr);
+#endif 
+
+  }
+  free(trim);
+  free(thrmi);
+  free(thrma);
+
+#endif
+  return retval;
+}
+
+
+
+
+
+int trim_with_level(int countlim, int im) {
+  int ich, itrim, ichan, ichip, imod;
+  int *scan, *inttrim;
+  int modma, modmi, nm;
+  int retval=OK;
+
+#ifdef MCB_FUNCS
+  setFrames(1);
+  // setNMod(getNModBoard());
+
+  if (im==ALLMOD){
+    modmi=0;
+    modma=nModX;
+  } else {
+    modmi=im;
+    modma=im+1;
+  } 
+  nm=modma-modmi;
+  
+  inttrim=malloc(sizeof(int)*nChips*nChans*nModX);
+  printf("countlim=%d\n",countlim);
+  for (ich=0; ich<nChans*nChips*nModX; ich++) 
+    inttrim[ich]=-1;
+
+  for (itrim=0; itrim<TRIM_DR+1; itrim++) { 
+    fifoReset(); 
+    setCSregister(im); 
+    setSSregister(im);
+    printf("Trimbit %d\n",itrim);
+    initChannel(itrim,0,0,1,0,0,im);
+    setCSregister(ALLMOD); 
+    setSSregister(ALLMOD);
+    counterClear(ALLMOD);
+    clearSSregister(ALLMOD); 
+    usleep(500);
+    startStateMachine();
+    while (runBusy()) {
+    }
+    usleep(500);
+
+    scan=decode_data(fifo_read_event());
+    for (imod=modmi; imod<modma; imod++) {
+      for (ichan=0; ichan<nChans*nChips; ichan++) {
+	ich=ichan+imod*nChans*nChips;
+	if (scan[ich]>countlim){
+	  if (inttrim[ich]==-1) {
+	    inttrim[ich]=itrim;
+#ifdef VERBOSE
+	    printf("Channel %d trimbit %d counted %d countlim %d\n",ich,itrim,scan[ich],countlim);
+#endif
+	  } 
+	}
+#ifdef VERBOSE
+	/*	  else  
+	  printf("Channel %d trimbit %d counted %d countlim %d\n",ich,itrim,scan[ich],countlim);*/
+#endif
+      }
+    }
+    free(scan);
+  }
+
+  for (imod=modmi; imod<modma; imod++) {
+    clearCSregister(imod); 
+    firstChip(im); 
+    for (ichip=0; ichip<nChips; ichip++) {
+      clearSSregister(imod); 
+      for (ichan=0; ichan<nChans; ichan++) {
+	nextStrip(imod);
+	ich=ichan+imod*nChans*nChips+ichip*nChans;
+	if (*(inttrim+ich)==-1) {
+	  *(inttrim+ich)=itrim-1;
+	  printf("could not trim channel %d chip %d module %d - set to %d\n", ichan, ichip, imod, *(inttrim+ich) );
+	  retval=FAIL;
+	}
+	initChannel(inttrim[ich],0,0,1,0,0,imod);
+      }
+      nextChip(imod); 
+    }
+  }
+  free(inttrim);
+  
+#endif
+  return retval;
+}
+
+
+#define ELEM_SWAP(a,b) { register int t=(a);(a)=(b);(b)=t; }
+#define median(a,n) kth_smallest(a,n,(((n)&1)?((n)/2):(((n)/2)-1)))
+
+
+int kth_smallest(int *a, int n, int k)
+{
+    register int i,j,l,m ;
+    register float x ;
+
+    l=0 ; m=n-1 ;
+    while (l<m) {
+        x=a[k] ;
+        i=l ;
+        j=m ;
+        do {
+            while (a[i]<x) i++ ;
+            while (x<a[j]) j-- ;
+            if (i<=j) {
+                ELEM_SWAP(a[i],a[j]) ;
+                i++ ; j-- ;
+            }
+        } while (i<=j) ;
+        if (j<k) l=i ;
+        if (k<i) m=j ;
+    }
+    return a[k] ;
+}
+
+
+
+int ave(int *a, int n)
+{
+  int av=0,i;
+  for (i=0; i<n; i++)
+    av=av+((float)*(a+i))/((float)n);
+  return av;
+}
+
+
+int choose_vthresh() {
+
+  int retval=OK;
+#ifdef MCB_FUNCS
+  int imod,  ichan;
+  int  *scan, olddiff[nModX], direction[nModX];
+  int med[nModX], diff, media;
+  int change_flag=1;
+  int iteration=0;
+  int maxiterations=10;
+  int vthreshmean=0;
+  int vthresh;
+  int im=ALLMOD;
+  int modma, modmi, nm;
+
+
+  setFrames(1);
+  // setNMod(getNModBoard());
+
+  if (im==ALLMOD){
+    modmi=0;
+    modma=nModX;
+  } else {
+    modmi=im;
+    modma=im+1;
+  } 
+  nm=modma-modmi;
+  
+
+
+  setCSregister(ALLMOD);
+  setSSregister(ALLMOD);
+  counterClear(ALLMOD);
+  clearSSregister(ALLMOD); 
+  usleep(500); 
+  startStateMachine();
+  while (runBusy()) {
+    //printf(".");
+  }
+  usleep(500);
+  
+  scan=decode_data(fifo_read_event());
+
+
+  for (imod=modmi; imod<modma; imod++) {
+    med[imod]=median(scan+imod*nChans*nChips,nChans*nChips);
+    vthreshmean=vthreshmean+getDACbyIndexDACU(VTHRESH,imod);
+    olddiff[imod]=0xffffff;
+    direction[imod]=0;
+    printf("Median of module %d=%d\n",imod,med[imod]);
+  }
+  vthreshmean=vthreshmean/nm;
+  //media=median(scan,nChans*nChips*nModX);
+  //printf("Median overall=%d\n",media);
+  media=median(med+modmi,nm);
+  printf("Median of modules=%d\n",media);
+  free(scan);
+  while(change_flag && iteration<maxiterations) {
+
+    fifoReset(); 
+    setCSregister(ALLMOD);
+    setSSregister(ALLMOD);
+    counterClear(ALLMOD);
+    clearSSregister(ALLMOD); 
+    usleep(500); 
+    startStateMachine();
+    while (runBusy()) {
+    }
+    usleep(500);
+    scan=decode_data(fifo_read_event());
+
+    change_flag=0;
+    printf("Vthresh iteration %3d 0f %3d\n",iteration, maxiterations);
+    for (ichan=modmi; ichan<modma; ichan++) {
+      med[ichan]=median(scan+ichan*nChans*nChips,nChans*nChips);
+      media=median(med+modmi,nm);
+      diff=med[ichan]-media;
+      if (direction[ichan]==0) {
+	if (diff>0) 
+	  direction[ichan]=1;
+	else
+	  direction[ichan]=-1;
+      }
+      vthresh=getDACbyIndexDACU(VTHRESH,imod);
+      if ( direction[ichan]!=-3) { 
+	if (abs(diff)>abs(olddiff[ichan])) {
+	  vthresh=vthresh-direction[ichan];
+	  if (vthresh>(DAC_DR-1)) {
+	    vthresh=(DAC_DR-1);
+	    printf("can't equalize threshold for module %d\n", ichan);
+	    retval=FAIL;
+	  }
+	  if (vthresh<0) {
+	    vthresh=0;
+	    printf("can't equalize threshold for module %d\n", ichan);
+	    retval=FAIL;
+	  }
+	  direction[ichan]=-3;
+	} else {
+	  vthresh=vthresh+direction[ichan];
+	  olddiff[ichan]=diff;
+	  change_flag=1;
+	}
+	initDACbyIndex(VTHRESH,vthresh, ichan);
+      }
+    }
+    iteration++;
+    free(scan);
+  }
+#endif
+  return retval;
+}
+
+
+
+
+
+int trim_with_median(int stop, int im) {
+ 
+ 
+  int retval=OK;
+
+#ifdef MCB_FUNCS
+  int  ichan, imod, ichip, ich;
+  int  *scan, *olddiff, *direction;
+  int med, diff;
+  int change_flag=1;
+  int iteration=0;
+  int me[nModX];
+  int modma, modmi, nm;
+  int trim;
+
+  setFrames(1);
+  // setNMod(getNModBoard());
+
+  if (im==ALLMOD){
+    modmi=0;
+    modma=nModX;
+  } else {
+    modmi=im;
+    modma=im+1;
+  } 
+  nm=modma-modmi;
+
+  olddiff=malloc(4*nModX*nChips*nChans);
+  direction=malloc(4*nModX*nChips*nChans);
+
+  fifoReset(); 
+  setCSregister(ALLMOD);
+  setSSregister(ALLMOD);
+  counterClear(ALLMOD);
+  clearSSregister(ALLMOD); 
+  usleep(500); 
+  startStateMachine();
+  while (runBusy()) {
+  }
+  usleep(500);
+  scan=decode_data(fifo_read_event());
+  for (imod=modmi; imod<modma; imod++) {
+    me[imod]=median(scan+imod*nChans*nChips,nChans*nChips);
+    printf("Median of module %d=%d\n",imod,me[imod]);
+  }
+  med=median(me,nm);
+  printf("median is %d\n",med);
+  free(scan);
+
+  while(change_flag && iteration<stop) {
+
+    fifoReset(); 
+    setCSregister(ALLMOD);
+    setSSregister(ALLMOD);
+    counterClear(ALLMOD);
+    clearSSregister(ALLMOD); 
+    usleep(500); 
+    startStateMachine();
+    while (runBusy()) {
+    }
+    usleep(500);
+    scan=decode_data(fifo_read_event());
+  
+    change_flag=0;
+    printf("Trimbits iteration %3d 0f %3d\n",iteration, stop);
+    for (imod=modmi; imod<modma; imod++) {
+      for (ichip=0; ichip<nChips; ichip++) {
+	selChip(ichip,imod);
+	clearSSregister(imod);
+	for (ich=0; ich<nChans; ich++) {
+	  ichan=imod*nChips*nChans+ichip*nChans+ich;
+	  nextStrip(imod);
+	  diff=scan[ichan]-med;
+	  if (direction[ichan]==0) {
+	    if (diff>0) 
+	      direction[ichan]=1;
+	    else
+	      direction[ichan]=-1;
+	  }
+	  if ( direction[ichan]!=-3) { 
+	    if (abs(diff)>abs(olddiff[ichan])) {
+	      printf("%d old diff %d < new diff %d   %d\n",ichan, olddiff[ichan], diff, direction[ichan]);
+	      trim=getTrimbit(imod,ichip,ich)+direction[ichan];
+	      direction[ichan]=-3;
+	    } else {
+	      trim=getTrimbit(imod,ichip,ich)-direction[ichan];
+	      olddiff[ichan]=diff;
+	      change_flag=1;
+	    }
+	    if (trim>TRIM_DR) {
+	      trim=63;
+	      printf("can't trim channel %d chip %d module %d\n",ich, ichip, imod);
+	      retval=FAIL;
+	    }
+	    if (trim<0) {
+	      trim=0;
+	      printf("can't trim channel %d chip %d module %d\n",ich, ichip, imod);
+	      retval=FAIL;
+	    }
+	    initChannel(trim,0,0,1,0,0,imod);
+	  }
+	}
+      }
+    }
+    iteration++;
+    free(scan);
+  }
+  free(olddiff);
+  free(direction);
+#endif
+  return retval;
+}

slsDetectorSoftware/mythenDetectorServer/trimming_funcs.h

@@ -0,0 +1,17 @@
+#ifndef TRIMMING_FUNCS_H
+#define TRIMMING_FUNCS_H
+int trim_fixed_settings(int countlim, int par2, int imod);
+int trim_with_noise(int countlim, int nsigma, int imod);
+int trim_with_beam(int countlim, int nsigma, int imod);
+int  trim_improve(int maxit, int par2, int imod);
+int calcthr_from_vcal(int vcal);
+int calccal_from_vthr(int vthr);
+int choose_vthresh_and_vtrim(int countlim, int nsigma, int imod);
+
+int choose_vthresh();
+int trim_with_level(int countlim, int imod);
+int trim_with_median(int stop, int imod);
+int calcthr_from_vcal(int vcal);
+int calccal_from_vthr(int vthr);
+
+#endif