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Counters (#71)

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* mythen3: adding counters mask, firmware still takes only number of counters for now

* mythen3: checking if module attached before powering on chip

* bug fix: loop inital declaration not allowed in c

* fix scope eiger test

* mythen3: renamed setCounters to setCounterMask and getCounterMask in API

* mythen3 replacing counting bits with popcount

Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com>
This commit is contained in:
Dhanya Thattil
2020-01-14 17:40:46 +01:00
committed by Erik Fröjdh
parent 70c54f4315
commit de53747ddd
26 changed files with 742 additions and 759 deletions
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3
slsDetectorServers/mythen3DetectorServer/RegisterDefs.h
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@ -82,7 +82,6 @@
/* Config RW regiseter */
#define CONFIG_REG (0x20 * REG_OFFSET + BASE_CONTROL)
#define CONFIG_COUNTER_ENA_OFST (0)
#define CONFIG_COUNTER_ENA_MSK (0x00000003 << CONFIG_COUNTER_ENA_OFST)
#define CONFIG_COUNTER_ENA_DEFAULT_VAL ((0x0 << CONFIG_COUNTER_ENA_OFST) & CONFIG_COUNTER_ENA_MSK)
@ -119,6 +118,8 @@
#define DTA_OFFSET_REG (0x24 * REG_OFFSET + BASE_CONTROL)
/* Pattern Control registers --------------------------------------------------*/
/* Pattern status Register*/

BIN
slsDetectorServers/mythen3DetectorServer/bin/mythen3DetectorServer_developer
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Binary file not shown.

91
slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c
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@ -38,6 +38,7 @@ uint32_t clkFrequency[NUM_CLOCKS] = {0, 0, 0, 0, 0};
int highvoltage = 0;
int dacValues[NDAC] = {0};
int detPos[2] = {0, 0};
uint32_t countermask = 0; // will be removed later when in firmware converted to mask
int isInitCheckDone() {
return initCheckDone;
@ -364,8 +365,7 @@ void setupDetector() {
// dynamic range
setDynamicRange(DEFAULT_DYNAMIC_RANGE);
// enable all counters
bus_w(CONFIG_REG, bus_r(CONFIG_REG) & ~CONFIG_COUNTER_ENA_MSK);
bus_w(CONFIG_REG, bus_r(CONFIG_REG) | CONFIG_COUNTER_ENA_ALL_VAL);
setCounterMask(MAX_COUNTER_MSK);
// Initialization of acquistion parameters
@ -529,6 +529,66 @@ int64_t getPeriod() {
return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-9 * FIXED_PLL_FREQUENCY);
}
void setCounterMask(uint32_t arg) {
if (arg == 0 || arg > MAX_COUNTER_MSK) {
return;
}
countermask = arg;
// convert mask into number of counters (until firmware converts to mask)
int ncounters = __builtin_popcount(countermask);
FILE_LOG(logINFO, ("Setting number of counters to %d\n", ncounters));
uint32_t val = 0;
switch (ncounters) {
case 1:
val = CONFIG_COUNTER_ENA_1_VAL;
break;
case 2:
val = CONFIG_COUNTER_ENA_2_VAL;
break;
default:
val = CONFIG_COUNTER_ENA_ALL_VAL;
break;
}
uint32_t addr = CONFIG_REG;
bus_w(addr, bus_r(addr) &~ CONFIG_COUNTER_ENA_MSK);
bus_w(addr, bus_r(addr) | val);
FILE_LOG(logDEBUG, ("Config Reg: 0x%x\n", bus_r(addr)));
}
uint32_t getCounterMask() {
uint32_t addr = CONFIG_REG;
uint32_t regval = (bus_r(addr) & CONFIG_COUNTER_ENA_MSK);
int ncounters = 0;
switch (regval) {
case CONFIG_COUNTER_ENA_1_VAL:
ncounters = 1;
break;
case CONFIG_COUNTER_ENA_2_VAL:
ncounters = 2;
break;
default:
ncounters = 3;
break;
}
// confirm ncounters work with mask saved in server (until firmware converts to mask)
int nc = __builtin_popcount(countermask);
// if not equal, make a mask of what is in register (will change once firmware changes)
if (nc != ncounters) {
switch (ncounters) {
case 1:
countermask = 0x1;
break;
case 2:
countermask = 0x3;
break;
default:
countermask = 0x7;
break;
}
}
return countermask;
}
int setDelayAfterTrigger(int64_t val) {
if (val < 0) {
FILE_LOG(logERROR, ("Invalid delay after trigger: %lld ns\n", (long long int)val));
@ -992,6 +1052,33 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) {
}
}
int checkDetectorType() {
FILE_LOG(logINFO, ("Checking type of module\n"));
FILE* fd = fopen(TYPE_FILE_NAME, "r");
if (fd == NULL) {
FILE_LOG(logERROR, ("Could not open file %s to get type of the module attached\n", TYPE_FILE_NAME));
return -1;
}
char buffer[MAX_STR_LENGTH];
memset(buffer, 0, sizeof(buffer));
fread (buffer, MAX_STR_LENGTH, sizeof(char), fd);
if (strlen(buffer) == 0) {
FILE_LOG(logERROR, ("Could not read file %s to get type of the module attached\n", TYPE_FILE_NAME));
return -1;
}
int type = atoi(buffer);
if (type > TYPE_TOLERANCE) {
FILE_LOG(logERROR, ("No Module attached! Expected %d for Mythen, got %d\n", TYPE_MYTHEN3_MODULE_VAL, type));
return -2;
}
if (abs(type - TYPE_MYTHEN3_MODULE_VAL) > TYPE_TOLERANCE) {
FILE_LOG(logERROR, ("Wrong Module attached! Expected %d for Mythen, got %d\n", TYPE_MYTHEN3_MODULE_VAL, type));
return FAIL;
}
return OK;
}
int powerChip (int on){
if(on != -1){
if(on){

11
slsDetectorServers/mythen3DetectorServer/slsDetectorServer_defs.h
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@ -7,14 +7,21 @@
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
/* Hardware Definitions */
#define NCHAN (128 * 3)
#define NCOUNTERS (3)
#define MAX_COUNTER_MSK (0x7)
#define NCHAN (128 * NCOUNTERS)
#define NCHIP (10)
#define NDAC (16)
#define HV_SOFT_MAX_VOLTAGE (200)
#define HV_HARD_MAX_VOLTAGE (530)
#define HV_DRIVER_FILE_NAME ("/etc/devlinks/hvdac")
#define DAC_DRIVER_FILE_NAME ("/etc/devlinks/dac")
#define DAC_DRIVER_FILE_NAME ("/etc/devlinks/dac")
#define TYPE_FILE_NAME ("/etc/devlinks/type")
#define DAC_MAX_MV (2048)
#define TYPE_MYTHEN3_MODULE_VAL (93)
#define TYPE_TOLERANCE (10)
#define TYPE_NO_MODULE_STARTING_VAL (800)
/** Default Parameters */
#define DEFAULT_DYNAMIC_RANGE (24)