This commit is contained in:
Erik Frojdh 2020-01-08 16:44:42 +01:00
parent 71b0ed271e
commit dac5ecd123
6 changed files with 108 additions and 32 deletions

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@ -11,3 +11,4 @@ from sls_detector import dacIndex
d = Detector() d = Detector()
e = Eiger() e = Eiger()
c = Ctb() c = Ctb()

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@ -0,0 +1,13 @@
import subprocess
import locale
out = subprocess.run(['g', 'list'], stdout = subprocess.PIPE, encoding=locale.getpreferredencoding())
cmd = out.stdout.splitlines()
cmd.pop(0)
from sls_detector import Detector, Eiger, Ctb
pycmd = dir(Detector)+dir(Eiger)+dir(Ctb)
for c in cmd:
if c not in pycmd:
print(c)

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@ -7,7 +7,7 @@ from .detector_property import DetectorProperty
class CtbDacs(DetectorDacs): class CtbDacs(DetectorDacs):
""" """
Eiger specific dacs Ctb dacs
""" """
_dacs = [('dac0', dacIndex(0), 0, 4000, 1400), _dacs = [('dac0', dacIndex(0), 0, 4000, 1400),
('dac1', dacIndex(1), 0, 4000, 1200), ('dac1', dacIndex(1), 0, 4000, 1200),

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@ -7,24 +7,25 @@ dacIndex = slsDetectorDefs.dacIndex
from .utils import element_if_equal, all_equal from .utils import element_if_equal, all_equal
from .utils import Geometry, to_geo from .utils import Geometry, to_geo
from .registers import Register, Adc_register
import datetime as dt import datetime as dt
from functools import wraps from functools import wraps
from collections import namedtuple from collections import namedtuple
class Register: # class Register:
""" # """
Helper class to read and write to registers using a # Helper class to read and write to registers using a
more Pythonic syntax # more Pythonic syntax
""" # """
def __init__(self, detector): # def __init__(self, detector):
self._detector = detector # self._detector = detector
def __getitem__(self, key): # def __getitem__(self, key):
return self._detector.readRegister(key) # return self._detector.readRegister(key)
def __setitem__(self, key, value): # def __setitem__(self, key, value):
self._detector.writeRegister(key, value) # self._detector.writeRegister(key, value)
def freeze(cls): def freeze(cls):
@ -69,6 +70,7 @@ class Detector(CppDetectorApi):
""" """
super().__init__(multi_id) super().__init__(multi_id)
self._register = Register(self) self._register = Register(self)
self._adc_register = Adc_register(self)
@ -589,6 +591,10 @@ class Detector(CppDetectorApi):
def reg(self): def reg(self):
return self._register return self._register
@property
def adcreg(self):
return self._adc_register
@property @property
def ratecorr(self): def ratecorr(self):
""" tau in ns """ """ tau in ns """
@ -639,21 +645,7 @@ class Detector(CppDetectorApi):
def vthreshold(self): def vthreshold(self):
return element_if_equal(self.getDAC(dacIndex.THRESHOLD)) return element_if_equal(self.getDAC(dacIndex.THRESHOLD))
@property
def asamples(self):
return element_if_equal(self.getNumberOfAnalogSamples())
@asamples.setter
def asamples(self, N):
self.setNumberOfAnalogSamples(N)
@property
def dsamples(self):
return element_if_equal(self.getNumberOfDigitalSamples())
@dsamples.setter
def dsamples(self, N):
self.setNumberOfDigitalSamples(N)
""" """
@ -683,3 +675,67 @@ class Detector(CppDetectorApi):
@flowcontrol10g.setter @flowcontrol10g.setter
def flowcontrol10g(self, enable): def flowcontrol10g(self, enable):
self.setTenGigaFlowControl(enable) self.setTenGigaFlowControl(enable)
"""
CTB stuff
"""
@property
def asamples(self):
return element_if_equal(self.getNumberOfAnalogSamples())
@asamples.setter
def asamples(self, N):
self.setNumberOfAnalogSamples(N)
@property
def dsamples(self):
return element_if_equal(self.getNumberOfDigitalSamples())
@dsamples.setter
def dsamples(self, N):
self.setNumberOfDigitalSamples(N)
@property
def dbitphase(self):
return element_if_equal(self.getDBITPhase())
@dbitphase.setter
def dbitphase(self, value):
self.setDBITPhase(value)
@property
def dbitclk(self):
return element_if_equal(self.getDBITClock())
@dbitclk.setter
def dbitclk(self, value):
self.setDBITClock(value)
@property
def dbitpipeline(self):
return element_if_equal(self.getDBITPipeline())
@dbitpipeline.setter
def dbitpipeline(self, value):
self.setDBITPipeline(value)
@property
def maxdbitphaseshift(self):
return element_if_equal(self.getMaxDBITPhaseShift())
@property
def rx_dbitlist(self):
return element_if_equal(self.getRxDbitList())
@rx_dbitlist.setter
def rx_dbitlist(self, value):
self.setRxDbitList(value)
@property
def rx_dbitoffset(self):
return element_if_equal(self.getRxDbitOffset())
@rx_dbitoffset.setter
def rx_dbitoffset(self, value):
self.setRxDbitOffset(value)

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@ -3,14 +3,17 @@ class Register:
self._detector = detector self._detector = detector
def __getitem__(self, key): def __getitem__(self, key):
return self._detector._api.readRegister(key) return self._detector.readRegister(key)
def __setitem__(self, key, value): def __setitem__(self, key, value):
self._detector._api.writeRegister(key, value) self._detector.writeRegister(key, value)
class Adc_register: class Adc_register:
def __init__(self, detector): def __init__(self, detector):
self._detector = detector self._detector = detector
def __setitem__(self, key, value): def __setitem__(self, key, value):
self._detector._api.writeAdcRegister(key, value) self._detector.writeAdcRegister(key, value)
def __getitem__(self, key):
raise ValueError('Adc registers cannot be read back')

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@ -30,6 +30,9 @@ def element_if_equal(mylist):
return mylist return mylist
def element(func): def element(func):
"""
Wrapper to return either list or element
"""
@functools.wraps(func) @functools.wraps(func)
def wrapper(self, *args, **kwargs): def wrapper(self, *args, **kwargs):
return element_if_equal(func(self, *args, **kwargs)) return element_if_equal(func(self, *args, **kwargs))