mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 18:17:59 +02:00
merge conflict
This commit is contained in:
@ -34,6 +34,10 @@
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#define BASE_FLOW_CONTROL (0x00200) // 0x1806_0200 - 0x1806_02FF
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// https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/f37608230b4721661f29aacc20124555705ee705/flow/flow_ctrl.vhd
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/** Veto processing core */
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#define BASE_VETO_PRCSSNG (0x0300) // 0x1806_0300 - 0x1806_03FF?
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// https://git.psi.ch/sls_detectors_firmware/gotthard_II_mcb/blob/master/code/hdl/veto/veto_ctrl.vhd
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/* UDP datagram generator */
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#define BASE_UDP_RAM (0x01000) // 0x1806_1000 - 0x1806_1FFF
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@ -86,7 +90,9 @@
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#define CONFIG_VETO_ENBL_OFST (0)
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#define CONFIG_VETO_ENBL_MSK (0x00000001 << CONFIG_VETO_ENBL_OFST)
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#define CONFIG_VETO_CH_10GB_ENBL_OFST (1)
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#define CONFIG_VETO_CH_3GB_ENBL_OFST (11)
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#define CONFIG_VETO_CH_3GB_ENBL_MSK (0x00000001 << CONFIG_VETO_CH_3GB_ENBL_OFST)
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#define CONFIG_VETO_CH_10GB_ENBL_OFST (15)
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#define CONFIG_VETO_CH_10GB_ENBL_MSK (0x00000001 << CONFIG_VETO_CH_10GB_ENBL_OFST)
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/* Control RW register */
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@ -110,10 +116,6 @@
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/** DTA Offset Register */
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#define DTA_OFFSET_REG (0x0A * REG_OFFSET + BASE_CONTROL)
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/** Mask Strip Registers (40) */
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#define MASK_STRIP_START_REG (0x18 * REG_OFFSET + BASE_CONTROL)
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#define MASK_STRIP_NUM_REGS (40)
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/* ASIC registers --------------------------------------------------*/
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/* ASIC Config register */
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@ -258,4 +260,10 @@
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#define RXR_ENDPOINTS_MAX (32)
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#define RXR_ENDPOINT_OFST (16 * REG_OFFSET)
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// clang-format on
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/** Veto processing core --------------------------------------------------*/
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/** Mask Strip Registers (40) */
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#define MASK_STRIP_START_REG (0x00 * REG_OFFSET + BASE_VETO_PRCSSNG)
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#define MASK_STRIP_NUM_REGS (40)
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// clang-format on
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@ -989,7 +989,7 @@ int setExpTime(int64_t val) {
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return FAIL;
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}
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LOG(logINFO, ("Setting exptime %lld ns\n", val));
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val *= (1E-9 * systemFrequency);
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val = (val * 1E-9 * systemFrequency) + 0.5;
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set64BitReg(val, ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG);
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// validate for tolerance
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@ -1014,7 +1014,7 @@ int setPeriod(int64_t val) {
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// continuous
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if (burstMode == CONTINUOUS_INTERNAL || burstMode == CONTINUOUS_EXTERNAL) {
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LOG(logINFO, ("Setting period %lld ns [Continuous mode]\n", val));
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val *= (1E-9 * systemFrequency);
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val = (val * 1E-9 * systemFrequency) + 0.5;
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// trigger
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if (getTiming() == TRIGGER_EXPOSURE) {
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LOG(logINFO,
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@ -1029,7 +1029,7 @@ int setPeriod(int64_t val) {
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// burst
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else {
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LOG(logINFO, ("Setting period %lld ns [Burst mode]\n", val));
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val *= (1E-9 * systemFrequency);
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val = (val * 1E-9 * systemFrequency) + 0.5;
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set64BitReg(val, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
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}
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periodReg = val;
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@ -1067,7 +1067,7 @@ int setDelayAfterTrigger(int64_t val) {
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return FAIL;
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}
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LOG(logINFO, ("Setting delay after trigger %lld ns\n", val));
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val *= (1E-9 * systemFrequency);
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val = (val * 1E-9 * systemFrequency) + 0.5;
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delayReg = val;
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if (getTiming() == AUTO_TIMING) {
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LOG(logINFO, ("\tAuto mode (not writing to register)\n"));
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@ -1097,7 +1097,7 @@ int setBurstPeriod(int64_t val) {
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return FAIL;
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}
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LOG(logINFO, ("Setting burst period %lld ns\n", val));
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val *= (1E-9 * systemFrequency);
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val = (val * 1E-9 * systemFrequency) + 0.5;
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burstPeriodReg = val;
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// burst and auto
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@ -1581,14 +1581,14 @@ enum timingMode getTiming() {
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void setNumberofUDPInterfaces(int val) {
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uint32_t addr = CONFIG_REG;
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// 2 interfaces (enable veto)
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// 2 rxr interfaces (enable debugging interface)
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if (val > 1) {
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LOG(logINFOBLUE, ("Setting #Interfaces: 2 (10gbps veto streaming)\n"));
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LOG(logINFOBLUE, ("Enabling 10GbE (debugging) veto streaming\n"));
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bus_w(addr, bus_r(addr) | CONFIG_VETO_CH_10GB_ENBL_MSK);
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}
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// 1 interface (disable veto)
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// 1 rxr interface (disable debugging interface)
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else {
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LOG(logINFOBLUE, ("Setting #Interfaces: 1 (2.5gbps veto streaming)\n"));
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LOG(logINFOBLUE, ("Disabling 10GbE (debugging) veto streaming\n"));
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bus_w(addr, bus_r(addr) & ~CONFIG_VETO_CH_10GB_ENBL_MSK);
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}
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LOG(logDEBUG, ("config reg:0x%x\n", bus_r(addr)));
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@ -2578,6 +2578,23 @@ int getVeto() {
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CONFIG_VETO_ENBL_OFST);
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}
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void setVetoStream(int value) {
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uint32_t addr = CONFIG_REG;
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if (value) {
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LOG(logINFOBLUE, ("Enabling 3GbE veto streaming\n"));
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bus_w(addr, bus_r(addr) | CONFIG_VETO_CH_3GB_ENBL_MSK);
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} else {
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LOG(logINFOBLUE, ("Disabling 3GbE veto streaming\n"));
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bus_w(addr, bus_r(addr) & ~CONFIG_VETO_CH_3GB_ENBL_MSK);
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}
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LOG(logDEBUG, ("config reg:0x%x\n", bus_r(addr)));
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}
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int getVetoStream() {
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return ((bus_r(CONFIG_REG) & CONFIG_VETO_CH_3GB_ENBL_MSK) ? 1 : 0);
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}
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void setBadChannels(int nch, int *channels) {
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LOG(logINFO, ("Setting %d bad channels\n", nch));
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@ -1,7 +1,7 @@
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#pragma once
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#include "sls/sls_detector_defs.h"
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#define REQRD_FRMWRE_VRSN (0x200925)
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#define REQRD_FRMWRE_VRSN (0x210527)
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#define KERNEL_DATE_VRSN "Wed May 20 13:58:38 CEST 2020"
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#define CTRL_SRVR_INIT_TIME_US (300 * 1000)
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@ -1832,6 +1832,8 @@ int stopStateMachine() {
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bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STOP_ACQ_MSK);
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LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG)));
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resetCore();
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return OK;
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}
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@ -530,6 +530,8 @@ void setTimingSource(enum timingSourceType value);
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enum timingSourceType getTimingSource();
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void setVeto(int enable);
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int getVeto();
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void setVetoStream(int value);
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int getVetoStream();
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void setBadChannels(int nch, int *channels);
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int *getBadChannels(int *nch);
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#endif
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@ -249,3 +249,5 @@ int set_gain_caps(int);
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int get_gain_caps(int);
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int get_datastream(int);
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int set_datastream(int);
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int get_veto_stream(int);
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int set_veto_stream(int);
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@ -375,6 +375,8 @@ void function_table() {
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flist[F_GET_GAIN_CAPS] = &get_gain_caps;
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flist[F_GET_DATASTREAM] = &get_datastream;
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flist[F_SET_DATASTREAM] = &set_datastream;
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flist[F_GET_VETO_STREAM] = &get_veto_stream;
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flist[F_SET_VETO_STREAM] = &set_veto_stream;
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// check
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if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) {
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@ -4107,7 +4109,8 @@ int software_trigger(int file_des) {
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#else
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if (arg && myDetectorType == MYTHEN3) {
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ret = FAIL;
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strcpy(mess, "Blocking trigger not implemented for Mythen3. Please use non blocking trigger.\n");
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strcpy(mess, "Blocking trigger not implemented for Mythen3. Please use "
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"non blocking trigger.\n");
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LOG(logERROR, (mess));
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}
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// only set
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@ -7064,7 +7067,7 @@ int get_receiver_parameters(int file_des) {
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#endif
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n += sendData(file_des, &i32, sizeof(i32), INT32);
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if (n < 0)
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return printSocketReadError();
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return printSocketReadError();
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// data stream right
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#ifdef EIGERD
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@ -7075,7 +7078,7 @@ int get_receiver_parameters(int file_des) {
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#endif
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n += sendData(file_des, &i32, sizeof(i32), INT32);
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if (n < 0)
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return printSocketReadError();
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return printSocketReadError();
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// quad
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#ifdef EIGERD
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@ -7508,28 +7511,9 @@ int set_veto(int file_des) {
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// only set
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if (Server_VerifyLock() == OK) {
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setVeto(arg);
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// if numinterfaces is 2 and veto is 1 now, then configuremac
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if (arg > 0 && getNumberofUDPInterfaces() == 2 &&
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is_udp_configured() == OK) {
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ret = configureMAC();
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if (ret != OK) {
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sprintf(mess, "Configure Mac failed after enabling veto\n");
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strcpy(configureMessage, mess);
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LOG(logERROR, (mess));
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configured = FAIL;
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LOG(logWARNING, ("Configure FAIL, not all parameters "
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"configured yet\n"));
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} else {
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LOG(logINFOGREEN, ("\tConfigure MAC successful\n"));
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configured = OK;
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}
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}
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if (ret == OK) {
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int retval = getVeto();
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LOG(logDEBUG1, ("veto mode retval: %u\n", retval));
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validate(&ret, mess, arg, retval, "set veto mode", DEC);
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}
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int retval = getVeto();
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LOG(logDEBUG1, ("veto mode retval: %u\n", retval));
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validate(&ret, mess, arg, retval, "set veto mode", DEC);
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}
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#endif
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return Server_SendResult(file_des, INT32, NULL, 0);
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@ -8229,13 +8213,8 @@ int set_gain_caps(int file_des) {
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int get_gain_caps(int file_des) {
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ret = OK;
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memset(mess, 0, sizeof(mess));
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// int arg = 0;
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// if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
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// return printSocketReadError();
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LOG(logINFO, ("Getting gain caps\n"));
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int retval = -1;
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LOG(logINFO, ("Getting gain caps\n"));
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#ifndef MYTHEN3D
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functionNotImplemented();
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@ -8264,15 +8243,15 @@ int get_datastream(int file_des) {
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// get only
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if (arg != LEFT && arg != RIGHT) {
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ret = FAIL;
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sprintf(
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mess,
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"Could not get data stream enable. Invalid port position %d. Only left and right allowed\n",
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arg);
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sprintf(mess,
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"Could not get data stream enable. Invalid port position %d. "
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"Only left and right allowed\n",
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arg);
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LOG(logERROR, (mess));
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} else {
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ret = getDataStream(arg, &retval);
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LOG(logDEBUG1, ("datastream (%s) retval: %u\n",
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(arg == LEFT? "left" : "right"), retval));
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(arg == LEFT ? "left" : "right"), retval));
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if (ret == FAIL) {
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sprintf(mess, "Could not get %s data stream enable.\n",
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(arg == LEFT ? "left" : "right"));
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@ -8307,7 +8286,8 @@ int set_datastream(int file_des) {
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if (port != LEFT && port != RIGHT) {
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ret = FAIL;
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sprintf(mess,
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"Could not %s. Invalid port position %d. Only left and right allowed\n",
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"Could not %s. Invalid port position %d. Only left and "
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"right allowed\n",
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msg, port);
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LOG(logERROR, (mess));
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} else if (enable != 0 && enable != 1) {
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@ -8334,4 +8314,53 @@ int set_datastream(int file_des) {
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}
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#endif
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return Server_SendResult(file_des, INT32, NULL, 0);
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}
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int get_veto_stream(int file_des) {
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ret = OK;
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memset(mess, 0, sizeof(mess));
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enum EthernetInterface retval = NONE;
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LOG(logDEBUG1, ("Getting veto stream\n"));
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#ifndef GOTTHARD2D
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functionNotImplemented();
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#else
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// get only
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retval = getVetoStream();
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LOG(logDEBUG1, ("vetostream retval: %u\n", retval));
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#endif
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return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
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}
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int set_veto_stream(int file_des) {
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ret = OK;
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memset(mess, 0, sizeof(mess));
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enum EthernetInterface arg = 0;
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if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
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return printSocketReadError();
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LOG(logINFO, ("Setting vetostream: %u\n", (int)arg));
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#ifndef GOTTHARD2D
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functionNotImplemented();
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#else
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// only set
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if (Server_VerifyLock() == OK) {
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if (arg != 0 && arg != 1) {
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ret = FAIL;
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sprintf(mess,
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"Could not set vetostream 3GbE. Invalid argument %d.\n",
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arg);
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LOG(logERROR, (mess));
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} else {
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setVetoStream(arg);
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int retval = getVetoStream();
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LOG(logDEBUG1, ("vetostream retval: %u\n", retval));
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validate(&ret, mess, arg, retval, "set veto stream", DEC);
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}
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}
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#endif
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return Server_SendResult(file_des, INT32, NULL, 0);
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}
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