merge conflict

This commit is contained in:
2021-07-22 11:15:57 +02:00
28 changed files with 655 additions and 116 deletions

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@ -34,6 +34,10 @@
#define BASE_FLOW_CONTROL (0x00200) // 0x1806_0200 - 0x1806_02FF
// https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/f37608230b4721661f29aacc20124555705ee705/flow/flow_ctrl.vhd
/** Veto processing core */
#define BASE_VETO_PRCSSNG (0x0300) // 0x1806_0300 - 0x1806_03FF?
// https://git.psi.ch/sls_detectors_firmware/gotthard_II_mcb/blob/master/code/hdl/veto/veto_ctrl.vhd
/* UDP datagram generator */
#define BASE_UDP_RAM (0x01000) // 0x1806_1000 - 0x1806_1FFF
@ -86,7 +90,9 @@
#define CONFIG_VETO_ENBL_OFST (0)
#define CONFIG_VETO_ENBL_MSK (0x00000001 << CONFIG_VETO_ENBL_OFST)
#define CONFIG_VETO_CH_10GB_ENBL_OFST (1)
#define CONFIG_VETO_CH_3GB_ENBL_OFST (11)
#define CONFIG_VETO_CH_3GB_ENBL_MSK (0x00000001 << CONFIG_VETO_CH_3GB_ENBL_OFST)
#define CONFIG_VETO_CH_10GB_ENBL_OFST (15)
#define CONFIG_VETO_CH_10GB_ENBL_MSK (0x00000001 << CONFIG_VETO_CH_10GB_ENBL_OFST)
/* Control RW register */
@ -110,10 +116,6 @@
/** DTA Offset Register */
#define DTA_OFFSET_REG (0x0A * REG_OFFSET + BASE_CONTROL)
/** Mask Strip Registers (40) */
#define MASK_STRIP_START_REG (0x18 * REG_OFFSET + BASE_CONTROL)
#define MASK_STRIP_NUM_REGS (40)
/* ASIC registers --------------------------------------------------*/
/* ASIC Config register */
@ -258,4 +260,10 @@
#define RXR_ENDPOINTS_MAX (32)
#define RXR_ENDPOINT_OFST (16 * REG_OFFSET)
// clang-format on
/** Veto processing core --------------------------------------------------*/
/** Mask Strip Registers (40) */
#define MASK_STRIP_START_REG (0x00 * REG_OFFSET + BASE_VETO_PRCSSNG)
#define MASK_STRIP_NUM_REGS (40)
// clang-format on

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@ -989,7 +989,7 @@ int setExpTime(int64_t val) {
return FAIL;
}
LOG(logINFO, ("Setting exptime %lld ns\n", val));
val *= (1E-9 * systemFrequency);
val = (val * 1E-9 * systemFrequency) + 0.5;
set64BitReg(val, ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG);
// validate for tolerance
@ -1014,7 +1014,7 @@ int setPeriod(int64_t val) {
// continuous
if (burstMode == CONTINUOUS_INTERNAL || burstMode == CONTINUOUS_EXTERNAL) {
LOG(logINFO, ("Setting period %lld ns [Continuous mode]\n", val));
val *= (1E-9 * systemFrequency);
val = (val * 1E-9 * systemFrequency) + 0.5;
// trigger
if (getTiming() == TRIGGER_EXPOSURE) {
LOG(logINFO,
@ -1029,7 +1029,7 @@ int setPeriod(int64_t val) {
// burst
else {
LOG(logINFO, ("Setting period %lld ns [Burst mode]\n", val));
val *= (1E-9 * systemFrequency);
val = (val * 1E-9 * systemFrequency) + 0.5;
set64BitReg(val, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
}
periodReg = val;
@ -1067,7 +1067,7 @@ int setDelayAfterTrigger(int64_t val) {
return FAIL;
}
LOG(logINFO, ("Setting delay after trigger %lld ns\n", val));
val *= (1E-9 * systemFrequency);
val = (val * 1E-9 * systemFrequency) + 0.5;
delayReg = val;
if (getTiming() == AUTO_TIMING) {
LOG(logINFO, ("\tAuto mode (not writing to register)\n"));
@ -1097,7 +1097,7 @@ int setBurstPeriod(int64_t val) {
return FAIL;
}
LOG(logINFO, ("Setting burst period %lld ns\n", val));
val *= (1E-9 * systemFrequency);
val = (val * 1E-9 * systemFrequency) + 0.5;
burstPeriodReg = val;
// burst and auto
@ -1581,14 +1581,14 @@ enum timingMode getTiming() {
void setNumberofUDPInterfaces(int val) {
uint32_t addr = CONFIG_REG;
// 2 interfaces (enable veto)
// 2 rxr interfaces (enable debugging interface)
if (val > 1) {
LOG(logINFOBLUE, ("Setting #Interfaces: 2 (10gbps veto streaming)\n"));
LOG(logINFOBLUE, ("Enabling 10GbE (debugging) veto streaming\n"));
bus_w(addr, bus_r(addr) | CONFIG_VETO_CH_10GB_ENBL_MSK);
}
// 1 interface (disable veto)
// 1 rxr interface (disable debugging interface)
else {
LOG(logINFOBLUE, ("Setting #Interfaces: 1 (2.5gbps veto streaming)\n"));
LOG(logINFOBLUE, ("Disabling 10GbE (debugging) veto streaming\n"));
bus_w(addr, bus_r(addr) & ~CONFIG_VETO_CH_10GB_ENBL_MSK);
}
LOG(logDEBUG, ("config reg:0x%x\n", bus_r(addr)));
@ -2578,6 +2578,23 @@ int getVeto() {
CONFIG_VETO_ENBL_OFST);
}
void setVetoStream(int value) {
uint32_t addr = CONFIG_REG;
if (value) {
LOG(logINFOBLUE, ("Enabling 3GbE veto streaming\n"));
bus_w(addr, bus_r(addr) | CONFIG_VETO_CH_3GB_ENBL_MSK);
} else {
LOG(logINFOBLUE, ("Disabling 3GbE veto streaming\n"));
bus_w(addr, bus_r(addr) & ~CONFIG_VETO_CH_3GB_ENBL_MSK);
}
LOG(logDEBUG, ("config reg:0x%x\n", bus_r(addr)));
}
int getVetoStream() {
return ((bus_r(CONFIG_REG) & CONFIG_VETO_CH_3GB_ENBL_MSK) ? 1 : 0);
}
void setBadChannels(int nch, int *channels) {
LOG(logINFO, ("Setting %d bad channels\n", nch));

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@ -1,7 +1,7 @@
#pragma once
#include "sls/sls_detector_defs.h"
#define REQRD_FRMWRE_VRSN (0x200925)
#define REQRD_FRMWRE_VRSN (0x210527)
#define KERNEL_DATE_VRSN "Wed May 20 13:58:38 CEST 2020"
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)

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@ -1832,6 +1832,8 @@ int stopStateMachine() {
bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STOP_ACQ_MSK);
LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG)));
resetCore();
return OK;
}

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@ -530,6 +530,8 @@ void setTimingSource(enum timingSourceType value);
enum timingSourceType getTimingSource();
void setVeto(int enable);
int getVeto();
void setVetoStream(int value);
int getVetoStream();
void setBadChannels(int nch, int *channels);
int *getBadChannels(int *nch);
#endif

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@ -249,3 +249,5 @@ int set_gain_caps(int);
int get_gain_caps(int);
int get_datastream(int);
int set_datastream(int);
int get_veto_stream(int);
int set_veto_stream(int);

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@ -375,6 +375,8 @@ void function_table() {
flist[F_GET_GAIN_CAPS] = &get_gain_caps;
flist[F_GET_DATASTREAM] = &get_datastream;
flist[F_SET_DATASTREAM] = &set_datastream;
flist[F_GET_VETO_STREAM] = &get_veto_stream;
flist[F_SET_VETO_STREAM] = &set_veto_stream;
// check
if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) {
@ -4107,7 +4109,8 @@ int software_trigger(int file_des) {
#else
if (arg && myDetectorType == MYTHEN3) {
ret = FAIL;
strcpy(mess, "Blocking trigger not implemented for Mythen3. Please use non blocking trigger.\n");
strcpy(mess, "Blocking trigger not implemented for Mythen3. Please use "
"non blocking trigger.\n");
LOG(logERROR, (mess));
}
// only set
@ -7064,7 +7067,7 @@ int get_receiver_parameters(int file_des) {
#endif
n += sendData(file_des, &i32, sizeof(i32), INT32);
if (n < 0)
return printSocketReadError();
return printSocketReadError();
// data stream right
#ifdef EIGERD
@ -7075,7 +7078,7 @@ int get_receiver_parameters(int file_des) {
#endif
n += sendData(file_des, &i32, sizeof(i32), INT32);
if (n < 0)
return printSocketReadError();
return printSocketReadError();
// quad
#ifdef EIGERD
@ -7508,28 +7511,9 @@ int set_veto(int file_des) {
// only set
if (Server_VerifyLock() == OK) {
setVeto(arg);
// if numinterfaces is 2 and veto is 1 now, then configuremac
if (arg > 0 && getNumberofUDPInterfaces() == 2 &&
is_udp_configured() == OK) {
ret = configureMAC();
if (ret != OK) {
sprintf(mess, "Configure Mac failed after enabling veto\n");
strcpy(configureMessage, mess);
LOG(logERROR, (mess));
configured = FAIL;
LOG(logWARNING, ("Configure FAIL, not all parameters "
"configured yet\n"));
} else {
LOG(logINFOGREEN, ("\tConfigure MAC successful\n"));
configured = OK;
}
}
if (ret == OK) {
int retval = getVeto();
LOG(logDEBUG1, ("veto mode retval: %u\n", retval));
validate(&ret, mess, arg, retval, "set veto mode", DEC);
}
int retval = getVeto();
LOG(logDEBUG1, ("veto mode retval: %u\n", retval));
validate(&ret, mess, arg, retval, "set veto mode", DEC);
}
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
@ -8229,13 +8213,8 @@ int set_gain_caps(int file_des) {
int get_gain_caps(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
// int arg = 0;
// if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
// return printSocketReadError();
LOG(logINFO, ("Getting gain caps\n"));
int retval = -1;
LOG(logINFO, ("Getting gain caps\n"));
#ifndef MYTHEN3D
functionNotImplemented();
@ -8264,15 +8243,15 @@ int get_datastream(int file_des) {
// get only
if (arg != LEFT && arg != RIGHT) {
ret = FAIL;
sprintf(
mess,
"Could not get data stream enable. Invalid port position %d. Only left and right allowed\n",
arg);
sprintf(mess,
"Could not get data stream enable. Invalid port position %d. "
"Only left and right allowed\n",
arg);
LOG(logERROR, (mess));
} else {
ret = getDataStream(arg, &retval);
LOG(logDEBUG1, ("datastream (%s) retval: %u\n",
(arg == LEFT? "left" : "right"), retval));
(arg == LEFT ? "left" : "right"), retval));
if (ret == FAIL) {
sprintf(mess, "Could not get %s data stream enable.\n",
(arg == LEFT ? "left" : "right"));
@ -8307,7 +8286,8 @@ int set_datastream(int file_des) {
if (port != LEFT && port != RIGHT) {
ret = FAIL;
sprintf(mess,
"Could not %s. Invalid port position %d. Only left and right allowed\n",
"Could not %s. Invalid port position %d. Only left and "
"right allowed\n",
msg, port);
LOG(logERROR, (mess));
} else if (enable != 0 && enable != 1) {
@ -8334,4 +8314,53 @@ int set_datastream(int file_des) {
}
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
}
int get_veto_stream(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
enum EthernetInterface retval = NONE;
LOG(logDEBUG1, ("Getting veto stream\n"));
#ifndef GOTTHARD2D
functionNotImplemented();
#else
// get only
retval = getVetoStream();
LOG(logDEBUG1, ("vetostream retval: %u\n", retval));
#endif
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
}
int set_veto_stream(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
enum EthernetInterface arg = 0;
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
return printSocketReadError();
LOG(logINFO, ("Setting vetostream: %u\n", (int)arg));
#ifndef GOTTHARD2D
functionNotImplemented();
#else
// only set
if (Server_VerifyLock() == OK) {
if (arg != 0 && arg != 1) {
ret = FAIL;
sprintf(mess,
"Could not set vetostream 3GbE. Invalid argument %d.\n",
arg);
LOG(logERROR, (mess));
} else {
setVetoStream(arg);
int retval = getVetoStream();
LOG(logDEBUG1, ("vetostream retval: %u\n", retval));
validate(&ret, mess, arg, retval, "set veto stream", DEC);
}
}
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
}