mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-24 02:27:59 +02:00
gotthard2: on chip dacs
This commit is contained in:
@ -9,6 +9,7 @@ add_executable(gotthard2DetectorServer_virtual
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../slsDetectorServer/src/common.c
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../slsDetectorServer/src/LTC2620_Driver.c
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../slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c
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../slsDetectorServer/src/ASIC_Driver.c
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)
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include_directories(
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@ -12,7 +12,7 @@ DESTDIR ?= bin
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INSTMODE = 0777
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SRCS = slsDetectorFunctionList.c
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SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)nios.c $(main_src)common.c $(main_src)DAC6571.c $(main_src)LTC2620_Driver.c $(main_src)ALTERA_PLL_CYCLONE10.c
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SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)nios.c $(main_src)common.c $(main_src)DAC6571.c $(main_src)LTC2620_Driver.c $(main_src)ALTERA_PLL_CYCLONE10.c $(main_src)ASIC_Driver.c
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OBJS = $(SRCS:.c=.o)
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Binary file not shown.
@ -7,6 +7,7 @@
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#include "LTC2620_Driver.h"
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#include "common.h"
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#include "ALTERA_PLL_CYCLONE10.h"
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#include "ASIC_Driver.h"
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#ifdef VIRTUAL
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#include "communication_funcs_UDP.h"
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#endif
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@ -37,6 +38,7 @@ int32_t clkPhase[NUM_CLOCKS] = {0, 0, 0, 0, 0, 0};
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uint32_t clkFrequency[NUM_CLOCKS] = {0, 0, 0, 0, 0, 0};
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int highvoltage = 0;
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int dacValues[NDAC] = {0};
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int onChipdacValues[ONCHIP_NDAC][NCHIP + 1] = {0};
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int detPos[2] = {0, 0};
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int isFirmwareCheckDone() {
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@ -337,13 +339,17 @@ void setupDetector() {
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highvoltage = 0;
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{
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int i;
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int i, j;
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for (i = 0; i < NUM_CLOCKS; ++i) {
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clkPhase[i] = 0;
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}
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for (i = 0; i < NDAC; ++i) {
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dacValues[i] = 0;
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}
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for (i = 0; i < ONCHIP_NDAC; ++i) {
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for (j = 0; j < NCHIP + 1; ++j)
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onChipdacValues[i][j] = -1;
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}
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}
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@ -356,12 +362,15 @@ void setupDetector() {
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DAC6571_SetDefines(HV_HARD_MAX_VOLTAGE, HV_DRIVER_FILE_NAME);
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// dacs
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LTC2620_D_SetDefines(DAC_MAX_MV, DAC_DRIVER_FILE_NAME, NDAC);
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// on chip dacs
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ASIC_Driver_SetDefines(ONCHIP_DAC_DRIVER_FILE_NAME);
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#endif
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// Default values
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setHighVoltage(DEFAULT_HIGH_VOLTAGE);
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setDefaultDacs();
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setDefaultOnChipDacs();
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// Initialization of acquistion parameters
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setNumFrames(DEFAULT_NUM_FRAMES);
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setNumTriggers(DEFAULT_NUM_CYCLES);
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@ -382,6 +391,20 @@ int setDefaultDacs() {
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return ret;
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}
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int setDefaultOnChipDacs() {
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int ret = OK;
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FILE_LOG(logINFOBLUE, ("Setting Default On chip Dac values\n"));
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{
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int i = 0;
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const int defaultOnChipVals[ONCHIP_NDAC] = DEFAULT_ONCHIP_DAC_VALS;
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for(i = 0; i < ONCHIP_NDAC; ++i) {
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setOnChipDAC((enum ONCHIP_DACINDEX)i, -1, defaultOnChipVals[i]);
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}
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}
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return ret;
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}
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/* set parameters - dr, roi */
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int setDynamicRange(int dr){
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@ -467,6 +490,38 @@ int64_t getNumTriggersLeft() {
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/* parameters - dac, hv */
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int setOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex, int val) {
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char* names[] = {ONCHIP_DAC_NAMES};
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FILE_LOG(logDEBUG1, ("Setting on chip dac[%d - %s]: 0x%x\n", (int)ind, names[ind], val));
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if (ind >= ONCHIP_NDAC) {
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FILE_LOG(logERROR, ("Invalid dac index %d\n", (int)ind));
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return FAIL;
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}
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if (chipIndex >= NCHIP) {
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FILE_LOG(logERROR, ("Invalid chip index %d\n", chipIndex));
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return FAIL;
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}
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if (val > ONCHIP_DAC_MAX_VAL) {
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FILE_LOG(logERROR, ("Invalid val %d\n", val));
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return FAIL;
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}
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char buffer[2];
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buffer[1] = ((val & 0xF) << 4) | (((int)ind) & 0xF); // LSB (4 bits) + ADDR (4 bits)
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buffer[0] = (val >> 4) & 0x3F; // MSB (6 bits)
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if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) {
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return FAIL;
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}
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onChipdacValues[ind][chipIndex + 1] = val;
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return OK;
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}
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int getOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex) {
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return onChipdacValues[ind][chipIndex + 1];
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}
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void setDAC(enum DACINDEX ind, int val, int mV) {
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if (val < 0) {
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return;
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@ -9,12 +9,15 @@
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#define NCHAN (128)
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#define NCHIP (10)
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#define NDAC (16)
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#define ONCHIP_NDAC (6)
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#define DYNAMIC_RANGE (16)
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#define HV_SOFT_MAX_VOLTAGE (200)
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#define HV_HARD_MAX_VOLTAGE (530)
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#define HV_DRIVER_FILE_NAME ("/etc/devlinks/hvdac")
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#define DAC_DRIVER_FILE_NAME ("/etc/devlinks/dac")
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#define ONCHIP_DAC_DRIVER_FILE_NAME ("/etc/devlinks/chipdac")
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#define DAC_MAX_MV (2048)
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#define ONCHIP_DAC_MAX_VAL (0x3FF)
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/** Default Parameters */
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#define DEFAULT_NUM_FRAMES (1)
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@ -37,7 +40,6 @@
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/** Other Definitions */
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#define BIT16_MASK (0xFFFF)
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#define DAC_NAMES "vref_h_adc", "dac_unused", "vb_comp_fe", "vb_comp_adc", "vcom_cds", "vref_restore", "vb_opa_1st", "vref_comp_fe", "vcom_adc1", "vref_prech", "vref_l_adc", "vref_cds", "vb_cs", "vb_opa_fd", "dac_unused2", "vcom_adc2"
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/* Enums */
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enum DACINDEX {G2_VREF_H_ADC, /* 0 */ \
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@ -57,6 +59,7 @@ enum DACINDEX {G2_VREF_H_ADC, /* 0 */ \
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G2_DAC_UNUSED2, /* 14 */ \
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G2_VCOM_ADC2 /* 15*/ \
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};
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#define DAC_NAMES "vref_h_adc", "dac_unused", "vb_comp_fe", "vb_comp_adc", "vcom_cds", "vref_restore", "vb_opa_1st", "vref_comp_fe", "vcom_adc1", "vref_prech", "vref_l_adc", "vref_cds", "vb_cs", "vb_opa_fd", "dac_unused2", "vcom_adc2"
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#define DEFAULT_DAC_VALS {2099, /* 0 (1050 mV) VREF_H_ADC*/ \
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0, /* 1 (0 mV) DAC_UNUSED*/ \
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0, /* 2 (0 mV) VB_COMP_FE*/ \
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@ -74,8 +77,27 @@ enum DACINDEX {G2_VREF_H_ADC, /* 0 */ \
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0, /* 14 (0 mV) DAC_UNUSED2*/ \
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1400 /* 15 (700 mV) VCOM_ADC2*/ \
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};
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enum ONCHIP_DACINDEX {G2_VCHIP_COMP_FE, /* 0 */ \
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G2_VCHIP_OPA_1ST, /* 1 */ \
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G2_VCHIP_OPA_FD, /* 2 */ \
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G2_VCHIP_COMP_ADC, /* 3 */ \
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G2_VCHIP_REF_COMP_FE, /* 4 */ \
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G2_VCHIP_CS /* 5 */ \
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};
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#define ONCHIP_DAC_NAMES "vchip_comp_fe", "vchip_opa_1st", "vchip_opa_fd", "vchip_comp_adc", "vchip_ref_comp_fe", "vchip_cs"
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#define DEFAULT_ONCHIP_DAC_VALS {0x137, /* 0 G2_VCHIP_COMP_FE*/ \
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0x000, /* 1 G2_VCHIP_OPA_1ST*/ \
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0x134, /* 2 G2_VCHIP_OPA_FD*/ \
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0x3FF, /* 3 G2_VCHIP_COMP_ADC*/ \
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0x100, /* 4 G2_VCHIP_REF_COMP_FE*/ \
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0x0D0 /* 5 G2_VCHIP_CS*/ \
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};
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enum CLKINDEX {READOUT_C0, READOUT_C1, SYSTEM_C0, SYSTEM_C1, SYSTEM_C2, SYSTEM_C3, NUM_CLOCKS};
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#define CLK_NAMES "READOUT_C0", "READOUT_C1", "SYSTEM_C0", "SYSTEM_C1", "SYSTEM_C2", "SYSTEM_C3"
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enum PLLINDEX {READOUT_PLL, SYSTEM_PLL};
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/* Struct Definitions */
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