gotthard2: on chip dacs

This commit is contained in:
2019-11-08 17:09:57 +01:00
parent a92d931a8f
commit d7e2ab8ec4
18 changed files with 431 additions and 11 deletions

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@ -9,6 +9,7 @@ add_executable(gotthard2DetectorServer_virtual
../slsDetectorServer/src/common.c
../slsDetectorServer/src/LTC2620_Driver.c
../slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c
../slsDetectorServer/src/ASIC_Driver.c
)
include_directories(

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@ -12,7 +12,7 @@ DESTDIR ?= bin
INSTMODE = 0777
SRCS = slsDetectorFunctionList.c
SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)nios.c $(main_src)common.c $(main_src)DAC6571.c $(main_src)LTC2620_Driver.c $(main_src)ALTERA_PLL_CYCLONE10.c
SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)nios.c $(main_src)common.c $(main_src)DAC6571.c $(main_src)LTC2620_Driver.c $(main_src)ALTERA_PLL_CYCLONE10.c $(main_src)ASIC_Driver.c
OBJS = $(SRCS:.c=.o)

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@ -7,6 +7,7 @@
#include "LTC2620_Driver.h"
#include "common.h"
#include "ALTERA_PLL_CYCLONE10.h"
#include "ASIC_Driver.h"
#ifdef VIRTUAL
#include "communication_funcs_UDP.h"
#endif
@ -37,6 +38,7 @@ int32_t clkPhase[NUM_CLOCKS] = {0, 0, 0, 0, 0, 0};
uint32_t clkFrequency[NUM_CLOCKS] = {0, 0, 0, 0, 0, 0};
int highvoltage = 0;
int dacValues[NDAC] = {0};
int onChipdacValues[ONCHIP_NDAC][NCHIP + 1] = {0};
int detPos[2] = {0, 0};
int isFirmwareCheckDone() {
@ -337,13 +339,17 @@ void setupDetector() {
highvoltage = 0;
{
int i;
int i, j;
for (i = 0; i < NUM_CLOCKS; ++i) {
clkPhase[i] = 0;
}
for (i = 0; i < NDAC; ++i) {
dacValues[i] = 0;
}
for (i = 0; i < ONCHIP_NDAC; ++i) {
for (j = 0; j < NCHIP + 1; ++j)
onChipdacValues[i][j] = -1;
}
}
@ -356,12 +362,15 @@ void setupDetector() {
DAC6571_SetDefines(HV_HARD_MAX_VOLTAGE, HV_DRIVER_FILE_NAME);
// dacs
LTC2620_D_SetDefines(DAC_MAX_MV, DAC_DRIVER_FILE_NAME, NDAC);
// on chip dacs
ASIC_Driver_SetDefines(ONCHIP_DAC_DRIVER_FILE_NAME);
#endif
// Default values
setHighVoltage(DEFAULT_HIGH_VOLTAGE);
setDefaultDacs();
setDefaultOnChipDacs();
// Initialization of acquistion parameters
setNumFrames(DEFAULT_NUM_FRAMES);
setNumTriggers(DEFAULT_NUM_CYCLES);
@ -382,6 +391,20 @@ int setDefaultDacs() {
return ret;
}
int setDefaultOnChipDacs() {
int ret = OK;
FILE_LOG(logINFOBLUE, ("Setting Default On chip Dac values\n"));
{
int i = 0;
const int defaultOnChipVals[ONCHIP_NDAC] = DEFAULT_ONCHIP_DAC_VALS;
for(i = 0; i < ONCHIP_NDAC; ++i) {
setOnChipDAC((enum ONCHIP_DACINDEX)i, -1, defaultOnChipVals[i]);
}
}
return ret;
}
/* set parameters - dr, roi */
int setDynamicRange(int dr){
@ -467,6 +490,38 @@ int64_t getNumTriggersLeft() {
/* parameters - dac, hv */
int setOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex, int val) {
char* names[] = {ONCHIP_DAC_NAMES};
FILE_LOG(logDEBUG1, ("Setting on chip dac[%d - %s]: 0x%x\n", (int)ind, names[ind], val));
if (ind >= ONCHIP_NDAC) {
FILE_LOG(logERROR, ("Invalid dac index %d\n", (int)ind));
return FAIL;
}
if (chipIndex >= NCHIP) {
FILE_LOG(logERROR, ("Invalid chip index %d\n", chipIndex));
return FAIL;
}
if (val > ONCHIP_DAC_MAX_VAL) {
FILE_LOG(logERROR, ("Invalid val %d\n", val));
return FAIL;
}
char buffer[2];
buffer[1] = ((val & 0xF) << 4) | (((int)ind) & 0xF); // LSB (4 bits) + ADDR (4 bits)
buffer[0] = (val >> 4) & 0x3F; // MSB (6 bits)
if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) {
return FAIL;
}
onChipdacValues[ind][chipIndex + 1] = val;
return OK;
}
int getOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex) {
return onChipdacValues[ind][chipIndex + 1];
}
void setDAC(enum DACINDEX ind, int val, int mV) {
if (val < 0) {
return;

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@ -9,12 +9,15 @@
#define NCHAN (128)
#define NCHIP (10)
#define NDAC (16)
#define ONCHIP_NDAC (6)
#define DYNAMIC_RANGE (16)
#define HV_SOFT_MAX_VOLTAGE (200)
#define HV_HARD_MAX_VOLTAGE (530)
#define HV_DRIVER_FILE_NAME ("/etc/devlinks/hvdac")
#define DAC_DRIVER_FILE_NAME ("/etc/devlinks/dac")
#define ONCHIP_DAC_DRIVER_FILE_NAME ("/etc/devlinks/chipdac")
#define DAC_MAX_MV (2048)
#define ONCHIP_DAC_MAX_VAL (0x3FF)
/** Default Parameters */
#define DEFAULT_NUM_FRAMES (1)
@ -37,7 +40,6 @@
/** Other Definitions */
#define BIT16_MASK (0xFFFF)
#define DAC_NAMES "vref_h_adc", "dac_unused", "vb_comp_fe", "vb_comp_adc", "vcom_cds", "vref_restore", "vb_opa_1st", "vref_comp_fe", "vcom_adc1", "vref_prech", "vref_l_adc", "vref_cds", "vb_cs", "vb_opa_fd", "dac_unused2", "vcom_adc2"
/* Enums */
enum DACINDEX {G2_VREF_H_ADC, /* 0 */ \
@ -57,6 +59,7 @@ enum DACINDEX {G2_VREF_H_ADC, /* 0 */ \
G2_DAC_UNUSED2, /* 14 */ \
G2_VCOM_ADC2 /* 15*/ \
};
#define DAC_NAMES "vref_h_adc", "dac_unused", "vb_comp_fe", "vb_comp_adc", "vcom_cds", "vref_restore", "vb_opa_1st", "vref_comp_fe", "vcom_adc1", "vref_prech", "vref_l_adc", "vref_cds", "vb_cs", "vb_opa_fd", "dac_unused2", "vcom_adc2"
#define DEFAULT_DAC_VALS {2099, /* 0 (1050 mV) VREF_H_ADC*/ \
0, /* 1 (0 mV) DAC_UNUSED*/ \
0, /* 2 (0 mV) VB_COMP_FE*/ \
@ -74,8 +77,27 @@ enum DACINDEX {G2_VREF_H_ADC, /* 0 */ \
0, /* 14 (0 mV) DAC_UNUSED2*/ \
1400 /* 15 (700 mV) VCOM_ADC2*/ \
};
enum ONCHIP_DACINDEX {G2_VCHIP_COMP_FE, /* 0 */ \
G2_VCHIP_OPA_1ST, /* 1 */ \
G2_VCHIP_OPA_FD, /* 2 */ \
G2_VCHIP_COMP_ADC, /* 3 */ \
G2_VCHIP_REF_COMP_FE, /* 4 */ \
G2_VCHIP_CS /* 5 */ \
};
#define ONCHIP_DAC_NAMES "vchip_comp_fe", "vchip_opa_1st", "vchip_opa_fd", "vchip_comp_adc", "vchip_ref_comp_fe", "vchip_cs"
#define DEFAULT_ONCHIP_DAC_VALS {0x137, /* 0 G2_VCHIP_COMP_FE*/ \
0x000, /* 1 G2_VCHIP_OPA_1ST*/ \
0x134, /* 2 G2_VCHIP_OPA_FD*/ \
0x3FF, /* 3 G2_VCHIP_COMP_ADC*/ \
0x100, /* 4 G2_VCHIP_REF_COMP_FE*/ \
0x0D0 /* 5 G2_VCHIP_CS*/ \
};
enum CLKINDEX {READOUT_C0, READOUT_C1, SYSTEM_C0, SYSTEM_C1, SYSTEM_C2, SYSTEM_C3, NUM_CLOCKS};
#define CLK_NAMES "READOUT_C0", "READOUT_C1", "SYSTEM_C0", "SYSTEM_C1", "SYSTEM_C2", "SYSTEM_C3"
enum PLLINDEX {READOUT_PLL, SYSTEM_PLL};
/* Struct Definitions */