detectors/slsDetectorPackage
25
0
Fork 0
mirror of https://github.com/slsdetectorgroup/slsDetectorPackage.git synced 2025-06-23 10:07:59 +02:00
Code Issues Actions Packages Releases Activity

external signals

Browse Source
This commit is contained in:
maliakal_d
2020-05-20 17:05:42 +02:00
parent 9475e01062
commit d71e40729a
18 changed files with 370 additions and 113 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c
View File

@ -424,7 +424,7 @@ void setupDetector() {
LOG(logINFOBLUE, ("Setting Default parameters\n"));
setSettings(DEFAULT_SETTINGS);
setExtSignal(DEFAULT_TRIGGER_MODE);
setExtSignal(0, DEFAULT_TRIGGER_MODE);
setTiming(DEFAULT_TIMING_MODE);
setNumFrames(DEFAULT_NUM_FRAMES);
setNumTriggers(DEFAULT_NUM_CYCLES);
@ -1259,7 +1259,8 @@ enum timingMode getTiming() {
}
}
void setExtSignal(enum externalSignalFlag mode) {
void setExtSignal(int signalIndex, enum externalSignalFlag mode) {
LOG(logDEBUG1, ("Setting signal flag[%d] to %d\n", signalIndex, mode));
switch (mode) {
case TRIGGER_IN_RISING_EDGE:
LOG(logINFO,
@ -1278,7 +1279,10 @@ void setExtSignal(enum externalSignalFlag mode) {
setTiming(getTiming());
}
int getExtSignal() { return signalMode; }
int getExtSignal(int signalIndex) {
LOG(logDEBUG1, ("Getting signal flag[%d]\n", signalIndex));
return signalMode;
}
/* configure mac */

1
slsDetectorServers/gotthardDetectorServer/slsDetectorServer_defs.h
View File

@ -42,6 +42,7 @@ enum CLKINDEX { ADC_CLK, NUM_CLOCKS };
#define NUM_BITS_PER_PIXEL (DYNAMIC_RANGE / 8)
#define DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL)
#define CLK_FREQ (32007729) /* Hz */
#define MAX_EXT_SIGNALS (1)
/** Firmware Definitions */
#define IP_PACKET_SIZE_NO_ROI \

63
slsDetectorServers/mythen3DetectorServer/RegisterDefs.h
View File

@ -21,7 +21,7 @@
/* ASIC Digital Interface. Data recovery core */
#define BASE_ADIF (0x0110) // 0x1806_0110 - 0x1806_011F
// https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/2e81ccbdbc5cb81813ba190fbdba43e8d6884eb9/adif/adif_ctrl.vhd
// https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/xxx/adif/adif_ctrl.vhd
/* Formatting of data core */
#define BASE_FMT (0x0120) // 0x1806_0120 - 0x1806_012F
@ -30,12 +30,16 @@
#define BASE_PKT (0x0130) // 0x1806_0130 - 0x1806_013F
// https://git.psi.ch/sls_detectors_firmware/mythen_III_mcb/blob/master/code/hdl/pkt/pkt_ctrl.vhd
/** Pipeline (Timing Rec) */
#define BASE_PIPELINE (0x0140) // 0x1806_0140 - 0x1806_014F
// https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/xxx/MythenIIITriggerBoard/timingReceier.vhd
/* ASIC Exposure Control */
#define BASE_ASIC_EXP (0x0180) // 0x1806_0180 - 0x1806_01BF
/* Pattern control and status */
#define BASE_PATTERN_CONTROL (0x00200) // 0x1806_0200 - 0x1806_02FF
// https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/2e81ccbdbc5cb81813ba190fbdba43e8d6884eb9/pattern_flow/pattern_flow_ctrl.vhd
// https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/xxx/pattern_flow/pattern_flow_ctrl.vhd
/* Flow control and status */
#define BASE_FLOW_CONTROL (0x00400) // 0x1806_0400 - 0x1806_04FF
@ -161,6 +165,61 @@
#define COORD_ID_OFST (16) // Not connected in firmware TODO
#define COORD_ID_MSK (0x0000FFFF << COORD_ID_OFST) // Not connected in firmware TODO
/* Pipeline -------------------------------------------------------------*/
/** DINF1 Master Input Register */
#define DINF1_REG (0x00 * REG_OFFSET + BASE_PIPELINE)
#define DINF1_TRIGGER_BYPASS_OFST (0)
#define DINF1_TRIGGER_BYPASS_MSK (0x00000001 << DINF1_TRIGGER_BYPASS_OFST)
#define DINF1_BYPASS_GATE_OFST (1)
#define DINF1_BYPASS_GATE_MSK (0x00000007 << DINF1_BYPASS_GATE_OFST)
#define DINF1_INVERSION_OFST (4)
#define DINF1_INVERSION_MSK (0x0000000F << DINF1_INVERSION_OFST)
#define DINF1_RISING_TRIGGER_OFST (8)
#define DINF1_RISING_TRIGGER_MSK (0x00000001 << DINF1_RISING_TRIGGER_OFST)
#define DINF1_RISING_GATE_OFST (9)
#define DINF1_RISING_GATE_MSK (0x00000007 << DINF1_RISING_GATE_OFST)
#define DINF1_FALLING_OFST (12)
#define DINF1_FALLING_MSK (0x0000000F << DINF1_FALLING_OFST)
/** DOUTIF1 Master Ouput Register */
#define DOUTIF1_REG (0x01 * REG_OFFSET + BASE_PIPELINE)
#define DOUTIF1_BYPASS_OFST (0)
#define DOUTIF1_BYPASS_MSK (0x0000000F << DOUTIF1_BYPASS_OFST)
#define DOUTIF1_INVERSION_OFST (4)
#define DOUTIF1_INVERSION_MSK (0x0000000F << DOUTIF1_INVERSION_OFST)
#define DOUTIF1_RISING_OFST (8)
#define DOUTIF1_RISING_MSK (0x0000000F << DOUTIF1_RISING_OFST)
#define DOUTIF1_FALLING_OFST (12)
#define DOUTIF1_FALLING_MSK (0x0000000F << DOUTIF1_FALLING_OFST)
/** DINF2 Slave Input Register */
#define DINF2_REG (0x02 * REG_OFFSET + BASE_PIPELINE)
#define DINF2_BYPASS_OFST (0)
#define DINF2_BYPASS_MSK (0x0000000F << DINF2_BYPASS_OFST)
#define DINF2_INVERSION_OFST (4)
#define DINF2_INVERSION_MSK (0x0000000F << DINF2_INVERSION_OFST)
#define DINF2_RISING_OFST (8)
#define DINF2_RISING_MSK (0x0000000F << DINF2_RISING_OFST)
#define DINF2_FALLING_OFST (12)
#define DINF2_FALLING_MSK (0x0000000F << DINF2_FALLING_OFST)
/* Pulse length after rising edge TODO (maybe fix a value for port 1 later )*/
#define DOUTIF_RISING_LNGTH_REG (0x03 * REG_OFFSET + BASE_PIPELINE)
#define DOUTIF_RISING_LNGTH_PORT_1_OFST (0)
#define DOUTIF_RISING_LNGTH_PORT_1_MSK (0x0000000F << DOUTIF_RISING_LNGTH_PORT_1_OFST)
#define DOUTIF_RISING_LNGTH_PORT_2_OFST (0)
#define DOUTIF_RISING_LNGTH_PORT_2_MSK (0x0000000F << DOUTIF_RISING_LNGTH_PORT_2_OFST)
#define DOUTIF_RISING_LNGTH_PORT_3_OFST (0)
#define DOUTIF_RISING_LNGTH_PORT_3_MSK (0x0000000F << DOUTIF_RISING_LNGTH_PORT_3_OFST)
#define DOUTIF_RISING_LNGTH_PORT_4_OFST (0)
#define DOUTIF_RISING_LNGTH_PORT_4_MSK (0x0000000F << DOUTIF_RISING_LNGTH_PORT_4_OFST)
/* ASIC Exposure Control registers
* --------------------------------------------------*/

96
slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c
View File

@ -434,6 +434,7 @@ void setupDetector() {
setExpTime(i, DEFAULT_GATE_WIDTH);
setGateDelay(i, DEFAULT_GATE_DELAY);
}
setInitialExtSignals();
}
int setDefaultDacs() {
@ -1241,6 +1242,101 @@ enum timingMode getTiming() {
}
}
void setInitialExtSignals() {
LOG(logINFOBLUE, ("Setting Initial External Signals\n"));
// default, everything is 0
// bypass everything
// (except master input can edge detect)
bus_w(DINF1_REG, DINF1_BYPASS_GATE_MSK);
bus_w(DOUTIF1_REG, DOUTIF1_BYPASS_MSK);
bus_w(DINF2_REG, DINF2_BYPASS_MSK);
// master input can edge detect, so rising is 1
bus_w(DINF1_REG, bus_r(DINF1_REG) | DINF1_RISING_TRIGGER_MSK);
}
void setExtSignal(int signalIndex, enum externalSignalFlag mode) {
LOG(logDEBUG1, ("Setting signal flag[%d] to %d\n", signalIndex, mode));
if (signalIndex == 0 && mode != TRIGGER_IN_RISING_EDGE &&
mode != TRIGGER_IN_FALLING_EDGE) {
return;
}
// getting addr and mask for each signal
uint32_t addr = 0;
uint32_t mask = 0;
if (signalIndex <= 3) {
addr = DINF1_REG;
int offset = DINF1_INVERSION_OFST + signalIndex;
mask = (1 << offset);
} else {
addr = DOUTIF1_REG;
int offset = DOUTIF1_INVERSION_OFST + signalIndex - 4;
mask = (1 << offset);
}
LOG(logINFO, ("addr: 0x%x mask:0x%x\n", addr, mask));
switch (mode) {
case TRIGGER_IN_RISING_EDGE:
LOG(logINFO, ("Setting External Master Input Signal flag: Trigger in "
"Rising Edge\n"));
bus_w(addr, bus_r(addr) & ~mask);
break;
case TRIGGER_IN_FALLING_EDGE:
LOG(logINFO, ("Setting External Master Input Signal flag: Trigger in "
"Falling Edge\n"));
bus_w(addr, bus_r(addr) | mask);
break;
case INVERSION_ON:
LOG(logINFO, ("Setting External Master %s Signal flag: Inversion on\n",
(signalIndex <= 3 ? "Input" : "Output")));
bus_w(addr, bus_r(addr) | mask);
break;
case INVERSION_OFF:
LOG(logINFO, ("Setting External Master %s Signal flag: Inversion offn",
(signalIndex <= 3 ? "Input" : "Output")));
bus_w(addr, bus_r(addr) & ~mask);
break;
default:
LOG(logERROR,
("Extsig (signal mode) %d not defined for this detector\n", mode));
return;
}
}
int getExtSignal(int signalIndex) {
// getting addr and mask for each signal
uint32_t addr = 0;
uint32_t mask = 0;
if (signalIndex <= 3) {
addr = DINF1_REG;
int offset = DINF1_INVERSION_OFST + signalIndex;
mask = (1 << offset);
} else {
addr = DOUTIF1_REG;
int offset = DOUTIF1_INVERSION_OFST + signalIndex - 4;
mask = (1 << offset);
}
LOG(logINFO, ("addr: 0x%x mask:0x%x\n", addr, mask));
int val = bus_r(addr) & mask;
// master input trigger signal
if (signalIndex == 0) {
if (val) {
return TRIGGER_IN_FALLING_EDGE;
} else {
return TRIGGER_IN_RISING_EDGE;
}
} else {
if (val) {
return INVERSION_ON;
} else {
return INVERSION_OFF;
}
}
}
int configureMAC() {
uint32_t srcip = udpDetails.srcip;

1
slsDetectorServers/mythen3DetectorServer/slsDetectorServer_defs.h
View File

@ -21,6 +21,7 @@
#define TYPE_MYTHEN3_MODULE_VAL (93)
#define TYPE_TOLERANCE (10)
#define TYPE_NO_MODULE_STARTING_VAL (800)
#define MAX_EXT_SIGNALS (8)
/** Default Parameters */
#define DEFAULT_INTERNAL_GATES (1)

9
slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h
View File

@ -337,9 +337,12 @@ int setHighVoltage(int val);
// parameters - timing, extsig
void setTiming(enum timingMode arg);
enum timingMode getTiming();
#ifdef GOTTHARDD
void setExtSignal(enum externalSignalFlag mode);
int getExtSignal();
#ifdef MYTHEN3D
void setInitialExtSignals();
#endif
#if defined(GOTTHARDD) || defined(MYTHEN3D)
void setExtSignal(int signalIndex, enum externalSignalFlag mode);
int getExtSignal(int signalIndex);
#endif
// configure mac

1
slsDetectorServers/slsDetectorServer/include/slsDetectorServer_funcs.h
View File

@ -26,6 +26,7 @@ void rebootNiosControllerAndFPGA();
// functions called by client
int exec_command(int);
int get_detector_type(int);
int get_external_signal_flag(int);
int set_external_signal_flag(int);
int set_timing_mode(int);
int get_firmware_version(int);

2
slsDetectorServers/slsDetectorServer/src/programFpgaNios.c
View File

@ -44,7 +44,7 @@ int findFlash(char *mess) {
if (fp == NULL) {
strcpy(mess, "popen returned NULL. Need that to get mtd drive.\n");
LOG(logERROR, (mess));
return RO_TRIGGER_IN_FALLING_EDGE;
return FAIL;
}
if (fgets(output, sizeof(output), fp) == NULL) {
strcpy(mess, "fgets returned NULL. Need that to get mtd drive.\n");

178
slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c
View File

@ -140,6 +140,7 @@ const char *getRunStateName(enum runStatus ind) {
void function_table() {
flist[F_EXEC_COMMAND] = &exec_command;
flist[F_GET_DETECTOR_TYPE] = &get_detector_type;
flist[F_GET_EXTERNAL_SIGNAL_FLAG] = &get_external_signal_flag;
flist[F_SET_EXTERNAL_SIGNAL_FLAG] = &set_external_signal_flag;
flist[F_SET_TIMING_MODE] = &set_timing_mode;
flist[F_GET_FIRMWARE_VERSION] = &get_firmware_version;
@ -470,29 +471,98 @@ int get_detector_type(int file_des) {
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
}
int set_external_signal_flag(int file_des) {
int get_external_signal_flag(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int arg = -1;
enum externalSignalFlag retval = GET_EXTERNAL_SIGNAL_FLAG;
enum externalSignalFlag retval = -1;
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
return printSocketReadError();
enum externalSignalFlag flag = arg;
LOG(logDEBUG1, ("Setting external signal flag to %d\n", flag));
LOG(logDEBUG1, ("Getting external signal flag (%d)\n", arg));
#ifndef GOTTHARDD
#if !defined(GOTTHARDD) && !defined(MYTHEN3D)
functionNotImplemented();
#else
// set
if ((flag != GET_EXTERNAL_SIGNAL_FLAG) && (Server_VerifyLock() == OK)) {
setExtSignal(flag);
}
// get
retval = getExtSignal();
validate((int)flag, (int)retval, "set external signal flag", DEC);
LOG(logDEBUG1, ("External Signal Flag: %d\n", retval));
if (arg < 0 || arg >= MAX_EXT_SIGNALS) {
ret = FAIL;
sprintf(mess, "Signal index %d can only be between 0 and %d\n", arg,
MAX_EXT_SIGNALS - 1);
LOG(logERROR, (mess));
} else {
retval = getExtSignal(arg);
LOG(logDEBUG1, ("External Signal Flag: %d\n", retval));
}
#endif
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
}
int set_external_signal_flag(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int args[2] = {-1, -1};
enum externalSignalFlag retval = -1;
if (receiveData(file_des, args, sizeof(args), INT32) < 0)
return printSocketReadError();
int signalIndex = args[0];
enum externalSignalFlag flag = args[1];
LOG(logDEBUG1,
("Setting external signal flag [%d] to %d\n", signalIndex, flag));
#if !defined(GOTTHARDD) && !defined(MYTHEN3D)
functionNotImplemented();
#else
if (Server_VerifyLock() == OK) {
if (signalIndex < 0 || signalIndex >= MAX_EXT_SIGNALS) {
ret = FAIL;
sprintf(mess, "Signal index %d can only be between 0 and %d\n",
signalIndex, MAX_EXT_SIGNALS - 1);
LOG(logERROR, (mess));
} else {
switch (flag) {
case TRIGGER_IN_RISING_EDGE:
case TRIGGER_IN_FALLING_EDGE:
#ifdef MYTHEN3D
if (signalIndex > 0) {
ret = FAIL;
sprintf(mess,
"Only Master input trigger signal can edge detect. "
"Not signal %d\n",
signalIndex);
LOG(logERROR, (mess));
}
#endif
break;
#ifdef MYTHEN3D
case INVERSION_ON:
case INVERSION_OFF:
if (signalIndex == 0) {
ret = FAIL;
sprintf(
mess,
"Master input trigger signal cannot invert. Use "
"trigger_in_rising_edge or trigger_in_falling_edge\n");
LOG(logERROR, (mess));
}
break;
#endif
default:
ret = FAIL;
sprintf(mess, "Unknown flag %d for this detector\n", flag);
LOG(logERROR, (mess));
}
}
if (ret == OK) {
setExtSignal(signalIndex, flag);
retval = getExtSignal(signalIndex);
validate((int)flag, (int)retval, "set external signal flag", DEC);
LOG(logDEBUG1, ("External Signal Flag: %d\n", retval));
}
}
#endif
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
}
@ -2191,10 +2261,10 @@ int set_exptime(int file_des) {
int64_t retval = getExpTime();
LOG(logDEBUG1, ("retval exptime %lld ns\n", (long long int)retval));
if (ret == FAIL) {
sprintf(
mess,
"Could not set exposure time. Set %lld ns, read %lld ns.\n",
(long long int)val, (long long int)retval);
sprintf(mess,
"Could not set exposure time. Set %lld ns, read "
"%lld ns.\n",
(long long int)val, (long long int)retval);
LOG(logERROR, (mess));
}
}
@ -3355,8 +3425,8 @@ int set_rate_correct(int file_des) {
// only set
if (Server_VerifyLock() == OK) {
ret = validateAndSetRateCorrection(tau_ns, mess);
int64_t retval = getCurrentTau(); // to update eiger_tau_ns (for update
// rate correction)
int64_t retval = getCurrentTau(); // to update eiger_tau_ns (for
// update rate correction)
if (ret == FAIL) {
strcpy(mess, "Rate correction failed\n");
LOG(logERROR, (mess));
@ -3779,14 +3849,13 @@ int power_chip(int file_des) {
LOG(logERROR, (mess));
} else if (type_ret == FAIL) {
ret = FAIL;
sprintf(
mess,
"Could not power on chip. Wrong module attached!\n");
sprintf(mess, "Could not power on chip. Wrong module "
"attached!\n");
LOG(logERROR, (mess));
}
} else {
LOG(logINFOBLUE,
("In No-Module mode: Ignoring module type. Continuing.\n"));
LOG(logINFOBLUE, ("In No-Module mode: Ignoring module "
"type. Continuing.\n"));
}
}
#endif
@ -4313,10 +4382,10 @@ int set_adc_enable_mask_10g(int file_des) {
uint32_t retval = getADCEnableMask_10G();
if (arg != retval) {
ret = FAIL;
sprintf(
mess,
"Could not set 10Gb ADC Enable mask. Set 0x%x, but read 0x%x\n",
arg, retval);
sprintf(mess,
"Could not set 10Gb ADC Enable mask. Set 0x%x, but "
"read 0x%x\n",
arg, retval);
LOG(logERROR, (mess));
}
}
@ -4359,10 +4428,10 @@ int set_adc_invert(int file_des) {
uint32_t retval = getADCInvertRegister();
if (arg != retval) {
ret = FAIL;
sprintf(
mess,
"Could not set ADC Invert register. Set 0x%x, but read 0x%x\n",
arg, retval);
sprintf(mess,
"Could not set ADC Invert register. Set 0x%x, but read "
"0x%x\n",
arg, retval);
LOG(logERROR, (mess));
}
}
@ -4535,9 +4604,8 @@ int get_starting_frame_number(int file_des) {
// get
ret = getStartingFrameNumber(&retval);
if (ret == FAIL) {
sprintf(
mess,
"Could not get starting frame number. Failed to map address.\n");
sprintf(mess, "Could not get starting frame number. Failed to map "
"address.\n");
LOG(logERROR, (mess));
} else if (ret == -2) {
sprintf(mess, "Inconsistent starting frame number from left and right "
@ -4621,10 +4689,10 @@ int set_interrupt_subframe(int file_des) {
int retval = getInterruptSubframe();
if (arg != retval) {
ret = FAIL;
sprintf(
mess,
"Could not set Intertupt Subframe. Set %d, but read %d\n",
retval, arg);
sprintf(mess,
"Could not set Intertupt Subframe. Set %d, but "
"read %d\n",
retval, arg);
LOG(logERROR, (mess));
}
}
@ -4702,10 +4770,10 @@ int set_read_n_lines(int file_des) {
int retval = getReadNLines();
if (arg != retval) {
ret = FAIL;
sprintf(
mess,
"Could not set read n lines. Set %d, but read %d\n",
retval, arg);
sprintf(mess,
"Could not set read n lines. Set %d, but "
"read %d\n",
retval, arg);
LOG(logERROR, (mess));
}
}
@ -6268,10 +6336,10 @@ int get_on_chip_dac(int file_des) {
(int)dacIndex, chipIndex);
if (chipIndex < -1 || chipIndex >= NCHIP) {
ret = FAIL;
sprintf(
mess,
"Could not get %s. Invalid Chip Index. Options[-1, 0 - %d]\n",
modeName, NCHIP - 1);
sprintf(mess,
"Could not get %s. Invalid Chip Index. Options[-1, 0 - "
"%d]\n",
modeName, NCHIP - 1);
LOG(logERROR, (mess));
} else {
retval = getOnChipDAC(dacIndex, chipIndex);
@ -6300,10 +6368,10 @@ int set_inject_channel(int file_des) {
int increment = args[1];
if (offset < 0 || increment < 1) {
ret = FAIL;
sprintf(
mess,
"Could not inject channel. Invalid offset %d or increment %d\n",
offset, increment);
sprintf(mess,
"Could not inject channel. Invalid offset %d or "
"increment %d\n",
offset, increment);
LOG(logERROR, (mess));
} else {
ret = setInjectChannel(offset, increment);
@ -7275,11 +7343,11 @@ int set_gate_delay(int file_des) {
LOG(logDEBUG1, ("retval gate delay %lld ns (index:%d)\n",
(long long int)retval, i));
if (ret == FAIL) {
sprintf(
mess,
"Could not set gate delay. Set %lld ns, read %lld "
"ns.\n",
(long long int)val, (long long int)retval);
sprintf(mess,
"Could not set gate delay. Set %lld ns, "
"read %lld "
"ns.\n",
(long long int)val, (long long int)retval);
LOG(logERROR, (mess));
break;
}