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fixed altera pll clk dividers for ctb

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maliakal_d 2022-11-17 16:19:37 +01:00
parent 745fca7201
commit d64d0b5ac1
2 changed files with 2 additions and 2 deletions
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slsDetectorServers/ctbDetectorServer/bin/ctbDetectorServer_developer
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4
slsDetectorServers/slsDetectorServer/src/ALTERA_PLL.c
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@ -288,7 +288,7 @@ int ALTERA_PLL_SetOuputFrequency(int pllIndex, int clkIndex, int pllVCOFreqMhz,
pllIndex, clkIndex, value, pllVCOFreqMhz));
// calculate output frequency
float total_div = (float)pllVCOFreqMhz / (float)value;
int total_div = (float)pllVCOFreqMhz / (float)value;
// assume 50% duty cycle
uint32_t low_count = total_div / 2;
@ -296,7 +296,7 @@ int ALTERA_PLL_SetOuputFrequency(int pllIndex, int clkIndex, int pllVCOFreqMhz,
uint32_t odd_division = 0;
// odd division
if (total_div > (float)(2 * low_count)) {
if (total_div > (2 * low_count)) {
++high_count;
odd_division = 1;
}