mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-20 02:40:03 +02:00
added new jungfraustructure, wiht common detector tcp interface
This commit is contained in:
Dhanya Maliakal
parent
b46da37932
commit
d41abc2b1c
@ -1 +0,0 @@
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*.gdb
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@ -1 +0,0 @@
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AXIS_BUILDTYPE ?= cris-axis-linux-gnu
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@ -1,57 +1,26 @@
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# $Id: Makefile,v 1.1.1.1 2006/02/04 03:35:01 freza Exp $
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# first compile
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# make cris-axis-linux-gnu
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CROSS = bfin-uclinux-
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CC = $(CROSS)gcc
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CFLAGS += -Wall -DJUNGFRAUD -DMCB_FUNCS -DDACS_INT #-DVERBOSE #-DVERYVERBOSE #-DVIRTUAL
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CFLAGS += -Wall -DJUNGFRAUD -DSLS_DETECTOR_FUNCTION_LIST -DDACS_INT -DSTOP_SERVER #-DVERBOSEI #-DVERBOSE
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LDLIBS += -lm -lstdc++
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PROGS = jungfrauDetectorServer
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INSTDIR= /tftpboot
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DESTDIR ?= bin
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INSTMODE = 0777
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BINS = testlib_sharedlibc
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SRCS = server.c server_funcs.c communication_funcs.c firmware_funcs.c mcb_funcs.c
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OBJS = $(SRCS:%.c=%.o)
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SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c
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OBJS = $(SRC_CLNT:.c=.o)
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all: clean $(PROGS)
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test: clean jungfrauADCTEst
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boot: $(OBJS)
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jungfrauDetectorServer: $(OBJS)
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$(PROGS): $(OBJS)
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echo $(OBJS)
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$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@)
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jungfrauADCTEst: $(OBJS)
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echo $(OBJS)
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$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@) -DTESTADC
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install: $(PROGS)
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$(INSTALL) -d $(INSTDIR)
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$(INSTALL) -m $(INSTMODE) $(PROGS) $(INSTDIR)
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romfs:
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$(ROMFSINST) /bin/$(PROGS)
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mkdir -p $(DESTDIR)
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$(CC) -o $@ $^ $(CFLAGS) $(LDLIBS)
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mv $(PROGS) $(DESTDIR)
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rm *.gdb
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clean:
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rm -rf $(PROGS) *.o *.gdb
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rm -rf $(DESTDIR)/$(PROGS) *.o
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33
slsDetectorSoftware/jungfrauDetectorServer/Makefile.virtual
Executable file → Normal file
33
slsDetectorSoftware/jungfrauDetectorServer/Makefile.virtual
Executable file → Normal file
@ -1,30 +1,25 @@
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DESTDIR ?= ./
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CC = gcc
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CFLAGS += -Wall -DMOENCHD -DMCB_FUNCS -DDACS_INT -DDEBUG -DVIRTUAL
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CFLAGS += -Wall -DJUNGFRAUD -DSLS_DETECTOR_FUNCTION_LIST -DDACS_INT -DSTOP_SERVER #-DVERBOSEI #-DVERBOSE
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LDLIBS += -lm -lstdc++
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PROGS = jungfrauDetectorServer
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DESTDIR ?= bin
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INSTMODE = 0777
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PROGS= $(DESTDIR)/moenchVirtualServer
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SRCS = server.c server_funcs.c communication_funcs.c firmware_funcs.c mcb_funcs.c trimming_funcs.c sharedmemory.c
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OBJS = $(SRCS:%.c=%.o)
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moenchVirtualServer = $(PROGS)
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SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c
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OBJS = $(SRC_CLNT:.c=.o)
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all: clean $(PROGS)
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boot: $(OBJS)
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$(PROGS): $(OBJS)
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$(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@)
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echo $(OBJS)
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mkdir -p $(DESTDIR)
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$(CC) -o $@ $^ $(CFLAGS) $(LDLIBS)
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mv $(PROGS) $(DESTDIR)
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rm *.gdb
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clean:
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rm -rf $(PROGS) *.o *.gdb
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rm -rf $(DESTDIR)/$(PROGS) *.o
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@ -1,11 +0,0 @@
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add the following to /etc/rc before using programfpga command before cat motd
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#registering 7th and 9th pin to linux kernel
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echo 7 > /sys/class/gpio/export
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echo 9 > /sys/class/gpio/export
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#define direction for the linux kernel
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echo in > /sys/class/gpio/gpio7/direction
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echo out > /sys/class/gpio/gpio9/direction
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#needed, else all write errors when server starts up, because linux tries to take control fof gpio
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echo 1 > /sys/class/gpio/gpio9/value
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@ -1 +1 @@
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/afs/psi.ch/project/sls_det_software/dhanya_softwareDevelopment/mySoft/slsDetectorsPackage/slsReceiverSoftware/include/ansi.h
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../../slsReceiverSoftware/include/ansi.h
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BIN
slsDetectorSoftware/jungfrauDetectorServer/bin/jungfrauDetectorServerv3.0.0.1.1
Executable file
BIN
slsDetectorSoftware/jungfrauDetectorServer/bin/jungfrauDetectorServerv3.0.0.1.1
Executable file
Binary file not shown.
File diff suppressed because it is too large
Load Diff
@ -1,127 +0,0 @@
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#ifndef FIRMWARE_FUNCS_H
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#define FIRMWARE_FUNCS_H
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#include "sls_detector_defs.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <fcntl.h>
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#include <stdarg.h>
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#include <unistd.h>
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//#include <asm/page.h>
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#include <sys/mman.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <stdarg.h>
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#include <unistd.h>
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int mapCSP0(void);
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u_int16_t bus_w16(u_int32_t offset, u_int16_t data);
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u_int16_t bus_r16(u_int32_t offset);
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u_int16_t ram_w16(u_int32_t ramType, int adc, int adcCh, int Ch, u_int16_t data);
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u_int16_t ram_r16(u_int32_t ramType, int adc, int adcCh, int Ch);
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u_int32_t bus_w(u_int32_t offset, u_int32_t data);
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u_int32_t bus_r(u_int32_t offset);
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void initializeDetector();
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int checkType();
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void printVersions();
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int testFifos(void);
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u_int32_t testFpga(void);
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u_int32_t testRAM(void);
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int testBus(void);
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u_int64_t getDetectorNumber();
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u_int64_t getFirmwareVersion();
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int64_t getId(enum idMode arg);
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void defineGPIOpins();
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void resetFPGA();
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void FPGAdontTouchFlash();
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void FPGATouchFlash();
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void eraseFlash();
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int startWritingFPGAprogram(FILE** filefp);
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int stopWritingFPGAprogram(FILE* filefp);
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int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp);
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long int calcChecksum(int sourceip, int destip);
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void configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, int sourceip, uint32_t destport);
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int64_t set64BitReg(int64_t value, int aLSB, int aMSB);
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int64_t get64BitReg(int aLSB, int aMSB);
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int64_t setFrames(int64_t value);
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int64_t getFrames();
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int64_t setExposureTime(int64_t value);
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int64_t getExposureTime();
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int64_t setGates(int64_t value);
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int64_t getGates();
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int64_t setDelay(int64_t value);
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int64_t getDelay();
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int64_t setPeriod(int64_t value);
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int64_t getPeriod();
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int64_t setTrains(int64_t value);
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int64_t getTrains();
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int64_t setProbes(int64_t value);
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int64_t getProbes();
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int64_t getActualTime();
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int64_t getMeasurementTime();
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int64_t getFramesFromStart();
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u_int32_t runBusy(void);
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int startStateMachine();
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int stopStateMachine();
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enum runStatus getStatus();
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void waitForAcquisitionEnd();
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void serializeToSPI(u_int32_t addr, u_int32_t val, u_int16_t csmask, int numbitstosend, u_int16_t clkmask, u_int16_t digoutmask, int digofset);
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void initDac(int dacnum);
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int setDac(int dacnum, int dacvalue);
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int setHighVoltage(int val, int imod);
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void setAdc(int addr, int val);
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void prepareADC();
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int setDynamicRange(int dr);
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int getDynamicRange();
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int getNModBoard();
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int setNMod(int n);
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int getNMod();
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int powerChip (int on);
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void cleanFifos();
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void resetCore();
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void resetPeripheral();
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int adcPhase(int st);
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int getPhase();
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u_int32_t setClockDivider(int d);
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u_int32_t getClockDivider();
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int getTemperature(int tempSensor,int imod);
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int initConfGain(int isettings,int val,int imod);
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int initSpeedConfGain(int val);
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void resetPLL();
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u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val);
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void configurePll();
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int loadImage(int index, short int ImageVals[]);
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int readCounterBlock(int startACQ, short int CounterVals[]);
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int resetCounterBlock(int startACQ);
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int calibratePedestal(int frames);
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int setTiming(int t);
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int setMaster(int f);
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int setSynchronization(int s);
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#endif
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Binary file not shown.
@ -1,323 +0,0 @@
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#ifdef MCB_FUNCS
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#include "registers_m.h"
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#include "server_defs.h"
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#include "firmware_funcs.h"
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#include "mcb_funcs.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <math.h>
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/* global variables */
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enum detectorSettings thisSettings;
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int sChan, sChip, sMod, sDac, sAdc;
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const int allSelected=-2;
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const int noneSelected=-1;
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sls_detector_module *detectorModules=NULL;
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int *detectorChips=NULL;
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int *detectorChans=NULL;
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int *detectorDacs=NULL;
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int *detectorAdcs=NULL;
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int initDetector() {
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int imod;
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int n=getNModBoard();
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#ifdef VERBOSE
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printf("Board is for %d modules\n",n);
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#endif
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detectorModules=malloc(n*sizeof(sls_detector_module));
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detectorDacs=malloc(n*NDAC*sizeof(int));
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detectorAdcs=malloc(n*NADC*sizeof(int));
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detectorChips=NULL;
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detectorChans=NULL;
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detectorAdcs=NULL;
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#ifdef VERBOSE
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printf("modules from 0x%x to 0x%x\n",(unsigned int)(detectorModules), (unsigned int)(detectorModules+n));
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printf("dacs from 0x%x to 0x%x\n",(unsigned int)(detectorDacs), (unsigned int)(detectorDacs+n*NDAC));
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printf("adcs from 0x%x to 0x%x\n",(unsigned int)(detectorAdcs), (unsigned int)(detectorAdcs+n*NADC));
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#endif
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for (imod=0; imod<n; imod++) {
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(detectorModules+imod)->dacs=detectorDacs+imod*NDAC;
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(detectorModules+imod)->adcs=detectorAdcs+imod*NADC;
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(detectorModules+imod)->ndac=NDAC;
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(detectorModules+imod)->nadc=NADC;
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(detectorModules+imod)->nchip=NCHIP;
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(detectorModules+imod)->nchan=NCHIP*NCHAN;
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(detectorModules+imod)->module=imod;
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(detectorModules+imod)->gain=0;
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(detectorModules+imod)->offset=0;
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(detectorModules+imod)->reg=0;
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}
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thisSettings=UNINITIALIZED;
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sChan=noneSelected;
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sChip=noneSelected;
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sMod=noneSelected;
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sDac=noneSelected;
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sAdc=noneSelected;
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return OK;
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}
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int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
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int idac, iadc;
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int ret=OK;
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#ifdef VERBOSE
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printf("Copying module %x to module %x\n",(unsigned int)(srcMod),(unsigned int)(destMod));
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#endif
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if (srcMod->module>=0) {
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#ifdef VERBOSE
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printf("Copying module number %d to module number %d\n",srcMod->module,destMod->module);
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#endif
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destMod->module=srcMod->module;
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}
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if (srcMod->serialnumber>=0){
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/* #ifdef VERBOSE */
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/* printf("Copying module serial number %x to module serial number %x\n",srcMod->serialnumber,destMod->serialnumber); */
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/* #endif */
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destMod->serialnumber=srcMod->serialnumber;
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}
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/*
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if ((srcMod->nchip)>(destMod->nchip)) {
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printf("Number of chip of source is larger than number of chips of destination\n");
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return FAIL;
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}
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if ((srcMod->nchan)>(destMod->nchan)) {
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printf("Number of channels of source is larger than number of channels of destination\n");
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return FAIL;
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}
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*/
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if ((srcMod->ndac)>(destMod->ndac)) {
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printf("Number of dacs of source is larger than number of dacs of destination\n");
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return FAIL;
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}
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if ((srcMod->nadc)>(destMod->nadc)) {
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printf("Number of dacs of source is larger than number of dacs of destination\n");
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return FAIL;
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}
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#ifdef VERBOSE
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printf("DACs: src %d, dest %d\n",srcMod->ndac,destMod->ndac);
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printf("ADCs: src %d, dest %d\n",srcMod->nadc,destMod->nadc);
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//printf("Chips: src %d, dest %d\n",srcMod->nchip,destMod->nchip);
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//printf("Chans: src %d, dest %d\n",srcMod->nchan,destMod->nchan);
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#endif
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destMod->ndac=srcMod->ndac;
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destMod->nadc=srcMod->nadc;
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// destMod->nchip=srcMod->nchip;
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//destMod->nchan=srcMod->nchan;
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if (srcMod->reg>=0)
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destMod->reg=srcMod->reg;
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#ifdef VERBOSE
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printf("Copying register %x (%x)\n",destMod->reg,srcMod->reg );
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#endif
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if (srcMod->gain>=0)
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destMod->gain=srcMod->gain;
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if (srcMod->offset>=0)
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destMod->offset=srcMod->offset;
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// printf("copying gain and offset %f %f to %f %f\n",srcMod->gain,srcMod->offset,destMod->gain,destMod->offset);
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for (idac=0; idac<(srcMod->ndac); idac++) {
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if (*((srcMod->dacs)+idac)>=0)
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*((destMod->dacs)+idac)=*((srcMod->dacs)+idac);
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}
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for (iadc=0; iadc<(srcMod->nadc); iadc++) {
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if (*((srcMod->adcs)+iadc)>=0)
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*((destMod->adcs)+iadc)=*((srcMod->adcs)+iadc);
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}
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return ret;
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}
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int setSettings(int i, int imod) {
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//#ifdef VERBOSE
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if(i!=-1)
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printf("\nSetting settings wit value %d\n",i);
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//#endif
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int isett=-1,val=-1,retval=-1;
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enum conf_gain {
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dynamic = 0x0f00, //dynamic
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dynamichighgain0 = v, //dynamichighgain0
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fixgain1 = 0x0f02, //fixgain1
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fixgain2 = 0x0f06, //fixgain2
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forceswitchgain1 = 0x1f00, //forceswitchgain1
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forceswitchgain2 = 0x3f00 //forceswitchgain2
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};
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//determine conf value to write
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if(i!=GET_SETTINGS){
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switch(i){
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case DYNAMICGAIN: val = dynamic; break;
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case DYNAMICHG0: val = dynamichighgain0; break;
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case FIXGAIN1: val = fixgain1; break;
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case FIXGAIN2: val = fixgain2; break;
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case FORCESWITCHG1: val = forceswitchgain1; break;
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case FORCESWITCHG2: val = forceswitchgain2; break;
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default:
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printf("Error: This settings is not defined for this detector %d\n",i);
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return GET_SETTINGS;
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}
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}
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retval = initConfGain(i,val,imod);
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|
||||
switch(retval){
|
||||
case dynamic: isett=DYNAMICGAIN; break;
|
||||
case dynamichighgain0: isett=DYNAMICHG0; break;
|
||||
case fixgain1: isett=FIXGAIN1; break;
|
||||
case fixgain2: isett=FIXGAIN2; break;
|
||||
case forceswitchgain1: isett=FORCESWITCHG1; break;
|
||||
case forceswitchgain2: isett=FORCESWITCHG2; break;
|
||||
default:
|
||||
isett=UNDEFINED;
|
||||
printf("Error:Wrong settings read out from Gain Reg 0x%x\n",retval);
|
||||
break;
|
||||
}
|
||||
|
||||
thisSettings=isett;
|
||||
//#ifdef VERBOSE
|
||||
printf("detector settings are %d\n",thisSettings);
|
||||
//#endif
|
||||
return thisSettings;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* Initialization*/
|
||||
|
||||
|
||||
|
||||
int initModulebyNumber(sls_detector_module myMod) {
|
||||
printf("\nInitializing Module\n");
|
||||
int nchip,nchan;//int ichip, nchip, ichan, nchan;
|
||||
int im, modmi,modma;
|
||||
// int ft, cae, ae, coe, ocoe, counts, chanreg;
|
||||
int imod;
|
||||
// int obe;
|
||||
// int ow;
|
||||
/* int v[NDAC];*/
|
||||
int retval =-1, idac;
|
||||
|
||||
|
||||
nchip=myMod.nchip;
|
||||
nchan=(myMod.nchan)/nchip;
|
||||
imod=myMod.module;
|
||||
sMod=imod;
|
||||
if (sMod==ALLMOD)
|
||||
sMod=allSelected;
|
||||
if (sMod==allSelected) {
|
||||
modmi=0;
|
||||
modma=NMODX;//getNModBoard();
|
||||
} else if (sMod==noneSelected || sMod>NMODX || sMod<0) {// (sMod==noneSelected || sMod>getNModBoard() || sMod<0) {
|
||||
modmi=0;
|
||||
modma=-1;
|
||||
} else {
|
||||
modmi=sMod;
|
||||
modma=sMod+1;
|
||||
}
|
||||
|
||||
//printf("ndac:%d\n",NDAC);
|
||||
|
||||
for (idac=0; idac<NDAC; idac++){
|
||||
retval = setDac(idac,(myMod.dacs)[idac]);
|
||||
if(retval ==(myMod.dacs)[idac])
|
||||
printf("Setting dac %d to %d\n",idac,retval);
|
||||
else
|
||||
printf("Error: Could not set dac %d, wrote %d but read %d\n",idac,(myMod.dacs)[idac],retval);
|
||||
}
|
||||
|
||||
if (detectorModules) {
|
||||
for (im=modmi; im<modma; im++) {
|
||||
#ifdef VERBOSE
|
||||
printf("im=%d\n",im);
|
||||
#endif
|
||||
copyModule(detectorModules+im,&myMod);
|
||||
}
|
||||
}
|
||||
//setting the conf gain and the settings register
|
||||
setSettings(myMod.reg,imod);
|
||||
|
||||
printf("Done Initializing Module\n");
|
||||
return thisSettings;
|
||||
}
|
||||
|
||||
|
||||
int getModulebyNumber(sls_detector_module* myMod) {
|
||||
int imod=myMod->module;
|
||||
#ifdef VERBOSE
|
||||
printf("Getting module %d\n",imod);
|
||||
#endif
|
||||
if (detectorModules) {
|
||||
copyModule(myMod,detectorModules+imod);
|
||||
;
|
||||
} else
|
||||
return FAIL;
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
// Fifo continuous read
|
||||
|
||||
|
||||
int getModuleNumber(int modnum) {
|
||||
int val = 0xfff;
|
||||
// val=readin(modnum);
|
||||
return val;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@ -1,17 +0,0 @@
|
||||
#ifdef MCB_FUNCS
|
||||
|
||||
#ifndef MCB_FUNCS_H
|
||||
#define MCB_FUNCS_H
|
||||
|
||||
#include "sls_detector_defs.h"
|
||||
|
||||
int initDetector();
|
||||
int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod);
|
||||
int setSettings(int i,int imod);
|
||||
int initModulebyNumber(sls_detector_module);
|
||||
int getModulebyNumber(sls_detector_module*);
|
||||
int getModuleNumber(int modnum);
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@ -1,360 +0,0 @@
|
||||
#ifndef REGISTERS_G_H
|
||||
#define REGISTERS_G_H
|
||||
|
||||
|
||||
#include "sls_detector_defs.h"
|
||||
|
||||
|
||||
/* Definitions for FPGA*/
|
||||
#define CSP0 0x20200000
|
||||
#define MEM_SIZE 0x100000
|
||||
|
||||
/* FPGA Version register */
|
||||
#define FPGA_VERSION_REG (0x00 << 11)
|
||||
|
||||
#define BOARD_REVISION_OFST (0)
|
||||
#define BOARD_REVISION_MSK (0x00FFFFFF << BOARD_REVISION_OFST)
|
||||
#define DETECTOR_TYPE_OFST (24)
|
||||
#define DETECTOR_TYPE_MSK (0x000000FF << DETECTOR_TYPE_OFST)
|
||||
|
||||
|
||||
|
||||
/* Fix pattern register */
|
||||
#define FIX_PATT_REG (0x01 << 11)
|
||||
|
||||
/* Status register */
|
||||
#define STATUS_REG (0x02 << 11)
|
||||
|
||||
#define RUN_BUSY_OFST (0)
|
||||
#define RUN_BUSY_MSK (0x00000001 << RUN_BUSY_OFST)
|
||||
#define WAITING_FOR_TRIGGER_OFST (3)
|
||||
#define WAITING_FOR_TRIGGER_MSK (0x00000001 << WAITING_FOR_TRIGGER_OFST)
|
||||
#define DELAYBEFORE_OFST (4) //Not used in software
|
||||
#define DELAYBEFORE_MSK (0x00000001 << DELAYBEFORE_OFST) //Not used in software
|
||||
#define DELAYAFTER_OFST (5) //Not used in software
|
||||
#define DELAYAFTER_MSK (0x00000001 << DELAYAFTER_OFST) //Not used in software
|
||||
#define STOPPED_OFST (15)
|
||||
#define STOPPED_MSK (0x00000001 << STOPPED_OFST)
|
||||
#define RUNMACHINE_BUSY_OFST (17)
|
||||
#define RUNMACHINE_BUSY_MSK (0x00000001 << RUNMACHINE_BUSY_OFST)
|
||||
|
||||
|
||||
/* Look at me register */
|
||||
#define LOOK_AT_ME_REG (0x03 << 11) //Not used in firmware or software
|
||||
|
||||
/* System Status register */
|
||||
#define SYSTEM_STATUS_REG (0x04 << 11) //Not used in software
|
||||
|
||||
#define DDR3_CAL_DONE_OFST (0) //Not used in software
|
||||
#define DDR3_CAL_DONE_MSK (0x00000001 << DDR3_CAL_DONE_OFST) //Not used in software
|
||||
#define DDR3_CAL_FAIL_OFST (1) //Not used in software
|
||||
#define DDR3_CAL_FAIL_MSK (0x00000001 << DDR3_CAL_FAIL_OFST) //Not used in software
|
||||
#define DDR3_INIT_DONE_OFST (2) //Not used in software
|
||||
#define DDR3_INIT_DONE_MSK (0x00000001 << DDR3_INIT_DONE_OFST) //Not used in software
|
||||
#define RECONFIG_PLL_LCK_OFST (3) //Not used in software
|
||||
#define RECONFIG_PLL_LCK_MSK (0x00000001 << RECONFIG_PLL_LCK_OFST) //Not used in software
|
||||
#define PLL_A_LCK_OFST (4) //Not used in software
|
||||
#define PLL_A_LCK_MSK (0x00000001 << PLL_A_LCK_OFST) //Not used in software
|
||||
#define DD3_PLL_LCK_OFST (5) //Not used in software
|
||||
#define DD3_PLL_LCK_MSK (0x00000001 << DD3_PLL_LCK_OFST) //Not used in software
|
||||
|
||||
|
||||
/* Module Control Board Serial Number Register */
|
||||
#define MOD_SERIAL_NUM_REG (0x0A << 11) //Not used in software
|
||||
|
||||
#define HARDWARE_SERIAL_NUM_OFST (0) //Not used in software
|
||||
#define HARDWARE_SERIAL_NUM_MSK (0x000000FF << HARDWARE_SERIAL_NUM_OFST) //Not used in software
|
||||
#define HARDWARE_VERSION_NUM_OFST (16) //Not used in software
|
||||
#define HARDWARE_VERSION_NUM_MSK (0x0000003F << HARDWARE_VERSION_NUM_OFST) //Not used in software
|
||||
|
||||
|
||||
/* Time from Start 64 bit register */
|
||||
#define TIME_FROM_START_LSB_REG (0x10 << 11)
|
||||
#define TIME_FROM_START_MSB_REG (0x11 << 11)
|
||||
|
||||
/* Get Delay 64 bit register */
|
||||
#define GET_DELAY_LSB_REG (0x12 << 11)
|
||||
#define GET_DELAY_MSB_REG (0x13 << 11)
|
||||
|
||||
/* Get Cycles 64 bit register */
|
||||
#define GET_CYCLES_LSB_REG (0x14 << 11)
|
||||
#define GET_CYCLES_MSB_REG (0x15 << 11)
|
||||
|
||||
/* Get Frames 64 bit register */
|
||||
#define GET_FRAMES_LSB_REG (0x16 << 11)
|
||||
#define GET_FRAMES_MSB_REG (0x17 << 11)
|
||||
|
||||
/* Get Period 64 bit register */
|
||||
#define GET_PERIOD_LSB_REG (0x18 << 11)
|
||||
#define GET_PERIOD_MSB_REG (0x19 << 11)
|
||||
|
||||
/* Get Period 64 bit register */
|
||||
#define GET_EXPTIME_LSB_REG (0x1A << 11)
|
||||
#define GET_EXPTIME_MSB_REG (0x1B << 11)
|
||||
|
||||
/* Get Period 64 bit register */
|
||||
#define GET_GATES_LSB_REG (0x1C << 11)
|
||||
#define GET_GATES_MSB_REG (0x1D << 11)
|
||||
|
||||
/* Get Frames from Start 64 bit register (frames from start Run Control) */
|
||||
#define FRAMES_FROM_START_PG_LSB_REG (0x24 << 11)
|
||||
#define FRAMES_FROM_START_PG_MSB_REG (0x25 << 11)
|
||||
|
||||
/* Measurement Time 64 bit register (timestamp at a frame start until reset)*/
|
||||
#define START_FRAME_TIME_LSB_REG (0x26 << 11)
|
||||
#define START_FRAME_TIME_MSB_REG (0x27 << 11)
|
||||
|
||||
/* SPI (Serial Peripheral Interface) Register */
|
||||
#define SPI_REG (0x40 << 11)
|
||||
|
||||
#define DAC_SERIAL_DIGITAL_OUT_OFST (0)
|
||||
#define DAC_SERIAL_DIGITAL_OUT_MSK (0x00000001 << DAC_SERIAL_DIGITAL_OUT_OFST)
|
||||
#define DAC_SERIAL_CLK_OUT_OFST (1)
|
||||
#define DAC_SERIAL_CLK_OUT_MSK (0x00000001 << DAC_SERIAL_CLK_OUT_OFST)
|
||||
#define DAC_SERIAL_CS_OUT_OFST (2)
|
||||
#define DAC_SERIAL_CS_OUT_MSK (0x00000001 << DAC_SERIAL_CS_OUT_OFST)
|
||||
#define HV_SERIAL_DIGITAL_OUT_OFST (8)
|
||||
#define HV_SERIAL_DIGITAL_OUT_MSK (0x00000001 << HV_SERIAL_DIGITAL_OUT_OFST)
|
||||
#define HV_SERIAL_CLK_OUT_OFST (9)
|
||||
#define HV_SERIAL_CLK_OUT_MSK (0x00000001 << HV_SERIAL_CLK_OUT_OFST)
|
||||
#define HV_SERIAL_CS_OUT_OFST (10)
|
||||
#define HV_SERIAL_CS_OUT_MSK (0x00000001 << HV_SERIAL_CS_OUT_OFST)
|
||||
|
||||
|
||||
/* ADC SPI (Serial Peripheral Interface) Register */
|
||||
#define ADC_SPI_REG (0x41 << 11)
|
||||
|
||||
#define ADC_SERIAL_CLK_OUT_OFST (0)
|
||||
#define ADC_SERIAL_CLK_OUT_MSK (0x00000001 << ADC_SERIAL_CLK_OUT_OFST)
|
||||
#define ADC_SERIAL_DATA_OUT_OFST (1)
|
||||
#define ADC_SERIAL_DATA_OUT_MSK (0x00000001 << ADC_SERIAL_DATA_OUT_OFST)
|
||||
#define ADC_SERIAL_CS_OUT_OFST (2)
|
||||
#define ADC_SERIAL_CS_OUT_MSK (0x0000000F << ADC_SERIAL_CS_OUT_OFST)
|
||||
|
||||
/* ADC offset Register */
|
||||
#define ADC_OFST_REG (0x42 << 11)
|
||||
|
||||
/* ADC Port Invert Register */
|
||||
#define ADC_PORT_INVERT_REG (0x43 << 11)
|
||||
|
||||
/* Receiver IP Address Register */
|
||||
#define RX_IP_REG (0x45 << 11)
|
||||
|
||||
/* UDP Port */
|
||||
#define UDP_PORT_REG (0x46 << 11)
|
||||
|
||||
#define UDP_PORT_RX_OFST (0)
|
||||
#define UDP_PORT_RX_MSK (0x0000FFFF << UDP_PORT_RX_OFST)
|
||||
#define UDP_PORT_TX_OFST (16)
|
||||
#define UDP_PORT_TX_MSK (0x0000FFFF << UDP_PORT_TX_OFST)
|
||||
|
||||
/* Receiver Mac Address 64 bit Register */
|
||||
#define RX_MAC_LSB_REG (0x47 << 11)
|
||||
#define RX_MAC_MSB_REG (0x48 << 11)
|
||||
|
||||
#define RX_MAC_LSB_OFST (0)
|
||||
#define RX_MAC_LSB_MSK (0x0000FFFF << RX_MAC_LSB_OFST)
|
||||
#define RX_MAC_MSB_OFST (0)
|
||||
#define RX_MAC_MSB_MSK (0x000000FF << RX_MAC_MSB_OFST)
|
||||
|
||||
/* Detector/ Transmitter Mac Address 64 bit Register */
|
||||
#define TX_MAC_LSB_REG (0x49 << 11)
|
||||
#define TX_MAC_MSB_REG (0x4A << 11)
|
||||
|
||||
#define TX_MAC_LSB_OFST (0)
|
||||
#define TX_MAC_LSB_MSK (0x0000FFFF << TX_MAC_LSB_OFST)
|
||||
#define TX_MAC_MSB_OFST (0)
|
||||
#define TX_MAC_MSB_MSK (0x000000FF << TX_MAC_MSB_OFST)
|
||||
|
||||
/* Detector/ Transmitter IP Address Register */
|
||||
#define TX_IP_REG (0x4B << 11)
|
||||
|
||||
/* Detector/ Transmitter IP Checksum Register */
|
||||
#define TX_IP_CHECKSUM_REG (0x4C << 11)
|
||||
|
||||
#define TX_IP_CHECKSUM_OFST (0)
|
||||
#define TX_IP_CHECKSUM_MSK (0x000000FF << TX_IP_CHECKSUM_OFST)
|
||||
|
||||
/* Configuration Register */
|
||||
#define CONFIG_REG (0x4D << 11)
|
||||
|
||||
#define CONFIG_OPERATION_MODE_OFST (16)
|
||||
#define CONFIG_OPERATION_MODE_MSK (0x00000001 << CONFIG_OPERATION_MODE_OFST)
|
||||
#define CONFIG_MODE_1_X_10GBE_VAL ((0x0 << CONFIG_OPERATION_MODE_OFST) & CONFIG_OPERATION_MODE_MSK)
|
||||
#define CONFIG_MODE_2_X_10GBE_VAL ((0x1 << CONFIG_OPERATION_MODE_OFST) & CONFIG_OPERATION_MODE_MSK)
|
||||
#define CONFIG_READOUT_SPEED_OFST (20)
|
||||
#define CONFIG_READOUT_SPEED_MSK (0x00000003 << CONFIG_READOUT_SPEED_OFST)
|
||||
#define CONFIG_QUARTER_SPEED_10MHZ_VAL ((0x0 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK)
|
||||
#define CONFIG_HALF_SPEED_20MHZ_VAL ((0x1 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK)
|
||||
#define CONFIG_FULL_SPEED_VAL ((0x2 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK)
|
||||
#define CONFIG_TDMA_OFST (24)
|
||||
#define CONFIG_TDMA_MSK (0x00000001 << CONFIG_TDMA_OFST)
|
||||
#define CONFIG_TDMA_DISABLE_VAL ((0x0 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK)
|
||||
#define CONFIG_TDMA_ENABLE_VAL ((0x1 << CONFIG_TDMA_OFST) & CONFIG_TDMA_MSK)
|
||||
#define CONFIG_TDMA_TIMESLOT_OFST (25)
|
||||
#define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST)
|
||||
#define CONFIG_TDMA_TIMESLOT_0_VAL ((0x0 << CONFIG_TDMA_TIMESLOT_OFST) & CONFIG_TDMA_TIMESLOT_MSK)
|
||||
|
||||
/* External Signal Register */
|
||||
#define EXT_SIGNAL_REG (0x4E << 11)
|
||||
|
||||
#define EXT_SIGNAL_OFST (0)
|
||||
#define EXT_SIGNAL_MSK (0x00000003 << EXT_SIGNAL_OFST) //enabled when both bits high
|
||||
|
||||
/* Control Register */
|
||||
#define CONTROL_REG (0x4F << 11)
|
||||
|
||||
#define CONTROL_START_ACQ_OFST (0)
|
||||
#define CONTROL_START_ACQ_MSK (0x00000001 << CONTROL_START_ACQ_OFST)
|
||||
#define CONTROL_STOP_ACQ_OFST (1)
|
||||
#define CONTROL_STOP_ACQ_MSK (0x00000001 << CONTROL_STOP_ACQ_OFST)
|
||||
#define CONTROL_CORE_RST_OFST (10)
|
||||
#define CONTROL_CORE_RST_MSK (0x00000001 << CONTROL_CORE_RST_OFST)
|
||||
#define CONTROL_PERIPHERAL_RST_OFST (11) //DDR3 HMem Ctrlr, GBE, Temp
|
||||
#define CONTROL_PERIPHERAL_RST_MSK (0x00000001 << CONTROL_PERIPHERAL_RST_OFST) //DDR3 HMem Ctrlr, GBE, Temp
|
||||
#define CONTROL_DDR3_MEM_RST_OFST (12) //only PHY, not DDR3 PLL ,Not used in software
|
||||
#define CONTROL_DDR3_MEM_RST_MSK (0x00000001 << CONTROL_DDR3_MEM_RST_OFST) //only PHY, not DDR3 PLL ,Not used in software
|
||||
#define CONTROL_ACQ_FIFO_CLR_OFST (14)
|
||||
#define CONTROL_ACQ_FIFO_CLR_MSK (0x00000001 << CONTROL_ACQ_FIFO_CLR_OFST)
|
||||
|
||||
/* Reconfiguratble PLL Paramater Register */
|
||||
#define PLL_PARAM_REG (0x50 << 11)
|
||||
|
||||
/* Reconfiguratble PLL Control Regiser */
|
||||
#define PLL_CONTROL_REG (0x51 << 11)
|
||||
|
||||
#define PLL_CTRL_RECONFIG_RST_OFST (0) //parameter reset
|
||||
#define PLL_CTRL_RECONFIG_RST_MSK (0x00000001 << PLL_CTRL_RECONFIG_RST_OFST) //parameter reset
|
||||
#define PLL_CTRL_WR_PARAMETER_OFST (2)
|
||||
#define PLL_CTRL_WR_PARAMETER_MSK (0x00000001 << PLL_CTRL_WR_PARAMETER_OFST)
|
||||
#define PLL_CTRL_RST_OFST (3)
|
||||
#define PLL_CTRL_RST_MSK (0x00000001 << PLL_CTRL_RST_OFST)
|
||||
#define PLL_CTRL_ADDR_OFST (16)
|
||||
#define PLL_CTRL_ADDR_MSK (0x0000003F << PLL_CTRL_ADDR_OFST)
|
||||
|
||||
/* Sample Register (Obsolete) */
|
||||
#define SAMPLE_REG (0x59 << 11) /** carlos set speed differently*/
|
||||
|
||||
#define SAMPLE_ADC_SAMPLE_SEL_OFST (0) /** carlos cant use the bits*/
|
||||
#define SAMPLE_ADC_SAMPLE_SEL_MSK (0x00000007 << SAMPLE_ADC_SAMPLE_SEL_OFST)
|
||||
#define SAMPLE_ADC_SAMPLE_0_VAL ((0x0 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_ADC_SAMPLE_1_VAL ((0x1 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_ADC_SAMPLE_2_VAL ((0x2 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_ADC_SAMPLE_3_VAL ((0x3 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_ADC_SAMPLE_4_VAL ((0x4 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_ADC_SAMPLE_5_VAL ((0x5 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_ADC_SAMPLE_6_VAL ((0x6 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_ADC_SAMPLE_7_VAL ((0x7 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK)
|
||||
|
||||
#define SAMPLE_ADC_DECMT_FACTOR_OFST (4)
|
||||
#define SAMPLE_ADC_DECMT_FACTOR_MSK (0x00000007 << SAMPLE_ADC_DECMT_FACTOR_OFST)
|
||||
#define SAMPLE_ADC_DECMT_FACTOR_0_VAL ((0x0 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK)
|
||||
#define SAMPLE_ADC_DECMT_FACTOR_1_VAL ((0x1 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK)
|
||||
#define SAMPLE_ADC_DECMT_FACTOR_2_VAL ((0x2 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK)
|
||||
#define SAMPLE_ADC_DECMT_FACTOR_3_VAL ((0x3 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK)
|
||||
#define SAMPLE_ADC_DECMT_FACTOR_4_VAL ((0x4 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK)
|
||||
#define SAMPLE_ADC_DECMT_FACTOR_5_VAL ((0x5 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK)
|
||||
#define SAMPLE_ADC_DECMT_FACTOR_6_VAL ((0x6 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK)
|
||||
#define SAMPLE_ADC_DECMT_FACTOR_7_VAL ((0x7 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK)
|
||||
|
||||
#define SAMPLE_DGTL_SAMPLE_SEL_OFST (8)
|
||||
#define SAMPLE_DGTL_SAMPLE_SEL_MSK (0x0000000F << SAMPLE_DGTL_SAMPLE_SEL_OFST)
|
||||
#define SAMPLE_DGTL_SAMPLE_0_VAL ((0x0 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_1_VAL ((0x1 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_2_VAL ((0x2 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_3_VAL ((0x3 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_4_VAL ((0x4 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_5_VAL ((0x5 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_6_VAL ((0x6 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_7_VAL ((0x7 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_8_VAL ((0x8 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_9_VAL ((0x9 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_10_VAL ((0xa << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_11_VAL ((0xb << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_12_VAL ((0xc << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_13_VAL ((0xd << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_14_VAL ((0xe << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
#define SAMPLE_DGTL_SAMPLE_15_VAL ((0xf << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK)
|
||||
|
||||
#define SAMPLE_DGTL_DECMT_FACTOR_OFST (12)
|
||||
#define SAMPLE_DGTL_DECMT_FACTOR_MSK (0x00000003 << SAMPLE_DGTL_DECMT_FACTOR_OFST)
|
||||
#define SAMPLE_DECMT_FACTOR_1_VAL ((0x0 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK)
|
||||
#define SAMPLE_DECMT_FACTOR_2_VAL ((0x1 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK)
|
||||
#define SAMPLE_DECMT_FACTOR_4_VAL ((0x2 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK)
|
||||
|
||||
/** Vref Comp Mod Register */
|
||||
#define VREF_COMP_MOD_REG (0x5C << 11) //Not used in software, TBD in firmware
|
||||
|
||||
/** DAQ Register */
|
||||
#define DAQ_REG (0x5D << 11) //TBD in firmware
|
||||
|
||||
/** carlos ?? */
|
||||
/* settings/conf gain register */
|
||||
#define GAIN_MASK 0x0000ffff
|
||||
#define GAIN_OFFSET 0
|
||||
#define SPEED_GAIN_MASK 0xf0000000
|
||||
#define SPEED_GAIN_OFFSET 28
|
||||
/***************/
|
||||
|
||||
/** Chip Power Register */
|
||||
#define CHIP_POWER_REG (0x5E << 11)
|
||||
|
||||
#define CHIP_POWER_ENABLE_OFST (0)
|
||||
#define CHIP_POWER_ENABLE_MSK (0x00000001 << CHIP_POWER_ENABLE_OFST)
|
||||
|
||||
/* Set Delay 64 bit register */
|
||||
#define SET_DELAY_LSB_REG (0x60 << 11)
|
||||
#define SET_DELAY_MSB_REG (0x61 << 11)
|
||||
|
||||
/* Set Cycles 64 bit register */
|
||||
#define SET_CYCLES_LSB_REG (0x62 << 11)
|
||||
#define SET_CYCLES_MSB_REG (0x63 << 11)
|
||||
|
||||
/* Set Frames 64 bit register */
|
||||
#define SET_FRAMES_LSB_REG (0x64 << 11)
|
||||
#define SET_FRAMES_MSB_REG (0x65 << 11)
|
||||
|
||||
/* Set Period 64 bit register */
|
||||
#define SET_PERIOD_LSB_REG (0x66 << 11)
|
||||
#define SET_PERIOD_MSB_REG (0x67 << 11)
|
||||
|
||||
/* Set Period 64 bit register */
|
||||
#define SET_EXPTIME_LSB_REG (0x68 << 11)
|
||||
#define SET_EXPTIME_MSB_REG (0x69 << 11)
|
||||
|
||||
/* Module Coordinates Register 0 */
|
||||
#define COORD_0 (0x7C << 11)
|
||||
|
||||
#define COORD_0_Y_OFST (0)
|
||||
#define COORD_0_Y_MSK (0x0000FFFF << COORD_0_Y_OFST)
|
||||
#define COORD_0_X_OFST (16)
|
||||
#define COORD_0_X_MSK (0x0000FFFF << COORD_0_X_OFST)
|
||||
|
||||
/* Module Coordinates Register 1 */
|
||||
#define COORD_1 (0x7D << 11)
|
||||
|
||||
#define COORD_0_Z_OFST (0)
|
||||
#define COORD_0_Z_MSK (0x0000FFFF << COORD_0_Z_OFST)
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/**carlos */
|
||||
#define SET_GATES_LSB_REG 106<<11//0x7c<<11
|
||||
#define SET_GATES_MSB_REG 107<<11//0x7d<<11
|
||||
|
||||
|
||||
/**ADC SYNC CLEAN FIFO*/
|
||||
#define ADCSYNC_CLEAN_FIFO_BITS 0x300000
|
||||
#define CLEAN_FIFO_MASK 0x0fffff
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@ -1,121 +0,0 @@
|
||||
/* A simple server in the internet domain using TCP
|
||||
The port number is passed as an argument */
|
||||
|
||||
#include "sls_detector_defs.h"
|
||||
|
||||
#include <stdlib.h>
|
||||
#include "communication_funcs.h"
|
||||
#include "server_funcs.h"
|
||||
#include <string.h>
|
||||
|
||||
|
||||
|
||||
extern int sockfd;
|
||||
extern int phase_shift;
|
||||
|
||||
|
||||
|
||||
void error(char *msg)
|
||||
{
|
||||
perror(msg);
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
int portno, b;
|
||||
char cmd[500];
|
||||
int retval=OK;
|
||||
int sd, fd;
|
||||
int iarg;
|
||||
|
||||
|
||||
for(iarg=1; iarg<argc; iarg++){
|
||||
|
||||
if(!strcasecmp(argv[iarg],"-phaseshift")){
|
||||
if(argc==iarg+1){
|
||||
printf("No phaseshift given. Exiting.\n");
|
||||
return 1;
|
||||
}
|
||||
if ( sscanf(argv[iarg+1],"%d",&phase_shift)==0) {
|
||||
printf("could not decode phase shift\n");
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
else if(!strcasecmp(argv[iarg],"-test")){
|
||||
if(argc==iarg+1){
|
||||
printf("No test condition given. Exiting.\n");
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//stop server
|
||||
if ((argc > 2) && (!strcasecmp(argv[2],"stopserver"))){
|
||||
portno = DEFAULT_PORTNO+1;
|
||||
if ( sscanf(argv[1],"%d",&portno) ==0) {
|
||||
printf("could not open stop server: unknown port\n");
|
||||
return 1;
|
||||
}
|
||||
b=0;
|
||||
printf("\n\nStop Server\nOpening stop server on port %d\n",portno);
|
||||
}
|
||||
|
||||
//control server
|
||||
else {
|
||||
portno = DEFAULT_PORTNO;
|
||||
sprintf(cmd,"%s %d stopserver &",argv[0],DEFAULT_PORTNO+1);
|
||||
printf("\n\nControl Server\nOpening control server on port %d\n",portno );
|
||||
//printf("\n\ncmd:%s\n",cmd);
|
||||
system(cmd);
|
||||
b=1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
init_detector(b);
|
||||
|
||||
|
||||
sd=bindSocket(portno);
|
||||
sockfd=sd;
|
||||
if (getServerError(sd)) {
|
||||
printf("server error!\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* assign function table */
|
||||
function_table();
|
||||
#ifdef VERBOSE
|
||||
printf("function table assigned \n");
|
||||
#endif
|
||||
|
||||
|
||||
/* waits for connection */
|
||||
while(retval!=GOODBYE) {
|
||||
#ifdef VERBOSE
|
||||
printf("\n");
|
||||
#endif
|
||||
#ifdef VERY_VERBOSE
|
||||
printf("Waiting for client call\n");
|
||||
#endif
|
||||
fd=acceptConnection(sockfd);
|
||||
#ifdef VERY_VERBOSE
|
||||
printf("Conenction accepted\n");
|
||||
#endif
|
||||
retval=decode_function(fd);
|
||||
#ifdef VERY_VERBOSE
|
||||
printf("function executed\n");
|
||||
#endif
|
||||
closeConnection(fd);
|
||||
#ifdef VERY_VERBOSE
|
||||
printf("connection closed\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
exitServer(sockfd);
|
||||
printf("Goodbye!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1,158 +0,0 @@
|
||||
#ifndef SERVER_DEFS_H
|
||||
#define SERVER_DEFS_H
|
||||
#include "sls_detector_defs.h"
|
||||
#include <stdint.h>
|
||||
|
||||
#define GOODBYE (-200)
|
||||
|
||||
/* Hardware Definitions */
|
||||
#define NMAXMODY (1)
|
||||
#define NMAXMODX (1)
|
||||
#define NMAXMOD (NMAXMODX * NMAXMODY)
|
||||
#define NMODY (1)
|
||||
#define NMODX (1)
|
||||
#define NMOD (NMODX * NMODY)
|
||||
#define NCHAN (256 * 256)
|
||||
#define NCHIP (8)
|
||||
#define NADC (0)
|
||||
#define NDAC (8)
|
||||
#define NCHANS (NCHAN * NCHIP * NMAXMOD)
|
||||
#define NDACS (NDAC * NMAXMOD)
|
||||
#define DYNAMIC_RANGE (16)
|
||||
#define DATA_BYTES (NMAXMOD * NCHIP * NCHAN * 2)
|
||||
#define IP_PACKETSIZE (0x0522) /**carlos?? calcChecksum*/
|
||||
#define UDP_PACKETSIZE (0x050E) /**carlos?? calcChecksum*/
|
||||
#define CLK_EXPTIME (40) /** 0x28 better name? */
|
||||
#define CLK_FC (20) /** 0x14 better name? */
|
||||
|
||||
#define CLK_FREQ 156.25E+6 /**carlos used in firmware_funcs.. but needed ?*/
|
||||
|
||||
/** Default Acqusition Parameters */
|
||||
#define DEFAULT_NUM_FRAMES (1*1000*1000)
|
||||
#define DEFAULT_NUM_CYCLES (0)
|
||||
#define DEFAULT_EXPTIME (10*1000)
|
||||
#define DEFAULT_PERIOD (2*1000*1000)
|
||||
#define DEFAULT_DELAY (0)
|
||||
#define DEFAULT_NUM_GATES (0)
|
||||
#define DEFAULT_HIGH_VOLTAGE (0)
|
||||
|
||||
/* Other Default Values */
|
||||
//enum DACNAMES { VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBUF, VB_DS, VREF_DS, VREF_COMP };
|
||||
#define DEFAULT_DAC_VALS { 1220, 3000, 1053, 1450, 750, 1000, 480, 420 };
|
||||
enum adcVals {TEMP_FPGA, TEMP_ADC};
|
||||
#define DEFAULT_SETTINGS (DYNAMICGAIN)
|
||||
#define DEFAULT_TX_UDP_PORT (0x7e9a)
|
||||
|
||||
/* Defines in the Firmware */
|
||||
#define FIX_PATT_VAL (0xACDC2014)
|
||||
#define ADC_PORT_INVERT_VAL (0x453b2a9c)
|
||||
#define ADC_OFST_HALF_SPEED_VAL (0x20)
|
||||
#define ADC_OFST_QUARTER_SPEED_VAL (0x10)
|
||||
|
||||
#define SAMPLE_ADC_HALF_SPEED (0x7f7c)
|
||||
#define SAMPLE_ADC_QUARTER_SPEED (0x8981)
|
||||
#define DAQ_HALF_SPEED (0x0)
|
||||
#define DAQ_QUARTER_SPEED (0xf)
|
||||
#define ADC_PHASE_HALF_SPEED (0x41)
|
||||
#define ADC_PHASE_QUARTER_SPEED (0x19)
|
||||
|
||||
/* Maybe not required for jungfrau */
|
||||
#define NTRIMBITS (6)
|
||||
#define NCOUNTBITS (24)
|
||||
#define NCHIPS_PER_ADC (2)
|
||||
#define TRIM_DR (((int)pow(2,NTRIMBITS))-1)
|
||||
#define COUNT_DR (((int)pow(2,NCOUNTBITS))-1)
|
||||
#define ALLMOD (0xffff)
|
||||
#define ALLFIFO (0xffff)
|
||||
|
||||
/* LTC2620 DAC DEFINES */
|
||||
#define LTC2620_DAC_CMD_OFST (20)
|
||||
#define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST)
|
||||
#define LTC2620_DAC_ADDR_OFST (16)
|
||||
#define LTC2620_DAC_ADDR_MSK (0x0000000F << LTC2620_DAC_ADDR_OFST)
|
||||
#define LTC2620_DAC_DATA_OFST (4)
|
||||
#define LTC2620_DAC_DATA_MSK (0x00000FFF << LTC2620_DAC_DATA_OFST)
|
||||
|
||||
#define LTC2620_DAC_CMD_WRITE (0x00000000 << LTC2620_DAC_CMD_OFST)
|
||||
#define LTC2620_DAC_CMD_SET (0x00000003 << LTC2620_DAC_CMD_OFST)
|
||||
#define LTC2620_DAC_CMD_POWER_DOWN (0x00000004 << LTC2620_DAC_CMD_OFST)
|
||||
#define LTC2620_DAC_NUMBITS (24)
|
||||
|
||||
|
||||
/* MAX1932 HV DEFINES */
|
||||
#define MAX1932_HV_NUMBITS (8)
|
||||
#define MAX1932_HV_DATA_OFST (0)
|
||||
#define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST)
|
||||
|
||||
/* AD9257 ADC DEFINES */
|
||||
#define AD9257_ADC_NUMBITS (24)
|
||||
|
||||
#define AD9257_DEV_IND_2_REG (0x04)
|
||||
#define AD9257_CHAN_H_OFST (0)
|
||||
#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST)
|
||||
#define AD9257_CHAN_G_OFST (1)
|
||||
#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST)
|
||||
#define AD9257_CHAN_F_OFST (2)
|
||||
#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST)
|
||||
#define AD9257_CHAN_E_OFST (3)
|
||||
#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST)
|
||||
|
||||
#define AD9257_DEV_IND_1_REG (0x05)
|
||||
#define AD9257_CHAN_D_OFST (0)
|
||||
#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST)
|
||||
#define AD9257_CHAN_C_OFST (1)
|
||||
#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST)
|
||||
#define AD9257_CHAN_B_OFST (2)
|
||||
#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST)
|
||||
#define AD9257_CHAN_A_OFST (3)
|
||||
#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST)
|
||||
#define AD9257_CLK_CH_DCO_OFST (4)
|
||||
#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST)
|
||||
#define AD9257_CLK_CH_IFCO_OFST (5)
|
||||
#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST)
|
||||
|
||||
#define AD9257_POWER_MODE_REG (0x08)
|
||||
#define AD9257_POWER_INTERNAL_OFST (0)
|
||||
#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST)
|
||||
#define AD9257_INT_RESET_VAL (0x3)
|
||||
#define AD9257_INT_CHIP_RUN_VAL (0x0)
|
||||
#define AD9257_POWER_EXTERNAL_OFST (5)
|
||||
#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST)
|
||||
#define AD9257_EXT_FULL_POWER_VAL (0x0)
|
||||
#define AD9257_EXT_STANDBY_VAL (0x1)
|
||||
|
||||
#define AD9257_OUT_MODE_REG (0x14)
|
||||
#define AD9257_OUT_FORMAT_OFST (0)
|
||||
#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST)
|
||||
#define AD9257_OUT_BINARY_OFST_VAL (0)
|
||||
#define AD9257_OUT_TWOS_COMPL_VAL (1)
|
||||
#define AD9257_OUT_LVDS_OPT_OFST (6)
|
||||
#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST)
|
||||
#define AD9257_OUT_LVDS_ANSI_VAL (0)
|
||||
#define AD9257_OUT_LVDS_IEEE_VAL (1)
|
||||
|
||||
#define AD9257_OUT_PHASE_REG (0x16)
|
||||
#define AD9257_OUT_CLK_OFST (0)
|
||||
#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST)
|
||||
#define AD9257_OUT_CLK_60_VAL (0x1)
|
||||
#define AD9257_IN_CLK_OFST (4)
|
||||
#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST)
|
||||
#define AD9257_IN_CLK_0_VAL (0x0)
|
||||
|
||||
#define AD9257_VREF_REG (0x18)
|
||||
#define AD9257_VREF_OFST (0)
|
||||
#define AD9257_VREF_MSK (0x00000003 << AD9257_VREF_OFST)
|
||||
#define AD9257_VREF_1_33_VAL (0x2)
|
||||
|
||||
#define AD9257_TEST_MODE_REG (0x0D)
|
||||
#define AD9257_OUT_TEST_OFST (0)
|
||||
#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST)
|
||||
#define AD9257_NONE_VAL (0x0)
|
||||
#define AD9257_MIXED_BIT_FREQ_VAL (0xC)
|
||||
#define AD9257_TEST_RESET_SHORT_GEN (4)
|
||||
#define AD9257_TEST_RESET_LONG_GEN (5)
|
||||
#define AD9257_USER_IN_MODE_OFST (6)
|
||||
#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST)
|
||||
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,92 +0,0 @@
|
||||
#ifndef SERVER_FUNCS_H
|
||||
#define SERVER_FUNCS_H
|
||||
|
||||
|
||||
#include "sls_detector_defs.h"
|
||||
#include "communication_funcs.h"
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
#define GOODBYE (-200)
|
||||
|
||||
|
||||
int sockfd;
|
||||
|
||||
|
||||
int function_table();
|
||||
int decode_function(int);
|
||||
int init_detector(int);
|
||||
int M_nofunc(int);
|
||||
int exit_server(int);
|
||||
int exec_command(int);
|
||||
|
||||
|
||||
|
||||
// General purpose functions
|
||||
int get_detector_type(int);
|
||||
int set_number_of_modules(int);
|
||||
int get_max_number_of_modules(int);
|
||||
|
||||
|
||||
int set_external_signal_flag(int);
|
||||
int set_external_communication_mode(int);
|
||||
int get_id(int);
|
||||
int digital_test(int);
|
||||
int write_register(int);
|
||||
int read_register(int);
|
||||
int set_dac(int);
|
||||
int get_adc(int);
|
||||
int set_channel(int);
|
||||
int get_channel(int);
|
||||
int set_chip(int);
|
||||
int get_chip(int);
|
||||
int set_module(int);
|
||||
int get_module(int);
|
||||
|
||||
int get_threshold_energy(int);
|
||||
int set_threshold_energy(int);
|
||||
int set_settings(int);
|
||||
int start_acquisition(int);
|
||||
int stop_acquisition(int);
|
||||
int start_readout(int);
|
||||
int get_run_status(int);
|
||||
int read_frame(int);
|
||||
int read_all(int);
|
||||
int start_and_read_all(int);
|
||||
int set_timer(int);
|
||||
int get_time_left(int);
|
||||
int set_dynamic_range(int);
|
||||
int set_roi(int);
|
||||
int get_roi(int);
|
||||
int set_speed(int);
|
||||
int set_readout_flags(int);
|
||||
int execute_trimming(int);
|
||||
int lock_server(int);
|
||||
int set_port(int);
|
||||
int get_last_client_ip(int);
|
||||
int send_update(int);
|
||||
int update_client(int);
|
||||
|
||||
int configure_mac(int);
|
||||
int load_image(int);
|
||||
|
||||
int set_master(int);
|
||||
int set_synchronization(int);
|
||||
|
||||
int read_counter_block(int);
|
||||
int reset_counter_block(int);
|
||||
|
||||
int start_receiver(int);
|
||||
int stop_receiver(int);
|
||||
|
||||
|
||||
int calibrate_pedestal(int);
|
||||
|
||||
int set_roi(int);
|
||||
|
||||
int write_adc_register(int);;
|
||||
|
||||
int program_fpga(int);
|
||||
int reset_fpga(int);
|
||||
int power_chip(int);
|
||||
#endif
|
||||
@ -1,46 +0,0 @@
|
||||
/* A simple server in the internet domain using TCP
|
||||
The port number is passed as an argument */
|
||||
|
||||
|
||||
#include "sls_detector_defs.h"
|
||||
|
||||
|
||||
#include "communication_funcs.h"
|
||||
#include "firmware_funcs.h"
|
||||
|
||||
|
||||
int sockfd;
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
int portno;
|
||||
int retval=0;
|
||||
|
||||
portno = DEFAULT_PORTNO;
|
||||
|
||||
|
||||
bindSocket(portno);
|
||||
if (getServerError())
|
||||
return -1;
|
||||
|
||||
|
||||
|
||||
/* waits for connection */
|
||||
while(retval!=GOODBYE) {
|
||||
#ifdef VERBOSE
|
||||
printf("\n");
|
||||
#endif
|
||||
#ifdef VERY_VERBOSE
|
||||
printf("Stop server: waiting for client call\n");
|
||||
#endif
|
||||
acceptConnection();
|
||||
retval=stopStateMachine();
|
||||
closeConnection();
|
||||
}
|
||||
|
||||
exitServer();
|
||||
printf("Goodbye!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1,26 +0,0 @@
|
||||
CROSS = bfin-uclinux-
|
||||
CC = $(CROSS)gcc
|
||||
CFLAGS += -Wall -DJUNGFRAUD -DSLS_DETECTOR_FUNCTION_LIST -DDACS_INT -DSTOP_SERVER #-DVERBOSEI #-DVERBOSE
|
||||
LDLIBS += -lm -lstdc++
|
||||
|
||||
PROGS = jungfrauDetectorServer
|
||||
DESTDIR ?= bin
|
||||
INSTMODE = 0777
|
||||
|
||||
SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c
|
||||
OBJS = $(SRC_CLNT:.c=.o)
|
||||
|
||||
all: clean $(PROGS)
|
||||
|
||||
boot: $(OBJS)
|
||||
|
||||
$(PROGS): $(OBJS)
|
||||
echo $(OBJS)
|
||||
mkdir -p $(DESTDIR)
|
||||
$(CC) -o $@ $^ $(CFLAGS) $(LDLIBS)
|
||||
mv $(PROGS) $(DESTDIR)
|
||||
rm *.gdb
|
||||
|
||||
clean:
|
||||
rm -rf $(DESTDIR)/$(PROGS) *.o
|
||||
|
||||
@ -1,25 +0,0 @@
|
||||
CC = gcc
|
||||
CFLAGS += -Wall -DJUNGFRAUD -DSLS_DETECTOR_FUNCTION_LIST -DDACS_INT -DSTOP_SERVER #-DVERBOSEI #-DVERBOSE
|
||||
LDLIBS += -lm -lstdc++
|
||||
|
||||
PROGS = jungfrauDetectorServer
|
||||
DESTDIR ?= bin
|
||||
INSTMODE = 0777
|
||||
|
||||
SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c
|
||||
OBJS = $(SRC_CLNT:.c=.o)
|
||||
|
||||
all: clean $(PROGS)
|
||||
|
||||
boot: $(OBJS)
|
||||
|
||||
$(PROGS): $(OBJS)
|
||||
echo $(OBJS)
|
||||
mkdir -p $(DESTDIR)
|
||||
$(CC) -o $@ $^ $(CFLAGS) $(LDLIBS)
|
||||
mv $(PROGS) $(DESTDIR)
|
||||
rm *.gdb
|
||||
|
||||
clean:
|
||||
rm -rf $(DESTDIR)/$(PROGS) *.o
|
||||
|
||||
@ -1 +0,0 @@
|
||||
../../slsReceiverSoftware/include/ansi.h
|
||||
@ -1 +0,0 @@
|
||||
../commonFiles/communication_funcs.c
|
||||
@ -1 +0,0 @@
|
||||
../commonFiles/communication_funcs.h
|
||||
@ -1,9 +0,0 @@
|
||||
Path: slsDetectorsPackage/slsDetectorSoftware/jungfrauDetectorServer
|
||||
URL: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git/jungfrauDetectorServer
|
||||
Repository Root: origin git@git.psi.ch:sls_detectors_software/sls_detector_software.git
|
||||
Repsitory UUID: 230d6b36e9852214f4ba5ae7c92647f35000b24d
|
||||
Revision: 56
|
||||
Branch: developer
|
||||
Last Changed Author: Dhanya_Maliakal
|
||||
Last Changed Rev: 1313
|
||||
Last Changed Date: 2016-11-30 10:36:34 +0100
|
||||
@ -1,11 +0,0 @@
|
||||
//#define SVNPATH ""
|
||||
#define SVNURL "git@git.psi.ch:sls_detectors_software/sls_detector_software.git/jungfrauDetectorServer"
|
||||
//#define SVNREPPATH ""
|
||||
#define SVNREPUUID "230d6b36e9852214f4ba5ae7c92647f35000b24d"
|
||||
//#define SVNREV 0x1313
|
||||
//#define SVNKIND ""
|
||||
//#define SVNSCHED ""
|
||||
#define SVNAUTH "Dhanya_Maliakal"
|
||||
#define SVNREV 0x1313
|
||||
#define SVNDATE 0x20161130
|
||||
//
|
||||
@ -1,11 +0,0 @@
|
||||
//#define SVNPATH ""
|
||||
#define SVNURL ""
|
||||
//#define SVNREPPATH ""
|
||||
#define SVNREPUUID ""
|
||||
//#define SVNREV ""
|
||||
//#define SVNKIND ""
|
||||
//#define SVNSCHED ""
|
||||
#define SVNAUTH ""
|
||||
#define SVNREV ""
|
||||
#define SVNDATE ""
|
||||
//
|
||||
@ -1 +0,0 @@
|
||||
../commonFiles/sls_detector_defs.h
|
||||
@ -1 +0,0 @@
|
||||
../commonFiles/sls_detector_funcs.h
|
||||
@ -1 +0,0 @@
|
||||
../../slsReceiverSoftware/include/sls_receiver_defs.h
|
||||
@ -1 +0,0 @@
|
||||
../../slsReceiverSoftware/include/sls_receiver_funcs.h
|
||||
Loading…
x
Reference in New Issue
Block a user