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Fix ctb slow adc fw (#713)

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Firmware updated. spi moved to firmware. In Software, configuring, then a pulse to start, wait for done bit and convert the values read from a regiter.
This commit is contained in:
Dhanya Thattil
2023-04-12 11:25:41 +02:00
committed by GitHub
parent b442b17415
commit cab2b335dc
10 changed files with 210 additions and 327 deletions
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1
slsDetectorServers/ctbDetectorServer/CMakeLists.txt
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@ -10,7 +10,6 @@ add_executable(ctbDetectorServer_virtual
../slsDetectorServer/src/commonServerFunctions.c
../slsDetectorServer/src/communication_funcs_UDP.c
../slsDetectorServer/src/UDPPacketHeaderGenerator.c
../slsDetectorServer/src/AD7689.c
../slsDetectorServer/src/AD9257.c
../slsDetectorServer/src/ALTERA_PLL.c
../slsDetectorServer/src/I2C.c

2
slsDetectorServers/ctbDetectorServer/Makefile
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@ -16,7 +16,7 @@ DESTDIR ?= bin
INSTMODE = 0777
SRCS = slsDetectorFunctionList.c
SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)blackfin.c $(main_src)common.c $(main_src)commonServerFunctions.c $(main_src)communication_funcs_UDP.c $(main_src)UDPPacketHeaderGenerator.c $(main_src)AD7689.c $(main_src)AD9257.c $(main_src)ALTERA_PLL.c $(main_src)I2C.c $(main_src)INA226.c $(main_src)LTC2620.c $(main_src)MAX1932.c $(main_src)programViaBlackfin.c $(main_src)/sharedMemory.c $(main_src)/loadPattern.c $(md5_dir)md5.c
SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)blackfin.c $(main_src)common.c $(main_src)commonServerFunctions.c $(main_src)communication_funcs_UDP.c $(main_src)UDPPacketHeaderGenerator.c $(main_src)AD9257.c $(main_src)ALTERA_PLL.c $(main_src)I2C.c $(main_src)INA226.c $(main_src)LTC2620.c $(main_src)MAX1932.c $(main_src)programViaBlackfin.c $(main_src)/sharedMemory.c $(main_src)/loadPattern.c $(md5_dir)md5.c
OBJS = $(SRCS:.c=.o)

104
slsDetectorServers/ctbDetectorServer/RegisterDefs.h
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@ -184,12 +184,6 @@
#define POWER_STATUS_ALRT_OFST (27)
#define POWER_STATUS_ALRT_MSK (0x0000001F << POWER_STATUS_ALRT_OFST)
/* DAC Value Out RO register */
//#define DAC_VAL_OUT_REG (0x2A << MEM_MAP_SHIFT)
/* Slow ADC SPI Value RO register */
#define ADC_SPI_SLOW_VAL_REG (0x2B << MEM_MAP_SHIFT)
/* FIFO Digital In Status RO register */
#define FIFO_DIN_STATUS_REG (0x3B << MEM_MAP_SHIFT)
#define FIFO_DIN_STATUS_FIFO_FULL_OFST (30)
@ -228,12 +222,6 @@
#define ADC_SPI_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SRL_DT_OTPT_OFST)
#define ADC_SPI_SRL_CS_OTPT_OFST (2)
#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SRL_CS_OTPT_OFST)
#define ADC_SPI_SLOW_SRL_DT_OFST (8)
#define ADC_SPI_SLOW_SRL_DT_MSK (0x00000001 << ADC_SPI_SLOW_SRL_DT_OFST)
#define ADC_SPI_SLOW_SRL_CLK_OFST (9)
#define ADC_SPI_SLOW_SRL_CLK_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CLK_OFST)
#define ADC_SPI_SLOW_SRL_CNV_OFST (10)
#define ADC_SPI_SLOW_SRL_CNV_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CNV_OFST)
/* ADC Offset RW register */
#define ADC_OFFSET_REG (0x42 << MEM_MAP_SHIFT)
@ -634,6 +622,98 @@
#define PATTERN_WAIT_TIMER_5_LSB_REG (0x91 << MEM_MAP_SHIFT)
#define PATTERN_WAIT_TIMER_5_MSB_REG (0x92 << MEM_MAP_SHIFT)
/* Slow ADC SPI Value RO register */
#define ADC_SLOW_DATA_REG (0x93 << MEM_MAP_SHIFT)
/* Slow ADC SPI Value Config register */
#define ADC_SLOW_CFG_REG (0x94 << MEM_MAP_SHIFT)
/** Read back CFG Register */
#define ADC_SLOW_CFG_RB_OFST (2)
#define ADC_SLOW_CFG_RB_MSK (0x00000001 << ADC_SLOW_CFG_RB_OFST)
/** Channel sequencer */
#define ADC_SLOW_CFG_SEQ_OFST (3)
#define ADC_SLOW_CFG_SEQ_MSK (0x00000003 << ADC_SLOW_CFG_SEQ_OFST)
#define ADC_SLOW_CFG_SEQ_DSBLE_VAL \
((0x0 << ADC_SLOW_CFG_SEQ_OFST) & ADC_SLOW_CFG_SEQ_MSK)
#define ADC_SLOW_CFG_SEQ_UPDTE_DRNG_SQNCE_VAL \
((0x1 << ADC_SLOW_CFG_SEQ_OFST) & ADC_SLOW_CFG_SEQ_MSK)
#define ADC_SLOW_CFG_SEQ_SCN_WTH_TMP_VAL \
((0x2 << ADC_SLOW_CFG_SEQ_OFST) & ADC_SLOW_CFG_SEQ_MSK)
#define ADC_SLOW_CFG_SEQ_SCN_WTHT_TMP_VAL \
((0x3 << ADC_SLOW_CFG_SEQ_OFST) & ADC_SLOW_CFG_SEQ_MSK)
/** Reference/ buffer selection */
#define ADC_SLOW_CFG_REF_OFST (5)
#define ADC_SLOW_CFG_REF_MSK (0x00000007 << ADC_SLOW_CFG_REF_OFST)
/** Internal reference. REF = 2.5V buffered output. Temperature sensor enabled.
*/
#define ADC_SLOW_CFG_REF_INT_2500MV_VAL \
((0x0 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_OFST)
/** Internal reference. REF = 4.096V buffered output. Temperature sensor
* enabled. */
#define ADC_SLOW_CFG_REF_INT_4096MV_VAL \
((0x1 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_MSK)
/** External reference. Temperature sensor enabled. Internal buffer disabled. */
#define ADC_SLOW_CFG_REF_EXT_TMP_VAL \
((0x2 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_MSK)
/** External reference. Temperature sensor enabled. Internal buffer enabled. */
#define ADC_SLOW_CFG_REF_EXT_TMP_INTBUF_VAL \
((0x3 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_MSK)
/** External reference. Temperature sensor disabled. Internal buffer disabled.
*/
#define ADC_SLOW_CFG_REF_EXT_VAL \
((0x6 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_MSK)
/** External reference. Temperature sensor disabled. Internal buffer enabled. */
#define ADC_SLOW_CFG_REF_EXT_INTBUF_VAL \
((0x7 << ADC_SLOW_CFG_REF_OFST) & ADC_SLOW_CFG_REF_MSK)
/** bandwidth of low pass filter */
#define ADC_SLOW_CFG_BW_OFST (8)
#define ADC_SLOW_CFG_BW_MSK (0x00000001 << ADC_SLOW_CFG_REF_OFST)
#define ADC_SLOW_CFG_BW_ONE_FOURTH_VAL \
((0x0 << ADC_SLOW_CFG_BW_OFST) & ADC_SLOW_CFG_BW_MSK)
#define ADC_SLOW_CFG_BW_FULL_VAL ((0x1 << ADC_SLOW_CFG_BW_OFST) & ADC_SLOW_CFG_BW_MSK)
/** input channel selection IN0 - IN7 */
#define ADC_SLOW_CFG_IN_OFST (9)
#define ADC_SLOW_CFG_IN_MSK (0x00000007 << ADC_SLOW_CFG_IN_OFST)
/** input channel configuration */
#define ADC_SLOW_CFG_INCC_OFST (12)
#define ADC_SLOW_CFG_INCC_MSK (0x00000007 << ADC_SLOW_CFG_INCC_OFST)
#define ADC_SLOW_CFG_INCC_BPLR_DFFRNTL_PRS_VAL \
((0x0 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
#define ADC_SLOW_CFG_INCC_BPLR_IN_COM_VAL \
((0x2 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
#define ADC_SLOW_CFG_INCC_TMP_VAL \
((0x3 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
#define ADC_SLOW_CFG_INCC_UNPLR_DFFRNTL_PRS_VAL \
((0x4 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
#define ADC_SLOW_CFG_INCC_UNPLR_IN_COM_VAL \
((0x6 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
#define ADC_SLOW_CFG_INCC_UNPLR_IN_GND_VAL \
((0x7 << ADC_SLOW_CFG_INCC_OFST) & ADC_SLOW_CFG_INCC_MSK)
/** configuration update */
#define ADC_SLOW_CFG_CFG_OFST (15)
#define ADC_SLOW_CFG_CFG_MSK (0x00000001 << ADC_SLOW_CFG_CFG_OFST)
#define ADC_SLOW_CFG_CFG_NO_UPDATE_VAL \
((0x0 << ADC_SLOW_CFG_CFG_OFST) & ADC_SLOW_CFG_CFG_MSK)
#define ADC_SLOW_CFG_CFG_OVRWRTE_VAL \
((0x1 << ADC_SLOW_CFG_CFG_OFST) & ADC_SLOW_CFG_CFG_MSK)
/* Slow ADC SPI Value Control register */
#define ADC_SLOW_CTRL_REG (0x95 << MEM_MAP_SHIFT)
#define ADC_SLOW_CTRL_STRT_OFST (0)
#define ADC_SLOW_CTRL_STRT_MSK (0x00000001 << ADC_SLOW_CTRL_STRT_OFST)
#define ADC_SLOW_CTRL_DONE_OFST (1)
#define ADC_SLOW_CTRL_DONE_MSK (0x00000001 << ADC_SLOW_CTRL_DONE_OFST)
/** I2C Control register */
#define I2C_TRANSFER_COMMAND_FIFO_REG (0x100 << MEM_MAP_SHIFT)
#define I2C_RX_DATA_FIFO_REG (0x101 << MEM_MAP_SHIFT)

BIN
slsDetectorServers/ctbDetectorServer/bin/ctbDetectorServer_developer
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Binary file not shown.

119
slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c
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@ -5,7 +5,6 @@
#include "sharedMemory.h"
#include "sls/versionAPI.h"
#include "AD7689.h" // slow adcs
#include "ALTERA_PLL.h" // pll
#include "INA226.h" // i2c
#include "LTC2620.h" // dacs
@ -534,13 +533,6 @@ void setupDetector() {
AD9257_Disable();
AD9257_Configure();
// slow adcs
AD7689_SetDefines(ADC_SPI_REG, ADC_SPI_SLOW_VAL_REG,
ADC_SPI_SLOW_SRL_CNV_MSK, ADC_SPI_SLOW_SRL_CLK_MSK,
ADC_SPI_SLOW_SRL_DT_MSK, ADC_SPI_SLOW_SRL_DT_OFST);
AD7689_Disable();
AD7689_Configure();
// dacs
LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK,
SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK,
@ -1473,7 +1465,7 @@ int getADC(enum ADCINDEX ind) {
// slow adcs
case S_TMP:
LOG(logDEBUG1, ("Reading Slow ADC Temperature\n"));
return AD7689_GetTemperature();
return getSlowADCTemperature();
case S_ADC0:
case S_ADC1:
case S_ADC2:
@ -1483,13 +1475,120 @@ int getADC(enum ADCINDEX ind) {
case S_ADC6:
case S_ADC7:
LOG(logDEBUG1, ("Reading Slow ADC Channel %d\n", (int)ind - S_ADC0));
return AD7689_GetChannel((int)ind - S_ADC0);
return getSlowADC((int)ind - S_ADC0);
default:
LOG(logERROR, ("Adc Index %d not defined \n", (int)ind));
return -1;
}
}
int getSlowADC(int ichan) {
LOG(logDEBUG1, ("Getting slow adc channel %d\n", ichan));
// configure for channel
bus_w(ADC_SLOW_CFG_REG,
// don't read back config reg
ADC_SLOW_CFG_RB_MSK |
// disable sequencer (different from config)
ADC_SLOW_CFG_SEQ_DSBLE_VAL |
// Internal reference. REF = 2.5V buffered output. Temperature sensor
// enabled.
ADC_SLOW_CFG_REF_INT_2500MV_VAL |
// full bandwidth of low pass filter
ADC_SLOW_CFG_BW_FULL_VAL |
// specific channel (different from config)
((ichan << ADC_SLOW_CFG_IN_OFST) & ADC_SLOW_CFG_IN_MSK) |
// input channel configuration (unipolar. inx to gnd)
ADC_SLOW_CFG_INCC_UNPLR_IN_GND_VAL |
// overwrite configuration
ADC_SLOW_CFG_CFG_OVRWRTE_VAL);
// start converting
bus_w(ADC_SLOW_CTRL_REG, bus_r(ADC_SLOW_CTRL_REG) | ADC_SLOW_CTRL_STRT_MSK);
bus_w(ADC_SLOW_CTRL_REG, bus_r(ADC_SLOW_CTRL_REG) & ~ADC_SLOW_CTRL_STRT_MSK);
// wait for it to be done
volatile int done = ((bus_r(ADC_SLOW_CTRL_REG) & ADC_SLOW_CTRL_DONE_MSK) >> ADC_SLOW_CTRL_DONE_OFST);
while (!done) {
done = ((bus_r(ADC_SLOW_CTRL_REG) & ADC_SLOW_CTRL_DONE_MSK) >> ADC_SLOW_CTRL_DONE_OFST);
}
// readout
int regval = bus_r(ADC_SLOW_DATA_REG);
// value in uV
int refMaxuv = 2500 * 1000;
int regMinuv = 0;
int maxSteps = 0xFFFF + 1;
int retval = 0;
if (ConvertToDifferentRange(0, maxSteps, regMinuv, refMaxuv, regval, &retval) == FAIL) {
LOG(logERROR, ("Could not convert slow adc channel (regval:0x%x) to uv\n", regval));
return -1;
}
LOG(logINFO,
("\tRead slow adc [%d]: %d uV (reg: 0x%x)\n", ichan, retval, regval));
return retval;
}
int getSlowADCTemperature() {
LOG(logDEBUG1, ("Getting slow adc temperature\n"));
// configure for channel
bus_w(ADC_SLOW_CFG_REG,
// don't read back config reg
ADC_SLOW_CFG_RB_MSK |
// disable sequencer (different from config)
ADC_SLOW_CFG_SEQ_DSBLE_VAL |
// Internal reference. REF = 2.5V buffered output. Temperature sensor
// enabled.
ADC_SLOW_CFG_REF_INT_2500MV_VAL |
// full bandwidth of low pass filter
ADC_SLOW_CFG_BW_FULL_VAL |
// all channels
ADC_SLOW_CFG_IN_MSK |
// temp sensor
ADC_SLOW_CFG_INCC_TMP_VAL |
// overwrite configuration
ADC_SLOW_CFG_CFG_OVRWRTE_VAL);
// start converting
bus_w(ADC_SLOW_CTRL_REG, bus_r(ADC_SLOW_CTRL_REG) | ADC_SLOW_CTRL_STRT_MSK);
bus_w(ADC_SLOW_CTRL_REG, bus_r(ADC_SLOW_CTRL_REG) & ~ADC_SLOW_CTRL_STRT_MSK);
// wait for it to be done
volatile int done = ((bus_r(ADC_SLOW_CTRL_REG) & ADC_SLOW_CTRL_DONE_MSK) >> ADC_SLOW_CTRL_DONE_OFST);
while (!done) {
done = ((bus_r(ADC_SLOW_CTRL_REG) & ADC_SLOW_CTRL_DONE_MSK) >> ADC_SLOW_CTRL_DONE_OFST);
}
// readout
int regval = bus_r(ADC_SLOW_DATA_REG);
// value in mV FIXME: page 17? reference voltage temperature coefficient or
// t do with -40 to 85 °C
int retval = 0;
int maxSteps = 0xFFFF + 1;
int minmv = 0;
int maxmv = 2500;
if (ConvertToDifferentRange(0, maxSteps, minmv,
maxmv, regval, &retval) == FAIL) {
LOG(logERROR, ("Could not convert slow adc temp (regval:0x%x) to uv\n", regval));
return -1;
}
LOG(logDEBUG1, ("voltage read for temp: %d mV\n", retval));
// value in °C
double tempCFor1mv = (25.00 / 283.00);
double tempValue = tempCFor1mv * (double)retval;
LOG(logINFO, ("\tTemp slow adc : %f °C (reg: %d)\n", tempValue, regval));
return tempValue;
}
int setHighVoltage(int val) {
// setting hv
if (val >= 0) {

2
slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h
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@ -5,7 +5,7 @@
#include "sls/sls_detector_defs.h"
#define MIN_REQRD_VRSN_T_RD_API 0x181130
#define REQRD_FRMWR_VRSN 0x221205
#define REQRD_FRMWR_VRSN 0x230403
#define NUM_HARDWARE_VERSIONS (1)
#define HARDWARE_VERSION_NUMBERS \