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badchannels done

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This commit is contained in:
maliakal_d
2020-07-15 18:24:17 +02:00
parent d7f490701b
commit ca298580f3
13 changed files with 362 additions and 24 deletions
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17
slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h
View File

@ -78,14 +78,11 @@
/* Status register */
#define STATUS_REG (0x04 * REG_OFFSET + BASE_CONTROL)
/* Look at me read only register */
#define LOOK_AT_ME_REG (0x05 * REG_OFFSET + BASE_CONTROL)
/* System status register */
#define SYSTEM_STATUS_REG (0x06 * REG_OFFSET + BASE_CONTROL)
#define SYSTEM_STATUS_REG (0x05 * REG_OFFSET + BASE_CONTROL)
/* Config RW regiseter */
#define CONFIG_REG (0x20 * REG_OFFSET + BASE_CONTROL)
#define CONFIG_REG (0x08 * REG_OFFSET + BASE_CONTROL)
#define CONFIG_VETO_ENBL_OFST (0)
#define CONFIG_VETO_ENBL_MSK (0x00000001 << CONFIG_VETO_ENBL_OFST)
@ -93,7 +90,7 @@
#define CONFIG_VETO_CH_10GB_ENBL_MSK (0x00000001 << CONFIG_VETO_CH_10GB_ENBL_OFST)
/* Control RW register */
#define CONTROL_REG (0x21 * REG_OFFSET + BASE_CONTROL)
#define CONTROL_REG (0x09 * REG_OFFSET + BASE_CONTROL)
#define CONTROL_STRT_ACQSTN_OFST (0)
#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST)
@ -111,12 +108,16 @@
#define CONTROL_PWR_CHIP_MSK (0x00000001 << CONTROL_PWR_CHIP_OFST)
/** DTA Offset Register */
#define DTA_OFFSET_REG (0x24 * REG_OFFSET + BASE_CONTROL)
#define DTA_OFFSET_REG (0x0A * REG_OFFSET + BASE_CONTROL)
/** Mask Strip Registers (40) */
#define MASK_STRIP_START_REG (0x18 * REG_OFFSET + BASE_CONTROL)
#define MASK_STRIP_NUM_REGS (40)
/* ASIC registers --------------------------------------------------*/
/* ASIC Config register */
#define ASIC_CONFIG_REG (0x00 * REG_OFFSET + BASE_ASIC)
#define ASIC_CONFIG_REG (0x00 * REG_OFFSET + BASE_ASIC)
#define ASIC_CONFIG_RUN_MODE_OFST (0)
#define ASIC_CONFIG_RUN_MODE_MSK (0x00000003 << ASIC_CONFIG_RUN_MODE_OFST)

66
slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
View File

@ -2316,6 +2316,72 @@ int getVeto() {
CONFIG_VETO_ENBL_OFST);
}
void setBadChannels(int nch, int *channels) {
LOG(logINFO, ("Setting %d bad channels\n", nch));
int numAddr = MASK_STRIP_NUM_REGS;
int startAddr = MASK_STRIP_START_REG;
// resetting all mask registers first
for (int iaddr = 0; iaddr < numAddr; ++iaddr) {
uint32_t addr = startAddr + iaddr * REG_OFFSET;
bus_w(addr, 0);
}
// setting badchannels, loop through list
for (int i = 0; i < nch; ++i) {
LOG(logINFO, ("\t[%d]: %d\n", i, channels[i]));
int iaddr = channels[i] / 32;
int iBit = channels[i] % 32;
uint32_t addr = startAddr + iaddr * REG_OFFSET;
LOG(logDEBUG1,
("val:%d iaddr:%d iBit:%d, addr:0x%x old:0x%x val:0x%x\n",
channels[i], iaddr, iBit, addr, bus_r(addr), (1 << iBit)));
bus_w(addr, bus_r(addr) | (1 << iBit));
}
}
int *getBadChannels(int *nch) {
int *retvals = NULL;
// count number of bad channels
*nch = 0;
for (int i = 0; i < MASK_STRIP_NUM_REGS; ++i) {
uint32_t addr = MASK_STRIP_START_REG + i * REG_OFFSET;
*nch += __builtin_popcount(bus_r(addr));
}
if (*nch > 0) {
// get list of bad channels
retvals = malloc(*nch * sizeof(int));
if (retvals == NULL) {
*nch = -1;
return NULL;
}
int chIndex = 0;
int numAddr = MASK_STRIP_NUM_REGS;
// loop through registers
for (int iaddr = 0; iaddr < numAddr; ++iaddr) {
// calculate address and get value
uint32_t addr = MASK_STRIP_START_REG + iaddr * REG_OFFSET;
uint32_t val = bus_r(addr);
// loop through 32 bits
for (int iBit = 0; iBit < 32; ++iBit) {
// masked, add to list
if ((val >> iBit) & 0x1) {
LOG(logDEBUG1, ("iaddr:%d iBit:%d val:0x%x, ch:%d\n", iaddr,
iBit, val, iaddr * 32 + iBit));
retvals[chIndex++] = iaddr * 32 + iBit;
}
}
}
}
// debugging
LOG(logDEBUG1, ("Reading Bad channel list\n"));
for (int i = 0; i < (*nch); ++i) {
LOG(logDEBUG1, ("[%d]: %d\n", i, retvals[i]));
}
return retvals;
}
/* aquisition */
int startStateMachine() {