From c96939cf94cc6deab97b2485ef86f4cead4fa169 Mon Sep 17 00:00:00 2001 From: Dhanya Thattil Date: Mon, 17 Jun 2019 11:45:56 +0200 Subject: [PATCH] neglible change --- slsDetectorServers/slsDetectorServer/AD9257.h | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/slsDetectorServers/slsDetectorServer/AD9257.h b/slsDetectorServers/slsDetectorServer/AD9257.h index 25536092b..d101cbeff 100755 --- a/slsDetectorServers/slsDetectorServer/AD9257.h +++ b/slsDetectorServers/slsDetectorServer/AD9257.h @@ -267,21 +267,13 @@ void AD9257_Configure(){ FILE_LOG(logINFO, ("\tPower mode chip run\n")); AD9257_Set(AD9257_POWER_MODE_REG, AD9257_INT_CHIP_RUN_VAL); - // binary offset - FILE_LOG(logINFO, ("\tBinary offset\n")); - AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_BINARY_OFST_VAL); + // binary offset, lvds-iee reduced + FILE_LOG(logINFO, ("\tBinary offset, Lvds-ieee reduced\n")); + AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_BINARY_OFST_VAL | AD9257_OUT_LVDS_IEEE_VAL); //output clock phase -#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) - FILE_LOG(logINFO, ("\tOutput clock phase is at default: 180\n")); -#else - FILE_LOG(logINFO, ("\tOutput clock phase: 60\n")); - AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_60_VAL); -#endif - - // lvds-iee reduced , binary offset - FILE_LOG(logINFO, ("\tLvds-iee reduced, binary offset\n")); - AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_LVDS_IEEE_VAL); + FILE_LOG(logINFO, ("\tOutput clock phase: 180\n")); + AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_180_VAL); // all devices on chip to receive next command FILE_LOG(logINFO, ("\tAll devices on chip to receive next command\n"));