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https://github.com/slsdetectorgroup/slsDetectorPackage.git
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jungfrau detector server starts in CPU_NOT_10GB mode; ADC VREF put to 1V
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@ -1039,15 +1039,15 @@ int startReceiver(int start) {
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int reg=bus_r(addr);
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int reg=bus_r(addr);
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//for start recever, write 0 and for stop, write 1
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//for start recever, write 0 and for stop, write 1
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if (!start)
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if (!start)
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bus_w(CONFIG_REG,reg|CPU_OR_RECEIVER_BIT);
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bus_w(CONFIG_REG,reg&(~GB10_NOT_CPU_BIT));
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else
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else
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bus_w(CONFIG_REG,reg&(~CPU_OR_RECEIVER_BIT));
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bus_w(CONFIG_REG,reg|GB10_NOT_CPU_BIT);
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reg=bus_r(addr);
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reg=bus_r(addr);
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//#ifdef VERBOSE
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//#ifdef VERBOSE
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printf("Config Reg %x\n", reg);
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printf("Config Reg %x\n", reg);
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//#endif
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//#endif
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int d =reg&CPU_OR_RECEIVER_BIT;
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int d =reg&GB10_NOT_CPU_BIT;
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if(d!=0) d=1;
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if(d!=0) d=1;
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if(d!=start)
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if(d!=start)
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return OK;
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return OK;
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@ -2279,8 +2279,6 @@ int prepareADC(){
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codata=0;
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codata=0;
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writeADC(0x08,0x3);
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writeADC(0x08,0x3);
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writeADC(0x08,0x0);
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writeADC(0x08,0x0);
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writeADC(0x14,0x40);//lvds reduced range
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// writeADC(0x14,0x00);//lvds
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writeADC(0x16,0x01);//output clock phase
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writeADC(0x16,0x01);//output clock phase
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@ -2288,6 +2286,10 @@ int prepareADC(){
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// writeADC(0x16,0x4);//output clock phase
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// writeADC(0x16,0x4);//output clock phase
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writeADC(0x18,0x0);// vref 1V
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writeADC(0x14,0x40);//lvds reduced range -- offset binary
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writeADC(0xD,0x0);//no test mode
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writeADC(0xD,0x0);//no test mode
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#ifdef TESTADC
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#ifdef TESTADC
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@ -392,7 +392,7 @@
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#define TOT_ENABLE_BIT 0x00000002
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#define TOT_ENABLE_BIT 0x00000002
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#define TIMED_GATE_BIT 0x00000004
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#define TIMED_GATE_BIT 0x00000004
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#define CONT_RO_ENABLE_BIT 0x00080000
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#define CONT_RO_ENABLE_BIT 0x00080000
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#define CPU_OR_RECEIVER_BIT 0x00001000
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#define GB10_NOT_CPU_BIT 0x00001000
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