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1. Ctb transceiver ro (#773)

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*  transceiverenable, tsamples, romode for tranceiver and digital_transceiver

* 202 spec instr only for transceiver mode

* removed check for empty in trans readout and clean memory before reading from fifo

* ctb read fifo strobe for all after reading all channels, adding 1us after selecting channel, changing fw date

* updated 10gb transceiver enable

----
* added transceiver (tsamples, romode(transceiver, digital_transceiver), transceiverenable (mask)

* clean memory before reading from fifo (for analog and digital as well)

* read fifo then read strobe (also corresp fw) fixes number of reads (also for analg and digital)-> increases all pipelines by 1

* fixed bug in rearranging digital data in receiver

* fixed bug in streaming size of data after rearranging

* fixed bug in setbit, clearbit,and getbit

* status checks fifo before returning idle (transmitting if data in fifo if transceiver more enabled)

* soem matterhorn specifics that will need to be put into pattern in a month or two. this is temporary.

* NOTE: breaking api. rxParameters struct has transceiverenabel and tsamples given from det to receiver
This commit is contained in:
maliakal_d
2023-07-14 16:29:21 +02:00
committed by GitHub
parent a56be25500
commit c628ae2192
30 changed files with 1118 additions and 238 deletions
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8
slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h
View File

@ -5,7 +5,7 @@
#include "sls/sls_detector_defs.h"
#define MIN_REQRD_VRSN_T_RD_API 0x181130
#define REQRD_FRMWR_VRSN 0x230403
#define REQRD_FRMWR_VRSN 0x230705
#define NUM_HARDWARE_VERSIONS (1)
#define HARDWARE_VERSION_NUMBERS \
@ -18,9 +18,11 @@
#define CTRL_SRVR_INIT_TIME_US (2 * 1000 * 1000)
/* Hardware Definitions */
#define NCHAN (36)
#define NCHAN (40)
#define NCHAN_ANALOG (32)
#define NCHAN_DIGITAL (64)
#define NCHAN_TRANSCEIVER (4)
#define NBITS_PER_TRANSCEIVER (64)
#define NCHIP (1)
#define NDAC (24)
#define NPWR (6)
@ -52,6 +54,8 @@
#define DEFAULT_ADC_CLK (40) // 20
#define DEFAULT_SYNC_CLK (40) // 20
#define DEFAULT_DBIT_CLK (200)
#define DEFAULT_TRANSCEIVER_MASK (0x3)
#define MAX_TRANSCEIVER_MASK (0xF)
#define UDP_HEADER_MAX_FRAME_VALUE (0xFFFFFFFFFFFF)