From c13ab291325a5f127768313772fbc5a15fc69b7e Mon Sep 17 00:00:00 2001 From: Alice Date: Thu, 5 Mar 2026 15:48:07 +0100 Subject: [PATCH] some format changes --- etc/generate_registerdefs.py | 19 ++- .../matterhonServer/include/RegisterDefs.hpp | 156 ++++++++++++------ .../include/RegisterHelperStructs.hpp | 12 +- 3 files changed, 131 insertions(+), 56 deletions(-) diff --git a/etc/generate_registerdefs.py b/etc/generate_registerdefs.py index 11960d255..7a05dc2d7 100644 --- a/etc/generate_registerdefs.py +++ b/etc/generate_registerdefs.py @@ -32,8 +32,11 @@ def argument_parser(): # TODO: should be configurable header = r""" +// clang-format off #include "RegisterHelperStructs.hpp" +namespace sls { + /// @brief Enum for IP cores, value are adresses constexpr enum class IPCore : uint32_t { MH_RO_SM_AXI = 0, // dummy adresses for now @@ -45,6 +48,11 @@ constexpr enum class IPCore : uint32_t { }; """ +postpend = r""" +} // namespace sls +// clang-format on +""" + def main(): args = argument_parser() @@ -68,7 +76,10 @@ def main(): register_name = row["Reg_name"] ip_core_name = row["Interface"] - define_register_string = f'constexpr Register {register_name}{{{Ip_core_name_to_enum_type(ip_core_name)}, {hex(int(local_address_offset_in_bytes, 16))}}};' + define_register_string = ( + f"constexpr Register {register_name}{{" + f"{Ip_core_name_to_enum_type(ip_core_name)}, {hex(int(local_address_offset_in_bytes, 16))}}};" + ) header_file.write(f"{define_register_string}\n") header_file.write("\n") @@ -86,11 +97,15 @@ def main(): to_bit = row["To_bit"] mask, offset = create_bitmask_and_offset(from_bit, to_bit) - define_registerfield_string = f"constexpr RegisterField {field_name}{{{register_name}, {hex(mask)}, {offset}}};" + define_registerfield_string = ( + f"constexpr RegisterField {field_name}{{\n" + f" {register_name}, {offset}, {hex(mask)}}};" + ) header_file.write(f"{define_registerfield_string}\n") header_file.write("\n") + header_file.write(postpend) # TODO: have to take care xof it manually when in append mode - ugly header_file.close() diff --git a/slsDetectorServers/matterhonServer/include/RegisterDefs.hpp b/slsDetectorServers/matterhonServer/include/RegisterDefs.hpp index b979ee2e4..60335ccb4 100644 --- a/slsDetectorServers/matterhonServer/include/RegisterDefs.hpp +++ b/slsDetectorServers/matterhonServer/include/RegisterDefs.hpp @@ -1,6 +1,9 @@ +// clang-format off #include "RegisterHelperStructs.hpp" +namespace sls { + /// @brief Enum for IP cores, value are adresses constexpr enum class IPCore : uint32_t { MH_RO_SM_AXI = 0, // dummy adresses for now @@ -82,103 +85,156 @@ constexpr Register PktCoordReg2{IPCore::PACKETIZERREG, 0xa110}; // Register fields -constexpr RegisterField Power_VIO{CTRL_Reg, 0x1, 0}; +constexpr RegisterField Power_VIO{ + CTRL_Reg, 0, 0x1}; -constexpr RegisterField Power_Vcc_A{CTRL_Reg, 0x1, 1}; +constexpr RegisterField Power_Vcc_A{ + CTRL_Reg, 1, 0x1}; -constexpr RegisterField Power_Vcc_B{CTRL_Reg, 0x1, 2}; +constexpr RegisterField Power_Vcc_B{ + CTRL_Reg, 2, 0x1}; -constexpr RegisterField Power_Vcc_C{CTRL_Reg, 0x1, 3}; +constexpr RegisterField Power_Vcc_C{ + CTRL_Reg, 3, 0x1}; -constexpr RegisterField Power_Vcc_D{CTRL_Reg, 0x1, 4}; +constexpr RegisterField Power_Vcc_D{ + CTRL_Reg, 4, 0x1}; -constexpr RegisterField MH_Enable_Enable{CTRL_Reg, 0x1, 5}; +constexpr RegisterField MH_Enable_Enable{ + CTRL_Reg, 5, 0x1}; -constexpr RegisterField MH_Clk_Enable{CTRL_Reg, 0x1, 6}; +constexpr RegisterField MH_Clk_Enable{ + CTRL_Reg, 6, 0x1}; -constexpr RegisterField sm_busy{Status_Reg, 0x1, 0}; +constexpr RegisterField sm_busy{ + Status_Reg, 0, 0x1}; -constexpr RegisterField FPGACompDate{FPGAVersionReg, 0xffffff, 0}; +constexpr RegisterField FPGACompDate{ + FPGAVersionReg, 0, 0xffffff}; -constexpr RegisterField FPGADetType{FPGAVersionReg, 0xff, 24}; +constexpr RegisterField FPGADetType{ + FPGAVersionReg, 24, 0xff}; -constexpr RegisterField FPGA_GIT_HEAD{FPGA_GIT_HEAD, 0xffffffff, 0}; +constexpr RegisterField FPGA_GIT_HEAD{ + FPGA_GIT_HEAD, 0, 0xffffffff}; -constexpr RegisterField FixedPattern{FixedPatternReg, 0xffffffff, 0}; +constexpr RegisterField FixedPattern{ + FixedPatternReg, 0, 0xffffffff}; -constexpr RegisterField ApiCompDate{ApiVersionReg, 0xffffff, 0}; +constexpr RegisterField ApiCompDate{ + ApiVersionReg, 0, 0xffffff}; -constexpr RegisterField ApiDetType{ApiVersionReg, 0xff, 24}; +constexpr RegisterField ApiDetType{ + ApiVersionReg, 24, 0xff}; -constexpr RegisterField ChipID{Chip_ID_Reg, 0x7, 0}; +constexpr RegisterField ChipID{ + Chip_ID_Reg, 0, 0x7}; -constexpr RegisterField Start_Acquistion{MH_SM_Ctrl_Reg, 0x1, 0}; +constexpr RegisterField Start_Acquistion{ + MH_SM_Ctrl_Reg, 0, 0x1}; -constexpr RegisterField Stop_Acquistion{MH_SM_Ctrl_Reg, 0x1, 1}; +constexpr RegisterField Stop_Acquistion{ + MH_SM_Ctrl_Reg, 1, 0x1}; -constexpr RegisterField MH_Readout_Exposure_Time{MH_SM_Exposure_Reg, 0xffffffff, 0}; +constexpr RegisterField MH_Readout_Exposure_Time{ + MH_SM_Exposure_Reg, 0, 0xffffffff}; -constexpr RegisterField MH_Readout_Period_Time{MH_SM_Period_Reg, 0xffffffff, 0}; +constexpr RegisterField MH_Readout_Period_Time{ + MH_SM_Period_Reg, 0, 0xffffffff}; -constexpr RegisterField MH_Readout_Frames{MH_SM_Frames_Reg, 0xffffffff, 0}; +constexpr RegisterField MH_Readout_Frames{ + MH_SM_Frames_Reg, 0, 0xffffffff}; -constexpr RegisterField MH_SM_StoreLength{MH_SM_StoreLength_Reg, 0xffffffff, 0}; +constexpr RegisterField MH_SM_StoreLength{ + MH_SM_StoreLength_Reg, 0, 0xffffffff}; -constexpr RegisterField MH_SM_ResetMHLength{MH_SM_ResetMHLength_Reg, 0xffffffff, 0}; +constexpr RegisterField MH_SM_ResetMHLength{ + MH_SM_ResetMHLength_Reg, 0, 0xffffffff}; -constexpr RegisterField Frame_Hdr_Set_Framenumber{Frame_HDR_Set_Reg, 0x1, 0}; +constexpr RegisterField Frame_Hdr_Set_Framenumber{ + Frame_HDR_Set_Reg, 0, 0x1}; -constexpr RegisterField Frame_Hdr_Set_Timestamp{Frame_HDR_Set_Reg, 0x1, 1}; +constexpr RegisterField Frame_Hdr_Set_Timestamp{ + Frame_HDR_Set_Reg, 1, 0x1}; -constexpr RegisterField Frame_Hdr_Framenumber_LSB{Frame_HDR_FrameNumLSB_Reg, 0xffffffff, 0}; +constexpr RegisterField Frame_Hdr_Framenumber_LSB{ + Frame_HDR_FrameNumLSB_Reg, 0, 0xffffffff}; -constexpr RegisterField Frame_Hdr_Framenumber_MSB{Frame_HDR_FrameNumMSB_Reg, 0xffffffff, 0}; +constexpr RegisterField Frame_Hdr_Framenumber_MSB{ + Frame_HDR_FrameNumMSB_Reg, 0, 0xffffffff}; -constexpr RegisterField Frame_Hdr_Timestamp_LSB{Frame_HDR_TimestampLSB_Reg, 0xffffffff, 0}; +constexpr RegisterField Frame_Hdr_Timestamp_LSB{ + Frame_HDR_TimestampLSB_Reg, 0, 0xffffffff}; -constexpr RegisterField Frame_Hdr_Timestamp_MSB{Frame_HDR_TimestampMSB_Reg, 0xffffffff, 0}; +constexpr RegisterField Frame_Hdr_Timestamp_MSB{ + Frame_HDR_TimestampMSB_Reg, 0, 0xffffffff}; -constexpr RegisterField Frame_HDR_ModCoord_LSB{Frame_HDR_ModCoord_LSB_Reg, 0xffffffff, 0}; +constexpr RegisterField Frame_HDR_ModCoord_LSB{ + Frame_HDR_ModCoord_LSB_Reg, 0, 0xffffffff}; -constexpr RegisterField Frame_HDR_ModCoord_MSB{Frame_HDR_ModCoord_MSB_Reg, 0xffffffff, 0}; +constexpr RegisterField Frame_HDR_ModCoord_MSB{ + Frame_HDR_ModCoord_MSB_Reg, 0, 0xffffffff}; -constexpr RegisterField Frame_HDR_PktctrMax{Frame_HDR_PktctrMax_Reg, 0xff, 0}; +constexpr RegisterField Frame_HDR_PktctrMax{ + Frame_HDR_PktctrMax_Reg, 0, 0xff}; -constexpr RegisterField Aurora_Number_Valid_DW{Aurora_Valid_DW_Reg, 0xffffffff, 0}; +constexpr RegisterField Aurora_Number_Valid_DW{ + Aurora_Valid_DW_Reg, 0, 0xffffffff}; -constexpr RegisterField Aurora_Valid_Bytes{Aurora_Valid_Bytes_Reg, 0xffffffff, 0}; +constexpr RegisterField Aurora_Valid_Bytes{ + Aurora_Valid_Bytes_Reg, 0, 0xffffffff}; -constexpr RegisterField Aurora_Busy_Up_Cycles{Aurora_Busy_Up_Cycles_Reg, 0xffffffff, 0}; +constexpr RegisterField Aurora_Busy_Up_Cycles{ + Aurora_Busy_Up_Cycles_Reg, 0, 0xffffffff}; -constexpr RegisterField Aurora_Hard_Errors{Aurora_Hard_Errors_Reg, 0xffffffff, 0}; +constexpr RegisterField Aurora_Hard_Errors{ + Aurora_Hard_Errors_Reg, 0, 0xffffffff}; -constexpr RegisterField Aurora_Soft_Errors{Aurora_Soft_Errors_Reg, 0xffffffff, 0}; +constexpr RegisterField Aurora_Soft_Errors{ + Aurora_Soft_Errors_Reg, 0, 0xffffffff}; -constexpr RegisterField Aurora_Lanes_Up{Aurora_Channel_n_Lanes_Up_Reg, 0xf, 0}; +constexpr RegisterField Aurora_Lanes_Up{ + Aurora_Channel_n_Lanes_Up_Reg, 0, 0xf}; -constexpr RegisterField Aurora_Channel_Up{Aurora_Channel_n_Lanes_Up_Reg, 0x1, 4}; +constexpr RegisterField Aurora_Channel_Up{ + Aurora_Channel_n_Lanes_Up_Reg, 4, 0x1}; -constexpr RegisterField Aurora_GT_PLL_Lock{Aurora_GT_PLL_Lock_Reg, 0x1, 0}; +constexpr RegisterField Aurora_GT_PLL_Lock{ + Aurora_GT_PLL_Lock_Reg, 0, 0x1}; -constexpr RegisterField Aurora_GT_PLL_Lock_Counter{Aurora_GT_PLL_Lock_Reg, 0x1ffffff, 4}; +constexpr RegisterField Aurora_GT_PLL_Lock_Counter{ + Aurora_GT_PLL_Lock_Reg, 4, 0x1ffffff}; -constexpr RegisterField PacketLength1G{PktPacketLengthReg, 0xffff, 0}; +constexpr RegisterField PacketLength1G{ + PktPacketLengthReg, 0, 0xffff}; -constexpr RegisterField PacketLength10G{PktPacketLengthReg, 0xffff, 16}; +constexpr RegisterField PacketLength10G{ + PktPacketLengthReg, 16, 0xffff}; -constexpr RegisterField NoPackets1G{PktNoPacketsReg, 0x3f, 0}; +constexpr RegisterField NoPackets1G{ + PktNoPacketsReg, 0, 0x3f}; -constexpr RegisterField NoPackets10G{PktNoPacketsReg, 0x3f, 16}; +constexpr RegisterField NoPackets10G{ + PktNoPacketsReg, 16, 0x3f}; -constexpr RegisterField NoServers{PktCtrlReg, 0x3f, 0}; +constexpr RegisterField NoServers{ + PktCtrlReg, 0, 0x3f}; -constexpr RegisterField ServerStart{PktCtrlReg, 0x1f, 8}; +constexpr RegisterField ServerStart{ + PktCtrlReg, 8, 0x1f}; -constexpr RegisterField EthInterf{PktCtrlReg, 0x1, 16}; +constexpr RegisterField EthInterf{ + PktCtrlReg, 16, 0x1}; -constexpr RegisterField Coordx{PktCoordReg1, 0xffff, 0}; +constexpr RegisterField Coordx{ + PktCoordReg1, 0, 0xffff}; -constexpr RegisterField Coordy{PktCoordReg1, 0xffff, 16}; +constexpr RegisterField Coordy{ + PktCoordReg1, 16, 0xffff}; -constexpr RegisterField Coordz{PktCoordReg2, 0xffff, 0}; +constexpr RegisterField Coordz{ + PktCoordReg2, 0, 0xffff}; + +} // namespace sls +// clang-format on diff --git a/slsDetectorServers/matterhonServer/include/RegisterHelperStructs.hpp b/slsDetectorServers/matterhonServer/include/RegisterHelperStructs.hpp index 224095b69..5f561a285 100644 --- a/slsDetectorServers/matterhonServer/include/RegisterHelperStructs.hpp +++ b/slsDetectorServers/matterhonServer/include/RegisterHelperStructs.hpp @@ -1,6 +1,8 @@ #include #include +namespace sls { + enum class IPCore : uint32_t; // forward declaration of IPCore enum class struct Register { @@ -16,10 +18,12 @@ struct RegisterField { /// @brief Register to which the field belongs const Register register_{}; - /// @brief Bitmask for the field - const uint32_t bitmask{}; - /// @brief Bit position of the least significant bit of the field in the /// register const uint32_t bit_position{}; -}; \ No newline at end of file + + /// @brief Bitmask for the field + const uint32_t bitmask{}; +}; + +} // namespace sls \ No newline at end of file