mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-14 13:57:13 +02:00
jungfrau done but not merged
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@ -64,7 +64,11 @@ struct timeval tss,tse,tsss; //for timing
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//for memory mapping
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#ifdef JUNGFRAU_DHANYA
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u_int32_t CSP0BASE;
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#else
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u_int64_t CSP0BASE;
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#endif
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FILE *debugfp, *datafp;
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@ -155,8 +159,8 @@ int mapCSP0(void) {
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return FAIL;
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}
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#endif
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printf("CSPObase is 0x%x \n",CSP0BASE);
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printf("CSPOBASE=from %08x to %x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
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printf("CSPObase is 0x%08x \n",CSP0BASE);
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printf("CSPOBASE=from %08x to %08x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
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u_int32_t address;
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address = FIFO_DATA_REG;//_OFF;
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@ -383,7 +387,6 @@ u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig) {
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u_int32_t getPllReconfigReg(u_int32_t reg, int trig) {
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int i;
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u_int32_t val=reg<<PLL_CNTR_ADDR_OFF;
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u_int32_t vv;
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@ -431,7 +434,7 @@ void configurePll(int i) {
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u_int32_t l=0x0c;
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u_int32_t h=0x0d;
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u_int32_t val;
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int32_t phase=0, inv=0, ic=0;
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int32_t phase=0, inv=0;
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u_int32_t tot;
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u_int32_t odd=1;//0;
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@ -543,13 +546,10 @@ void configurePll(int i) {
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u_int32_t setClockDivider(int d, int ic) {
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u_int32_t l=0x0c;
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u_int32_t h=0x0d;
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u_int32_t val;
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int i;
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//u_int32_t l=0x0c;
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//u_int32_t h=0x0d;
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u_int32_t tot= PLL_VCO_FREQ_MHZ/d;
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u_int32_t odd=0;
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// int ic=0 is run clk; ic=1 is adc clk
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printf("set clk divider %d to %d\n", ic, d);
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@ -581,7 +581,6 @@ u_int32_t setClockDivider(int d, int ic) {
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int phaseStep(int st){
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int i;
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if (st>65535 || st<-65535)
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return clkPhase[0];
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@ -1128,15 +1127,20 @@ u_int32_t testFpga(void) {
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// for fpga test
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u_int32_t testRAM(void) {
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int result=OK;
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#ifdef JUNGFRAU_DHANYA
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cprintf(RED,"TestRAM not implemented for Jungfrau\n");
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#else
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int i=0;
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allocateRAM();
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// while(i<100000) {
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memcpy(ram_values, values, dataBytes);
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printf ("Testing RAM:\t%d: copied fifo %x to memory %x size %d\n",i++, (unsigned int)(values), (unsigned int)(ram_values), dataBytes);
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// }
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#endif
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return result;
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}
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int getNModBoard() {
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#ifdef JUNGFRAU_DHANYA
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return 1;
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@ -1341,11 +1345,15 @@ int64_t getFramesFromStart(){
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ROI *setROI(int nroi,ROI* arg,int *retvalsize, int *ret) {
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#ifdef JUNGFRAU_DHANYA
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cprintf(RED,"ROI Not implemented for Jungfrau yet\n");
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return NULL;
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#else
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ROI retval[MAX_ROIS];
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int i, ich;
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adcDisableMask=0xfffffffff; /**has one f too many?, dhanya*/
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adcDisableMask=0xfffffffff;
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printf("Setting ROI\n");
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if (nroi>=0) {
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if (nroi==0) {
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@ -1398,10 +1406,14 @@ ROI *setROI(int nroi,ROI* arg,int *retvalsize, int *ret) {
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}
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getDynamicRange();
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return retval;
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#endif
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}
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int loadImage(int index, short int ImageVals[]){
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#ifdef JUNGFRAU_DHANYA
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cprintf(RED,"loadImage Not implemented for Jungfrau yet\n"); //compiler warnings on 1st argument of memcpy(ptr,ImageVals ,dataBytes);
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#else
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u_int32_t address;
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switch (index) {
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case DARK_IMAGE :
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@ -1421,6 +1433,7 @@ int loadImage(int index, short int ImageVals[]){
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memcpy(ptr,ImageVals ,dataBytes);
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#ifdef VERBOSE
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printf("\nLoaded x%08x address with image of index %d\n",(unsigned int)(ptr),index);
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#endif
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#endif
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return OK;
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}
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@ -1694,7 +1707,7 @@ ip.ip_destip = destip;
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while (sum>>16) sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits
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checksum = (~sum)&0xffff;
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printf("IP checksum is 0x%x\n",checksum);
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printf("IP checksum is 0x%lx\n",checksum);
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bus_w(DETECTORIP_AREG,sourceip);//detectorip_AReg_c
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@ -1718,7 +1731,7 @@ ip.ip_destip = destip;
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bus_w(CONFIG_REG,conf | GB10_NOT_CPU_BIT);
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printf("System status register is %08x\n",bus_r(SYSTEM_STATUS_REG));
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return;
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return 0; //any value doesnt matter - dhanya
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/* } */
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/* #ifdef DDEBUG */
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@ -2094,7 +2107,7 @@ u_int16_t* fifo_read_event(int ns)
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int i=0;//, j=0;
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/* volatile u_int16_t volatile *dum; */
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volatile u_int16_t a;
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volatile u_int32_t val;
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/*volatile u_int32_t val;*/
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// volatile u_int32_t volatile *dum;
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// volatile u_int32_t a;
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@ -2337,12 +2350,15 @@ int setDynamicRange(int dr) {
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int getDynamicRange() {
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// dynamicRange=16;
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#ifdef JUNGFRAU_DHANYA
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dynamicRange=16;
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return dynamicRange;
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#else
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nSamples=bus_r(NSAMPLES_REG);
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getChannels();
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dataBytes=nModX*NCHIP*getChannels()*2;
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return dynamicRange*bus_r(NSAMPLES_REG);//nSamples;
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#endif
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}
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int testBus() {
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@ -2418,7 +2434,7 @@ int allocateRAM() {
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//#ifdef VERBOSE
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printf("reallocating ram %x, size %d\n",(unsigned int)ram_values, size);
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printf("reallocating ram %x, size %d\n",(unsigned int)ram_values, (int)size);
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//#endif
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//+2 was added since dma_memcpy would switch the 16 bit values and the mem is 32 bit
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@ -2456,7 +2472,7 @@ int writeADC(int addr, int val) {
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u_int32_t valw,codata,csmask;
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int i,cdx,ddx,j;
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int i,cdx,ddx;
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cdx=0; ddx=1;
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csmask=0xfc; // 1111100
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@ -2503,8 +2519,8 @@ int writeADC(int addr, int val) {
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int prepareADC(){
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printf("Preparing ADC\n");
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u_int32_t valw,codata,csmask;
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int i,cdx,ddx,j;
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u_int32_t codata,csmask;
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int cdx,ddx;
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cdx=0; ddx=1;
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csmask=0x7c; // 1111100
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@ -2563,8 +2579,11 @@ int prepareADC(){
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bus_w(ADC_OFFSET_REG,0xbbbbbbbb);
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// bus_w(ADC_INVERSION_REG,0x1f6170c6);
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#ifndef JUNGFRAU_DHANYA
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return;
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#else
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return OK;
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#endif
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}
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@ -2993,7 +3012,7 @@ int calibratePedestal(int frames){
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int a;
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for (a=0;a<1280; a++){
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unsigned short v = (frame[a] << 8) + (frame[a] >> 8);
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//unsigned short v = (frame[a] << 8) + (frame[a] >> 8);
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// printf("%i: %i %i\n",a, frame[a],v);
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avg[a] += ((double)frame[a])/(double)frames;
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//if(frame[a] == 8191)
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@ -3020,7 +3039,7 @@ int calibratePedestal(int frames){
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double nf = (double)numberFrames;
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//double nf = (double)numberFrames;
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for(i =0; i < 1280; i++){
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adc = i / 256;
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adcCh = (i - adc * 256) / 32;
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@ -3193,7 +3212,6 @@ int setPatternLoop(int level, int *start, int *stop, int *n) {
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int setPatternWaitAddress(int level, int addr) {
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int ret=-1;
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int reg;
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switch (level) {
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@ -3222,7 +3240,6 @@ int setPatternWaitAddress(int level, int addr) {
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uint64_t setPatternWaitTime(int level, uint64_t t) {
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uint64_t ret=-1;
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int reglsb;
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int regmsb;
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@ -3256,7 +3273,7 @@ void initDac(int dacnum) {
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u_int32_t offw,codata;
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u_int16_t valw;
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int iru,i,ddx,csdx,cdx;
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int i,ddx,csdx,cdx;
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@ -3343,8 +3360,7 @@ int setDac(int dacnum,int dacvalue){
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u_int32_t offw,codata;
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u_int16_t valw;
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int iru,i,ddx,csdx,cdx;
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int retval;
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int i,ddx,csdx,cdx;
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int dacch=0;
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