From bebf1b0a13d16b4c921f3cd2ca40dbe2ac996cdb Mon Sep 17 00:00:00 2001 From: Dhanya Thattil Date: Fri, 17 Sep 2021 08:41:30 +0200 Subject: [PATCH] jungfrau 2.0 calibrated settings --- .../jungfrauDetectorServer/slsDetectorServer_defs.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h index fb8f81312..36454c925 100644 --- a/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h @@ -4,7 +4,7 @@ #define MIN_REQRD_VRSN_T_RD_API 0x171220 #define REQRD_FRMWRE_VRSN_BOARD2 0x210831 // 1.0 pcb (version = 010) -#define REQRD_FRMWRE_VRSN 0x210622 // 2.0 pcb (version = 011) +#define REQRD_FRMWRE_VRSN 0x210910 // 2.0 pcb (version = 011) #define CTRL_SRVR_INIT_TIME_US (300 * 1000) @@ -144,7 +144,7 @@ enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS }; // 2.0 pcb #define SAMPLE_ADC_FULL_SPEED \ (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + \ - SAMPLE_DGTL_SAMPLE_1_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x100 + SAMPLE_DGTL_SAMPLE_1_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x0100 #define SAMPLE_ADC_HALF_SPEED \ (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + \ SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1310 @@ -159,13 +159,13 @@ enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS }; (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + \ SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2610 -#define ADC_PHASE_FULL_SPEED (150) // 2.0 pcb -#define ADC_PHASE_HALF_SPEED (200) // 2.0 pcb -#define ADC_PHASE_QUARTER_SPEED (200) // 2.0 pcb +#define ADC_PHASE_FULL_SPEED (175) // 2.0 pcb +#define ADC_PHASE_HALF_SPEED (175) // 2.0 pcb +#define ADC_PHASE_QUARTER_SPEED (175) // 2.0 pcb #define ADC_PHASE_HALF_SPEED_BOARD2 (110) // 1.0 pcb (2 resistor network) #define ADC_PHASE_QUARTER_SPEED_BOARD2 (220) // 1.0 pcb (2 resistor network) -#define DBIT_PHASE_FULL_SPEED (85) // 2.0 pcb +#define DBIT_PHASE_FULL_SPEED (100) // 2.0 pcb #define DBIT_PHASE_HALF_SPEED (150) // 2.0 pcb #define DBIT_PHASE_QUARTER_SPEED (150) // 2.0 pcb #define DBIT_PHASE_HALF_SPEED_BOARD2 (150) // 1.0 pcb (2 resistor network)