mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-21 00:58:01 +02:00
jungfrau server: added storage start, connected auto_comp_disable, changed adcphase, added ADC_PORT_INVERT_VAL, ADC_OFST_HALF_SPEED_VAL, minimum exposure time
This commit is contained in:
@ -297,7 +297,33 @@
|
||||
|
||||
|
||||
/** DAQ Register */
|
||||
#define DAQ_REG (0x5D << MEM_MAP_SHIFT) //TBD in firmware
|
||||
#define DAQ_REG (0x5D << MEM_MAP_SHIFT)
|
||||
|
||||
#define DAQ_SETTINGS_MSK (DAQ_HIGH_GAIN_MSK | DAQ_FIX_GAIN_STG_1_MSK | DAQ_FIX_GAIN_STG_2_MSK | DAQ_FRCE_SWTCH_GAIN_STG_1_MSK | DAQ_FRCE_SWTCH_GAIN_STG_2_MSK)
|
||||
#define DAQ_HIGH_GAIN_OFST (0)
|
||||
#define DAQ_HIGH_GAIN_MSK (0x00000001 << DAQ_HIGH_GAIN_OFST)
|
||||
#define DAQ_FIX_GAIN_STG_1_OFST (1)
|
||||
#define DAQ_FIX_GAIN_STG_1_MSK (0x00000001 << DAQ_FIX_GAIN_STG_1_OFST)
|
||||
#define DAQ_FIX_GAIN_STG_2_OFST (2)
|
||||
#define DAQ_FIX_GAIN_STG_2_MSK (0x00000001 << DAQ_FIX_GAIN_STG_2_OFST)
|
||||
#define DAQ_CMP_RST_OFST (4)
|
||||
#define DAQ_CMP_RST_MSK (0x00000001 << DAQ_CMP_RST_OFST)
|
||||
#define DAQ_STRG_CELL_SLCT_OFST (8)
|
||||
#define DAQ_STRG_CELL_SLCT_MSK (0x0000000F << DAQ_STRG_CELL_SLCT_OFST)
|
||||
#define DAQ_FRCE_SWTCH_GAIN_STG_1_OFST (12)
|
||||
#define DAQ_FRCE_SWTCH_GAIN_STG_1_MSK (0x00000001 << DAQ_FRCE_SWTCH_GAIN_STG_1_OFST)
|
||||
#define DAQ_FRCE_SWTCH_GAIN_STG_2_OFST (13)
|
||||
#define DAQ_FRCE_SWTCH_GAIN_STG_2_MSK (0x00000001 << DAQ_FRCE_SWTCH_GAIN_STG_2_OFST)
|
||||
#define DAQ_ELCTRN_CLLCTN_MDE_OFST (14)
|
||||
#define DAQ_ELCTRN_CLLCTN_MDE_MSK (0x00000001 << DAQ_ELCTRN_CLLCTN_MDE_OFST)
|
||||
#define DAQ_G2_CNNT_OFST (15)
|
||||
#define DAQ_G2_CNNT_MSK (0x00000001 << DAQ_G2_CNNT_OFST)
|
||||
#define DAQ_CRRNT_SRC_ENBL_OFST (16)
|
||||
#define DAQ_CRRNT_SRC_ENBL_MSK (0x00000001 << DAQ_CRRNT_SRC_ENBL_OFST)
|
||||
#define DAQ_CRRNT_SRC_CLMN_FIX_OFST (17)
|
||||
#define DAQ_CRRNT_SRC_CLMN_FIX_MSK (0x00000001 << DAQ_CRRNT_SRC_CLMN_FIX_OFST)
|
||||
#define DAQ_CRRNT_SRC_CLMN_SLCT_OFST (20)
|
||||
#define DAQ_CRRNT_SRC_CLMN_SLCT_MSK (0x0000003F << DAQ_CRRNT_SRC_CLMN_SLCT_OFST)
|
||||
|
||||
/** Chip Power Register */
|
||||
#define CHIP_POWER_REG (0x5E << MEM_MAP_SHIFT)
|
||||
|
Reference in New Issue
Block a user