ctb, moench: implemented led enable feature

This commit is contained in:
2019-03-01 09:00:04 +01:00
parent ebee9e308e
commit bb81613900
13 changed files with 120 additions and 22 deletions

View File

@ -505,14 +505,15 @@
#define DBIT_EXT_TRG_OPRTN_MD_MSK (0x00000001 << DBIT_EXT_TRG_OPRTN_MD_OFST)
/* Pin Delay 0 RW register */
#define PIN_DELAY_0_REG (0x7C << MEM_MAP_SHIFT)
#define OUTPUT_DELAY_0_REG (0x7C << MEM_MAP_SHIFT)
#define PIN_DELAY_0_OTPT_STTNG_OFST (0) //t = OTPT_STTNG * 25 ps, max for Cyclone V = 775 ps
#define PIN_DELAY_0_OTPT_STTNG_MSK (0x0000001F << PIN_DELAY_0_OFST)
#define PIN_DELAY_0_OTPT_TRGGR_OFST (31)
#define PIN_DELAY_0_OTPT_TRGGR_MSK (0x00000001 << PIN_DELAY_0_OFST)
#define PIN_DELAY_0_OTPT_TRGGR_LD_VAL (1)
#define PIN_DELAY_0_OTPT_TRGGR_STRT_VAL (0)
#define OUTPUT_DELAY_0_OTPT_STTNG_OFST (0) //t = OTPT_STTNG * 25 ps, max for Cyclone V = 775 ps
#define OUTPUT_DELAY_0_OTPT_STTNG_MSK (0x0000001F << OUTPUT_DELAY_0_OFST)
// 1: load dynamic output settings, 0: trigger start of dynamic output delay configuration pn falling edge of ODT (output delay trigger) bit
#define OUTPUT_DELAY_0_OTPT_TRGGR_OFST (31)
#define OUTPUT_DELAY_0_OTPT_TRGGR_MSK (0x00000001 << OUTPUT_DELAY_0_OFST)
#define OUTPUT_DELAY_0_OTPT_TRGGR_LD_VAL (1)
#define OUTPUT_DELAY_0_OTPT_TRGGR_STRT_VAL (0)
/* Pin Delay 1 RW register
* Each bit configured as enable for dynamic output delay configuration */