diff --git a/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c b/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c
index 5ce768dae..9bc876987 100755
--- a/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c
+++ b/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.c
@@ -1,51 +1,36 @@
 //#define TESTADC
-#define TESTADC1
 
 
-//#define TIMEDBG 
 #include "server_defs.h"
 #include "firmware_funcs.h"
 #include "mcb_funcs.h"
 #include "registers_m.h"
 #include "gitInfoJungfrau.h"
 
-//#define VERBOSE
-//#define VERYVERBOSE
-
 
+#include <stdio.h>
+#include <stdlib.h>  /* exit() */
+#include <stdarg.h>
+#include <string.h>  /* memset(), memcpy() */
+#include <sys/time.h>
+#include <sys/mman.h>
 #include <sys/ipc.h>
 #include <sys/shm.h>
 #include <sys/stat.h>
-
-#include <stdlib.h>
-#include <sys/time.h>
-#include <stdlib.h>  /* exit() */
-#include <string.h>  /* memset(), memcpy() */
 #include <sys/utsname.h>   /* uname() */
 #include <sys/types.h>
-#include <sys/socket.h>   /* socket(), bind(),
-                         listen(), accept() */
+#include <sys/socket.h>   /* socket(), bind(), listen(), accept() */
+#include <unistd.h>  /* fork(), write(), close() */
 #include <netinet/in.h>
 #include <netinet/tcp.h>
 #include <arpa/inet.h>
 #include <netdb.h>
-#include <unistd.h>  /* fork(), write(), close() */
 #include <time.h> 
-#include <sys/time.h>
-#include <sys/mman.h>
-#include <sys/socket.h>
-#include <sys/types.h>
-#include <sys/stat.h>
 #include <errno.h>
 #include <fcntl.h>
-#include <stdarg.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <unistd.h>
 
 
-extern enum detectorType myDetectorType;
+
 
 typedef struct ip_header_struct {
 	u_int16_t     ip_len;
@@ -61,54 +46,14 @@ typedef struct ip_header_struct {
 } ip_header;
 
 
-u_int32_t CSP0BASE;
+u_int32_t CSP0BASE = 0;
 int highvoltage = 0;
 int dacValues[NDAC];
-
-
-
-
-
-FILE *debugfp, *datafp;
-int fr;
-int wait_time;
-int *fifocntrl;
-const int nModY=1;
-int nModBoard;
-int nModX=NMAXMOD;
-int dynamicRange=16;
-int nSamples=1;
-size_t dataBytes=NMAXMOD*NCHIP*NCHAN*2;
-int storeInRAM=0;
-int ROI_flag=0;
-int ram_size=0;
-
-int64_t totalTime=1;
-u_int32_t progressMask=0;
-int phase_shift=0;//DEFAULT_PHASE_SHIFT;
-int ipPacketSize=DEFAULT_IP_PACKETSIZE;
-int udpPacketSize=DEFAULT_UDP_PACKETSIZE;
-int clockdivider_exptime = 40;
-int clockdivider_fc = 20;
-/*
-#ifndef NEW_PLL_RECONFIG
-u_int32_t clkDivider[2]={32,16};
-#else
-u_int32_t clkDivider[2]={40,20};
-#endif
- */
-
-int32_t clkPhase[2]={0,0};
-
-u_int32_t adcDisableMask=0;
-
-int ififostart, ififostop, ififostep, ififo;
-
-int masterMode=NO_MASTER, syncMode=NO_SYNCHRONIZATION, timingMode=AUTO_TIMING;
-
-enum externalSignalFlag  signals[4]={EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF};
-
+int32_t clkPhase[2] = {0, 0};
 char mtdvalue[10];
+int masterMode=NO_MASTER, syncMode=NO_SYNCHRONIZATION, timingMode=AUTO_TIMING;
+enum externalSignalFlag signals[4]={EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF};
+
 
 
 
@@ -123,24 +68,20 @@ int mapCSP0(void) {
 		printf("\nCan't find /dev/mem!\n");
 		return FAIL;
 	}
-	//printf("/dev/mem opened\n");
-
+#ifdef VERBOSE
+	printf("/dev/mem opened\n");
+#endif
 	CSP0BASE = (u_int32_t)mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, CSP0);
 	if (CSP0BASE == (u_int32_t)MAP_FAILED) {
 		printf("\nCan't map memmory area!!\n");
 		return FAIL;
 	}
-	//printf("CSP0 mapped\n");
-
-#endif
-#ifdef VIRTUAL
+	printf("CSPOBASE mapped from %08x to %08x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
+#else
 	CSP0BASE = malloc(MEM_SIZE);
 	printf("memory allocated\n");
 #endif
-	//printf("CSPObase is 0x%08x \n",CSP0BASE);
-	printf("CSPOBASE mapped from %08x to %08x\n",CSP0BASE,CSP0BASE+MEM_SIZE);
-
-	printf("statusreg=%08x\n",bus_r(STATUS_REG));
+	printf("Status Register: %08x\n",bus_r(STATUS_REG));
 	return OK;
 }
 
@@ -158,17 +99,15 @@ u_int16_t bus_r16(u_int32_t offset){
 	return *ptr1;
 }
 
-/** ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG */
+// ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG
 u_int16_t ram_w16(u_int32_t ramType, int adc, int adcCh, int Ch, u_int16_t data) {
 	unsigned int adr = (ramType | adc << 8 | adcCh << 5 | Ch );
-	// printf("Writing to addr:%x\n",adr);
 	return bus_w16(adr,data);
 }
 
-/** ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG */
+// ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG
 u_int16_t ram_r16(u_int32_t ramType, int adc, int adcCh, int Ch){
 	unsigned int adr = (ramType | adc << 8 | adcCh << 5 | Ch );
-	//  printf("Reading from addr:%x\n",adr);
 	return bus_r16(adr);
 }
 
@@ -201,17 +140,19 @@ void initializeDetector(){
 
 	printf("Resetting PLL\n");
 	resetPLL();
-	bus_w16(CONTROL_REG, SYNC_RESET);
-	bus_w16(CONTROL_REG, 0);
-	bus_w16(CONTROL_REG, GB10_RESET_BIT);
-	bus_w16(CONTROL_REG, 0);
+
+	resetCore();
+	resetPeripheral();
+	/*bus_w(CONTROL_REG, SYNC_RESET); Carlos  #define SYNC_RESET          0x0400
+	bus_w(CONTROL_REG, 0);
+	bus_w(CONTROL_REG, GB10_RESET_BIT);		#define GB10_RESET_BIT      0x0800
+	bus_w(CONTROL_REG, 0);*/
 
 	//allocating module structure for the detector in the server
 #ifdef MCB_FUNCS
 	initDetector();
 #endif
 
-	/*some registers set, please check */
 	prepareADC();
 
 	// initialize dac series
@@ -232,27 +173,21 @@ void initializeDetector(){
 	}
 
 	/* Only once */
-	bus_w(CONFGAIN_REG,0x0);
+	bus_w(DAQ_REG, 0x0);/**carlos? not defined */
 
 	configureAdc();
-	printf("Setting ADC Port Invert Reg to 0x%08x\n", ADC_PORT_INVERT_VAL);
-	bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL);
-	printf("Setting ADC Offset Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL);
-	bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
 
-	bus_w(DBIT_PIPELINE_REG,HALFSPEED_DBIT_PIPELINE);
-	adcPhase(HALFSPEED_ADC_PHASE); //set adc_clock_phase in unit of 1/(52) clock period (by trial and error)
+	bus_w(SAMPLE_REG,SAMPLE_ADC_HALF_SPEED);
+	adcPhase(ADC_PHASE_HALF_SPEED); //set adc_clock_phase in unit of 1/(52) clock period (by trial and error)
+
+	cleanFifos();
+	resetCore();
+
+	initSpeedConfGain(DAQ_HALF_SPEED);
 
-	printf("Reset mem machine fifos\n");
-	bus_w(MEM_MACHINE_FIFOS_REG,0x4000);
-	bus_w(MEM_MACHINE_FIFOS_REG,0x0);
-	printf("Reset run control\n");
-	bus_w(MEM_MACHINE_FIFOS_REG,0x0400);
-	bus_w(MEM_MACHINE_FIFOS_REG,0x0);
-	initSpeedConfGain(HALFSPEED_CONF);
-	setSettings(DEFAULT_SETTINGS,-1);
 
 	//Initialization of acquistion parameters
+	setSettings(DEFAULT_SETTINGS,-1);
 	setFrames(DEFAULT_NUM_FRAMES);
 	setTrains(DEFAULT_NUM_CYCLES);
 	setExposureTime(DEFAULT_EXPTIME);
@@ -571,7 +506,7 @@ long int calcChecksum(int sourceip, int destip) {
 
 
 
-void configureMAC(uint32_t destip,uint64_t destmac,uint64_t  sourcemac,int sourceip,int ival,uint32_t destport) {
+void configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, int detipad, uint32_t destport) {
 	uint32_t sourceport  =  DEFAULT_TX_UDP_PORT;
 	long int checksum=calcChecksum(sourceip, destip);
 
@@ -586,14 +521,10 @@ void configureMAC(uint32_t destip,uint64_t destmac,uint64_t  sourcemac,int sourc
 			((destport << UDP_PORT_RX_OFST) & UDP_PORT_RX_MSK));
 	bus_w(TX_IP_CHECKSUM_REG,(checksum << TX_IP_CHECKSUM_OFST) & TX_IP_CHECKSUM_MSK);
 
-	printf("Reset mem machine fifos\n");
-	bus_w(MEM_MACHINE_FIFOS_REG,0x4000);
-	bus_w(MEM_MACHINE_FIFOS_REG,0x0);
-	printf("Reset run control\n");
-	bus_w(MEM_MACHINE_FIFOS_REG,0x0400);
-	bus_w(MEM_MACHINE_FIFOS_REG,0x0);
+	cleanFifos();
+	resetCore();
 
-	usleep(500 * 1000);
+	usleep(500 * 1000); /** carlos time cuz of reset or writing configure para? */
 }
 
 
@@ -648,24 +579,25 @@ int64_t getFrames(){
 int64_t setExposureTime(int64_t value){
 	if (value!=-1){
 		printf("\nSetting exptime to %lldns\n",(long long int)value);
-		value*=(1E-3*clockdivider_exptime);
+		value*=(1E-3*CLK_EXPTIME);
 	}
-	int64_t retval = set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-3*clockdivider_exptime);//(1E-9*CLK_FREQ);
+	int64_t retval = set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-3*CLK_EXPTIME);
 	printf("Getting exptime: %lldns\n",(long long int)retval);
 	return retval;
 }
 
 int64_t getExposureTime(){
-	return get64BitReg(GET_EXPTIME_LSB_REG, GET_EXPTIME_MSB_REG)/(1E-3*clockdivider_exptime);//(1E-9*CLK_FREQ);
+	return get64BitReg(GET_EXPTIME_LSB_REG, GET_EXPTIME_MSB_REG)/(1E-3*CLK_EXPTIME);
 }
 
 int64_t setGates(int64_t value){
 	if(value!=-1)
 		printf("\nSetting number of gates to %lld\n",(long long int)value);
-
+/*
 	int64_t retval = set64BitReg(value, SET_GATES_LSB_REG, SET_GATES_MSB_REG);
 	printf("Getting number of gates: %lld\n",(long long int)retval);
-	return retval;
+	return retval; Carlos set gates not defined */
+	return 0;
 }
 
 int64_t getGates(){
@@ -675,31 +607,31 @@ int64_t getGates(){
 int64_t setDelay(int64_t value){
 	if (value!=-1){
 		printf("\nSetting delay to %lldns\n",(long long int)value);
-		value*=(1E-3*clockdivider_fc);
+		value*=(1E-3*CLK_FC);
 	}
 
-	int64_t retval = set64BitReg(value,SET_DELAY_LSB_REG, SET_DELAY_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ);
+	int64_t retval = set64BitReg(value,SET_DELAY_LSB_REG, SET_DELAY_MSB_REG)/(1E-3*CLK_FC);
 	printf("Getting delay: %lldns\n",(long long int)retval);
 	return retval;
 }
 
 int64_t getDelay(){
-	return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ);
+	return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG)/(1E-3*CLK_FC);
 }
 
 int64_t setPeriod(int64_t value){
 	if (value!=-1){
 		printf("\nSetting period to %lldns\n",(long long int)value);
-		value*=(1E-3*clockdivider_fc);
+		value*=(1E-3*CLK_FC);
 	}
 
-	int64_t retval = set64BitReg(value,SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ);
+	int64_t retval = set64BitReg(value,SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/(1E-3*CLK_FC);
 	printf("Getting period: %lldns\n",(long long int)retval);
 	return retval;
 }
 
 int64_t getPeriod(){
-	return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG)/(1E-3*clockdivider_fc);//(1E-9*CLK_FREQ);
+	return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG)/(1E-3*CLK_FC);
 }
 
 int64_t setTrains(int64_t value){
@@ -735,12 +667,12 @@ int64_t getProgress() {/** carlos ? */
 
 
 int64_t getActualTime(){
-	return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG)/(1E-9*CLK_FREQ);
+	return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG)/(1E-9*CLK_FREQ); /**carlos should be CLK_FC or CLK_EXPTIME.. is clk_freq every used?*/
 }
 
 int64_t getMeasurementTime(){
 	int64_t v=get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG);
-	return v/(1E-9*CLK_FREQ);
+	return v/(1E-9*CLK_FREQ);/**carlos should be CLK_FC or CLK_EXPTIME.. is clk_freq every used?*/
 }
 
 int64_t getFramesFromStart(){
@@ -755,42 +687,39 @@ int64_t getFramesFromStart(){
 
 
 u_int32_t runBusy(void) {
-	u_int32_t s = ((runState() & RUN_BUSY_MSK) >> RUN_BUSY_OFST);
+	u_int32_t s = ((bus_r(STATUS_REG) & RUN_BUSY_MSK) >> RUN_BUSY_OFST);
 #ifdef VERBOSE
-	printf("status %04x\n",s);
+	printf("Status Register: %08x\n", s);
 #endif
 	return s;
 }
 
 
-u_int32_t runState(void) {
-	int s=bus_r(STATUS_REG);
-#ifdef VERBOSE
-	printf("status %04x\n",s);
-#endif
-	return s;
-}
-
-
-
 
 
 // State Machine
 
 int startStateMachine(){
-	//int i;
-	//#ifdef VERBOSE
 	printf("*******Starting State Machine*******\n");
-	//#endif
+
 	//	cleanFifo;
 	// fifoReset();
+	/*Not implemented yet
+	bus_w(CONTROL_REG, FIFO_RESET_BIT); #define FIFO_RESET_BIT      0x8000 Carlos  same as cleanFifos()?
+	bus_w(CONTROL_REG, 0x0);
+	*/
 	//start state machine
-	bus_w16(CONTROL_REG, FIFO_RESET_BIT); /* Carlos  Not implemented in firmware */
-	bus_w16(CONTROL_REG, 0x0);
-	bus_w16(CONTROL_REG, START_ACQ_BIT |  START_EXPOSURE_BIT); /* Carlos exposurebit Not implemented in firmware */
-	bus_w16(CONTROL_REG, 0x0);
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_START_ACQ_MSK); /** no usleep required, like in stop?*/
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_START_ACQ_MSK);
 
-	printf("statusreg=%08x\n",bus_r(STATUS_REG));
+	/*Not implemented yet check with Carlos
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_START_ACQ_MSK | START_EXPOSURE_BIT); #define START_EXPOSURE_BIT  0x0040
+		bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_START_ACQ_MSK & ~START_EXPOSURE_BIT);
+	*/
+
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_START_ACQ_MSK);
+
+	printf("Status Register: %08x\n",bus_r(STATUS_REG));
 	return OK;
 }
 
@@ -798,30 +727,26 @@ int startStateMachine(){
 
 
 int stopStateMachine(){
-	//#ifdef VERBOSE
 	cprintf(BG_RED,"*******Stopping State Machine*******\n");
-	//#endif
-	// for(i=0;i<100;i++){
-	//stop state machine
-	bus_w16(CONTROL_REG, STOP_ACQ_BIT);
-	usleep(100);
-	bus_w16(CONTROL_REG, 0x0);
 
-	printf("statusreg=%08x\n",bus_r(STATUS_REG));
+	//stop state machine
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STOP_ACQ_MSK);
+	usleep(100);
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STOP_ACQ_MSK);
+
+	printf("Status Register: %08x\n",bus_r(STATUS_REG));
 	return OK;
 }
 
 
 int startReadOut(){
-#ifdef VERBOSE
-	printf("Starting State Machine Readout\n");
-#endif
-#ifdef DEBUG
-	printf("State machine status is %08x\n",bus_r(STATUS_REG));
-#endif
-	bus_w16(CONTROL_REG,  START_ACQ_BIT |START_READOUT_BIT);   //  start readout
+	cprintf(BG_RED, "*******Starting State Machine Readout*******\n");
+
+	/* Not implemented yet check with Carlos
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_START_ACQ_MSK | CONTROL_START_READOUT_BIT); #define STOP_READOUT_BIT    0x0020
 	usleep(100);
-	bus_w16(CONTROL_REG,  0x0);
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_START_ACQ_MSK & ~CONTROL_START_READOUT_BIT);
+	*/
 	return OK;
 }
 
@@ -831,8 +756,8 @@ enum runStatus getStatus() {
 #endif
 
 	enum runStatus s;
-	u_int32_t retval = runState();
-	printf("\n\nSTATUS=%08x\n",retval);
+	u_int32_t retval = bus_r(STATUS_REG);
+	printf("Status Register: %08x\n",retval);
 
 	//running
 	if(((retval & RUN_BUSY_MSK) >> RUN_BUSY_OFST)) {
@@ -861,16 +786,6 @@ enum runStatus getStatus() {
 			printf("-----------------------------------Unknown status %08x--------------------------------------\n", retval);
 			s=ERROR;
 		}
-		/* Check with Carlos , I included IDLE and unknown status above
-		//and readbusy=0,idle
-		else if((!(retval&0xffff))||(retval==SOME_FIFO_FULL_BIT)){
-			printf("-----------------------------------IDLE--------------------------------------\n");
-			s=IDLE;
-		} else {
-			printf("-----------------------------------Unknown status %08x--------------------------------------\n", retval);
-			s=ERROR;
-			ret=FAIL;
-		}*/
 	}
 
 	return s;
@@ -891,8 +806,8 @@ void waitForAcquisitionEnd(){
 
 
 
-/** Carlos bit size shouldnt matter as the valw is all 16 bit and should be able to write with bus_w or bus_w16 */
-void serializeToSPI(int numbitstosend, u_int32_t val, u_int16_t csmask, int numbitstosend, u_int16_t clkmask, u_int16_t digoutmask, int digofset) {
+
+void serializeToSPI(u_int32_t addr, u_int32_t val, u_int16_t csmask, int numbitstosend, u_int16_t clkmask, u_int16_t digoutmask, int digofset) {
 #ifdef VERBOSE
 	if (numbitstosend == 16)
 		printf("Writing to ADC SPI Register: 0x%04x\n",val);
@@ -901,7 +816,6 @@ void serializeToSPI(int numbitstosend, u_int32_t val, u_int16_t csmask, int numb
 #endif
 
 	u_int16_t valw;
-	u_int32_t addr 	= (numbitstosend == 16) ? ADC_SPI_REG : SPI_REG;
 
 	// start point
 	valw = 0xffff; 		/**todo testwith old board 0xff for adc_spi */			// old board compatibility (not using specific bits)
@@ -951,7 +865,6 @@ void initDac(int dacnum) {
 	printf("\n Initializing dac for %d to \n",dacnum);
 
 	u_int32_t codata;
-	int bitsize		= 32;
 	int csdx 		= dacnum / NDAC + DAC_SERIAL_CS_OUT_OFST; 	// old board (16 dacs),so can be DAC_SERIAL_CS_OUT_OFST or +1
 	int dacchannel 	= 0xf;										// all channels
 	int dacvalue	= 0x6; 										// can be any random value (just writing to power up)
@@ -964,7 +877,7 @@ void initDac(int dacnum) {
 	codata = LTC2620_DAC_CMD_WRITE +											// command to write to input register
 			((dacchannel << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) +	// all channels
 			((dacvalue << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK);		// any random value
-	serializeToSPI(bitsize, codata, (0x1 << csdx), LTC2620_DAC_NUMBITS,
+	serializeToSPI(SPI_REG, codata, (0x1 << csdx), LTC2620_DAC_NUMBITS,
 			DAC_SERIAL_CLK_OUT_MSK, DAC_SERIAL_DIGITAL_OUT_MSK, DAC_SERIAL_DIGITAL_OUT_OFST);
 }
 
@@ -972,7 +885,6 @@ void initDac(int dacnum) {
 int setDac(int dacnum, int dacvalue){
 
 	u_int32_t codata;
-	int bitsize		= 32;
 	int csdx 		= dacnum / NDAC + DAC_SERIAL_CS_OUT_OFST; 	// old board (16 dacs),so can be DAC_SERIAL_CS_OUT_OFST or +1
 	int dacchannel 	= dacnum % NDAC;							// 0-8, dac channel number (also for dacnum 9-15 in old board)
 
@@ -995,7 +907,7 @@ int setDac(int dacnum, int dacvalue){
 		codata += ((dacchannel << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) +
 				  ((dacvalue << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK);
 		// to spi
-		serializeToSPI(bitsize, codata, (0x1 << csdx), LTC2620_DAC_NUMBITS,
+		serializeToSPI(SPI_REG, codata, (0x1 << csdx), LTC2620_DAC_NUMBITS,
 				DAC_SERIAL_CLK_OUT_MSK, DAC_SERIAL_DIGITAL_OUT_MSK, DAC_SERIAL_DIGITAL_OUT_OFST);
 
 		dacValues[dacnum] = dacvalue;
@@ -1009,7 +921,6 @@ int setDac(int dacnum, int dacvalue){
 int setHighVoltage(int val, int imod){
 
 	u_int32_t dacvalue;
-	int bitsize		= 32;
 	float alpha		= 0.55;
 	// setting hv
 	if (val >= 0) {
@@ -1026,7 +937,7 @@ int setHighVoltage(int val, int imod){
 		}
 		printf ("\n Setting High voltage to %d (dacval %d)\n",val, dacvalue);
 		dacvalue &= MAX1932_HV_DATA_MSK;
-		serializeToSPI(bitsize, dacvalue, HV_SERIAL_CS_OUT_MSK, MAX1932_HV_NUMBITS,
+		serializeToSPI(SPI_REG, dacvalue, HV_SERIAL_CS_OUT_MSK, MAX1932_HV_NUMBITS,
 				HV_SERIAL_CLK_OUT_MSK, HV_SERIAL_DIGITAL_OUT_MSK, HV_SERIAL_DIGITAL_OUT_OFST);
 		highvoltage = val;
 	}
@@ -1038,10 +949,9 @@ int setHighVoltage(int val, int imod){
 void setAdc(int addr, int val) {
 
 	u_int32_t codata;
-	int bitsize		= 16;
 	codata = val + (addr << 8);
 	printf("\n Setting Adc spi register. Addr: 0x%04x Value: 0x%04x\n", addr, val);
-	serializeToSPI(bitsize, codata, ADC_SERIAL_CS_OUT_MSK, AD9257_ADC_NUMBITS,
+	serializeToSPI(ADC_SPI_REG, codata, ADC_SERIAL_CS_OUT_MSK, AD9257_ADC_NUMBITS,
 			ADC_SERIAL_CLK_OUT_MSK, ADC_SERIAL_DATA_OUT_MSK, ADC_SERIAL_DATA_OUT_OFST);
 }
 
@@ -1049,7 +959,6 @@ void setAdc(int addr, int val) {
 
 void configureAdc() {
 	printf("Configuring Adcs\n");
-
 	//power mode reset
 	setAdc(AD9257_POWER_MODE_REG,
 			(AD9257_INT_RESET_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK);
@@ -1070,7 +979,13 @@ void configureAdc() {
 
 	// vref 1.33
 	setAdc(AD9257_VREF_REG,
-			(AD9257_VREF_1_33_VAL << AD9257_VREF_OFST) & AD9257_VREF_MSK) ;
+			(AD9257_VREF_1_33_VAL << AD9257_VREF_OFST) & AD9257_VREF_MSK);
+
+	printf("Setting ADC Port Invert Reg to 0x%08x\n", ADC_PORT_INVERT_VAL);
+	bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL);
+
+	printf("Setting ADC Offset Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL);
+	bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
 }
 
 
@@ -1107,8 +1022,8 @@ void prepareADC(){ /** Carlos combine configureAdc and prepare adc? need prepare
 #endif
 
 	bus_w(ADC_LATCH_DISABLE_REG,0x0); // enable all ADCs
-	bus_w(CONFGAIN_REG,0x12); //adc pipeline=18
-	bus_w(CONFGAIN_REG,0xbbbbbbbb);
+	bus_w(DAQ_REG, 0x12); /**carlos daq reg not detail defined */ //adc pipeline=18
+	bus_w(DAQ_REG,0xbbbbbbbb); /**carlos daq reg not detail defined */
 }
 
 
@@ -1120,23 +1035,23 @@ void prepareADC(){ /** Carlos combine configureAdc and prepare adc? need prepare
 
 
 int setDynamicRange(int dr) {
-	return dynamicRange;
+	return DYNAMIC_RANGE;
 }
 
 int getDynamicRange() {
-	return dynamicRange;
+	return DYNAMIC_RANGE;
 }
 
 int getNModBoard() {
-	return 1;
+	return NMOD;
 }
 
 int setNMod(int n) {
-	return 1;
+	return NMOD;
 }
 
 int getNMod() {
-	return 1;
+	return NMOD;
 }
 
 
@@ -1147,106 +1062,59 @@ int powerChip (int on){
 	if(on != -1){
 		if(on){
 			printf("\nPowering on the chip\n");
-			bus_w(POWER_ON_REG,0x1);
+			bus_w(CHIP_POWER_REG, bus_r(CHIP_POWER_REG) | CHIP_POWER_ENABLE_MSK);
 		}
 		else{
 			printf("\nPowering off the chip\n");
-			bus_w(POWER_ON_REG,0x0);
+			bus_w(CHIP_POWER_REG, bus_r(CHIP_POWER_REG) & ~CHIP_POWER_ENABLE_MSK);
 		}
 	}
-
-	return bus_r(POWER_ON_REG);
+	return bus_r(CHIP_POWER_REG);
 }
 
 
 
-int setPhaseShiftOnce(){
-	u_int32_t addr, reg;
-	int i;
-	addr=MULTI_PURPOSE_REG;
-	reg=bus_r(addr);
-#ifdef VERBOSE
-	printf("Multipurpose reg:%x\n",reg);
-#endif
+void cleanFifos() { /** check with Carlos, resettig it no usleep required in resetting it) */
+	printf("Clearing Acquisition Fifos\n");
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_ACQ_FIFO_CLR_MSK);
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_ACQ_FIFO_CLR_MSK);
+}
 
-	//Checking if it is power on(negative number)
-	// if(((reg&0xFFFF0000)>>16)>0){
-	//bus_w(addr,0x0);   //clear the reg
+void resetCore() {
+	printf("Resetting Core\n");
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CORE_RST_MSK);
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CORE_RST_MSK);
+}
 
-	if(reg==0){
-		printf("\nImplementing phase shift of %d\n",phase_shift);
-		for (i=1;i<phase_shift;i++) {
-			bus_w(addr,(INT_RSTN_BIT|ENET_RESETN_BIT|SW1_BIT|PHASE_STEP_BIT));//0x2821
-			bus_w(addr,(INT_RSTN_BIT|ENET_RESETN_BIT|(SW1_BIT&~PHASE_STEP_BIT)));//0x2820
-		}
-#ifdef VERBOSE
-		printf("Multipupose reg now:%x\n",bus_r(addr));
-#endif
-	}
-	return OK;
+void resetPeripheral() {
+	printf("Resetting Peripheral\n");
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PERIPHERAL_RST_MSK);
+	bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PERIPHERAL_RST_MSK);
 }
 
 
-int adcPhase(int st){
+
+
+int adcPhase(int st){ /**carlos needed clkphase 1 and 2? */
 	printf("\nSetting ADC Phase to %d\n",st);
-	if (st>65535 || st<-65535)
+	if (st > 65535 || st < -65535)
 		return clkPhase[0];
-#ifdef NEW_PLL_RECONFIG
-	printf("reset pll\n");
-	bus_w(PLL_CNTRL_REG,((1<<PLL_CNTR_PLL_RESET_BIT))); //reset PLL
-	usleep(100);
-	bus_w(PLL_CNTRL_REG, 0);
-	clkPhase[1]=st;
-#else
-	clkPhase[1]=st-clkPhase[0];
-#endif
-	printf("phase %d\n", clkPhase[1] );
-	configurePll(2);
-	clkPhase[0]=st;
+	clkPhase[1] = st - clkPhase[0];
 
+	printf("phase %d\n", clkPhase[1] );
+	configurePll();
+	clkPhase[0] = st;
 	return clkPhase[0];
 }
 
 
 int getPhase() {
 	return clkPhase[0];
-
-};
-
-
-
-
-
-
-/** Carlos later dont know if this is even used (all over the place in mcb_funcs.c) */
-// direct pattern output 
-u_int32_t putout(char *s, int modnum) {
-	int i;
-	u_int32_t pat;
-	int addr;
-
-	if (strlen(s)<16) {
-		fprintf(stdout," *** putout error: incorrect pattern length ***\n");
-		fprintf(stdout," %s \n",s);
-		return FAIL;
-	}
-
-	pat=0;
-	for (i=0;i<16;i++) {
-		if (s[i]=='1') pat=pat+(1<<(15-i));
-	}
-	//addr=SPI_REG+(modnum<<4);
-	addr=SPI_REG;//+(modnum<<SHIFTMOD); commented by dhanya
-	bus_w(addr, pat);
-
-	return OK;
 }
 
 
-// read direct input 
-u_int32_t readin(int modnum) {
-	return 0;
-}
+
+
 
 
 u_int32_t setClockDivider(int d) {
@@ -1262,24 +1130,24 @@ u_int32_t setClockDivider(int d) {
 		case FULL:
 			printf("Setting Half Speed (40 MHz)\n");
 			/**to be done*/
-			bus_w(DBIT_PIPELINE_REG, HALFSPEED_DBIT_PIPELINE);
+			bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED);
 			bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
-			initSpeedConfGain(HALFSPEED_CONF);
-			adcPhase(HALFSPEED_ADC_PHASE);
+			initSpeedConfGain(DAQ_HALF_SPEED);
+			adcPhase(ADC_PHASE_HALF_SPEED);
 			break;
 		case HALF:
 			printf("Setting Half Speed (20 MHz)\n");
-			bus_w(DBIT_PIPELINE_REG, HALFSPEED_DBIT_PIPELINE);
+			bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED);
 			bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL);
-			initSpeedConfGain(HALFSPEED_CONF);
-			adcPhase(HALFSPEED_ADC_PHASE);
+			initSpeedConfGain(DAQ_HALF_SPEED);
+			adcPhase(ADC_PHASE_HALF_SPEED);
 			break;
 		case QUARTER:
 			printf("Setting Half Speed (10 MHz)\n");
-			bus_w(DBIT_PIPELINE_REG, QUARTERSPEED_DBIT_PIPELINE);
+			bus_w(SAMPLE_REG, SAMPLE_ADC_QUARTER_SPEED);
 			bus_w(ADC_OFST_REG, ADC_OFST_QUARTER_SPEED_VAL);
-			initSpeedConfGain(QUARTERSPEED_CONF);
-			adcPhase(QUARTERSPEED_ADC_PHASE);
+			initSpeedConfGain(DAQ_QUARTER_SPEED);
+			adcPhase(ADC_PHASE_QUARTER_SPEED);
 			break;
 		}
 	}
@@ -1297,9 +1165,9 @@ u_int32_t getClockDivider(int ic) {
 	switch(initSpeedConfGain(-1)){
 	//case FULLSPEED_CONF:
 	//return FULL;
-	case HALFSPEED_CONF:
+	case DAQ_HALF_SPEED:
 		return HALF;
-	case QUARTERSPEED_CONF:
+	case DAQ_QUARTER_SPEED:
 		return QUARTER;
 	default:
 		return -1;
@@ -1317,7 +1185,7 @@ u_int32_t getClockDivider(int ic) {
 
 
 
-/**carlos  shouldnt exist what sort of temperatre?s*/
+/**carlos  shouldnt exist what sort of temperatre?s tempr in reg  is 1b<11 and temp pit is 1c<11*/
 int getTemperature(int tempSensor, int imod){
 	int val;
 	imod=0;//ignoring more than 1 mod for now
@@ -1358,7 +1226,7 @@ int getTemperature(int tempSensor, int imod){
 
 int initConfGain(int isettings,int val,int imod){
 	int retval;
-	u_int32_t addr=CONFGAIN_REG;
+	u_int32_t addr=DAQ_REG; /**carlos*/
 	if(isettings!=-1){
 		//#ifdef VERBOSE
 		printf("Setting Gain with val:0x%x\n",val);
@@ -1377,7 +1245,7 @@ int initConfGain(int isettings,int val,int imod){
 
 int initSpeedConfGain(int val){
 	int retval;
-	u_int32_t addr=CONFGAIN_REG;
+	u_int32_t addr=DAQ_REG; /**carlos*/
 	if(val!=-1){
 		//#ifdef VERBOSE
 		printf("\nSetting Speed of Gain reg with val:0x%x\n",val);
@@ -1399,44 +1267,33 @@ int initSpeedConfGain(int val){
 
 
 
-ROI *setROI(int nroi,ROI* arg,int *retvalsize, int *ret) {
-	cprintf(RED,"ROI Not implemented yet\n");
-	return NULL;
-}
-
-
-int getChannels() {
-	int nch=32;
-	int i;
-	for (i=0; i<NCHAN; i++) {
-		if (adcDisableMask & (1<<i)) nch--;
-	}
-	return nch;
-}
-
-
-
-
-
 
 
 void resetPLL() {
-	bus_w(PLL_CNTRL_REG,(1<<PLL_CNTR_RECONFIG_RESET_BIT)|(1<<PLL_CNTR_PLL_RESET_BIT)); //reset PLL and pll reconfig
+	// reset PLL Reconfiguration and PLL
+	bus_w(PLL_CONTROL_REG, bus_r(PLL_CONTROL_REG) | PLL_CTRL_RECONFIG_RST_MSK | PLL_CTRL_RST_MSK);
 	usleep(100);
-	bus_w(PLL_CNTRL_REG, 0);
+	bus_w(PLL_CONTROL_REG, bus_r(PLL_CONTROL_REG) & ~PLL_CTRL_RECONFIG_RST_MSK & ~PLL_CTRL_RST_MSK);
 }
 
 
 u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig) {
-	u_int32_t vv;
+
+/** carlos status reg pll reconfig busy bit?? */
 	// printf("*********** pll busy: %08x\n",bus_r(STATUS_REG)&PLL_RECONFIG_BUSY);
-	bus_w(PLL_PARAM_REG,val);
-	vv=reg<<PLL_CNTR_ADDR_OFF;
-	bus_w(PLL_CNTRL_REG,vv);
+
+	// set parameter
+	bus_w(PLL_PARAM_REG, val);
+
+	// set address
+	bus_w(PLL_CONTROL_REG, (reg << PLL_CTRL_ADDR_OFST) & PLL_CTRL_ADDR_MSK); /** should i read it first? */
 	usleep(10000);
-	bus_w(PLL_CNTRL_REG,vv|(1<<PLL_CNTR_WRITE_BIT) );//15 is trigger for the tap
-	bus_w(PLL_CNTRL_REG,vv);
+
+	//write parameter
+	bus_w(PLL_CONTROL_REG, bus_r(PLL_CONTROL_REG) | PLL_CTRL_WR_PARAMETER_MSK);
+	bus_w(PLL_CONTROL_REG, bus_r(PLL_CONTROL_REG) & ~PLL_CTRL_WR_PARAMETER_MSK);
 	usleep(10000);
+/**carlos usleep after?*/
 
 	return val;
 
@@ -1444,131 +1301,89 @@ u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig) {
 
 u_int32_t getPllReconfigReg(u_int32_t reg, int trig) {
 
+
+	// set address
+	bus_w(PLL_CONTROL_REG, (reg << PLL_CTRL_ADDR_OFST) & PLL_CTRL_ADDR_MSK);  /** should i read it first? */
+	usleep(100); /** carlos why less */
+
+	/** Not implemented yet carlos
+	bus_w(PLL_CONTROL_REG, bus_r(PLL_CONTROL_REG) | PLL_CTRL_RD_PARAMETER_MSK | PLL_CTRL_TRIG_MSK);
+	bus_w(PLL_CONTROL_REG, bus_r(PLL_CONTROL_REG) & ~PLL_CTRL_RD_PARAMETER_MSK & ~PLL_CTRL_TRIG_MSK);
+	usleep(100);
+	bus_w(PLL_CONTROL_REG, 0x0); //write zero? problem if address remain?
+
+	while(bus_r(STATUS_REG) & PLL_RECONFIG_BUSY) {
+		printf("get: reconfig busy");
+	}
+	 return what??
+	*/
+
+	/* nonsense
 	u_int32_t val=reg<<PLL_CNTR_ADDR_OFF;
 	u_int32_t vv;
-	//  printf("cntrlreg: %08x\n",PLL_CNTRL_REG);
+	//  printf("cntrlreg: %08x\n",PLL_CONTROL_REG);
 	// printf("wrote: %08x\n",val);
-	bus_w(PLL_CNTRL_REG,val);
-	//  printf("read: %08x\n",bus_r(PLL_CNTRL_REG));
+	bus_w(PLL_CONTROL_REG,val);
+	//  printf("read: %08x\n",bus_r(PLL_CONTROL_REG));
 	usleep(100);
 	val=(1<<PLL_CNTR_READ_BIT)|(reg<<PLL_CNTR_ADDR_OFF)|(trig<<15);
 	//  printf("wrote: %08x\n",val);
-	bus_w(PLL_CNTRL_REG,val);//15 is trigger for the tap
-	//  printf("read: %08x\n",bus_r(PLL_CNTRL_REG));
+	bus_w(PLL_CONTROL_REG,val);//15 is trigger for the tap
+	//  printf("read: %08x\n",bus_r(PLL_CONTROL_REG));
 	//  usleep(100);
 	val=(reg<<PLL_CNTR_ADDR_OFF);
 	//  printf("wrote: %08x\n",val);
-	bus_w(PLL_CNTRL_REG,val);
+	bus_w(PLL_CONTROL_REG,val);
 	usleep(100);
 
 	val=0;
 	// printf("wrote: %08x\n",val);
-	bus_w(PLL_CNTRL_REG,val);
+	bus_w(PLL_CONTROL_REG,val);
 
 	while(bus_r(STATUS_REG)&PLL_RECONFIG_BUSY) {
 		printf("get: reconfig busy");
 	}
 	return vv;
+	*/
+	return 0;
 }
 
 
 
 
 
-void configurePll(int i) {
-	u_int32_t l=0x0c;
-	u_int32_t h=0x0d;
+void configurePll() {
 	u_int32_t val;
 	int32_t phase=0, inv=0;
-	u_int32_t tot;
-	u_int32_t odd=1;//0;
-	//   printf("PLL reconfig reset\N");   bus_w(PLL_CNTRL_REG,(1<<PLL_CNTR_RECONFIG_RESET_BIT));  usleep(100);  bus_w(PLL_CNTRL_REG, 0);
-#ifndef NEW_PLL_RECONFIG
-	printf("PLL mode\n");   setPllReconfigReg(PLL_MODE_REG,1,0);
-	//  usleep(10000);
-#endif
 
-	if (i<2) {
-		tot= PLL_VCO_FREQ_MHZ/clockdivider_fc; /* which clock divider?????? Is it called? clean up!! */
-		l=tot/2;
-		h=l;
-		if (tot>2*l) {
-			h=l+1;
-			odd=1;
-		}
-		printf("Counter %d: Low is %d, High is %d\n",i, l,h);
-		val= (i<<18)| (odd<<17) | l | (h<<8);
-		printf("Counter %d, val: %08x\n", i,  val);
-		setPllReconfigReg(PLL_C_COUNTER_REG, val,0);
-		//  usleep(20);
-		//change sync at the same time as
-		if (i>0) {
-			val= (2<<18)| (odd<<17) | l | (h<<8);
-			printf("Counter %d, val: %08x\n", i,  val);
-			setPllReconfigReg(PLL_C_COUNTER_REG, val,0);
-		}
+	printf("phase in %d\n",clkPhase[1]);
+	if (clkPhase[1]>0) { /**carlos ? */
+		inv=0;
+		phase=clkPhase[1];
+	}  else {
+		inv=1;
+		phase=-1*clkPhase[1];
+	}
+	printf("phase out %d %08x\n",phase,phase);
 
+	if (inv) {
+		val=phase | (1<<16);// |  (inv<<21);
+		printf("**************** phase word %08x\n",val);
+		//  printf("Phase, val: %08x\n", val);
+		setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0
 	} else {
-		//  if (mode==1) {
-		//  } else {
-		printf("phase in %d\n",clkPhase[1]);
+		val=phase ;// |  (inv<<21);
+		printf("**************** phase word %08x\n",val);
+		//  printf("Phase, val: %08x\n", val);
+		setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0
 
-		if (clkPhase[1]>0) {
-			inv=0;
-			phase=clkPhase[1];
-		}  else {
-			inv=1;
-			phase=-1*clkPhase[1];
-		}
-
-		printf("phase out %d %08x\n",phase,phase);
-		if (inv) {
-			val=phase | (1<<16);// |  (inv<<21);
-			printf("**************** phase word %08x\n",val);
-
-			//  printf("Phase, val: %08x\n", val);
-			setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0
-		} else {
-
-
-			val=phase ;// |  (inv<<21);
-			printf("**************** phase word %08x\n",val);
-
-			//  printf("Phase, val: %08x\n", val);
-			setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0
-#ifndef NEW_PLL_RECONFIG
-			printf("Start reconfig\n");  setPllReconfigReg(PLL_START_REG, 1,0);
-
-			// bus_w(PLL_CNTRL_REG, 0);
-			printf("Status register\n"); getPllReconfigReg(PLL_STATUS_REG,0);
-			// sleep(1);
-
-			printf("PLL mode\n");   setPllReconfigReg(PLL_MODE_REG,1,0);
-			//  usleep(10000);
-
-#endif
-			printf("**************** phase word %08x\n",val);
-
-			val=phase | (2<<16);// |  (inv<<21);
-			//  printf("Phase, val: %08x\n", val);
-			setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0
-		}
+		printf("**************** phase word %08x\n",val);
+		val=phase | (2<<16);// |  (inv<<21);
+		//  printf("Phase, val: %08x\n", val);
+		setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0
 	}
-#ifndef NEW_PLL_RECONFIG
-	printf("Start reconfig\n");  setPllReconfigReg(PLL_START_REG, 1,0);
 
-	// bus_w(PLL_CNTRL_REG, 0);
-	printf("Status register\n"); getPllReconfigReg(PLL_STATUS_REG,0);
-	// sleep(1);
-#endif 
-	//  printf("PLL mode\n");   setPllReconfigReg(PLL_MODE_REG,0,0);
 	usleep(10000);
-	if (i<2) {
-		printf("reset pll\n");
-		bus_w(PLL_CNTRL_REG,((1<<PLL_CNTR_PLL_RESET_BIT))); //reset PLL
-		usleep(100);
-		bus_w(PLL_CNTRL_REG, 0);
-	}
 }
 
 
@@ -1587,9 +1402,6 @@ int loadImage(int index, short int ImageVals[]){
 
 int readCounterBlock(int startACQ, short int CounterVals[]){
 
-	//char *counterVals=NULL;
-	//counterVals=realloc(counterVals,dataBytes);
-
 	u_int32_t val;
 	volatile u_int16_t *ptr;
 
@@ -1612,10 +1424,10 @@ int readCounterBlock(int startACQ, short int CounterVals[]){
 	printf("Value of multipurpose reg:%d\n",bus_r(MULTI_PURPOSE_REG));
 #endif
 
-	memcpy(CounterVals,(u_int16_t *)ptr,dataBytes);
+	memcpy(CounterVals,(u_int16_t *)ptr,DATA_BYTES);
 #ifdef VERBOSE
 	int i;
-	printf("Copied counter memory block with size of %d bytes..\n",dataBytes);
+	printf("Copied counter memory block with size of %d bytes..\n",DATA_BYTES);
 	for(i=0;i<6;i++)
 		printf("%d: %d\t",i,CounterVals[i]);
 #endif
@@ -1649,7 +1461,7 @@ int readCounterBlock(int startACQ, short int CounterVals[]){
 int resetCounterBlock(int startACQ){
 
 	char *counterVals=NULL;
-	counterVals=realloc(counterVals,dataBytes);
+	counterVals=realloc(counterVals,DATA_BYTES);
 
 	int ret = OK;
 	u_int32_t val;
@@ -1670,7 +1482,7 @@ int resetCounterBlock(int startACQ){
 #endif
 	}
 
-	val=bus_r(MULTI_PURPOSE_REG);
+	val=bus_r(MULTI_PURPOSE_REG);/** carlos, does this exist? .. its reg 0... */
 #ifdef VERBOSE
 	printf("Value of multipurpose reg:%d\n",bus_r(MULTI_PURPOSE_REG));
 #endif
@@ -1682,7 +1494,7 @@ int resetCounterBlock(int startACQ){
 #endif
 
 
-	memcpy(counterVals,(u_int16_t*)ptr,dataBytes);/*warning: passing argument 2 of ‘memcpy’ discards qualifiers from pointer target type*/
+	memcpy(counterVals,(u_int16_t*)ptr,DATA_BYTES);/*warning: passing argument 2 of ‘memcpy’ discards qualifiers from pointer target type*/
 #ifdef VERBOSE
 	int i;
 	printf("Copied counter memory block with size of %d bytes..\n",(int)sizeof(counterVals));
@@ -1790,187 +1602,6 @@ int calibratePedestal(int frames){
 
 
 
-uint64_t readPatternWord(int addr) {
-	uint64_t word=0;
-	int cntrl=0;
-
-	if (addr>=MAX_PATTERN_LENGTH)
-		return -1;
-
-
-	printf("read %x\n",addr);
-	cntrl= (addr&APATTERN_MASK) << PATTERN_CTRL_ADDR_OFFSET;
-	bus_w(PATTERN_CNTRL_REG, cntrl);
-	usleep(1000);
-	bus_w(PATTERN_CNTRL_REG, cntrl | (1<< PATTERN_CTRL_READ_BIT)  );
-	usleep(1000);
-	printf("reading\n");
-	word=get64BitReg(PATTERN_OUT_LSB_REG,PATTERN_OUT_MSB_REG);
-	printf("read %llx\n", word);
-	usleep(1000);
-	bus_w(PATTERN_CNTRL_REG, cntrl);
-	printf("done\n");
-
-	return word;
-}
-
-uint64_t writePatternWord(int addr, uint64_t word) {
-
-
-	int cntrl=0;
-	if (addr>=MAX_PATTERN_LENGTH)
-		return -1;
-
-	printf("write %x %llx\n",addr, word);
-	if (word!=-1){
-
-		set64BitReg(word,PATTERN_IN_REG_LSB,PATTERN_IN_REG_MSB);
-
-
-		cntrl= (addr&APATTERN_MASK) << PATTERN_CTRL_ADDR_OFFSET;
-		bus_w(PATTERN_CNTRL_REG, cntrl);
-		usleep(1000);
-		bus_w(PATTERN_CNTRL_REG, cntrl | (1<< PATTERN_CTRL_WRITE_BIT)  );
-		usleep(1000);
-		bus_w(PATTERN_CNTRL_REG, cntrl);
-		return word;
-	} else
-		return readPatternWord(addr);
-}
-
-uint64_t writePatternIOControl(uint64_t word) {
-	return FAIL;
-}
-
-uint64_t writePatternClkControl(uint64_t word) {
-	return FAIL;
-}
-
-int setPatternLoop(int level, int *start, int *stop, int *n) {
-	int ret=OK;
-	int lval=0;
-
-	int nreg;
-	int areg;
-
-	switch (level ) {
-	case 0:
-		nreg=PATTERN_N_LOOP0_REG;
-		areg=PATTERN_LOOP0_AREG;
-		break;
-	case 1:
-		nreg=PATTERN_N_LOOP1_REG;
-		areg=PATTERN_LOOP1_AREG;
-		break;
-	case 2:
-		nreg=PATTERN_N_LOOP2_REG;
-		areg=PATTERN_LOOP2_AREG;
-		break;
-	case -1:
-		nreg=-1;
-		areg=PATTERN_LIMITS_AREG;
-		break;
-	default:
-		return FAIL;
-	}
-
-	printf("level %d start %x stop %x nl %d\n",level, *start, *stop, *n);
-	if (nreg>=0) {
-		if ((*n)>=0) bus_w(nreg, *n);
-		printf ("n %d\n",*n);
-		*n=bus_r(nreg);
-		printf ("n %d\n",*n);
-
-	}
-
-	printf("level %d start %x stop %x nl %d\n",level, *start, *stop, *n);
-	lval=bus_r(areg);
-	/*     printf("l=%x\n",bus_r16(areg)); */
-	/*     printf("m=%x\n",bus_r16_m(areg)); */
-
-
-
-
-
-	printf("lval %x\n",lval);
-	if (*start==-1) *start=(lval>> ASTART_OFFSET)   & APATTERN_MASK;
-	printf("start %x\n",*start);
-
-
-	if (*stop==-1) *stop=(lval>> ASTOP_OFFSET)   & APATTERN_MASK;
-	printf("stop %x\n",*stop);
-
-	lval= ((*start & APATTERN_MASK) << ASTART_OFFSET) | ((*stop & APATTERN_MASK) << ASTOP_OFFSET);
-	printf("lval %x\n",lval);
-
-	bus_w(areg,lval);
-	printf("lval %x\n",lval);
-
-
-	return ret;
-}
-
-
-int setPatternWaitAddress(int level, int addr) {
-	int reg;
-
-	switch (level) {
-	case 0:
-		reg=PATTERN_WAIT0_AREG;
-		break;
-	case 1:
-		reg=PATTERN_WAIT1_AREG;
-		break;
-	case 2:
-		reg=PATTERN_WAIT2_AREG;
-		break;
-	default:
-		return -1;
-	};
-	//  printf("BEFORE *********PATTERN IOCTRL IS %llx (%x)\n",writePatternIOControl(-1), PATTERN_IOCTRL_REG_MSB);
-
-	// printf ("%d addr %x (%x)\n",level,addr,reg);
-	if (addr>=0) bus_w(reg, addr);
-	// printf ("%d addr %x %x (%x) \n",level,addr, bus_r(reg), reg);
-
-	// printf("AFTER *********PATTERN IOCTRL IS %llx (%x)\n",writePatternIOControl(-1), PATTERN_IOCTRL_REG_MSB);
-
-	return bus_r(reg);
-}
-
-
-uint64_t setPatternWaitTime(int level, uint64_t t) {
-	int reglsb;
-	int regmsb;
-
-
-	switch (level) {
-	case 0:
-		reglsb=PATTERN_WAIT0_TIME_REG_LSB;
-		regmsb=PATTERN_WAIT0_TIME_REG_MSB;
-		break;
-	case 1:
-		reglsb=PATTERN_WAIT1_TIME_REG_LSB;
-		regmsb=PATTERN_WAIT1_TIME_REG_MSB;
-		break;
-	case 2:
-		reglsb=PATTERN_WAIT2_TIME_REG_LSB;
-		regmsb=PATTERN_WAIT2_TIME_REG_MSB;
-		break;
-	default:
-		return -1;
-	}
-
-
-	if (t>=0) set64BitReg(t,reglsb,regmsb);
-	return get64BitReg(reglsb,regmsb);
-
-}
-
-
-
-
-
 
 
 
@@ -1987,11 +1618,8 @@ uint64_t setPatternWaitTime(int level, uint64_t t) {
 
 u_int32_t setExtSignal(int d, enum externalSignalFlag  mode) {
 
-	u_int32_t c;
-	c=bus_r(EXT_SIGNAL_REG);
-
-	if (d>=0 && d<4) {
-		signals[d]=mode;
+	if (d >= 0 && d < 4) {
+		signals[d] = mode;
 #ifdef VERBOSE
 		printf("settings signal variable number %d to value %04x\n", d, signals[d]);
 #endif
@@ -2056,15 +1684,15 @@ u_int32_t setFPGASignal(int d, enum externalSignalFlag  mode) {
 	int modes[]={EXT_SIG_OFF, EXT_GATE_IN_ACTIVEHIGH, EXT_GATE_IN_ACTIVELOW,EXT_TRIG_IN_RISING,EXT_TRIG_IN_FALLING,EXT_RO_TRIG_IN_RISING, EXT_RO_TRIG_IN_FALLING,EXT_GATE_OUT_ACTIVEHIGH, EXT_GATE_OUT_ACTIVELOW, EXT_TRIG_OUT_RISING, EXT_TRIG_OUT_FALLING, EXT_RO_TRIG_OUT_RISING, EXT_RO_TRIG_OUT_FALLING};
 
 	u_int32_t c;
-	int off=d*SIGNAL_OFFSET;
-	c=bus_r(EXT_SIGNAL_REG);
+	int off = d * SIGNAL_OFFSET;
+	c = bus_r(EXT_SIGNAL_REG);
 
 
 	if (mode<=RO_TRIGGER_OUT_FALLING_EDGE &&  mode>=0) {
 #ifdef VERBOSE
 		printf("writing signal register number %d mode %04x\n",d, modes[mode]);
 #endif
-		bus_w(EXT_SIGNAL_REG,((modes[mode])<<off)|(c&~(SIGNAL_MASK<<off)));
+		bus_w(EXT_SIGNAL_REG,((modes[mode])<<off)|(c&~(SIGNAL_MASK<<off))); /** will not work. cArlos */
 	}
 	return getExtSignal(d);
 }
@@ -2075,7 +1703,7 @@ int getFPGASignal(int d) {
 	int modes[]={SIGNAL_OFF, GATE_IN_ACTIVE_HIGH, GATE_IN_ACTIVE_LOW,TRIGGER_IN_RISING_EDGE, TRIGGER_IN_FALLING_EDGE,RO_TRIGGER_IN_RISING_EDGE, RO_TRIGGER_IN_FALLING_EDGE, GATE_OUT_ACTIVE_HIGH,   GATE_OUT_ACTIVE_LOW, TRIGGER_OUT_RISING_EDGE, TRIGGER_OUT_FALLING_EDGE, RO_TRIGGER_OUT_RISING_EDGE,RO_TRIGGER_OUT_FALLING_EDGE};
 
 	int off=d*SIGNAL_OFFSET;
-	int mode=((bus_r(EXT_SIGNAL_REG)&(SIGNAL_MASK<<off))>>off);
+	int mode=((bus_r(EXT_SIGNAL_REG)&(SIGNAL_MASK<<off))>>off); /** will not work. cArlos */
 
 	if (mode<=RO_TRIGGER_OUT_FALLING_EDGE) {
 		if (modes[mode]!=SIGNAL_OFF && signals[d]!=MASTER_SLAVE_SYNCHRONIZATION)
diff --git a/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.h b/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.h
index 001c75df3..98aadc143 100755
--- a/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.h
+++ b/slsDetectorSoftware/jungfrauDetectorServer/firmware_funcs.h
@@ -48,7 +48,7 @@ int stopWritingFPGAprogram(FILE* filefp);
 int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp);
 
 long int calcChecksum(int sourceip, int destip);
-void configureMAC(uint32_t destip,uint64_t destmac,uint64_t  sourcemac,int detipad,int ival,uint32_t destport);
+void configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, int detipad, uint32_t destport);
 
 int64_t set64BitReg(int64_t value, int aLSB, int aMSB);
 int64_t get64BitReg(int aLSB, int aMSB);
@@ -81,22 +81,14 @@ int64_t getActualTime();
 int64_t getMeasurementTime();
 int64_t getFramesFromStart();
 
-int setDynamicRange(int dr);
-int getDynamicRange();
-int getNModBoard();
-int setNMod(int n);
-int getNMod();
-
 u_int32_t runBusy(void); 
-u_int32_t runState(void); 
-
 int startStateMachine();
 int stopStateMachine();
 int startReadOut();
 enum runStatus getStatus();
 void waitForAcquisitionEnd();
 
-void serializeToSPI(int bitsize, u_int32_t val, u_int16_t csmask, int numbitstosend, u_int16_t clkmask, u_int16_t digoutmask, int digofset);
+void serializeToSPI(u_int32_t addr, u_int32_t val, u_int16_t csmask, int numbitstosend, u_int16_t clkmask, u_int16_t digoutmask, int digofset);
 void initDac(int dacnum);
 int setDac(int dacnum, int dacvalue);
 int setHighVoltage(int val, int imod);
@@ -104,8 +96,16 @@ void setAdc(int addr, int val);
 void configureAdc();
 void prepareADC();
 
+int setDynamicRange(int dr);
+int getDynamicRange();
+int getNModBoard();
+int setNMod(int n);
+int getNMod();
+
 int powerChip (int on);
-int setPhaseShiftOnce();
+void cleanFifos();
+void resetCore();
+void resetPeripheral();
 int adcPhase(int st);
 int getPhase();
 
@@ -114,29 +114,19 @@ u_int32_t readin(int modnum);
 u_int32_t setClockDivider(int d);
 u_int32_t getClockDivider();
 
-void resetPLL();
-u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig);
-u_int32_t getPllReconfigReg(u_int32_t reg, int trig);
-void configurePll(int i);
-
 int getTemperature(int tempSensor,int imod);
 int initConfGain(int isettings,int val,int imod);
 int initSpeedConfGain(int val);
 
-ROI *setROI(int nroi,ROI* arg,int *retvalsize, int *ret);
-int getChannels();
+void resetPLL();
+u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig);
+u_int32_t getPllReconfigReg(u_int32_t reg, int trig);
+void configurePll();
 
 int loadImage(int index, short int ImageVals[]);
 int readCounterBlock(int startACQ, short int CounterVals[]);
 int resetCounterBlock(int startACQ);
 int calibratePedestal(int frames);
-uint64_t readPatternWord(int addr);
-uint64_t writePatternWord(int addr, uint64_t word);
-uint64_t writePatternIOControl(uint64_t word);
-uint64_t writePatternClkControl(uint64_t word);
-int setPatternLoop(int level, int *start, int *stop, int *n);
-int setPatternWaitAddress(int level, int addr);
-uint64_t setPatternWaitTime(int level, uint64_t t);
 
 u_int32_t setExtSignal(int d, enum externalSignalFlag  mode);
 int  getExtSignal(int d);
diff --git a/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.c b/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.c
index 3716aaeea..c92222f2e 100755
--- a/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.c
+++ b/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.c
@@ -1,28 +1,20 @@
 #ifdef MCB_FUNCS
 
+#include "registers_m.h"
+#include "server_defs.h"
+#include "firmware_funcs.h"
+#include "mcb_funcs.h"
+
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
 #include <unistd.h>
 #include <math.h>
-#include "registers_m.h"
-
-#ifndef PICASSOD
-#include "server_defs.h"
-#else
-#include "picasso_defs.h"
-#endif
-#include "firmware_funcs.h"
-#include "mcb_funcs.h"
-
 
 /* global variables */
-#undef DEBUG
 
 
-extern enum detectorType myDetectorType;
-extern int nModX;
-extern int dynamicRange;
+
 enum detectorSettings thisSettings;
 
 int sChan, sChip, sMod, sDac, sAdc;
@@ -40,7 +32,6 @@ int *detectorAdcs=NULL;
 int initDetector() {
   int imod;
   int n=getNModBoard();
-  nModX=n;
 #ifdef VERBOSE
   printf("Board is for %d modules\n",n);
 #endif
@@ -196,15 +187,16 @@ int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) {
 
 
 
+
+/* Register commands */
+
 int clearCSregister(int imod) {
 
   putout("0000000001000000",imod);  
   putout("0000100001000000",imod);  
   putout("0000100001000000",imod);
   putout("0000000001000000",imod);  
-#ifdef DEBUG
-  fprintf(stdout, "Clearing CS shiftregister\n");
-#endif
+
   /*  
       sChan=noneSelected;
       sMod=noneSelected;
@@ -225,9 +217,7 @@ int setCSregister(int imod){
   putout("0001000001000000",imod);  
   putout("0001000001000000",imod);
   putout("0000000001000000",imod);  
-#ifdef DEBUG
-  fprintf(stdout, "Setting CS shiftregister\n");
-#endif
+
   putout("0000000000000000",imod);
   sChip=allSelected;
   sMod=imod;
@@ -241,9 +231,7 @@ int nextChip(int imod){
   putout("0000000001000000",imod);  
   putout("0010000001000000",imod);
   putout("0000000001000000",imod); 
-#ifdef DEBUG
-  fprintf(stdout, "Next Chip\n");
-#endif
+
   sChip++;
   sMod=imod;
   if (imod==ALLMOD)
@@ -256,9 +244,7 @@ int firstChip(int imod){
   putout("0100000001000000",imod);  
   putout("0110000001000000",imod);
   putout("0100000001000000",imod); 
-#ifdef DEBUG
-  fprintf(stdout, "First Chip\n");
-#endif
+
   sChip=0;
   sMod=imod;
   if (imod==ALLMOD)
@@ -272,9 +258,7 @@ int clearSSregister(int imod){
   for (i=0; i<10; i++)   
     putout("0000111000000000",imod);
   putout("0000011000000000",imod); 
-#ifdef DEBUG
-  fprintf(stdout,"Clearing SS shiftregister\n");
-#endif
+
   putout("0000000000000000",imod);
   sChan=noneSelected;
   sMod=imod;
@@ -289,9 +273,7 @@ int setSSregister(int imod){
   for (i=0; i<10; i++) 
     putout("0001011000000000",imod);
   putout("0000011000000000",imod);  
-#ifdef DEBUG
-  fprintf(stdout,"Setting SS shiftregister\n");
-#endif
+
   putout("0000000000000000",imod);
   sChan=allSelected;
   sMod=imod;
@@ -304,9 +286,7 @@ int nextStrip(int imod){
   putout("0000011000000000",imod); 
   putout("0010011000000000",imod);
   putout("0000011000000000",imod); 
-#ifdef DEBUG
-  fprintf(stdout,"|-");
-#endif
+
   sChan++;
   sMod=imod;
   if (imod==ALLMOD)
@@ -345,54 +325,6 @@ int selChip(const int chip,int imod) {
 }  
 
 
-int getTemperatureByModule(int tempSensor, int imod)
-{
-  int im;
-  //for the particular module
-  if (imod>=0 && imod<nModX) { 
-    return getTemperature(tempSensor,imod);
-  }
-  else{
-    //checks if all modules have the same value(ALLMOD)
-    for (im=1; im<nModX; im++) {
-      if (getTemperature(tempSensor,im)!=getTemperature(tempSensor,0)) {
-	return -1;
-      }
-    }
-    return getTemperature(tempSensor,0);
-  }
-}
-
-
-
-int initConfGainByModule(int isettings,int val, int imod)
-{
-  int im;
-  //for the particular module
-  if (imod>=0 && imod<nModX) { 
-    return initConfGain(isettings,val,imod);
-  }
-  else{
-    //checks if all modules have the same value(ALLMOD)
-    for (im=1; im<nModX; im++) {
-      if (initConfGain(isettings,val,im)!=initConfGain(isettings,val,0))
-	return -1;
-    }
-    return initConfGain(isettings,val,0);
-  }
-}
-
-
-void showbits(int h)
-{
-  if(h==1)
-    printf("%d",h);
-  else
-    {
-      showbits(h/2);
-      printf("%d",h%2);
-    }
-}
 
 
 
@@ -414,27 +346,27 @@ int setSettings(int i, int imod) {
 	//determine conf value to write
 	if(i!=GET_SETTINGS){
 		switch(i){
-		case DYNAMICGAIN: 	val = dynamic;break;
-		case DYNAMICHG0: 	val = dynamichighgain0;break;
-		case FIXGAIN1: 		val = fixgain1;break;
-		case FIXGAIN2: 		val = fixgain2;break;
-		case FORCESWITCHG1: val = forceswitchgain1;break;
-		case FORCESWITCHG2: val = forceswitchgain2;break;
+		case DYNAMICGAIN: 	val = dynamic;			break;
+		case DYNAMICHG0: 	val = dynamichighgain0;	break;
+		case FIXGAIN1: 		val = fixgain1;			break;
+		case FIXGAIN2: 		val = fixgain2;			break;
+		case FORCESWITCHG1: val = forceswitchgain1;	break;
+		case FORCESWITCHG2: val = forceswitchgain2;	break;
 		default:
 			printf("Error: This settings is not defined for this detector %d\n",i);
 			return GET_SETTINGS;
 		}
 	}
 
-	retval=initConfGainByModule(i,val,imod);
+	retval = initConfGain(i,val,imod);
 
 	switch(retval){
-	case dynamic: isett=DYNAMICGAIN;	break;
-	case dynamichighgain0: isett=DYNAMICHG0;	break;
-	case fixgain1: isett=FIXGAIN1;		break;
-	case fixgain2: isett=FIXGAIN2;		break;
-	case forceswitchgain1: isett=FORCESWITCHG1;	break;
-	case forceswitchgain2: isett=FORCESWITCHG2;	break;
+	case dynamic: 			isett=DYNAMICGAIN;		break;
+	case dynamichighgain0: 	isett=DYNAMICHG0;		break;
+	case fixgain1: 			isett=FIXGAIN1;			break;
+	case fixgain2: 			isett=FIXGAIN2;			break;
+	case forceswitchgain1: 	isett=FORCESWITCHG1;	break;
+	case forceswitchgain2: 	isett=FORCESWITCHG2;	break;
 	default:
 		isett=UNDEFINED;
 		printf("Error:Wrong settings read out from Gain Reg 0x%x\n",retval);
@@ -451,6 +383,9 @@ int setSettings(int i, int imod) {
 
 
 
+
+
+
 /* Initialization*/
 
 int initChannelbyNumber(sls_detector_channel myChan) {printf("in init channel by number\n");
@@ -478,7 +413,7 @@ int initChannelbyNumber(sls_detector_channel myChan) {printf("in init channel by
   
    initChannel(ft,cae,ae, coe, ocoe, counts,myChan.module);
 
-   setDynamicRange(dynamicRange);
+   setDynamicRange(DYNAMIC_RANGE);
 
    setCSregister(ALLMOD);
    clearSSregister(ALLMOD); 
@@ -495,7 +430,7 @@ int getChannelbyNumber(sls_detector_channel* myChan) {
   ichan=myChan->chan;
    
   if (detectorChans) {
-    if (imod<nModX && imod>=0) {
+    if (imod<NMODX && imod>=0) {
       if (ichip<(detectorModules+imod)->nchip && ichan<(detectorModules+imod)->nchan/(detectorModules+imod)->nchip)
 	myChan->reg=detectorChans[imod*NCHAN*NCHIP+ichip*NCHAN+ichan];
       return OK;
@@ -515,6 +450,8 @@ int getTrimbit(int imod, int ichip, int ichan) {
   return -1;
 }
 
+
+
 int initChannel(int ft,int cae, int ae, int coe, int ocoe, int counts, int imod){
   
   int ibit, bit, i, im, ichip, ichan;
@@ -561,8 +498,8 @@ int initChannel(int ft,int cae, int ae, int coe, int ocoe, int counts, int imod)
   
   if (sMod==allSelected) {
     modmi=0;
-    modma=nModX;//getNModBoard();
-  } else if (sMod==noneSelected || sMod>nModX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) {
+    modma=NMODX;//getNModBoard();
+  } else if (sMod==noneSelected || sMod>NMODX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) {
     modmi=0;
     modma=-1;
     return 1;
@@ -779,7 +716,7 @@ int getChipbyNumber(sls_detector_chip* myChip){
   ichip=myChip->chip;
   
   if (detectorChips) {
-    if (imod<nModX)
+    if (imod<NMODX)
       if (ichip<(detectorModules+imod)->nchip) {
 	myChip->reg=detectorChips[ichip+imod*NCHIP];
 	myChip->nchan=NCHAN;
@@ -873,8 +810,8 @@ int initChip(int obe, int ow,int imod){
   
   if (sMod==allSelected) {
     modmi=0;
-    modma=nModX;//getNModBoard();
-  } else if (sMod==noneSelected || sMod>nModX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) {
+    modma=NMODX;//getNModBoard();
+  } else if (sMod==noneSelected || sMod>NMODX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) {
     modmi=0;
     modma=-1;
   } else {
@@ -973,8 +910,8 @@ int initChipWithProbes(int obe, int ow,int nprobes, int imod){
   
   if (sMod==allSelected) {
     modmi=0;
-    modma=nModX;//getNModBoard();
-  } else if (sMod==noneSelected || sMod>nModX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) {
+    modma=NMODX;//getNModBoard();
+  } else if (sMod==noneSelected || sMod>NMODX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) {
     modmi=0;
     modma=-1;
   } else {
@@ -1035,8 +972,8 @@ int initMCBregisters(int cm, int imod){
   
   if (sMod==allSelected) {
     modmi=0;
-    modma=nModX;
-  } else if (sMod==noneSelected || sMod>nModX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) {
+    modma=NMODX;
+  } else if (sMod==noneSelected || sMod>NMODX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) {
     modmi=0;
     modma=-1;
   } else {
@@ -1075,8 +1012,8 @@ int initModulebyNumber(sls_detector_module myMod) {
     sMod=allSelected;
   if (sMod==allSelected) {
     modmi=0;
-    modma=nModX;//getNModBoard();
-  } else if (sMod==noneSelected || sMod>nModX || sMod<0) {// (sMod==noneSelected || sMod>getNModBoard() || sMod<0) {
+    modma=NMODX;//getNModBoard();
+  } else if (sMod==noneSelected || sMod>NMODX || sMod<0) {// (sMod==noneSelected || sMod>getNModBoard() || sMod<0) {
     modmi=0;
     modma=-1;
   } else {
@@ -1124,12 +1061,12 @@ int getModulebyNumber(sls_detector_module* myMod) {
   return OK;
 }
 
+
+
 /* To chips */
 int clearCounter(int imod){
   int i;
-#ifdef DEBUG
-  printf("Clearing counter with contclear\n");
-#endif
+
   putout("0000000000000000",imod);  
   for (i=0; i<10; i++)   
     putout("0000000000010000",imod);   
@@ -1140,9 +1077,7 @@ int clearCounter(int imod){
 
 int clearOutReg(int imod){
   int i;
-#ifdef DEBUG
-  printf("Clearing output register\n");
-#endif
+
   putout("0000010000000000",imod); 
   for (i=0; i<10; i++)
     putout("0000110000000000",imod);   
@@ -1151,9 +1086,7 @@ int clearOutReg(int imod){
 }
 int setOutReg(int imod){
   int i;
-#ifdef DEBUG
-  printf("Setting output register\n");
-#endif
+
   putout("0000010000000000",imod); 
   for (i=0; i<10; i++)
     putout("0001010000000000",imod);   
@@ -1164,9 +1097,7 @@ int setOutReg(int imod){
 
 int extPulse(int ncal, int imod) {
   int ical;
-#ifdef DEBUG
-  printf("Giving a clock pulse to the counter\n");
-#endif
+
   for (ical=0; ical<ncal; ical++) {
     putout("0000001000000000",imod);
     putout("0010001000000000",imod);
@@ -1176,9 +1107,7 @@ int extPulse(int ncal, int imod) {
 }
 int calPulse(int ncal, int imod) {
   int ical,i;
-#ifdef DEBUG
-  printf("Giving a cal pulse\n");
-#endif
+
   for (ical=0; ical<ncal; ical++) { 
     //printf("%d\n",ical);
      for (i=0; i<10; i++)
@@ -1193,9 +1122,7 @@ int calPulse(int ncal, int imod) {
 }
 
 int countEnable(int imod) {
-#ifdef DEBUG
-  printf("Enabling counter\n");
-#endif
+
   putout("0000000000100000",imod);
   return 0;
 }
@@ -1203,9 +1130,7 @@ int countEnable(int imod) {
 
 int counterClear(int imod) {
   int i;
-#ifdef DEBUG
-  printf("Clearing counter in counter mode\n");
-#endif
+
   putout("0000001000000000",imod);
   for (i=0; i<10; i++) 
     putout("0000101000000000",imod);
@@ -1215,9 +1140,7 @@ int counterClear(int imod) {
 
 int counterSet(int imod) {
   int i;
-#ifdef DEBUG
-  printf("Setting counter\n");
-#endif
+
   putout("0000001000000000",imod);
   for (i=0; i<20; i++)
     putout("0001001000000000",imod);
@@ -1225,6 +1148,11 @@ int counterSet(int imod) {
 
   return 0;
 }
+
+
+
+
+
 // Fifo continuous read 
 
 int readOutChan(int *val) {
@@ -1235,17 +1163,11 @@ int readOutChan(int *val) {
   clearOutReg(ALLMOD);
   
   setOutReg(ALLMOD);
-
-#ifdef DEBUG
-  printf("Reading out one channel\n");
-#endif
-
   
-
   for (i=0; i<nbit; i++) {
     putout("0000010000000000", ALLMOD);
     k=0;
-    for (k=0; k<nModX; k++) {
+    for (k=0; k<NMODX; k++) {
       v=readin(k);
       //v=bus_r(MCB_DOUT_REG_OFF+(k<<SHIFTMOD)) & 0x3ff;
       for (j=0; j<NCHIP; j++) {
@@ -1300,7 +1222,7 @@ int testShiftIn(int imod) {
       putout("0000000000000000",ALLMOD); 
       
       k=imod;
-      //for (k=0; k<nModX; k++) {
+      //for (k=0; k<NMODX; k++) {
       val=readin(k);
       //val=bus_r(MCB_DOUT_REG_OFF+(k<<SHIFTMOD)) & 0x3ff;
 	for (j=0; j<10; j++) {	
@@ -1356,7 +1278,7 @@ int testShiftOut(int imod) {
 
 
     k=imod;
-    //for (k=0; k<nModX; k++) {
+    //for (k=0; k<NMODX; k++) {
     val=readin(k);
     //val=bus_r(MCB_DOUT_REG_OFF+(k<<SHIFTMOD)) & 0x3ff;
       //printf("%8x\n",val);
@@ -1403,7 +1325,7 @@ int testShiftStSel(int imod) {
 
 
     k=imod;
-    //for (k=0; k<nModX; k++) {
+    //for (k=0; k<NMODX; k++) {
     val=readin(k);
     //val=bus_r(MCB_DOUT_REG_OFF+(k<<SHIFTMOD)) & 0x3ff;
 	for (j=0; j<NCHIP; j++) {
@@ -1435,7 +1357,7 @@ int testShiftStSel(int imod) {
 
 
 int testDataInOut(int num, int imod) {
-  int val[NCHIP*nModX], result=OK;
+  int val[NCHIP*NMODX], result=OK;
   int ich, ichip;
   setCSregister(ALLMOD);
   printf("Testing data in out for module %d pattern 0x%x\n", imod, num);
@@ -1449,7 +1371,7 @@ int testDataInOut(int num, int imod) {
     nextStrip(ALLMOD);
     readOutChan(val);
     //imod=0;
-    //for (imod=0; imod<nModX; imod++) {
+    //for (imod=0; imod<NMODX; imod++) {
       for (ichip=0; ichip<NCHIP; ichip++) {
 	if (val[ichip+imod*NCHIP]!=num) {
 	  printf("Test datain out: Channel %d read %x instead of %x\n", (imod*NCHIP+ichip)*NCHAN+ich, val[ichip+NCHIP*imod], num);
@@ -1541,7 +1463,7 @@ int testOutMux(int imod) {
 
       i=0;
       k=imod;
-      //for (k=0; k<nModX; k++) {
+      //for (k=0; k<NMODX; k++) {
       val=readin(k);
       //val=bus_r(MCB_DOUT_REG_OFF+(k<<SHIFTMOD)) & 0x3ff; 
 
@@ -1567,7 +1489,7 @@ int testOutMux(int imod) {
 
       i++;
       k=imod;
-      //for (k=0; k<nModX; k++) {
+      //for (k=0; k<NMODX; k++) {
       val=readin(k);
       //val=bus_r(MCB_DOUT_REG_OFF+(k<<SHIFTMOD)) & 0x3ff; 
 
@@ -1598,7 +1520,7 @@ int testOutMux(int imod) {
 
       i++;
       k=imod;
-      //for (k=0; k<nModX; k++) {
+      //for (k=0; k<NMODX; k++) {
       val=readin(k);
       //val=bus_r(MCB_DOUT_REG_OFF+(k<<SHIFTMOD)) & 0x3ff; 
 
@@ -1624,7 +1546,7 @@ int testOutMux(int imod) {
       putout("0000010001110000",ALLMOD);
       i++;
       k=imod;
-      //for (k=0; k<nModX; k++) {
+      //for (k=0; k<NMODX; k++) {
       val=readin(k);
       //val=bus_r(MCB_DOUT_REG_OFF+(k<<SHIFTMOD)) & 0x3ff; 
 
@@ -1728,7 +1650,7 @@ int testFpgaMux(int imod)  {
 		     
       for (i=0; i<4; i++) {
 	k=imod;
-	//for (k=0; k<nModX; k++) {
+	//for (k=0; k<NMODX; k++) {
 	val=readin(k);
 	//val=bus_r(MCB_DOUT_REG_OFF+(k<<SHIFTMOD)) & 0x3ff; 
   
@@ -1783,7 +1705,7 @@ int calibration_sensor(int num, int *v, int *dacs) {
 
  
     printf("calibrating sensor...");
-  for (imod=0; imod<nModX; imod++) {
+  for (imod=0; imod<NMODX; imod++) {
     //selMod(imod);   
     for (ichip=0; ichip<10; ichip++) { 
       selChip(ichip,imod);
@@ -1796,7 +1718,7 @@ int calibration_sensor(int num, int *v, int *dacs) {
     }
   }
  
-  for (imod=0; imod<nModX; imod++) {
+  for (imod=0; imod<NMODX; imod++) {
     //selMod(imod);
     initMCBregisters(1,imod);
     for (ich=0; ich<NCHAN; ich++){
@@ -1816,7 +1738,7 @@ int calibration_sensor(int num, int *v, int *dacs) {
       selChannel(ich,imod); // select channel
     } 
     readOutChan(val); // readout channel
-    for (imod=0; imod<nModX; imod++) {
+    for (imod=0; imod<NMODX; imod++) {
       for (ichip=0; ichip<NCHIP; ichip++) {
 	*(v+(ichip+imod*NCHIP)*NCHAN+ich)=val[ichip+imod*NCHIP];
 	selChip(ichip,imod); // select channel 
@@ -1835,7 +1757,7 @@ int calibration_chip(int num, int *v, int *dacs) {
 
  
   printf("calibrating chip...");
-  for (imod=0; imod<nModX; imod++) {
+  for (imod=0; imod<NMODX; imod++) {
     //selMod(imod);
     initMCBregisters(0,imod);
     for (ichip=0; ichip<10; ichip++) { 
@@ -1848,7 +1770,7 @@ int calibration_chip(int num, int *v, int *dacs) {
     }
   }
   for (ich=0; ich<NCHAN; ich++){
-    for (imod=0; imod<nModX; imod++) {
+    for (imod=0; imod<NMODX; imod++) {
       //selMod(imod);
       for (ichip=0; ichip<NCHIP; ichip++) {
 	selChip(ichip,imod); // select channel 
@@ -1866,7 +1788,7 @@ int calibration_chip(int num, int *v, int *dacs) {
     usleep(20);  
     selChannel(ich,ALLMOD); // select channel 
     readOutChan(val); // readout channel
-    for (imod=0; imod<nModX; imod++) {
+    for (imod=0; imod<NMODX; imod++) {
       //selMod(imod);
       for (ichip=0; ichip<10; ichip++) {
 	*(v+(ichip+imod*NCHIP)*NCHAN+ich)=val[ichip+imod*NCHIP];
diff --git a/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.h b/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.h
index 429e13daf..b4eca93c5 100755
--- a/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.h
+++ b/slsDetectorSoftware/jungfrauDetectorServer/mcb_funcs.h
@@ -5,169 +5,12 @@
 
 #include "sls_detector_defs.h"
 
-#define RGPRVALS {100,50,200}
-#define RGSH1VALS {300,200,400}
-#define RGSH2VALS {260,300,260}
-
-
-#define DEFAULTGAIN {11.66,9.32,14.99}
-#define DEFAULTOFFSET {817.5,828.6,804.2}
-
-// DAC definitions
-enum dacsVal{VDAC0, VDAC1, VDAC2, VDAC3, VDAC4, VDAC5, VDAC6, VDAC7, HIGH_VOLTAGE, CONFGAIN};
-
-/* DAC adresses */
-#define DACCS   {0,0,1,1,2,2,3,3,4,4,5,5,6,6}
-#define DACADDR {0,1,0,1,0,1,0,1,0,1,0,1,0,1}
-
-//Register Definitions for temp,hv,dac gain
-enum adcVals{TEMP_FPGA, TEMP_ADC};
-
-//dynamic range
-/*
-#define MAX5523 commented out by dhanya
-#ifndef MAX5523
-#define MAX5533
-#endif
-#ifdef MAX5533
-#define DAC_DR 4096
-#endif
-#ifdef MAX5523
-*/
-#define DAC_DR 1024
-//#endif
-
-
-//reference voltage
-#define DAC_REFOUT1
-#ifdef DAC_REFOUT2 
-#define DAC_MAX 2.425
-#define DAC_REFOUT 2 
-#define DAC_REFOUT1
-#endif
-#ifdef DAC_REFOUT3 
-#define DAC_MAX 3.885
-#define DAC_REFOUT 3
-#define DAC_REFOUT1
-#endif
-#ifdef DAC_REFOUT0
-#define DAC_MAX 1.214
-#define DAC_REFOUT 0
-#endif
-#ifdef DAC_REFOUT1
-#define DAC_MAX 1.940
-#define DAC_REFOUT 1
-#endif
-
-/* dac calibration constants */
-
-#define VA 1.11
-
-#define CVTRIM  52.430851
-#define BVTRIM  -0.102022
-#define AVTRIM  0.000050
-
-#define PARTREF {100,1.55,-2.5,-2.5,0,-2.5}
-#define PARTR1 {78,10,10,10,10,10}
-#define PARTR2 {0,4.7,27,47,22,47}
-
-
-//chip shiftin register meaning
-#define OUTMUX_OFFSET 20
-#define PROBES_OFFSET 4
-#define OUTBUF_OFFSET 0
-
-
-void showbits(int h);
-
 int initDetector();
-int copyChannel(sls_detector_channel *destChan, sls_detector_channel *srcChan);
-int copyChip(sls_detector_chip *destChip, sls_detector_chip *srcChip);
 int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod);
-
-/* Register commands */
-/* int clearDACSregister(int imod ); */
-/* int nextDAC(int imod ); */
-int clearCSregister(int imod );
-int setCSregister(int imod );
-int nextChip(int imod );
-int firstChip(int imod );
-int clearSSregister(int imod );
-int setSSregister(int imod );
-int nextStrip(int imod );
-int selChannel(int strip,int imod );
-int selChip(int chip,int imod );
-int selMod(int mod,int imod );
-
-/* DACs routines */
-/* int program_one_dac(int addr, int value,int imod ); */
-/* int set_one_dac(int imod); */
-/* int initDAC(int dac_addr, int value,int imod ); */
-/* int initDACs(int* v,int imod ); */
-/* int initDACbyIndex(int ind,int val, int imod); */
-/* int initDACbyIndexDACU(int ind,int val, int imod); */
-/* int getDACbyIndexDACU(int ind,  int imod); */
-/* int getThresholdEnergy(); */
-/* int setThresholdEnergy(int ethr); */
-
-
 int setSettings(int i,int imod);
-
-
-/* Other DAC index routines*/
-int getTemperatureByModule(int tempSensor, int imod);
-int initHighVoltageByModule(int val, int imod);
-int initConfGainByModule(int isettings,int val,int imod);
-
-/* Initialization*/
-int initChannel(int ft,int cae, int ae, int coe, int ocoe, int counts,int imod );
-int initChannelbyNumber(sls_detector_channel myChan);
-int getChannelbyNumber(sls_detector_channel*);
-
-int getTrimbit(int imod, int ichip, int ichan);
-
-int initChip(int obe, int ow,int imod );
-
-int initChipWithProbes(int obe, int ow,int nprobes, int imod);
-//int getNProbes();
-
-int initChipbyNumber(sls_detector_chip myChip);
-int getChipbyNumber(sls_detector_chip*);
-int initMCBregisters(int cm,int imod );
 int initModulebyNumber(sls_detector_module);
 int getModulebyNumber(sls_detector_module*);
-
-/* To chips */
-int clearCounter(int imod );
-int clearOutReg(int imod);
-int setOutReg(int imod );
-int extPulse(int ncal,int imod );
-int calPulse(int ncal,int imod );
-int counterClear(int imod );
-int countEnable(int imod );
-int counterSet(int imod );
-
-
-/* moved from firmware_funcs */
-
-int readOutChan(int *val);
-
 int getModuleNumber(int modnum);
-int testShiftIn(int imod);
-int testShiftOut(int imod);
-int testShiftStSel(int imod);
-int testDataInOut(int num, int imod);
-int testExtPulse(int imod);
-int testExtPulseMux(int imod, int ow);
-int testDataInOutMux(int imod, int ow, int num);
-int testOutMux(int imod);
-int testFpgaMux(int imod);
-int calibration_sensor(int num, int *values, int *dacs) ;
-int calibration_chip(int num, int *values, int *dacs);
-
-
-
-//ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret);
 
 #endif
 
diff --git a/slsDetectorSoftware/jungfrauDetectorServer/registers_m.h b/slsDetectorSoftware/jungfrauDetectorServer/registers_m.h
index 605155474..1aeb921a8 100755
--- a/slsDetectorSoftware/jungfrauDetectorServer/registers_m.h
+++ b/slsDetectorSoftware/jungfrauDetectorServer/registers_m.h
@@ -169,13 +169,13 @@
 /* Detector/ Transmitter IP Address Register */
 #define TX_IP_REG						(0x4B << 11)
 
-/** Detector/ Transmitter IP Checksum Register */
+/* Detector/ Transmitter IP Checksum Register */
 #define TX_IP_CHECKSUM_REG				(0x4C << 11)
 
 #define TX_IP_CHECKSUM_OFST				(0)
 #define TX_IP_CHECKSUM_MSK				(0x000000FF << TX_IP_CHECKSUM_OFST)
 
-/** Configuration Register */
+/* Configuration Register */
 #define CONFIG_REG            			(0x4D << 11)								//Not used in software Carlos
 
 #define CONFIG_OPERATION_MODE_OFST		(16)										//Not used in software
@@ -185,81 +185,125 @@
 #define CONFIG_QUARTER_SPEED_10MHZ_VAL	(0x0 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK //Not used in software
 #define CONFIG_HALF_SPEED_20MHZ_VAL		(0x1 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK //Not used in software
 #define CONFIG_FULL_SPEED_VAL			(0x2 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK //Not used in software and firmware
+#define CONFIG_TDMA_OFST				(24)										//Not used in software
+#define CONFIG_TDMA_MSK					(0x00000001 << CONFIG_TDMA_OFST)			//Not used in software
+#define CONFIG_TDMA_TIMESLOT_OFST		(25)										//Not used in software
+#define CONFIG_TDMA_TIMESLOT_MSK		(0x0000001F << CONFIG_TDMA_TIMESLOT_OFST)	//Not used in software
 
+/* External Signal Register */
+#define EXT_SIGNAL_REG        			(0x4E << 11)
 
+#define EXT_SIGNAL_OFST					(0)
+#define EXT_SIGNAL_MSK					(0x00000003 << EXT_SIGNAL_OFST)				//enabled when both bits high
 
+/* Control Register */
+#define CONTROL_REG           			(0x4F << 11)
 
-//Constants
-#define HALFSPEED_DBIT_PIPELINE 0x7f7c
-#define QUARTERSPEED_DBIT_PIPELINE 0x8981
-#define HALFSPEED_CONF 0x0
-#define QUARTERSPEED_CONF 0xf
-#define HALFSPEED_ADC_PHASE 65
-#define QUARTERSPEED_ADC_PHASE 25
+#define CONTROL_START_ACQ_OFST       	(0)
+#define CONTROL_START_ACQ_MSK			(0x00000001 << CONTROL_START_ACQ_OFST)
+#define CONTROL_STOP_ACQ_OFST			(1)
+#define CONTROL_STOP_ACQ_MSK			(0x00000001 << CONTROL_STOP_ACQ_OFST)
+#define CONTROL_CORE_RST_OFST			(10)
+#define CONTROL_CORE_RST_MSK			(0x00000001 << CONTROL_CORE_RST_OFST)
+#define CONTROL_PERIPHERAL_RST_OFST		(11)										//DDR3 HMem Ctrlr, GBE, Temp
+#define CONTROL_PERIPHERAL_RST_MSK		(0x00000001 << CONTROL_PERIPHERAL_RST_OFST)	//DDR3 HMem Ctrlr, GBE, Temp
+#define CONTROL_DDR3_MEM_RST_OFST		(12)										//only PHY, not DDR3 PLL ,Not used in software
+#define CONTROL_DDR3_MEM_RST_MSK		(0x00000001 << CONTROL_DDR3_MEM_RST_OFST)	//only PHY, not DDR3 PLL ,Not used in software
+#define CONTROL_ACQ_FIFO_CLR_OFST		(14)
+#define CONTROL_ACQ_FIFO_CLR_MSK		(0x00000001 << CONTROL_ACQ_FIFO_CLR_OFST)
 
-/* values defined for FPGA */
-#define MCSNUM            0x0
+/* Reconfiguratble PLL Paramater Register */
+#define PLL_PARAM_REG					(0x50 << 11)
 
+/* Reconfiguratble PLL Control Regiser */
+#define PLL_CONTROL_REG					(0x51 << 11)
 
+#define PLL_CTRL_RECONFIG_RST_OFST		(0)											//parameter reset
+#define PLL_CTRL_RECONFIG_RST_MSK		(0x00000001 << PLL_CTRL_RECONFIG_RST_OFST)	//parameter reset
+#define PLL_CTRL_WR_PARAMETER_OFST		(2)
+#define PLL_CTRL_WR_PARAMETER_MSK		(0x00000001 << PLL_CTRL_WR_PARAMETER_OFST)
+#define PLL_CTRL_RST_OFST				(3)
+#define PLL_CTRL_RST_MSK				(0x00000001 << PLL_CTRL_RST_OFST)
+#define PLL_CTRL_ADDR_OFST				(16)
+#define PLL_CTRL_ADDR_MSK				(0x0000003F << PLL_CTRL_ADDR_OFST)
 
-#define FPGA_INIT_PAT     0x60008
-#define FPGA_INIT_ADDR    0xb0000000
+/* Sample Register (Obsolete) */
+#define SAMPLE_REG 						(0x59 << 11)/** is it dbit pipeline?... look at speedvariable */
 
-//#ifdef JUNGFRAU_DHANYA
-#define POWER_ON_REG 				0x5e<<11
-#define DBIT_PIPELINE_REG 			0x59<<11 //same PATTERN_N_LOOP2_REG
-#define MEM_MACHINE_FIFOS_REG 		0x4f<<11 //same as CONTROL_REG
-#define CONFGAIN_REG 				0x5d<<11 //same as DAQ_REG
+#define SAMPLE_ADC_SAMPLE_SEL_OFST		(0)												/** carlos cant use the bits*/
+#define SAMPLE_ADC_SAMPLE_SEL_MSK		(0x00000007 << SAMPLE_ADC_SAMPLE_SEL_OFST)
+#define SAMPLE_ADC_DECMT_FACTOR_OFST	(4)
+#define SAMPLE_ADC_DECMT_FACTOR_MSK		(0x00000007 << SAMPLE_ADC_DECMT_FACTOR_OFST)
+#define SAMPLE_DGTL_SAMPLE_SEL_OFST		(8)
+#define SAMPLE_DGTL_SAMPLE_SEL_MSK		(0x00000007 << SAMPLE_DGTL_SAMPLE_SEL_OFST)
+#define SAMPLE_DGTL_DECMT_FACTOR_OFST	(12)
+#define SAMPLE_DGTL_DECMT_FACTOR_MSK	(0x00000007 << SAMPLE_DGTL_DECMT_FACTOR_OFST)
 
-//#endif
+/* Digital Bit Alignment Register (Obsolete) */
+#define BIT_ALIGN_REG 					(0x59 << 11)/** carlos same reg value */
 
-//#define ADC_OFFSET_REG      		66<<11 //same as CONFGAIN_REG
+#define BIT_ALIGN_LSB_SAMPLE_SEL_OFST	(0)
+#define BIT_ALIGN_LSB_SAMPLE_SEL_MSK	(0x00000007 << BIT_ALIGN_LSB_SAMPLE_SEL_OFST)
+#define BIT_ALIGN_LSB_LATENCY_OFST		(3)
+#define BIT_ALIGN_LSB_LATENCY_MSK		(0x0000001F << BIT_ALIGN_LSB_LATENCY_OFST)
+#define BIT_ALIGN_MSB_SAMPLE_SEL_OFST	(8)
+#define BIT_ALIGN_MSB_SAMPLE_SEL_MSK	(0x00000007 << BIT_ALIGN_MSB_SAMPLE_SEL_OFST)
+#define BIT_ALIGN_MSB_LATENCY_OFST		(11)
+#define BIT_ALIGN_MSB_LATENCY_MSK		(0x0000001F << BIT_ALIGN_MSB_LATENCY_OFST)
 
-//ADC
+/** Vref Comp Mod Register */
+#define VREF_COMP_MOD_REG				(0x5C << 11)								//Not used in software, TBD in firmware
 
-//#define ADC_SYNC_REG          66<<11//0x19<<11
-//#define HV_REG                67<<11//0x20<<11
+/** DAQ Register */
+#define DAQ_REG							(0x5D << 11)								//TBD in firmware
 
+/** carlos ?? */
+/* settings/conf gain register */
+#define GAIN_MASK                    	0x0000ffff
+#define GAIN_OFFSET                  	0
+#define SPEED_GAIN_MASK     			0xf0000000
+#define SPEED_GAIN_OFFSET   			28
+/***************/
 
+/** Chip Power Register */
+#define CHIP_POWER_REG					(0x5E << 11)
 
+#define CHIP_POWER_ENABLE_OFST			(0)
+#define CHIP_POWER_ENABLE_MSK			(0x00000001 << CHIP_POWER_ENABLE_OFST)
 
-//#define MUTIME_REG            0x1a<<11
-//temperature
-#define TEMP_IN_REG           0x1b<<11
-#define TEMP_OUT_REG          0x1c<<11
-//configure MAC
-#define TSE_CONF_REG          0x1d<<11
-#define ENET_CONF_REG         0x1e<<11
-//#define WRTSE_SHAD_REG        0x1f<<11
-//HV
+/* Set Delay 64 bit register */
+#define SET_DELAY_LSB_REG     			(0x60 << 11)
+#define SET_DELAY_MSB_REG     			(0x61 << 11)
 
+/* Set Cycles 64 bit register */
+#define SET_CYCLES_LSB_REG    			(0x62 << 11)
+#define SET_CYCLES_MSB_REG    			(0x63 << 11)
 
+/* Set Frames 64 bit register */
+#define SET_FRAMES_LSB_REG   			(0x64 << 11)
+#define SET_FRAMES_MSB_REG    			(0x65 << 11)
 
+/* Set Period 64 bit register */
+#define SET_PERIOD_LSB_REG    			(0x66 << 11)
+#define SET_PERIOD_MSB_REG    			(0x67 << 11)
 
+/* Set Period 64 bit register */
+#define SET_EXPTIME_LSB_REG    			(0x68 << 11)
+#define SET_EXPTIME_MSB_REG    			(0x69 << 11)
 
-#define CONTROL_REG           79<<11//0x24<<11
+/* Module Coordinates Register 0 */
+#define COORD_0							(0x7C << 11)
 
+#define COORD_0_Y_OFST					(0)
+#define COORD_0_Y_MSK					(0x0000FFFF << COORD_0_Y_OFST)
+#define COORD_0_X_OFST					(16)
+#define COORD_0_X_MSK					(0x0000FFFF << COORD_0_X_OFST)
 
-#define EXT_SIGNAL_REG        78<<11//	  0x4E<<11
-#define FPGA_SVN_REG    	  0x29<<11
+/* Module Coordinates Register 1 */
+#define COORD_1							(0x7D << 11)
 
-
-#define CHIP_OF_INTRST_REG    0x2A<<11
-
-//FIFO
-
-
-
-#define FIFO_DATA_REG 6<<11
-#define FIFO_STATUS_REG  7<<11
-
-
-#define FIFO_DATA_REG_OFF     0x50<<11 ///////
-
-//user entered
-
-
-#define NSAMPLES_REG 95<<11
+#define COORD_0_Z_OFST					(0)
+#define COORD_0_Z_MSK					(0x0000FFFF << COORD_0_Z_OFST)
 
 
 
@@ -269,203 +313,14 @@
 
 
 
-#define SET_DELAY_LSB_REG     96<<11 //0x68<<11
-#define SET_DELAY_MSB_REG     97<<11 //0x69<<11
-
-
-#define SET_CYCLES_LSB_REG    98<<11//0x6c<<11
-#define SET_CYCLES_MSB_REG    99<<11//0x6d<<11
-
-
-#define SET_FRAMES_LSB_REG    100<<11//0x70<<11
-#define SET_FRAMES_MSB_REG    101<<11//0x71<<11
-
-
-#define SET_PERIOD_LSB_REG    102<<11//0x74<<11
-#define SET_PERIOD_MSB_REG    103<<11//0x75<<11
-
-
-#define SET_EXPTIME_LSB_REG   104<<11//0x78<<11
-#define SET_EXPTIME_MSB_REG   105<<11//0x79<<11
 
+/**carlos */
 #define SET_GATES_LSB_REG     106<<11//0x7c<<11
 #define SET_GATES_MSB_REG     107<<11//0x7d<<11
 
+#define PLL_RECONFIG_BUSY     	 0x00100000
 
-#define DATA_IN_LSB_REG 30<<11
-#define DATA_IN_MSB_REG 31<<11
-
-#define PATTERN_OUT_LSB_REG 32<<11
-#define PATTERN_OUT_MSB_REG 33<<11
-
-
- 
-   
-
-#define PLL_PARAM_REG  80<<11//0x37<<11
-#define PLL_PARAM_OUT_REG 5<<11 //0x38<<11
-#define PLL_CNTRL_REG 81<<11//0x34<<11
-
-
-
-
-
-
-
-
-#define PATTERN_CNTRL_REG 82<<11
-#define PATTERN_LIMITS_AREG 83<<11
-
-#define PATTERN_LOOP0_AREG 84<<11
-#define PATTERN_N_LOOP0_REG 85<<11
-
-#define PATTERN_LOOP1_AREG 86<<11
-#define PATTERN_N_LOOP1_REG 87<<11
-
-#define PATTERN_LOOP2_AREG 88<<11
-#define PATTERN_N_LOOP2_REG 89<<11
-
-#define PATTERN_WAIT0_AREG 90<<11
-#define PATTERN_WAIT1_AREG 91<<11
-#define PATTERN_WAIT2_AREG 92<<11
-
-
-
-//#define DAQ_REG   0x5d<<11 //same as CONFGAIN_REG
-#define ADC_LATCH_DISABLE_REG   94<<11
-
-#define HV_REG 95<<11
-   
-#define PATTERN_IOCTRL_REG_LSB 108<<11
-#define PATTERN_IOCTRL_REG_MSB 109<<11
-
-#define PATTERN_IOCLKCTRL_REG_LSB 110<<11
-#define PATTERN_IOCLKCTRL_REG_MSB 111<<11
-#define PATTERN_IN_REG_LSB 112<<11
-#define PATTERN_IN_REG_MSB 113<<11
-#define PATTERN_WAIT0_TIME_REG_LSB 114<<11
-#define PATTERN_WAIT0_TIME_REG_MSB 115<<11
-#define PATTERN_WAIT1_TIME_REG_LSB 116<<11
-#define PATTERN_WAIT1_TIME_REG_MSB 117<<11
-#define PATTERN_WAIT2_TIME_REG_LSB 118<<11
-#define PATTERN_WAIT2_TIME_REG_MSB 119<<11
-   
-#define DAC_REG_OFF 120 
-#define DAC_0_1_VAL_REG 120<<11 
-#define DAC_2_3_VAL_REG 121<<11  
-#define DAC_4_5_VAL_REG 122<<11  
-#define DAC_6_7_VAL_REG 123<<11  
-#define DAC_8_9_VAL_REG 124<<11  
-#define DAC_10_11_VAL_REG 125<<11  
-#define DAC_12_13_VAL_REG 126<<11  
-#define DAC_14_15_VAL_REG 127<<11  
-   
- 
- 
-
-
-
-
-
-
-/* registers defined in FPGA */
-#define GAIN_REG              0
-//#define FLOW_CONTROL_REG      0x11<<11
-//#define FLOW_STATUS_REG       0x12<<11
-//#define FRAME_REG             0x13<<11
-#define MULTI_PURPOSE_REG     0
-//#define TIME_FROM_START_REG   0x16<<11
-
-
-#define ROI_REG 0 // 0x35<<11
-#define OVERSAMPLING_REG 0 // 0x36<<11
-#define MOENCH_CNTR_REG 0 // 0x31<<11
-#define MOENCH_CNTR_OUT_REG 0 // 0x33<<11
-#define MOENCH_CNTR_CONF_REG 0 // 0x32<<11
-
-
-
-//image
-#define DARK_IMAGE_REG     0 // 0x81<<11
-#define GAIN_IMAGE_REG     0 // 0x82<<11
-
-//counter block memory
-#define COUNTER_MEMORY_REG 0 // 0x85<<11
-
-
-//not used
-//#define MCB_DOUT_REG_OFF      0 // 0x200000
-//#define FIFO_CNTRL_REG_OFF    0 // 0x300000
-//#define FIFO_COUNTR_REG_OFF   0 // 0x400000
-//not used so far
-//#define SPEED_REG        0 // 0x006000
-//#define SET_NBITS_REG    0 // 0x008000
-//not used
-//#define GET_SHIFT_IN_REG      0 // 0x022000
-
-
-
-#define SHIFTMOD 2
-#define SHIFTFIFO 9
-
-
-
-
-
-
-/* for control register (16bit only)*/
-#define START_ACQ_BIT       0x0001
-#define STOP_ACQ_BIT        0x0002
-#define START_FIFOTEST_BIT  0x0004 // ?????
-#define STOP_FIFOTEST_BIT   0x0008  // ??????
-#define START_READOUT_BIT   0x0010  
-#define STOP_READOUT_BIT    0x0020 
-#define START_EXPOSURE_BIT  0x0040  
-#define STOP_EXPOSURE_BIT   0x0080  
-#define START_TRAIN_BIT     0x0100  
-#define STOP_TRAIN_BIT      0x0200   
-#define FIFO_RESET_BIT      0x8000  
-#define SYNC_RESET          0x0400  
-#define GB10_RESET_BIT      0x0800   
-#define MEM_RESET_BIT       0x1000   
-
-
-
-
-
-/* for fifo status register */
-#define FIFO_ENABLED_BIT         0x80000000
-#define FIFO_DISABLED_BIT        0x01000000
-#define FIFO_ERROR_BIT           0x08000000
-#define FIFO_EMPTY_BIT           0x04000000
-#define FIFO_DATA_READY_BIT      0x02000000
-#define FIFO_COUNTER_MASK        0x000001ff
-#define FIFO_NM_MASK             0x00e00000
-#define FIFO_NM_OFF              21
-#define FIFO_NC_MASK             0x001ffe00
-#define FIFO_NC_OFF              9
-
-/* for config register *///not really used yet
-#define TOT_ENABLE_BIT           0x00000002
-#define TIMED_GATE_BIT           0x00000004
-#define CONT_RO_ENABLE_BIT       0x00080000
-#define GB10_NOT_CPU_BIT		 0x00001000
-
-
-
-/* for speed register */
-#define CLK_DIVIDER_MASK              0x000000ff 
-#define CLK_DIVIDER_OFFSET            0 
-#define SET_LENGTH_MASK               0x00000f00 
-#define SET_LENGTH_OFFSET             8 
-#define WAIT_STATES_MASK              0x0000f000
-#define WAIT_STATES_OFFSET            12  
-#define TOTCLK_DIVIDER_MASK           0xff000000 
-#define TOTCLK_DIVIDER_OFFSET         24  
-#define TOTCLK_DUTYCYCLE_MASK         0x00ff0000 
-#define TOTCLK_DUTYCYCLE_OFFSET       16
-
-/* for external signal register */
+/* for external signal register */ /** Carlos is this implemented?*/
 #define SIGNAL_OFFSET                 4
 #define SIGNAL_MASK                   0xF
 #define EXT_SIG_OFF                   0x0
@@ -473,77 +328,10 @@
 #define EXT_GATE_IN_ACTIVELOW         0x2
 #define EXT_TRIG_IN_RISING            0x3
 #define EXT_TRIG_IN_FALLING           0x4
-#define EXT_RO_TRIG_IN_RISING         0x5
-#define EXT_RO_TRIG_IN_FALLING        0x6
-#define EXT_GATE_OUT_ACTIVEHIGH        0x7
-#define EXT_GATE_OUT_ACTIVELOW         0x8
-#define EXT_TRIG_OUT_RISING            0x9
-#define EXT_TRIG_OUT_FALLING           0xA
-#define EXT_RO_TRIG_OUT_RISING         0xB
-#define EXT_RO_TRIG_OUT_FALLING        0xC
+//...
 
 
 
-/* for temperature register */
-#define T1_CLK_BIT             0x00000001
-#define T1_CS_BIT              0x00000002
-#define T2_CLK_BIT             0x00000004
-#define T2_CS_BIT              0x00000008
-
-
-
-/* fifo control register */
-//#define FIFO_RESET_BIT              0x00000001 
-//#define FIFO_DISABLE_TOGGLE_BIT     0x00000002 
-
-
-//chip shiftin register meaning
-#define OUTMUX_OFF 20
-#define OUTMUX_MASK   0x1f
-#define PROBES_OFF 4
-#define PROBES_MASK 0x7f
-#define OUTBUF_OFF 0
-#define OUTBUF_MASK 1
-
-
-/* multi purpose register */
-#define PHASE_STEP_BIT               0x00000001
-#define PHASE_STEP_OFFSET            0
-// #define xxx_BIT                   0x00000002
-#define RESET_COUNTER_BIT            0x00000004
-#define RESET_COUNTER_OFFSET         2
-//#define xxx_BIT                    0x00000008
-//#define xxx_BIT                    0x00000010
-#define SW1_BIT                      0x00000020
-#define SW1_OFFSET                   5
-#define WRITE_BACK_BIT               0x00000040
-#define WRITE_BACK_OFFSET            6
-#define RESET_BIT                    0x00000080
-#define RESET_OFFSET                 7
-#define ENET_RESETN_BIT              0x00000800
-#define ENET_RESETN_OFFSET           11
-#define INT_RSTN_BIT                 0x00002000
-#define INT_RSTN_OFFSET              13
-#define DIGITAL_TEST_BIT             0x00004000
-#define DIGITAL_TEST_OFFSET          14
-//#define CHANGE_AT_POWER_ON_BIT       0x00008000
-//#define CHANGE_AT_POWER_ON_OFFSET    15
-
-
-/* settings/conf gain register */
-#define GAIN_MASK                    0x0000ffff
-#define GAIN_OFFSET                  0  
-#define SPEED_GAIN_MASK     		0xf0000000
-#define SPEED_GAIN_OFFSET   		28
-
-
-
-/* CHIP_OF_INTRST_REG */
-#define CHANNEL_MASK 			    0xffff0000
-#define CHANNEL_OFFSET				16
-#define ACTIVE_ADC_MASK 		    0x0000001f
-
-
 
 /**ADC SYNC CLEAN FIFO*/
 #define ADCSYNC_CLEAN_FIFO_BITS     0x300000
@@ -551,97 +339,5 @@
 
 
 
-
-
-
-#define PLL_CNTR_ADDR_OFF 16 //PLL_CNTR_REG bits 21 downto 16 represent the counter address
-
-#define PLL_CNTR_RECONFIG_RESET_BIT 0
-#define PLL_CNTR_READ_BIT 1
-#define PLL_CNTR_WRITE_BIT 2
-#define PLL_CNTR_PLL_RESET_BIT 3
-
-
-#define PLL_CNTR_PHASE_EN_BIT 8
-#define PLL_CNTR_UPDN_BIT 9
-#define PLL_CNTR_CNTSEL_OFF 10
-		
-
-
-
-
-#define PLL_MODE_REG 0x0
-#define PLL_STATUS_REG 0x1
-#define PLL_START_REG 0x2
-#define PLL_N_COUNTER_REG 0x3
-#define PLL_M_COUNTER_REG 0x4
-#define PLL_C_COUNTER_REG 0x5 //which ccounter stands in param 22:18; 7:0 lowcount 15:8 highcount; 16 bypassenable; 17 oddivision
-#define PLL_PHASE_SHIFT_REG 0x6 // which ccounter stands in param 16:20; 21 updown (1 up, 0 down)
-#define PLL_K_COUNTER_REG 0x7
-#define PLL_BANDWIDTH_REG 0x8
-#define PLL_CHARGEPUMP_REG 0x9
-#define PLL_VCO_DIV_REG 0x1c
-#define PLL_MIF_REG 0x1f
-
-#define PPL_M_CNT_PARAM_DEFAULT 0x4040
-#define PPL_N_CNT_PARAM_DEFAULT 0x20D0C
-#define PPL_C0_CNT_PARAM_DEFAULT 0x20D0C
-#define PPL_C1_CNT_PARAM_DEFAULT 0xA0A0
-#define PPL_C2_CNT_PARAM_DEFAULT 0x20D0C
-#define PPL_C3_CNT_PARAM_DEFAULT 0x0808
-#define PPL_BW_PARAM_DEFAULT 0x2EE0
-#define PPL_VCO_PARAM_DEFAULT 0x1
-
-#define NEW_PLL_RECONFIG
-
-#ifdef NEW_PLL_RECONFIG
-#define PLL_VCO_FREQ_MHZ 400//480//800
-#else
-#define PLL_VCO_FREQ_MHZ 480//800
-#endif
-
-
-
-
-
-/*
-  GBE parameter and control registers definitions
-*/
-
-#define GBE_CTRL_WSTROBE 0 
-#define GBE_CTRL_VAR_OFFSET 16
-#define GBE_CTRL_VAR_MASK 0XF
-#define GBE_CTRL_RAMADDR_OFFSET 24
-#define GBE_CTRL_RAMADDR_MASK 0X3F
-#define GBE_CTRL_INTERFACE 23
-
-#define RX_UDP_IP_ADDR 0
-#define RX_UDP_PORTS_ADDR 1
-#define RX_UDP_MAC_L_ADDR 2
-#define RX_UDP_MAC_H_ADDR 3
-#define IPCHECKSUM_ADDR 4
-#define GBE_DELAY_ADDR 5
-#define GBE_RESERVED1_ADDR 6
-#define GBE_RESERVED2_ADDR 7
-#define DETECTOR_MAC_L_ADDR 8
-#define DETECTOR_MAC_H_ADDR 9
-#define DETECTOR_IP_ADDR 10
-   
-
-
-/**------------------
--- pattern registers definitions
---------------------------------------------- */
-#define  IOSIGNALS_MASK 0xfffffffffffff
-#define ADC_ENABLE_BIT 63
-#define  APATTERN_MASK 0xffff
-#define ASTART_OFFSET 0
-#define ASTOP_OFFSET 16
-#define PATTERN_CTRL_WRITE_BIT 0
-#define PATTERN_CTRL_READ_BIT 1
-#define PATTERN_CTRL_ADDR_OFFSET 16
-#define MAX_PATTERN_LENGTH 1024
-
-
 #endif
 
diff --git a/slsDetectorSoftware/jungfrauDetectorServer/server_defs.h b/slsDetectorSoftware/jungfrauDetectorServer/server_defs.h
index 960972f4f..8f18bdeb1 100755
--- a/slsDetectorSoftware/jungfrauDetectorServer/server_defs.h
+++ b/slsDetectorSoftware/jungfrauDetectorServer/server_defs.h
@@ -3,28 +3,31 @@
 #include "sls_detector_defs.h"
 #include <stdint.h> 
 
+#define GOODBYE 					(-200)
+
 /* Hardware Definitions */
-#define NMAXMODY 					1
-#define NMAXMODX  					1
-#define NMAXMOD 					(NMAXMODX*NMAXMODY)
-#define NCHAN 						(256*256)
-#define NCHIP 						8
-#define NADC						0
-#define NDAC 						8
-#define NCHANS 						(NCHAN*NCHIP*NMAXMOD)
-#define NDACS 						(NDAC*NMAXMOD)
+#define NMAXMODY 					(1)
+#define NMAXMODX  					(1)
+#define NMAXMOD 					(NMAXMODX * NMAXMODY)
+#define NMODY 						(1)
+#define NMODX  						(1)
+#define NMOD 						(NMODX * NMODY)
+#define NCHAN 						(256 * 256)
+#define NCHIP 						(8)
+#define NADC						(0)
+#define NDAC 						(8)
+#define NCHANS 						(NCHAN * NCHIP * NMAXMOD)
+#define NDACS 						(NDAC * NMAXMOD)
+#define DYNAMIC_RANGE				(16)
+#define DATA_BYTES					(NMAXMOD * NCHIP * NCHAN * 2)
+#define IP_PACKETSIZE				(0x0522) /**carlos?? calcChecksum*/
+#define UDP_PACKETSIZE				(0x050E) /**carlos?? calcChecksum*/
+#define CLK_EXPTIME					(40)	/** 0x28 better name? */
+#define CLK_FC						(20)	/** 0x14 better name? */
 
-#define DEFAULT_PHASE_SHIFT			0 //	120
-#define DEFAULT_IP_PACKETSIZE		0x0522
-#define DEFAULT_UDP_PACKETSIZE		0x050E
-#define ADC1_IP_PACKETSIZE			256*2+14+20
-#define ADC1_UDP_PACKETSIZE			256*2+4+8+2
-#define CLK_FREQ 156.25E+6
-#define ADC_CLK_FREQ 32E+6
+#define CLK_FREQ 156.25E+6			/**carlos used in firmware_funcs.. but needed ?*/
 
-/** DEFAULT */
-enum DACNAMES              			{ VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBUF, VB_DS, VREF_DS, VREF_COMP };
-#define DEFAULT_DAC_VALS   			{ 1220,    3000,     1053,    1450,       750,       1000,  480,     420       };
+/** Default Acqusition Parameters */
 #define DEFAULT_NUM_FRAMES			(1*1000*1000)
 #define DEFAULT_NUM_CYCLES			(0)
 #define DEFAULT_EXPTIME				(10*1000)
@@ -32,6 +35,10 @@ enum DACNAMES              			{ VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBU
 #define DEFAULT_DELAY				(0)
 #define DEFAULT_NUM_GATES			(0)
 #define DEFAULT_HIGH_VOLTAGE		(0)
+
+/* Other Default Values */
+//enum DACNAMES            			{ VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBUF, VB_DS, VREF_DS, VREF_COMP };
+#define DEFAULT_DAC_VALS   			{ 1220,    3000,     1053,    1450,       750,       1000,  480,     420       };
 #define DEFAULT_SETTINGS			(DYNAMICGAIN)
 #define DEFAULT_TX_UDP_PORT			(0x7e9a)
 
@@ -41,14 +48,21 @@ enum DACNAMES              			{ VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBU
 #define ADC_OFST_HALF_SPEED_VAL		(0x20)
 #define ADC_OFST_QUARTER_SPEED_VAL	(0x10)
 
+#define SAMPLE_ADC_HALF_SPEED	 	(0x7f7c)
+#define SAMPLE_ADC_QUARTER_SPEED 	(0x8981)
+#define DAQ_HALF_SPEED 				(0x0)
+#define DAQ_QUARTER_SPEED 			(0xf)
+#define ADC_PHASE_HALF_SPEED 		(0x41)
+#define ADC_PHASE_QUARTER_SPEED 	(0x19)
+
 /* Maybe not required for jungfrau */
-#define NTRIMBITS 					6
-#define NCOUNTBITS 					24
-#define NCHIPS_PER_ADC				2
+#define NTRIMBITS 					(6)
+#define NCOUNTBITS 					(24)
+#define NCHIPS_PER_ADC				(2)
 #define TRIM_DR 					(((int)pow(2,NTRIMBITS))-1)
 #define COUNT_DR 					(((int)pow(2,NCOUNTBITS))-1)
-#define ALLMOD 						0xffff
-#define ALLFIFO 					0xffff
+#define ALLMOD 						(0xffff)
+#define ALLFIFO 					(0xffff)
 
 /* LTC2620 DAC DEFINES */
 #define LTC2620_DAC_CMD_OFST		(20)
@@ -140,8 +154,4 @@ enum DACNAMES              			{ VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBU
 #define AD9257_USER_IN_MODE_MSK		(0x00000003 << AD9257_USER_IN_MODE_OFST)
 
 
-
-
-
-
 #endif
diff --git a/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c b/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c
index 398a7611b..47f59f760 100755
--- a/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c
+++ b/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.c
@@ -9,20 +9,12 @@
 
 
 
-extern int nModX;
-extern int nModY;
-extern size_t dataBytes;
-extern int nSamples;
-extern int dynamicRange;
-extern int  storeInRAM;
 extern int lockStatus;
 extern char lastClientIP[INET_ADDRSTRLEN];
 extern char thisClientIP[INET_ADDRSTRLEN];
 extern int differentClients;
-extern unsigned int *ram_values;
 
-
-//defined in the detector specific file
+//defined in the detector specific make file
 #ifdef MYTHEND
 const enum detectorType myDetectorType=MYTHEN;
 #elif PROPIXD
@@ -43,19 +35,19 @@ const enum detectorType myDetectorType=GENERIC;
 
 
 
-
 // Global variables
 int (*flist[256])(int);
-char *dataretval=NULL;
-int nframes, iframes, dataret;
 char mess[MAX_STR_LENGTH];
 
-int digitalTestBit = 0;
-int adcvpp=0x4;
+int digitalTestBit = 0; /** Carlos will we use this somewhere */
+int adcvpp = 0x4;			/** Carlos will we use this somewhere */
 
 
-int init_detector(int b) {
-	if(b){
+
+
+
+int init_detector(int controlserver) {
+	if(controlserver){
 		defineGPIOpins();
 		resetFPGA();
 	}else
@@ -65,8 +57,7 @@ int init_detector(int b) {
 		printf("Could not map memory\n");
 		exit(1);
 	}
-
-	if (b)
+	if (controlserver)
 		initializeDetector();
 
 	//common for both control and stop server
@@ -162,7 +153,6 @@ int function_table() {
 	flist[F_START_RECEIVER]=&start_receiver;
 	flist[F_STOP_RECEIVER]=&stop_receiver;
 	flist[F_CALIBRATE_PEDESTAL]=&calibrate_pedestal;
-	flist[F_SET_CTB_PATTERN]=&set_ctb_pattern;
 	flist[F_WRITE_ADC_REG]=&write_adc_register;
 	flist[F_PROGRAM_FPGA]=&program_fpga;
 	flist[F_RESET_FPGA]=&reset_fpga;
@@ -244,6 +234,8 @@ int exec_command(int file_des) {
 
 
 
+
+
 int get_detector_type(int file_des) {
 	int n=0;
 	enum detectorType ret;
@@ -312,7 +304,7 @@ int set_number_of_modules(int file_des) {
 				retval=FAIL;
 			} else {
 				ret=setNMod(nm);
-				if (nModX==nm || nm==GET_FLAG) {
+				if (NMODX==nm || nm==GET_FLAG) {
 					retval=OK;
 					if (differentClients==1)
 						retval=FORCE_UPDATE;
@@ -611,7 +603,7 @@ int digital_test(int file_des) {
 			sprintf(mess,"Detector locked by %s\n",lastClientIP);
 			break;
 		}
-		if (imod >= nModX) {
+		if (imod >= NMODX) {
 			ret=FAIL;
 			sprintf(mess,"Module %d disabled\n",imod);
 			break;
@@ -742,14 +734,14 @@ int write_register(int file_des) {
 
 	if(ret!=FAIL){
 		address=(addr<<11);
-		if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG))
+		/*if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG)) ask Carlos
 			ret = bus_w16(address,val);
-		else
+		else*/
 			ret=bus_w(address,val);
 		if(ret==OK){
-			if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG))
+			/*if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG)) ask Carlos
 				retval=bus_r16(address);
-			else
+			else*/
 				retval=bus_r(address);
 		}
 	}
@@ -808,9 +800,9 @@ int read_register(int file_des) {
 
 	if(ret!=FAIL){
 		address=(addr<<11);
-		if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG))
+		/*if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG)) ask Carlos
 			retval=bus_r16(address);
-		else
+		else*/
 			retval=bus_r(address);
 	}
 
@@ -900,10 +892,6 @@ int set_dac(int file_des) {
 
 
 				retval=setDac(ind,val);
-				/* 			if(idac==HIGH_VOLTAGE) */
-				/* 				retval=initHighVoltageByModule(val,imod); */
-				/* 			else */
-				/* 				retval=initDACbyIndexDACU(idac,val,imod); */
 			}
 			else if (ind==ADC_VPP) {
 				printf("Setting ADC VPP to %d\n",val);
@@ -1010,7 +998,7 @@ int get_adc(int file_des) {
 	}
 
 	if (ret==OK)
-		retval=getTemperatureByModule(idac,imod);
+		retval=getTemperature(idac,imod);
 #endif
 
 #ifdef VERBOSE
@@ -1718,7 +1706,7 @@ int get_run_status(int file_des) {
 }
 
 int read_frame(int file_des) {
-	dataret=FAIL;
+	int dataret=FAIL;
 	if (differentClients==1 && lockStatus==1) {
 		dataret=FAIL;
 		sprintf(mess,"Detector locked by %s\n",lastClientIP);
@@ -1773,7 +1761,7 @@ int start_and_read_all(int file_des) {
 	printf("Starting and reading all frames\n");
 #endif 
 	if (differentClients==1 && lockStatus==1) {
-		dataret=FAIL;
+		int dataret=FAIL;
 		sprintf(mess,"Detector locked by %s\n",lastClientIP);
 		sendDataOnly(file_des,&dataret,sizeof(dataret));
 		sendDataOnly(file_des,mess,sizeof(mess));
@@ -2299,14 +2287,19 @@ int send_update(int file_des) {
 
 	int ret=OK;
 	enum detectorSettings t;
-	int n;//int thr, n;
-	//int it;
+	int n;
+	int val;
+	size_t s;
 	int64_t retval, tns=-1;
 	n = sendDataOnly(file_des,lastClientIP,sizeof(lastClientIP));
-	n = sendDataOnly(file_des,&nModX,sizeof(nModX));
-	n = sendDataOnly(file_des,&nModY,sizeof(nModY));
-	n = sendDataOnly(file_des,&dynamicRange,sizeof(dynamicRange));
-	n = sendDataOnly(file_des,&dataBytes,sizeof(dataBytes));
+	val = NMODX;
+	n = sendDataOnly(file_des,&val,sizeof(val));
+	val = NMODY;
+	n = sendDataOnly(file_des,&val,sizeof(val));
+	val = DYNAMIC_RANGE;
+	n = sendDataOnly(file_des,&val,sizeof(val));
+	s = DATA_BYTES;
+	n = sendDataOnly(file_des,&s,sizeof(s));
 	t=setSettings(GET_SETTINGS,-1);
 	n = sendDataOnly(file_des,&t,sizeof(t));
 	/*  thr=getThresholdEnergy();
@@ -2377,7 +2370,6 @@ int configure_mac(int file_des) {
 
 	//#ifdef VERBOSE
 	int i;
-	printf("\ndigital_test_bit in server %d\t",digitalTestBit);
 	printf("\nipadd %x\t",ipad);
 	printf("destination ip is %d.%d.%d.%d = 0x%x \n",(ipad>>24)&0xff,(ipad>>16)&0xff,(ipad>>8)&0xff,(ipad)&0xff,ipad);
 	printf("macad:%llx\n",imacadd);
@@ -2410,7 +2402,7 @@ int configure_mac(int file_des) {
 		}
 
 		if(ret==OK)
-			configureMAC(ipad,imacadd,idetectormacadd,detipad,digitalTestBit,udpport);
+			configureMAC(ipad,imacadd,idetectormacadd,detipad,udpport);
 	}
 #endif
 	if (ret==FAIL)
@@ -2450,7 +2442,7 @@ int load_image(int file_des) {
 		ret=FAIL;
 	}
 
-	n = receiveDataOnly(file_des,ImageVals,dataBytes);
+	n = receiveDataOnly(file_des,ImageVals,DATA_BYTES);
 	if (n < 0) {
 		sprintf(mess,"Error reading from socket\n");
 		ret=FAIL;
@@ -2639,7 +2631,7 @@ int read_counter_block(int file_des) {
 	n = sendDataOnly(file_des,&ret,sizeof(ret));
 	if (ret!=FAIL) {
 		/* send return argument */
-		n += sendDataOnly(file_des,CounterVals,dataBytes);//1280*2
+		n += sendDataOnly(file_des,CounterVals,DATA_BYTES);
 	} else {
 		n += sendDataOnly(file_des,mess,sizeof(mess));
 	}
@@ -2768,168 +2760,6 @@ int calibrate_pedestal(int file_des){
 }
 
 
-int set_ctb_pattern(int file_des){
-
-	int ret=OK;//FAIL;
-	int retval=-1;
-	int n;
-	int mode;
-	uint64_t word, retval64, t;
-	int addr;
-	int level, start, stop, nl;
-	uint64_t pat[1024];
-
-	sprintf(mess,"Could not set pattern\n");
-
-	n = receiveDataOnly(file_des,&mode,sizeof(mode));
-	printf("pattern mode is %d\n",mode);
-	switch (mode) {
-
-	case 0: //sets word
-		n = receiveDataOnly(file_des,&addr,sizeof(addr));
-		n = receiveDataOnly(file_des,&word,sizeof(word));
-		ret=OK;
-
-		switch (addr) {
-		case -1:
-			retval64=writePatternIOControl(word);
-			break;
-		case -2:
-			retval64=writePatternClkControl(word);
-			break;
-		default:
-			retval64=writePatternWord(addr,word);
-		};
-
-
-		//write word;
-		//@param addr address of the word, -1 is I/O control register,  -2 is clk control register
-		//@param word 64bit word to be written, -1 gets
-
-		n = sendDataOnly(file_des,&ret,sizeof(ret));
-		if (ret==FAIL)
-			n += sendDataOnly(file_des,mess,sizeof(mess));
-		else
-			n += sendDataOnly(file_des,&retval64,sizeof(retval64));
-		break;
-
-		case 1: //pattern loop
-			n = receiveDataOnly(file_des,&level,sizeof(level));
-			n = receiveDataOnly(file_des,&start,sizeof(start));
-			n = receiveDataOnly(file_des,&stop,sizeof(stop));
-			n = receiveDataOnly(file_des,&nl,sizeof(nl));
-
-
-
-			printf("level %d start %x stop %x nl %d\n",level, start, stop, nl);
-			/** Sets the pattern or loop limits in the CTB
-      @param level -1 complete pattern, 0,1,2, loop level
-      @param start start address if >=0
-      @param stop stop address if >=0
-      @param n number of loops (if level >=0)
-      @returns OK/FAIL
-			 */
-			ret=setPatternLoop(level, &start, &stop, &nl);
-
-			n = sendDataOnly(file_des,&ret,sizeof(ret));
-			if (ret==FAIL)
-				n += sendDataOnly(file_des,mess,sizeof(mess));
-			else {
-				n += sendDataOnly(file_des,&start,sizeof(start));
-				n += sendDataOnly(file_des,&stop,sizeof(stop));
-				n += sendDataOnly(file_des,&nl,sizeof(nl));
-			}
-			break;
-
-
-
-		case 2: //wait address
-			n = receiveDataOnly(file_des,&level,sizeof(level));
-			n = receiveDataOnly(file_des,&addr,sizeof(addr));
-
-
-
-			/** Sets the wait address in the CTB
-      @param level  0,1,2, wait level
-      @param addr wait address, -1 gets
-      @returns actual value
-			 */
-			printf("wait addr %d %x\n",level, addr);
-			retval=setPatternWaitAddress(level,addr);
-			printf("ret: wait addr %d %x\n",level, retval);
-			ret=OK;
-			n = sendDataOnly(file_des,&ret,sizeof(ret));
-			if (ret==FAIL)
-				n += sendDataOnly(file_des,mess,sizeof(mess));
-			else {
-				n += sendDataOnly(file_des,&retval,sizeof(retval));
-
-			}
-
-
-			break;
-
-
-		case 3: //wait time
-			n = receiveDataOnly(file_des,&level,sizeof(level));
-			n = receiveDataOnly(file_des,&t,sizeof(t));
-
-
-			/** Sets the wait time in the CTB
-      @param level  0,1,2, wait level
-      @param t wait time, -1 gets
-      @returns actual value
-			 */
-
-			ret=OK;
-
-			retval64=setPatternWaitTime(level,t);
-
-			n = sendDataOnly(file_des,&ret,sizeof(ret));
-			if (ret==FAIL)
-				n += sendDataOnly(file_des,mess,sizeof(mess));
-			else
-				n += sendDataOnly(file_des,&retval64,sizeof(retval64));
-
-			break;
-
-
-
-		case 4:
-			n = receiveDataOnly(file_des,pat,sizeof(pat));
-			for (addr=0; addr<1024; addr++)
-				writePatternWord(addr,word);
-			ret=OK;
-			retval=0;
-			n = sendDataOnly(file_des,&ret,sizeof(ret));
-			if (ret==FAIL)
-				n += sendDataOnly(file_des,mess,sizeof(mess));
-			else
-				n += sendDataOnly(file_des,&retval64,sizeof(retval64));
-
-			break;
-
-
-
-
-
-		default:
-			ret=FAIL;
-			printf(mess);
-			sprintf(mess,"%s - wrong mode %d\n",mess, mode);
-			n = sendDataOnly(file_des,&ret,sizeof(ret));
-			n += sendDataOnly(file_des,mess,sizeof(mess));
-
-
-
-	}
-
-
-	/*return ok/fail*/
-	return ret;
-}
-
-
 int write_adc_register(int file_des) {
 
 	int retval;
diff --git a/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.h b/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.h
index 0cbdd052b..6fa00253c 100755
--- a/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.h
+++ b/slsDetectorSoftware/jungfrauDetectorServer/server_funcs.h
@@ -3,31 +3,19 @@
 
 
 #include "sls_detector_defs.h"
-
-
-#include <stdio.h>
-/*
-#include <sys/types.h> 
-#include <sys/socket.h>
-#include <netinet/in.h>
-*/
 #include "communication_funcs.h"
 
-
-
-
-#define GOODBYE -200
+#include <stdio.h>
 
 int sockfd;
 
-int function_table();
 
+int function_table();
 int decode_function(int);
 int init_detector(int);
-
 int M_nofunc(int);
 int exit_server(int);
-
+int exec_command(int);
 
 
 
@@ -37,7 +25,6 @@ int set_number_of_modules(int);
 int get_max_number_of_modules(int);
 
 
-int exec_command(int);
 int set_external_signal_flag(int);
 int set_external_communication_mode(int);
 int get_id(int);
@@ -47,10 +34,10 @@ int read_register(int);
 int set_dac(int);
 int get_adc(int);
 int set_channel(int);
-int set_chip(int);
-int set_module(int);
 int get_channel(int);
+int set_chip(int);
 int get_chip(int);
+int set_module(int);
 int get_module(int);
 
 int get_threshold_energy(int); 
@@ -74,14 +61,15 @@ int execute_trimming(int);
 int lock_server(int);
 int set_port(int);
 int get_last_client_ip(int);
+int send_update(int);
+int update_client(int);
+
+int configure_mac(int);
+int load_image(int);
+
 int set_master(int);
 int set_synchronization(int);
 
-int update_client(int);
-int send_update(int);
-int configure_mac(int);
-
-int load_image(int);
 int read_counter_block(int);
 int reset_counter_block(int);
 
@@ -92,7 +80,6 @@ int stop_receiver(int);
 int calibrate_pedestal(int);
 
 int set_roi(int);
-int set_ctb_pattern(int);
 
 int write_adc_register(int);;