timing functions changed

git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@133 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
bergamaschi
2012-02-27 16:29:40 +00:00
parent 1064bd21ff
commit b755c533f0
13 changed files with 733 additions and 245 deletions

View File

@@ -44,6 +44,10 @@ u_int32_t progressMask=0;
int ififostart, ififostop, ififostep, ififo;
int masterMode=NO_MASTER, syncMode=NO_SYNCHRONIZATION;
enum externalSignalFlag signals[4]={EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF};
#ifdef MCB_FUNCS
extern const int nChans;
@@ -239,21 +243,66 @@ u_int32_t getTotDutyCycle() {
u_int32_t setExtSignal(int d, enum externalSignalFlag mode) {
int modes[]={EXT_SIG_OFF, EXT_GATE_IN_ACTIVEHIGH, EXT_GATE_IN_ACTIVELOW,EXT_TRIG_IN_RISING,EXT_TRIG_IN_FALLING,EXT_RO_TRIG_IN_RISING, EXT_RO_TRIG_IN_FALLING,EXT_GATE_OUT_ACTIVEHIGH, EXT_GATE_OUT_ACTIVELOW, EXT_TRIG_OUT_RISING, EXT_TRIG_OUT_FALLING, EXT_RO_TRIG_OUT_RISING, EXT_RO_TRIG_OUT_FALLING};
u_int32_t c;
int off=d*SIGNAL_OFFSET;
c=bus_r(EXT_SIGNAL_REG);
if (mode<=RO_TRIGGER_OUT_FALLING_EDGE && mode>=0)
bus_w(EXT_SIGNAL_REG,((modes[mode])<<off)|(c&~(SIGNAL_MASK<<off)));
if (d>=0 && d<4) {
signals[d]=mode;
// if output signal, set it!
if (mode<=RO_TRIGGER_OUT_FALLING_EDGE && mode>=GATE_OUT_ACTIVE_HIGH && signals[d]!=MASTER_SLAVE_SYNCHRONIZATION)
bus_w(EXT_SIGNAL_REG,((modes[mode])<<off)|(c&~(SIGNAL_MASK<<off)));
}
return getExtSignal(d);
}
u_int32_t setFPGASignal(int d, enum externalSignalFlag mode) {
int modes[]={EXT_SIG_OFF, EXT_GATE_IN_ACTIVEHIGH, EXT_GATE_IN_ACTIVELOW,EXT_TRIG_IN_RISING,EXT_TRIG_IN_FALLING,EXT_RO_TRIG_IN_RISING, EXT_RO_TRIG_IN_FALLING,EXT_GATE_OUT_ACTIVEHIGH, EXT_GATE_OUT_ACTIVELOW, EXT_TRIG_OUT_RISING, EXT_TRIG_OUT_FALLING, EXT_RO_TRIG_OUT_RISING, EXT_RO_TRIG_OUT_FALLING};
u_int32_t c;
int off=d*SIGNAL_OFFSET;
c=bus_r(EXT_SIGNAL_REG);
if (mode<=RO_TRIGGER_OUT_FALLING_EDGE && mode>=0)
bus_w(EXT_SIGNAL_REG,((modes[mode])<<off)|(c&~(SIGNAL_MASK<<off)));
return getExtSignal(d);
}
int getExtSignal(int d) {
/* int modes[]={SIGNAL_OFF, GATE_IN_ACTIVE_HIGH, GATE_IN_ACTIVE_LOW,TRIGGER_IN_RISING_EDGE, TRIGGER_IN_FALLING_EDGE,RO_TRIGGER_IN_RISING_EDGE, RO_TRIGGER_IN_FALLING_EDGE, GATE_OUT_ACTIVE_HIGH, GATE_OUT_ACTIVE_LOW, TRIGGER_OUT_RISING_EDGE, TRIGGER_OUT_FALLING_EDGE, RO_TRIGGER_OUT_RISING_EDGE,RO_TRIGGER_OUT_FALLING_EDGE}; */
/* int off=d*SIGNAL_OFFSET; */
/* int mode=((bus_r(EXT_SIGNAL_REG)&(SIGNAL_MASK<<off))>>off); */
/* if (mode<RO_TRIGGER_OUT_FALLING_EDGE) */
/* return modes[mode]; */
/* else */
/* return -1; */
if (d>=0 && d<4)
return signals[d];
else
return -1;
}
int getFPGASignal(int d) {
int modes[]={SIGNAL_OFF, GATE_IN_ACTIVE_HIGH, GATE_IN_ACTIVE_LOW,TRIGGER_IN_RISING_EDGE, TRIGGER_IN_FALLING_EDGE,RO_TRIGGER_IN_RISING_EDGE, RO_TRIGGER_IN_FALLING_EDGE, GATE_OUT_ACTIVE_HIGH, GATE_OUT_ACTIVE_LOW, TRIGGER_OUT_RISING_EDGE, TRIGGER_OUT_FALLING_EDGE, RO_TRIGGER_OUT_RISING_EDGE,RO_TRIGGER_OUT_FALLING_EDGE};
int off=d*SIGNAL_OFFSET;
@@ -261,12 +310,136 @@ int getExtSignal(int d) {
if (mode<RO_TRIGGER_OUT_FALLING_EDGE)
return modes[mode];
else
else
return -1;
}
/*
enum externalCommunicationMode{
GET_EXTERNAL_COMMUNICATION_MODE,
AUTO,
TRIGGER_EXPOSURE_SERIES,
TRIGGER_EXPOSURE_BURST,
TRIGGER_READOUT,
TRIGGER_COINCIDENCE_WITH_INTERNAL_ENABLE,
GATE_FIX_NUMBER,
GATE_FIX_DURATION,
GATE_WITH_START_TRIGGER,
GATE_COINCIDENCE_WITH_INTERNAL_ENABLE
};
*/
int setTiming(int ti) {
int ret=GET_EXTERNAL_COMMUNICATION_MODE;
int g=-1, t=-1, rot=-1;
int i;
switch (ti) {
case AUTO_TIMING:
// disable all gates/triggers in except if used for master/slave synchronization
for (i=0; i<4; i++) {
if (getFPGASignal(i)>0 && getFPGASignal(i)<GATE_OUT_ACTIVE_HIGH && signals[i]!=MASTER_SLAVE_SYNCHRONIZATION)
setFPGASignal(i,SIGNAL_OFF);
}
break;
case TRIGGER_EXPOSURE:
// if one of the signals is configured to be trigger, set it and unset possible gates
for (i=0; i<4; i++) {
if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
setFPGASignal(i,signals[i]);
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
setFPGASignal(i,SIGNAL_OFF);
else if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
setFPGASignal(i,SIGNAL_OFF);
}
break;
case TRIGGER_READOUT:
// if one of the signals is configured to be trigger, set it and unset possible gates
for (i=0; i<4; i++) {
if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
setFPGASignal(i,signals[i]);
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
setFPGASignal(i,SIGNAL_OFF);
else if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
setFPGASignal(i,SIGNAL_OFF);
}
break;
case GATE_FIX_NUMBER:
// if one of the signals is configured to be trigger, set it and unset possible gates
for (i=0; i<4; i++) {
if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
setFPGASignal(i,SIGNAL_OFF);
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
setFPGASignal(i,signals[i]);
else if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
setFPGASignal(i,SIGNAL_OFF);
}
break;
case GATE_WITH_START_TRIGGER:
for (i=0; i<4; i++) {
if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
setFPGASignal(i,SIGNAL_OFF);
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
setFPGASignal(i,signals[i]);
else if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
setFPGASignal(i,signals[i]);
}
break;
default:
;
}
for (i=0; i<4; i++) {
if (signals[i]!=MASTER_SLAVE_SYNCHRONIZATION) {
if (getFPGASignal(i)==RO_TRIGGER_IN_RISING_EDGE || getFPGASignal(i)==RO_TRIGGER_IN_FALLING_EDGE)
rot=i;
else if (getFPGASignal(i)==GATE_IN_ACTIVE_HIGH || getFPGASignal(i)==GATE_IN_ACTIVE_LOW)
g=i;
else if (getFPGASignal(i)==TRIGGER_IN_RISING_EDGE || getFPGASignal(i)==TRIGGER_IN_FALLING_EDGE)
t=i;
}
}
if (g>=0 && t>=0 && rot<0) {
ret=GATE_WITH_START_TRIGGER;
} else if (g<0 && t>=0 && rot<0) {
ret=TRIGGER_EXPOSURE;
} else if (g>=0 && t<0 && rot<0) {
ret=GATE_FIX_NUMBER;
} else if (g<0 && t<0 && rot>0) {
ret=TRIGGER_READOUT;
} else if (g<0 && t<0 && rot<0) {
ret=AUTO_TIMING;
}
return ret;
}
int setConfigurationRegister(int d) {
#ifdef VERBOSE
printf("Setting configuration register to %x",d);
@@ -608,7 +781,11 @@ int64_t setExposureTime(int64_t value){
/* time is in ns */
if (value!=-1)
value*=(1E-9*CLK_FREQ);
return set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-9*CLK_FREQ);
if (masterMode==IS_SLAVE && syncMode==MASTER_GATES)
setGates(1);
return set64BitReg(value,SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG)/(1E-9*CLK_FREQ);
}
int64_t getExposureTime(){
@@ -715,6 +892,7 @@ int64_t getActualTime(){
int64_t getMeasurementTime(){
int64_t v=get64BitReg(GET_MEASUREMENT_TIME_LSB_REG, GET_MEASUREMENT_TIME_MSB_REG);
int64_t mask=0x8000000000000000;
if (v & mask ) {
#ifdef VERBOSE
printf("no measurement time left\n");
@@ -1272,3 +1450,141 @@ int clearRAM() {
//#endif
return OK;
}
int setMaster(int f) {
int i, s;
switch(f) {
case NO_MASTER:
masterMode=NO_MASTER;
for (i=0; i<4; i++) {
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
setFPGASignal(i,SIGNAL_OFF);
}
}
case IS_MASTER:
// configure gate or trigger out
for (i=0; i<4; i++) {
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
masterMode=IS_MASTER;
switch (syncMode) {
case NO_SYNCHRONIZATION:
setFPGASignal(i,SIGNAL_OFF);
break;
case MASTER_GATES:
setFPGASignal(i,GATE_OUT_ACTIVE_HIGH);
break;
case MASTER_TRIGGERS:
setFPGASignal(i,TRIGGER_OUT_RISING_EDGE);
break;
case SLAVE_STARTS_WHEN_MASTER_STOPS:
setFPGASignal(i,RO_TRIGGER_OUT_RISING_EDGE);
break;
default:
;
}
}
}
case IS_SLAVE:
// configure gate or trigger in
for (i=0; i<4; i++) {
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
masterMode=IS_SLAVE;
switch (syncMode) {
case NO_SYNCHRONIZATION:
setFPGASignal(i,SIGNAL_OFF);
break;
case MASTER_GATES:
setFPGASignal(i,GATE_IN_ACTIVE_HIGH);
break;
case MASTER_TRIGGERS:
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
break;
case SLAVE_STARTS_WHEN_MASTER_STOPS:
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
break;
default:
;
}
}
}
// configure gate or trigger in
default:
//do nothing
;
}
return masterMode;
}
int setSynchronization(int s) {
int i;
switch(s) {
case NO_SYNCHRONIZATION:
syncMode=NO_SYNCHRONIZATION;
for (i=0; i<4; i++) {
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
setFPGASignal(i,SIGNAL_OFF);
}
}
break;
// disable external signals?
case MASTER_GATES:
// configure gate in or out
for (i=0; i<4; i++) {
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
syncMode=MASTER_GATES;
if (masterMode==IS_MASTER)
setFPGASignal(i,GATE_OUT_ACTIVE_HIGH);
else if (masterMode==IS_SLAVE)
setFPGASignal(i,GATE_IN_ACTIVE_HIGH);
}
}
break;
case MASTER_TRIGGERS:
// configure trigger in or out
for (i=0; i<4; i++) {
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
syncMode=MASTER_TRIGGERS;
if (masterMode==IS_MASTER)
setFPGASignal(i,TRIGGER_OUT_RISING_EDGE);
else if (masterMode==IS_SLAVE)
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
}
}
break;
case SLAVE_STARTS_WHEN_MASTER_STOPS:
// configure trigger in or out
for (i=0; i<4; i++) {
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
syncMode=SLAVE_STARTS_WHEN_MASTER_STOPS;
if (masterMode==IS_MASTER)
setFPGASignal(i,RO_TRIGGER_OUT_RISING_EDGE);
else if (masterMode==IS_SLAVE)
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
}
}
break;
default:
//do nothing
;
}
return syncMode;
}

View File

@@ -38,6 +38,17 @@ u_int32_t getTotClockDutyCycle();
u_int32_t setExtSignal(int d, enum externalSignalFlag mode);
int getExtSignal(int d);
u_int32_t setFPGASignal(int d, enum externalSignalFlag mode);
int getFPGASignal(int d);
int setTiming(int t);
int setConfigurationRegister(int d);
int setToT(int d);
int setContinousReadOut(int d);
@@ -109,6 +120,11 @@ int setStoreInRAM(int b);
int allocateRAM();
int clearRAM();
int setMaster(int f);
int setSynchronization(int s);
/*
u_int32_t setNBits(u_int32_t);

View File

@@ -160,6 +160,9 @@
#define EXT_TRIG_OUT_FALLING 0xA
#define EXT_RO_TRIG_OUT_RISING 0xB
#define EXT_RO_TRIG_OUT_FALLING 0xC
#define EXT_OUT_LOW 0xD // to be implemented in firmware (and corrected in software)
#define EXT_OUT_HIGH 0xE // to be implemented in firmware (and corrected in software)
#define EXT_MASTER_SLAVE_SYNC 0xF // to be implemented in firmware (and corrected in software)

View File

@@ -146,6 +146,8 @@ int function_table() {
flist[F_SET_PORT]=&set_port;
flist[F_GET_LAST_CLIENT_IP]=&get_last_client_ip;
flist[F_UPDATE_CLIENT]=&update_client;
flist[F_SET_MASTER]=&set_master;
flist[F_SET_SYNCHRONIZATION_MODE]=&set_synchronization;
#ifdef VERBOSE
/* for (i=0;i<256;i++){
printf("function %d located at %x\n",i,flist[i]);
@@ -459,7 +461,7 @@ int set_external_signal_flag(int file_des) {
int set_external_communication_mode(int file_des) {
int n;
enum externalCommunicationMode arg, ret;
enum externalCommunicationMode arg, ret=GET_EXTERNAL_COMMUNICATION_MODE;
int retval=OK;
sprintf(mess,"Can't set external communication mode\n");
@@ -485,14 +487,16 @@ enum externalCommunicationMode{
GATE_COINCIDENCE_WITH_INTERNAL_ENABLE
};
*/
ret=AUTO;
if (retval==OK) {
/* execute action */
switch(arg) {
default:
sprintf(mess,"The meaning of single signals should be set\n");
retval=FAIL;
}
ret=setTiming(arg);
/* switch(arg) { */
/* default: */
/* sprintf(mess,"The meaning of single signals should be set\n"); */
/* retval=FAIL; */
/* } */
#ifdef VERBOSE
@@ -2666,3 +2670,92 @@ int update_client(int file_des) {
}
int set_master(int file_des) {
enum masterFlags retval=GET_MASTER;
enum masterFlags arg;
int n;
int ret=OK;
int regret=OK;
sprintf(mess,"can't set master flags\n");
n = receiveDataOnly(file_des,&arg,sizeof(arg));
if (n < 0) {
sprintf(mess,"Error reading from socket\n");
ret=FAIL;
}
#ifdef VERBOSE
printf("setting master flags to %d\n",arg);
#endif
if (differentClients==1 && lockStatus==1 && arg!=GET_READOUT_FLAGS) {
ret=FAIL;
sprintf(mess,"Detector locked by %s\n",lastClientIP);
} else {
retval=setMaster(arg);
}
if (retval==GET_MASTER) {
ret=FAIL;
}
n = sendDataOnly(file_des,&ret,sizeof(ret));
if (ret==FAIL) {
n = sendDataOnly(file_des,mess,sizeof(mess));
} else {
n = sendDataOnly(file_des,&retval,sizeof(retval));
}
return ret;
}
int set_synchronization(int file_des) {
enum synchronizationMode retval=GET_MASTER;
enum synchronizationMode arg;
int n;
int ret=OK;
int regret=OK;
sprintf(mess,"can't set synchronization mode\n");
n = receiveDataOnly(file_des,&arg,sizeof(arg));
if (n < 0) {
sprintf(mess,"Error reading from socket\n");
ret=FAIL;
}
#ifdef VERBOSE
printf("setting master flags to %d\n",arg);
#endif
if (differentClients==1 && lockStatus==1 && arg!=GET_READOUT_FLAGS) {
ret=FAIL;
sprintf(mess,"Detector locked by %s\n",lastClientIP);
} else {
//ret=setStoreInRAM(0);
// initChipWithProbes(0,0,0, ALLMOD);
retval=setSynchronization(arg);
}
if (retval==GET_SYNCHRONIZATION_MODE) {
ret=FAIL;
}
n = sendDataOnly(file_des,&ret,sizeof(ret));
if (ret==FAIL) {
n = sendDataOnly(file_des,mess,sizeof(mess));
} else {
n = sendDataOnly(file_des,&retval,sizeof(retval));
}
return ret;
}

View File

@@ -70,6 +70,8 @@ int execute_trimming(int);
int lock_server(int);
int set_port(int);
int get_last_client_ip(int);
int set_master(int);
int set_synchronization(int);
int update_client(int);
int send_update(int);