detectors/slsDetectorPackage
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Merge branch 'developer' into gui

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This commit is contained in:
maliakal_d
2019-06-17 17:41:17 +02:00
parent 326b14737f 5b8e4f6c72
commit b6bba0b7bc
15 changed files with 874 additions and 469 deletions
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20
slsDetectorServers/slsDetectorServer/AD9257.h
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@ -267,21 +267,13 @@ void AD9257_Configure(){
FILE_LOG(logINFO, ("\tPower mode chip run\n"));
AD9257_Set(AD9257_POWER_MODE_REG, AD9257_INT_CHIP_RUN_VAL);
// binary offset
FILE_LOG(logINFO, ("\tBinary offset\n"));
AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_BINARY_OFST_VAL);
// binary offset, lvds-iee reduced
FILE_LOG(logINFO, ("\tBinary offset, Lvds-ieee reduced\n"));
AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_BINARY_OFST_VAL | AD9257_OUT_LVDS_IEEE_VAL);
//output clock phase
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
FILE_LOG(logINFO, ("\tOutput clock phase is at default: 180\n"));
#else
FILE_LOG(logINFO, ("\tOutput clock phase: 60\n"));
AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_60_VAL);
#endif
// lvds-iee reduced , binary offset
FILE_LOG(logINFO, ("\tLvds-iee reduced, binary offset\n"));
AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_LVDS_IEEE_VAL);
FILE_LOG(logINFO, ("\tOutput clock phase: 180\n"));
AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_180_VAL);
// all devices on chip to receive next command
FILE_LOG(logINFO, ("\tAll devices on chip to receive next command\n"));
@ -298,9 +290,7 @@ void AD9257_Configure(){
AD9257_SetVrefVoltage(AD9257_VREF_DEFAULT_VAL, 0);
#else
FILE_LOG(logINFO, ("\tVref 1.33\n"));
//AD9257_Set(AD9257_VREF_REG, AD9257_VREF_1_33_VAL);
AD9257_SetVrefVoltage(AD9257_VREF_1_33_VAL, 0);
#endif
// no test mode

2
slsDetectorServers/slsDetectorServer/ALTERA_PLL.h
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@ -225,7 +225,7 @@ int ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value) {
// write frequency (post-scale output counter C)
ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_C_COUNTER_REG, val);
// reset required to keep the phase
// reset required to keep the phase (must reconfigure adcs again after this as adc clock is stopped temporarily when resetting pll)
ALTERA_PLL_ResetPLL ();
/*double temp = ((double)pllVCOFreqMhz / (double)(low_count + high_count));