mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-23 06:50:02 +02:00
Merge branch 'master' of gitorious.psi.ch:sls_det_software/sls_detector_software
This commit is contained in:
Dhanya Maliakal
commit
b4f995084c
@ -341,7 +341,8 @@ enum dacIndex {
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E_Vcp, /**< eiger */
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E_Vcn, /**< eiger */
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E_Vis, /**< eiger */
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IO_DELAY /**< eiger io delay */
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IO_DELAY, /**< eiger io delay */
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ADC_VPP /**< adc vpp for jctb */
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};
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/**
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@ -6,7 +6,7 @@
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CROSS = bfin-uclinux-
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CC = $(CROSS)gcc
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CFLAGS += -Wall -DMOENCHD -DMCB_FUNCS -DDACS_INT -DDEBUG #-DVERBOSE #-DVERYVERBOSE #-DVIRTUAL #-DDACS_INT_CSERVER
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CFLAGS += -Wall -DMOENCHD -DMCB_FUNCS -DDACS_INT -DDEBUG -DV1#-DVERBOSE #-DVERYVERBOSE #-DVIRTUAL #-DDACS_INT_CSERVER
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PROGS= jungfrauDetectorServer
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@ -1,7 +1,7 @@
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//#define TESTADC
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#define TESTADC1
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//#define TIMEDBG
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#include "server_defs.h"
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#include "firmware_funcs.h"
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#include "mcb_funcs.h"
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@ -20,6 +20,10 @@
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#include <sys/stat.h>
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#include <stdlib.h>
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#include <sys/time.h>
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struct timeval tss,tse,tsss; //for timing
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//for memory mapping
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u_int64_t CSP0BASE;
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@ -375,7 +379,7 @@ u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig) {
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printf("*********** pll busy: %08x\n",bus_r(STATUS_REG)&PLL_RECONFIG_BUSY);
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// printf("*********** pll busy: %08x\n",bus_r(STATUS_REG)&PLL_RECONFIG_BUSY);
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bus_w(PLL_PARAM_REG,val);
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// printf("param: %x\n",val);
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@ -396,7 +400,7 @@ u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig) {
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// printf("wrote: %08x\n",vv);
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bus_w(PLL_CNTRL_REG,vv);
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usleep(10000);
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printf("+++++++++ pll busy: %08x\n",bus_r(STATUS_REG)&PLL_RECONFIG_BUSY);
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// printf("+++++++++ pll busy: %08x\n",bus_r(STATUS_REG)&PLL_RECONFIG_BUSY);
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// bus_w(PLL_CNTRL_REG,(1<<PLL_CNTR_READ_BIT)|(reg<<PLL_CNTR_ADDR_OFF));
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// usleep(1000);
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@ -418,8 +422,8 @@ u_int32_t getPllReconfigReg(u_int32_t reg, int trig) {
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u_int32_t val=reg<<PLL_CNTR_ADDR_OFF;
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u_int32_t vv;
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printf("cntrlreg: %08x\n",PLL_CNTRL_REG);
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printf("wrote: %08x\n",val);
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// printf("cntrlreg: %08x\n",PLL_CNTRL_REG);
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// printf("wrote: %08x\n",val);
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bus_w(PLL_CNTRL_REG,val);
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// printf("read: %08x\n",bus_r(PLL_CNTRL_REG));
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usleep(100);
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@ -441,7 +445,7 @@ u_int32_t getPllReconfigReg(u_int32_t reg, int trig) {
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usleep(100);
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val=0;
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printf("wrote: %08x\n",val);
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// printf("wrote: %08x\n",val);
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bus_w(PLL_CNTRL_REG,val);
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while(bus_r(STATUS_REG)&PLL_RECONFIG_BUSY) {
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@ -489,26 +493,58 @@ void configurePll(int i) {
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val= (i<<18)| (odd<<17) | l | (h<<8);
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printf("Counter %d, val: %08x\n", i, val); setPllReconfigReg(PLL_C_COUNTER_REG, val,0);
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printf("Counter %d, val: %08x\n", i, val);
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setPllReconfigReg(PLL_C_COUNTER_REG, val,0);
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// usleep(20);
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//change sync at the same time as
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if (i>0) {
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val= (2<<18)| (odd<<17) | l | (h<<8);
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printf("Counter %d, val: %08x\n", i, val);
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setPllReconfigReg(PLL_C_COUNTER_REG, val,0);
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}
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} else {
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// if (mode==1) {
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// } else {
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printf("phase in %d\n",clkPhase[0]);
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printf("phase in %d\n",clkPhase[1]);
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if (clkPhase[0]>0) {
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if (clkPhase[1]>0) {
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inv=0;
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phase=clkPhase[0];
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phase=clkPhase[1];
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} else {
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inv=1;
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phase=-1*clkPhase[0];
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phase=-1*clkPhase[1];
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}
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printf("phase out %d %08x\n",phase,phase);
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val=phase | (inv<<16);;// | (inv<<21);
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if (inv) {
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val=phase | (1<<16);// | (inv<<21);
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printf("**************** phase word %08x\n",val);
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printf("Phase, val: %08x\n", val); setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0
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// printf("Phase, val: %08x\n", val);
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setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0
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} else {
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val=phase ;// | (inv<<21);
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printf("**************** phase word %08x\n",val);
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// printf("Phase, val: %08x\n", val);
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setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0
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val=phase | (2<<16);// | (inv<<21);
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printf("Start reconfig\n"); setPllReconfigReg(PLL_START_REG, 1,0);
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// bus_w(PLL_CNTRL_REG, 0);
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printf("Status register\n"); getPllReconfigReg(PLL_STATUS_REG,0);
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// sleep(1);
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printf("**************** phase word %08x\n",val);
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// printf("Phase, val: %08x\n", val);
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setPllReconfigReg(PLL_PHASE_SHIFT_REG,val,0); //shifts counter 0
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}
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}
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@ -521,14 +557,14 @@ void configurePll(int i) {
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// printf("PLL mode\n"); setPllReconfigReg(PLL_MODE_REG,0,0);
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usleep(10000);
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/* if (mode!=1) { */
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/* printf("reset pll\n"); */
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/* bus_w(PLL_CNTRL_REG,((1<<PLL_CNTR_PLL_RESET_BIT))); //reset PLL */
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/* usleep(100); */
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/* bus_w(PLL_CNTRL_REG, 0); */
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if (i<2) {
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printf("reset pll\n");
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bus_w(PLL_CNTRL_REG,((1<<PLL_CNTR_PLL_RESET_BIT))); //reset PLL
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usleep(100);
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bus_w(PLL_CNTRL_REG, 0);
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/* } */
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}
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}
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@ -578,45 +614,29 @@ u_int32_t setClockDivider(int d, int ic) {
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}
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int phaseStep(int st, int ic){
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u_int32_t addr, val=( (1<<PLL_CNTR_UPDN_BIT)| (1<<PLL_CNTR_CNTSEL_OFF) | (1<< PLL_CNTR_PHASE_EN_BIT));
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/* int ic=0 is run clk; ic=1 is adc clk */
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/* if (st>0) */
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/* ic=1; */
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/* else { */
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/* ic=0; */
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/* st*=-1; */
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/* } */
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int phaseStep(int st){
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int i;
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if (st>65535 || st<-65535)
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return -1;
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return clkPhase[0];
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printf("ic=%d; phase %d\n", ic, st);
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printf("phase %d\n", st);
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clkPhase[1]=st-clkPhase[0];
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if (ic==1)
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clkPhase[0]=-st;
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else if (ic==0)
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configurePll(2);
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clkPhase[0]=st;
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/* printf("Changin phase %d\n",st); */
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/* for (i=0; i<st; i++) { */
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/* bus_w(PLL_CNTRL_REG,0); */
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/* bus_w(PLL_CNTRL_REG,val); */
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/* } */
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/* sleep(1); */
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// bus_w(PLL_CNTRL_REG,0);
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configurePll(2);
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return clkPhase[0];
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}
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int getPhase() {
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return clkPhase[0];
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};
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u_int32_t getClockDivider(int ic) {
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@ -1959,11 +1979,15 @@ u_int32_t fifo_full(void)
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}
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u_int16_t* fifo_read_event()
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u_int16_t* fifo_read_event(int ns)
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{
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int i=0;
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u_int16_t *dum;
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/* #ifdef TIMEDBG */
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/* gettimeofday(&tse,NULL); */
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/* #endif */
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if (ns==0) {
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volatile u_int32_t t = bus_r16(LOOK_AT_ME_REG);
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bus_w(DUMMY_REG,0);
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@ -1984,19 +2008,33 @@ u_int16_t* fifo_read_event()
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printf(".");
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#endif
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}
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/* #ifdef TIMEDBG */
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/* // tsss=tss; */
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/* gettimeofday(&tss,NULL); */
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/* printf("look for data = %ld usec\n", (tss.tv_usec) - (tse.tv_usec)); */
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/* #endif */
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}
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// printf("%08x %08x\n", runState(), bus_r(LOOK_AT_ME_REG));
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/* dma_memcpy(now_ptr,values ,dataBytes); */
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/* #else */
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bus_w16(DUMMY_REG,1<<8); // read strobe to all fifos
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bus_w16(DUMMY_REG,0);
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for (i=0; i<32; i++) {
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dum=((u_int16_t*)(now_ptr))+i;
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bus_w(DUMMY_REG,i<<1);
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// usleep(10);
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bus_w(DUMMY_REG,(i<<1) | 1);
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// usleep(10);
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bus_w(DUMMY_REG,i<<1);
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/* usleep(10); */
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*dum=bus_r16(FIFO_DATA_REG);
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bus_w16(DUMMY_REG,i);
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// dum=((u_int16_t*)(now_ptr))+i;
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// *dum=bus_r16(FIFO_DATA_REG);
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//dum=;
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*(((u_int16_t*)(now_ptr))+i)=bus_r16(FIFO_DATA_REG);
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}
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/* #ifdef TIMEDBG */
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/* gettimeofday(&tss,NULL); */
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/* printf("read data loop = %ld usec\n",(tss.tv_usec) - (tse.tv_usec)); */
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/* #endif */
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#ifdef VERBOSE
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printf("*");
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#endif
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@ -2007,23 +2045,31 @@ u_int16_t* fifo_read_event()
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u_int16_t* fifo_read_frame()
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{
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u_int16_t *dum;
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#ifdef TIMEDBG
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gettimeofday(&tsss,NULL);
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#endif
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// u_int16_t *dum;
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int ns=0;
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now_ptr=(char*)ram_values;
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while(ns<nSamples) {
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dum=fifo_read_event();
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if (dum==NULL) break;
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while(ns<nSamples && fifo_read_event(ns)) {
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now_ptr+=dataBytes;
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ns++;
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}
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#ifdef TIMEDBG
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// usleep(10);
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gettimeofday(&tss,NULL);
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printf("total read data loop = %ld usec\n",(tss.tv_usec) - (tsss.tv_usec));
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#endif
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// printf("%x %d\n",dum, ns);
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if (ns==0) return NULL;
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if (ns) return ram_values;
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#ifdef VERBOSE
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printf("+\n");
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#else
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printf("+");
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#endif
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return ram_values;
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return NULL;
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}
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@ -2240,37 +2286,37 @@ int writeADC(int addr, int val) {
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printf("***** ADC SPI WRITE TO REGISTER %04X value %04X\n",addr,val);
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// start point
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valw=0xff;
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bus_w(ADC_WRITE_REG,(valw));
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bus_w16(ADC_WRITE_REG,(valw));
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//chip sel bar down
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valw=((0xffffffff&(~csmask)));
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bus_w(ADC_WRITE_REG,valw);
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bus_w16(ADC_WRITE_REG,valw);
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for (i=0;i<24;i++) {
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//cldwn
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valw=valw&(~(0x1<<cdx));
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bus_w(ADC_WRITE_REG,valw);
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usleep(0);
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bus_w16(ADC_WRITE_REG,valw);
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// usleep(0);
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//write data (i)
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valw=(valw&(~(0x1<<ddx)))+(((codata>>(23-i))&0x1)<<ddx);
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bus_w(ADC_WRITE_REG,valw);
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usleep(0);
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bus_w16(ADC_WRITE_REG,valw);
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// usleep(0);
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//clkup
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valw=valw+(0x1<<cdx);
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bus_w(ADC_WRITE_REG,valw);
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usleep(0);
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bus_w16(ADC_WRITE_REG,valw);
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// usleep(0);
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}
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// stop point =start point
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valw=valw&(~(0x1<<cdx));
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usleep(0);
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// usleep(0);
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valw=0xff;
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bus_w(ADC_WRITE_REG,(valw));
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bus_w16(ADC_WRITE_REG,(valw));
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//usleep in between
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usleep(50000);
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// usleep(50000);
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return OK;
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}
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@ -2759,7 +2805,7 @@ int calibratePedestal(int frames){
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while(dataret==OK){
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//got data
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if (fifo_read_event()) {
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if (fifo_read_event(0)) {
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dataret=OK;
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//sendDataOnly(file_des,&dataret,sizeof(dataret));
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//sendDataOnly(file_des,dataretval,dataBytes);
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@ -3042,6 +3088,8 @@ void initDac(int dacnum) {
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ddx=0; cdx=1;
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csdx=dacnum/8+2;
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printf("data bit=%d, clkbit=%d, csbit=%d",ddx,cdx,csdx);
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codata=((((0x6)<<4)+((0xf))<<16)+((0x0<<4)&0xfff0));
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@ -29,7 +29,8 @@ u_int32_t bus_w(u_int32_t offset, u_int32_t data);
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u_int32_t bus_r(u_int32_t offset);
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|
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int setPhaseShiftOnce();
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int phaseStep(int st, int ic);
|
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int phaseStep(int st);
|
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int getPhase();
|
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int cleanFifo();
|
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int setDAQRegister();
|
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|
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@ -134,7 +135,7 @@ u_int32_t fifo_full(void);
|
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|
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|
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|
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u_int16_t* fifo_read_event();
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u_int16_t* fifo_read_event(int ns);
|
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u_int16_t* fifo_read_frame();
|
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u_int32_t* decode_data(int* datain);
|
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//u_int32_t move_data(u_int64_t* datain, u_int64_t* dataout);
|
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@ -1985,7 +1985,7 @@ int testExtPulse(int imod) {
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//startStateMachine();
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startReadOut();
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usleep(100);
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val1=(int*)(decode_data((int*)(fifo_read_event())));
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val1=(int*)(decode_data((int*)(fifo_read_event(0))));
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// val1=fifo_read_event();
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//imod=0;
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//for (imod=0; imod<nModX; imod++) {
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@ -2054,7 +2054,7 @@ int testExtPulseMux(int imod, int ow) {
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startReadOut();
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usleep(100);
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v1=(int*)(fifo_read_event());
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v1=(int*)(fifo_read_event(0));
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if (v1)
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values=(int*)(decode_data(v1));
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else {
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@ -2129,7 +2129,7 @@ int testDataInOutMux(int imod, int ow, int num) {
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printf("mux %d\n",ow);
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startReadOut();
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usleep(100);
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v1=(int*)(fifo_read_event());
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v1=(int*)(fifo_read_event(0));
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if (v1)
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values=(int*)(decode_data(v1));
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else {
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@ -54,6 +54,8 @@ int digitalTestBit = 0;
|
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extern int withGotthard;
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|
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int adcvpp=0x4;
|
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|
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int init_detector(int b, int checkType) {
|
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|
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int i;
|
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@ -995,14 +997,16 @@ int set_dac(int file_des) {
|
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sprintf(mess,"Detector locked by %s\n",lastClientIP);
|
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} else{
|
||||
|
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if (ind<16) {
|
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|
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if (mV) {
|
||||
if (val>2500)
|
||||
val=-1;
|
||||
printf("%d mV is ",val);
|
||||
if (val>0)
|
||||
val=16535*val/2500;
|
||||
val=4095*val/2500;
|
||||
printf("%d DACu\n", val);
|
||||
} else if (val>16535)
|
||||
} else if (val>4095)
|
||||
val=-1;
|
||||
|
||||
|
||||
@ -1012,6 +1016,18 @@ int set_dac(int file_des) {
|
||||
/* else */
|
||||
/* retval=initDACbyIndexDACU(idac,val,imod); */
|
||||
}
|
||||
else if (ind==ADC_VPP) {
|
||||
printf("Setting ADC VPP to %d\n",val);
|
||||
if (val>4 || val<0)
|
||||
printf("Cannot set ADC VPP to %d\n",val);
|
||||
else {
|
||||
writeADC(0x18,val);
|
||||
adcvpp=val;
|
||||
}
|
||||
retval=adcvpp;;
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
if(ret==OK){
|
||||
/* ret=FAIL; */
|
||||
@ -1025,7 +1041,7 @@ int set_dac(int file_des) {
|
||||
/* }//since v r saving only msb */
|
||||
/* else if ((retval-val)<=3 || val==-1) */
|
||||
/* ret=OK; */
|
||||
|
||||
if (ind<16) {
|
||||
if (mV) {
|
||||
|
||||
printf("%d DACu is ",retval);
|
||||
@ -1039,7 +1055,7 @@ int set_dac(int file_des) {
|
||||
#ifdef VERBOSE
|
||||
printf("DAC set to %d V\n", retval);
|
||||
#endif
|
||||
|
||||
}
|
||||
if(ret==FAIL)
|
||||
printf("Setting dac %d of module %d: wrote %d but read %d\n", ind, imod, val, retval);
|
||||
else{
|
||||
@ -2361,7 +2377,17 @@ int set_speed(int file_des) {
|
||||
|
||||
if (ret==OK) {
|
||||
|
||||
if (arg==PHASE_SHIFT || arg==ADC_PHASE) {
|
||||
|
||||
|
||||
retval=phaseStep(val);
|
||||
|
||||
} else {
|
||||
|
||||
|
||||
if (val!=-1) {
|
||||
|
||||
|
||||
if (differentClients==1 && lockStatus==1 && val>=0) {
|
||||
ret=FAIL;
|
||||
sprintf(mess,"Detector locked by %s\n",lastClientIP);
|
||||
@ -2371,9 +2397,9 @@ int set_speed(int file_des) {
|
||||
retval=setClockDivider(val,0);
|
||||
break;
|
||||
|
||||
case PHASE_SHIFT:
|
||||
retval=phaseStep(val,0);
|
||||
break;
|
||||
/* case PHASE_SHIFT: */
|
||||
/* retval=phaseStep(val,0); */
|
||||
/* break; */
|
||||
|
||||
case OVERSAMPLING:
|
||||
retval=setOversampling(val);
|
||||
@ -2383,9 +2409,9 @@ int set_speed(int file_des) {
|
||||
retval=setClockDivider(val,1);
|
||||
break;
|
||||
|
||||
case ADC_PHASE:
|
||||
retval=phaseStep(val,1);
|
||||
break;
|
||||
/* case ADC_PHASE: */
|
||||
/* retval=phaseStep(val,1); */
|
||||
/* break; */
|
||||
|
||||
|
||||
case ADC_PIPELINE:
|
||||
@ -2402,16 +2428,19 @@ int set_speed(int file_des) {
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
switch (arg) {
|
||||
case CLOCK_DIVIDER:
|
||||
retval=getClockDivider(0);
|
||||
break;
|
||||
|
||||
case PHASE_SHIFT:
|
||||
retval=getPhase();
|
||||
// retval=phaseStep(-1);
|
||||
//ret=FAIL;
|
||||
//sprintf(mess,"Cannot read phase",arg);
|
||||
retval=-1;
|
||||
break;
|
||||
|
||||
case OVERSAMPLING:
|
||||
@ -2423,7 +2452,7 @@ int set_speed(int file_des) {
|
||||
break;
|
||||
|
||||
case ADC_PHASE:
|
||||
retval=-1;
|
||||
retval=getPhase();
|
||||
break;
|
||||
|
||||
|
||||
|
||||
@ -236,7 +236,7 @@ int choose_vthresh_and_vtrim(int countlim, int nsigma, int im) {
|
||||
while (runBusy()) {
|
||||
}
|
||||
usleep(500);
|
||||
fifodata=fifo_read_event();
|
||||
fifodata=fifo_read_event(0);
|
||||
scan=decode_data(fifodata);
|
||||
for (imod=modmi; imod<modma; imod++) {
|
||||
for (ichan=0; ichan<nChans*nChips; ichan++){
|
||||
@ -377,7 +377,7 @@ int trim_with_level(int countlim, int im) {
|
||||
}
|
||||
usleep(500);
|
||||
|
||||
fifodata=fifo_read_event();
|
||||
fifodata=fifo_read_event(0);
|
||||
scan=decode_data(fifodata);
|
||||
for (imod=modmi; imod<modma; imod++) {
|
||||
for (ichan=0; ichan<nChans*nChips; ichan++) {
|
||||
@ -515,7 +515,7 @@ int choose_vthresh() {
|
||||
}
|
||||
usleep(500);
|
||||
|
||||
fifodata=fifo_read_event();
|
||||
fifodata=fifo_read_event(0);
|
||||
scan=decode_data(fifodata);
|
||||
//
|
||||
scan1=decode_data(fifodata);
|
||||
@ -553,7 +553,7 @@ int choose_vthresh() {
|
||||
}
|
||||
usleep(500);
|
||||
|
||||
fifodata=fifo_read_event();
|
||||
fifodata=fifo_read_event(0);
|
||||
scan=decode_data(fifodata);
|
||||
//
|
||||
scan1=decode_data(fifodata);
|
||||
@ -680,7 +680,7 @@ int trim_with_median(int stop, int im) {
|
||||
while (runBusy()) {
|
||||
}
|
||||
usleep(500);
|
||||
fifodata=fifo_read_event();
|
||||
fifodata=fifo_read_event(0);
|
||||
scan=decode_data(fifodata);
|
||||
scan1=decode_data(fifodata);
|
||||
|
||||
|
||||
@ -699,6 +699,12 @@ slsDetectorCommand::slsDetectorCommand(slsDetectorUtils *det) {
|
||||
i++;
|
||||
|
||||
|
||||
|
||||
descrToFuncMap[i].m_pFuncName="adcvpp"; //
|
||||
descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdDAC;
|
||||
i++;
|
||||
|
||||
|
||||
/* r/w timers */
|
||||
|
||||
descrToFuncMap[i].m_pFuncName="temp_adc"; //
|
||||
@ -898,6 +904,14 @@ slsDetectorCommand::slsDetectorCommand(slsDetectorUtils *det) {
|
||||
/* pattern generator */
|
||||
|
||||
|
||||
descrToFuncMap[i].m_pFuncName="adcinvert"; //
|
||||
descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdPattern;
|
||||
i++;
|
||||
|
||||
descrToFuncMap[i].m_pFuncName="adcdisable"; //
|
||||
descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdPattern;
|
||||
i++;
|
||||
|
||||
descrToFuncMap[i].m_pFuncName="pattern"; //
|
||||
descrToFuncMap[i].m_pFuncPtr=&slsDetectorCommand::cmdPattern;
|
||||
i++;
|
||||
@ -3383,6 +3397,8 @@ string slsDetectorCommand::cmdDAC(int narg, char *args[], int action) {
|
||||
printf("chiptestboard!\n");
|
||||
dac=(dacIndex)idac;
|
||||
}
|
||||
else if (cmd=="adcvpp")
|
||||
dac=ADC_VPP;
|
||||
else if (cmd=="vthreshold")
|
||||
dac=THRESHOLD;
|
||||
else if (cmd=="vcalibration")
|
||||
@ -3942,15 +3958,17 @@ string slsDetectorCommand::cmdSpeed(int narg, char *args[], int action) {
|
||||
index=TOT_CLOCK_DIVIDER;
|
||||
else if (cmd=="totdutycycle")
|
||||
index=TOT_DUTY_CYCLE;
|
||||
else if (cmd=="phasestep")
|
||||
else if (cmd=="phasestep") {
|
||||
index=PHASE_SHIFT;
|
||||
else if (cmd=="oversampling")
|
||||
t=100000;
|
||||
} else if (cmd=="oversampling")
|
||||
index=OVERSAMPLING;
|
||||
else if (cmd=="adcclk")
|
||||
index=ADC_CLOCK;
|
||||
else if (cmd=="adcphase")
|
||||
else if (cmd=="adcphase") {
|
||||
index=ADC_PHASE;
|
||||
else if (cmd=="adcpipeline")
|
||||
t=100000;
|
||||
} else if (cmd=="adcpipeline")
|
||||
index=ADC_PIPELINE;
|
||||
else
|
||||
return string("could not decode speed variable ")+cmd;
|
||||
@ -3961,6 +3979,7 @@ string slsDetectorCommand::cmdSpeed(int narg, char *args[], int action) {
|
||||
;
|
||||
else
|
||||
return string("cannot scan speed value ")+string(args[1]);
|
||||
|
||||
}
|
||||
|
||||
myDet->setOnline(ONLINE_FLAG);
|
||||
@ -4335,6 +4354,9 @@ string slsDetectorCommand::helpPattern(int narg, char *args[], int action) {
|
||||
os << "patwaittime0 nclk \t sets wait 0 waiting time in clock number " << std::endl;
|
||||
os << "patwaittime1 nclk \t sets wait 1 waiting time in clock number " << std::endl;
|
||||
os << "patwaittime2 nclk \t sets wait 2 waiting time in clock number " << std::endl;
|
||||
os << "adcinvert mask\t sets the adcinversion mask (hex)" << std::endl;
|
||||
os << "adcdisable mask\t sets the adcdisable mask (hex)" << std::endl;
|
||||
|
||||
}
|
||||
if (action==GET_ACTION || action==HELP_ACTION){
|
||||
os << "pattern \t cannot get" << std::endl;
|
||||
@ -4354,6 +4376,9 @@ string slsDetectorCommand::helpPattern(int narg, char *args[], int action) {
|
||||
os << "patwaittime0 \t returns the wait 0 waiting time in clock number " << std::endl;
|
||||
os << "patwaittime1 \t returns the wait 1 waiting time in clock number " << std::endl;
|
||||
os << "patwaittime2 \t returns the wait 2 waiting time in clock number " << std::endl;
|
||||
os << "adcinvert \t returns the adcinversion mask " << std::endl;
|
||||
|
||||
os << "adcdisable \t returns the adcdisable mask " << std::endl;
|
||||
|
||||
}
|
||||
return os.str();
|
||||
@ -4757,7 +4782,42 @@ string slsDetectorCommand::cmdPattern(int narg, char *args[], int action) {
|
||||
|
||||
os << myDet->setCTBPatWaitTime(2,-1);
|
||||
|
||||
} else if (cmd=="adcinvert") {
|
||||
if (action==PUT_ACTION) {
|
||||
|
||||
if (sscanf(args[1],"%x",&addr))
|
||||
;
|
||||
else
|
||||
return string("Could not scan adcinvert reg ")+string(args[1]);
|
||||
|
||||
|
||||
myDet->writeRegister(67,addr);
|
||||
}
|
||||
|
||||
|
||||
|
||||
os << hex << myDet->readRegister(67) << dec;
|
||||
|
||||
} else if (cmd=="adcdisable") {
|
||||
if (action==PUT_ACTION) {
|
||||
|
||||
if (sscanf(args[1],"%x",&addr))
|
||||
;
|
||||
else
|
||||
return string("Could not scan adcdisable reg ")+string(args[1]);
|
||||
|
||||
|
||||
myDet->writeRegister(94,addr);
|
||||
}
|
||||
|
||||
|
||||
|
||||
os << hex << myDet->readRegister(94) << dec;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
else return helpPattern(narg, args, action);
|
||||
|
||||
|
||||
|
||||
@ -786,118 +786,122 @@ int slsDetectorUtils::dumpDetectorSetup(string const fname, int level){
|
||||
slsDetectorCommand *cmd;
|
||||
string names[100];
|
||||
int nvar=0;
|
||||
int nvar1=0;
|
||||
|
||||
names[nvar++]="fname";
|
||||
names[nvar++]="index";
|
||||
names[nvar++]="dr";
|
||||
names[nvar++]="settings";
|
||||
names[nvar++]="exptime";
|
||||
names[nvar++]="period";
|
||||
names[nvar++]="frames";
|
||||
names[nvar++]="cycles";
|
||||
names[nvar++]="measurements";
|
||||
names[nvar++]="timing";
|
||||
|
||||
switch (getDetectorsType()) {
|
||||
case EIGER:
|
||||
names[nvar++]="fname";
|
||||
names[nvar++]="index";
|
||||
names[nvar++]="flags";
|
||||
names[nvar++]="dr";
|
||||
names[nvar++]="settings";
|
||||
names[nvar++]="threshold";
|
||||
names[nvar++]="exptime";
|
||||
names[nvar++]="period";
|
||||
names[nvar++]="frames";
|
||||
names[nvar++]="cycles";
|
||||
names[nvar++]="timing";
|
||||
names[nvar++]="fineoff";
|
||||
names[nvar++]="startscript";
|
||||
names[nvar++]="startscriptpar";
|
||||
names[nvar++]="stopscript";
|
||||
names[nvar++]="stopscriptpar";
|
||||
names[nvar++]="scriptbefore";
|
||||
names[nvar++]="scriptbeforepar";
|
||||
names[nvar++]="scriptafter";
|
||||
names[nvar++]="scriptafterpar";
|
||||
names[nvar++]="scan0script";
|
||||
names[nvar++]="scan0par";
|
||||
names[nvar++]="scan0prec";
|
||||
names[nvar++]="scan0steps";
|
||||
names[nvar++]="scan1script";
|
||||
names[nvar++]="scan1par";
|
||||
names[nvar++]="scan1prec";
|
||||
names[nvar++]="scan1steps";
|
||||
names[nvar++]="ratecorr";
|
||||
names[nvar++]="flatfield";
|
||||
names[nvar++]="badchannels";
|
||||
break;
|
||||
case GOTTHARD:
|
||||
names[nvar++]="fname";
|
||||
names[nvar++]="index";
|
||||
names[nvar++]="flags";
|
||||
names[nvar++]="dr";
|
||||
names[nvar++]="settings";
|
||||
names[nvar++]="exptime";
|
||||
names[nvar++]="period";
|
||||
names[nvar++]="delay";
|
||||
names[nvar++]="gates";
|
||||
names[nvar++]="frames";
|
||||
names[nvar++]="cycles";
|
||||
names[nvar++]="timing";
|
||||
names[nvar++]="fineoff";
|
||||
names[nvar++]="startscript";
|
||||
names[nvar++]="startscriptpar";
|
||||
names[nvar++]="stopscript";
|
||||
names[nvar++]="stopscriptpar";
|
||||
names[nvar++]="scriptbefore";
|
||||
names[nvar++]="scriptbeforepar";
|
||||
names[nvar++]="scriptafter";
|
||||
names[nvar++]="scriptafterpar";
|
||||
names[nvar++]="scan0script";
|
||||
names[nvar++]="scan0par";
|
||||
names[nvar++]="scan0prec";
|
||||
names[nvar++]="scan0steps";
|
||||
names[nvar++]="scan1script";
|
||||
names[nvar++]="scan1par";
|
||||
names[nvar++]="scan1prec";
|
||||
names[nvar++]="scan1steps";
|
||||
names[nvar++]="ratecorr";
|
||||
names[nvar++]="flatfield";
|
||||
names[nvar++]="badchannels";
|
||||
break;
|
||||
case MYTHEN:
|
||||
names[nvar++]="fname";
|
||||
names[nvar++]="index";
|
||||
names[nvar++]="flags";
|
||||
names[nvar++]="dr";
|
||||
names[nvar++]="settings";
|
||||
names[nvar++]="threshold";
|
||||
names[nvar++]="exptime";
|
||||
names[nvar++]="period";
|
||||
names[nvar++]="delay";
|
||||
names[nvar++]="gates";
|
||||
names[nvar++]="frames";
|
||||
names[nvar++]="cycles";
|
||||
names[nvar++]="probes";
|
||||
names[nvar++]="timing";
|
||||
names[nvar++]="fineoff";
|
||||
names[nvar++]="startscript";
|
||||
names[nvar++]="startscriptpar";
|
||||
names[nvar++]="stopscript";
|
||||
names[nvar++]="stopscriptpar";
|
||||
names[nvar++]="scriptbefore";
|
||||
names[nvar++]="scriptbeforepar";
|
||||
names[nvar++]="scriptafter";
|
||||
names[nvar++]="scriptafterpar";
|
||||
names[nvar++]="scan0script";
|
||||
names[nvar++]="scan0par";
|
||||
names[nvar++]="scan0prec";
|
||||
names[nvar++]="scan0steps";
|
||||
names[nvar++]="scan1script";
|
||||
names[nvar++]="scan1par";
|
||||
names[nvar++]="scan1prec";
|
||||
names[nvar++]="scan1steps";
|
||||
names[nvar++]="ratecorr";
|
||||
names[nvar++]="flatfield";
|
||||
names[nvar++]="badchannels";
|
||||
names[nvar++]="trimbits";
|
||||
break;
|
||||
case JUNGFRAUCTB:
|
||||
|
||||
names[nvar++]="dac:0";
|
||||
names[nvar++]="dac:1";
|
||||
names[nvar++]="dac:2";
|
||||
names[nvar++]="dac:3";
|
||||
names[nvar++]="dac:4";
|
||||
names[nvar++]="dac:5";
|
||||
names[nvar++]="dac:6";
|
||||
names[nvar++]="dac:7";
|
||||
names[nvar++]="dac:8";
|
||||
names[nvar++]="dac:9";
|
||||
names[nvar++]="dac:10";
|
||||
names[nvar++]="dac:11";
|
||||
names[nvar++]="dac:12";
|
||||
names[nvar++]="dac:13";
|
||||
names[nvar++]="dac:14";
|
||||
names[nvar++]="dac:15";
|
||||
names[nvar++]="adcvpp";
|
||||
|
||||
|
||||
|
||||
names[nvar++]="adcclk";
|
||||
names[nvar++]="clkdivider";
|
||||
names[nvar++]="adcphase";
|
||||
names[nvar++]="adcpipeline";
|
||||
names[nvar++]="adcinvert"; //
|
||||
names[nvar++]="adcdisable";
|
||||
names[nvar++]="patioctrl";
|
||||
names[nvar++]="patclkctrl";
|
||||
names[nvar++]="patlimits";
|
||||
names[nvar++]="patloop0";
|
||||
names[nvar++]="patnloop0";
|
||||
names[nvar++]="patwait0";
|
||||
names[nvar++]="patwaittime0";
|
||||
names[nvar++]="patloop1";
|
||||
names[nvar++]="patnloop1";
|
||||
names[nvar++]="patwait1";
|
||||
names[nvar++]="patwaittime1";
|
||||
names[nvar++]="patloop2";
|
||||
names[nvar++]="patnloop2";
|
||||
names[nvar++]="patwait2";
|
||||
names[nvar++]="patwaittime2";
|
||||
}
|
||||
|
||||
|
||||
|
||||
names[nvar++]="startscript";
|
||||
names[nvar++]="startscriptpar";
|
||||
names[nvar++]="stopscript";
|
||||
names[nvar++]="stopscriptpar";
|
||||
names[nvar++]="scriptbefore";
|
||||
names[nvar++]="scriptbeforepar";
|
||||
names[nvar++]="scriptafter";
|
||||
names[nvar++]="scriptafterpar";
|
||||
names[nvar++]="scan0script";
|
||||
names[nvar++]="scan0par";
|
||||
names[nvar++]="scan0prec";
|
||||
names[nvar++]="scan0steps";
|
||||
names[nvar++]="scan1script";
|
||||
names[nvar++]="scan1par";
|
||||
names[nvar++]="scan1prec";
|
||||
names[nvar++]="scan1steps";
|
||||
|
||||
switch (getDetectorsType()) {
|
||||
case EIGER:
|
||||
case MYTHEN:
|
||||
case GOTTHARD:
|
||||
names[nvar++]="flatfield";
|
||||
names[nvar++]="badchannels";
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
switch (getDetectorsType()) {
|
||||
case EIGER:
|
||||
case MYTHEN:
|
||||
names[nvar++]="trimbits";
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
// char ext[100];
|
||||
|
||||
@ -907,8 +911,8 @@ int slsDetectorUtils::dumpDetectorSetup(string const fname, int level){
|
||||
|
||||
|
||||
ofstream outfile;
|
||||
char *args[2];
|
||||
for (int ia=0; ia<2; ia++) {
|
||||
char *args[4];
|
||||
for (int ia=0; ia<4; ia++) {
|
||||
args[ia]=new char[1000];
|
||||
}
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user