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This commit is contained in:
maliakal_d
2021-10-19 14:49:43 +02:00
parent 3726ae3fd1
commit b39c64032d
66 changed files with 642 additions and 624 deletions
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20
slsDetectorServers/eigerDetectorServer/Beb.c
View File

@ -14,7 +14,6 @@ extern int isControlServer;
#define MAX(x, y) (((x) > (y)) ? (x) : (y))
struct LocalLinkInterface ll_beb_local, *ll_beb;
struct udp_header_type udp_header;
@ -47,7 +46,6 @@ int Beb_deactivated_left_datastream = 1;
int Beb_deactivated_right_datastream = 1;
int Beb_deactivated_num_destinations = 1;
void Beb_Beb() {
Beb_send_ndata = 0;
Beb_send_buffer_size = 1026;
@ -90,7 +88,9 @@ void Beb_Beb() {
void Beb_ClearHeaderData(int ten_gig) {
for (int i = 0; i < MAX_UDP_DESTINATION; ++i) {
if (!Beb_SetUpUDPHeader(i, ten_gig, 0, 0, 0, 0, 0, 0)) {
LOG(logERROR, ("Could not clear header data for entry %d (tengiga:%d)\n", i, ten_gig));
LOG(logERROR,
("Could not clear header data for entry %d (tengiga:%d)\n", i,
ten_gig));
}
}
}
@ -112,7 +112,8 @@ int Beb_SetUpUDPHeader(unsigned int header_number, int ten_gig,
else
bram_phy_addr = 0xC6001000;
if (!Beb_SetHeaderData(src_mac, src_ip, src_port, dst_mac, dst_ip, dst_port))
if (!Beb_SetHeaderData(src_mac, src_ip, src_port, dst_mac, dst_ip,
dst_port))
return 0;
int fd = Beb_open(&csp0base, bram_phy_addr);
@ -493,7 +494,7 @@ int Beb_SetDataStream(enum portPosition port, int enable) {
: XPAR_GPIO_RGHT_STRM_DSBL_MSK);
u_int32_t value = Beb_Read32(csp0base, reg);
// disabling in firmware
// disabling in firmware
if (!enable)
value |= mask;
else
@ -875,11 +876,12 @@ int Beb_StopAcquisition() {
return 1;
}
int Beb_RequestNImages(int ten_gig, unsigned int nimages, int test_just_send_out_packets_no_wait) {
int Beb_RequestNImages(int ten_gig, unsigned int nimages,
int test_just_send_out_packets_no_wait) {
if (!Beb_activated)
return 1;
unsigned int maxnl = MAX_ROWS_PER_READOUT;
unsigned int maxnl = MAX_ROWS_PER_READOUT;
unsigned int maxnp = (ten_gig ? 4 : 16) * Beb_bit_mode;
unsigned int nl = Beb_readNRows;
unsigned int npackets = (nl * maxnp) / maxnl;
@ -899,8 +901,8 @@ int Beb_RequestNImages(int ten_gig, unsigned int nimages, int test_just_send_out
LOG(logINFO, ("ten_gig:%d, npackets:%d, "
"Beb_bit_mode:%d, header_size:%d, nimages:%d, "
"test_just_send_out_packets_no_wait:%d\n",
ten_gig, npackets, Beb_bit_mode,
header_size, nimages, test_just_send_out_packets_no_wait));
ten_gig, npackets, Beb_bit_mode, header_size, nimages,
test_just_send_out_packets_no_wait));
u_int32_t right_port_value = 0x2000;
u_int32_t *csp0base = 0;

9
slsDetectorServers/eigerDetectorServer/FebControl.c
View File

@ -1143,7 +1143,8 @@ int Feb_Control_SoftwareTrigger(int block) {
// end of acquisition (cannot monitor readyForTrigger)
int status = Feb_Control_AcquisitionInProgress();
if (status == STATUS_ERROR) {
LOG(logERROR, ("Status: ERROR reading DAQ status register\n"));
LOG(logERROR,
("Status: ERROR reading DAQ status register\n"));
return 0;
} else if (status == STATUS_IDLE) {
break;
@ -1158,8 +1159,10 @@ int Feb_Control_SoftwareTrigger(int block) {
}
LOG(logDEBUG2, ("Done waiting (wait for trigger)!\n"));
}
LOG(logINFO, ("%s Software Trigger %s\n", (block ? "Blocking" : "Non blocking"), (block ? "Acquired" : "Sent")));
fflush(stdout);
LOG(logINFO,
("%s Software Trigger %s\n", (block ? "Blocking" : "Non blocking"),
(block ? "Acquired" : "Sent")));
fflush(stdout);
}
return 1;

2
slsDetectorServers/eigerDetectorServer/FebRegisterDefs.h
View File

@ -15,7 +15,7 @@
#define DAQ_REG_EXPOSURE_REPEAT_TIMER 5 // == (31 downto 3) * 10^(2 downto 0)
#define DAQ_REG_SUBFRAME_EXPOSURES 6
#define DAQ_REG_SUBFRAME_PERIOD 7 // also pg and fifo status register
#define DAQ_REG_READ_N_ROWS 8
#define DAQ_REG_READ_N_ROWS 8
#define DAQ_REG_HRDWRE 12
// clang-format off

1
slsDetectorServers/eigerDetectorServer/HardwareMMappingDefs.h
View File

@ -1,7 +1,6 @@
// SPDX-License-Identifier: LGPL-3.0-or-other
// Copyright (C) 2021 Contributors to the SLS Detector Package
// from Gerd and was called mmap_test.h
#ifndef __PLB_LL_FIFO_H__

42
slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c
View File

@ -692,7 +692,7 @@ void setupDetector() {
eiger_photonenergy = DEFAULT_PHOTON_ENERGY;
setParallelMode(DEFAULT_PARALLEL_MODE);
setOverFlowMode(DEFAULT_READOUT_OVERFLOW32_MODE);
setReadoutSpeed(DEFAULT_CLK_SPEED);
setReadoutSpeed(DEFAULT_CLK_SPEED);
setIODelay(DEFAULT_IO_DELAY);
setTiming(DEFAULT_TIMING_MODE);
setNextFrameNumber(DEFAULT_STARTING_FRAME_NUMBER);
@ -1544,13 +1544,13 @@ int configureMAC() {
LOG(logINFOBLUE, ("\tEntry %d\n", iRxEntry));
LOG(logINFO,
("\tSource IP : %s\n"
"\tSource MAC : %s\n"
"\tSource Port : %d\n"
"\tDest IP : %s\n"
"\tDest MAC : %s\n"
"\tDest Port : %d\n"
"\tDest Port2 : %d\n",
src_ip, src_mac, srcport, dst_ip, dst_mac, dstport, dstport2));
"\tSource MAC : %s\n"
"\tSource Port : %d\n"
"\tDest IP : %s\n"
"\tDest MAC : %s\n"
"\tDest Port : %d\n"
"\tDest Port2 : %d\n",
src_ip, src_mac, srcport, dst_ip, dst_mac, dstport, dstport2));
}
#ifdef VIRTUAL
@ -1730,7 +1730,7 @@ int setReadoutSpeed(int val) {
return OK;
}
int getReadoutSpeed(int* retval) {
int getReadoutSpeed(int *retval) {
*retval = eiger_readoutspeed;
return OK;
}
@ -2311,14 +2311,11 @@ void *start_timer(void *arg) {
int readNRows = getReadNRows();
if (readNRows == -1) {
LOG(logERROR,
("readNRows is -1. Assuming no readNRows.\n"));
LOG(logERROR, ("readNRows is -1. Assuming no readNRows.\n"));
readNRows = MAX_ROWS_PER_READOUT;
}
const int maxRows = MAX_ROWS_PER_READOUT;
const int packetsPerFrame =
(maxPacketsPerFrame * readNRows) / maxRows;
const int packetsPerFrame = (maxPacketsPerFrame * readNRows) / maxRows;
LOG(logDEBUG1,
(" dr:%d\n bytesperpixel:%f\n tgenable:%d\n datasize:%d\n "
@ -2358,19 +2355,16 @@ void *start_timer(void *arg) {
break;
case 16:
*((uint16_t *)(imageData + i * sizeof(uint16_t))) =
eiger_virtual_test_mode ? 0xFFE
: (uint16_t)pixelVal;
eiger_virtual_test_mode ? 0xFFE : (uint16_t)pixelVal;
break;
case 32:
*((uint32_t *)(imageData + i * sizeof(uint32_t))) =
eiger_virtual_test_mode ? 0xFFFFFE
: (uint32_t)pixelVal;
eiger_virtual_test_mode ? 0xFFFFFE : (uint32_t)pixelVal;
break;
default:
break;
}
}
}
// Send data
@ -2404,7 +2398,6 @@ void *start_timer(void *arg) {
const int startval = 0;
const int endval = startval + packetsPerFrame - 1;
// set header
char packetData[packetsize];
memset(packetData, 0, packetsize);
@ -2466,18 +2459,21 @@ void *start_timer(void *arg) {
}
}
}
if (eiger_virtual_left_datastream && i >= startval && i <= endval) {
if (eiger_virtual_left_datastream && i >= startval &&
i <= endval) {
usleep(eiger_virtual_transmission_delay_left);
sendUDPPacket(iRxEntry, 0, packetData, packetsize);
LOG(logDEBUG1, ("Sent left packet: %d\n", i));
}
if (eiger_virtual_right_datastream && i >= startval && i <= endval) {
if (eiger_virtual_right_datastream && i >= startval &&
i <= endval) {
usleep(eiger_virtual_transmission_delay_right);
sendUDPPacket(iRxEntry, 1, packetData2, packetsize);
LOG(logDEBUG1, ("Sent right packet: %d\n", i));
}
}
LOG(logINFO, ("Sent frame %d [#%ld] to E%d\n", iframes, frameNr + iframes, iRxEntry));
LOG(logINFO, ("Sent frame %d [#%ld] to E%d\n", iframes,
frameNr + iframes, iRxEntry));
clock_gettime(CLOCK_REALTIME, &end);
int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 +
(end.tv_nsec - begin.tv_nsec));

95
slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
View File

@ -296,7 +296,8 @@ int getModuleId(int *ret, char *mess) {
void setModuleId(int modid) {
LOG(logINFOBLUE, ("Setting module id in fpga: %d\n", modid))
bus_w(MOD_ID_REG, bus_r(MOD_ID_REG) & ~MOD_ID_MSK);
bus_w(MOD_ID_REG, bus_r(MOD_ID_REG) | ((modid << MOD_ID_OFST) & MOD_ID_MSK));
bus_w(MOD_ID_REG,
bus_r(MOD_ID_REG) | ((modid << MOD_ID_OFST) & MOD_ID_MSK));
}
u_int64_t getDetectorMAC() {
@ -1915,23 +1916,21 @@ int checkDetectorType() {
int type = atoi(buffer);
if (type > TYPE_NO_MODULE_STARTING_VAL) {
LOG(logERROR,
("No Module attached! Expected %d, %d or %d for Gotthard2, got %d\n",
TYPE_GOTTHARD2_MODULE_VAL,
TYPE_GOTTHARD2_25UM_MASTER_MODULE_VAL,
TYPE_GOTTHARD2_25UM_SLAVE_MODULE_VAL,
type));
("No Module attached! Expected %d, %d or %d for Gotthard2, got "
"%d\n",
TYPE_GOTTHARD2_MODULE_VAL, TYPE_GOTTHARD2_25UM_MASTER_MODULE_VAL,
TYPE_GOTTHARD2_25UM_SLAVE_MODULE_VAL, type));
return -2;
}
if ((abs(type - TYPE_GOTTHARD2_MODULE_VAL) > TYPE_TOLERANCE) &&
(abs(type - TYPE_GOTTHARD2_25UM_MASTER_MODULE_VAL) > TYPE_TOLERANCE) &&
(abs(type - TYPE_GOTTHARD2_25UM_SLAVE_MODULE_VAL) > TYPE_TOLERANCE)) {
(abs(type - TYPE_GOTTHARD2_25UM_MASTER_MODULE_VAL) > TYPE_TOLERANCE) &&
(abs(type - TYPE_GOTTHARD2_25UM_SLAVE_MODULE_VAL) > TYPE_TOLERANCE)) {
LOG(logERROR,
("Wrong Module attached! Expected %d, %d or %d for Gotthard2, got %d\n",
TYPE_GOTTHARD2_MODULE_VAL,
TYPE_GOTTHARD2_25UM_MASTER_MODULE_VAL,
TYPE_GOTTHARD2_25UM_SLAVE_MODULE_VAL,
type));
("Wrong Module attached! Expected %d, %d or %d for Gotthard2, got "
"%d\n",
TYPE_GOTTHARD2_MODULE_VAL, TYPE_GOTTHARD2_25UM_MASTER_MODULE_VAL,
TYPE_GOTTHARD2_25UM_SLAVE_MODULE_VAL, type));
return FAIL;
}
return OK;
@ -2088,52 +2087,52 @@ int getVCOFrequency(enum CLKINDEX ind) {
int setReadoutSpeed(int val) {
switch (val) {
case G2_108MHZ:
LOG(logINFOBLUE, ("Setting readout speed to 108 MHz\n"));
if (setClockDivider(READOUT_C0, SPEED_108_CLKDIV_0) == FAIL) {
return FAIL;
}
if (setClockDivider(READOUT_C1, SPEED_108_CLKDIV_1) == FAIL) {
return FAIL;
}
if (setPhase(READOUT_C1, SPEED_108_CLKPHASE_DEG_1, 1) == FAIL) {
return FAIL;
}
break;
case G2_144MHZ:
LOG(logINFOBLUE, ("Setting readout speed to 144 MHz\n"));
if (setClockDivider(READOUT_C0, SPEED_144_CLKDIV_0) == FAIL) {
return FAIL;
}
if (setClockDivider(READOUT_C1, SPEED_144_CLKDIV_1) == FAIL) {
return FAIL;
}
if (setPhase(READOUT_C1, SPEED_144_CLKPHASE_DEG_1, 1) == FAIL) {
return FAIL;
}
break;
default:
LOG(logERROR, ("Unknown readout speed %d\n", val));
case G2_108MHZ:
LOG(logINFOBLUE, ("Setting readout speed to 108 MHz\n"));
if (setClockDivider(READOUT_C0, SPEED_108_CLKDIV_0) == FAIL) {
return FAIL;
}
if (setClockDivider(READOUT_C1, SPEED_108_CLKDIV_1) == FAIL) {
return FAIL;
}
if (setPhase(READOUT_C1, SPEED_108_CLKPHASE_DEG_1, 1) == FAIL) {
return FAIL;
}
break;
case G2_144MHZ:
LOG(logINFOBLUE, ("Setting readout speed to 144 MHz\n"));
if (setClockDivider(READOUT_C0, SPEED_144_CLKDIV_0) == FAIL) {
return FAIL;
}
if (setClockDivider(READOUT_C1, SPEED_144_CLKDIV_1) == FAIL) {
return FAIL;
}
if (setPhase(READOUT_C1, SPEED_144_CLKPHASE_DEG_1, 1) == FAIL) {
return FAIL;
}
break;
default:
LOG(logERROR, ("Unknown readout speed %d\n", val));
return FAIL;
}
return OK;
}
int getReadoutSpeed(int* retval) {
//TODO ASIC and ADIFreg need to check????
// clkdiv 2, 3, 4, 5?
int getReadoutSpeed(int *retval) {
// TODO ASIC and ADIFreg need to check????
// clkdiv 2, 3, 4, 5?
if (clkDivider[READOUT_C0] == SPEED_108_CLKDIV_0 &&
clkDivider[READOUT_C1] == SPEED_108_CLKDIV_1 &&
getPhase(READOUT_C1, 1) == SPEED_108_CLKPHASE_DEG_1) {
clkDivider[READOUT_C1] == SPEED_108_CLKDIV_1 &&
getPhase(READOUT_C1, 1) == SPEED_108_CLKPHASE_DEG_1) {
*retval = G2_108MHZ;
}
else if (clkDivider[READOUT_C0] == SPEED_144_CLKDIV_0 &&
clkDivider[READOUT_C1] == SPEED_144_CLKDIV_1 &&
getPhase(READOUT_C1, 1) == SPEED_144_CLKPHASE_DEG_1) {
clkDivider[READOUT_C1] == SPEED_144_CLKDIV_1 &&
getPhase(READOUT_C1, 1) == SPEED_144_CLKPHASE_DEG_1) {
*retval = G2_144MHZ;
}
else {
*retval = -1;
return FAIL;
@ -2154,7 +2153,7 @@ int setClockDivider(enum CLKINDEX ind, int val) {
char *clock_names[] = {CLK_NAMES};
LOG(logINFOBLUE, ("Setting %s clock (%d) divider from %d to %d\n",
clock_names[ind], ind, clkDivider[ind], val));
clock_names[ind], ind, clkDivider[ind], val));
// Remembering old phases in degrees
int oldPhases[NUM_CLOCKS];

138
slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c
View File

@ -516,11 +516,11 @@ int resetToDefaultDacs(int hardReset) {
const int vals_G0[] = SPECIAL_DEFAULT_DYNAMIC_GAIN_VALS;
for (int i = 0; i < NSPECIALDACS; ++i) {
defaultDacValue_G0[i] = vals_G0[i];
}
}
const int vals_HG0[] = SPECIAL_DEFAULT_DYNAMICHG0_GAIN_VALS;
for (int i = 0; i < NSPECIALDACS; ++i) {
defaultDacValue_HG0[i] = vals_HG0[i];
}
}
}
// remember settings
@ -734,7 +734,9 @@ int readConfigFile() {
// version 1.1 and HW 1.0 (version reg value = 2) is incompatible
if (version == 11 && isHardwareVersion2()) {
strcpy(initErrorMessage,
"Chip version 1.1 (from on-board config file) is incompatible with old board (v1.0). Please update board or correct on-board config file.\n");
"Chip version 1.1 (from on-board config file) is "
"incompatible with old board (v1.0). Please update "
"board or correct on-board config file.\n");
break;
}
@ -1352,7 +1354,9 @@ int setNumberofDestinations(int value) {
LOG(logINFO, ("Setting number of entries to %d\n", value));
--value;
bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_RX_ADDTNL_ENDPTS_NUM_MSK);
bus_w(CONTROL_REG, bus_r(CONTROL_REG) | ((value << CONTROL_RX_ADDTNL_ENDPTS_NUM_OFST) & CONTROL_RX_ADDTNL_ENDPTS_NUM_MSK));
bus_w(CONTROL_REG,
bus_r(CONTROL_REG) | ((value << CONTROL_RX_ADDTNL_ENDPTS_NUM_OFST) &
CONTROL_RX_ADDTNL_ENDPTS_NUM_MSK));
return OK;
}
@ -1391,7 +1395,7 @@ int getPrimaryInterface() {
void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
uint64_t destmac, uint32_t destport, uint64_t sourcemac,
uint32_t sourceip, uint32_t sourceport) {
// start addr
uint32_t addr = (type == INNER ? RXR_ENDPOINT_INNER_START_REG
: RXR_ENDPOINT_OUTER_START_REG);
@ -1506,27 +1510,30 @@ int configureMAC() {
if (iRxEntry < numUdpDestinations) {
LOG(logINFOBLUE, ("\tEntry %d\n", iRxEntry));
LOG(logINFO, ("\tOuter %s\n", (numInterfaces == 2)
? "(Bottom)"
: (selInterface ? "Not Used" : "Used")));
LOG(logINFO,
("\tOuter %s\n", (numInterfaces == 2)
? "(Bottom)"
: (selInterface ? "Not Used" : "Used")));
LOG(logINFO, ("\tSource IP : %s\n"
"\tSource MAC : %s\n"
"\tSource Port : %d\n"
"\tDest IP : %s\n"
"\tDest MAC : %s\n"
"\tDest Port : %d\n\n",
src_ip, src_mac, srcport, dst_ip, dst_mac, dstport));
"\tSource MAC : %s\n"
"\tSource Port : %d\n"
"\tDest IP : %s\n"
"\tDest MAC : %s\n"
"\tDest Port : %d\n\n",
src_ip, src_mac, srcport, dst_ip, dst_mac, dstport));
LOG(logINFO, ("\tInner %s\n", (numInterfaces == 2)
? "(Top)"
: (selInterface ? "Used" : "Not Used")));
LOG(logINFO, ("\tSource IP2 : %s\n"
"\tSource MAC2 : %s\n"
"\tSource Port2: %d\n"
"\tDest IP2 : %s\n"
"\tDest MAC2 : %s\n"
"\tDest Port2 : %d\n\n",
src_ip2, src_mac2, srcport2, dst_ip2, dst_mac2, dstport2));
LOG(logINFO,
("\tInner %s\n", (numInterfaces == 2)
? "(Top)"
: (selInterface ? "Used" : "Not Used")));
LOG(logINFO,
("\tSource IP2 : %s\n"
"\tSource MAC2 : %s\n"
"\tSource Port2: %d\n"
"\tDest IP2 : %s\n"
"\tDest MAC2 : %s\n"
"\tDest Port2 : %d\n\n",
src_ip2, src_mac2, srcport2, dst_ip2, dst_mac2, dstport2));
}
#ifdef VIRTUAL
if (setUDPDestinationDetails(iRxEntry, 0, dst_ip, dstport) == FAIL) {
@ -1548,18 +1555,18 @@ int configureMAC() {
setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac, srcip,
srcport);
// top
setupHeader(iRxEntry, INNER, dstip2, dstmac2, dstport2, srcmac2, srcip2,
srcport2);
setupHeader(iRxEntry, INNER, dstip2, dstmac2, dstport2, srcmac2,
srcip2, srcport2);
}
// single interface
else {
// default
if (selInterface == 0) {
setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac, srcip,
srcport);
setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac,
srcip, srcport);
} else {
setupHeader(iRxEntry, INNER, dstip, dstmac, dstport, srcmac, srcip,
srcport2);
setupHeader(iRxEntry, INNER, dstip, dstmac, dstport, srcmac,
srcip, srcport2);
}
}
}
@ -1652,16 +1659,17 @@ int setReadNRows(int value) {
return FAIL;
}
// regval is numpackets - 1
// regval is numpackets - 1
int regval = (value / READ_N_ROWS_MULTIPLE) - 1;
uint32_t addr = READ_N_ROWS_REG;
LOG(logINFO, ("Setting number of rows: %d (regval:%d)\n", value, regval));
bus_w(addr, bus_r(addr) &~READ_N_ROWS_NUM_ROWS_MSK);
bus_w(addr, bus_r(addr) | ((regval << READ_N_ROWS_NUM_ROWS_OFST) & READ_N_ROWS_NUM_ROWS_MSK));
bus_w(addr, bus_r(addr) & ~READ_N_ROWS_NUM_ROWS_MSK);
bus_w(addr, bus_r(addr) | ((regval << READ_N_ROWS_NUM_ROWS_OFST) &
READ_N_ROWS_NUM_ROWS_MSK));
if (value == MAX_ROWS_PER_READOUT) {
LOG(logINFO, ("Disabling Partial Readout (#rows)\n"));
bus_w(addr, bus_r(addr) &~READ_N_ROWS_ENBL_MSK);
bus_w(addr, bus_r(addr) & ~READ_N_ROWS_ENBL_MSK);
} else {
LOG(logINFO, ("Enabling Partial Readout (#rows)\n"));
bus_w(addr, bus_r(addr) | READ_N_ROWS_ENBL_MSK);
@ -1671,14 +1679,15 @@ int setReadNRows(int value) {
int getReadNRows() {
int enable = (bus_r(READ_N_ROWS_REG) & READ_N_ROWS_ENBL_MSK);
int regval = ((bus_r(READ_N_ROWS_REG) & READ_N_ROWS_NUM_ROWS_MSK) >> READ_N_ROWS_NUM_ROWS_OFST);
int maxRegval = (MAX_ROWS_PER_READOUT/ READ_N_ROWS_MULTIPLE) - 1;
int regval = ((bus_r(READ_N_ROWS_REG) & READ_N_ROWS_NUM_ROWS_MSK) >>
READ_N_ROWS_NUM_ROWS_OFST);
int maxRegval = (MAX_ROWS_PER_READOUT / READ_N_ROWS_MULTIPLE) - 1;
if ((regval == maxRegval && enable) || (regval != maxRegval && !enable)) {
return -1;
}
return (regval + 1) * READ_N_ROWS_MULTIPLE;
return (regval + 1) * READ_N_ROWS_MULTIPLE;
}
void initReadoutConfiguration() {
@ -1724,13 +1733,13 @@ int powerChip(int on) {
LOG(logINFOBLUE, ("Powering chip: on\n"));
bus_w(CHIP_POWER_REG,
bus_r(CHIP_POWER_REG) | CHIP_POWER_ENABLE_MSK);
configureChip();
configureChip();
} else {
LOG(logINFOBLUE, ("Powering chip: off\n"));
bus_w(CHIP_POWER_REG,
bus_r(CHIP_POWER_REG) & ~CHIP_POWER_ENABLE_MSK);
chipConfigured = 0;
}
}
@ -1742,15 +1751,13 @@ int powerChip(int on) {
CHIP_POWER_STATUS_OFST);
}
int isChipConfigured() {
return chipConfigured;
}
int isChipConfigured() { return chipConfigured; }
void configureChip() {
// only for chipv1.1 and chip is powered on
if (getChipVersion() == 11 && powerChip(-1)) {
LOG(logINFOBLUE, ("\tConfiguring chip\n"));
// waiting 500 ms before configuring selection
usleep(500 * 1000);
@ -1766,12 +1773,11 @@ void configureChip() {
// write same register values back to configure chip
bus_w(CONFIG_V11_REG, bus_r(CONFIG_V11_REG));
LOG(logINFOBLUE, ("\tChip configured\n"));
LOG(logINFOBLUE, ("\tChip configured\n"));
chipConfigured = 1;
}
}
int autoCompDisable(int on) {
if (on != -1) {
if (on) {
@ -1922,7 +1928,7 @@ int setReadoutSpeed(int val) {
return OK;
}
int getReadoutSpeed(int* retval) {
int getReadoutSpeed(int *retval) {
u_int32_t speed = bus_r(CONFIG_REG) & CONFIG_READOUT_SPEED_MSK;
switch (speed) {
case CONFIG_FULL_SPEED_40MHZ_VAL:
@ -2191,7 +2197,8 @@ int getFilterCell() {
#else
uint32_t addr = CONFIG_V11_STATUS_REG;
#endif
uint32_t value = (bus_r(addr) & CONFIG_V11_FLTR_CLL_MSK) >> CONFIG_V11_FLTR_CLL_OFST;
uint32_t value =
(bus_r(addr) & CONFIG_V11_FLTR_CLL_MSK) >> CONFIG_V11_FLTR_CLL_OFST;
// count number of bits = which icell
return (__builtin_popcount(value));
}
@ -2202,7 +2209,7 @@ void setFilterCell(int iCell) {
}
uint32_t addr = CONFIG_V11_REG;
bus_w(addr, bus_r(addr) &~ CONFIG_V11_FLTR_CLL_MSK);
bus_w(addr, bus_r(addr) & ~CONFIG_V11_FLTR_CLL_MSK);
if (iCell > 0) {
// enables as many cells
@ -2210,9 +2217,11 @@ void setFilterCell(int iCell) {
for (int i = 0; i != iCell; ++i) {
value |= (1 << i);
}
bus_w(addr, bus_r(addr) | ((value << CONFIG_V11_FLTR_CLL_OFST) & CONFIG_V11_FLTR_CLL_MSK));
bus_w(addr, bus_r(addr) | ((value << CONFIG_V11_FLTR_CLL_OFST) &
CONFIG_V11_FLTR_CLL_MSK));
}
LOG(logINFO, ("Setting Filter Cell to %d [Reg:0x%x]\n", iCell, bus_r(addr)));
LOG(logINFO,
("Setting Filter Cell to %d [Reg:0x%x]\n", iCell, bus_r(addr)));
}
void disableCurrentSource() {
@ -2239,8 +2248,8 @@ void enableCurrentSource(int fix, uint64_t select, int normal) {
(long unsigned int)select));
} else {
LOG(logINFO,
("Enabling current source [fix:%d, select:%ld, normal:%d]\n",
fix, (long int)select, normal));
("Enabling current source [fix:%d, select:%ld, normal:%d]\n", fix,
(long int)select, normal));
}
// fix
if (fix) {
@ -2269,8 +2278,8 @@ void enableCurrentSource(int fix, uint64_t select, int normal) {
// push the bit into MSB side
inverted |= (bit << (63 - i));
}
LOG(logINFO, ("\tSetting selection to 0x%lx (inverted from 0x%lx)\n",
(long unsigned int) inverted, (long unsigned int)select));
LOG(logINFO, ("\tSetting selection to 0x%lx (inverted from 0x%lx)\n",
(long unsigned int)inverted, (long unsigned int)select));
set64BitReg(inverted, CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
// normal
@ -2326,7 +2335,8 @@ uint64_t getSelectCurrentSource() {
DAQ_CRRNT_SRC_CLMN_SLCT_OFST);
} else {
// invert the select
uint64_t retval = get64BitReg(CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
uint64_t retval =
get64BitReg(CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
uint64_t tmp = retval;
uint64_t inverted = 0;
@ -2335,8 +2345,8 @@ uint64_t getSelectCurrentSource() {
uint64_t bit = (tmp >> i) & 0x1;
// push the bit into MSB side
inverted |= (bit << (63 - i));
}
return inverted;
}
return inverted;
}
}
@ -2489,7 +2499,7 @@ void *start_timer(void *arg) {
for (int i = 0; i != maxPacketsPerFrame; ++i) {
const int startval =
(maxPacketsPerFrame / 2) - (packetsPerFrame / 2);
(maxPacketsPerFrame / 2) - (packetsPerFrame / 2);
const int endval = startval + packetsPerFrame - 1;
int pnum = i;
@ -2538,14 +2548,16 @@ void *start_timer(void *arg) {
memcpy(packetData2 + sizeof(sls_detector_header),
imageData + srcOffset2, dataSize);
srcOffset2 += dataSize;
if (i >= startval && i <= endval) {
sendUDPPacket(iRxEntry, 1, packetData2, packetsize);
LOG(logDEBUG1, ("Sent packet: %d [interface 1]\n", pnum));
LOG(logDEBUG1,
("Sent packet: %d [interface 1]\n", pnum));
}
}
}
LOG(logINFO, ("Sent frame %d [#%ld] to E%d\n", iframes, frameNr + iframes, iRxEntry));
LOG(logINFO, ("Sent frame %d [#%ld] to E%d\n", iframes,
frameNr + iframes, iRxEntry));
clock_gettime(CLOCK_REALTIME, &end);
int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 +
(end.tv_nsec - begin.tv_nsec));

1
slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c
View File

@ -1581,7 +1581,6 @@ int getADCPipeline() {
ADC_OFFSET_ADC_PPLN_OFST);
}
/* aquisition */
int startStateMachine() {

2
slsDetectorServers/mythen3DetectorServer/mythen3.c
View File

@ -92,7 +92,7 @@ patternParameters *setChipStatusRegisterPattern(int csr) {
for (int i = 0; i < 8; i++)
pat->word[iaddr++] = patword;
//#This version of the serializer pushes in the MSB first (compatible with
//the CSR bit numbering)
// the CSR bit numbering)
for (int ib = nbits - 1; ib >= 0; ib--) {
if (csr & (1 << ib))
patword = setBit(SIGNAL_serialIN, patword);

32
slsDetectorServers/mythen3DetectorServer/mythen3.h
View File

@ -33,25 +33,27 @@
#define SIGNAL_CHSclk (24)
#define SIGNAL_exposing (25)
//CHIP STARTUS REGISTER BITS
// CHIP STARTUS REGISTER BITS
#define CSR_spypads 0
#define CSR_invpol 4
#define CSR_dpulse 5
#define CSR_interp 6
#define CSR_invpol 4
#define CSR_dpulse 5
#define CSR_interp 6
#define _CSR_C10pre 7 //#default, negative polarity
#define CSR_pumprobe 8
#define CSR_apulse 9
#define CSR_C15sh 10
#define CSR_C30sh 11 //#default
#define CSR_C50sh 12
#define CSR_C225ACsh 13 // Connects 225fF SHAPER AC cap (1: 225 to shaper, 225 to GND. 0: 450 to shaper)
#define _CSR_C15pre 14 // negative polarity
#define CSR_pumprobe 8
#define CSR_apulse 9
#define CSR_C15sh 10
#define CSR_C30sh 11 //#default
#define CSR_C50sh 12
#define CSR_C225ACsh \
13 // Connects 225fF SHAPER AC cap (1: 225 to shaper, 225 to GND. 0: 450 to
// shaper)
#define _CSR_C15pre 14 // negative polarity
#define CSR_default (1<<_CSR_C10pre )|(1<< CSR_C30sh)
#define GAIN_MASK ((1 << _CSR_C10pre) | ( 1 << CSR_C15sh) | (1 << CSR_C30sh) | (1 << CSR_C50sh) | (1 << CSR_C225ACsh) | ( 1 << _CSR_C15pre))
#define CSR_default (1 << _CSR_C10pre) | (1 << CSR_C30sh)
#define GAIN_MASK \
((1 << _CSR_C10pre) | (1 << CSR_C15sh) | (1 << CSR_C30sh) | \
(1 << CSR_C50sh) | (1 << CSR_C225ACsh) | (1 << _CSR_C15pre))
int setBit(int ibit, int patword);
int clearBit(int ibit, int patword);

11
slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c
View File

@ -283,7 +283,6 @@ u_int32_t getDetectorNumber() {
return bus_r(MCB_SERIAL_NO_REG);
}
int getModuleId(int *ret, char *mess) {
return ((bus_r(MOD_ID_REG) & MOD_ID_MSK) >> MOD_ID_OFST);
}
@ -543,18 +542,18 @@ int resetToDefaultDacs(int hardReset) {
for (int i = 0; i < NDAC; ++i) {
defaultDacValues[i] = vals[i];
}
const int vals_standard[] = SPECIAL_DEFAULT_STANDARD_DAC_VALS;
const int vals_standard[] = SPECIAL_DEFAULT_STANDARD_DAC_VALS;
for (int i = 0; i < NSPECIALDACS; ++i) {
defaultDacValue_standard[i] = vals_standard[i];
}
}
const int vals_fast[] = SPECIAL_DEFAULT_FAST_DAC_VALS;
for (int i = 0; i < NSPECIALDACS; ++i) {
defaultDacValue_fast[i] = vals_fast[i];
}
const int vals_highgain[] = SPECIAL_DEFAULT_HIGHGAIN_DAC_VALS;
}
const int vals_highgain[] = SPECIAL_DEFAULT_HIGHGAIN_DAC_VALS;
for (int i = 0; i < NSPECIALDACS; ++i) {
defaultDacValue_highgain[i] = vals_highgain[i];
}
}
}
// remember settings

3
slsDetectorServers/slsDetectorServer/include/programFpgaNios.h
View File

@ -13,7 +13,8 @@ void NotifyServerStartSuccess();
/** reset fpga and controller(only implemented for >= v1.1 boards) */
void rebootControllerAndFPGA();
int eraseAndWriteToFlash(char *mess, char *checksum, char *fpgasrc, uint64_t fsize);
int eraseAndWriteToFlash(char *mess, char *checksum, char *fpgasrc,
uint64_t fsize);
int getDrive(char *mess);
int openFileForFlash(FILE **flashfd, char *mess);
int eraseFlash(char *mess);

6
slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h
View File

@ -473,7 +473,7 @@ int setComparatorDisableTime(int64_t val);
int64_t getComparatorDisableTime();
void configureASICTimer();
int setReadoutSpeed(int val);
int getReadoutSpeed(int* retval);
int getReadoutSpeed(int *retval);
int setPhase(enum CLKINDEX ind, int val, int degrees);
int getPhase(enum CLKINDEX ind, int degrees);
int getMaxPhase(enum CLKINDEX ind);
@ -498,7 +498,7 @@ uint64_t getSelectCurrentSource();
// eiger specific - iodelay, pulse, rate, temp, activate, delay nw parameter
#elif EIGERD
int setReadoutSpeed(int val);
int getReadoutSpeed(int* retval);
int getReadoutSpeed(int *retval);
int setIODelay(int val);
int setCounterBit(int val);
int pulsePixel(int n, int x, int y);
@ -551,7 +551,7 @@ int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval);
int getFrequency(enum CLKINDEX ind);
int getVCOFrequency(enum CLKINDEX ind);
int setReadoutSpeed(int val);
int getReadoutSpeed(int* retval);
int getReadoutSpeed(int *retval);
int getMaxClockDivider();
int setClockDivider(enum CLKINDEX ind, int val);
int getClockDivider(enum CLKINDEX ind);

4
slsDetectorServers/slsDetectorServer/src/common.c
View File

@ -9,7 +9,6 @@
#include <string.h>
#include <unistd.h> // readlink
int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin,
int outputMax, int inputValue, int *outputValue) {
LOG(logDEBUG1, (" Input Value: %d (Input:(%d - %d), Output:(%d - %d))\n",
@ -245,7 +244,8 @@ int verifyChecksumFromFlash(char *mess, char *clientChecksum, char *fname,
// read only until a particular size (drive)
if (fsize != 0 && totalBytesRead >= fsize) {
LOG(logINFO, ("\tReached %lu bytes. Not reading more\n", totalBytesRead));
LOG(logINFO,
("\tReached %lu bytes. Not reading more\n", totalBytesRead));
break;
}
bytes = fread(buf, 1, readUnitSize, fp);

73
slsDetectorServers/slsDetectorServer/src/communication_funcs_UDP.c
View File

@ -30,8 +30,9 @@ void setupUDPCommParameters() {
memset(udpDestinationIp, 0, sizeof(udpDestinationIp));
}
int getUdPSocketDescriptor(int iRxEntry, int index) { return udpSockfd[iRxEntry][index]; }
int getUdPSocketDescriptor(int iRxEntry, int index) {
return udpSockfd[iRxEntry][index];
}
int setUDPDestinationDetails(int iRxEntry, int index, const char *ip,
unsigned short int port) {
@ -62,16 +63,20 @@ int setUDPDestinationDetails(int iRxEntry, int index, const char *ip,
int err = getaddrinfo(udpDestinationIp[iRxEntry][index], sport, &hints,
&udpServerAddrInfo[iRxEntry][index]);
if (err != 0) {
LOG(logERROR, ("Failed to resolve remote socket address %s at port %d [entry:%d]. "
LOG(logERROR, ("Failed to resolve remote socket address %s at port %d "
"[entry:%d]. "
"(Error code:%d, %s)\n",
udpDestinationIp[iRxEntry][index], udpDestinationPort[iRxEntry][index], iRxEntry, err,
udpDestinationIp[iRxEntry][index],
udpDestinationPort[iRxEntry][index], iRxEntry, err,
gai_strerror(err)));
return FAIL;
}
if (udpServerAddrInfo[iRxEntry][index] == NULL) {
LOG(logERROR, ("Failed to resolve remote socket address %s at port %d [entry:%d]."
"(getaddrinfo returned NULL)\n",
udpDestinationIp[iRxEntry][index], udpDestinationPort[iRxEntry][index], iRxEntry));
LOG(logERROR,
("Failed to resolve remote socket address %s at port %d [entry:%d]."
"(getaddrinfo returned NULL)\n",
udpDestinationIp[iRxEntry][index],
udpDestinationPort[iRxEntry][index], iRxEntry));
udpServerAddrInfo[iRxEntry][index] = 0;
return FAIL;
}
@ -80,41 +85,51 @@ int setUDPDestinationDetails(int iRxEntry, int index, const char *ip,
}
int createUDPSocket(int index) {
for (int iRxEntry = 0; iRxEntry != numUdpDestinations; ++iRxEntry) {
LOG(logDEBUG2, ("Creating UDP Socket %d [entry:%d]\n", index, iRxEntry));
LOG(logDEBUG2,
("Creating UDP Socket %d [entry:%d]\n", index, iRxEntry));
if (!strlen(udpDestinationIp[iRxEntry][index])) {
LOG(logERROR, ("No destination UDP ip specified for socket %d [entry:%d].\n", index, iRxEntry));
LOG(logERROR,
("No destination UDP ip specified for socket %d [entry:%d].\n",
index, iRxEntry));
return FAIL;
}
if (udpSockfd[iRxEntry][index] != -1) {
LOG(logERROR, ("Strange that Udp socket was still open [socket:%d, entry:%d]. Closing it to "
"create a new one.\n", index, iRxEntry));
LOG(logERROR, ("Strange that Udp socket was still open [socket:%d, "
"entry:%d]. Closing it to "
"create a new one.\n",
index, iRxEntry));
close(udpSockfd[iRxEntry][index]);
udpSockfd[iRxEntry][index] = -1;
}
// Creating socket file descriptor
udpSockfd[iRxEntry][index] = socket(udpServerAddrInfo[iRxEntry][index]->ai_family,
udpServerAddrInfo[iRxEntry][index]->ai_socktype,
udpServerAddrInfo[iRxEntry][index]->ai_protocol);
udpSockfd[iRxEntry][index] =
socket(udpServerAddrInfo[iRxEntry][index]->ai_family,
udpServerAddrInfo[iRxEntry][index]->ai_socktype,
udpServerAddrInfo[iRxEntry][index]->ai_protocol);
if (udpSockfd[iRxEntry][index] == -1) {
LOG(logERROR, ("UDP socket at port %d failed [entry:%d]. (Error code:%d, %s)\n",
udpDestinationPort[iRxEntry][index], iRxEntry, errno, gai_strerror(errno)));
LOG(logERROR, ("UDP socket at port %d failed [entry:%d]. (Error "
"code:%d, %s)\n",
udpDestinationPort[iRxEntry][index], iRxEntry, errno,
gai_strerror(errno)));
return FAIL;
}
LOG(logINFO, ("Udp client socket created for server (entry:%d, port %d, ip:%s)\n",
iRxEntry, udpDestinationPort[iRxEntry][index], udpDestinationIp[iRxEntry][index]));
// Using connect expects that the receiver (udp server) exists to listen to
// these packets connecting allows to use "send/write" instead of "sendto",
// avoiding checking for server address for each packet using write without
// a connect will end in segv
LOG(logINFO, ("Udp client socket connected [%d, %d, %s]\n", iRxEntry, udpDestinationPort[iRxEntry][index],
udpDestinationIp[iRxEntry][index]));
LOG(logINFO, ("Udp client socket created for server (entry:%d, port "
"%d, ip:%s)\n",
iRxEntry, udpDestinationPort[iRxEntry][index],
udpDestinationIp[iRxEntry][index]));
// Using connect expects that the receiver (udp server) exists to listen
// to these packets connecting allows to use "send/write" instead of
// "sendto", avoiding checking for server address for each packet using
// write without a connect will end in segv
LOG(logINFO, ("Udp client socket connected [%d, %d, %s]\n", iRxEntry,
udpDestinationPort[iRxEntry][index],
udpDestinationIp[iRxEntry][index]));
}
return OK;
}
@ -125,9 +140,9 @@ int sendUDPPacket(int iRxEntry, int index, const char *buf, int length) {
udpServerAddrInfo[iRxEntry][index]->ai_addrlen);
// udp sends atomically, no need to handle partial data
if (n == -1) {
LOG(logERROR,
("Could not send udp packet for socket %d [entry:%d]. (Error code:%d, %s)\n",
index, iRxEntry, errno, gai_strerror(errno)));
LOG(logERROR, ("Could not send udp packet for socket %d [entry:%d]. "
"(Error code:%d, %s)\n",
index, iRxEntry, errno, gai_strerror(errno)));
} else {
LOG(logDEBUG2, ("%d bytes sent\n", n));
}