detectors/slsDetectorPackage
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updated max1932, modified ltc2620

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This commit is contained in:
maliakal_d
2019-01-09 17:41:10 +01:00
parent 81a49babda
commit b1570bde9c
14 changed files with 257 additions and 469 deletions
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28
slsDetectorServers/moenchDetectorServer/slsDetectorServer_defs.h
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@ -36,13 +36,7 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
#define NCHAN_ANALOG (32)
#define NCHAN_DIGITAL (4)
#define NCHIP (1)
#define NDAC (24)
#define NPWR (6)
#define NDAC_ONLY (NDAC - NPWR)
//#define N_DAC (24)
//#define N_PWR (5)
//#define NADC (9)
//#define DAC_CMD_OFF 20
#define NDAC (8)
#define DYNAMIC_RANGE (16)
#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8)
#define CLK_FREQ (156.25) /* MHz */
@ -65,29 +59,27 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
#define DEFAULT_TX_UDP_PORT (0x7e9a)
#define HIGHVOLTAGE_MIN (60)
#define HIGHVOLTAGE_MAX (200)
#define DAC_MIN_MV (0)
#define DAC_MAX_MV (2500)
/* Defines in the Firmware */
#define WAIT_TME_US_FR_LK_AT_ME_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
#define WAIT_TIME_US_PLL (10 * 1000)
#define WAIT_TIME_US_STP_ACQ (100)
#define WAIT_TIME_CONFIGURE_MAC (500 * 1000)
#define DAC_MAX_VOLTAGE_MV (2500)
#define VCHIP_MAX_MV (2700)
#define VCHIP_MIN_MV (1700)
#define POWER_RGLTR_MAX (2500)
#define POWER_RGLTR_MIN (600)
#define VCHIP_POWER_INCRMNT (200)
/* MSB & LSB DEFINES */
#define MSB_OF_64_BIT_REG_OFST (32)
#define LSB_OF_64_BIT_REG_OFST (0)
#define BIT_32_MSK (0xFFFFFFFF)
#define IP_PACKETSIZE (0x2032)
#define ADC_PORT_INVERT_VAL (0x453b2593) //FIXME: a default value?
#define MAXIMUM_ADC_CLK (40)
#define PLL_VCO_FREQ_MHZ (400)
/* MSB & LSB DEFINES */
#define MSB_OF_64_BIT_REG_OFST (32)
#define LSB_OF_64_BIT_REG_OFST (0)
#define BIT_32_MSK (0xFFFFFFFF)
/** PLL Reconfiguration Registers */
//https://www.altera.com/documentation/mcn1424769382940.html
#define PLL_MODE_REG (0x00)