mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-19 16:27:13 +02:00
updated max1932, modified ltc2620
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1
slsDetectorServers/ctbDetectorServer/common.h
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1
slsDetectorServers/ctbDetectorServer/common.h
Symbolic link
@ -0,0 +1 @@
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../slsDetectorServer/common.h
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@ -473,40 +473,42 @@ void setupDetector() {
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now_ptr = 0;
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resetPLL();
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resetCore();
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resetPeripheral();
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cleanFifos();
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resetPLL();
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resetCore();
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resetPeripheral();
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cleanFifos();
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// set spi defines
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AD7689_SetDefines(ADC_SPI_REG, ADC_SPI_SLOW_VAL_REG, ADC_SPI_SLOW_SRL_CNV_MSK, ADC_SPI_SLOW_SRL_CLK_MSK, ADC_SPI_SLOW_SRL_DT_MSK, ADC_SPI_SLOW_SRL_DT_OFST);
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AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST);
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LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MAX_VOLTAGE_MV);
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MAX1932_SetDefines(SPI_REG, SPI_HV_SRL_CS_OTPT_MSK, SPI_HV_SRL_CLK_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_OFST);
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// hv
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MAX1932_SetDefines(SPI_REG, SPI_HV_SRL_CS_OTPT_MSK, SPI_HV_SRL_CLK_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_OFST, HIGHVOLTAGE_MIN, HIGHVOLTAGE_MAX);
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MAX1932_Disable();
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setHighVoltage(DEFAULT_HIGH_VOLTAGE);
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// disable spi
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AD7689_Disable();
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AD9257_Disable();
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LTC2620_Disable();
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MAX1932_Disable();
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#ifndef VIRTUAL
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// adcs
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AD9257_Configure();
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// slow adcs
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AD7689_Configure();
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// I2C
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INA226_ConfigureI2CCore();
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INA226_CalibrateCurrentRegister(I2C_POWER_VIO_DEVICE_ID);
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// power regulators
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// I2C
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INA226_ConfigureI2CCore();
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INA226_CalibrateCurrentRegister(I2C_POWER_VIO_DEVICE_ID);
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INA226_CalibrateCurrentRegister(I2C_POWER_VA_DEVICE_ID);
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INA226_CalibrateCurrentRegister(I2C_POWER_VB_DEVICE_ID);
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INA226_CalibrateCurrentRegister(I2C_POWER_VC_DEVICE_ID);
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INA226_CalibrateCurrentRegister(I2C_POWER_VD_DEVICE_ID);
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// dacs
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LTC2620_Configure();
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#endif
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// switch off power regulators
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// switch off
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powerChip(0);
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setvchip(VCHIP_MIN_MV);
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// adcs
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AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST);
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AD9257_Disable();
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AD9257_Configure();
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// slow adcs
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AD7689_SetDefines(ADC_SPI_REG, ADC_SPI_SLOW_VAL_REG, ADC_SPI_SLOW_SRL_CNV_MSK, ADC_SPI_SLOW_SRL_CLK_MSK, ADC_SPI_SLOW_SRL_DT_MSK, ADC_SPI_SLOW_SRL_DT_OFST);
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AD7689_Disable();
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AD7689_Configure();
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// dacs
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LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, DAC_MAX_MV);
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LTC2620_Disable();
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LTC2620_Configure();
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//FIXME:
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// switch off dacs (power regulators most likely only sets to minimum (if power enable on))
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{
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@ -517,8 +519,6 @@ void setupDetector() {
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}
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bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL);//FIXME: got from moench config file
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setvchip(VCHIP_MIN_MV);
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setHighVoltage(DEFAULT_HIGH_VOLTAGE);
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FILE_LOG(logINFOBLUE, ("Setting Default parameters\n"));
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cleanFifos(); // FIXME: why twice?
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@ -1031,9 +1031,6 @@ int validateTimer(enum timerIndex ind, int64_t val, int64_t retval) {
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/* parameters - dac, adc, hv */
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int getMaxDacSteps() {
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}
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void setDAC(enum DACINDEX ind, int val, int mV) {
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if (val < 0)
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@ -1042,8 +1039,13 @@ void setDAC(enum DACINDEX ind, int val, int mV) {
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FILE_LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, (mV ? "mV" : "dac units")));
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int dacval = val;
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#ifdef VIRTUAL
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if (mV && LTC2620_VoltageToDac(val, &dacval) == OK)
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if (!mV) {
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dacValues[ind] = val;
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}
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// convert to dac units
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else if (LTC2620_VoltageToDac(val, &dacval) == OK) {
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dacValues[ind] = dacval;
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}
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#else
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if (LTC2620_SetDACValue((int)ind, val, mV, &dacval) == OK)
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dacValues[ind] = dacval;
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@ -1104,7 +1106,9 @@ int getVchip() {
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if (dacValues[D_PWR_CHIP] == -1 || dacValues[D_PWR_CHIP] == LTC2620_PWR_DOWN_VAL)
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return dacValues[D_PWR_CHIP];
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int voltage = -1;
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Common_DacToVoltage(dacValues[D_PWR_CHIP], &voltage, VCHIP_MIN_MV, VCHIP_MAX_MV, LTC2620_MAX_STEPS);
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// dac to voltage
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ConvertToDifferentRange(LTC2620_MIN_VAL, LTC2620_MAX_VAL, VCHIP_MIN_MV, VCHIP_MAX_MV,
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dacValues[D_PWR_CHIP], &voltage);
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return voltage;
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}
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@ -1117,8 +1121,9 @@ void setVchip(int val) {
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// validate & convert it to dac
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if (val != LTC2620_PWR_DOWN_VAL) {
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// convert it to dac
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if (Common_VoltageToDac(val, &dacval, VCHIP_MIN_MV, VCHIP_MAX_MV, LTC2620_MAX_STEPS) == FAIL) {
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// convert voltage to dac
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if (ConvertToDifferentRange(VCHIP_MIN_MV, VCHIP_MAX_MV, LTC2620_MIN_VAL, LTC2620_MAX_VAL,
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val, &dacval) == FAIL) {
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FILE_LOG(logERROR, ("\tVChip %d mV invalid. Is not between %d and %d mV\n", val, VCHIP_MIN_MV, VCHIP_MAX_MV));
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return;
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}
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@ -1246,8 +1251,9 @@ int getPower(enum DACINDEX ind) {
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return -1;
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}
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// voltage value
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Common_DacToVoltage(dacValues[ind], &retval, POWER_RGLTR_MIN, (getVchip() - VCHIP_POWER_INCRMNT), LTC2620_MAX_STEPS);
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// convert dac to voltage
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ConvertToDifferentRange(LTC2620_MIN_VAL, LTC2620_MAX_VAL, POWER_RGLTR_MIN, (getVchip() - VCHIP_POWER_INCRMNT),
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dacValues[ind], &retval);
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return retval;
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}
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@ -1290,9 +1296,11 @@ void setPower(enum DACINDEX ind, int val) {
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// convert it to dac
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if (val != LTC2620_PWR_DOWN_VAL) {
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// convert it to dac
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if (Common_VoltageToDac(val, &dacval, POWER_RGLTR_MIN, vchip - VCHIP_POWER_INCRMNT, LTC2620_MAX_STEPS) == FAIL) {
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FILE_LOG(logERROR, ("\tPower index %d of value %d mV invalid. Is not between %d and %d mV\n", ind, val, POWER_RGLTR_MIN, vchip - VCHIP_POWER_INCRMNT));
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// convert voltage to dac
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if (ConvertToDifferentRange(POWER_RGLTR_MIN, vchip - VCHIP_POWER_INCRMNT, LTC2620_MIN_VAL, LTC2620_MAX_VAL,
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val, &dacval) == FAIL) {
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FILE_LOG(logERROR, ("\tPower index %d of value %d mV invalid. Is not between %d and %d mV\n",
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ind, val, POWER_RGLTR_MIN, vchip - VCHIP_POWER_INCRMNT));
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return;
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}
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@ -1352,30 +1360,16 @@ int setHighVoltage(int val){
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highvoltage = val;
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return highvoltage;
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#endif
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uint32_t dacvalue;
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float alpha = 0.55;
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// setting hv
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if (val >= 0) {
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// limit values
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if (val < 60) {
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dacvalue = 0;
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val = 0;
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} else if (val >= 200) {
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dacvalue = 0x1;
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val = 200;
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} else {
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dacvalue = 1. + (200.-val) / alpha;
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val = 200.-(dacvalue-1)*alpha;
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}
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FILE_LOG(logINFO, ("Setting High voltage: %d (dacval %d)\n",val, dacvalue));
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dacvalue &= MAX1932_HV_DATA_MSK;
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FILE_LOG(logINFO, ("Setting High voltage: %d V", val));
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uint32_t addr = POWER_REG;
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// switch off high voltage
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bus_w(addr, bus_r(addr) & (~POWER_HV_SLCT_MSK));
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serializeToSPI(SPI_REG, dacvalue, HV_SERIAL_CS_OUT_MSK, MAX1932_HV_NUMBITS,
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HV_SERIAL_CLK_OUT_MSK, HV_SERIAL_DIGITAL_OUT_MSK, HV_SERIAL_DIGITAL_OUT_OFST);
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MAX1932_Set(val);
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// switch on high voltage if val > 0
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if (val > 0)
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@ -39,10 +39,6 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
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#define NDAC (24)
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#define NPWR (6)
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#define NDAC_ONLY (NDAC - NPWR)
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//#define N_DAC (24)
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//#define N_PWR (5)
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//#define NADC (9)
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//#define DAC_CMD_OFF 20
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#define DYNAMIC_RANGE (16)
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#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8)
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#define CLK_FREQ (156.25) /* MHz */
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@ -65,29 +61,32 @@ enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
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#define DEFAULT_TIMING_MODE (AUTO_TIMING)
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#define DEFAULT_TX_UDP_PORT (0x7e9a)
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/* Defines in the Firmware */
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#define WAIT_TME_US_FR_LK_AT_ME_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
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#define WAIT_TIME_US_PLL (10 * 1000)
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#define WAIT_TIME_US_STP_ACQ (100)
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#define WAIT_TIME_CONFIGURE_MAC (500 * 1000)
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#define DAC_MAX_VOLTAGE_MV (2500)
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#define HIGHVOLTAGE_MIN (60)
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#define HIGHVOLTAGE_MAX (200)
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#define DAC_MIN_MV (0)
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#define DAC_MAX_MV (2500)
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#define VCHIP_MAX_MV (2700)
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#define VCHIP_MIN_MV (1700)
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#define POWER_RGLTR_MAX (2500)
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#define POWER_RGLTR_MIN (600)
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#define VCHIP_POWER_INCRMNT (200)
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#define IP_PACKETSIZE (0x2032)
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#define ADC_PORT_INVERT_VAL (0x453b2593)
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#define MAXIMUM_ADC_CLK (40)
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#define PLL_VCO_FREQ_MHZ (400)
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/* Defines in the Firmware */
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#define WAIT_TME_US_FR_LK_AT_ME_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo
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#define WAIT_TIME_US_PLL (10 * 1000)
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#define WAIT_TIME_US_STP_ACQ (100)
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#define WAIT_TIME_CONFIGURE_MAC (500 * 1000)
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/* MSB & LSB DEFINES */
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#define MSB_OF_64_BIT_REG_OFST (32)
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#define LSB_OF_64_BIT_REG_OFST (0)
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#define BIT_32_MSK (0xFFFFFFFF)
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#define IP_PACKETSIZE (0x2032)
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#define ADC_PORT_INVERT_VAL (0x453b2593)
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#define MAXIMUM_ADC_CLK (40)
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#define PLL_VCO_FREQ_MHZ (400)
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/** PLL Reconfiguration Registers */
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//https://www.altera.com/documentation/mcn1424769382940.html
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#define PLL_MODE_REG (0x00)
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