Merge branch 'developer' of github.com:slsdetectorgroup/slsDetectorPackage into developer

RELEASE.txt

@@ -98,6 +98,7 @@ This document describes the differences between v7.0.0 and v6.x.x
 - ctb and moench Fw fixed (to work with pattern commdand) )addreess length
 - setting rx_hostname (or udp_dstip with rx_hostname not none) will always set udp_dstmac. solves problem of chaing udp_dstip and udp_dstmac stays the same
 - jungfrau reset core and usleep removed (fix for 6.1.1 is now fixed in firmware)
+- m3 clock update, m3 clk 4 and 5 cannot be set
 - g2 change clkdivs 2 3 4 to defaults for burst and cw mode.
 - ctb and moench: allowing 1g non blocking acquire to send data
 - m3 and g2 rr
@@ -106,6 +107,15 @@ This document describes the differences between v7.0.0 and v6.x.x
 - ctb, moench, jungfrau (pll reset at start fixed, before no defines)
 - pybind built into package, no need to update submodule when previous release had different pybind version
 - adcvpp moved from dac.. and api added (ctb, moench)
+- eiger (removed feb reset in stop acquisition as it caused processing bit to randomly not go high (leads to infinite loop waiting for it to go high). This is anyway done at prepare acquisition and set trimbits.
+    - left AND right registers monitored for processing bit done
+    - febProcessinginprogress returns STATUS_IDLE and not IDLE
+    - In feb stop acquisition, if processing bit is running forever, checks for 1 s, then if acq done bit is high, returns ok, else throws
+    - feb stop acquisition returns 1 if success and fucntion in list calling it compares properly instead of STATUS_IDLE (no effect, but incorrect logic)
+    - chipsignals to trimquad should only monitor right fpga (not both as it will throw)
+    - fixed error messages of readregister inconsistent values
+    - setmodule and read frame was returning fail without setting error messages (leading to broken tcp connection due to no error message)  ) 
+-
 
 2. Resolved Issues
 ==================

docs/src/installation.rst

@@ -27,13 +27,18 @@ Build from source using CMake
 ---------------------------------
 
 Note that on some systems, for example RH7,  cmake v3+ is available under the cmake3 alias.
-It is also required to clone with the option --recursive to get the git submodules used
+It is also required to clone with the option --recursive to get the pybind11 submodules used
-in the package. 
+in the package. (Only needed for older versions than v7.0.0)
 
 
 .. code-block:: bash
 
     git clone --recursive https://github.com/slsdetectorgroup/slsDetectorPackage.git
+    
+    # if older than v7.0.0 and using python, update pybind11 submodules
+    cd slsDetectorPackage
+    git submodule update --init
+
     mkdir build && cd build
     cmake ../slsDetectorPackage -DCMAKE_INSTALL_PREFIX=/your/install/path
     make -j12 #or whatever number of cores you are using to build
@@ -55,27 +60,29 @@ These are mainly aimed at those not familiar with using ccmake and cmake.
 
     The binaries are generated in slsDetectorPackage/build/bin directory.
 
-    Usage: $0 [-c] [-b] [-p] [e] [t] [r] [g] [s] [u] [i] [m] [n] [-h] [z] [-d <HDF5 directory>] [-l Install directory] [-k <CMake command>] [-j <Number of threads>]
+    Usage: ./cmk.sh [-b] [-c] [-d <HDF5 directory>] [e] [g] [-h] [i] [-j <Number of threads>] [-k <CMake command>] [-l <Install directory>] [m] [n] [-p] [-q <Zmq hint directory>] [r] [s] [t] [u] [z]  
     -[no option]: only make
-    -c: Clean
     -b: Builds/Rebuilds CMake files normal mode
-    -p: Builds/Rebuilds Python API
+    -c: Clean
-    -h: Builds/Rebuilds Cmake files with HDF5 package
     -d: HDF5 Custom Directory
+    -e: Debug mode
+    -g: Build/Rebuilds only gui
+    -h: Builds/Rebuilds Cmake files with HDF5 package
+    -i: Builds tests
+    -j: Number of threads to compile through
     -k: CMake command
     -l: Install directory
-    -t: Build/Rebuilds only text client
-    -r: Build/Rebuilds only receiver
-    -g: Build/Rebuilds only gui
-    -s: Simulator
-    -u: Chip Test Gui
-    -j: Number of threads to compile through
-    -e: Debug mode
-    -i: Builds tests
     -m: Manuals
     -n: Manuals without compiling doxygen (only rst)
+    -p: Builds/Rebuilds Python API
+    -q: Zmq hint directory
+    -r: Build/Rebuilds only receiver
+    -s: Simulator
+    -t: Build/Rebuilds only text client
+    -u: Chip Test Gui
     -z: Moench zmq processor
 
+    
     # get all options
     ./cmk.sh -?
 

docs/src/pygettingstarted.rst

@@ -17,6 +17,22 @@ environments.
 .. warning ::
 
     If you use conda avoid also installing packages with pip. 
+---------------------
+PYBIND11 
+---------------------
+**v7.0.0 of slsDetectorPackage:**
+
+#. It is packaged into libs (pybind)
+#. No longer a submodule of the slsDetectorPackage
+
+**Older than v7.0.0:**
+
+#. Submodule in libs (pybind11)
+#. Switching between versions will require an update of the submodule as well using:
+
+.. code-block:: bash
+
+    git submodule update --init  #from the main slsDetectorPackage folder
 
 ---------------------
 PYTHONPATH 

docs/src/troubleshooting.rst

@@ -144,6 +144,30 @@ Receiver PC Tuning Options
         | xth1 is example interface name. 
         | These settings are lost at pc reboot.
 
+#. Disable CPU frequency scaling and set system to performance 
+    * Check current policy (default might be powersave or schedutil)
+        .. code-block:: bash
+            
+            # check current active governor and range of cpu freq policy
+            cpupower frequency-info --policy
+            # list all available governors for this kernel
+            cpupower frequency-info --governors  
+
+    * Temporarily (until shut down)
+        .. code-block:: bash
+            
+            # set to performance
+            sudo cpupower frequency-set -g performance
+
+
+    * Permanently
+        .. code-block:: bash
+            
+            # edit /etc/sysconfig/cpupower to preference
+
+            # enable or disable permanently
+            sudo systemctl enable cpupower
+
 #. Give user speicific user scheduling privileges.
     .. code-block:: bash
 

slsDetectorGui/include/qTabMeasurement.h

@@ -103,7 +103,6 @@ class qTabMeasurement : public QWidget, private Ui::TabMeasurementObject {
     int numMeasurements{1};
     int currentMeasurement{0};
     mutable std::mutex mProgress;
-
 };
 
 } // namespace sls

slsDetectorServers/eigerDetectorServer/FebControl.c

@@ -690,7 +690,7 @@ int Feb_Control_ProcessingInProgress() {
     unsigned int regr = 0, regl = 0;
     // deactivated should return end of processing
     if (!Feb_Control_activated)
-        return IDLE;
+        return STATUS_IDLE;
 
     if (!Feb_Interface_ReadRegister(Feb_Control_rightAddress, FEB_REG_STATUS,
                                     &regr)) {
@@ -704,8 +704,9 @@ int Feb_Control_ProcessingInProgress() {
                        "processing status\n"));
         return STATUS_ERROR;
     }
+    LOG(logDEBUG1, ("regl:0x%x regr:0x%x\n", regl, regr));
     // processing done
-    if ((regr | regl) & FEB_REG_STATUS_ACQ_DONE_MSK) {
+    if (regr & regl & FEB_REG_STATUS_ACQ_DONE_MSK) {
         return STATUS_IDLE;
     }
     // processing running
@@ -1030,6 +1031,7 @@ int Feb_Control_StopAcquisition() {
         // wait for feb processing to be done
         int is_processing = Feb_Control_ProcessingInProgress();
         int check_error = 0;
+        int check_stuck = 0;
         while (is_processing != STATUS_IDLE) {
             usleep(500);
             is_processing = Feb_Control_ProcessingInProgress();
@@ -1041,13 +1043,30 @@ int Feb_Control_StopAcquisition() {
                     break;
                 check_error++;
             } // reset check_error for next time
-            else
+            else {
                 check_error = 0;
             }
-        LOG(logINFO, ("Feb: Processing done (to stop acq)\n"));
 
+            // check stuck only 2000 times (1s)
+            if (is_processing == STATUS_RUNNING) {
+                if (check_stuck == 2000) {
+                    LOG(logERROR,
+                        ("Unable to get feb processing done signal\n"));
+                    // at least it is idle
+                    if (Feb_Control_AcquisitionInProgress() == STATUS_IDLE) {
+                        return 1;
+                    }
+                    LOG(logERROR, ("Unable to get acquisition done signal\n"));
                     return 0;
                 }
+                check_stuck++;
+            } // reset check_stuck for next time
+            else {
+                check_stuck = 0;
+            }
+        }
+        LOG(logINFO, ("Feb: Processing done (to stop acq)\n"));
+    }
     return 1;
 }
 
@@ -1606,7 +1625,9 @@ int Feb_Control_SetChipSignalsToTrimQuad(int enable) {
         LOG(logINFO, ("%s chip signals to trim quad\n",
                       enable ? "Enabling" : "Disabling"));
         unsigned int regval = 0;
-        if (!Feb_Control_ReadRegister(DAQ_REG_HRDWRE, &regval)) {
+        // right fpga only
+        uint32_t righOffset = DAQ_REG_HRDWRE + Feb_Control_rightAddress;
+        if (!Feb_Control_ReadRegister(righOffset, &regval)) {
             LOG(logERROR, ("Could not set chip signals to trim quad\n"));
             return 0;
         }
@@ -1616,7 +1637,7 @@ int Feb_Control_SetChipSignalsToTrimQuad(int enable) {
             regval &= ~(DAQ_REG_HRDWRE_PROGRAM_MSK | DAQ_REG_HRDWRE_M8_MSK);
         }
 
-        if (!Feb_Control_WriteRegister(DAQ_REG_HRDWRE, regval)) {
+        if (!Feb_Control_WriteRegister(righOffset, regval)) {
             LOG(logERROR, ("Could not set chip signals to trim quad\n"));
             return 0;
         }
@@ -1652,19 +1673,19 @@ int Feb_Control_WriteRegister(uint32_t offset, uint32_t data) {
 
     int run[2] = {0, 0};
     // both registers
-    if (offset < 0x100) {
+    if (offset < Feb_Control_leftAddress) {
         run[0] = 1;
         run[1] = 1;
     }
     // right registers only
-    else if (offset >= 0x200) {
+    else if (offset >= Feb_Control_rightAddress) {
         run[0] = 1;
-        actualOffset = offset - 0x200;
+        actualOffset = offset - Feb_Control_rightAddress;
     }
     // left registers only
     else {
         run[1] = 1;
-        actualOffset = offset - 0x100;
+        actualOffset = offset - Feb_Control_leftAddress;
     }
 
     for (int iloop = 0; iloop < 2; ++iloop) {
@@ -1702,19 +1723,19 @@ int Feb_Control_ReadRegister(uint32_t offset, uint32_t *retval) {
     uint32_t value[2] = {0, 0};
     int run[2] = {0, 0};
     // both registers
-    if (offset < 0x100) {
+    if (offset < Feb_Control_leftAddress) {
         run[0] = 1;
         run[1] = 1;
     }
     // right registers only
-    else if (offset >= 0x200) {
+    else if (offset >= Feb_Control_rightAddress) {
         run[0] = 1;
-        actualOffset = offset - 0x200;
+        actualOffset = offset - Feb_Control_rightAddress;
     }
     // left registers only
     else {
         run[1] = 1;
-        actualOffset = offset - 0x100;
+        actualOffset = offset - Feb_Control_leftAddress;
     }
 
     for (int iloop = 0; iloop < 2; ++iloop) {
@@ -1735,11 +1756,10 @@ int Feb_Control_ReadRegister(uint32_t offset, uint32_t *retval) {
             }
         }
     }
-    // Inconsistent values
+    // Inconsistent values when reading both registers
-    if (value[0] != value[1]) {
+    if ((run[0] & run[1]) & (value[0] != value[1])) {
-        LOG(logERROR,
+        LOG(logERROR, ("Inconsistent values read from %s 0x%x and %s 0x%x\n",
-            ("Inconsistent values read from left 0x%x and right 0x%x\n",
+                       side[0], value[0], side[1], value[1]));
-             value[0], value[1]));
         return 0;
     }
     return 1;

slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c

@@ -2185,6 +2185,9 @@ int setTrimbits(int *chanregs, char *mess) {
 
     // if quad, set M8 and PROGRAM manually
     if (!Feb_Control_SetChipSignalsToTrimQuad(1)) {
+        sprintf(mess, "Could not set module. Could not enable chip signals to "
+                      "set trimbits\n");
+        LOG(logERROR, (mess));
         sharedMemory_unlockLocalLink();
         return FAIL;
     }
@@ -2198,6 +2201,9 @@ int setTrimbits(int *chanregs, char *mess) {
 
         // if quad, reset M8 and PROGRAM manually
         if (!Feb_Control_SetChipSignalsToTrimQuad(0)) {
+            sprintf(mess, "Could not set module. Could not disable chip "
+                          "signals to set trimbits\n");
+            LOG(logERROR, (mess));
             sharedMemory_unlockLocalLink();
             return FAIL;
         }
@@ -2208,6 +2214,9 @@ int setTrimbits(int *chanregs, char *mess) {
 
     // if quad, reset M8 and PROGRAM manually
     if (!Feb_Control_SetChipSignalsToTrimQuad(0)) {
+        sprintf(mess, "Could not set module. Could not disable chip signals to "
+                      "set trimbits\n");
+        LOG(logERROR, (mess));
         sharedMemory_unlockLocalLink();
         return FAIL;
     }
@@ -2787,7 +2796,7 @@ int stopStateMachine() {
 #else
     sharedMemory_lockLocalLink();
     // sends last frames from fifo and wait for feb processing done
-    if ((Feb_Control_StopAcquisition() != STATUS_IDLE)) {
+    if (!Feb_Control_StopAcquisition()) {
         LOG(logERROR, ("failed to stop acquisition\n"));
         sharedMemory_unlockLocalLink();
         return FAIL;
@@ -2810,7 +2819,9 @@ int stopStateMachine() {
 
     // reset feb and beb
     sharedMemory_lockLocalLink();
-    Feb_Control_Reset();
+    // uncommenting this out as it randomly does not set the processing bit to
+    // high
+    // Feb_Control_Reset();
     sharedMemory_unlockLocalLink();
     if (!Beb_StopAcquisition()) {
         LOG(logERROR, ("failed to stop acquisition\n"));
@@ -2903,7 +2914,8 @@ void waitForAcquisitionEnd(int *ret, char *mess) {
     sharedMemory_lockLocalLink();
     if (Feb_Control_WaitForFinishedFlag(5000, 1) == STATUS_ERROR) {
         sharedMemory_unlockLocalLink();
-        LOG(logERROR, ("Waiting for finished flag\n"));
+        strcpy(mess, "Could not wait for finished flag\n");
+        LOG(logERROR, (mess));
         *ret = FAIL;
         return;
     }
@@ -2919,6 +2931,7 @@ void waitForAcquisitionEnd(int *ret, char *mess) {
         sharedMemory_unlockLocalLink();
         if (i == STATUS_ERROR) {
             strcpy(mess, "Could not read feb processing done register\n");
+            LOG(logERROR, (mess));
             *ret = (int)FAIL;
             return;
         }
@@ -2930,6 +2943,7 @@ void waitForAcquisitionEnd(int *ret, char *mess) {
         // wait for beb to send out all packets
         if (Beb_IsTransmitting(&isTransmitting, send_to_ten_gig, 1) == FAIL) {
             strcpy(mess, "Could not read delay counters\n");
+            LOG(logERROR, (mess));
             *ret = (int)FAIL;
             return;
         }

slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c

@@ -441,7 +441,6 @@ void setupDetector() {
     clkDivider[SYSTEM_C0] = DEFAULT_SYSTEM_C0;
     clkDivider[SYSTEM_C1] = DEFAULT_SYSTEM_C1;
     clkDivider[SYSTEM_C2] = DEFAULT_SYSTEM_C2;
-    clkDivider[SYSTEM_C3] = DEFAULT_SYSTEM_C3;
 
     highvoltage = 0;
     trimmingPrint = logINFO;
@@ -2297,6 +2296,12 @@ int getVCOFrequency(enum CLKINDEX ind) {
 int getMaxClockDivider() { return ALTERA_PLL_C10_GetMaxClockDivider(); }
 
 int setClockDivider(enum CLKINDEX ind, int val) {
+    char *clock_names[] = {CLK_NAMES};
+    if (ind == SYSTEM_C1 || ind == SYSTEM_C2) {
+        LOG(logERROR, ("Cannot set %s and %s for this detector\n",
+                       clock_names[SYSTEM_C1], clock_names[SYSTEM_C2]));
+        return FAIL;
+    }
     return setClockDividerWithTimeUpdateOption(ind, val, 1);
 }
 
@@ -2364,7 +2369,6 @@ int setClockDividerWithTimeUpdateOption(enum CLKINDEX ind, int val,
         clkPhase[SYSTEM_C0] = 0;
         clkPhase[SYSTEM_C1] = 0;
         clkPhase[SYSTEM_C2] = 0;
-        clkPhase[SYSTEM_C3] = 0;
     }
 
     // set the phase in degrees (reset by pll)

slsDetectorServers/mythen3DetectorServer/slsDetectorServer_defs.h

@@ -3,7 +3,7 @@
 #pragma once
 #include "sls/sls_detector_defs.h"
 
-#define REQRD_FRMWRE_VRSN (0x210910)
+#define REQRD_FRMWRE_VRSN (0x220824)
 #define KERNEL_DATE_VRSN  "Mon May 10 18:00:21 CEST 2021"
 #define ID_FILE           "detid_mythen3.txt"
 
@@ -52,13 +52,11 @@
 #define DEFAULT_TRIMBIT_VALUE            (0)
 #define DEFAULT_COUNTER_DISABLED_VTH_VAL (2800)
 
-#define DEFAULT_READOUT_C0 (10) //(100000000) // rdo_clk, 100 MHz
+#define DEFAULT_READOUT_C0          (12) //(083333333) // rdo_clk, 83.33 MHz
-#define DEFAULT_READOUT_C1 (10) //(100000000) // smp sample clk (x2), 100 MHz
+#define DEFAULT_READOUT_C1          (12) //(083333333) // rdo_smp_clk, 83.33 MHz
-#define DEFAULT_SYSTEM_C0  (10) //(100000000) // run_clk, 100 MHz
+#define DEFAULT_SYSTEM_C0           (20) //(050000000) // run_clk, 20 MHz
-#define DEFAULT_SYSTEM_C1  (10) //(100000000) // sync_clk, 100 MHz
+#define DEFAULT_SYSTEM_C1           (8)  //(125000000) // str_clk, 125 MHz const
-#define DEFAULT_SYSTEM_C2  (10) //(100000000) // str_clk, 100 MHz
+#define DEFAULT_SYSTEM_C2           (5)  //(200000000) // smp_clk, 200 MHz const
-#define DEFAULT_SYSTEM_C3  (5)  //(200000000) // smp_clk, 200 MHz
-// (DEFAULT_SYSTEM_C3 only for timing receiver) should not be changed
 #define DEFAULT_TRIMMING_RUN_CLKDIV (40) // (25000000) // 25 MHz
 
 #define DEFAULT_ASIC_LATCHING_NUM_PULSES (10)
@@ -140,12 +138,12 @@ enum CLKINDEX {
     SYSTEM_C0,
     SYSTEM_C1,
     SYSTEM_C2,
-    SYSTEM_C3,
     NUM_CLOCKS
 };
+#define NUM_CLOCKS_TO_SET (3)
+
 #define CLK_NAMES                                                              \
-    "READOUT_C0", "READOUT_C1", "SYSTEM_C0", "SYSTEM_C1", "SYSTEM_C2",         \
+    "READOUT_C0", "READOUT_C1", "SYSTEM_C0", "SYSTEM_C1", "SYSTEM_C2"
-        "SYSTEM_C3"
 enum PLLINDEX { READOUT_PLL, SYSTEM_PLL };
 
 /* Struct Definitions */

slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c

@@ -1527,7 +1527,11 @@ int write_register(int file_des) {
         } else {
             if (readRegister(addr, &retval) == FAIL) {
                 ret = FAIL;
-                sprintf(mess, "Could not read register 0x%x.\n", addr);
+                sprintf(
+                    mess,
+                    "Could not read register 0x%x or inconsistent values. Try "
+                    "to read +0x100 for only left and +0x200 for only right.\n",
+                    addr);
                 LOG(logERROR, (mess));
             }
         }
@@ -1565,7 +1569,10 @@ int read_register(int file_des) {
 #elif EIGERD
     if (readRegister(addr, &retval) == FAIL) {
         ret = FAIL;
-        sprintf(mess, "Could not read register 0x%x.\n", addr);
+        sprintf(mess,
+                "Could not read register 0x%x or inconsistent values. Try "
+                "+0x100 for only left and +0x200 for only right..\n",
+                addr);
         LOG(logERROR, (mess));
     }
 #else
@@ -1900,8 +1907,7 @@ int acquire(int blocking, int file_des) {
             uint64_t sourcemac = getDetectorMAC();
             char src_mac[MAC_ADDRESS_SIZE];
             getMacAddressinString(src_mac, MAC_ADDRESS_SIZE, sourcemac);
-                sprintf(
+            sprintf(mess,
-                    mess,
                     "Invalid udp source mac address for this detector. Must be "
                     "same as hardware detector mac address %s\n",
                     src_mac);
@@ -1912,8 +1918,7 @@ int acquire(int blocking, int file_des) {
             uint32_t sourceip = getDetectorIP();
             char src_ip[INET_ADDRSTRLEN];
             getIpAddressinString(src_ip, sourceip);
-                sprintf(
+            sprintf(mess,
-                    mess,
                     "Invalid udp source ip address for this detector. Must be "
                     "same as hardware detector ip address %s in 1G readout "
                     "mode \n",
@@ -6017,7 +6022,11 @@ int set_clock_divider(int file_des) {
     // only set
     if (Server_VerifyLock() == OK) {
 
+#ifdef MYTHEN3D
+        if (args[0] >= NUM_CLOCKS_TO_SET) {
+#else
         if (args[0] >= NUM_CLOCKS) {
+#endif
             modeNotImplemented("clock index (divider set)", args[0]);
         }
 
@@ -6075,7 +6084,7 @@ int get_clock_divider(int file_des) {
 #else
     // get only
     if (arg >= NUM_CLOCKS) {
-        modeNotImplemented("clock index (divider set)", arg);
+        modeNotImplemented("clock index (divider get)", arg);
     }
     if (ret == OK) {
         enum CLKINDEX c = (enum CLKINDEX)arg;

slsDetectorSoftware/src/CmdProxy.cpp

@@ -2562,7 +2562,8 @@ std::string CmdProxy::AdcVpp(int action) {
 
     if (action == defs::HELP_ACTION) {
         os << "[dac or mV value][(optional unit) mV] \n\t[Ctb][Moench] Vpp of "
-            "ADC.\n\t 0 -> 1V ; 1 -> 1.14V ; 2 -> 1.33V ; 3 -> 1.6V ; 4 -> 2V. "
+              "ADC.\n\t 0 -> 1V ; 1 -> 1.14V ; 2 -> 1.33V ; 3 -> 1.6V ; 4 -> "
+              "2V. "
               "\n\tAdvanced User function!\n"
            << '\n';
         return os.str();
@@ -2593,8 +2594,7 @@ std::string CmdProxy::AdcVpp(int action) {
         } else if (args.size() > 2 || args.size() < 1) {
             WrongNumberOfParameters(1);
         }
-        det->setADCVpp(StringTo<int>(args[0]), mV,
+        det->setADCVpp(StringTo<int>(args[0]), mV, std::vector<int>{det_id});
-                    std::vector<int>{det_id});
         os << args[0] << (mV ? " mV\n" : "\n");
     } else {
         throw RuntimeError("Unknown action");

slsSupportLib/include/sls/versionAPI.h

@@ -5,11 +5,10 @@
 #define APILIB       0x220609
 #define APIRECEIVER  0x220609
 #define APIGUI       0x220609
-
 #define APICTB       0x221018
 #define APIGOTTHARD  0x221018
 #define APIGOTTHARD2 0x221018
 #define APIJUNGFRAU  0x221018
-#define APIMYTHEN3 0x221018
 #define APIMOENCH    0x221018
-#define APIEIGER 0x221018
+#define APIMYTHEN3   0x221107
+#define APIEIGER     0x221107