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Merge branch 'developer' of github.com:slsdetectorgroup/slsDetectorPackage into developer

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This commit is contained in:
Erik Frojdh
2020-03-16 15:43:55 +01:00
parent 89d70097f6 41d115a394
commit b059ba7c90
4 changed files with 154 additions and 160 deletions
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BIN
slsDetectorServers/gotthard2DetectorServer/bin/gotthard2DetectorServer_developer
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297
slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c
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@ -47,9 +47,10 @@ int injectedChannelsIncrement = 0;
int vetoReference[NCHIP][NCHAN]; int vetoReference[NCHIP][NCHAN];
uint8_t adcConfiguration[NCHIP][NADC]; uint8_t adcConfiguration[NCHIP][NADC];
int burstMode = BURST_INTERNAL; int burstMode = BURST_INTERNAL;
int64_t numTriggers = 1; int64_t numTriggersReg = 1;
int64_t numBursts = 1; int64_t delayReg = 0;
int64_t burstPeriodNs = 0; int64_t numBurstsReg = 1;
int64_t burstPeriodReg = 0;
int detPos[2] = {}; int detPos[2] = {};
int isInitCheckDone() { int isInitCheckDone() {
@ -354,9 +355,10 @@ void setupDetector() {
injectedChannelsOffset = 0; injectedChannelsOffset = 0;
injectedChannelsIncrement = 0; injectedChannelsIncrement = 0;
burstMode = BURST_INTERNAL; burstMode = BURST_INTERNAL;
numTriggers = 1; numTriggersReg = 1;
numBursts = 1; delayReg = 0;
burstPeriodNs = 0; numBurstsReg = 1;
burstPeriodReg = 0;
{ {
int i, j; int i, j;
for (i = 0; i < NUM_CLOCKS; ++i) { for (i = 0; i < NUM_CLOCKS; ++i) {
@ -736,32 +738,31 @@ int setDynamicRange(int dr){
/* parameters - timer */ /* parameters - timer */
void setNumFrames(int64_t val) { void setNumFrames(int64_t val) {
if (val > 0) { if (val > 0) {
LOG(logINFO, ("Setting number of frames %lld [local]\n", val));
// continuous mode
if (burstMode == BURST_OFF) { if (burstMode == BURST_OFF) {
setNumFramesCont(val); LOG(logINFO, ("Setting number of frames %lld [Continuous mode]\n", val));
setNumFramesBurst(1); set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
} else { } else {
setNumFramesBurst(val); LOG(logINFO, ("Setting number of frames %d [Burst mode]\n", (int)val));
setNumFramesCont(1); bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) &~ ASIC_INT_FRAMES_MSK);
bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) | (((int)val << ASIC_INT_FRAMES_OFST) & ASIC_INT_FRAMES_MSK));
} }
} }
} }
int64_t getNumFrames() { int64_t getNumFrames() {
if (burstMode == BURST_OFF) { if (burstMode == BURST_OFF) {
return getNumFramesCont(); return get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
} else { } else {
return getNumFramesBurst(); return ((bus_r(ASIC_INT_FRAMES_REG) & ASIC_INT_FRAMES_MSK) >> ASIC_INT_FRAMES_OFST);
} }
} }
void setNumTriggers(int64_t val) { void setNumTriggers(int64_t val) {
if (val > 0) { if (val > 0) {
LOG(logINFO, ("Setting number of triggers %lld\n", val)); LOG(logINFO, ("Setting number of triggers %lld\n", val));
numTriggers = val; if (getTiming() == AUTO_TIMING) {
if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { LOG(logINFO, ("\tNot trigger mode: not writing to register\n"));
LOG(logINFO, ("\tBurst and Auto mode: not writing #triggers to register\n")); numTriggersReg = val;
} else { } else {
set64BitReg(val, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); set64BitReg(val, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
} }
@ -769,8 +770,8 @@ void setNumTriggers(int64_t val) {
} }
int64_t getNumTriggers() { int64_t getNumTriggers() {
if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { if (getTiming() == AUTO_TIMING) {
return numTriggers; return numTriggersReg;
} }
return get64BitReg(SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); return get64BitReg(SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
} }
@ -778,20 +779,20 @@ int64_t getNumTriggers() {
void setNumBursts(int64_t val) { void setNumBursts(int64_t val) {
if (val > 0) { if (val > 0) {
LOG(logINFO, ("Setting number of bursts %lld\n", val)); LOG(logINFO, ("Setting number of bursts %lld\n", val));
numBursts = val;
if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) {
set64BitReg(val, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
} else { } else {
LOG(logINFO, ("\tNot (Burst and Auto mode): not writing #bursts to register\n")); LOG(logINFO, ("\tNot (Burst and Auto mode): not writing to register\n"));
numBurstsReg = val;
} }
} }
} }
int64_t getNumBursts() { int64_t getNumBursts() {
if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) {
return get64BitReg(SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); return get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
} }
return numBursts; return numBurstsReg;
} }
int setExpTime(int64_t val) { int setExpTime(int64_t val) {
@ -799,17 +800,21 @@ int setExpTime(int64_t val) {
LOG(logERROR, ("Invalid exptime: %lld ns\n", val)); LOG(logERROR, ("Invalid exptime: %lld ns\n", val));
return FAIL; return FAIL;
} }
LOG(logINFO, ("Setting exptime %lld ns [local]\n", val)); LOG(logINFO, ("Setting exptime %lld ns\n", val));
// continuous mode val *= (1E-9 * systemFrequency);
if (burstMode == BURST_OFF) { set64BitReg(val, ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG);
return setExptimeCont(val);
} else { // validate for tolerance
return setExptimeBurst(val); int64_t retval = getExpTime();
val /= (1E-9 * systemFrequency);
if (val != retval) {
return FAIL;
} }
return OK;
} }
int64_t getExpTime() { int64_t getExpTime() {
return getExptimeBoth(); return get64BitReg(ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG) / (1E-9 * systemFrequency);
} }
int setPeriod(int64_t val) { int setPeriod(int64_t val) {
@ -817,108 +822,29 @@ int setPeriod(int64_t val) {
LOG(logERROR, ("Invalid period: %lld ns\n", val)); LOG(logERROR, ("Invalid period: %lld ns\n", val));
return FAIL; return FAIL;
} }
LOG(logINFO, ("Setting period %lld ns [local]\n", val)); val *= (1E-9 * systemFrequency);
// continuous mode
if (burstMode == BURST_OFF) { if (burstMode == BURST_OFF) {
setPeriodBurst(0); LOG(logINFO, ("Setting period %lld ns [Continuous mode]\n", val));
return setPeriodCont(val); set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
} else { } else {
//setPeriodCont(0); LOG(logINFO, ("Setting period %lld ns [Burst mode]\n", val));
return setPeriodBurst(val); set64BitReg(val, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
} }
// validate for tolerance
int64_t retval = getPeriod();
val /= (1E-9 * systemFrequency);
if (val != retval) {
return FAIL;
}
return OK;
} }
int64_t getPeriod() { int64_t getPeriod() {
if (burstMode == BURST_OFF) { if (burstMode == BURST_OFF) {
return getPeriodCont();
} else {
return getPeriodBurst();
}
}
void setNumFramesBurst(int64_t val) {
LOG(logINFO, ("Setting number of frames %d [Burst mode]\n", (int)val));
bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) &~ ASIC_INT_FRAMES_MSK);
bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) | (((int)val << ASIC_INT_FRAMES_OFST) & ASIC_INT_FRAMES_MSK));
}
int64_t getNumFramesBurst() {
return ((bus_r(ASIC_INT_FRAMES_REG) & ASIC_INT_FRAMES_MSK) >> ASIC_INT_FRAMES_OFST);
}
void setNumFramesCont(int64_t val) {
LOG(logINFO, ("Setting number of frames %lld [Continuous mode]\n", val));
set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
}
int64_t getNumFramesCont() {
return get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
}
int setExptimeBurst(int64_t val) {
LOG(logINFO, ("Setting exptime %lld ns [Burst mode]\n", val));
return setExptimeBoth(val);
}
int setExptimeCont(int64_t val) {
LOG(logINFO, ("Setting exptime %lld ns [Continuous mode]\n", val));
return setExptimeBoth(val);
}
int setExptimeBoth(int64_t val) {
val *= (1E-9 * systemFrequency);
set64BitReg(val, ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG);
// validate for tolerance
int64_t retval = getExptimeBoth();
val /= (1E-9 * systemFrequency);
if (val != retval) {
return FAIL;
}
return OK;
}
int64_t getExptimeBoth() {
return get64BitReg(ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG) / (1E-9 * systemFrequency);
}
int setPeriodBurst(int64_t val) {
LOG(logINFO, ("Setting period %lld ns [Burst mode]\n", val));
val *= (1E-9 * systemFrequency);
set64BitReg(val, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
// validate for tolerance
int64_t retval = getPeriodBurst();
val /= (1E-9 * systemFrequency);
if (val != retval) {
return FAIL;
}
return OK;
}
int64_t getPeriodBurst() {
LOG(logDEBUG, ("Getting period [Burst mode]\n"));
return get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG)/ (1E-9 * systemFrequency);
}
int setPeriodCont(int64_t val) {
LOG(logINFO, ("Setting period %lld ns [Continuous mode]\n", val));
val *= (1E-9 * systemFrequency);
set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
// validate for tolerance
int64_t retval = getPeriodCont();
val /= (1E-9 * systemFrequency);
if (val != retval) {
return FAIL;
}
return OK;
}
int64_t getPeriodCont() {
LOG(logDEBUG, ("Getting period [Continuous mode]\n"));
return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-9 * systemFrequency); return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-9 * systemFrequency);
} else {
return get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG)/ (1E-9 * systemFrequency);
}
} }
int setDelayAfterTrigger(int64_t val) { int setDelayAfterTrigger(int64_t val) {
@ -928,8 +854,12 @@ int setDelayAfterTrigger(int64_t val) {
} }
LOG(logINFO, ("Setting delay after trigger %lld ns\n", val)); LOG(logINFO, ("Setting delay after trigger %lld ns\n", val));
val *= (1E-9 * systemFrequency); val *= (1E-9 * systemFrequency);
if (getTiming() == AUTO_TIMING) {
LOG(logINFO, ("\tNot trigger mode: not writing to register\n"));
delayReg = val;
} else {
set64BitReg(val, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG); set64BitReg(val, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
}
// validate for tolerance // validate for tolerance
int64_t retval = getDelayAfterTrigger(); int64_t retval = getDelayAfterTrigger();
val /= (1E-9 * systemFrequency); val /= (1E-9 * systemFrequency);
@ -940,6 +870,9 @@ int setDelayAfterTrigger(int64_t val) {
} }
int64_t getDelayAfterTrigger() { int64_t getDelayAfterTrigger() {
if (getTiming() == AUTO_TIMING) {
return delayReg / (1E-9 * systemFrequency);
}
return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / (1E-9 * systemFrequency); return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / (1E-9 * systemFrequency);
} }
@ -949,12 +882,12 @@ int setBurstPeriod(int64_t val) {
return FAIL; return FAIL;
} }
LOG(logINFO, ("Setting burst period %lld ns\n", val)); LOG(logINFO, ("Setting burst period %lld ns\n", val));
burstPeriodNs = val;
val *= (1E-9 * systemFrequency); val *= (1E-9 * systemFrequency);
if (burstMode != BURST_OFF) { if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) {
set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
} else { } else {
LOG(logINFO, ("\t(Continuous mode): not writing burst period to register\n")); LOG(logINFO, ("\tNot (Burst and Auto mode): not writing to register\n"));
burstPeriodReg = val;
} }
// validate for tolerance // validate for tolerance
@ -967,10 +900,10 @@ int setBurstPeriod(int64_t val) {
} }
int64_t getBurstPeriod() { int64_t getBurstPeriod() {
if (burstMode != BURST_OFF) { if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) {
return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) / (1E-9 * systemFrequency); return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) / (1E-9 * systemFrequency);
} }
return burstPeriodNs; return burstPeriodReg / (1E-9 * systemFrequency);
} }
int64_t getNumFramesLeft() { int64_t getNumFramesLeft() {
@ -1185,6 +1118,18 @@ int setHighVoltage(int val){
/* parameters - timing */ /* parameters - timing */
void setTiming( enum timingMode arg){ void setTiming( enum timingMode arg){
// update
// trigger
if (getTiming() == TRIGGER_EXPOSURE) {
numTriggersReg = get64BitReg(SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
delayReg = get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
}
// auto and burst
else if (burstMode != BURST_OFF) {
numBurstsReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
burstPeriodReg = get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
}
switch(arg){ switch(arg){
case AUTO_TIMING: case AUTO_TIMING:
LOG(logINFO, ("Set Timing: Auto\n")); LOG(logINFO, ("Set Timing: Auto\n"));
@ -1198,9 +1143,32 @@ void setTiming( enum timingMode arg){
LOG(logERROR, ("Unknown timing mode %d\n", arg)); LOG(logERROR, ("Unknown timing mode %d\n", arg));
} }
LOG(logINFO, ("\tUpdating trigger/burst and delay/burst period registers\n")) LOG(logINFO, ("\tUpdating registers\n"))
setNumTriggers(numTriggers); // trigger
setNumBursts(numBursts); if (getTiming() == TRIGGER_EXPOSURE) {
set64BitReg(numTriggersReg, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
set64BitReg(delayReg, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
LOG(logINFO, ("\tTriggers reg: %lld, Delay reg: %lldns\n", getNumTriggers(), getDelayAfterTrigger()));
// burst
if (burstMode != BURST_OFF) {
LOG(logINFO, ("\tFrame reg: 1, Period reg: 0\n"))
set64BitReg(1, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
set64BitReg(0, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
}
}
// auto
else {
LOG(logINFO, ("\tTrigger reg: 1, Delay reg: 0\n"))
set64BitReg(1, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG);
set64BitReg(0, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG);
// burst
if (burstMode != BURST_OFF) {
set64BitReg(numBurstsReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
set64BitReg(burstPeriodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
LOG(logINFO, ("\tFrames reg (bursts): %lld, Period reg(burst period): %lldns\n", getNumBursts(), getBurstPeriod()));
}
}
LOG(logINFO, ("\tDone Updating registers\n"))
} }
enum timingMode getTiming() { enum timingMode getTiming() {
@ -1875,23 +1843,62 @@ int setBurstModeinFPGA(enum burstMode value) {
int setBurstMode(enum burstMode burst) { int setBurstMode(enum burstMode burst) {
LOG(logINFO, ("Setting burst mode to %s\n", burst == BURST_OFF ? "off" : (burst == BURST_INTERNAL ? "internal" : "external"))); LOG(logINFO, ("Setting burst mode to %s\n", burst == BURST_OFF ? "off" : (burst == BURST_INTERNAL ? "internal" : "external")));
// remember the number of frames and period (before changing burst mode) // update
int64_t frames = getNumFrames(); int64_t framesReg = 0;
int64_t period = getPeriod(); int64_t periodReg = 0;
// burst
if (burstMode != BURST_OFF) {
framesReg = ((bus_r(ASIC_INT_FRAMES_REG) & ASIC_INT_FRAMES_MSK) >> ASIC_INT_FRAMES_OFST);
periodReg = get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
// auto
if (getTiming() == AUTO_TIMING) {
numBurstsReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
burstPeriodReg = get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
}
}
// continuous
else {
framesReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
periodReg = get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
}
if (setBurstModeinFPGA(burst) == FAIL) { if (setBurstModeinFPGA(burst) == FAIL) {
return FAIL; return FAIL;
} }
LOG(logINFO, ("\tUpdating trigger/burst and burst period registers\n")) LOG(logINFO, ("\tUpdating registers\n"));
setNumTriggers(numTriggers); // continuous
setNumBursts(numBursts); if (burstMode == BURST_OFF) {
setBurstPeriod(burstPeriodNs); set64BitReg(framesReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
set64BitReg(periodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
LOG(logINFO, ("\tFrames reg: %lld, Period reg: %lldns\n", getNumFrames(), getPeriod()));
// set number of frames and period again (set registers according to timing mode) LOG(logINFO, ("\tInt. Frame reg: 1, Int. Period reg: 0\n"))
LOG(logINFO, ("\tUpdating #frames and period registers\n")); bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) &~ ASIC_INT_FRAMES_MSK);
setNumFrames(frames); bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) | ((1 << ASIC_INT_FRAMES_OFST) & ASIC_INT_FRAMES_MSK));
setPeriod(period); set64BitReg(0, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
}
// burst
else {
bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) &~ ASIC_INT_FRAMES_MSK);
bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) | (((int)framesReg << ASIC_INT_FRAMES_OFST) & ASIC_INT_FRAMES_MSK));
set64BitReg(periodReg, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG);
LOG(logINFO, ("\tInt. Frames reg: %lld, Int. Period reg: %lldns\n", getNumFrames(), getPeriod()));
// trigger
if (getTiming() == TRIGGER_EXPOSURE) {
LOG(logINFO, ("\tFrame reg: 1, Period reg: 0\n"))
set64BitReg(1, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
set64BitReg(0, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
}
//auto
else {
set64BitReg(numBurstsReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG);
set64BitReg(burstPeriodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG);
LOG(logINFO, ("\tFrames reg (bursts): %lld, Period reg(burst period): %lldns\n", getNumBursts(), getBurstPeriod()));
}
}
LOG(logINFO, ("\tDone Updating registers\n"))
LOG(logINFO, ("\tSetting %s Mode in Chip\n", burstMode == BURST_OFF ? "Continuous" : "Burst")); LOG(logINFO, ("\tSetting %s Mode in Chip\n", burstMode == BURST_OFF ? "Continuous" : "Burst"));
int value = burstMode ? ASIC_GLOBAL_BURST_VALUE : ASIC_GLOBAL_CONT_VALUE; int value = burstMode ? ASIC_GLOBAL_BURST_VALUE : ASIC_GLOBAL_CONT_VALUE;

13
slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h
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@ -202,19 +202,6 @@ void setNumBursts(int64_t val);
int64_t getNumBursts(); int64_t getNumBursts();
int setBurstPeriod(int64_t val); int setBurstPeriod(int64_t val);
int64_t getBurstPeriod(); int64_t getBurstPeriod();
void setNumFramesBurst(int64_t val);
int64_t getNumFramesBurst();
void setNumFramesCont(int64_t val);
int64_t getNumFramesCont();
int setExptimeBurst(int64_t val);
int setExptimeCont(int64_t val);
int setExptimeBoth(int64_t val);
int64_t getExptimeBoth();
int setPeriodBurst(int64_t val);
int64_t getPeriodBurst();
int setPeriodCont(int64_t val);
int64_t getPeriodCont();
#endif #endif
#ifdef EIGERD #ifdef EIGERD
int setSubExpTime(int64_t val); int setSubExpTime(int64_t val);

2
slsSupportLib/include/versionAPI.h
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@ -5,8 +5,8 @@
#define APIGUI 0x200227 #define APIGUI 0x200227
#define APICTB 0x200310 #define APICTB 0x200310
#define APIGOTTHARD 0x200310 #define APIGOTTHARD 0x200310
#define APIGOTTHARD2 0x200310
#define APIJUNGFRAU 0x200310 #define APIJUNGFRAU 0x200310
#define APIMYTHEN3 0x200310 #define APIMYTHEN3 0x200310
#define APIMOENCH 0x200310 #define APIMOENCH 0x200310
#define APIEIGER 0x200310 #define APIEIGER 0x200310
#define APIGOTTHARD2 0x200313