posisibility to read adnd write registers in the front end board for eiger

This commit is contained in:
Dhanya Maliakal
2017-08-10 14:49:02 +02:00
parent 389f356a3a
commit af079f3168
7 changed files with 54 additions and 31 deletions

View File

@ -1921,4 +1921,35 @@ int Feb_Control_GetRightFPGATemp(){
}
uint32_t Feb_Control_WriteRegister(uint32_t offset, uint32_t data) {
uint32_t value=0;
if(Module_TopAddressIsValid(&modules[1])){
if(!Feb_Interface_WriteRegister(Module_GetTopRightAddress (&modules[1]),offset, data,0, 0)) {
cprintf(RED,"Could not read value. Value read:%d\n", value);
value = 0;
}
} else {
if(!Feb_Interface_WriteRegister(Module_GetBottomRightAddress (&modules[1]),offset, data,0, 0)) {
cprintf(RED,"Could not read value. Value read:%d\n", value);
value = 0;
}
}
return Feb_Control_ReadRegister(offset);
}
uint32_t Feb_Control_ReadRegister(uint32_t offset) {
uint32_t value=0;
if(Module_TopAddressIsValid(&modules[1])){
if(!Feb_Interface_ReadRegister(Module_GetTopRightAddress (&modules[1]),offset, &value)) {
cprintf(RED,"Could not read value. Value read:%d\n", value);
value = 0;
}
} else {
if(!Feb_Interface_ReadRegister(Module_GetBottomRightAddress (&modules[1]),offset, &value)) {
cprintf(RED,"Could not read value. Value read:%d\n", value);
value = 0;
}
}
return value;
}