default dacs done

This commit is contained in:
2021-07-29 15:56:32 +02:00
parent 0665209389
commit a9663abc50
10 changed files with 582 additions and 320 deletions

View File

@ -61,6 +61,7 @@ uint8_t adcEnableMask_10g = 0;
int32_t clkPhase[NUM_CLOCKS] = {};
uint32_t clkFrequency[NUM_CLOCKS] = {40, 20, 20, 200};
int dacValues[NDAC] = {};
int defaultDacValues[NDAC] = DEFAULT_DAC_VALS;
// software limit that depends on the current chip on the ctb
int vLimit = 0;
enum detectorSettings thisSettings = UNINITIALIZED;
@ -616,17 +617,40 @@ void updateDataBytes() {
int setDefaultDacs() {
int ret = OK;
LOG(logINFOBLUE, ("Setting Default Dac values\n"));
const int defaultvals[NDAC] = DEFAULT_DAC_VALS;
for (int i = 0; i < NDAC; ++i) {
setDAC((enum DACINDEX)i, defaultvals[i], 0);
if (dacValues[i] != defaultvals[i]) {
setDAC((enum DACINDEX)i, defaultDacValues[i], 0);
if (dacValues[i] != defaultDacValues[i]) {
ret = FAIL;
LOG(logERROR, ("Setting dac %d failed, wrote %d, read %d\n", i,
defaultvals[i], dacValues[i]));
defaultDacValues[i], dacValues[i]));
}
}
return ret;
}
int getDefaultDac(enum DACINDEX index, enum detectorSettings sett,
int *retval) {
if (sett != UNDEFINED) {
return FAIL;
}
if (index < 0 || index >= NDAC)
return FAIL;
*retval = defaultDacValues[index];
return OK;
}
int setDefaultDac(enum DACINDEX index, enum detectorSettings sett, int value) {
if (sett != UNDEFINED) {
return FAIL;
}
if (index < 0 || index >= NDAC)
return FAIL;
char *dac_names[] = {DAC_NAMES};
LOG(logINFO, ("Setting Default Dac [%d - %s]: %d\n", (int)index,
dac_names[index], value));
defaultDacValues[index] = value;
return OK;
}
/* firmware functions (resets) */