gotthard2 bug fix: fixed pll freq was incorrect when 0 in front

This commit is contained in:
maliakal_d 2020-02-28 16:03:15 +01:00
parent 11e7737a2f
commit a769f7515c
2 changed files with 1 additions and 1 deletions

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@ -53,7 +53,7 @@
/* Firmware Definitions */ /* Firmware Definitions */
#define IP_HEADER_SIZE (20) #define IP_HEADER_SIZE (20)
#define FIXED_PLL_FREQUENCY (020000000) // 20MHz #define FIXED_PLL_FREQUENCY (20000000) // 20MHz
#define READOUT_PLL_VCO_FREQ_HZ (866666688) // 866 MHz #define READOUT_PLL_VCO_FREQ_HZ (866666688) // 866 MHz
#define SYSTEM_PLL_VCO_FREQ_HZ (722222224) // 722 MHz #define SYSTEM_PLL_VCO_FREQ_HZ (722222224) // 722 MHz