From 671cf45fd77c46f8c2fcfc7d42d0331ba27f4912 Mon Sep 17 00:00:00 2001 From: Dhanya Thattil Date: Tue, 5 May 2020 15:23:11 +0200 Subject: [PATCH 1/4] format slsdetectorservers --- CMakeLists.txt | 1 - .../ctbDetectorServer/RegisterDefs.h | 726 +++++++++--------- .../slsDetectorServer_defs.h | 226 +++--- slsDetectorServers/eigerDetectorServer/Beb.h | 103 +-- .../eigerDetectorServer/FebControl.h | 149 ++-- .../eigerDetectorServer/FebInterface.h | 28 +- .../eigerDetectorServer/FebRegisterDefs.h | 336 ++++---- .../eigerDetectorServer/HardwareIO.h | 17 +- .../HardwareMMappingDefs.h | 59 +- .../eigerDetectorServer/LocalLinkInterface.h | 33 +- .../slsDetectorServer_defs.h | 188 +++-- .../eigerDetectorServer/xfs_types.h | 50 +- .../eigerDetectorServer/xparameters.h | 572 +++++++------- .../gotthard2DetectorServer/RegisterDefs.h | 283 +++---- .../slsDetectorServer_defs.h | 236 +++--- .../gotthardDetectorServer/RegisterDefs.h | 477 ++++++------ .../slsDetectorServer_defs.h | 211 ++--- .../jungfrauDetectorServer/RegisterDefs.h | 668 ++++++++-------- .../slsDetectorServer_defs.h | 218 +++--- .../moenchDetectorServer/RegisterDefs.h | 710 +++++++++-------- .../slsDetectorServer_defs.h | 211 ++--- .../mythen3DetectorServer/RegisterDefs.h | 367 ++++----- .../slsDetectorServer_defs.h | 178 +++-- .../slsDetectorServer/include/AD7689.h | 3 +- .../slsDetectorServer/include/AD9252.h | 3 +- .../slsDetectorServer/include/AD9257.h | 8 +- .../slsDetectorServer/include/ALTERA_PLL.h | 21 +- .../include/ALTERA_PLL_CYCLONE10.h | 15 +- .../slsDetectorServer/include/ASIC_Driver.h | 4 +- .../slsDetectorServer/include/DAC6571.h | 9 +- .../slsDetectorServer/include/I2C.h | 8 +- .../slsDetectorServer/include/INA226.h | 7 +- .../slsDetectorServer/include/LTC2620.h | 19 +- .../include/LTC2620_Driver.h | 12 +- .../slsDetectorServer/include/MAX1932.h | 9 +- .../include/UDPPacketHeaderGenerator.h | 16 +- .../slsDetectorServer/include/blackfin.h | 6 +- .../slsDetectorServer/include/clogger.h | 116 ++- .../slsDetectorServer/include/common.h | 7 +- .../include/commonServerFunctions.h | 21 +- .../include/communication_funcs.h | 42 +- .../include/communication_funcs_UDP.h | 5 +- .../include/communication_virtual.h | 6 +- .../slsDetectorServer/include/nios.h | 4 +- .../include/programFpgaBlackfin.h | 8 +- .../include/programFpgaNios.h | 13 +- .../include/readDefaultPattern.h | 22 +- .../include/slsDetectorFunctionList.h | 706 +++++++++-------- .../include/slsDetectorServer_funcs.h | 22 +- 49 files changed, 3750 insertions(+), 3409 deletions(-) mode change 100755 => 100644 slsDetectorServers/ctbDetectorServer/RegisterDefs.h mode change 100755 => 100644 slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/Beb.h mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/FebControl.h mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/FebInterface.h mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/FebRegisterDefs.h mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/HardwareIO.h mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/HardwareMMappingDefs.h mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/LocalLinkInterface.h mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/slsDetectorServer_defs.h mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/xfs_types.h mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/xparameters.h mode change 100755 => 100644 slsDetectorServers/gotthardDetectorServer/RegisterDefs.h mode change 100755 => 100644 slsDetectorServers/gotthardDetectorServer/slsDetectorServer_defs.h mode change 100755 => 100644 slsDetectorServers/jungfrauDetectorServer/RegisterDefs.h mode change 100755 => 100644 slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h mode change 100755 => 100644 slsDetectorServers/moenchDetectorServer/RegisterDefs.h mode change 100755 => 100644 slsDetectorServers/moenchDetectorServer/slsDetectorServer_defs.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/AD7689.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/AD9252.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/AD9257.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/ALTERA_PLL.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/ALTERA_PLL_CYCLONE10.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/ASIC_Driver.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/DAC6571.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/I2C.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/INA226.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/LTC2620.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/LTC2620_Driver.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/MAX1932.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/UDPPacketHeaderGenerator.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/blackfin.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/clogger.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/common.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/commonServerFunctions.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/communication_funcs.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/communication_funcs_UDP.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/communication_virtual.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/nios.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/programFpgaBlackfin.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/programFpgaNios.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/readDefaultPattern.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/include/slsDetectorServer_funcs.h diff --git a/CMakeLists.txt b/CMakeLists.txt index 064cc5ca5..e19bf60d3 100755 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -50,7 +50,6 @@ option(SLS_TUNE_LOCAL "tune to local machine" OFF) set(ClangFormat_EXCLUDE_PATTERNS "build/" "libs/" "slsDetectorCalibration/" - "slsDetectorServers/" "ctbGui/" "manual/" "python/" diff --git a/slsDetectorServers/ctbDetectorServer/RegisterDefs.h b/slsDetectorServers/ctbDetectorServer/RegisterDefs.h old mode 100755 new mode 100644 index 3c269edfc..663259a5a --- a/slsDetectorServers/ctbDetectorServer/RegisterDefs.h +++ b/slsDetectorServers/ctbDetectorServer/RegisterDefs.h @@ -4,552 +4,576 @@ #define MEM_MAP_SHIFT 1 /* FPGA Version RO register */ -#define FPGA_VERSION_REG (0x00 << MEM_MAP_SHIFT) +#define FPGA_VERSION_REG (0x00 << MEM_MAP_SHIFT) -#define FPGA_VERSION_BRD_RVSN_OFST (0) -#define FPGA_VERSION_BRD_RVSN_MSK (0x00FFFFFF << FPGA_VERSION_BRD_RVSN_OFST) -#define FPGA_VERSION_DTCTR_TYP_OFST (24) -#define FPGA_VERSION_DTCTR_TYP_MSK (0x000000FF << FPGA_VERSION_DTCTR_TYP_OFST) -#define FPGA_VERSION_DTCTR_TYP_CTB_VAL ((0x4 << FPGA_VERSION_DTCTR_TYP_OFST) & FPGA_VERSION_DTCTR_TYP_MSK) +#define FPGA_VERSION_BRD_RVSN_OFST (0) +#define FPGA_VERSION_BRD_RVSN_MSK (0x00FFFFFF << FPGA_VERSION_BRD_RVSN_OFST) +#define FPGA_VERSION_DTCTR_TYP_OFST (24) +#define FPGA_VERSION_DTCTR_TYP_MSK (0x000000FF << FPGA_VERSION_DTCTR_TYP_OFST) +#define FPGA_VERSION_DTCTR_TYP_CTB_VAL \ + ((0x4 << FPGA_VERSION_DTCTR_TYP_OFST) & FPGA_VERSION_DTCTR_TYP_MSK) /* Fix pattern RO register */ -#define FIX_PATT_REG (0x01 << MEM_MAP_SHIFT) +#define FIX_PATT_REG (0x01 << MEM_MAP_SHIFT) -#define FIX_PATT_VAL (0xACDC2016) +#define FIX_PATT_VAL (0xACDC2016) /* Status RO register */ -#define STATUS_REG (0x02 << MEM_MAP_SHIFT) +#define STATUS_REG (0x02 << MEM_MAP_SHIFT) -#define STATUS_RN_BSY_OFST (0) -#define STATUS_RN_BSY_MSK (0x00000001 << STATUS_RN_BSY_OFST) -#define STATUS_RDT_BSY_OFST (1) -#define STATUS_RDT_BSY_MSK (0x00000001 << STATUS_RDT_BSY_OFST) -#define STATUS_ANY_FF_FLL_OFST (2) -#define STATUS_ANY_FF_FLL_MSK (0x00000001 << STATUS_ANY_FF_FLL_OFST) -#define STATUS_WTNG_FR_TRGGR_OFST (3) -#define STATUS_WTNG_FR_TRGGR_MSK (0x00000001 << STATUS_WTNG_FR_TRGGR_OFST) -#define STATUS_DLY_BFR_OFST (4) -#define STATUS_DLY_BFR_MSK (0x00000001 << STATUS_DLY_BFR_OFST) -#define STATUS_DLY_AFTR_OFST (5) -#define STATUS_DLY_AFTR_MSK (0x00000001 << STATUS_DLY_AFTR_OFST) -#define STATUS_EXPSNG_OFST (6) -#define STATUS_EXPSNG_MSK (0x00000001 << STATUS_EXPSNG_OFST) -#define STATUS_CNT_ENBL_OFST (7) -#define STATUS_CNT_ENBL_MSK (0x00000001 << STATUS_CNT_ENBL_OFST) -#define STATUS_SM_FF_FLL_OFST (11) -#define STATUS_SM_FF_FLL_MSK (0x00000001 << STATUS_SM_FF_FLL_OFST) -#define STATUS_STPPD_OFST (15) -#define STATUS_STPPD_MSK (0x00000001 << STATUS_STPPD_OFST) -#define STATUS_ALL_FF_EMPTY_OFST (16) -#define STATUS_ALL_FF_EMPTY_MSK (0x00000001 << STATUS_ALL_FF_EMPTY_OFST) -#define STATUS_CYCL_RN_BSY_OFST (17) -#define STATUS_CYCL_RN_BSY_MSK (0x00000001 << STATUS_CYCL_RN_BSY_OFST) -#define STATUS_FRM_RN_BSY_OFST (18) -#define STATUS_FRM_RN_BSY_MSK (0x00000001 << STATUS_FRM_RN_BSY_OFST) -#define STATUS_ADC_DESERON_OFST (19) -#define STATUS_ADC_DESERON_MSK (0x00000001 << STATUS_ADC_DESERON_OFST) -#define STATUS_PLL_RCNFG_BSY_OFST (20) -#define STATUS_PLL_RCNFG_BSY_MSK (0x00000001 << STATUS_PLL_RCNFG_BSY_OFST) -#define STATUS_DT_STRMNG_BSY_OFST (21) -#define STATUS_DT_STRMNG_BSY_MSK (0x00000001 << STATUS_DT_STRMNG_BSY_OFST) -#define STATUS_FRM_PCKR_BSY_OFST (22) -#define STATUS_FRM_PCKR_BSY_MSK (0x00000001 << STATUS_FRM_PCKR_BSY_OFST) -#define STATUS_PLL_PHS_DN_OFST (23) -#define STATUS_PLL_PHS_DN_MSK (0x00000001 << STATUS_PLL_PHS_DN_OFST) -#define STATUS_PT_CNTRL_STTS_OFF_OFST (24) -#define STATUS_PT_CNTRL_STTS_OFF_MSK (0x000000FF << STATUS_PT_CNTRL_STTS_OFF_OFST) -#define STATUS_IDLE_MSK (0x677FF) +#define STATUS_RN_BSY_OFST (0) +#define STATUS_RN_BSY_MSK (0x00000001 << STATUS_RN_BSY_OFST) +#define STATUS_RDT_BSY_OFST (1) +#define STATUS_RDT_BSY_MSK (0x00000001 << STATUS_RDT_BSY_OFST) +#define STATUS_ANY_FF_FLL_OFST (2) +#define STATUS_ANY_FF_FLL_MSK (0x00000001 << STATUS_ANY_FF_FLL_OFST) +#define STATUS_WTNG_FR_TRGGR_OFST (3) +#define STATUS_WTNG_FR_TRGGR_MSK (0x00000001 << STATUS_WTNG_FR_TRGGR_OFST) +#define STATUS_DLY_BFR_OFST (4) +#define STATUS_DLY_BFR_MSK (0x00000001 << STATUS_DLY_BFR_OFST) +#define STATUS_DLY_AFTR_OFST (5) +#define STATUS_DLY_AFTR_MSK (0x00000001 << STATUS_DLY_AFTR_OFST) +#define STATUS_EXPSNG_OFST (6) +#define STATUS_EXPSNG_MSK (0x00000001 << STATUS_EXPSNG_OFST) +#define STATUS_CNT_ENBL_OFST (7) +#define STATUS_CNT_ENBL_MSK (0x00000001 << STATUS_CNT_ENBL_OFST) +#define STATUS_SM_FF_FLL_OFST (11) +#define STATUS_SM_FF_FLL_MSK (0x00000001 << STATUS_SM_FF_FLL_OFST) +#define STATUS_STPPD_OFST (15) +#define STATUS_STPPD_MSK (0x00000001 << STATUS_STPPD_OFST) +#define STATUS_ALL_FF_EMPTY_OFST (16) +#define STATUS_ALL_FF_EMPTY_MSK (0x00000001 << STATUS_ALL_FF_EMPTY_OFST) +#define STATUS_CYCL_RN_BSY_OFST (17) +#define STATUS_CYCL_RN_BSY_MSK (0x00000001 << STATUS_CYCL_RN_BSY_OFST) +#define STATUS_FRM_RN_BSY_OFST (18) +#define STATUS_FRM_RN_BSY_MSK (0x00000001 << STATUS_FRM_RN_BSY_OFST) +#define STATUS_ADC_DESERON_OFST (19) +#define STATUS_ADC_DESERON_MSK (0x00000001 << STATUS_ADC_DESERON_OFST) +#define STATUS_PLL_RCNFG_BSY_OFST (20) +#define STATUS_PLL_RCNFG_BSY_MSK (0x00000001 << STATUS_PLL_RCNFG_BSY_OFST) +#define STATUS_DT_STRMNG_BSY_OFST (21) +#define STATUS_DT_STRMNG_BSY_MSK (0x00000001 << STATUS_DT_STRMNG_BSY_OFST) +#define STATUS_FRM_PCKR_BSY_OFST (22) +#define STATUS_FRM_PCKR_BSY_MSK (0x00000001 << STATUS_FRM_PCKR_BSY_OFST) +#define STATUS_PLL_PHS_DN_OFST (23) +#define STATUS_PLL_PHS_DN_MSK (0x00000001 << STATUS_PLL_PHS_DN_OFST) +#define STATUS_PT_CNTRL_STTS_OFF_OFST (24) +#define STATUS_PT_CNTRL_STTS_OFF_MSK \ + (0x000000FF << STATUS_PT_CNTRL_STTS_OFF_OFST) +#define STATUS_IDLE_MSK (0x677FF) /* Look at me RO register TODO */ -#define LOOK_AT_ME_REG (0x03 << MEM_MAP_SHIFT) +#define LOOK_AT_ME_REG (0x03 << MEM_MAP_SHIFT) /* System Status RO register */ -#define SYSTEM_STATUS_REG (0x04 << MEM_MAP_SHIFT) +#define SYSTEM_STATUS_REG (0x04 << MEM_MAP_SHIFT) -#define SYSTEM_STATUS_DDR3_CLBRTN_OK_OFST (0) -#define SYSTEM_STATUS_DDR3_CLBRTN_OK_MSK (0x00000001 << SYSTEM_STATUS_DDR3_CLBRTN_OK_OFST) -#define SYSTEM_STATUS_DDR3_CLBRTN_FL_OFST (1) -#define SYSTEM_STATUS_DDR3_CLBRTN_FL_MSK (0x00000001 << SYSTEM_STATUS_DDR3_CLBRTN_FL_OFST) -#define SYSTEM_STATUS_DDR3_INT_DN_OFST (2) -#define SYSTEM_STATUS_DDR3_INT_DN_MSK (0x00000001 << SYSTEM_STATUS_DDR3_INT_DN_OFST) -#define SYSTEM_STATUS_RCNFG_PLL_LCK_OFST (3) -#define SYSTEM_STATUS_RCNFG_PLL_LCK_MSK (0x00000001 << SYSTEM_STATUS_RCNFG_PLL_LCK_OFST) -#define SYSTEM_STATUS_PLL_A_LCK_OFST (4) -#define SYSTEM_STATUS_PLL_A_LCK_MSK (0x00000001 << SYSTEM_STATUS_PLL_A_LCK_OFST) +#define SYSTEM_STATUS_DDR3_CLBRTN_OK_OFST (0) +#define SYSTEM_STATUS_DDR3_CLBRTN_OK_MSK \ + (0x00000001 << SYSTEM_STATUS_DDR3_CLBRTN_OK_OFST) +#define SYSTEM_STATUS_DDR3_CLBRTN_FL_OFST (1) +#define SYSTEM_STATUS_DDR3_CLBRTN_FL_MSK \ + (0x00000001 << SYSTEM_STATUS_DDR3_CLBRTN_FL_OFST) +#define SYSTEM_STATUS_DDR3_INT_DN_OFST (2) +#define SYSTEM_STATUS_DDR3_INT_DN_MSK \ + (0x00000001 << SYSTEM_STATUS_DDR3_INT_DN_OFST) +#define SYSTEM_STATUS_RCNFG_PLL_LCK_OFST (3) +#define SYSTEM_STATUS_RCNFG_PLL_LCK_MSK \ + (0x00000001 << SYSTEM_STATUS_RCNFG_PLL_LCK_OFST) +#define SYSTEM_STATUS_PLL_A_LCK_OFST (4) +#define SYSTEM_STATUS_PLL_A_LCK_MSK (0x00000001 << SYSTEM_STATUS_PLL_A_LCK_OFST) -/* PLL Param (Reconfiguratble PLL Parameter) RO register TODO FIXME: Same as PLL_PARAM_REG 0x50 */ +/* PLL Param (Reconfiguratble PLL Parameter) RO register TODO FIXME: Same as + * PLL_PARAM_REG 0x50 */ //#define PLL_PARAM_REG (0x05 << MEM_MAP_SHIFT) /* FIFO Data RO register TODO */ -#define FIFO_DATA_REG (0x06 << MEM_MAP_SHIFT) +#define FIFO_DATA_REG (0x06 << MEM_MAP_SHIFT) -#define FIFO_DATA_HRDWR_SRL_NMBR_OFST (0) -#define FIFO_DATA_HRDWR_SRL_NMBR_MSK (0x0000FFFF << FIFO_DATA_HRDWR_SRL_NMBR_OFST) +#define FIFO_DATA_HRDWR_SRL_NMBR_OFST (0) +#define FIFO_DATA_HRDWR_SRL_NMBR_MSK \ + (0x0000FFFF << FIFO_DATA_HRDWR_SRL_NMBR_OFST) //#define FIFO_DATA_WRD_OFST (16) //#define FIFO_DATA_WRD_MSK (0x0000FFFF << FIFO_DATA_WRD_OFST) /* FIFO Status RO register TODO */ -#define FIFO_STATUS_REG (0x07 << MEM_MAP_SHIFT) +#define FIFO_STATUS_REG (0x07 << MEM_MAP_SHIFT) /* FIFO Empty RO register TODO */ -#define FIFO_EMPTY_REG (0x08 << MEM_MAP_SHIFT) -#define FIFO_EMPTY_ALL_EMPTY_MSK (0xFFFFFFFF) +#define FIFO_EMPTY_REG (0x08 << MEM_MAP_SHIFT) +#define FIFO_EMPTY_ALL_EMPTY_MSK (0xFFFFFFFF) /* FIFO Full RO register TODO */ -#define FIFO_FULL_REG (0x09 << MEM_MAP_SHIFT) +#define FIFO_FULL_REG (0x09 << MEM_MAP_SHIFT) /* MCB Serial Number RO register */ -#define MOD_SERIAL_NUMBER_REG (0x0A << MEM_MAP_SHIFT) +#define MOD_SERIAL_NUMBER_REG (0x0A << MEM_MAP_SHIFT) -#define MOD_SERIAL_NUMBER_OFST (0) -#define MOD_SERIAL_NUMBER_MSK (0x000000FF << MOD_SERIAL_NUMBER_OFST) -#define MOD_SERIAL_NUMBER_VRSN_OFST (16) -#define MOD_SERIAL_NUMBER_VRSN_MSK (0x0000003F << MOD_SERIAL_NUMBER_VRSN_OFST) +#define MOD_SERIAL_NUMBER_OFST (0) +#define MOD_SERIAL_NUMBER_MSK (0x000000FF << MOD_SERIAL_NUMBER_OFST) +#define MOD_SERIAL_NUMBER_VRSN_OFST (16) +#define MOD_SERIAL_NUMBER_VRSN_MSK (0x0000003F << MOD_SERIAL_NUMBER_VRSN_OFST) /* API Version RO register */ -#define API_VERSION_REG (0x0F << MEM_MAP_SHIFT) +#define API_VERSION_REG (0x0F << MEM_MAP_SHIFT) -#define API_VERSION_OFST (0) -#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST) -#define API_VERSION_DTCTR_TYP_OFST (24) -#define API_VERSION_DTCTR_TYP_MSK (0x000000FF << API_VERSION_DTCTR_TYP_OFST) +#define API_VERSION_OFST (0) +#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST) +#define API_VERSION_DTCTR_TYP_OFST (24) +#define API_VERSION_DTCTR_TYP_MSK (0x000000FF << API_VERSION_DTCTR_TYP_OFST) -/* Time from Start 64 bit RO register. t = GCLK x 50 ns. Reset using CONTROL_CRST. TODO */ -#define TIME_FROM_START_LSB_REG (0x10 << MEM_MAP_SHIFT) -#define TIME_FROM_START_MSB_REG (0x11 << MEM_MAP_SHIFT) +/* Time from Start 64 bit RO register. t = GCLK x 50 ns. Reset using + * CONTROL_CRST. TODO */ +#define TIME_FROM_START_LSB_REG (0x10 << MEM_MAP_SHIFT) +#define TIME_FROM_START_MSB_REG (0x11 << MEM_MAP_SHIFT) /* Delay Left 64 bit RO register. t = DLY x 50 ns. TODO */ -#define DELAY_LEFT_LSB_REG (0x12 << MEM_MAP_SHIFT) -#define DELAY_LEFT_MSB_REG (0x13 << MEM_MAP_SHIFT) +#define DELAY_LEFT_LSB_REG (0x12 << MEM_MAP_SHIFT) +#define DELAY_LEFT_MSB_REG (0x13 << MEM_MAP_SHIFT) /* Triggers Left 64 bit RO register TODO */ -#define CYCLES_LEFT_LSB_REG (0x14 << MEM_MAP_SHIFT) -#define CYCLES_LEFT_MSB_REG (0x15 << MEM_MAP_SHIFT) +#define CYCLES_LEFT_LSB_REG (0x14 << MEM_MAP_SHIFT) +#define CYCLES_LEFT_MSB_REG (0x15 << MEM_MAP_SHIFT) /* Frames Left 64 bit RO register TODO */ -#define FRAMES_LEFT_LSB_REG (0x16 << MEM_MAP_SHIFT) -#define FRAMES_LEFT_MSB_REG (0x17 << MEM_MAP_SHIFT) +#define FRAMES_LEFT_LSB_REG (0x16 << MEM_MAP_SHIFT) +#define FRAMES_LEFT_MSB_REG (0x17 << MEM_MAP_SHIFT) /* Period Left 64 bit RO register. t = T x 50 ns. TODO */ -#define PERIOD_LEFT_LSB_REG (0x18 << MEM_MAP_SHIFT) -#define PERIOD_LEFT_MSB_REG (0x19 << MEM_MAP_SHIFT) +#define PERIOD_LEFT_LSB_REG (0x18 << MEM_MAP_SHIFT) +#define PERIOD_LEFT_MSB_REG (0x19 << MEM_MAP_SHIFT) /* Exposure Time Left 64 bit RO register */ -//#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not used in FW -//#define EXPTIME_LEFT_MSB_REG (0x1B << MEM_MAP_SHIFT) // Not used in FW +//#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not +//used in FW #define EXPTIME_LEFT_MSB_REG (0x1B << MEM_MAP_SHIFT) +//// Not used in FW /* Gates Left 64 bit RO register */ -//#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not used in FW -//#define GATES_LEFT_MSB_REG (0x1D << MEM_MAP_SHIFT) // Not used in FW +//#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not +//used in FW #define GATES_LEFT_MSB_REG (0x1D << MEM_MAP_SHIFT) +//// Not used in FW /* Data In 64 bit RO register TODO */ -#define DATA_IN_LSB_REG (0x1E << MEM_MAP_SHIFT) -#define DATA_IN_MSB_REG (0x1F << MEM_MAP_SHIFT) +#define DATA_IN_LSB_REG (0x1E << MEM_MAP_SHIFT) +#define DATA_IN_MSB_REG (0x1F << MEM_MAP_SHIFT) /* Pattern Out 64 bit RO register */ -#define PATTERN_OUT_LSB_REG (0x20 << MEM_MAP_SHIFT) -#define PATTERN_OUT_MSB_REG (0x21 << MEM_MAP_SHIFT) +#define PATTERN_OUT_LSB_REG (0x20 << MEM_MAP_SHIFT) +#define PATTERN_OUT_MSB_REG (0x21 << MEM_MAP_SHIFT) /* Frames From Start 64 bit RO register TODO */ -//#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not used in FW -//#define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT) // Not used in FW +//#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not +//used in FW #define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT) +//// Not used in FW /* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */ -#define FRAMES_FROM_START_PG_LSB_REG (0x24 << MEM_MAP_SHIFT) -#define FRAMES_FROM_START_PG_MSB_REG (0x25 << MEM_MAP_SHIFT) +#define FRAMES_FROM_START_PG_LSB_REG (0x24 << MEM_MAP_SHIFT) +#define FRAMES_FROM_START_PG_MSB_REG (0x25 << MEM_MAP_SHIFT) -/* Start Frame Time (Measurement Time) 64 bit register (timestamp at a frame start until reset) TODO */ -#define START_FRAME_TIME_LSB_REG (0x26 << MEM_MAP_SHIFT) -#define START_FRAME_TIME_MSB_REG (0x27 << MEM_MAP_SHIFT) +/* Start Frame Time (Measurement Time) 64 bit register (timestamp at a frame + * start until reset) TODO */ +#define START_FRAME_TIME_LSB_REG (0x26 << MEM_MAP_SHIFT) +#define START_FRAME_TIME_MSB_REG (0x27 << MEM_MAP_SHIFT) /* Power Status RO register */ -#define POWER_STATUS_REG (0x29 << MEM_MAP_SHIFT) +#define POWER_STATUS_REG (0x29 << MEM_MAP_SHIFT) -#define POWER_STATUS_ALRT_OFST (27) -#define POWER_STATUS_ALRT_MSK (0x0000001F << POWER_STATUS_ALRT_OFST) +#define POWER_STATUS_ALRT_OFST (27) +#define POWER_STATUS_ALRT_MSK (0x0000001F << POWER_STATUS_ALRT_OFST) /* DAC Value Out RO register */ //#define DAC_VAL_OUT_REG (0x2A << MEM_MAP_SHIFT) /* Slow ADC SPI Value RO register */ -#define ADC_SPI_SLOW_VAL_REG (0x2B << MEM_MAP_SHIFT) +#define ADC_SPI_SLOW_VAL_REG (0x2B << MEM_MAP_SHIFT) /* FIFO Digital In Status RO register */ -#define FIFO_DIN_STATUS_REG (0x3B << MEM_MAP_SHIFT) -#define FIFO_DIN_STATUS_FIFO_FULL_OFST (30) -#define FIFO_DIN_STATUS_FIFO_FULL_MSK (0x00000001 << FIFO_DIN_STATUS_FIFO_FULL_OFST) -#define FIFO_DIN_STATUS_FIFO_EMPTY_OFST (31) -#define FIFO_DIN_STATUS_FIFO_EMPTY_MSK (0x00000001 << FIFO_DIN_STATUS_FIFO_EMPTY_OFST) +#define FIFO_DIN_STATUS_REG (0x3B << MEM_MAP_SHIFT) +#define FIFO_DIN_STATUS_FIFO_FULL_OFST (30) +#define FIFO_DIN_STATUS_FIFO_FULL_MSK \ + (0x00000001 << FIFO_DIN_STATUS_FIFO_FULL_OFST) +#define FIFO_DIN_STATUS_FIFO_EMPTY_OFST (31) +#define FIFO_DIN_STATUS_FIFO_EMPTY_MSK \ + (0x00000001 << FIFO_DIN_STATUS_FIFO_EMPTY_OFST) /* FIFO Digital In 64 bit RO register */ -#define FIFO_DIN_LSB_REG (0x3C << MEM_MAP_SHIFT) -#define FIFO_DIN_MSB_REG (0x3D << MEM_MAP_SHIFT) +#define FIFO_DIN_LSB_REG (0x3C << MEM_MAP_SHIFT) +#define FIFO_DIN_MSB_REG (0x3D << MEM_MAP_SHIFT) /* SPI (Serial Peripheral Interface) DAC, HV RW register */ -#define SPI_REG (0x40 << MEM_MAP_SHIFT) +#define SPI_REG (0x40 << MEM_MAP_SHIFT) -#define SPI_DAC_SRL_DGTL_OTPT_OFST (0) -#define SPI_DAC_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_DAC_SRL_DGTL_OTPT_OFST) -#define SPI_DAC_SRL_CLK_OTPT_OFST (1) -#define SPI_DAC_SRL_CLK_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CLK_OTPT_OFST) -#define SPI_DAC_SRL_CS_OTPT_OFST (2) -#define SPI_DAC_SRL_CS_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CS_OTPT_OFST) -#define SPI_HV_SRL_DGTL_OTPT_OFST (8) -#define SPI_HV_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_HV_SRL_DGTL_OTPT_OFST) -#define SPI_HV_SRL_CLK_OTPT_OFST (9) -#define SPI_HV_SRL_CLK_OTPT_MSK (0x00000001 << SPI_HV_SRL_CLK_OTPT_OFST) -#define SPI_HV_SRL_CS_OTPT_OFST (10) -#define SPI_HV_SRL_CS_OTPT_MSK (0x00000001 << SPI_HV_SRL_CS_OTPT_OFST) +#define SPI_DAC_SRL_DGTL_OTPT_OFST (0) +#define SPI_DAC_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_DAC_SRL_DGTL_OTPT_OFST) +#define SPI_DAC_SRL_CLK_OTPT_OFST (1) +#define SPI_DAC_SRL_CLK_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CLK_OTPT_OFST) +#define SPI_DAC_SRL_CS_OTPT_OFST (2) +#define SPI_DAC_SRL_CS_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CS_OTPT_OFST) +#define SPI_HV_SRL_DGTL_OTPT_OFST (8) +#define SPI_HV_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_HV_SRL_DGTL_OTPT_OFST) +#define SPI_HV_SRL_CLK_OTPT_OFST (9) +#define SPI_HV_SRL_CLK_OTPT_MSK (0x00000001 << SPI_HV_SRL_CLK_OTPT_OFST) +#define SPI_HV_SRL_CS_OTPT_OFST (10) +#define SPI_HV_SRL_CS_OTPT_MSK (0x00000001 << SPI_HV_SRL_CS_OTPT_OFST) /* ADC SPI (Serial Peripheral Interface) RW register */ -#define ADC_SPI_REG (0x41 << MEM_MAP_SHIFT) +#define ADC_SPI_REG (0x41 << MEM_MAP_SHIFT) -#define ADC_SPI_SRL_CLK_OTPT_OFST (0) -#define ADC_SPI_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SRL_CLK_OTPT_OFST) -#define ADC_SPI_SRL_DT_OTPT_OFST (1) -#define ADC_SPI_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SRL_DT_OTPT_OFST) -#define ADC_SPI_SRL_CS_OTPT_OFST (2) -#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SRL_CS_OTPT_OFST) -#define ADC_SPI_SLOW_SRL_DT_OFST (8) -#define ADC_SPI_SLOW_SRL_DT_MSK (0x00000001 << ADC_SPI_SLOW_SRL_DT_OFST) -#define ADC_SPI_SLOW_SRL_CLK_OFST (9) -#define ADC_SPI_SLOW_SRL_CLK_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CLK_OFST) -#define ADC_SPI_SLOW_SRL_CNV_OFST (10) -#define ADC_SPI_SLOW_SRL_CNV_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CNV_OFST) +#define ADC_SPI_SRL_CLK_OTPT_OFST (0) +#define ADC_SPI_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SRL_CLK_OTPT_OFST) +#define ADC_SPI_SRL_DT_OTPT_OFST (1) +#define ADC_SPI_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SRL_DT_OTPT_OFST) +#define ADC_SPI_SRL_CS_OTPT_OFST (2) +#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SRL_CS_OTPT_OFST) +#define ADC_SPI_SLOW_SRL_DT_OFST (8) +#define ADC_SPI_SLOW_SRL_DT_MSK (0x00000001 << ADC_SPI_SLOW_SRL_DT_OFST) +#define ADC_SPI_SLOW_SRL_CLK_OFST (9) +#define ADC_SPI_SLOW_SRL_CLK_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CLK_OFST) +#define ADC_SPI_SLOW_SRL_CNV_OFST (10) +#define ADC_SPI_SLOW_SRL_CNV_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CNV_OFST) /* ADC Offset RW register */ -#define ADC_OFFSET_REG (0x42 << MEM_MAP_SHIFT) +#define ADC_OFFSET_REG (0x42 << MEM_MAP_SHIFT) -#define ADC_OFFSET_ADC_PPLN_OFST (0) -#define ADC_OFFSET_ADC_PPLN_MSK (0x000000FF << ADC_OFFSET_ADC_PPLN_OFST) -#define ADC_OFFSET_DBT_PPLN_OFST (16) -#define ADC_OFFSET_DBT_PPLN_MSK (0x000000FF << ADC_OFFSET_DBT_PPLN_OFST) +#define ADC_OFFSET_ADC_PPLN_OFST (0) +#define ADC_OFFSET_ADC_PPLN_MSK (0x000000FF << ADC_OFFSET_ADC_PPLN_OFST) +#define ADC_OFFSET_DBT_PPLN_OFST (16) +#define ADC_OFFSET_DBT_PPLN_MSK (0x000000FF << ADC_OFFSET_DBT_PPLN_OFST) /* ADC Port Invert RW register */ -#define ADC_PORT_INVERT_REG (0x43 << MEM_MAP_SHIFT) +#define ADC_PORT_INVERT_REG (0x43 << MEM_MAP_SHIFT) -#define ADC_PORT_INVERT_0_INPT_OFST (0) -#define ADC_PORT_INVERT_0_INPT_MSK (0x000000FF << ADC_PORT_INVERT_0_INPT_OFST) -#define ADC_PORT_INVERT_1_INPT_OFST (8) -#define ADC_PORT_INVERT_1_INPT_MSK (0x000000FF << ADC_PORT_INVERT_1_INPT_OFST) -#define ADC_PORT_INVERT_2_INPT_OFST (16) -#define ADC_PORT_INVERT_2_INPT_MSK (0x000000FF << ADC_PORT_INVERT_2_INPT_OFST) -#define ADC_PORT_INVERT_3_INPT_OFST (24) -#define ADC_PORT_INVERT_3_INPT_MSK (0x000000FF << ADC_PORT_INVERT_3_INPT_OFST) +#define ADC_PORT_INVERT_0_INPT_OFST (0) +#define ADC_PORT_INVERT_0_INPT_MSK (0x000000FF << ADC_PORT_INVERT_0_INPT_OFST) +#define ADC_PORT_INVERT_1_INPT_OFST (8) +#define ADC_PORT_INVERT_1_INPT_MSK (0x000000FF << ADC_PORT_INVERT_1_INPT_OFST) +#define ADC_PORT_INVERT_2_INPT_OFST (16) +#define ADC_PORT_INVERT_2_INPT_MSK (0x000000FF << ADC_PORT_INVERT_2_INPT_OFST) +#define ADC_PORT_INVERT_3_INPT_OFST (24) +#define ADC_PORT_INVERT_3_INPT_MSK (0x000000FF << ADC_PORT_INVERT_3_INPT_OFST) /* Dummy RW register */ -#define DUMMY_REG (0x44 << MEM_MAP_SHIFT) +#define DUMMY_REG (0x44 << MEM_MAP_SHIFT) -#define DUMMY_FIFO_CHNNL_SLCT_OFST (0) -#define DUMMY_FIFO_CHNNL_SLCT_MSK (0x0000003F << DUMMY_FIFO_CHNNL_SLCT_OFST) -#define DUMMY_ANLG_FIFO_RD_STRBE_OFST (8) -#define DUMMY_ANLG_FIFO_RD_STRBE_MSK (0x00000001 << DUMMY_ANLG_FIFO_RD_STRBE_OFST) -#define DUMMY_DGTL_FIFO_RD_STRBE_OFST (9) -#define DUMMY_DGTL_FIFO_RD_STRBE_MSK (0x00000001 << DUMMY_DGTL_FIFO_RD_STRBE_OFST) +#define DUMMY_FIFO_CHNNL_SLCT_OFST (0) +#define DUMMY_FIFO_CHNNL_SLCT_MSK (0x0000003F << DUMMY_FIFO_CHNNL_SLCT_OFST) +#define DUMMY_ANLG_FIFO_RD_STRBE_OFST (8) +#define DUMMY_ANLG_FIFO_RD_STRBE_MSK \ + (0x00000001 << DUMMY_ANLG_FIFO_RD_STRBE_OFST) +#define DUMMY_DGTL_FIFO_RD_STRBE_OFST (9) +#define DUMMY_DGTL_FIFO_RD_STRBE_MSK \ + (0x00000001 << DUMMY_DGTL_FIFO_RD_STRBE_OFST) /* Receiver IP Address RW register */ -#define RX_IP_REG (0x45 << MEM_MAP_SHIFT) +#define RX_IP_REG (0x45 << MEM_MAP_SHIFT) /* UDP Port RW register */ -#define UDP_PORT_REG (0x46 << MEM_MAP_SHIFT) +#define UDP_PORT_REG (0x46 << MEM_MAP_SHIFT) -#define UDP_PORT_RX_OFST (0) -#define UDP_PORT_RX_MSK (0x0000FFFF << UDP_PORT_RX_OFST) -#define UDP_PORT_TX_OFST (16) -#define UDP_PORT_TX_MSK (0x0000FFFF << UDP_PORT_TX_OFST) +#define UDP_PORT_RX_OFST (0) +#define UDP_PORT_RX_MSK (0x0000FFFF << UDP_PORT_RX_OFST) +#define UDP_PORT_TX_OFST (16) +#define UDP_PORT_TX_MSK (0x0000FFFF << UDP_PORT_TX_OFST) /* Receiver Mac Address 64 bit RW register */ -#define RX_MAC_LSB_REG (0x47 << MEM_MAP_SHIFT) -#define RX_MAC_MSB_REG (0x48 << MEM_MAP_SHIFT) +#define RX_MAC_LSB_REG (0x47 << MEM_MAP_SHIFT) +#define RX_MAC_MSB_REG (0x48 << MEM_MAP_SHIFT) -#define RX_MAC_LSB_OFST (0) -#define RX_MAC_LSB_MSK (0xFFFFFFFF << RX_MAC_LSB_OFST) -#define RX_MAC_MSB_OFST (0) -#define RX_MAC_MSB_MSK (0x0000FFFF << RX_MAC_MSB_OFST) +#define RX_MAC_LSB_OFST (0) +#define RX_MAC_LSB_MSK (0xFFFFFFFF << RX_MAC_LSB_OFST) +#define RX_MAC_MSB_OFST (0) +#define RX_MAC_MSB_MSK (0x0000FFFF << RX_MAC_MSB_OFST) /* Detector/ Transmitter Mac Address 64 bit RW register */ -#define TX_MAC_LSB_REG (0x49 << MEM_MAP_SHIFT) -#define TX_MAC_MSB_REG (0x4A << MEM_MAP_SHIFT) +#define TX_MAC_LSB_REG (0x49 << MEM_MAP_SHIFT) +#define TX_MAC_MSB_REG (0x4A << MEM_MAP_SHIFT) -#define TX_MAC_LSB_OFST (0) -#define TX_MAC_LSB_MSK (0xFFFFFFFF << TX_MAC_LSB_OFST) -#define TX_MAC_MSB_OFST (0) -#define TX_MAC_MSB_MSK (0x0000FFFF << TX_MAC_MSB_OFST) +#define TX_MAC_LSB_OFST (0) +#define TX_MAC_LSB_MSK (0xFFFFFFFF << TX_MAC_LSB_OFST) +#define TX_MAC_MSB_OFST (0) +#define TX_MAC_MSB_MSK (0x0000FFFF << TX_MAC_MSB_OFST) /* Detector/ Transmitter IP Address RW register */ -#define TX_IP_REG (0x4B << MEM_MAP_SHIFT) +#define TX_IP_REG (0x4B << MEM_MAP_SHIFT) /* Detector/ Transmitter IP Checksum RW register */ -#define TX_IP_CHECKSUM_REG (0x4C << MEM_MAP_SHIFT) +#define TX_IP_CHECKSUM_REG (0x4C << MEM_MAP_SHIFT) -#define TX_IP_CHECKSUM_OFST (0) -#define TX_IP_CHECKSUM_MSK (0x0000FFFF << TX_IP_CHECKSUM_OFST) +#define TX_IP_CHECKSUM_OFST (0) +#define TX_IP_CHECKSUM_MSK (0x0000FFFF << TX_IP_CHECKSUM_OFST) /* Configuration RW register */ -#define CONFIG_REG (0x4D << MEM_MAP_SHIFT) +#define CONFIG_REG (0x4D << MEM_MAP_SHIFT) -#define CONFIG_LED_DSBL_OFST (0) -#define CONFIG_LED_DSBL_MSK (0x00000001 << CONFIG_LED_DSBL_OFST) -#define CONFIG_DSBL_ANLG_OTPT_OFST (8) -#define CONFIG_DSBL_ANLG_OTPT_MSK (0x00000001 << CONFIG_DSBL_ANLG_OTPT_OFST) -#define CONFIG_ENBLE_DGTL_OTPT_OFST (9) -#define CONFIG_ENBLE_DGTL_OTPT_MSK (0x00000001 << CONFIG_ENBLE_DGTL_OTPT_OFST) -#define CONFIG_GB10_SND_UDP_OFST (12) -#define CONFIG_GB10_SND_UDP_MSK (0x00000001 << CONFIG_GB10_SND_UDP_OFST) +#define CONFIG_LED_DSBL_OFST (0) +#define CONFIG_LED_DSBL_MSK (0x00000001 << CONFIG_LED_DSBL_OFST) +#define CONFIG_DSBL_ANLG_OTPT_OFST (8) +#define CONFIG_DSBL_ANLG_OTPT_MSK (0x00000001 << CONFIG_DSBL_ANLG_OTPT_OFST) +#define CONFIG_ENBLE_DGTL_OTPT_OFST (9) +#define CONFIG_ENBLE_DGTL_OTPT_MSK (0x00000001 << CONFIG_ENBLE_DGTL_OTPT_OFST) +#define CONFIG_GB10_SND_UDP_OFST (12) +#define CONFIG_GB10_SND_UDP_MSK (0x00000001 << CONFIG_GB10_SND_UDP_OFST) /* External Signal RW register */ -#define EXT_SIGNAL_REG (0x4E << MEM_MAP_SHIFT) +#define EXT_SIGNAL_REG (0x4E << MEM_MAP_SHIFT) -#define EXT_SIGNAL_OFST (0) -#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) -#define EXT_SIGNAL_AUTO_VAL ((0x0 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) -#define EXT_SIGNAL_TRGGR_VAL ((0x1 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) +#define EXT_SIGNAL_OFST (0) +#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) +#define EXT_SIGNAL_AUTO_VAL ((0x0 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) +#define EXT_SIGNAL_TRGGR_VAL ((0x1 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) /* Control RW register */ -#define CONTROL_REG (0x4F << MEM_MAP_SHIFT) +#define CONTROL_REG (0x4F << MEM_MAP_SHIFT) -#define CONTROL_STRT_ACQSTN_OFST (0) -#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST) -#define CONTROL_STP_ACQSTN_OFST (1) -#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) +#define CONTROL_STRT_ACQSTN_OFST (0) +#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST) +#define CONTROL_STP_ACQSTN_OFST (1) +#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) //#define CONTROL_STRT_FF_TST_OFST (2) -//#define CONTROL_STRT_FF_TST_MSK (0x00000001 << CONTROL_STRT_FF_TST_OFST) -//#define CONTROL_STP_FF_TST_OFST (3) -//#define CONTROL_STP_FF_TST_MSK (0x00000001 << CONTROL_STP_FF_TST_OFST) -//#define CONTROL_STRT_RDT_OFST (4) -//#define CONTROL_STRT_RDT_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) -//#define CONTROL_STP_RDT_OFST (5) -//#define CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST) -#define CONTROL_STRT_EXPSR_OFST (6) -#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST) +//#define CONTROL_STRT_FF_TST_MSK (0x00000001 << +//CONTROL_STRT_FF_TST_OFST) #define CONTROL_STP_FF_TST_OFST (3) +//#define CONTROL_STP_FF_TST_MSK (0x00000001 << +//CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4) +//#define CONTROL_STRT_RDT_MSK (0x00000001 << +//CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5) #define +//CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST) +#define CONTROL_STRT_EXPSR_OFST (6) +#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST) //#define CONTROL_STP_EXPSR_OFST (7) -//#define CONTROL_STP_EXPSR_MSK (0x00000001 << CONTROL_STP_RDT_OFST) -//#define CONTROL_STRT_TRN_OFST (8) -//#define CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) +//#define CONTROL_STP_EXPSR_MSK (0x00000001 << +//CONTROL_STP_RDT_OFST) #define CONTROL_STRT_TRN_OFST (8) #define +//CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) //#define CONTROL_STP_TRN_OFST (9) -//#define CONTROL_STP_TRN_MSK (0x00000001 << CONTROL_STP_RDT_OFST) -#define CONTROL_CRE_RST_OFST (10) -#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) -#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? -#define CONTROL_PRPHRL_RST_MSK (0x00000001 << CONTROL_PRPHRL_RST_OFST) -#define CONTROL_MMRY_RST_OFST (12) -#define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST) +//#define CONTROL_STP_TRN_MSK (0x00000001 << +//CONTROL_STP_RDT_OFST) +#define CONTROL_CRE_RST_OFST (10) +#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) +#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? +#define CONTROL_PRPHRL_RST_MSK (0x00000001 << CONTROL_PRPHRL_RST_OFST) +#define CONTROL_MMRY_RST_OFST (12) +#define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST) //#define CONTROL_PLL_RCNFG_WR_OFST (13) -//#define CONTROL_PLL_RCNFG_WR_MSK (0x00000001 << CONTROL_PLL_RCNFG_WR_OFST) -#define CONTROL_SND_10GB_PCKT_OFST (14) -#define CONTROL_SND_10GB_PCKT_MSK (0x00000001 << CONTROL_SND_10GB_PCKT_OFST) -#define CONTROL_CLR_ACQSTN_FIFO_OFST (15) -#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST) +//#define CONTROL_PLL_RCNFG_WR_MSK (0x00000001 << +//CONTROL_PLL_RCNFG_WR_OFST) +#define CONTROL_SND_10GB_PCKT_OFST (14) +#define CONTROL_SND_10GB_PCKT_MSK (0x00000001 << CONTROL_SND_10GB_PCKT_OFST) +#define CONTROL_CLR_ACQSTN_FIFO_OFST (15) +#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST) /* Reconfiguratble PLL Paramater RW register */ -#define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT) +#define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT) /* Reconfiguratble PLL Control RW regiser */ -#define PLL_CNTRL_REG (0x51 << MEM_MAP_SHIFT) +#define PLL_CNTRL_REG (0x51 << MEM_MAP_SHIFT) -#define PLL_CNTRL_RCNFG_PRMTR_RST_OFST (0) -#define PLL_CNTRL_RCNFG_PRMTR_RST_MSK (0x00000001 << PLL_CNTRL_RCNFG_PRMTR_RST_OFST) -#define PLL_CNTRL_WR_PRMTR_OFST (2) -#define PLL_CNTRL_WR_PRMTR_MSK (0x00000001 << PLL_CNTRL_WR_PRMTR_OFST) -#define PLL_CNTRL_PLL_RST_OFST (3) -#define PLL_CNTRL_PLL_RST_MSK (0x00000001 << PLL_CNTRL_PLL_RST_OFST) -#define PLL_CNTRL_ADDR_OFST (16) -#define PLL_CNTRL_ADDR_MSK (0x0000003F << PLL_CNTRL_ADDR_OFST) +#define PLL_CNTRL_RCNFG_PRMTR_RST_OFST (0) +#define PLL_CNTRL_RCNFG_PRMTR_RST_MSK \ + (0x00000001 << PLL_CNTRL_RCNFG_PRMTR_RST_OFST) +#define PLL_CNTRL_WR_PRMTR_OFST (2) +#define PLL_CNTRL_WR_PRMTR_MSK (0x00000001 << PLL_CNTRL_WR_PRMTR_OFST) +#define PLL_CNTRL_PLL_RST_OFST (3) +#define PLL_CNTRL_PLL_RST_MSK (0x00000001 << PLL_CNTRL_PLL_RST_OFST) +#define PLL_CNTRL_ADDR_OFST (16) +#define PLL_CNTRL_ADDR_MSK (0x0000003F << PLL_CNTRL_ADDR_OFST) /* Pattern Control RW register */ -#define PATTERN_CNTRL_REG (0x52 << MEM_MAP_SHIFT) +#define PATTERN_CNTRL_REG (0x52 << MEM_MAP_SHIFT) -#define PATTERN_CNTRL_WR_OFST (0) -#define PATTERN_CNTRL_WR_MSK (0x00000001 << PATTERN_CNTRL_WR_OFST) -#define PATTERN_CNTRL_RD_OFST (1) -#define PATTERN_CNTRL_RD_MSK (0x00000001 << PATTERN_CNTRL_RD_OFST) -#define PATTERN_CNTRL_ADDR_OFST (16) -#define PATTERN_CNTRL_ADDR_MSK (0x00001FFF << PATTERN_CNTRL_ADDR_OFST) +#define PATTERN_CNTRL_WR_OFST (0) +#define PATTERN_CNTRL_WR_MSK (0x00000001 << PATTERN_CNTRL_WR_OFST) +#define PATTERN_CNTRL_RD_OFST (1) +#define PATTERN_CNTRL_RD_MSK (0x00000001 << PATTERN_CNTRL_RD_OFST) +#define PATTERN_CNTRL_ADDR_OFST (16) +#define PATTERN_CNTRL_ADDR_MSK (0x00001FFF << PATTERN_CNTRL_ADDR_OFST) /* Pattern Limit RW regiser */ -#define PATTERN_LIMIT_REG (0x53 << MEM_MAP_SHIFT) +#define PATTERN_LIMIT_REG (0x53 << MEM_MAP_SHIFT) -#define PATTERN_LIMIT_STRT_OFST (0) -#define PATTERN_LIMIT_STRT_MSK (0x00001FFF << PATTERN_LIMIT_STRT_OFST) -#define PATTERN_LIMIT_STP_OFST (16) -#define PATTERN_LIMIT_STP_MSK (0x00001FFF << PATTERN_LIMIT_STP_OFST) +#define PATTERN_LIMIT_STRT_OFST (0) +#define PATTERN_LIMIT_STRT_MSK (0x00001FFF << PATTERN_LIMIT_STRT_OFST) +#define PATTERN_LIMIT_STP_OFST (16) +#define PATTERN_LIMIT_STP_MSK (0x00001FFF << PATTERN_LIMIT_STP_OFST) /* Pattern Loop 0 Address RW regiser */ -#define PATTERN_LOOP_0_ADDR_REG (0x54 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_0_ADDR_REG (0x54 << MEM_MAP_SHIFT) -#define PATTERN_LOOP_0_ADDR_STRT_OFST (0) -#define PATTERN_LOOP_0_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STRT_OFST) -#define PATTERN_LOOP_0_ADDR_STP_OFST (16) -#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STP_OFST) +#define PATTERN_LOOP_0_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_0_ADDR_STRT_MSK \ + (0x00001FFF << PATTERN_LOOP_0_ADDR_STRT_OFST) +#define PATTERN_LOOP_0_ADDR_STP_OFST (16) +#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STP_OFST) /* Pattern Loop 0 Iteration RW regiser */ -#define PATTERN_LOOP_0_ITERATION_REG (0x55 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_0_ITERATION_REG (0x55 << MEM_MAP_SHIFT) /* Pattern Loop 1 Address RW regiser */ -#define PATTERN_LOOP_1_ADDR_REG (0x56 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_1_ADDR_REG (0x56 << MEM_MAP_SHIFT) -#define PATTERN_LOOP_1_ADDR_STRT_OFST (0) -#define PATTERN_LOOP_1_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STRT_OFST) -#define PATTERN_LOOP_1_ADDR_STP_OFST (16) -#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STP_OFST) +#define PATTERN_LOOP_1_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_1_ADDR_STRT_MSK \ + (0x00001FFF << PATTERN_LOOP_1_ADDR_STRT_OFST) +#define PATTERN_LOOP_1_ADDR_STP_OFST (16) +#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STP_OFST) /* Pattern Loop 1 Iteration RW regiser */ -#define PATTERN_LOOP_1_ITERATION_REG (0x57 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_1_ITERATION_REG (0x57 << MEM_MAP_SHIFT) /* Pattern Loop 2 Address RW regiser */ -#define PATTERN_LOOP_2_ADDR_REG (0x58 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_2_ADDR_REG (0x58 << MEM_MAP_SHIFT) -#define PATTERN_LOOP_2_ADDR_STRT_OFST (0) -#define PATTERN_LOOP_2_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STRT_OFST) -#define PATTERN_LOOP_2_ADDR_STP_OFST (16) -#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STP_OFST) +#define PATTERN_LOOP_2_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_2_ADDR_STRT_MSK \ + (0x00001FFF << PATTERN_LOOP_2_ADDR_STRT_OFST) +#define PATTERN_LOOP_2_ADDR_STP_OFST (16) +#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STP_OFST) /* Pattern Loop 2 Iteration RW regiser */ -#define PATTERN_LOOP_2_ITERATION_REG (0x59 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_2_ITERATION_REG (0x59 << MEM_MAP_SHIFT) /* Pattern Wait 0 RW regiser */ -#define PATTERN_WAIT_0_ADDR_REG (0x5A << MEM_MAP_SHIFT) +#define PATTERN_WAIT_0_ADDR_REG (0x5A << MEM_MAP_SHIFT) -#define PATTERN_WAIT_0_ADDR_OFST (0) -#define PATTERN_WAIT_0_ADDR_MSK (0x00001FFF << PATTERN_WAIT_0_ADDR_OFST) -//FIXME: is mask 3FF +#define PATTERN_WAIT_0_ADDR_OFST (0) +#define PATTERN_WAIT_0_ADDR_MSK (0x00001FFF << PATTERN_WAIT_0_ADDR_OFST) +// FIXME: is mask 3FF /* Pattern Wait 1 RW regiser */ -#define PATTERN_WAIT_1_ADDR_REG (0x5B << MEM_MAP_SHIFT) +#define PATTERN_WAIT_1_ADDR_REG (0x5B << MEM_MAP_SHIFT) -#define PATTERN_WAIT_1_ADDR_OFST (0) -#define PATTERN_WAIT_1_ADDR_MSK (0x00001FFF << PATTERN_WAIT_1_ADDR_OFST) +#define PATTERN_WAIT_1_ADDR_OFST (0) +#define PATTERN_WAIT_1_ADDR_MSK (0x00001FFF << PATTERN_WAIT_1_ADDR_OFST) /* Pattern Wait 2 RW regiser */ -#define PATTERN_WAIT_2_ADDR_REG (0x5C << MEM_MAP_SHIFT) +#define PATTERN_WAIT_2_ADDR_REG (0x5C << MEM_MAP_SHIFT) -#define PATTERN_WAIT_2_ADDR_OFST (0) -#define PATTERN_WAIT_2_ADDR_MSK (0x00001FFF << PATTERN_WAIT_2_ADDR_OFST) +#define PATTERN_WAIT_2_ADDR_OFST (0) +#define PATTERN_WAIT_2_ADDR_MSK (0x00001FFF << PATTERN_WAIT_2_ADDR_OFST) /* Samples RW register */ -#define SAMPLES_REG (0x5D << MEM_MAP_SHIFT) +#define SAMPLES_REG (0x5D << MEM_MAP_SHIFT) -#define SAMPLES_DIGITAL_OFST (0) -#define SAMPLES_DIGITAL_MSK (0x0000FFFF << SAMPLES_DIGITAL_OFST) -#define SAMPLES_ANALOG_OFST (16) -#define SAMPLES_ANALOG_MSK (0x0000FFFF << SAMPLES_ANALOG_OFST) +#define SAMPLES_DIGITAL_OFST (0) +#define SAMPLES_DIGITAL_MSK (0x0000FFFF << SAMPLES_DIGITAL_OFST) +#define SAMPLES_ANALOG_OFST (16) +#define SAMPLES_ANALOG_MSK (0x0000FFFF << SAMPLES_ANALOG_OFST) /** Power RW register */ -#define POWER_REG (0x5E << MEM_MAP_SHIFT) +#define POWER_REG (0x5E << MEM_MAP_SHIFT) -#define POWER_ENBL_VLTG_RGLTR_OFST (16) -#define POWER_ENBL_VLTG_RGLTR_MSK (0x0000001F << POWER_ENBL_VLTG_RGLTR_OFST) -#define POWER_HV_INTERNAL_SLCT_OFST (31) -#define POWER_HV_INTERNAL_SLCT_MSK (0x00000001 << POWER_HV_INTERNAL_SLCT_OFST) +#define POWER_ENBL_VLTG_RGLTR_OFST (16) +#define POWER_ENBL_VLTG_RGLTR_MSK (0x0000001F << POWER_ENBL_VLTG_RGLTR_OFST) +#define POWER_HV_INTERNAL_SLCT_OFST (31) +#define POWER_HV_INTERNAL_SLCT_MSK (0x00000001 << POWER_HV_INTERNAL_SLCT_OFST) /* Number of Words RW register TODO */ -#define NUMBER_OF_WORDS_REG (0x5F << MEM_MAP_SHIFT) - +#define NUMBER_OF_WORDS_REG (0x5F << MEM_MAP_SHIFT) /* Delay 64 bit RW register. t = DLY x 50 ns. */ -#define DELAY_LSB_REG (0x60 << MEM_MAP_SHIFT) -#define DELAY_MSB_REG (0x61 << MEM_MAP_SHIFT) +#define DELAY_LSB_REG (0x60 << MEM_MAP_SHIFT) +#define DELAY_MSB_REG (0x61 << MEM_MAP_SHIFT) /* Triggers 64 bit RW register */ -#define CYCLES_LSB_REG (0x62 << MEM_MAP_SHIFT) -#define CYCLES_MSB_REG (0x63 << MEM_MAP_SHIFT) +#define CYCLES_LSB_REG (0x62 << MEM_MAP_SHIFT) +#define CYCLES_MSB_REG (0x63 << MEM_MAP_SHIFT) /* Frames 64 bit RW register */ -#define FRAMES_LSB_REG (0x64 << MEM_MAP_SHIFT) -#define FRAMES_MSB_REG (0x65 << MEM_MAP_SHIFT) +#define FRAMES_LSB_REG (0x64 << MEM_MAP_SHIFT) +#define FRAMES_MSB_REG (0x65 << MEM_MAP_SHIFT) /* Period 64 bit RW register */ -#define PERIOD_LSB_REG (0x66 << MEM_MAP_SHIFT) -#define PERIOD_MSB_REG (0x67 << MEM_MAP_SHIFT) +#define PERIOD_LSB_REG (0x66 << MEM_MAP_SHIFT) +#define PERIOD_MSB_REG (0x67 << MEM_MAP_SHIFT) /* Period 64 bit RW register */ -//#define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) // Not used in FW -//#define EXPTIME_MSB_REG (0x69 << MEM_MAP_SHIFT) // Not used in FW +//#define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) // +//Not used in FW #define EXPTIME_MSB_REG (0x69 << +//MEM_MAP_SHIFT) // Not used in FW /* Gates 64 bit RW register */ -//#define GATES_LSB_REG (0x6A << MEM_MAP_SHIFT) // Not used in FW -//#define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) // Not used in FW +//#define GATES_LSB_REG (0x6A << MEM_MAP_SHIFT) // Not used +//in FW #define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) // +//Not used in FW /* Pattern IO Control 64 bit RW regiser * Each bit configured as output(1)/ input(0) */ -#define PATTERN_IO_CNTRL_LSB_REG (0x6C << MEM_MAP_SHIFT) -#define PATTERN_IO_CNTRL_MSB_REG (0x6D << MEM_MAP_SHIFT) +#define PATTERN_IO_CNTRL_LSB_REG (0x6C << MEM_MAP_SHIFT) +#define PATTERN_IO_CNTRL_MSB_REG (0x6D << MEM_MAP_SHIFT) /* Pattern IO Clock Control 64 bit RW regiser * When bit n enabled (1), clocked output for DIO[n] (T run clock) * When bit n disabled (0), Dio[n] driven by its pattern output */ -#define PATTERN_IO_CLK_CNTRL_LSB_REG (0x6E << MEM_MAP_SHIFT) -#define PATTERN_IO_CLK_CNTRL_MSB_REG (0x6F << MEM_MAP_SHIFT) +#define PATTERN_IO_CLK_CNTRL_LSB_REG (0x6E << MEM_MAP_SHIFT) +#define PATTERN_IO_CLK_CNTRL_MSB_REG (0x6F << MEM_MAP_SHIFT) /* Pattern In 64 bit RW register */ -#define PATTERN_IN_LSB_REG (0x70 << MEM_MAP_SHIFT) -#define PATTERN_IN_MSB_REG (0x71 << MEM_MAP_SHIFT) +#define PATTERN_IN_LSB_REG (0x70 << MEM_MAP_SHIFT) +#define PATTERN_IN_MSB_REG (0x71 << MEM_MAP_SHIFT) /* Pattern Wait Timer 0 64 bit RW register. t = PWT1 x T run clock */ -#define PATTERN_WAIT_TIMER_0_LSB_REG (0x72 << MEM_MAP_SHIFT) -#define PATTERN_WAIT_TIMER_0_MSB_REG (0x73 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_0_LSB_REG (0x72 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_0_MSB_REG (0x73 << MEM_MAP_SHIFT) /* Pattern Wait Timer 1 64 bit RW register. t = PWT2 x T run clock */ -#define PATTERN_WAIT_TIMER_1_LSB_REG (0x74 << MEM_MAP_SHIFT) -#define PATTERN_WAIT_TIMER_1_MSB_REG (0x75 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_1_LSB_REG (0x74 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_1_MSB_REG (0x75 << MEM_MAP_SHIFT) /* Pattern Wait Timer 2 64 bit RW register. t = PWT3 x T run clock */ -#define PATTERN_WAIT_TIMER_2_LSB_REG (0x76 << MEM_MAP_SHIFT) -#define PATTERN_WAIT_TIMER_2_MSB_REG (0x77 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_2_LSB_REG (0x76 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_2_MSB_REG (0x77 << MEM_MAP_SHIFT) /* Readout enable RW register */ -#define READOUT_10G_ENABLE_REG (0x79 << MEM_MAP_SHIFT) - -#define READOUT_10G_ENABLE_ANLG_OFST (0) -#define READOUT_10G_ENABLE_ANLG_MSK (0x000000FF << READOUT_10G_ENABLE_ANLG_OFST) -#define READOUT_10G_ENABLE_DGTL_OFST (8) -#define READOUT_10G_ENABLE_DGTL_MSK (0x00000001 << READOUT_10G_ENABLE_DGTL_OFST) +#define READOUT_10G_ENABLE_REG (0x79 << MEM_MAP_SHIFT) +#define READOUT_10G_ENABLE_ANLG_OFST (0) +#define READOUT_10G_ENABLE_ANLG_MSK (0x000000FF << READOUT_10G_ENABLE_ANLG_OFST) +#define READOUT_10G_ENABLE_DGTL_OFST (8) +#define READOUT_10G_ENABLE_DGTL_MSK (0x00000001 << READOUT_10G_ENABLE_DGTL_OFST) /* Digital Bit External Trigger RW register */ -#define DBIT_EXT_TRG_REG (0x7B << MEM_MAP_SHIFT) +#define DBIT_EXT_TRG_REG (0x7B << MEM_MAP_SHIFT) -#define DBIT_EXT_TRG_SRC_OFST (0) -#define DBIT_EXT_TRG_SRC_MSK (0x0000003F << DBIT_EXT_TRG_SRC_OFST) -#define DBIT_EXT_TRG_OPRTN_MD_OFST (16) -#define DBIT_EXT_TRG_OPRTN_MD_MSK (0x00000001 << DBIT_EXT_TRG_OPRTN_MD_OFST) +#define DBIT_EXT_TRG_SRC_OFST (0) +#define DBIT_EXT_TRG_SRC_MSK (0x0000003F << DBIT_EXT_TRG_SRC_OFST) +#define DBIT_EXT_TRG_OPRTN_MD_OFST (16) +#define DBIT_EXT_TRG_OPRTN_MD_MSK (0x00000001 << DBIT_EXT_TRG_OPRTN_MD_OFST) /* Pin Delay 0 RW register */ -#define OUTPUT_DELAY_0_REG (0x7C << MEM_MAP_SHIFT) -#define OUTPUT_DELAY_0_OTPT_STTNG_STEPS (25) -#define OUTPUT_DELAY_0_OTPT_STTNG_OFST (0) //t = OTPT_STTNG * 25 ps, max for Cyclone V = 775 ps -#define OUTPUT_DELAY_0_OTPT_STTNG_MSK (0x0000001F << OUTPUT_DELAY_0_OTPT_STTNG_OFST) -// 1: load dynamic output settings, 0: trigger start of dynamic output delay configuration pn falling edge of ODT (output delay trigger) bit -#define OUTPUT_DELAY_0_OTPT_TRGGR_OFST (31) -#define OUTPUT_DELAY_0_OTPT_TRGGR_MSK (0x00000001 << OUTPUT_DELAY_0_OTPT_TRGGR_OFST) -#define OUTPUT_DELAY_0_OTPT_TRGGR_LD_VAL (1) -#define OUTPUT_DELAY_0_OTPT_TRGGR_STRT_VAL (0) +#define OUTPUT_DELAY_0_REG (0x7C << MEM_MAP_SHIFT) +#define OUTPUT_DELAY_0_OTPT_STTNG_STEPS (25) +#define OUTPUT_DELAY_0_OTPT_STTNG_OFST \ + (0) // t = OTPT_STTNG * 25 ps, max for Cyclone V = 775 ps +#define OUTPUT_DELAY_0_OTPT_STTNG_MSK \ + (0x0000001F << OUTPUT_DELAY_0_OTPT_STTNG_OFST) +// 1: load dynamic output settings, 0: trigger start of dynamic output delay +// configuration pn falling edge of ODT (output delay trigger) bit +#define OUTPUT_DELAY_0_OTPT_TRGGR_OFST (31) +#define OUTPUT_DELAY_0_OTPT_TRGGR_MSK \ + (0x00000001 << OUTPUT_DELAY_0_OTPT_TRGGR_OFST) +#define OUTPUT_DELAY_0_OTPT_TRGGR_LD_VAL (1) +#define OUTPUT_DELAY_0_OTPT_TRGGR_STRT_VAL (0) /* Pin Delay 1 RW register * Each bit configured as enable for dynamic output delay configuration */ -#define PIN_DELAY_1_REG (0x7D << MEM_MAP_SHIFT) +#define PIN_DELAY_1_REG (0x7D << MEM_MAP_SHIFT) /** Pattern Mask 64 bit RW regiser */ -#define PATTERN_MASK_LSB_REG (0x80 << MEM_MAP_SHIFT) -#define PATTERN_MASK_MSB_REG (0x81 << MEM_MAP_SHIFT) +#define PATTERN_MASK_LSB_REG (0x80 << MEM_MAP_SHIFT) +#define PATTERN_MASK_MSB_REG (0x81 << MEM_MAP_SHIFT) /** Pattern Set 64 bit RW regiser */ -#define PATTERN_SET_LSB_REG (0x82 << MEM_MAP_SHIFT) -#define PATTERN_SET_MSB_REG (0x83 << MEM_MAP_SHIFT) +#define PATTERN_SET_LSB_REG (0x82 << MEM_MAP_SHIFT) +#define PATTERN_SET_MSB_REG (0x83 << MEM_MAP_SHIFT) /** I2C Control register */ -#define I2C_TRANSFER_COMMAND_FIFO_REG (0x100 << MEM_MAP_SHIFT) -#define I2C_RX_DATA_FIFO_REG (0x101 << MEM_MAP_SHIFT) -#define I2C_CONTROL_REG (0x102 << MEM_MAP_SHIFT) -#define I2C_STATUS_REG (0x105 << MEM_MAP_SHIFT) -#define I2C_RX_DATA_FIFO_LEVEL_REG (0x107 << MEM_MAP_SHIFT) -#define I2C_SCL_LOW_COUNT_REG (0x108 << MEM_MAP_SHIFT) -#define I2C_SCL_HIGH_COUNT_REG (0x109 << MEM_MAP_SHIFT) -#define I2C_SDA_HOLD_REG (0x10A << MEM_MAP_SHIFT) -//fixme: upto 0x10f +#define I2C_TRANSFER_COMMAND_FIFO_REG (0x100 << MEM_MAP_SHIFT) +#define I2C_RX_DATA_FIFO_REG (0x101 << MEM_MAP_SHIFT) +#define I2C_CONTROL_REG (0x102 << MEM_MAP_SHIFT) +#define I2C_STATUS_REG (0x105 << MEM_MAP_SHIFT) +#define I2C_RX_DATA_FIFO_LEVEL_REG (0x107 << MEM_MAP_SHIFT) +#define I2C_SCL_LOW_COUNT_REG (0x108 << MEM_MAP_SHIFT) +#define I2C_SCL_HIGH_COUNT_REG (0x109 << MEM_MAP_SHIFT) +#define I2C_SDA_HOLD_REG (0x10A << MEM_MAP_SHIFT) +// fixme: upto 0x10f /* Round Robin */ -#define RXR_ENDPOINT_START_REG (0x1000 << MEM_MAP_SHIFT) - - - +#define RXR_ENDPOINT_START_REG (0x1000 << MEM_MAP_SHIFT) diff --git a/slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h old mode 100755 new mode 100644 index 90627c811..7f3d4f052 --- a/slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h @@ -1,112 +1,158 @@ #pragma once -#include "sls_detector_defs.h" #include "RegisterDefs.h" +#include "sls_detector_defs.h" +#define MIN_REQRD_VRSN_T_RD_API 0x181130 +#define REQRD_FRMWR_VRSN 0x191127 -#define MIN_REQRD_VRSN_T_RD_API 0x181130 -#define REQRD_FRMWR_VRSN 0x191127 - -#define CTRL_SRVR_INIT_TIME_US (2 * 1000 * 1000) +#define CTRL_SRVR_INIT_TIME_US (2 * 1000 * 1000) /* Struct Definitions */ typedef struct udp_header_struct { - uint32_t udp_destmac_msb; - uint16_t udp_srcmac_msb; - uint16_t udp_destmac_lsb; - uint32_t udp_srcmac_lsb; - uint8_t ip_tos; - uint8_t ip_ihl: 4, ip_ver: 4; - uint16_t udp_ethertype; - uint16_t ip_identification; - uint16_t ip_totallength; - uint8_t ip_protocol; - uint8_t ip_ttl; - uint16_t ip_fragmentoffset: 13, ip_flags: 3; - uint16_t ip_srcip_msb; - uint16_t ip_checksum; - uint16_t ip_destip_msb; - uint16_t ip_srcip_lsb; - uint16_t udp_srcport; - uint16_t ip_destip_lsb; - uint16_t udp_checksum; - uint16_t udp_destport; + uint32_t udp_destmac_msb; + uint16_t udp_srcmac_msb; + uint16_t udp_destmac_lsb; + uint32_t udp_srcmac_lsb; + uint8_t ip_tos; + uint8_t ip_ihl : 4, ip_ver : 4; + uint16_t udp_ethertype; + uint16_t ip_identification; + uint16_t ip_totallength; + uint8_t ip_protocol; + uint8_t ip_ttl; + uint16_t ip_fragmentoffset : 13, ip_flags : 3; + uint16_t ip_srcip_msb; + uint16_t ip_checksum; + uint16_t ip_destip_msb; + uint16_t ip_srcip_lsb; + uint16_t udp_srcport; + uint16_t ip_destip_lsb; + uint16_t udp_checksum; + uint16_t udp_destport; } udp_header; -#define IP_HEADER_SIZE (20) -#define UDP_IP_HEADER_LENGTH_BYTES (28) +#define IP_HEADER_SIZE (20) +#define UDP_IP_HEADER_LENGTH_BYTES (28) /* Enums */ -enum ADCINDEX {V_PWR_IO, V_PWR_A, V_PWR_B, V_PWR_C, V_PWR_D, I_PWR_IO, I_PWR_A, I_PWR_B, I_PWR_C, I_PWR_D, S_ADC0, S_ADC1, S_ADC2, S_ADC3, S_ADC4, S_ADC5, S_ADC6, S_ADC7, S_TMP}; -enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, - D10, D11, D12, D13, D14, D15, D16, D17, - D_PWR_D, D_PWR_CHIP, D_PWR_C, D_PWR_B, D_PWR_A, D_PWR_IO}; -enum CLKINDEX {RUN_CLK, ADC_CLK, SYNC_CLK, DBIT_CLK, NUM_CLOCKS}; -#define CLK_NAMES "run", "adc", "sync", "dbit" +enum ADCINDEX { + V_PWR_IO, + V_PWR_A, + V_PWR_B, + V_PWR_C, + V_PWR_D, + I_PWR_IO, + I_PWR_A, + I_PWR_B, + I_PWR_C, + I_PWR_D, + S_ADC0, + S_ADC1, + S_ADC2, + S_ADC3, + S_ADC4, + S_ADC5, + S_ADC6, + S_ADC7, + S_TMP +}; +enum DACINDEX { + D0, + D1, + D2, + D3, + D4, + D5, + D6, + D7, + D8, + D9, + D10, + D11, + D12, + D13, + D14, + D15, + D16, + D17, + D_PWR_D, + D_PWR_CHIP, + D_PWR_C, + D_PWR_B, + D_PWR_A, + D_PWR_IO +}; +enum CLKINDEX { RUN_CLK, ADC_CLK, SYNC_CLK, DBIT_CLK, NUM_CLOCKS }; +#define CLK_NAMES "run", "adc", "sync", "dbit" /* Hardware Definitions */ -#define NCHAN (36) -#define NCHAN_ANALOG (32) -#define NCHAN_DIGITAL (64) -#define NCHIP (1) -#define NDAC (24) -#define NPWR (6) -#define NDAC_ONLY (NDAC - NPWR) -#define DYNAMIC_RANGE (16) -#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8) -#define CLK_FREQ (156.25) /* MHz */ -#define I2C_POWER_VIO_DEVICE_ID (0x40) -#define I2C_POWER_VA_DEVICE_ID (0x41) -#define I2C_POWER_VB_DEVICE_ID (0x42) -#define I2C_POWER_VC_DEVICE_ID (0x43) -#define I2C_POWER_VD_DEVICE_ID (0x44) -#define I2C_SHUNT_RESISTER_OHMS (0.005) +#define NCHAN (36) +#define NCHAN_ANALOG (32) +#define NCHAN_DIGITAL (64) +#define NCHIP (1) +#define NDAC (24) +#define NPWR (6) +#define NDAC_ONLY (NDAC - NPWR) +#define DYNAMIC_RANGE (16) +#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8) +#define CLK_FREQ (156.25) /* MHz */ +#define I2C_POWER_VIO_DEVICE_ID (0x40) +#define I2C_POWER_VA_DEVICE_ID (0x41) +#define I2C_POWER_VB_DEVICE_ID (0x42) +#define I2C_POWER_VC_DEVICE_ID (0x43) +#define I2C_POWER_VD_DEVICE_ID (0x44) +#define I2C_SHUNT_RESISTER_OHMS (0.005) /** Default Parameters */ -#define DEFAULT_DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL) -#define DEFAULT_NUM_SAMPLES (1) -#define DEFAULT_NUM_FRAMES (1) -#define DEFAULT_EXPTIME (0) -#define DEFAULT_NUM_CYCLES (1) -#define DEFAULT_PERIOD (1 * 1000 * 1000) //ns -#define DEFAULT_DELAY (0) -#define DEFAULT_HIGH_VOLTAGE (0) -#define DEFAULT_VLIMIT (-100) -#define DEFAULT_TIMING_MODE (AUTO_TIMING) -#define DEFAULT_TX_UDP_PORT (0x7e9a) -#define DEFAULT_RUN_CLK (200) // 40 -#define DEFAULT_ADC_CLK (40) // 20 -#define DEFAULT_SYNC_CLK (40) // 20 -#define DEFAULT_DBIT_CLK (200) +#define DEFAULT_DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL) +#define DEFAULT_NUM_SAMPLES (1) +#define DEFAULT_NUM_FRAMES (1) +#define DEFAULT_EXPTIME (0) +#define DEFAULT_NUM_CYCLES (1) +#define DEFAULT_PERIOD (1 * 1000 * 1000) // ns +#define DEFAULT_DELAY (0) +#define DEFAULT_HIGH_VOLTAGE (0) +#define DEFAULT_VLIMIT (-100) +#define DEFAULT_TIMING_MODE (AUTO_TIMING) +#define DEFAULT_TX_UDP_PORT (0x7e9a) +#define DEFAULT_RUN_CLK (200) // 40 +#define DEFAULT_ADC_CLK (40) // 20 +#define DEFAULT_SYNC_CLK (40) // 20 +#define DEFAULT_DBIT_CLK (200) -#define HIGHVOLTAGE_MIN (60) -#define HIGHVOLTAGE_MAX (200) // min dac val -#define DAC_MIN_MV (0) -#define DAC_MAX_MV (2500) -#define VCHIP_MIN_MV (1673) -#define VCHIP_MAX_MV (2668) // min dac val -#define POWER_RGLTR_MIN (636) -#define POWER_RGLTR_MAX (2638) // min dac val (not vchip-max) because of dac conversions -#define VCHIP_POWER_INCRMNT (200) -#define VIO_MIN_MV (1200) // for fpga to function +#define HIGHVOLTAGE_MIN (60) +#define HIGHVOLTAGE_MAX (200) // min dac val +#define DAC_MIN_MV (0) +#define DAC_MAX_MV (2500) +#define VCHIP_MIN_MV (1673) +#define VCHIP_MAX_MV (2668) // min dac val +#define POWER_RGLTR_MIN (636) +#define POWER_RGLTR_MAX \ + (2638) // min dac val (not vchip-max) because of dac conversions +#define VCHIP_POWER_INCRMNT (200) +#define VIO_MIN_MV (1200) // for fpga to function /* Defines in the Firmware */ -#define MAX_PATTERN_LENGTH (0x2000) -#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS) -#define MAX_PHASE_SHIFTS_STEPS (8) +#define MAX_PATTERN_LENGTH (0x2000) +#define DIGITAL_IO_DELAY_MAXIMUM_PS \ + ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * \ + OUTPUT_DELAY_0_OTPT_STTNG_STEPS) +#define MAX_PHASE_SHIFTS_STEPS (8) -#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo -#define WAIT_TIME_US_PLL (10 * 1000) -#define WAIT_TIME_US_STP_ACQ (100) -#define WAIT_TIME_CONFIGURE_MAC (2 * 1000 * 1000) -#define WAIT_TIME_PATTERN_READ (10) -#define WAIT_TIME_1US_FOR_LOOP_CNT (50) // around 30 is 1 us in blackfin +#define WAIT_TME_US_FR_ACQDONE_REG \ + (100) // wait time in us after acquisition done to ensure there is no data + // in fifo +#define WAIT_TIME_US_PLL (10 * 1000) +#define WAIT_TIME_US_STP_ACQ (100) +#define WAIT_TIME_CONFIGURE_MAC (2 * 1000 * 1000) +#define WAIT_TIME_PATTERN_READ (10) +#define WAIT_TIME_1US_FOR_LOOP_CNT (50) // around 30 is 1 us in blackfin /* MSB & LSB DEFINES */ -#define MSB_OF_64_BIT_REG_OFST (32) -#define LSB_OF_64_BIT_REG_OFST (0) -#define BIT32_MSK (0xFFFFFFFF) -#define BIT16_MASK (0xFFFF) - -#define MAXIMUM_ADC_CLK (65) -#define PLL_VCO_FREQ_MHZ (800) +#define MSB_OF_64_BIT_REG_OFST (32) +#define LSB_OF_64_BIT_REG_OFST (0) +#define BIT32_MSK (0xFFFFFFFF) +#define BIT16_MASK (0xFFFF) +#define MAXIMUM_ADC_CLK (65) +#define PLL_VCO_FREQ_MHZ (800) diff --git a/slsDetectorServers/eigerDetectorServer/Beb.h b/slsDetectorServers/eigerDetectorServer/Beb.h old mode 100755 new mode 100644 index 594ff7f1a..4cb84b807 --- a/slsDetectorServers/eigerDetectorServer/Beb.h +++ b/slsDetectorServers/eigerDetectorServer/Beb.h @@ -1,40 +1,39 @@ #pragma once - #include "LocalLinkInterface.h" #include "slsDetectorServer_defs.h" - -struct BebInfo{ - unsigned int beb_number; - unsigned int serial_address; - char src_mac_1GbE[50]; - char src_mac_10GbE[50]; - char src_ip_1GbE[50]; - char src_ip_10GbE[50]; - unsigned int src_port_1GbE; - unsigned int src_port_10GbE; +struct BebInfo { + unsigned int beb_number; + unsigned int serial_address; + char src_mac_1GbE[50]; + char src_mac_10GbE[50]; + char src_ip_1GbE[50]; + char src_ip_10GbE[50]; + unsigned int src_port_1GbE; + unsigned int src_port_10GbE; }; - -void BebInfo_BebInfo(struct BebInfo* bebInfo, unsigned int beb_num); -void BebInfo_BebDstInfo(struct BebInfo* bebInfo, unsigned int beb_num); -int BebInfo_SetSerialAddress(struct BebInfo* bebInfo, unsigned int add); -int BebInfo_SetHeaderInfo(struct BebInfo* bebInfo, int ten_gig, char* src_mac, char* src_ip, unsigned int src_port);//src_port fixed 42000+beb_number or 52000 + beb_number); -unsigned int BebInfo_GetBebNumber(struct BebInfo* bebInfo); -unsigned int BebInfo_GetSerialAddress(struct BebInfo* bebInfo); -char* BebInfo_GetSrcMAC(struct BebInfo* bebInfo, int ten_gig); -char* BebInfo_GetSrcIP(struct BebInfo* bebInfo, int ten_gig); -unsigned int BebInfo_GetSrcPort(struct BebInfo* bebInfo, int ten_gig); -void BebInfo_Print(struct BebInfo* bebInfo); +void BebInfo_BebInfo(struct BebInfo *bebInfo, unsigned int beb_num); +void BebInfo_BebDstInfo(struct BebInfo *bebInfo, unsigned int beb_num); +int BebInfo_SetSerialAddress(struct BebInfo *bebInfo, unsigned int add); +int BebInfo_SetHeaderInfo( + struct BebInfo *bebInfo, int ten_gig, char *src_mac, char *src_ip, + unsigned int + src_port); // src_port fixed 42000+beb_number or 52000 + beb_number); +unsigned int BebInfo_GetBebNumber(struct BebInfo *bebInfo); +unsigned int BebInfo_GetSerialAddress(struct BebInfo *bebInfo); +char *BebInfo_GetSrcMAC(struct BebInfo *bebInfo, int ten_gig); +char *BebInfo_GetSrcIP(struct BebInfo *bebInfo, int ten_gig); +unsigned int BebInfo_GetSrcPort(struct BebInfo *bebInfo, int ten_gig); +void BebInfo_Print(struct BebInfo *bebInfo); void Beb_ClearBebInfos(); int Beb_InitBebInfos(); int Beb_CheckSourceStuffBebInfo(); unsigned int Beb_GetBebInfoIndex(unsigned int beb_numb); - -void Beb_GetModuleConfiguration(int* master, int* top, int* normal); -int Beb_IsTransmitting(int* retval, int tengiga, int waitForDelay); +void Beb_GetModuleConfiguration(int *master, int *top, int *normal); +int Beb_IsTransmitting(int *retval, int tengiga, int waitForDelay); int Beb_SetMasterViaSoftware(); int Beb_SetSlaveViaSoftware(); @@ -56,27 +55,43 @@ u_int32_t Beb_GetFirmwareRevision(); u_int32_t Beb_GetFirmwareSoftwareAPIVersion(); void Beb_ResetFrameNumber(); int Beb_WriteTo(unsigned int index); -int Beb_SetMAC(char* mac, uint8_t* dst_ptr); -int Beb_SetIP(char* ip, uint8_t* dst_ptr); -int Beb_SetPortNumber(unsigned int port_number, uint8_t* dst_ptr); +int Beb_SetMAC(char *mac, uint8_t *dst_ptr); +int Beb_SetIP(char *ip, uint8_t *dst_ptr); +int Beb_SetPortNumber(unsigned int port_number, uint8_t *dst_ptr); void Beb_AdjustIPChecksum(struct udp_header_type *ip); -int Beb_SetHeaderData(unsigned int beb_number, int ten_gig, char* dst_mac, char* dst_ip, unsigned int dst_port); -int Beb_SetHeaderData1(char* src_mac, char* src_ip, unsigned int src_port, char* dst_mac, char* dst_ip, unsigned int dst_port); +int Beb_SetHeaderData(unsigned int beb_number, int ten_gig, char *dst_mac, + char *dst_ip, unsigned int dst_port); +int Beb_SetHeaderData1(char *src_mac, char *src_ip, unsigned int src_port, + char *dst_mac, char *dst_ip, unsigned int dst_port); void Beb_SwapDataFun(int little_endian, unsigned int n, unsigned int *d); int Beb_SetByteOrder(); void Beb_Beb(); -int Beb_SetBebSrcHeaderInfos(unsigned int beb_number, int ten_gig, char* src_mac, char* src_ip, unsigned int src_port); -int Beb_SetUpUDPHeader(unsigned int beb_number, int ten_gig, unsigned int header_number, char* dst_mac, char* dst_ip, unsigned int dst_port); +int Beb_SetBebSrcHeaderInfos(unsigned int beb_number, int ten_gig, + char *src_mac, char *src_ip, + unsigned int src_port); +int Beb_SetUpUDPHeader(unsigned int beb_number, int ten_gig, + unsigned int header_number, char *dst_mac, char *dst_ip, + unsigned int dst_port); -/*int Beb_SendMultiReadRequest(unsigned int beb_number, unsigned int left_right, int ten_gig, unsigned int dst_number, unsigned int npackets, unsigned int packet_size, int stop_read_when_fifo_empty=1);*/ -int Beb_SendMultiReadRequest(unsigned int beb_number, unsigned int left_right, int ten_gig, unsigned int dst_number, unsigned int npackets, unsigned int packet_size, int stop_read_when_fifo_empty); +/*int Beb_SendMultiReadRequest(unsigned int beb_number, unsigned int + * left_right, int ten_gig, unsigned int dst_number, unsigned int npackets, + * unsigned int packet_size, int stop_read_when_fifo_empty=1);*/ +int Beb_SendMultiReadRequest(unsigned int beb_number, unsigned int left_right, + int ten_gig, unsigned int dst_number, + unsigned int npackets, unsigned int packet_size, + int stop_read_when_fifo_empty); int Beb_StopAcquisition(); int Beb_SetUpTransferParameters(short the_bit_mode); -/*int Beb_RequestNImages(unsigned int beb_number, unsigned int left_right, int ten_gig, unsigned int dst_number, unsigned int nimages, int test_just_send_out_packets_no_wait=0); //all images go to the same destination!*/ -int Beb_RequestNImages(unsigned int beb_number, int ten_gig, unsigned int dst_number, unsigned int nimages, int test_just_send_out_packets_no_wait); +/*int Beb_RequestNImages(unsigned int beb_number, unsigned int left_right, int + * ten_gig, unsigned int dst_number, unsigned int nimages, int + * test_just_send_out_packets_no_wait=0); //all images go to the same + * destination!*/ +int Beb_RequestNImages(unsigned int beb_number, int ten_gig, + unsigned int dst_number, unsigned int nimages, + int test_just_send_out_packets_no_wait); int Beb_Test(unsigned int beb_number); @@ -85,17 +100,15 @@ int Beb_GetBebFPGATemp(); void Beb_SetDetectorNumber(uint32_t detid); int Beb_SetQuad(int value); int Beb_GetQuad(); -int* Beb_GetDetectorPosition(); +int *Beb_GetDetectorPosition(); int Beb_SetDetectorPosition(int pos[]); int Beb_SetStartingFrameNumber(uint64_t value); -int Beb_GetStartingFrameNumber(uint64_t* retval, int tengigaEnable); +int Beb_GetStartingFrameNumber(uint64_t *retval, int tengigaEnable); void Beb_SetReadNLines(int value); -uint16_t Beb_swap_uint16( uint16_t val); -int Beb_open(u_int32_t** csp0base, u_int32_t offset); -u_int32_t Beb_Read32 (u_int32_t* baseaddr, u_int32_t offset); -u_int32_t Beb_Write32 (u_int32_t* baseaddr, u_int32_t offset, u_int32_t data); -void Beb_close(int fd,u_int32_t* csp0base); - - +uint16_t Beb_swap_uint16(uint16_t val); +int Beb_open(u_int32_t **csp0base, u_int32_t offset); +u_int32_t Beb_Read32(u_int32_t *baseaddr, u_int32_t offset); +u_int32_t Beb_Write32(u_int32_t *baseaddr, u_int32_t offset, u_int32_t data); +void Beb_close(int fd, u_int32_t *csp0base); diff --git a/slsDetectorServers/eigerDetectorServer/FebControl.h b/slsDetectorServers/eigerDetectorServer/FebControl.h old mode 100755 new mode 100644 index 403f961df..7188938d4 --- a/slsDetectorServers/eigerDetectorServer/FebControl.h +++ b/slsDetectorServers/eigerDetectorServer/FebControl.h @@ -2,49 +2,51 @@ #include "FebInterface.h" #include +struct Module { + unsigned int module_number; + int top_address_valid; + unsigned int top_left_address; + unsigned int top_right_address; + int bottom_address_valid; + unsigned int bottom_left_address; + unsigned int bottom_right_address; -struct Module{ - unsigned int module_number; - int top_address_valid; - unsigned int top_left_address; - unsigned int top_right_address; - int bottom_address_valid; - unsigned int bottom_left_address; - unsigned int bottom_right_address; - - unsigned int idelay_top[4]; //ll,lr,rl,ll - unsigned int idelay_bottom[4]; //ll,lr,rl,ll - float high_voltage; - int* top_dac; - int* bottom_dac; + unsigned int idelay_top[4]; // ll,lr,rl,ll + unsigned int idelay_bottom[4]; // ll,lr,rl,ll + float high_voltage; + int *top_dac; + int *bottom_dac; }; +void Module_Module(struct Module *mod, unsigned int number, + unsigned int address_top); +void Module_ModuleBottom(struct Module *mod, unsigned int number, + unsigned int address_bottom); +void Module_Module1(struct Module *mod, unsigned int number, + unsigned int address_top, unsigned int address_bottom); +unsigned int Module_GetModuleNumber(struct Module *mod); +int Module_TopAddressIsValid(struct Module *mod); +unsigned int Module_GetTopBaseAddress(struct Module *mod); +unsigned int Module_GetTopLeftAddress(struct Module *mod); +unsigned int Module_GetTopRightAddress(struct Module *mod); +unsigned int Module_GetBottomBaseAddress(struct Module *mod); +int Module_BottomAddressIsValid(struct Module *mod); +unsigned int Module_GetBottomLeftAddress(struct Module *mod); +unsigned int Module_GetBottomRightAddress(struct Module *mod); +unsigned int Module_SetTopIDelay(struct Module *mod, unsigned int chip, + unsigned int value); +unsigned int Module_GetTopIDelay(struct Module *mod, unsigned int chip); +unsigned int Module_SetBottomIDelay(struct Module *mod, unsigned int chip, + unsigned int value); +unsigned int Module_GetBottomIDelay(struct Module *mod, unsigned int chip); -void Module_Module(struct Module* mod,unsigned int number, unsigned int address_top); -void Module_ModuleBottom(struct Module* mod,unsigned int number, unsigned int address_bottom); -void Module_Module1(struct Module* mod,unsigned int number, unsigned int address_top, unsigned int address_bottom); -unsigned int Module_GetModuleNumber(struct Module* mod); -int Module_TopAddressIsValid(struct Module* mod); -unsigned int Module_GetTopBaseAddress(struct Module* mod); -unsigned int Module_GetTopLeftAddress(struct Module* mod) ; -unsigned int Module_GetTopRightAddress(struct Module* mod); -unsigned int Module_GetBottomBaseAddress(struct Module* mod); -int Module_BottomAddressIsValid(struct Module* mod); -unsigned int Module_GetBottomLeftAddress(struct Module* mod); -unsigned int Module_GetBottomRightAddress(struct Module* mod); -unsigned int Module_SetTopIDelay(struct Module* mod,unsigned int chip,unsigned int value); -unsigned int Module_GetTopIDelay(struct Module* mod,unsigned int chip) ; -unsigned int Module_SetBottomIDelay(struct Module* mod,unsigned int chip,unsigned int value); -unsigned int Module_GetBottomIDelay(struct Module* mod,unsigned int chip); - -float Module_SetHighVoltage(struct Module* mod,float value); -float Module_GetHighVoltage(struct Module* mod); - -int Module_SetTopDACValue(struct Module* mod,unsigned int i, int value); -int Module_GetTopDACValue(struct Module* mod,unsigned int i); -int Module_SetBottomDACValue(struct Module* mod,unsigned int i, int value); -int Module_GetBottomDACValue(struct Module* mod,unsigned int i); +float Module_SetHighVoltage(struct Module *mod, float value); +float Module_GetHighVoltage(struct Module *mod); +int Module_SetTopDACValue(struct Module *mod, unsigned int i, int value); +int Module_GetTopDACValue(struct Module *mod, unsigned int i); +int Module_SetBottomDACValue(struct Module *mod, unsigned int i, int value); +int Module_GetBottomDACValue(struct Module *mod, unsigned int i); void Feb_Control_activate(int activate); @@ -52,22 +54,30 @@ int Feb_Control_IsBottomModule(); int Feb_Control_GetModuleNumber(); void Feb_Control_PrintModuleList(); -int Feb_Control_GetModuleIndex(unsigned int module_number, unsigned int* module_index); -int Feb_Control_CheckModuleAddresses(struct Module* m); +int Feb_Control_GetModuleIndex(unsigned int module_number, + unsigned int *module_index); +int Feb_Control_CheckModuleAddresses(struct Module *m); int Feb_Control_AddModule(unsigned int module_number, unsigned int top_address); -int Feb_Control_AddModule1(unsigned int module_number, int top_enable, unsigned int top_address, unsigned int bottom_address, int half_module); -int Feb_Control_GetDACNumber(char* s, unsigned int* n); -int Feb_Control_SendDACValue(unsigned int dst_num, unsigned int ch, unsigned int* value); -int Feb_Control_VoltageToDAC(float value, unsigned int* digital, unsigned int nsteps, float vmin, float vmax); -float Feb_Control_DACToVoltage(unsigned int digital,unsigned int nsteps,float vmin,float vmax); -int Feb_Control_SendIDelays(unsigned int dst_num, int chip_lr, unsigned int channels, unsigned int ndelay_units); +int Feb_Control_AddModule1(unsigned int module_number, int top_enable, + unsigned int top_address, + unsigned int bottom_address, int half_module); +int Feb_Control_GetDACNumber(char *s, unsigned int *n); +int Feb_Control_SendDACValue(unsigned int dst_num, unsigned int ch, + unsigned int *value); +int Feb_Control_VoltageToDAC(float value, unsigned int *digital, + unsigned int nsteps, float vmin, float vmax); +float Feb_Control_DACToVoltage(unsigned int digital, unsigned int nsteps, + float vmin, float vmax); +int Feb_Control_SendIDelays(unsigned int dst_num, int chip_lr, + unsigned int channels, unsigned int ndelay_units); int Feb_Control_SetStaticBits(); int Feb_Control_SetStaticBits1(unsigned int the_static_bits); int Feb_Control_SendBitModeToBebServer(); unsigned int Feb_Control_ConvertTimeToRegister(float time_in_sec); unsigned int Feb_Control_AddressToAll(); int Feb_Control_SetCommandRegister(unsigned int cmd); -int Feb_Control_GetDAQStatusRegister(unsigned int dst_address, unsigned int* ret_status); +int Feb_Control_GetDAQStatusRegister(unsigned int dst_address, + unsigned int *ret_status); int Feb_Control_StartDAQOnlyNWaitForFinish(int sleep_time_us); int Feb_Control_ResetChipCompletely(); int Feb_Control_ResetChipPartially(); @@ -80,21 +90,24 @@ unsigned int Feb_Control_GetNModules(); unsigned int Feb_Control_GetNHalfModules(); int Feb_Control_SetHighVoltage(int value); -int Feb_Control_GetHighVoltage(int* value); +int Feb_Control_GetHighVoltage(int *value); int Feb_Control_SendHighVoltage(int dacvalue); -int Feb_Control_ReceiveHighVoltage(unsigned int* value); +int Feb_Control_ReceiveHighVoltage(unsigned int *value); -int Feb_Control_SetIDelays(unsigned int module_num, unsigned int ndelay_units); -int Feb_Control_SetIDelays1(unsigned int module_num, unsigned int chip_pos, unsigned int ndelay_units); +int Feb_Control_SetIDelays(unsigned int module_num, unsigned int ndelay_units); +int Feb_Control_SetIDelays1(unsigned int module_num, unsigned int chip_pos, + unsigned int ndelay_units); -int Feb_Control_DecodeDACString(char* dac_str, unsigned int* module_index, int* top, int* bottom, unsigned int* dac_ch); -int Feb_Control_SetDAC(char* s, int value, int is_a_voltage_mv); -int Feb_Control_GetDAC(char* s, int* ret_value, int voltage_mv); -int Feb_Control_GetDACName(unsigned int dac_num,char* s); +int Feb_Control_DecodeDACString(char *dac_str, unsigned int *module_index, + int *top, int *bottom, unsigned int *dac_ch); +int Feb_Control_SetDAC(char *s, int value, int is_a_voltage_mv); +int Feb_Control_GetDAC(char *s, int *ret_value, int voltage_mv); +int Feb_Control_GetDACName(unsigned int dac_num, char *s); -int Feb_Control_SetTrimbits(unsigned int module_num, unsigned int* trimbits, int top); -unsigned int* Feb_Control_GetTrimbits(); +int Feb_Control_SetTrimbits(unsigned int module_num, unsigned int *trimbits, + int top); +unsigned int *Feb_Control_GetTrimbits(); int Feb_Control_SaveAllTrimbitsTo(int value, int top); int Feb_Control_Reset(); int Feb_Control_PrepareForAcquisition(); @@ -111,7 +124,8 @@ unsigned int Feb_Control_GetNExposures(); int Feb_Control_SetExposureTime(double the_exposure_time_in_sec); double Feb_Control_GetExposureTime(); int64_t Feb_Control_GetExposureTime_in_nsec(); -int Feb_Control_SetSubFrameExposureTime(int64_t the_subframe_exposure_time_in_10nsec); +int Feb_Control_SetSubFrameExposureTime( + int64_t the_subframe_exposure_time_in_10nsec); int64_t Feb_Control_GetSubFrameExposureTime(); int Feb_Control_SetSubFramePeriod(int64_t the_subframe_period_in_10nsec); int64_t Feb_Control_GetSubFramePeriod(); @@ -119,17 +133,23 @@ int Feb_Control_SetExposurePeriod(double the_exposure_period_in_sec); double Feb_Control_GetExposurePeriod(); int Feb_Control_SetDynamicRange(unsigned int four_eight_sixteen_or_thirtytwo); unsigned int Feb_Control_GetDynamicRange(); -int Feb_Control_SetReadoutSpeed(unsigned int readout_speed); //0 was default, 0->full,1->half,2->quarter or 3->super_slow -int Feb_Control_SetReadoutMode(unsigned int readout_mode); ///0 was default,0->parallel,1->non-parallel,2-> safe_mode -int Feb_Control_SetTriggerMode(unsigned int trigger_mode, int polarity);//0 and 1 was default, -int Feb_Control_SetExternalEnableMode(int use_external_enable, int polarity);//0 and 1 was default, +int Feb_Control_SetReadoutSpeed( + unsigned int readout_speed); // 0 was default, 0->full,1->half,2->quarter or + // 3->super_slow +int Feb_Control_SetReadoutMode(unsigned int readout_mode); /// 0 was + /// default,0->parallel,1->non-parallel,2-> + /// safe_mode +int Feb_Control_SetTriggerMode(unsigned int trigger_mode, + int polarity); // 0 and 1 was default, +int Feb_Control_SetExternalEnableMode(int use_external_enable, + int polarity); // 0 and 1 was default, int Feb_Control_SetInTestModeVariable(int on); int Feb_Control_GetTestModeVariable(); void Feb_Control_Set_Counter_Bit(int value); int Feb_Control_Get_Counter_Bit(); -int Feb_Control_Pulse_Pixel(int npulses,int x, int y); +int Feb_Control_Pulse_Pixel(int npulses, int x, int y); int Feb_Control_PulsePixelNMove(int npulses, int inc_x_pos, int inc_y_pos); int Feb_Control_Shift32InSerialIn(unsigned int value_to_shift_in); int Feb_Control_SendTokenIn(); @@ -158,5 +178,4 @@ int Feb_Control_SetReadNLines(int value); int Feb_Control_GetReadNLines(); int Feb_Control_WriteRegister(uint32_t offset, uint32_t data); -int Feb_Control_ReadRegister(uint32_t offset, uint32_t* retval); - +int Feb_Control_ReadRegister(uint32_t offset, uint32_t *retval); diff --git a/slsDetectorServers/eigerDetectorServer/FebInterface.h b/slsDetectorServers/eigerDetectorServer/FebInterface.h old mode 100755 new mode 100644 index e2d484225..64216023d --- a/slsDetectorServers/eigerDetectorServer/FebInterface.h +++ b/slsDetectorServers/eigerDetectorServer/FebInterface.h @@ -3,12 +3,24 @@ int Feb_Interface_WriteTo(unsigned int ch); int Feb_Interface_ReadFrom(unsigned int ch, unsigned int ntrys); void Feb_Interface_FebInterface(); -void Feb_Interface_SendCompleteList(unsigned int n,unsigned int* list); +void Feb_Interface_SendCompleteList(unsigned int n, unsigned int *list); int Feb_Interface_SetByteOrder(); -int Feb_Interface_ReadRegister(unsigned int sub_num, unsigned int reg_num,unsigned int* value_read); -int Feb_Interface_ReadRegisters(unsigned int sub_num, unsigned int nreads, unsigned int* reg_nums,unsigned int* values_read); -int Feb_Interface_WriteRegister(unsigned int sub_num, unsigned int reg_num,unsigned int value, int wait_on, unsigned int wait_on_address); -int Feb_Interface_WriteRegisters(unsigned int sub_num, unsigned int nwrites, unsigned int* reg_nums, unsigned int* values, int* wait_ons, unsigned int* wait_on_addresses); -int Feb_Interface_WriteMemoryInLoops(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values); -int Feb_Interface_WriteMemory(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values); - +int Feb_Interface_ReadRegister(unsigned int sub_num, unsigned int reg_num, + unsigned int *value_read); +int Feb_Interface_ReadRegisters(unsigned int sub_num, unsigned int nreads, + unsigned int *reg_nums, + unsigned int *values_read); +int Feb_Interface_WriteRegister(unsigned int sub_num, unsigned int reg_num, + unsigned int value, int wait_on, + unsigned int wait_on_address); +int Feb_Interface_WriteRegisters(unsigned int sub_num, unsigned int nwrites, + unsigned int *reg_nums, unsigned int *values, + int *wait_ons, + unsigned int *wait_on_addresses); +int Feb_Interface_WriteMemoryInLoops(unsigned int sub_num, unsigned int mem_num, + unsigned int start_address, + unsigned int nwrites, + unsigned int *values); +int Feb_Interface_WriteMemory(unsigned int sub_num, unsigned int mem_num, + unsigned int start_address, unsigned int nwrites, + unsigned int *values); diff --git a/slsDetectorServers/eigerDetectorServer/FebRegisterDefs.h b/slsDetectorServers/eigerDetectorServer/FebRegisterDefs.h old mode 100755 new mode 100644 index bc604c552..f2c7adb59 --- a/slsDetectorServers/eigerDetectorServer/FebRegisterDefs.h +++ b/slsDetectorServers/eigerDetectorServer/FebRegisterDefs.h @@ -1,228 +1,224 @@ -//daq register definitions -#define DAQ_REG_CTRL 1 -#define DAQ_REG_CHIP_CMDS 2 -#define DAQ_REG_STATIC_BITS 3 -#define DAQ_REG_CLK_ROW_CLK_NTIMES 3 -#define DAQ_REG_SHIFT_IN_32 3 -#define DAQ_REG_READOUT_NROWS 3 -#define DAQ_REG_SEND_N_TESTPULSES 3 +// daq register definitions +#define DAQ_REG_CTRL 1 +#define DAQ_REG_CHIP_CMDS 2 +#define DAQ_REG_STATIC_BITS 3 +#define DAQ_REG_CLK_ROW_CLK_NTIMES 3 +#define DAQ_REG_SHIFT_IN_32 3 +#define DAQ_REG_READOUT_NROWS 3 +#define DAQ_REG_SEND_N_TESTPULSES 3 -#define DAQ_REG_NEXPOSURES 3 -#define DAQ_REG_EXPOSURE_TIMER 4 // == (31 downto 3) * 10^(2 downto 0) -#define DAQ_REG_EXPOSURE_REPEAT_TIMER 5 // == (31 downto 3) * 10^(2 downto 0) -#define DAQ_REG_SUBFRAME_EXPOSURES 6 -#define DAQ_REG_SUBFRAME_PERIOD 7 //also pg and fifo status register -#define DAQ_REG_PARTIAL_READOUT 8 +#define DAQ_REG_NEXPOSURES 3 +#define DAQ_REG_EXPOSURE_TIMER 4 // == (31 downto 3) * 10^(2 downto 0) +#define DAQ_REG_EXPOSURE_REPEAT_TIMER 5 // == (31 downto 3) * 10^(2 downto 0) +#define DAQ_REG_SUBFRAME_EXPOSURES 6 +#define DAQ_REG_SUBFRAME_PERIOD 7 // also pg and fifo status register +#define DAQ_REG_PARTIAL_READOUT 8 -#define DAQ_REG_HRDWRE 12 +#define DAQ_REG_HRDWRE 12 -#define DAQ_REG_HRDWRE_OW_OFST (0) -#define DAQ_REG_HRDWRE_OW_MSK (0x00000001 << DAQ_REG_HRDWRE_OW_OFST) -#define DAQ_REG_HRDWRE_TOP_OFST (1) -#define DAQ_REG_HRDWRE_TOP_MSK (0x00000001 << DAQ_REG_HRDWRE_TOP_OFST) -#define DAQ_REG_HRDWRE_INTRRPT_SF_OFST (2) -#define DAQ_REG_HRDWRE_INTRRPT_SF_MSK (0x00000001 << DAQ_REG_HRDWRE_INTRRPT_SF_OFST) +#define DAQ_REG_HRDWRE_OW_OFST (0) +#define DAQ_REG_HRDWRE_OW_MSK (0x00000001 << DAQ_REG_HRDWRE_OW_OFST) +#define DAQ_REG_HRDWRE_TOP_OFST (1) +#define DAQ_REG_HRDWRE_TOP_MSK (0x00000001 << DAQ_REG_HRDWRE_TOP_OFST) +#define DAQ_REG_HRDWRE_INTRRPT_SF_OFST (2) +#define DAQ_REG_HRDWRE_INTRRPT_SF_MSK \ + (0x00000001 << DAQ_REG_HRDWRE_INTRRPT_SF_OFST) -#define DAQ_REG_RO_OFFSET 20 -#define DAQ_REG_STATUS (DAQ_REG_RO_OFFSET + 0) //also pg and fifo status register -#define FEB_REG_STATUS (DAQ_REG_RO_OFFSET + 3) -#define MEAS_SUBPERIOD_REG (DAQ_REG_RO_OFFSET + 4) -#define MEAS_PERIOD_REG (DAQ_REG_RO_OFFSET + 5) +#define DAQ_REG_RO_OFFSET 20 +#define DAQ_REG_STATUS \ + (DAQ_REG_RO_OFFSET + 0) // also pg and fifo status register +#define FEB_REG_STATUS (DAQ_REG_RO_OFFSET + 3) +#define MEAS_SUBPERIOD_REG (DAQ_REG_RO_OFFSET + 4) +#define MEAS_PERIOD_REG (DAQ_REG_RO_OFFSET + 5) +#define DAQ_CTRL_RESET 0x80000000 +#define DAQ_CTRL_START 0x40000000 +#define ACQ_CTRL_START 0x50000000 // this is 0x10000000 (acq) | 0x40000000 (daq) +#define DAQ_CTRL_STOP 0x00000000 +// direct chip commands to the DAQ_REG_CHIP_CMDS register +#define DAQ_SET_STATIC_BIT 0x00000001 +#define DAQ_RESET_COMPLETELY 0x0000000E +#define DAQ_RESET_PERIPHERY 0x00000002 +#define DAQ_RESET_PIXEL_COUNTERS 0x00000004 +#define DAQ_RESET_COLUMN_SELECT 0x00000008 -#define DAQ_CTRL_RESET 0x80000000 -#define DAQ_CTRL_START 0x40000000 -#define ACQ_CTRL_START 0x50000000 //this is 0x10000000 (acq) | 0x40000000 (daq) -#define DAQ_CTRL_STOP 0x00000000 - -//direct chip commands to the DAQ_REG_CHIP_CMDS register -#define DAQ_SET_STATIC_BIT 0x00000001 -#define DAQ_RESET_COMPLETELY 0x0000000E -#define DAQ_RESET_PERIPHERY 0x00000002 -#define DAQ_RESET_PIXEL_COUNTERS 0x00000004 -#define DAQ_RESET_COLUMN_SELECT 0x00000008 - -#define DAQ_STORE_IMAGE 0x00000010 -#define DAQ_RELEASE_IMAGE_STORE 0x00000020 +#define DAQ_STORE_IMAGE 0x00000010 +#define DAQ_RELEASE_IMAGE_STORE 0x00000020 #define DAQ_SEND_A_TOKEN_IN 0x00000040 #define DAQ_CLK_ROW_CLK_NTIMES 0x00000080 #define DAQ_SERIALIN_SHIFT_IN_32 0x00000100 #define DAQ_LOAD_16ROWS_OF_TRIMBITS 0x00000200 -#define DAQ_IGNORE_INITIAL_CRAP 0x00000400 //crap before readout -#define DAQ_READOUT_NROWS 0x00000800 -#define DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START 0x00001000 //last 4 bit of data in the last frame +#define DAQ_IGNORE_INITIAL_CRAP 0x00000400 // crap before readout +#define DAQ_READOUT_NROWS 0x00000800 +#define DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START \ + 0x00001000 // last 4 bit of data in the last frame #define DAQ_RELEASE_IMAGE_STORE_AFTER_READOUT 0x00002000 #define DAQ_RESET_PIXEL_COUNTERS_AFTER_READOUT 0x00004000 -#define DAQ_CLK_ROW_CLK_TO_SELECT_NEXT_ROW 0x00008000 -#define DAQ_CLK_MAIN_CLK_TO_SELECT_NEXT_PIXEL 0x00010000 -#define DAQ_SEND_N_TEST_PULSES 0x00020000 +#define DAQ_CLK_ROW_CLK_TO_SELECT_NEXT_ROW 0x00008000 +#define DAQ_CLK_MAIN_CLK_TO_SELECT_NEXT_PIXEL 0x00010000 +#define DAQ_SEND_N_TEST_PULSES 0x00020000 -#define DAQ_CHIP_CONTROLLER_HALF_SPEED 0x00040000 //everything at 100 MHz (50MHz ddr readout) -#define DAQ_CHIP_CONTROLLER_QUARTER_SPEED 0x00080000 //everything at 50 MHz (25MHz ddr readout) -#define DAQ_CHIP_CONTROLLER_SUPER_SLOW_SPEED 0x000c0000 //everything at ~200 kHz (200 kHz MHz ddr readout) +#define DAQ_CHIP_CONTROLLER_HALF_SPEED \ + 0x00040000 // everything at 100 MHz (50MHz ddr readout) +#define DAQ_CHIP_CONTROLLER_QUARTER_SPEED \ + 0x00080000 // everything at 50 MHz (25MHz ddr readout) +#define DAQ_CHIP_CONTROLLER_SUPER_SLOW_SPEED \ + 0x000c0000 // everything at ~200 kHz (200 kHz MHz ddr readout) -//#define DAQ_FIFO_ENABLE 0x00100000 commented out as it is not used anywhere -#define DAQ_REG_CHIP_CMDS_INT_TRIGGER 0x00100000 +//#define DAQ_FIFO_ENABLE 0x00100000 commented out as it +//is not used anywhere +#define DAQ_REG_CHIP_CMDS_INT_TRIGGER 0x00100000 -//direct chip commands to the DAQ_REG_CHIP_CMDS register -#define DAQ_NEXPOSURERS_SAFEST_MODE_ROW_CLK_BEFORE_MODE 0x00200000 //row clk is before main clk readout sequence -#define DAQ_NEXPOSURERS_NORMAL_NONPARALLEL_MODE 0x00400000 //expose ->readout ->expose -> ..., with store is always closed -#define DAQ_NEXPOSURERS_PARALLEL_MODE 0x00600000 //parallel acquire/read mode +// direct chip commands to the DAQ_REG_CHIP_CMDS register +#define DAQ_NEXPOSURERS_SAFEST_MODE_ROW_CLK_BEFORE_MODE \ + 0x00200000 // row clk is before main clk readout sequence +#define DAQ_NEXPOSURERS_NORMAL_NONPARALLEL_MODE \ + 0x00400000 // expose ->readout ->expose -> ..., with store is always closed +#define DAQ_NEXPOSURERS_PARALLEL_MODE 0x00600000 // parallel acquire/read mode -//DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES is old now hard-wired in the firmware that every image comes with a header -//#define DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES 0x00800000 //DAQ_IGNORE_INITIAL_CRAP and DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START +// DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES is old now hard-wired in the firmware +// that every image comes with a header #define +//DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES 0x00800000 +////DAQ_IGNORE_INITIAL_CRAP and DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START -#define DAQ_NEXPOSURERS_EXTERNAL_ENABLING 0x01000000 +#define DAQ_NEXPOSURERS_EXTERNAL_ENABLING 0x01000000 #define DAQ_NEXPOSURERS_EXTERNAL_ENABLING_POLARITY 0x02000000 #define DAQ_NEXPOSURERS_EXTERNAL_TRIGGER_POLARITY 0x04000000 -#define DAQ_NEXPOSURERS_INTERNAL_ACQUISITION 0x00000000 //internally controlled -#define DAQ_NEXPOSURERS_EXTERNAL_ACQUISITION_START 0x08000000 //external acquisition start -#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START 0x10000000 //external image start -#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START_AND_STOP 0x18000000 //externally controlly, external image start and stop +#define DAQ_NEXPOSURERS_INTERNAL_ACQUISITION 0x00000000 // internally controlled +#define DAQ_NEXPOSURERS_EXTERNAL_ACQUISITION_START \ + 0x08000000 // external acquisition start +#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START 0x10000000 // external image start +#define DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START_AND_STOP \ + 0x18000000 // externally controlly, external image start and stop -#define DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING 0x20000000 -#define DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION 0x40000000 +#define DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING 0x20000000 +#define DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION 0x40000000 -//#define DAQ_MASTER_HALF_MODULE 0x80000000 currently not used +//#define DAQ_MASTER_HALF_MODULE 0x80000000 currently not +//used +// chips static bits +#define DAQ_STATIC_BIT_PROGRAM 0x00000001 +#define DAQ_STATIC_BIT_M4 0x00000002 // these are the status bits, not bit mode +#define DAQ_STATIC_BIT_M8 0x00000004 // these are the status bits, not bit mode +#define DAQ_STATIC_BIT_M12 \ + 0x00000000 // these are the status bits, not bit mode, ie. "00" is 12 bit + // mode +#define DAQ_STATIC_BIT_CHIP_TEST 0x00000008 +#define DAQ_STATIC_BIT_ROTEST 0x00000010 +#define DAQ_CS_BAR_LEFT 0x00000020 +#define DAQ_CS_BAR_RIGHT 0x00000040 -//chips static bits -#define DAQ_STATIC_BIT_PROGRAM 0x00000001 -#define DAQ_STATIC_BIT_M4 0x00000002 //these are the status bits, not bit mode -#define DAQ_STATIC_BIT_M8 0x00000004 //these are the status bits, not bit mode -#define DAQ_STATIC_BIT_M12 0x00000000 //these are the status bits, not bit mode, ie. "00" is 12 bit mode -#define DAQ_STATIC_BIT_CHIP_TEST 0x00000008 -#define DAQ_STATIC_BIT_ROTEST 0x00000010 -#define DAQ_CS_BAR_LEFT 0x00000020 -#define DAQ_CS_BAR_RIGHT 0x00000040 +// status flags +#define DAQ_STATUS_DAQ_RUNNING 0x01 +#define DAQ_DATA_COLLISION_ERROR 0x02 - -//status flags -#define DAQ_STATUS_DAQ_RUNNING 0x01 -#define DAQ_DATA_COLLISION_ERROR 0x02 - - -#define DAQ_STATUS_CURRENT_M4 0x04 +#define DAQ_STATUS_CURRENT_M4 0x04 #define DAQ_STATUS_CURRENT_M8 0x08 -#define DAQ_STATUS_CURRENT_M12 0x00 //in 12 bit mode both are cleared +#define DAQ_STATUS_CURRENT_M12 0x00 // in 12 bit mode both are cleared #define DAQ_STATUS_CURRENT_TESTMODE 0x10 -#define DAQ_STATUS_TOKEN_OUT 0x20 -#define DAQ_STATUS_SERIAL_OUT 0x40 -#define DAQ_STATUS_PIXELS_ARE_ENABLED 0x80 +#define DAQ_STATUS_TOKEN_OUT 0x20 +#define DAQ_STATUS_SERIAL_OUT 0x40 +#define DAQ_STATUS_PIXELS_ARE_ENABLED 0x80 #define DAQ_STATUS_DAQ_RUN_TOGGLE 0x200 -//data delay registers -#define CHIP_DATA_OUT_DELAY_REG_CTRL 1 -#define CHIP_DATA_OUT_DELAY_REG2 2 -#define CHIP_DATA_OUT_DELAY_REG3 3 -#define CHIP_DATA_OUT_DELAY_REG4 4 -#define CHIP_DATA_OUT_DELAY_SET 0x20000000 +// data delay registers +#define CHIP_DATA_OUT_DELAY_REG_CTRL 1 +#define CHIP_DATA_OUT_DELAY_REG2 2 +#define CHIP_DATA_OUT_DELAY_REG3 3 +#define CHIP_DATA_OUT_DELAY_REG4 4 +#define CHIP_DATA_OUT_DELAY_SET 0x20000000 -//module configuration -#define TOP_BIT_MASK 0x00f -#define MASTER_BIT_MASK 0x200 -#define NORMAL_MODULE_BIT_MASK 0x400 +// module configuration +#define TOP_BIT_MASK 0x00f +#define MASTER_BIT_MASK 0x200 +#define NORMAL_MODULE_BIT_MASK 0x400 // Master Slave Top Bottom Definition #define MODULE_CONFIGURATION_MASK 0x84 -//Software Configuration -#define MASTERCONFIG_OFFSET 0x160 //0x20 * 11 (P11) -#define MASTER_BIT 0x1 -#define OVERWRITE_HARDWARE_BIT 0x2 -#define DEACTIVATE_BIT 0x4 +// Software Configuration +#define MASTERCONFIG_OFFSET 0x160 // 0x20 * 11 (P11) +#define MASTER_BIT 0x1 +#define OVERWRITE_HARDWARE_BIT 0x2 +#define DEACTIVATE_BIT 0x4 -#define FPGA_TEMP_OFFSET 0x200 +#define FPGA_TEMP_OFFSET 0x200 -#define TXM_DELAY_LEFT_OFFSET 0x180 -#define TXM_DELAY_RIGHT_OFFSET 0x1A0 -#define TXM_DELAY_FRAME_OFFSET 0x1C0 -#define FLOW_REG_OFFSET 0x140 +#define TXM_DELAY_LEFT_OFFSET 0x180 +#define TXM_DELAY_RIGHT_OFFSET 0x1A0 +#define TXM_DELAY_FRAME_OFFSET 0x1C0 +#define FLOW_REG_OFFSET 0x140 -#define FLOW_REG_TXM_FLOW_CNTRL_10G_OFST (0) -#define FLOW_REG_TXM_FLOW_CNTRL_10G_MSK (0x1 << FLOW_REG_TXM_FLOW_CNTRL_10G_OFST) -#define FLOW_REG_OVERFLOW_32_BIT_OFST (2) -#define FLOW_REG_OVERFLOW_32_BIT_MSK (0x1 << FLOW_REG_OVERFLOW_32_BIT_OFST) +#define FLOW_REG_TXM_FLOW_CNTRL_10G_OFST (0) +#define FLOW_REG_TXM_FLOW_CNTRL_10G_MSK \ + (0x1 << FLOW_REG_TXM_FLOW_CNTRL_10G_OFST) +#define FLOW_REG_OVERFLOW_32_BIT_OFST (2) +#define FLOW_REG_OVERFLOW_32_BIT_MSK (0x1 << FLOW_REG_OVERFLOW_32_BIT_OFST) -//command memory -#define LEFT_OFFSET 0x0 -#define RIGHT_OFFSET 0x100 +// command memory +#define LEFT_OFFSET 0x0 +#define RIGHT_OFFSET 0x100 -#define FIRST_CMD_PART1_OFFSET 0x8 -#define FIRST_CMD_PART2_OFFSET 0xc -#define SECOND_CMD_PART1_OFFSET 0x10 -#define SECOND_CMD_PART2_OFFSET 0x14 -#define COMMAND_COUNTER_OFFSET 0x18 -#define STOP_ACQ_OFFSET 0x1c -#define STOP_ACQ_BIT 0x40000000 -#define TWO_REQUESTS_OFFSET 0x1c -#define TWO_REQUESTS_BIT 0x80000000 +#define FIRST_CMD_PART1_OFFSET 0x8 +#define FIRST_CMD_PART2_OFFSET 0xc +#define SECOND_CMD_PART1_OFFSET 0x10 +#define SECOND_CMD_PART2_OFFSET 0x14 +#define COMMAND_COUNTER_OFFSET 0x18 +#define STOP_ACQ_OFFSET 0x1c +#define STOP_ACQ_BIT 0x40000000 +#define TWO_REQUESTS_OFFSET 0x1c +#define TWO_REQUESTS_BIT 0x80000000 -//version -#define FIRMWARE_VERSION_OFFSET 0x4 +// version +#define FIRMWARE_VERSION_OFFSET 0x4 #define FIRMWARESOFTWARE_API_OFFSET 0x0 -#define FRAME_NUM_RESET_OFFSET 0xA0 +#define FRAME_NUM_RESET_OFFSET 0xA0 -//1g counters -#define ONE_GIGA_LEFT_INDEX_LSB_COUNTER 0x04 -#define ONE_GIGA_LEFT_INDEX_MSB_COUNTER 0x24 +// 1g counters +#define ONE_GIGA_LEFT_INDEX_LSB_COUNTER 0x04 +#define ONE_GIGA_LEFT_INDEX_MSB_COUNTER 0x24 -#define ONE_GIGA_LEFT_TXN_DELAY_COUNTER 0x104 -#define ONE_GIGA_LEFT_FRAME_DELAY_COUNTER 0x124 +#define ONE_GIGA_LEFT_TXN_DELAY_COUNTER 0x104 +#define ONE_GIGA_LEFT_FRAME_DELAY_COUNTER 0x124 -#define ONE_GIGA_RIGHT_INDEX_LSB_COUNTER 0x44 -#define ONE_GIGA_RIGHT_INDEX_MSB_COUNTER 0x64 +#define ONE_GIGA_RIGHT_INDEX_LSB_COUNTER 0x44 +#define ONE_GIGA_RIGHT_INDEX_MSB_COUNTER 0x64 -#define ONE_GIGA_RIGHT_TXN_DELAY_COUNTER 0x144 -#define ONE_GIGA_RIGHT_FRAME_DELAY_COUNTER 0x164 +#define ONE_GIGA_RIGHT_TXN_DELAY_COUNTER 0x144 +#define ONE_GIGA_RIGHT_FRAME_DELAY_COUNTER 0x164 -//10g counters -#define TEN_GIGA_LEFT_INDEX_LSB_COUNTER 0x84 -#define TEN_GIGA_LEFT_INDEX_MSB_COUNTER 0xa4 +// 10g counters +#define TEN_GIGA_LEFT_INDEX_LSB_COUNTER 0x84 +#define TEN_GIGA_LEFT_INDEX_MSB_COUNTER 0xa4 -#define TEN_GIGA_LEFT_TXN_DELAY_COUNTER 0x184 -#define TEN_GIGA_LEFT_FRAME_DELAY_COUNTER 0x1a4 +#define TEN_GIGA_LEFT_TXN_DELAY_COUNTER 0x184 +#define TEN_GIGA_LEFT_FRAME_DELAY_COUNTER 0x1a4 -#define TEN_GIGA_RIGHT_INDEX_LSB_COUNTER 0xc4 -#define TEN_GIGA_RIGHT_INDEX_MSB_COUNTER 0xe4 +#define TEN_GIGA_RIGHT_INDEX_LSB_COUNTER 0xc4 +#define TEN_GIGA_RIGHT_INDEX_MSB_COUNTER 0xe4 -#define TEN_GIGA_RIGHT_TXN_DELAY_COUNTER 0x1c4 -#define TEN_GIGA_RIGHT_FRAME_DELAY_COUNTER 0x1e4 +#define TEN_GIGA_RIGHT_TXN_DELAY_COUNTER 0x1c4 +#define TEN_GIGA_RIGHT_FRAME_DELAY_COUNTER 0x1e4 // udp header (position, id) -#define UDP_HEADER_A_LEFT_OFST 0x00C0 -#define UDP_HEADER_B_LEFT_OFST 0x00E0 -#define UDP_HEADER_A_RIGHT_OFST 0x0100 -#define UDP_HEADER_B_RIGHT_OFST 0x0120 - -#define UDP_HEADER_X_OFST (0) -#define UDP_HEADER_X_MSK (0xFFFF << UDP_HEADER_X_OFST) -#define UDP_HEADER_ID_OFST (16) -#define UDP_HEADER_ID_MSK (0xFFFF << UDP_HEADER_ID_OFST) -#define UDP_HEADER_Z_OFST (0) -#define UDP_HEADER_Z_MSK (0xFFFF << UDP_HEADER_Z_OFST) -#define UDP_HEADER_Y_OFST (16) -#define UDP_HEADER_Y_MSK (0xFFFF << UDP_HEADER_Y_OFST) - - - - - - - - - - - - - - - +#define UDP_HEADER_A_LEFT_OFST 0x00C0 +#define UDP_HEADER_B_LEFT_OFST 0x00E0 +#define UDP_HEADER_A_RIGHT_OFST 0x0100 +#define UDP_HEADER_B_RIGHT_OFST 0x0120 +#define UDP_HEADER_X_OFST (0) +#define UDP_HEADER_X_MSK (0xFFFF << UDP_HEADER_X_OFST) +#define UDP_HEADER_ID_OFST (16) +#define UDP_HEADER_ID_MSK (0xFFFF << UDP_HEADER_ID_OFST) +#define UDP_HEADER_Z_OFST (0) +#define UDP_HEADER_Z_MSK (0xFFFF << UDP_HEADER_Z_OFST) +#define UDP_HEADER_Y_OFST (16) +#define UDP_HEADER_Y_MSK (0xFFFF << UDP_HEADER_Y_OFST) diff --git a/slsDetectorServers/eigerDetectorServer/HardwareIO.h b/slsDetectorServers/eigerDetectorServer/HardwareIO.h old mode 100755 new mode 100644 index 92a6259d1..dd2d0c73d --- a/slsDetectorServers/eigerDetectorServer/HardwareIO.h +++ b/slsDetectorServers/eigerDetectorServer/HardwareIO.h @@ -1,16 +1,13 @@ -//Class initially from Gerd and was called mmap_test.c +// Class initially from Gerd and was called mmap_test.c #pragma once #include "xfs_types.h" +xfs_u8 HWIO_xfs_in8(xfs_u32 InAddress); +xfs_u16 HWIO_xfs_in16(xfs_u32 InAddress); +xfs_u32 HWIO_xfs_in32(xfs_u32 InAddress); - - xfs_u8 HWIO_xfs_in8(xfs_u32 InAddress); - xfs_u16 HWIO_xfs_in16(xfs_u32 InAddress); - xfs_u32 HWIO_xfs_in32(xfs_u32 InAddress); - - void HWIO_xfs_out8(xfs_u32 OutAddress, xfs_u8 Value); - void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value); - void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value); - +void HWIO_xfs_out8(xfs_u32 OutAddress, xfs_u8 Value); +void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value); +void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value); diff --git a/slsDetectorServers/eigerDetectorServer/HardwareMMappingDefs.h b/slsDetectorServers/eigerDetectorServer/HardwareMMappingDefs.h old mode 100755 new mode 100644 index cdf63c122..f2523f9a2 --- a/slsDetectorServers/eigerDetectorServer/HardwareMMappingDefs.h +++ b/slsDetectorServers/eigerDetectorServer/HardwareMMappingDefs.h @@ -1,11 +1,10 @@ -//from Gerd and was called mmap_test.h +// from Gerd and was called mmap_test.h #ifndef __PLB_LL_FIFO_H__ #define __PLB_LL_FIFO_H__ - /******************************************************************************/ /* definitions */ /******************************************************************************/ @@ -14,49 +13,43 @@ #define PLB_LL_FIFO_REG_STATUS 1 #define PLB_LL_FIFO_REG_FIFO 2 -#define PLB_LL_FIFO_CTRL_LL_REM_SHIFT 30 -#define PLB_LL_FIFO_CTRL_LL_REM 0xC0000000 -#define PLB_LL_FIFO_CTRL_LL_EOF 0x20000000 -#define PLB_LL_FIFO_CTRL_LL_SOF 0x10000000 -#define PLB_LL_FIFO_CTRL_LL_MASK 0xF0000000 +#define PLB_LL_FIFO_CTRL_LL_REM_SHIFT 30 +#define PLB_LL_FIFO_CTRL_LL_REM 0xC0000000 +#define PLB_LL_FIFO_CTRL_LL_EOF 0x20000000 +#define PLB_LL_FIFO_CTRL_LL_SOF 0x10000000 +#define PLB_LL_FIFO_CTRL_LL_MASK 0xF0000000 +#define PLB_LL_FIFO_CTRL_TX_RESET 0x08000000 +#define PLB_LL_FIFO_CTRL_RX_RESET 0x04000000 -#define PLB_LL_FIFO_CTRL_TX_RESET 0x08000000 -#define PLB_LL_FIFO_CTRL_RX_RESET 0x04000000 +#define PLB_LL_FIFO_CTRL_RESET_STATUS 0x00800000 +#define PLB_LL_FIFO_CTRL_RESET_USER 0x00400000 +#define PLB_LL_FIFO_CTRL_RESET_LINK 0x00200000 +#define PLB_LL_FIFO_CTRL_RESET_GT 0x00100000 -#define PLB_LL_FIFO_CTRL_RESET_STATUS 0x00800000 -#define PLB_LL_FIFO_CTRL_RESET_USER 0x00400000 -#define PLB_LL_FIFO_CTRL_RESET_LINK 0x00200000 -#define PLB_LL_FIFO_CTRL_RESET_GT 0x00100000 - -#define PLB_LL_FIFO_CTRL_RESET_ALL 0x0CF00000 +#define PLB_LL_FIFO_CTRL_RESET_ALL 0x0CF00000 // do not reset complete gtx dual in std. case // cause this would reset PLL and stop LL clk -#define PLB_LL_FIFO_CTRL_RESET_STD 0x0CE00000 +#define PLB_LL_FIFO_CTRL_RESET_STD 0x0CE00000 // reset Rx and Tx Fifo and set User Reset -#define PLB_LL_FIFO_CTRL_RESET_FIFO 0x0C400000 +#define PLB_LL_FIFO_CTRL_RESET_FIFO 0x0C400000 +#define PLB_LL_FIFO_CTRL_CONFIG_VECTOR 0x000FFFFF -#define PLB_LL_FIFO_CTRL_CONFIG_VECTOR 0x000FFFFF +#define PLB_LL_FIFO_STATUS_LL_REM_SHIFT 30 +#define PLB_LL_FIFO_STATUS_LL_REM 0xC0000000 +#define PLB_LL_FIFO_STATUS_LL_EOF 0x20000000 +#define PLB_LL_FIFO_STATUS_LL_SOF 0x10000000 +#define PLB_LL_FIFO_STATUS_EMPTY 0x08000000 +#define PLB_LL_FIFO_STATUS_ALMOSTEMPTY 0x04000000 +#define PLB_LL_FIFO_STATUS_FULL 0x02000000 +#define PLB_LL_FIFO_STATUS_ALMOSTFULL 0x01000000 -#define PLB_LL_FIFO_STATUS_LL_REM_SHIFT 30 -#define PLB_LL_FIFO_STATUS_LL_REM 0xC0000000 -#define PLB_LL_FIFO_STATUS_LL_EOF 0x20000000 -#define PLB_LL_FIFO_STATUS_LL_SOF 0x10000000 - -#define PLB_LL_FIFO_STATUS_EMPTY 0x08000000 -#define PLB_LL_FIFO_STATUS_ALMOSTEMPTY 0x04000000 -#define PLB_LL_FIFO_STATUS_FULL 0x02000000 -#define PLB_LL_FIFO_STATUS_ALMOSTFULL 0x01000000 - -#define PLB_LL_FIFO_STATUS_VECTOR 0x000FFFFF - -#define PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS 100 +#define PLB_LL_FIFO_STATUS_VECTOR 0x000FFFFF +#define PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS 100 #endif // __PLB_LL_FIFO_H__ - - diff --git a/slsDetectorServers/eigerDetectorServer/LocalLinkInterface.h b/slsDetectorServers/eigerDetectorServer/LocalLinkInterface.h old mode 100755 new mode 100644 index 034cb1e74..581a0b629 --- a/slsDetectorServers/eigerDetectorServer/LocalLinkInterface.h +++ b/slsDetectorServers/eigerDetectorServer/LocalLinkInterface.h @@ -2,20 +2,23 @@ #include "HardwareIO.h" - -struct LocalLinkInterface{ - xfs_u32 ll_fifo_base; - unsigned int ll_fifo_ctrl_reg; +struct LocalLinkInterface { + xfs_u32 ll_fifo_base; + unsigned int ll_fifo_ctrl_reg; }; -int Local_Init(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr); -int Local_Reset1(struct LocalLinkInterface* ll,unsigned int rst_mask); -int Local_ctrl_reg_write_mask(struct LocalLinkInterface* ll,unsigned int mask, unsigned int val); -void Local_LocalLinkInterface1(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr); -unsigned int Local_StatusVector(struct LocalLinkInterface* ll); -int Local_Reset(struct LocalLinkInterface* ll); -int Local_Write(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer); -int Local_Read(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer); -int Local_Test(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer); -void Local_LocalLinkInterface(struct LocalLinkInterface* ll); - +int Local_Init(struct LocalLinkInterface *ll, unsigned int ll_fifo_badr); +int Local_Reset1(struct LocalLinkInterface *ll, unsigned int rst_mask); +int Local_ctrl_reg_write_mask(struct LocalLinkInterface *ll, unsigned int mask, + unsigned int val); +void Local_LocalLinkInterface1(struct LocalLinkInterface *ll, + unsigned int ll_fifo_badr); +unsigned int Local_StatusVector(struct LocalLinkInterface *ll); +int Local_Reset(struct LocalLinkInterface *ll); +int Local_Write(struct LocalLinkInterface *ll, unsigned int buffer_len, + void *buffer); +int Local_Read(struct LocalLinkInterface *ll, unsigned int buffer_len, + void *buffer); +int Local_Test(struct LocalLinkInterface *ll, unsigned int buffer_len, + void *buffer); +void Local_LocalLinkInterface(struct LocalLinkInterface *ll); diff --git a/slsDetectorServers/eigerDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/eigerDetectorServer/slsDetectorServer_defs.h old mode 100755 new mode 100644 index b0d1143a2..7dfd7ccbb --- a/slsDetectorServers/eigerDetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/eigerDetectorServer/slsDetectorServer_defs.h @@ -1,97 +1,127 @@ #pragma once #include "sls_detector_defs.h" -#define REQUIRED_FIRMWARE_VERSION (24) -#define IDFILECOMMAND "more /home/root/executables/detid.txt" -#define FIRMWARE_VERSION_SAME_TOP_BOT_ADDR (26) +#define REQUIRED_FIRMWARE_VERSION (24) +#define IDFILECOMMAND "more /home/root/executables/detid.txt" +#define FIRMWARE_VERSION_SAME_TOP_BOT_ADDR (26) -#define STATUS_IDLE 0 -#define STATUS_RUNNING 1 -#define STATUS_ERROR 2 +#define STATUS_IDLE 0 +#define STATUS_RUNNING 1 +#define STATUS_ERROR 2 /* Enums */ -enum DACINDEX {E_SVP,E_VTR,E_VRF,E_VRS,E_SVN,E_VTGSTV,E_VCMP_LL,E_VCMP_LR,E_CAL,E_VCMP_RL,E_RXB_RB,E_RXB_LB,E_VCMP_RR,E_VCP,E_VCN,E_VIS,E_VTHRESHOLD}; -#define DEFAULT_DAC_VALS { \ - 0, /* SvP */ \ - 2480, /* Vtr */ \ - 3300, /* Vrf */ \ - 1400, /* Vrs */ \ - 4000, /* SvN */ \ - 2556, /* Vtgstv */ \ - 1000, /* Vcmp_ll */ \ - 1000, /* Vcmp_lr */ \ - 0, /* cal */ \ - 1000, /* Vcmp_rl */ \ - 1100, /* rxb_rb */ \ - 1100, /* rxb_lb */ \ - 1000, /* Vcmp_rr */ \ - 1000, /* Vcp */ \ - 2000, /* Vcn */ \ - 1550 /* Vis */ \ - }; -enum ADCINDEX {TEMP_FPGAEXT, TEMP_10GE, TEMP_DCDC, TEMP_SODL, TEMP_SODR, TEMP_FPGA, TEMP_FPGAFEBL, TEMP_FPGAFEBR}; -enum NETWORKINDEX {TXN_LEFT, TXN_RIGHT, TXN_FRAME,FLOWCTRL_10G}; -enum ROINDEX {E_PARALLEL, E_NON_PARALLEL}; -enum CLKINDEX {RUN_CLK, NUM_CLOCKS}; -#define CLK_NAMES "run" +enum DACINDEX { + E_SVP, + E_VTR, + E_VRF, + E_VRS, + E_SVN, + E_VTGSTV, + E_VCMP_LL, + E_VCMP_LR, + E_CAL, + E_VCMP_RL, + E_RXB_RB, + E_RXB_LB, + E_VCMP_RR, + E_VCP, + E_VCN, + E_VIS, + E_VTHRESHOLD +}; +#define DEFAULT_DAC_VALS \ + { \ + 0, /* SvP */ \ + 2480, /* Vtr */ \ + 3300, /* Vrf */ \ + 1400, /* Vrs */ \ + 4000, /* SvN */ \ + 2556, /* Vtgstv */ \ + 1000, /* Vcmp_ll */ \ + 1000, /* Vcmp_lr */ \ + 0, /* cal */ \ + 1000, /* Vcmp_rl */ \ + 1100, /* rxb_rb */ \ + 1100, /* rxb_lb */ \ + 1000, /* Vcmp_rr */ \ + 1000, /* Vcp */ \ + 2000, /* Vcn */ \ + 1550 /* Vis */ \ + }; +enum ADCINDEX { + TEMP_FPGAEXT, + TEMP_10GE, + TEMP_DCDC, + TEMP_SODL, + TEMP_SODR, + TEMP_FPGA, + TEMP_FPGAFEBL, + TEMP_FPGAFEBR +}; +enum NETWORKINDEX { TXN_LEFT, TXN_RIGHT, TXN_FRAME, FLOWCTRL_10G }; +enum ROINDEX { E_PARALLEL, E_NON_PARALLEL }; +enum CLKINDEX { RUN_CLK, NUM_CLOCKS }; +#define CLK_NAMES "run" /* Hardware Definitions */ -#define NCHAN (256 * 256) -#define NCHIP (4) -#define NDAC (16) +#define NCHAN (256 * 256) +#define NCHIP (4) +#define NDAC (16) - -#define TEN_GIGA_BUFFER_SIZE (4112) -#define ONE_GIGA_BUFFER_SIZE (1040) -#define TEN_GIGA_CONSTANT (4) -#define ONE_GIGA_CONSTANT (16) -#define NORMAL_HIGHVOLTAGE_INPUTPORT "/sys/class/hwmon/hwmon5/device/in0_input" -#define NORMAL_HIGHVOLTAGE_OUTPUTPORT "/sys/class/hwmon/hwmon5/device/out0_output" -#define SPECIAL9M_HIGHVOLTAGE_PORT "/dev/ttyS1" -#define SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE (16) -#define DEFAULT_UDP_SOURCE_PORT (0xE185) +#define TEN_GIGA_BUFFER_SIZE (4112) +#define ONE_GIGA_BUFFER_SIZE (1040) +#define TEN_GIGA_CONSTANT (4) +#define ONE_GIGA_CONSTANT (16) +#define NORMAL_HIGHVOLTAGE_INPUTPORT "/sys/class/hwmon/hwmon5/device/in0_input" +#define NORMAL_HIGHVOLTAGE_OUTPUTPORT \ + "/sys/class/hwmon/hwmon5/device/out0_output" +#define SPECIAL9M_HIGHVOLTAGE_PORT "/dev/ttyS1" +#define SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE (16) +#define DEFAULT_UDP_SOURCE_PORT (0xE185) /** Default Parameters */ -#define DEFAULT_NUM_FRAMES (1) -#define DEFAULT_STARTING_FRAME_NUMBER (1) -#define DEFAULT_NUM_CYCLES (1) -#define DEFAULT_EXPTIME (1E9) //ns -#define DEFAULT_PERIOD (1E9) //ns -#define DEFAULT_DELAY (0) -#define DEFAULT_HIGH_VOLTAGE (0) -#define DEFAULT_SETTINGS (DYNAMICGAIN) -#define DEFAULT_SUBFRAME_EXPOSURE (2621440) // 2.6ms -#define DEFAULT_SUBFRAME_DEADTIME (0) -#define DEFAULT_DYNAMIC_RANGE (16) +#define DEFAULT_NUM_FRAMES (1) +#define DEFAULT_STARTING_FRAME_NUMBER (1) +#define DEFAULT_NUM_CYCLES (1) +#define DEFAULT_EXPTIME (1E9) // ns +#define DEFAULT_PERIOD (1E9) // ns +#define DEFAULT_DELAY (0) +#define DEFAULT_HIGH_VOLTAGE (0) +#define DEFAULT_SETTINGS (DYNAMICGAIN) +#define DEFAULT_SUBFRAME_EXPOSURE (2621440) // 2.6ms +#define DEFAULT_SUBFRAME_DEADTIME (0) +#define DEFAULT_DYNAMIC_RANGE (16) -#define DEFAULT_PARALLEL_MODE (1) -#define DEFAULT_READOUT_STOREINRAM_MODE (0) -#define DEFAULT_READOUT_OVERFLOW32_MODE (0) -#define DEFAULT_CLK_SPEED (FULL_SPEED) -#define DEFAULT_IO_DELAY (650) -#define DEFAULT_TIMING_MODE (AUTO_TIMING) -#define DEFAULT_PHOTON_ENERGY (-1) -#define DEFAULT_RATE_CORRECTION (0) -#define DEFAULT_EXT_GATING_ENABLE (0) -#define DEFAULT_EXT_GATING_POLARITY (1) //positive -#define DEFAULT_TEST_MODE (0) -#define DEFAULT_HIGH_VOLTAGE (0) +#define DEFAULT_PARALLEL_MODE (1) +#define DEFAULT_READOUT_STOREINRAM_MODE (0) +#define DEFAULT_READOUT_OVERFLOW32_MODE (0) +#define DEFAULT_CLK_SPEED (FULL_SPEED) +#define DEFAULT_IO_DELAY (650) +#define DEFAULT_TIMING_MODE (AUTO_TIMING) +#define DEFAULT_PHOTON_ENERGY (-1) +#define DEFAULT_RATE_CORRECTION (0) +#define DEFAULT_EXT_GATING_ENABLE (0) +#define DEFAULT_EXT_GATING_POLARITY (1) // positive +#define DEFAULT_TEST_MODE (0) +#define DEFAULT_HIGH_VOLTAGE (0) -#define MAX_TRIMBITS_VALUE (63) +#define MAX_TRIMBITS_VALUE (63) -#define MAX_ROWS_PER_READOUT (256) -#define MAX_PACKETS_PER_REQUEST (256) +#define MAX_ROWS_PER_READOUT (256) +#define MAX_PACKETS_PER_REQUEST (256) -#define UDP_HEADER_MAX_FRAME_VALUE (0xFFFFFFFFFFFF) +#define UDP_HEADER_MAX_FRAME_VALUE (0xFFFFFFFFFFFF) -#define DAC_MIN_MV (0) -#define DAC_MAX_MV (2048) -#define LTC2620_MIN_VAL (0) // including LTC defines instead of LTC262.h (includes bit banging and blackfin read and write) -#define LTC2620_MAX_VAL (4095) // 12 bits -#define DAC_MAX_STEPS (4096) +#define DAC_MIN_MV (0) +#define DAC_MAX_MV (2048) +#define LTC2620_MIN_VAL \ + (0) // including LTC defines instead of LTC262.h (includes bit banging and + // blackfin read and write) +#define LTC2620_MAX_VAL (4095) // 12 bits +#define DAC_MAX_STEPS (4096) -#define MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS (0x1FFFFFFF) /** 29 bit register for max subframe exposure value */ - -#define SLAVE_HIGH_VOLTAGE_READ_VAL (-999) -#define HIGH_VOLTAGE_TOLERANCE (5) +#define MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS \ + (0x1FFFFFFF) /** 29 bit register for max subframe exposure value */ +#define SLAVE_HIGH_VOLTAGE_READ_VAL (-999) +#define HIGH_VOLTAGE_TOLERANCE (5) diff --git a/slsDetectorServers/eigerDetectorServer/xfs_types.h b/slsDetectorServers/eigerDetectorServer/xfs_types.h old mode 100755 new mode 100644 index 792cc1d82..3c7d6216c --- a/slsDetectorServers/eigerDetectorServer/xfs_types.h +++ b/slsDetectorServers/eigerDetectorServer/xfs_types.h @@ -14,35 +14,29 @@ typedef signed int xfs_i32; typedef signed short xfs_i16; typedef signed char xfs_i8; - // UDP Header -struct udp_header_type -{ - // ethternet frame (14 byte) - uint8_t dst_mac[6]; - uint8_t src_mac[6]; - uint8_t len_type[2]; - - // ip header (20 byte) - uint8_t ver_headerlen[1]; - uint8_t service_type[1]; - uint8_t total_length[2]; - uint8_t identification[2]; - uint8_t flags[1]; - uint8_t frag_offset[1]; - uint8_t time_to_live[1]; - uint8_t protocol[1]; - uint8_t ip_header_checksum[2]; - uint8_t src_ip[4]; - uint8_t dst_ip[4]; +struct udp_header_type { + // ethternet frame (14 byte) + uint8_t dst_mac[6]; + uint8_t src_mac[6]; + uint8_t len_type[2]; - // udp header (8 byte) - uint8_t src_port[2]; - uint8_t dst_port[2]; - uint8_t udp_message_len[2]; - uint8_t udp_checksum[2]; + // ip header (20 byte) + uint8_t ver_headerlen[1]; + uint8_t service_type[1]; + uint8_t total_length[2]; + uint8_t identification[2]; + uint8_t flags[1]; + uint8_t frag_offset[1]; + uint8_t time_to_live[1]; + uint8_t protocol[1]; + uint8_t ip_header_checksum[2]; + uint8_t src_ip[4]; + uint8_t dst_ip[4]; + // udp header (8 byte) + uint8_t src_port[2]; + uint8_t dst_port[2]; + uint8_t udp_message_len[2]; + uint8_t udp_checksum[2]; }; - - - diff --git a/slsDetectorServers/eigerDetectorServer/xparameters.h b/slsDetectorServers/eigerDetectorServer/xparameters.h old mode 100755 new mode 100644 index fbdac2b1f..67a826283 --- a/slsDetectorServers/eigerDetectorServer/xparameters.h +++ b/slsDetectorServers/eigerDetectorServer/xparameters.h @@ -1,4 +1,5 @@ -/* ONLY THOSE ARE USED IN THIS SOFTWARE. If one of those is modified in xilinx compilation, this file should be replaced with updated values +/* ONLY THOSE ARE USED IN THIS SOFTWARE. If one of those is modified in xilinx +compilation, this file should be replaced with updated values XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_RIGHT_BASEADDR XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_LEFT_BASEADDR @@ -14,37 +15,32 @@ XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR * * Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. -* +* * Description: Driver parameters * *******************************************************************/ -#define STDIN_BASEADDRESS 0xC0000000 +#define STDIN_BASEADDRESS 0xC0000000 #define STDOUT_BASEADDRESS 0xC0000000 /******************************************************************/ - /* Definitions for peripheral BB_IO_SHIFT_REG_PPC440 */ #define XPAR_BB_IO_SHIFT_REG_PPC440_BASEADDR 0xD3000000 #define XPAR_BB_IO_SHIFT_REG_PPC440_HIGHADDR 0xD300FFFF - /* Definitions for peripheral EIGER_BEB_SYNCH_IO_PPC440 */ #define XPAR_EIGER_BEB_SYNCH_IO_PPC440_BASEADDR 0xD3100000 #define XPAR_EIGER_BEB_SYNCH_IO_PPC440_HIGHADDR 0xD310FFFF - /* Definitions for peripheral PLB_BRAM_10G */ #define XPAR_PLB_BRAM_10G_MEM0_BASEADDR 0xD4100000 #define XPAR_PLB_BRAM_10G_MEM0_HIGHADDR 0xD410FFFF - /* Definitions for peripheral PLB_BRAM_TEMAC */ #define XPAR_PLB_BRAM_TEMAC_MEM0_BASEADDR 0xD4000000 #define XPAR_PLB_BRAM_TEMAC_MEM0_HIGHADDR 0xD400FFFF - /* Definitions for peripheral PLB_GPIO_SYS */ #define XPAR_PLB_GPIO_SYS_BASEADDR 0xD1000000 #define XPAR_PLB_GPIO_SYS_HIGHADDR 0xD100FFFF @@ -52,38 +48,30 @@ XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR /** Command Generator */ #define XPAR_CMD_GENERATOR 0xC5000000 - /** Version Numbers */ -#define XPAR_VERSION 0xc6000000 - - +#define XPAR_VERSION 0xc6000000 /* Definitions for peripheral PLB_GPIO_TEST */ #define XPAR_PLB_GPIO_TEST_BASEADDR 0xD1010000 #define XPAR_PLB_GPIO_TEST_HIGHADDR 0xD101FFFF // udp header (set frame number) -#define UDP_HEADER_FRAME_NUMBER_LSB_OFST (0x0140) -#define UDP_HEADER_FRAME_NUMBER_MSB_OFST (0x0160) - - - +#define UDP_HEADER_FRAME_NUMBER_LSB_OFST (0x0140) +#define UDP_HEADER_FRAME_NUMBER_MSB_OFST (0x0160) /* Definitions for packet, frame and delay down counters */ #define XPAR_COUNTER_BASEADDR 0xD1020000 #define XPAR_COUNTER_HIGHADDR 0xD102FFFF // udp header (get frame number) -#define UDP_HEADER_GET_FNUM_1G_LEFT_LSB_OFST (0x0004) -#define UDP_HEADER_GET_FNUM_1G_LEFT_MSB_OFST (0x0024) -#define UDP_HEADER_GET_FNUM_1G_RIGHT_LSB_OFST (0x0044) -#define UDP_HEADER_GET_FNUM_1G_RIGHT_MSB_OFST (0x0064) -#define UDP_HEADER_GET_FNUM_10G_LEFT_LSB_OFST (0x0084) -#define UDP_HEADER_GET_FNUM_10G_LEFT_MSB_OFST (0x00A4) -#define UDP_HEADER_GET_FNUM_10G_RIGHT_LSB_OFST (0x00C4) -#define UDP_HEADER_GET_FNUM_10G_RIGHT_MSB_OFST (0x00E4) - - +#define UDP_HEADER_GET_FNUM_1G_LEFT_LSB_OFST (0x0004) +#define UDP_HEADER_GET_FNUM_1G_LEFT_MSB_OFST (0x0024) +#define UDP_HEADER_GET_FNUM_1G_RIGHT_LSB_OFST (0x0044) +#define UDP_HEADER_GET_FNUM_1G_RIGHT_MSB_OFST (0x0064) +#define UDP_HEADER_GET_FNUM_10G_LEFT_LSB_OFST (0x0084) +#define UDP_HEADER_GET_FNUM_10G_LEFT_MSB_OFST (0x00A4) +#define UDP_HEADER_GET_FNUM_10G_RIGHT_LSB_OFST (0x00C4) +#define UDP_HEADER_GET_FNUM_10G_RIGHT_MSB_OFST (0x00E4) /* Definitions for peripheral PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT */ #define XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR 0xC4100000 @@ -92,46 +80,37 @@ XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR /* Definitions for a new memory */ //#define XPAR_PLB_LL_NEW_MEMORY 0xD1000000//0xD1000084//0xC4200000 - /* Definitions for peripheral PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT */ #define XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR 0xC4110000 #define XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_HIGHADDR 0xC411FFFF - /* Definitions for peripheral PLB_LL_FIFO_AURORA_RX4_TX1_LEFT */ #define XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_LEFT_BASEADDR 0xC4120000 #define XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_LEFT_HIGHADDR 0xC412FFFF - /* Definitions for peripheral PLB_LL_FIFO_AURORA_RX4_TX1_RIGHT */ #define XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_RIGHT_BASEADDR 0xC4130000 #define XPAR_PLB_LL_FIFO_AURORA_RX4_TX1_RIGHT_HIGHADDR 0xC413FFFF - /* Definitions for peripheral PLB_LL_FIFO_XAUI_10G */ #define XPAR_PLB_LL_FIFO_XAUI_10G_BASEADDR 0xC4140000 #define XPAR_PLB_LL_FIFO_XAUI_10G_HIGHADDR 0xC414FFFF - /* Definitions for peripheral PLB_V46_CPU_TO_PLB_V46_BRIDGED */ #define XPAR_PLB_V46_CPU_TO_PLB_V46_BRIDGED_BRIDGE_BASEADDR 0xCFFF0000 #define XPAR_PLB_V46_CPU_TO_PLB_V46_BRIDGED_BRIDGE_HIGHADDR 0xCFFFFFFF -#define XPAR_PLB_V46_CPU_TO_PLB_V46_BRIDGED_RNG0_BASEADDR 0xD0000000 -#define XPAR_PLB_V46_CPU_TO_PLB_V46_BRIDGED_RNG0_HIGHADDR 0xDFFFFFFF - +#define XPAR_PLB_V46_CPU_TO_PLB_V46_BRIDGED_RNG0_BASEADDR 0xD0000000 +#define XPAR_PLB_V46_CPU_TO_PLB_V46_BRIDGED_RNG0_HIGHADDR 0xDFFFFFFF /* Definitions for peripheral PPC_SRAM */ #define XPAR_PPC_SRAM_BASEADDR 0x00000000 #define XPAR_PPC_SRAM_HIGHADDR 0x01FFFFFF - /******************************************************************/ - /* Definitions for peripheral PFLASH */ #define XPAR_PFLASH_NUM_BANKS_MEM 1 - /******************************************************************/ /* Definitions for peripheral PFLASH */ @@ -152,15 +131,13 @@ XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR /* Definitions for peripheral PLB_SHT1X_IF_CH1 */ #define XPAR_PLB_SHT1X_IF_CH1_DEVICE_ID 0 -#define XPAR_PLB_SHT1X_IF_CH1_BASEADDR 0xD2200000 -#define XPAR_PLB_SHT1X_IF_CH1_HIGHADDR 0xD220FFFF - +#define XPAR_PLB_SHT1X_IF_CH1_BASEADDR 0xD2200000 +#define XPAR_PLB_SHT1X_IF_CH1_HIGHADDR 0xD220FFFF /* Definitions for peripheral PLB_SHT1X_IF_CH2 */ #define XPAR_PLB_SHT1X_IF_CH2_DEVICE_ID 1 -#define XPAR_PLB_SHT1X_IF_CH2_BASEADDR 0xD2210000 -#define XPAR_PLB_SHT1X_IF_CH2_HIGHADDR 0xD221FFFF - +#define XPAR_PLB_SHT1X_IF_CH2_BASEADDR 0xD2210000 +#define XPAR_PLB_SHT1X_IF_CH2_HIGHADDR 0xD221FFFF /******************************************************************/ @@ -168,28 +145,25 @@ XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR #define XPAR_XUARTLITE_NUM_INSTANCES 1 /* Definitions for peripheral RS232 */ -#define XPAR_RS232_BASEADDR 0xC0000000 -#define XPAR_RS232_HIGHADDR 0xC000FFFF -#define XPAR_RS232_DEVICE_ID 0 -#define XPAR_RS232_BAUDRATE 115200 +#define XPAR_RS232_BASEADDR 0xC0000000 +#define XPAR_RS232_HIGHADDR 0xC000FFFF +#define XPAR_RS232_DEVICE_ID 0 +#define XPAR_RS232_BAUDRATE 115200 #define XPAR_RS232_USE_PARITY 0 #define XPAR_RS232_ODD_PARITY 0 -#define XPAR_RS232_DATA_BITS 8 - +#define XPAR_RS232_DATA_BITS 8 /******************************************************************/ - /* Canonical definitions for peripheral RS232 */ -#define XPAR_UARTLITE_0_DEVICE_ID XPAR_RS232_DEVICE_ID -#define XPAR_UARTLITE_0_BASEADDR 0xC0000000 -#define XPAR_UARTLITE_0_HIGHADDR 0xC000FFFF -#define XPAR_UARTLITE_0_BAUDRATE 115200 +#define XPAR_UARTLITE_0_DEVICE_ID XPAR_RS232_DEVICE_ID +#define XPAR_UARTLITE_0_BASEADDR 0xC0000000 +#define XPAR_UARTLITE_0_HIGHADDR 0xC000FFFF +#define XPAR_UARTLITE_0_BAUDRATE 115200 #define XPAR_UARTLITE_0_USE_PARITY 0 #define XPAR_UARTLITE_0_ODD_PARITY 0 -#define XPAR_UARTLITE_0_DATA_BITS 8 -#define XPAR_UARTLITE_0_SIO_CHAN 1 - +#define XPAR_UARTLITE_0_DATA_BITS 8 +#define XPAR_UARTLITE_0_SIO_CHAN 1 /******************************************************************/ @@ -197,144 +171,137 @@ XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR #define XPAR_XSPI_NUM_INSTANCES 2 /* Definitions for peripheral SPI_FLASH */ -#define XPAR_SPI_FLASH_DEVICE_ID 0 -#define XPAR_SPI_FLASH_BASEADDR 0xD2000000 -#define XPAR_SPI_FLASH_HIGHADDR 0xD200FFFF -#define XPAR_SPI_FLASH_FIFO_EXIST 1 -#define XPAR_SPI_FLASH_SPI_SLAVE_ONLY 0 -#define XPAR_SPI_FLASH_NUM_SS_BITS 1 +#define XPAR_SPI_FLASH_DEVICE_ID 0 +#define XPAR_SPI_FLASH_BASEADDR 0xD2000000 +#define XPAR_SPI_FLASH_HIGHADDR 0xD200FFFF +#define XPAR_SPI_FLASH_FIFO_EXIST 1 +#define XPAR_SPI_FLASH_SPI_SLAVE_ONLY 0 +#define XPAR_SPI_FLASH_NUM_SS_BITS 1 #define XPAR_SPI_FLASH_NUM_TRANSFER_BITS 8 - /* Definitions for peripheral XPS_SPI_FEB_CFG */ -#define XPAR_XPS_SPI_FEB_CFG_DEVICE_ID 1 -#define XPAR_XPS_SPI_FEB_CFG_BASEADDR 0xD2010000 -#define XPAR_XPS_SPI_FEB_CFG_HIGHADDR 0xD201FFFF -#define XPAR_XPS_SPI_FEB_CFG_FIFO_EXIST 1 -#define XPAR_XPS_SPI_FEB_CFG_SPI_SLAVE_ONLY 0 -#define XPAR_XPS_SPI_FEB_CFG_NUM_SS_BITS 2 +#define XPAR_XPS_SPI_FEB_CFG_DEVICE_ID 1 +#define XPAR_XPS_SPI_FEB_CFG_BASEADDR 0xD2010000 +#define XPAR_XPS_SPI_FEB_CFG_HIGHADDR 0xD201FFFF +#define XPAR_XPS_SPI_FEB_CFG_FIFO_EXIST 1 +#define XPAR_XPS_SPI_FEB_CFG_SPI_SLAVE_ONLY 0 +#define XPAR_XPS_SPI_FEB_CFG_NUM_SS_BITS 2 #define XPAR_XPS_SPI_FEB_CFG_NUM_TRANSFER_BITS 8 - /******************************************************************/ - /* Canonical definitions for peripheral SPI_FLASH */ -#define XPAR_SPI_0_DEVICE_ID XPAR_SPI_FLASH_DEVICE_ID -#define XPAR_SPI_0_BASEADDR 0xD2000000 -#define XPAR_SPI_0_HIGHADDR 0xD200FFFF -#define XPAR_SPI_0_FIFO_EXIST 1 -#define XPAR_SPI_0_SPI_SLAVE_ONLY 0 -#define XPAR_SPI_0_NUM_SS_BITS 1 +#define XPAR_SPI_0_DEVICE_ID XPAR_SPI_FLASH_DEVICE_ID +#define XPAR_SPI_0_BASEADDR 0xD2000000 +#define XPAR_SPI_0_HIGHADDR 0xD200FFFF +#define XPAR_SPI_0_FIFO_EXIST 1 +#define XPAR_SPI_0_SPI_SLAVE_ONLY 0 +#define XPAR_SPI_0_NUM_SS_BITS 1 #define XPAR_SPI_0_NUM_TRANSFER_BITS 8 - /* Canonical definitions for peripheral XPS_SPI_FEB_CFG */ -#define XPAR_SPI_1_DEVICE_ID XPAR_XPS_SPI_FEB_CFG_DEVICE_ID -#define XPAR_SPI_1_BASEADDR 0xD2010000 -#define XPAR_SPI_1_HIGHADDR 0xD201FFFF -#define XPAR_SPI_1_FIFO_EXIST 1 -#define XPAR_SPI_1_SPI_SLAVE_ONLY 0 -#define XPAR_SPI_1_NUM_SS_BITS 2 +#define XPAR_SPI_1_DEVICE_ID XPAR_XPS_SPI_FEB_CFG_DEVICE_ID +#define XPAR_SPI_1_BASEADDR 0xD2010000 +#define XPAR_SPI_1_HIGHADDR 0xD201FFFF +#define XPAR_SPI_1_FIFO_EXIST 1 +#define XPAR_SPI_1_SPI_SLAVE_ONLY 0 +#define XPAR_SPI_1_NUM_SS_BITS 2 #define XPAR_SPI_1_NUM_TRANSFER_BITS 8 - /******************************************************************/ /* Definitions for driver LLTEMAC */ #define XPAR_XLLTEMAC_NUM_INSTANCES 1 /* Definitions for peripheral TEMAC_INST Channel 0 */ -#define XPAR_TEMAC_INST_CHAN_0_DEVICE_ID 0 -#define XPAR_TEMAC_INST_CHAN_0_BASEADDR 0xC3000000 -#define XPAR_TEMAC_INST_CHAN_0_HIGHADDR 0xC30FFFFF -#define XPAR_TEMAC_INST_CHAN_0_TXCSUM 0 -#define XPAR_TEMAC_INST_CHAN_0_RXCSUM 0 -#define XPAR_TEMAC_INST_CHAN_0_PHY_TYPE 4 -#define XPAR_TEMAC_INST_CHAN_0_TXVLAN_TRAN 0 -#define XPAR_TEMAC_INST_CHAN_0_RXVLAN_TRAN 0 -#define XPAR_TEMAC_INST_CHAN_0_TXVLAN_TAG 0 -#define XPAR_TEMAC_INST_CHAN_0_RXVLAN_TAG 0 -#define XPAR_TEMAC_INST_CHAN_0_TXVLAN_STRP 0 -#define XPAR_TEMAC_INST_CHAN_0_RXVLAN_STRP 0 +#define XPAR_TEMAC_INST_CHAN_0_DEVICE_ID 0 +#define XPAR_TEMAC_INST_CHAN_0_BASEADDR 0xC3000000 +#define XPAR_TEMAC_INST_CHAN_0_HIGHADDR 0xC30FFFFF +#define XPAR_TEMAC_INST_CHAN_0_TXCSUM 0 +#define XPAR_TEMAC_INST_CHAN_0_RXCSUM 0 +#define XPAR_TEMAC_INST_CHAN_0_PHY_TYPE 4 +#define XPAR_TEMAC_INST_CHAN_0_TXVLAN_TRAN 0 +#define XPAR_TEMAC_INST_CHAN_0_RXVLAN_TRAN 0 +#define XPAR_TEMAC_INST_CHAN_0_TXVLAN_TAG 0 +#define XPAR_TEMAC_INST_CHAN_0_RXVLAN_TAG 0 +#define XPAR_TEMAC_INST_CHAN_0_TXVLAN_STRP 0 +#define XPAR_TEMAC_INST_CHAN_0_RXVLAN_STRP 0 #define XPAR_TEMAC_INST_CHAN_0_MCAST_EXTEND 0 /* Canonical definitions for peripheral TEMAC_INST Channel 0 */ -#define XPAR_LLTEMAC_0_DEVICE_ID 0 -#define XPAR_LLTEMAC_0_BASEADDR 0xC3000000 -#define XPAR_LLTEMAC_0_HIGHADDR 0xC30FFFFF -#define XPAR_LLTEMAC_0_TXCSUM 0 -#define XPAR_LLTEMAC_0_RXCSUM 0 -#define XPAR_LLTEMAC_0_PHY_TYPE 4 -#define XPAR_LLTEMAC_0_TXVLAN_TRAN 0 -#define XPAR_LLTEMAC_0_RXVLAN_TRAN 0 -#define XPAR_LLTEMAC_0_TXVLAN_TAG 0 -#define XPAR_LLTEMAC_0_RXVLAN_TAG 0 -#define XPAR_LLTEMAC_0_TXVLAN_STRP 0 -#define XPAR_LLTEMAC_0_RXVLAN_STRP 0 +#define XPAR_LLTEMAC_0_DEVICE_ID 0 +#define XPAR_LLTEMAC_0_BASEADDR 0xC3000000 +#define XPAR_LLTEMAC_0_HIGHADDR 0xC30FFFFF +#define XPAR_LLTEMAC_0_TXCSUM 0 +#define XPAR_LLTEMAC_0_RXCSUM 0 +#define XPAR_LLTEMAC_0_PHY_TYPE 4 +#define XPAR_LLTEMAC_0_TXVLAN_TRAN 0 +#define XPAR_LLTEMAC_0_RXVLAN_TRAN 0 +#define XPAR_LLTEMAC_0_TXVLAN_TAG 0 +#define XPAR_LLTEMAC_0_RXVLAN_TAG 0 +#define XPAR_LLTEMAC_0_TXVLAN_STRP 0 +#define XPAR_LLTEMAC_0_RXVLAN_STRP 0 #define XPAR_LLTEMAC_0_MCAST_EXTEND 0 -#define XPAR_LLTEMAC_0_INTR 1 - +#define XPAR_LLTEMAC_0_INTR 1 /* LocalLink TYPE Enumerations */ -#define XPAR_LL_FIFO 1 -#define XPAR_LL_DMA 2 - +#define XPAR_LL_FIFO 1 +#define XPAR_LL_DMA 2 /* Canonical LocalLink parameters for TEMAC_INST */ - /******************************************************************/ - /* Definitions for peripheral XPS_BRAM_IF_CNTLR_PPC440 */ #define XPAR_XPS_BRAM_IF_CNTLR_PPC440_BASEADDR 0xFFFC0000 #define XPAR_XPS_BRAM_IF_CNTLR_PPC440_HIGHADDR 0xFFFFFFFF - /******************************************************************/ #define XPAR_INTC_MAX_NUM_INTR_INPUTS 5 -#define XPAR_XINTC_HAS_IPR 1 -#define XPAR_XINTC_USE_DCR 0 +#define XPAR_XINTC_HAS_IPR 1 +#define XPAR_XINTC_USE_DCR 0 /* Definitions for driver INTC */ #define XPAR_XINTC_NUM_INSTANCES 1 /* Definitions for peripheral XPS_INTC_PPC440 */ -#define XPAR_XPS_INTC_PPC440_DEVICE_ID 0 -#define XPAR_XPS_INTC_PPC440_BASEADDR 0xC1000000 -#define XPAR_XPS_INTC_PPC440_HIGHADDR 0xC100FFFF +#define XPAR_XPS_INTC_PPC440_DEVICE_ID 0 +#define XPAR_XPS_INTC_PPC440_BASEADDR 0xC1000000 +#define XPAR_XPS_INTC_PPC440_HIGHADDR 0xC100FFFF #define XPAR_XPS_INTC_PPC440_KIND_OF_INTR 0xFFFFFFF4 - /******************************************************************/ -#define XPAR_INTC_SINGLE_BASEADDR 0xC1000000 -#define XPAR_INTC_SINGLE_HIGHADDR 0xC100FFFF -#define XPAR_INTC_SINGLE_DEVICE_ID XPAR_XPS_INTC_PPC440_DEVICE_ID -#define XPAR_XPS_LL_FIFO_TEMAC_IP2INTC_IRPT_MASK 0X000001 +#define XPAR_INTC_SINGLE_BASEADDR 0xC1000000 +#define XPAR_INTC_SINGLE_HIGHADDR 0xC100FFFF +#define XPAR_INTC_SINGLE_DEVICE_ID XPAR_XPS_INTC_PPC440_DEVICE_ID +#define XPAR_XPS_LL_FIFO_TEMAC_IP2INTC_IRPT_MASK 0X000001 #define XPAR_XPS_INTC_PPC440_XPS_LL_FIFO_TEMAC_IP2INTC_IRPT_INTR 0 -#define XPAR_TEMAC_INST_TEMACINTC0_IRPT_MASK 0X000002 -#define XPAR_XPS_INTC_PPC440_TEMAC_INST_TEMACINTC0_IRPT_INTR 1 -#define XPAR_XPS_TIMER_PPC440_INTERRUPT_MASK 0X000004 -#define XPAR_XPS_INTC_PPC440_XPS_TIMER_PPC440_INTERRUPT_INTR 2 -#define XPAR_SPI_FLASH_IP2INTC_IRPT_MASK 0X000008 -#define XPAR_XPS_INTC_PPC440_SPI_FLASH_IP2INTC_IRPT_INTR 3 -#define XPAR_RS232_INTERRUPT_MASK 0X000010 -#define XPAR_XPS_INTC_PPC440_RS232_INTERRUPT_INTR 4 +#define XPAR_TEMAC_INST_TEMACINTC0_IRPT_MASK 0X000002 +#define XPAR_XPS_INTC_PPC440_TEMAC_INST_TEMACINTC0_IRPT_INTR 1 +#define XPAR_XPS_TIMER_PPC440_INTERRUPT_MASK 0X000004 +#define XPAR_XPS_INTC_PPC440_XPS_TIMER_PPC440_INTERRUPT_INTR 2 +#define XPAR_SPI_FLASH_IP2INTC_IRPT_MASK 0X000008 +#define XPAR_XPS_INTC_PPC440_SPI_FLASH_IP2INTC_IRPT_INTR 3 +#define XPAR_RS232_INTERRUPT_MASK 0X000010 +#define XPAR_XPS_INTC_PPC440_RS232_INTERRUPT_INTR 4 /******************************************************************/ /* Canonical definitions for peripheral XPS_INTC_PPC440 */ -#define XPAR_INTC_0_DEVICE_ID XPAR_XPS_INTC_PPC440_DEVICE_ID -#define XPAR_INTC_0_BASEADDR 0xC1000000 -#define XPAR_INTC_0_HIGHADDR 0xC100FFFF +#define XPAR_INTC_0_DEVICE_ID XPAR_XPS_INTC_PPC440_DEVICE_ID +#define XPAR_INTC_0_BASEADDR 0xC1000000 +#define XPAR_INTC_0_HIGHADDR 0xC100FFFF #define XPAR_INTC_0_KIND_OF_INTR 0xFFFFFFF4 -#define XPAR_INTC_0_LLFIFO_0_VEC_ID XPAR_XPS_INTC_PPC440_XPS_LL_FIFO_TEMAC_IP2INTC_IRPT_INTR -#define XPAR_INTC_0_LLTEMAC_0_VEC_ID XPAR_XPS_INTC_PPC440_TEMAC_INST_TEMACINTC0_IRPT_INTR -#define XPAR_INTC_0_TMRCTR_0_VEC_ID XPAR_XPS_INTC_PPC440_XPS_TIMER_PPC440_INTERRUPT_INTR -#define XPAR_INTC_0_SPI_0_VEC_ID XPAR_XPS_INTC_PPC440_SPI_FLASH_IP2INTC_IRPT_INTR +#define XPAR_INTC_0_LLFIFO_0_VEC_ID \ + XPAR_XPS_INTC_PPC440_XPS_LL_FIFO_TEMAC_IP2INTC_IRPT_INTR +#define XPAR_INTC_0_LLTEMAC_0_VEC_ID \ + XPAR_XPS_INTC_PPC440_TEMAC_INST_TEMACINTC0_IRPT_INTR +#define XPAR_INTC_0_TMRCTR_0_VEC_ID \ + XPAR_XPS_INTC_PPC440_XPS_TIMER_PPC440_INTERRUPT_INTR +#define XPAR_INTC_0_SPI_0_VEC_ID \ + XPAR_XPS_INTC_PPC440_SPI_FLASH_IP2INTC_IRPT_INTR #define XPAR_INTC_0_UARTLITE_0_VEC_ID XPAR_XPS_INTC_PPC440_RS232_INTERRUPT_INTR /******************************************************************/ @@ -344,17 +311,15 @@ XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR /* Definitions for peripheral XPS_LL_FIFO_TEMAC */ #define XPAR_XPS_LL_FIFO_TEMAC_DEVICE_ID 0 -#define XPAR_XPS_LL_FIFO_TEMAC_BASEADDR 0xC4000000 -#define XPAR_XPS_LL_FIFO_TEMAC_HIGHADDR 0xC400FFFF - +#define XPAR_XPS_LL_FIFO_TEMAC_BASEADDR 0xC4000000 +#define XPAR_XPS_LL_FIFO_TEMAC_HIGHADDR 0xC400FFFF /******************************************************************/ /* Canonical definitions for peripheral XPS_LL_FIFO_TEMAC */ #define XPAR_LLFIFO_0_DEVICE_ID XPAR_XPS_LL_FIFO_TEMAC_DEVICE_ID -#define XPAR_LLFIFO_0_BASEADDR 0xC4000000 -#define XPAR_LLFIFO_0_HIGHADDR 0xC400FFFF - +#define XPAR_LLFIFO_0_BASEADDR 0xC4000000 +#define XPAR_LLFIFO_0_HIGHADDR 0xC400FFFF /******************************************************************/ @@ -362,22 +327,19 @@ XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR #define XPAR_XSYSMON_NUM_INSTANCES 1 /* Definitions for peripheral XPS_SYSMON_ADC_PPC440 */ -#define XPAR_XPS_SYSMON_ADC_PPC440_DEVICE_ID 0 -#define XPAR_XPS_SYSMON_ADC_PPC440_BASEADDR 0xD0010000 -#define XPAR_XPS_SYSMON_ADC_PPC440_HIGHADDR 0xD001FFFF +#define XPAR_XPS_SYSMON_ADC_PPC440_DEVICE_ID 0 +#define XPAR_XPS_SYSMON_ADC_PPC440_BASEADDR 0xD0010000 +#define XPAR_XPS_SYSMON_ADC_PPC440_HIGHADDR 0xD001FFFF #define XPAR_XPS_SYSMON_ADC_PPC440_INCLUDE_INTR 1 - /******************************************************************/ - /* Canonical definitions for peripheral XPS_SYSMON_ADC_PPC440 */ -#define XPAR_SYSMON_0_DEVICE_ID XPAR_XPS_SYSMON_ADC_PPC440_DEVICE_ID -#define XPAR_SYSMON_0_BASEADDR 0xD0010000 -#define XPAR_SYSMON_0_HIGHADDR 0xD001FFFF +#define XPAR_SYSMON_0_DEVICE_ID XPAR_XPS_SYSMON_ADC_PPC440_DEVICE_ID +#define XPAR_SYSMON_0_BASEADDR 0xD0010000 +#define XPAR_SYSMON_0_HIGHADDR 0xD001FFFF #define XPAR_SYSMON_0_INCLUDE_INTR 1 - /******************************************************************/ /* Definitions for driver TMRCTR */ @@ -385,18 +347,15 @@ XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR /* Definitions for peripheral XPS_TIMER_PPC440 */ #define XPAR_XPS_TIMER_PPC440_DEVICE_ID 0 -#define XPAR_XPS_TIMER_PPC440_BASEADDR 0xC2000000 -#define XPAR_XPS_TIMER_PPC440_HIGHADDR 0xC200FFFF - +#define XPAR_XPS_TIMER_PPC440_BASEADDR 0xC2000000 +#define XPAR_XPS_TIMER_PPC440_HIGHADDR 0xC200FFFF /******************************************************************/ - /* Canonical definitions for peripheral XPS_TIMER_PPC440 */ #define XPAR_TMRCTR_0_DEVICE_ID XPAR_XPS_TIMER_PPC440_DEVICE_ID -#define XPAR_TMRCTR_0_BASEADDR 0xC2000000 -#define XPAR_TMRCTR_0_HIGHADDR 0xC200FFFF - +#define XPAR_TMRCTR_0_BASEADDR 0xC2000000 +#define XPAR_TMRCTR_0_HIGHADDR 0xC200FFFF /******************************************************************/ @@ -408,149 +367,148 @@ XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_LEFT_BASEADDR #define XPAR_PROC_BUS_0_FREQ_HZ 100000000 /******************************************************************/ -#define XPAR_CPU_PPC440_CORE_CLOCK_FREQ_HZ 400000000 +#define XPAR_CPU_PPC440_CORE_CLOCK_FREQ_HZ 400000000 #define XPAR_PPC440_VIRTEX5_CORE_CLOCK_FREQ_HZ 400000000 -#define XPAR_CPU_PPC440_IDCR_BASEADDR 0x00000000 +#define XPAR_CPU_PPC440_IDCR_BASEADDR 0x00000000 /******************************************************************/ -#define XPAR_CPU_ID 0 -#define XPAR_PPC440_VIRTEX5_ID 0 -#define XPAR_PPC440_VIRTEX5_PIR 0b1111 -#define XPAR_PPC440_VIRTEX5_ENDIAN_RESET 0 -#define XPAR_PPC440_VIRTEX5_USER_RESET 0b0000 -#define XPAR_PPC440_VIRTEX5_INTERCONNECT_IMASK 0xffffffff -#define XPAR_PPC440_VIRTEX5_ICU_RD_FETCH_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_ICU_RD_SPEC_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_ICU_RD_TOUCH_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_DCU_RD_LD_CACHE_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_DCU_RD_NONCACHE_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_DCU_RD_TOUCH_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_DCU_RD_URGENT_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_DCU_WR_FLUSH_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_DCU_WR_STORE_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_DCU_WR_URGENT_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_DMA0_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_DMA1_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_DMA2_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_DMA3_PLB_PRIO 0b00 -#define XPAR_PPC440_VIRTEX5_IDCR_BASEADDR 0x00000000 -#define XPAR_PPC440_VIRTEX5_IDCR_HIGHADDR 0x000000FF -#define XPAR_PPC440_VIRTEX5_APU_CONTROL 0b00010000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_0 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_1 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_2 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_3 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_4 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_5 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_6 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_7 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_8 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_9 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_10 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_11 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_12 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_13 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_14 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_APU_UDI_15 0b000000000000000000000000 -#define XPAR_PPC440_VIRTEX5_PPC440MC_ADDR_BASE 0x00000000 -#define XPAR_PPC440_VIRTEX5_PPC440MC_ADDR_HIGH 0X01FFFFFF -#define XPAR_PPC440_VIRTEX5_PPC440MC_ROW_CONFLICT_MASK 0x00000000 +#define XPAR_CPU_ID 0 +#define XPAR_PPC440_VIRTEX5_ID 0 +#define XPAR_PPC440_VIRTEX5_PIR 0b1111 +#define XPAR_PPC440_VIRTEX5_ENDIAN_RESET 0 +#define XPAR_PPC440_VIRTEX5_USER_RESET 0b0000 +#define XPAR_PPC440_VIRTEX5_INTERCONNECT_IMASK 0xffffffff +#define XPAR_PPC440_VIRTEX5_ICU_RD_FETCH_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_ICU_RD_SPEC_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_ICU_RD_TOUCH_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_DCU_RD_LD_CACHE_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_DCU_RD_NONCACHE_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_DCU_RD_TOUCH_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_DCU_RD_URGENT_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_DCU_WR_FLUSH_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_DCU_WR_STORE_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_DCU_WR_URGENT_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_DMA0_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_DMA1_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_DMA2_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_DMA3_PLB_PRIO 0b00 +#define XPAR_PPC440_VIRTEX5_IDCR_BASEADDR 0x00000000 +#define XPAR_PPC440_VIRTEX5_IDCR_HIGHADDR 0x000000FF +#define XPAR_PPC440_VIRTEX5_APU_CONTROL 0b00010000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_0 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_1 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_2 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_3 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_4 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_5 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_6 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_7 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_8 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_9 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_10 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_11 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_12 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_13 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_14 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_APU_UDI_15 0b000000000000000000000000 +#define XPAR_PPC440_VIRTEX5_PPC440MC_ADDR_BASE 0x00000000 +#define XPAR_PPC440_VIRTEX5_PPC440MC_ADDR_HIGH 0X01FFFFFF +#define XPAR_PPC440_VIRTEX5_PPC440MC_ROW_CONFLICT_MASK 0x00000000 #define XPAR_PPC440_VIRTEX5_PPC440MC_BANK_CONFLICT_MASK 0x00000000 -#define XPAR_PPC440_VIRTEX5_PPC440MC_CONTROL 0X8140008F -#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_ICU 4 -#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_DCUW 3 -#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_DCUR 2 -#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_SPLB1 0 -#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_SPLB0 1 -#define XPAR_PPC440_VIRTEX5_PPC440MC_ARB_MODE 0 -#define XPAR_PPC440_VIRTEX5_PPC440MC_MAX_BURST 8 -#define XPAR_PPC440_VIRTEX5_MPLB_AWIDTH 32 -#define XPAR_PPC440_VIRTEX5_MPLB_DWIDTH 128 -#define XPAR_PPC440_VIRTEX5_MPLB_NATIVE_DWIDTH 128 -#define XPAR_PPC440_VIRTEX5_MPLB_COUNTER 0x00000500 -#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_ICU 4 -#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_DCUW 3 -#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_DCUR 2 -#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_SPLB1 0 -#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_SPLB0 1 -#define XPAR_PPC440_VIRTEX5_MPLB_ARB_MODE 0 -#define XPAR_PPC440_VIRTEX5_MPLB_SYNC_TATTRIBUTE 0 -#define XPAR_PPC440_VIRTEX5_MPLB_MAX_BURST 8 -#define XPAR_PPC440_VIRTEX5_MPLB_ALLOW_LOCK_XFER 1 -#define XPAR_PPC440_VIRTEX5_MPLB_READ_PIPE_ENABLE 1 -#define XPAR_PPC440_VIRTEX5_MPLB_WRITE_PIPE_ENABLE 1 -#define XPAR_PPC440_VIRTEX5_MPLB_WRITE_POST_ENABLE 1 -#define XPAR_PPC440_VIRTEX5_MPLB_P2P 0 -#define XPAR_PPC440_VIRTEX5_MPLB_WDOG_ENABLE 1 -#define XPAR_PPC440_VIRTEX5_SPLB0_AWIDTH 32 -#define XPAR_PPC440_VIRTEX5_SPLB0_DWIDTH 128 -#define XPAR_PPC440_VIRTEX5_SPLB0_NATIVE_DWIDTH 128 -#define XPAR_PPC440_VIRTEX5_SPLB0_SUPPORT_BURSTS 1 -#define XPAR_PPC440_VIRTEX5_SPLB0_USE_MPLB_ADDR 0 -#define XPAR_PPC440_VIRTEX5_SPLB0_NUM_MPLB_ADDR_RNG 0 -#define XPAR_PPC440_VIRTEX5_SPLB0_RNG_MC_BASEADDR 0xFFFFFFFF -#define XPAR_PPC440_VIRTEX5_SPLB0_RNG_MC_HIGHADDR 0x00000000 -#define XPAR_PPC440_VIRTEX5_SPLB0_RNG0_MPLB_BASEADDR 0xFFFFFFFF -#define XPAR_PPC440_VIRTEX5_SPLB0_RNG0_MPLB_HIGHADDR 0x00000000 -#define XPAR_PPC440_VIRTEX5_SPLB0_RNG1_MPLB_BASEADDR 0xFFFFFFFF -#define XPAR_PPC440_VIRTEX5_SPLB0_RNG1_MPLB_HIGHADDR 0x00000000 -#define XPAR_PPC440_VIRTEX5_SPLB0_RNG2_MPLB_BASEADDR 0xFFFFFFFF -#define XPAR_PPC440_VIRTEX5_SPLB0_RNG2_MPLB_HIGHADDR 0x00000000 -#define XPAR_PPC440_VIRTEX5_SPLB0_RNG3_MPLB_BASEADDR 0xFFFFFFFF -#define XPAR_PPC440_VIRTEX5_SPLB0_RNG3_MPLB_HIGHADDR 0x00000000 -#define XPAR_PPC440_VIRTEX5_SPLB0_NUM_MASTERS 1 -#define XPAR_PPC440_VIRTEX5_SPLB0_MID_WIDTH 1 -#define XPAR_PPC440_VIRTEX5_SPLB0_ALLOW_LOCK_XFER 1 -#define XPAR_PPC440_VIRTEX5_SPLB0_READ_PIPE_ENABLE 1 -#define XPAR_PPC440_VIRTEX5_SPLB0_PROPAGATE_MIRQ 0 -#define XPAR_PPC440_VIRTEX5_SPLB0_P2P -1 -#define XPAR_PPC440_VIRTEX5_SPLB1_AWIDTH 32 -#define XPAR_PPC440_VIRTEX5_SPLB1_DWIDTH 128 -#define XPAR_PPC440_VIRTEX5_SPLB1_NATIVE_DWIDTH 128 -#define XPAR_PPC440_VIRTEX5_SPLB1_SUPPORT_BURSTS 1 -#define XPAR_PPC440_VIRTEX5_SPLB1_USE_MPLB_ADDR 0 -#define XPAR_PPC440_VIRTEX5_SPLB1_NUM_MPLB_ADDR_RNG 0 -#define XPAR_PPC440_VIRTEX5_SPLB1_RNG_MC_BASEADDR 0xFFFFFFFF -#define XPAR_PPC440_VIRTEX5_SPLB1_RNG_MC_HIGHADDR 0x00000000 -#define XPAR_PPC440_VIRTEX5_SPLB1_RNG0_MPLB_BASEADDR 0xFFFFFFFF -#define XPAR_PPC440_VIRTEX5_SPLB1_RNG0_MPLB_HIGHADDR 0x00000000 -#define XPAR_PPC440_VIRTEX5_SPLB1_RNG1_MPLB_BASEADDR 0xFFFFFFFF -#define XPAR_PPC440_VIRTEX5_SPLB1_RNG1_MPLB_HIGHADDR 0x00000000 -#define XPAR_PPC440_VIRTEX5_SPLB1_RNG2_MPLB_BASEADDR 0xFFFFFFFF -#define XPAR_PPC440_VIRTEX5_SPLB1_RNG2_MPLB_HIGHADDR 0x00000000 -#define XPAR_PPC440_VIRTEX5_SPLB1_RNG3_MPLB_BASEADDR 0xFFFFFFFF -#define XPAR_PPC440_VIRTEX5_SPLB1_RNG3_MPLB_HIGHADDR 0x00000000 -#define XPAR_PPC440_VIRTEX5_SPLB1_NUM_MASTERS 1 -#define XPAR_PPC440_VIRTEX5_SPLB1_MID_WIDTH 1 -#define XPAR_PPC440_VIRTEX5_SPLB1_ALLOW_LOCK_XFER 1 -#define XPAR_PPC440_VIRTEX5_SPLB1_READ_PIPE_ENABLE 1 -#define XPAR_PPC440_VIRTEX5_SPLB1_PROPAGATE_MIRQ 0 -#define XPAR_PPC440_VIRTEX5_SPLB1_P2P -1 -#define XPAR_PPC440_VIRTEX5_NUM_DMA 0 -#define XPAR_PPC440_VIRTEX5_DMA0_TXCHANNELCTRL 0x01010000 -#define XPAR_PPC440_VIRTEX5_DMA0_RXCHANNELCTRL 0x01010000 -#define XPAR_PPC440_VIRTEX5_DMA0_CONTROL 0b00000000 -#define XPAR_PPC440_VIRTEX5_DMA0_TXIRQTIMER 0b1111111111 -#define XPAR_PPC440_VIRTEX5_DMA0_RXIRQTIMER 0b1111111111 -#define XPAR_PPC440_VIRTEX5_DMA1_TXCHANNELCTRL 0x01010000 -#define XPAR_PPC440_VIRTEX5_DMA1_RXCHANNELCTRL 0x01010000 -#define XPAR_PPC440_VIRTEX5_DMA1_CONTROL 0b00000000 -#define XPAR_PPC440_VIRTEX5_DMA1_TXIRQTIMER 0b1111111111 -#define XPAR_PPC440_VIRTEX5_DMA1_RXIRQTIMER 0b1111111111 -#define XPAR_PPC440_VIRTEX5_DMA2_TXCHANNELCTRL 0x01010000 -#define XPAR_PPC440_VIRTEX5_DMA2_RXCHANNELCTRL 0x01010000 -#define XPAR_PPC440_VIRTEX5_DMA2_CONTROL 0b00000000 -#define XPAR_PPC440_VIRTEX5_DMA2_TXIRQTIMER 0b1111111111 -#define XPAR_PPC440_VIRTEX5_DMA2_RXIRQTIMER 0b1111111111 -#define XPAR_PPC440_VIRTEX5_DMA3_TXCHANNELCTRL 0x01010000 -#define XPAR_PPC440_VIRTEX5_DMA3_RXCHANNELCTRL 0x01010000 -#define XPAR_PPC440_VIRTEX5_DMA3_CONTROL 0b00000000 -#define XPAR_PPC440_VIRTEX5_DMA3_TXIRQTIMER 0b1111111111 -#define XPAR_PPC440_VIRTEX5_DMA3_RXIRQTIMER 0b1111111111 -#define XPAR_PPC440_VIRTEX5_DCR_AUTOLOCK_ENABLE 1 -#define XPAR_PPC440_VIRTEX5_PPCDM_ASYNCMODE 0 -#define XPAR_PPC440_VIRTEX5_PPCDS_ASYNCMODE 0 -#define XPAR_PPC440_VIRTEX5_GENERATE_PLB_TIMESPECS 1 -#define XPAR_PPC440_VIRTEX5_HW_VER "1.01.a" +#define XPAR_PPC440_VIRTEX5_PPC440MC_CONTROL 0X8140008F +#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_ICU 4 +#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_DCUW 3 +#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_DCUR 2 +#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_SPLB1 0 +#define XPAR_PPC440_VIRTEX5_PPC440MC_PRIO_SPLB0 1 +#define XPAR_PPC440_VIRTEX5_PPC440MC_ARB_MODE 0 +#define XPAR_PPC440_VIRTEX5_PPC440MC_MAX_BURST 8 +#define XPAR_PPC440_VIRTEX5_MPLB_AWIDTH 32 +#define XPAR_PPC440_VIRTEX5_MPLB_DWIDTH 128 +#define XPAR_PPC440_VIRTEX5_MPLB_NATIVE_DWIDTH 128 +#define XPAR_PPC440_VIRTEX5_MPLB_COUNTER 0x00000500 +#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_ICU 4 +#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_DCUW 3 +#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_DCUR 2 +#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_SPLB1 0 +#define XPAR_PPC440_VIRTEX5_MPLB_PRIO_SPLB0 1 +#define XPAR_PPC440_VIRTEX5_MPLB_ARB_MODE 0 +#define XPAR_PPC440_VIRTEX5_MPLB_SYNC_TATTRIBUTE 0 +#define XPAR_PPC440_VIRTEX5_MPLB_MAX_BURST 8 +#define XPAR_PPC440_VIRTEX5_MPLB_ALLOW_LOCK_XFER 1 +#define XPAR_PPC440_VIRTEX5_MPLB_READ_PIPE_ENABLE 1 +#define XPAR_PPC440_VIRTEX5_MPLB_WRITE_PIPE_ENABLE 1 +#define XPAR_PPC440_VIRTEX5_MPLB_WRITE_POST_ENABLE 1 +#define XPAR_PPC440_VIRTEX5_MPLB_P2P 0 +#define XPAR_PPC440_VIRTEX5_MPLB_WDOG_ENABLE 1 +#define XPAR_PPC440_VIRTEX5_SPLB0_AWIDTH 32 +#define XPAR_PPC440_VIRTEX5_SPLB0_DWIDTH 128 +#define XPAR_PPC440_VIRTEX5_SPLB0_NATIVE_DWIDTH 128 +#define XPAR_PPC440_VIRTEX5_SPLB0_SUPPORT_BURSTS 1 +#define XPAR_PPC440_VIRTEX5_SPLB0_USE_MPLB_ADDR 0 +#define XPAR_PPC440_VIRTEX5_SPLB0_NUM_MPLB_ADDR_RNG 0 +#define XPAR_PPC440_VIRTEX5_SPLB0_RNG_MC_BASEADDR 0xFFFFFFFF +#define XPAR_PPC440_VIRTEX5_SPLB0_RNG_MC_HIGHADDR 0x00000000 +#define XPAR_PPC440_VIRTEX5_SPLB0_RNG0_MPLB_BASEADDR 0xFFFFFFFF +#define XPAR_PPC440_VIRTEX5_SPLB0_RNG0_MPLB_HIGHADDR 0x00000000 +#define XPAR_PPC440_VIRTEX5_SPLB0_RNG1_MPLB_BASEADDR 0xFFFFFFFF +#define XPAR_PPC440_VIRTEX5_SPLB0_RNG1_MPLB_HIGHADDR 0x00000000 +#define XPAR_PPC440_VIRTEX5_SPLB0_RNG2_MPLB_BASEADDR 0xFFFFFFFF +#define XPAR_PPC440_VIRTEX5_SPLB0_RNG2_MPLB_HIGHADDR 0x00000000 +#define XPAR_PPC440_VIRTEX5_SPLB0_RNG3_MPLB_BASEADDR 0xFFFFFFFF +#define XPAR_PPC440_VIRTEX5_SPLB0_RNG3_MPLB_HIGHADDR 0x00000000 +#define XPAR_PPC440_VIRTEX5_SPLB0_NUM_MASTERS 1 +#define XPAR_PPC440_VIRTEX5_SPLB0_MID_WIDTH 1 +#define XPAR_PPC440_VIRTEX5_SPLB0_ALLOW_LOCK_XFER 1 +#define XPAR_PPC440_VIRTEX5_SPLB0_READ_PIPE_ENABLE 1 +#define XPAR_PPC440_VIRTEX5_SPLB0_PROPAGATE_MIRQ 0 +#define XPAR_PPC440_VIRTEX5_SPLB0_P2P -1 +#define XPAR_PPC440_VIRTEX5_SPLB1_AWIDTH 32 +#define XPAR_PPC440_VIRTEX5_SPLB1_DWIDTH 128 +#define XPAR_PPC440_VIRTEX5_SPLB1_NATIVE_DWIDTH 128 +#define XPAR_PPC440_VIRTEX5_SPLB1_SUPPORT_BURSTS 1 +#define XPAR_PPC440_VIRTEX5_SPLB1_USE_MPLB_ADDR 0 +#define XPAR_PPC440_VIRTEX5_SPLB1_NUM_MPLB_ADDR_RNG 0 +#define XPAR_PPC440_VIRTEX5_SPLB1_RNG_MC_BASEADDR 0xFFFFFFFF +#define XPAR_PPC440_VIRTEX5_SPLB1_RNG_MC_HIGHADDR 0x00000000 +#define XPAR_PPC440_VIRTEX5_SPLB1_RNG0_MPLB_BASEADDR 0xFFFFFFFF +#define XPAR_PPC440_VIRTEX5_SPLB1_RNG0_MPLB_HIGHADDR 0x00000000 +#define XPAR_PPC440_VIRTEX5_SPLB1_RNG1_MPLB_BASEADDR 0xFFFFFFFF +#define XPAR_PPC440_VIRTEX5_SPLB1_RNG1_MPLB_HIGHADDR 0x00000000 +#define XPAR_PPC440_VIRTEX5_SPLB1_RNG2_MPLB_BASEADDR 0xFFFFFFFF +#define XPAR_PPC440_VIRTEX5_SPLB1_RNG2_MPLB_HIGHADDR 0x00000000 +#define XPAR_PPC440_VIRTEX5_SPLB1_RNG3_MPLB_BASEADDR 0xFFFFFFFF +#define XPAR_PPC440_VIRTEX5_SPLB1_RNG3_MPLB_HIGHADDR 0x00000000 +#define XPAR_PPC440_VIRTEX5_SPLB1_NUM_MASTERS 1 +#define XPAR_PPC440_VIRTEX5_SPLB1_MID_WIDTH 1 +#define XPAR_PPC440_VIRTEX5_SPLB1_ALLOW_LOCK_XFER 1 +#define XPAR_PPC440_VIRTEX5_SPLB1_READ_PIPE_ENABLE 1 +#define XPAR_PPC440_VIRTEX5_SPLB1_PROPAGATE_MIRQ 0 +#define XPAR_PPC440_VIRTEX5_SPLB1_P2P -1 +#define XPAR_PPC440_VIRTEX5_NUM_DMA 0 +#define XPAR_PPC440_VIRTEX5_DMA0_TXCHANNELCTRL 0x01010000 +#define XPAR_PPC440_VIRTEX5_DMA0_RXCHANNELCTRL 0x01010000 +#define XPAR_PPC440_VIRTEX5_DMA0_CONTROL 0b00000000 +#define XPAR_PPC440_VIRTEX5_DMA0_TXIRQTIMER 0b1111111111 +#define XPAR_PPC440_VIRTEX5_DMA0_RXIRQTIMER 0b1111111111 +#define XPAR_PPC440_VIRTEX5_DMA1_TXCHANNELCTRL 0x01010000 +#define XPAR_PPC440_VIRTEX5_DMA1_RXCHANNELCTRL 0x01010000 +#define XPAR_PPC440_VIRTEX5_DMA1_CONTROL 0b00000000 +#define XPAR_PPC440_VIRTEX5_DMA1_TXIRQTIMER 0b1111111111 +#define XPAR_PPC440_VIRTEX5_DMA1_RXIRQTIMER 0b1111111111 +#define XPAR_PPC440_VIRTEX5_DMA2_TXCHANNELCTRL 0x01010000 +#define XPAR_PPC440_VIRTEX5_DMA2_RXCHANNELCTRL 0x01010000 +#define XPAR_PPC440_VIRTEX5_DMA2_CONTROL 0b00000000 +#define XPAR_PPC440_VIRTEX5_DMA2_TXIRQTIMER 0b1111111111 +#define XPAR_PPC440_VIRTEX5_DMA2_RXIRQTIMER 0b1111111111 +#define XPAR_PPC440_VIRTEX5_DMA3_TXCHANNELCTRL 0x01010000 +#define XPAR_PPC440_VIRTEX5_DMA3_RXCHANNELCTRL 0x01010000 +#define XPAR_PPC440_VIRTEX5_DMA3_CONTROL 0b00000000 +#define XPAR_PPC440_VIRTEX5_DMA3_TXIRQTIMER 0b1111111111 +#define XPAR_PPC440_VIRTEX5_DMA3_RXIRQTIMER 0b1111111111 +#define XPAR_PPC440_VIRTEX5_DCR_AUTOLOCK_ENABLE 1 +#define XPAR_PPC440_VIRTEX5_PPCDM_ASYNCMODE 0 +#define XPAR_PPC440_VIRTEX5_PPCDS_ASYNCMODE 0 +#define XPAR_PPC440_VIRTEX5_GENERATE_PLB_TIMESPECS 1 +#define XPAR_PPC440_VIRTEX5_HW_VER "1.01.a" /******************************************************************/ - diff --git a/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h b/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h index e9ad5e392..0bc78098b 100644 --- a/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h +++ b/slsDetectorServers/gotthard2DetectorServer/RegisterDefs.h @@ -1,251 +1,256 @@ #pragma once - -#define REG_OFFSET (4) - +#define REG_OFFSET (4) /* Base addresses 0x1804 0000 ---------------------------------------------*/ /* Reconfiguration core for readout pll */ -#define BASE_READOUT_PLL (0x0000) // 0x1804_0000 - 0x1804_07FF +#define BASE_READOUT_PLL (0x0000) // 0x1804_0000 - 0x1804_07FF /* Reconfiguration core for system pll */ -#define BASE_SYSTEM_PLL (0x0800) // 0x1804_0800 - 0x1804_0FFF +#define BASE_SYSTEM_PLL (0x0800) // 0x1804_0800 - 0x1804_0FFF /* Clock Generation */ -#define BASE_CLK_GENERATION (0x1000) // 0x1804_1000 - 0x1804_XXXX //TODO +#define BASE_CLK_GENERATION (0x1000) // 0x1804_1000 - 0x1804_XXXX //TODO /* Base addresses 0x1806 0000 ---------------------------------------------*/ /* General purpose control and status registers */ -#define BASE_CONTROL (0x0000) // 0x1806_0000 - 0x1806_00FF +#define BASE_CONTROL (0x0000) // 0x1806_0000 - 0x1806_00FF // https://git.psi.ch/sls_detectors_firmware/gotthard_II_mcb/blob/master/code/hdl/ctrl/ctrl.vhd /* ASIC Control */ -#define BASE_ASIC (0x0100) // 0x1806_0100 - 0x1806_011F +#define BASE_ASIC (0x0100) // 0x1806_0100 - 0x1806_011F // https://git.psi.ch/sls_detectors_firmware/gotthard_II_mcb/blob/master/code/hdl/asic/asic_ctrl.vhd /* ASIC Digital Interface. Data recovery core */ -#define BASE_ADIF (0x0120) // 0x1806_0120 - 0x1806_012F +#define BASE_ADIF (0x0120) // 0x1806_0120 - 0x1806_012F // https://git.psi.ch/sls_detectors_firmware/gotthard_II_mcb/blob/master/code/hdl/adif/adif_ctrl.vhd /* Formatting of data core */ -#define BASE_FMT (0x0130) // 0x1806_0130 - 0x1806_013F +#define BASE_FMT (0x0130) // 0x1806_0130 - 0x1806_013F /* Packetizer */ -#define BASE_PKT (0x0140) // 0x1806_0140 - 0x1806_014F +#define BASE_PKT (0x0140) // 0x1806_0140 - 0x1806_014F // https://git.psi.ch/sls_detectors_firmware/gotthard_II_mcb/blob/master/code/hdl/pkt/pkt_ctrl.vhd /* Flow control and status registers */ -#define BASE_FLOW_CONTROL (0x00200) // 0x1806_0200 - 0x1806_02FF +#define BASE_FLOW_CONTROL (0x00200) // 0x1806_0200 - 0x1806_02FF // https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/f37608230b4721661f29aacc20124555705ee705/flow/flow_ctrl.vhd /* UDP datagram generator */ -#define BASE_UDP_RAM (0x01000) // 0x1806_1000 - 0x1806_1FFF - - - -/* Clock Generation registers ------------------------------------------------------*/ -#define PLL_RESET_REG (0x00 * REG_OFFSET + BASE_CLK_GENERATION) - -#define PLL_RESET_READOUT_OFST (0) -#define PLL_RESET_READOUT_MSK (0x00000001 << PLL_RESET_READOUT_OFST) -#define PLL_RESET_SYSTEM_OFST (1) -#define PLL_RESET_SYSTEM_MSK (0x00000001 << PLL_RESET_SYSTEM_OFST) +#define BASE_UDP_RAM (0x01000) // 0x1806_1000 - 0x1806_1FFF +/* Clock Generation registers + * ------------------------------------------------------*/ +#define PLL_RESET_REG (0x00 * REG_OFFSET + BASE_CLK_GENERATION) +#define PLL_RESET_READOUT_OFST (0) +#define PLL_RESET_READOUT_MSK (0x00000001 << PLL_RESET_READOUT_OFST) +#define PLL_RESET_SYSTEM_OFST (1) +#define PLL_RESET_SYSTEM_MSK (0x00000001 << PLL_RESET_SYSTEM_OFST) /* Control registers --------------------------------------------------*/ /* Module Control Board Serial Number register */ -#define MCB_SERIAL_NO_REG (0x00 * REG_OFFSET + BASE_CONTROL) +#define MCB_SERIAL_NO_REG (0x00 * REG_OFFSET + BASE_CONTROL) -#define MCB_SERIAL_NO_VRSN_OFST (16) -#define MCB_SERIAL_NO_VRSN_MSK (0x0000001F << MCB_SERIAL_NO_VRSN_OFST) +#define MCB_SERIAL_NO_VRSN_OFST (16) +#define MCB_SERIAL_NO_VRSN_MSK (0x0000001F << MCB_SERIAL_NO_VRSN_OFST) /* FPGA Version register */ -#define FPGA_VERSION_REG (0x01 * REG_OFFSET + BASE_CONTROL) +#define FPGA_VERSION_REG (0x01 * REG_OFFSET + BASE_CONTROL) -#define FPGA_COMPILATION_DATE_OFST (0) -#define FPGA_COMPILATION_DATE_MSK (0x00FFFFFF << FPGA_COMPILATION_DATE_OFST) -#define DETECTOR_TYPE_OFST (24) -#define DETECTOR_TYPE_MSK (0x000000FF << DETECTOR_TYPE_OFST) +#define FPGA_COMPILATION_DATE_OFST (0) +#define FPGA_COMPILATION_DATE_MSK (0x00FFFFFF << FPGA_COMPILATION_DATE_OFST) +#define DETECTOR_TYPE_OFST (24) +#define DETECTOR_TYPE_MSK (0x000000FF << DETECTOR_TYPE_OFST) /* API Version register */ -#define API_VERSION_REG (0x02 * REG_OFFSET + BASE_CONTROL) +#define API_VERSION_REG (0x02 * REG_OFFSET + BASE_CONTROL) -#define API_VERSION_OFST (0) -#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST) -#define API_VERSION_DETECTOR_TYPE_OFST (24) //Not used in software -#define API_VERSION_DETECTOR_TYPE_MSK (0x000000FF << API_VERSION_DETECTOR_TYPE_OFST) //Not used in software +#define API_VERSION_OFST (0) +#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST) +#define API_VERSION_DETECTOR_TYPE_OFST (24) // Not used in software +#define API_VERSION_DETECTOR_TYPE_MSK \ + (0x000000FF << API_VERSION_DETECTOR_TYPE_OFST) // Not used in software /* Fix pattern register */ -#define FIX_PATT_REG (0x03 * REG_OFFSET + BASE_CONTROL) -#define FIX_PATT_VAL (0xACDC2019) +#define FIX_PATT_REG (0x03 * REG_OFFSET + BASE_CONTROL) +#define FIX_PATT_VAL (0xACDC2019) /* Status register */ -#define STATUS_REG (0x04 * REG_OFFSET + BASE_CONTROL) +#define STATUS_REG (0x04 * REG_OFFSET + BASE_CONTROL) /* Look at me read only register */ -#define LOOK_AT_ME_REG (0x05 * REG_OFFSET + BASE_CONTROL) +#define LOOK_AT_ME_REG (0x05 * REG_OFFSET + BASE_CONTROL) /* System status register */ -#define SYSTEM_STATUS_REG (0x06 * REG_OFFSET + BASE_CONTROL) +#define SYSTEM_STATUS_REG (0x06 * REG_OFFSET + BASE_CONTROL) /* Config RW regiseter */ -#define CONFIG_REG (0x20 * REG_OFFSET + BASE_CONTROL) +#define CONFIG_REG (0x20 * REG_OFFSET + BASE_CONTROL) -/* Control RW register */ -#define CONTROL_REG (0x21 * REG_OFFSET + BASE_CONTROL) +/* Control RW register */ +#define CONTROL_REG (0x21 * REG_OFFSET + BASE_CONTROL) -#define CONTROL_STRT_ACQSTN_OFST (0) -#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST) -#define CONTROL_STP_ACQSTN_OFST (1) -#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) -#define CONTROL_CRE_RST_OFST (10) -#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) -#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? -#define CONTROL_PRPHRL_RST_MSK (0x00000001 << CONTROL_PRPHRL_RST_OFST) -#define CONTROL_CLR_ACQSTN_FIFO_OFST (15) -#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST) -#define CONTROL_TIMING_SOURCE_EXT_OFST (17) -#define CONTROL_TIMING_SOURCE_EXT_MSK (0x00000001 << CONTROL_TIMING_SOURCE_EXT_OFST) -#define CONTROL_PWR_CHIP_OFST (31) -#define CONTROL_PWR_CHIP_MSK (0x00000001 << CONTROL_PWR_CHIP_OFST) +#define CONTROL_STRT_ACQSTN_OFST (0) +#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST) +#define CONTROL_STP_ACQSTN_OFST (1) +#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) +#define CONTROL_CRE_RST_OFST (10) +#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) +#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? +#define CONTROL_PRPHRL_RST_MSK (0x00000001 << CONTROL_PRPHRL_RST_OFST) +#define CONTROL_CLR_ACQSTN_FIFO_OFST (15) +#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST) +#define CONTROL_TIMING_SOURCE_EXT_OFST (17) +#define CONTROL_TIMING_SOURCE_EXT_MSK \ + (0x00000001 << CONTROL_TIMING_SOURCE_EXT_OFST) +#define CONTROL_PWR_CHIP_OFST (31) +#define CONTROL_PWR_CHIP_MSK (0x00000001 << CONTROL_PWR_CHIP_OFST) /** DTA Offset Register */ -#define DTA_OFFSET_REG (0x24 * REG_OFFSET + BASE_CONTROL) - - +#define DTA_OFFSET_REG (0x24 * REG_OFFSET + BASE_CONTROL) /* ASIC registers --------------------------------------------------*/ /* ASIC Config register */ -#define ASIC_CONFIG_REG (0x00 * REG_OFFSET + BASE_ASIC) +#define ASIC_CONFIG_REG (0x00 * REG_OFFSET + BASE_ASIC) -#define ASIC_CONFIG_RUN_MODE_OFST (0) -#define ASIC_CONFIG_RUN_MODE_MSK (0x00000003 << ASIC_CONFIG_RUN_MODE_OFST) -#define ASIC_CONFIG_RUN_MODE_INT_BURST_VAL ((0x1 << ASIC_CONFIG_RUN_MODE_OFST) & ASIC_CONFIG_RUN_MODE_MSK) -#define ASIC_CONFIG_RUN_MODE_CONT_VAL ((0x2 << ASIC_CONFIG_RUN_MODE_OFST) & ASIC_CONFIG_RUN_MODE_MSK) -#define ASIC_CONFIG_RUN_MODE_EXT_BURST_VAL ((0x3 << ASIC_CONFIG_RUN_MODE_OFST) & ASIC_CONFIG_RUN_MODE_MSK) -#define ASIC_CONFIG_GAIN_OFST (4) -#define ASIC_CONFIG_GAIN_MSK (0x00000003 << ASIC_CONFIG_GAIN_OFST) -#define ASIC_CONFIG_DYNAMIC_GAIN_VAL ((0x0 << ASIC_CONFIG_GAIN_OFST) & ASIC_CONFIG_GAIN_MSK) -#define ASIC_CONFIG_FIX_GAIN_1_VAL ((0x1 << ASIC_CONFIG_GAIN_OFST) & ASIC_CONFIG_GAIN_MSK) -#define ASIC_CONFIG_FIX_GAIN_2_VAL ((0x2 << ASIC_CONFIG_GAIN_OFST) & ASIC_CONFIG_GAIN_MSK) -#define ASIC_CONFIG_RESERVED_VAL ((0x3 << ASIC_CONFIG_GAIN_OFST) & ASIC_CONFIG_GAIN_MSK) +#define ASIC_CONFIG_RUN_MODE_OFST (0) +#define ASIC_CONFIG_RUN_MODE_MSK (0x00000003 << ASIC_CONFIG_RUN_MODE_OFST) +#define ASIC_CONFIG_RUN_MODE_INT_BURST_VAL \ + ((0x1 << ASIC_CONFIG_RUN_MODE_OFST) & ASIC_CONFIG_RUN_MODE_MSK) +#define ASIC_CONFIG_RUN_MODE_CONT_VAL \ + ((0x2 << ASIC_CONFIG_RUN_MODE_OFST) & ASIC_CONFIG_RUN_MODE_MSK) +#define ASIC_CONFIG_RUN_MODE_EXT_BURST_VAL \ + ((0x3 << ASIC_CONFIG_RUN_MODE_OFST) & ASIC_CONFIG_RUN_MODE_MSK) +#define ASIC_CONFIG_GAIN_OFST (4) +#define ASIC_CONFIG_GAIN_MSK (0x00000003 << ASIC_CONFIG_GAIN_OFST) +#define ASIC_CONFIG_DYNAMIC_GAIN_VAL \ + ((0x0 << ASIC_CONFIG_GAIN_OFST) & ASIC_CONFIG_GAIN_MSK) +#define ASIC_CONFIG_FIX_GAIN_1_VAL \ + ((0x1 << ASIC_CONFIG_GAIN_OFST) & ASIC_CONFIG_GAIN_MSK) +#define ASIC_CONFIG_FIX_GAIN_2_VAL \ + ((0x2 << ASIC_CONFIG_GAIN_OFST) & ASIC_CONFIG_GAIN_MSK) +#define ASIC_CONFIG_RESERVED_VAL \ + ((0x3 << ASIC_CONFIG_GAIN_OFST) & ASIC_CONFIG_GAIN_MSK) #define ASIC_CONFIG_CURRENT_SRC_EN_OFST (7) -#define ASIC_CONFIG_CURRENT_SRC_EN_MSK (0x00000001 << ASIC_CONFIG_CURRENT_SRC_EN_OFST) -#define ASIC_CONFIG_RST_DAC_OFST (15) -#define ASIC_CONFIG_RST_DAC_MSK (0x00000001 << ASIC_CONFIG_RST_DAC_OFST) -#define ASIC_CONFIG_DONE_OFST (31) -#define ASIC_CONFIG_DONE_MSK (0x00000001 << ASIC_CONFIG_DONE_OFST) +#define ASIC_CONFIG_CURRENT_SRC_EN_MSK \ + (0x00000001 << ASIC_CONFIG_CURRENT_SRC_EN_OFST) +#define ASIC_CONFIG_RST_DAC_OFST (15) +#define ASIC_CONFIG_RST_DAC_MSK (0x00000001 << ASIC_CONFIG_RST_DAC_OFST) +#define ASIC_CONFIG_DONE_OFST (31) +#define ASIC_CONFIG_DONE_MSK (0x00000001 << ASIC_CONFIG_DONE_OFST) /* ASIC Internal Frames Register */ -#define ASIC_INT_FRAMES_REG (0x01 * REG_OFFSET + BASE_ASIC) +#define ASIC_INT_FRAMES_REG (0x01 * REG_OFFSET + BASE_ASIC) -#define ASIC_INT_FRAMES_OFST (0) -#define ASIC_INT_FRAMES_MSK (0x00000FFF << ASIC_INT_FRAMES_OFST) +#define ASIC_INT_FRAMES_OFST (0) +#define ASIC_INT_FRAMES_MSK (0x00000FFF << ASIC_INT_FRAMES_OFST) /* ASIC Period 64bit Register */ -#define ASIC_INT_PERIOD_LSB_REG (0x02 * REG_OFFSET + BASE_ASIC) -#define ASIC_INT_PERIOD_MSB_REG (0x03 * REG_OFFSET + BASE_ASIC) +#define ASIC_INT_PERIOD_LSB_REG (0x02 * REG_OFFSET + BASE_ASIC) +#define ASIC_INT_PERIOD_MSB_REG (0x03 * REG_OFFSET + BASE_ASIC) /* ASIC Exptime 64bit Register */ -#define ASIC_INT_EXPTIME_LSB_REG (0x04 * REG_OFFSET + BASE_ASIC) -#define ASIC_INT_EXPTIME_MSB_REG (0x05 * REG_OFFSET + BASE_ASIC) - - +#define ASIC_INT_EXPTIME_LSB_REG (0x04 * REG_OFFSET + BASE_ASIC) +#define ASIC_INT_EXPTIME_MSB_REG (0x05 * REG_OFFSET + BASE_ASIC) /* Packetizer -------------------------------------------------------------*/ /* Packetizer Config Register */ -#define PKT_CONFIG_REG (0x00 * REG_OFFSET + BASE_PKT) +#define PKT_CONFIG_REG (0x00 * REG_OFFSET + BASE_PKT) -#define PKT_CONFIG_NRXR_MAX_OFST (0) -#define PKT_CONFIG_NRXR_MAX_MSK (0x0000003F << PKT_CONFIG_NRXR_MAX_OFST) -#define PKT_CONFIG_RXR_START_ID_OFST (8) -#define PKT_CONFIG_RXR_START_ID_MSK (0x0000003F << PKT_CONFIG_RXR_START_ID_OFST) +#define PKT_CONFIG_NRXR_MAX_OFST (0) +#define PKT_CONFIG_NRXR_MAX_MSK (0x0000003F << PKT_CONFIG_NRXR_MAX_OFST) +#define PKT_CONFIG_RXR_START_ID_OFST (8) +#define PKT_CONFIG_RXR_START_ID_MSK (0x0000003F << PKT_CONFIG_RXR_START_ID_OFST) /* Module Coordinates Register */ -#define COORD_0_REG (0x02 * REG_OFFSET + BASE_PKT) -#define COORD_ROW_OFST (0) -#define COORD_ROW_MSK (0x0000FFFF << COORD_ROW_OFST) -#define COORD_COL_OFST (16) -#define COORD_COL_MSK (0x0000FFFF << COORD_COL_OFST) +#define COORD_0_REG (0x02 * REG_OFFSET + BASE_PKT) +#define COORD_ROW_OFST (0) +#define COORD_ROW_MSK (0x0000FFFF << COORD_ROW_OFST) +#define COORD_COL_OFST (16) +#define COORD_COL_MSK (0x0000FFFF << COORD_COL_OFST) /* Module ID Register */ -#define COORD_1_REG (0x03 * REG_OFFSET + BASE_PKT) -#define COORD_RESERVED_OFST (0) -#define COORD_RESERVED_MSK (0x0000FFFF << COORD_RESERVED_OFST) -#define COORD_ID_OFST (16) // Not connected in firmware TODO -#define COORD_ID_MSK (0x0000FFFF << COORD_ID_OFST) // Not connected in firmware TODO - +#define COORD_1_REG (0x03 * REG_OFFSET + BASE_PKT) +#define COORD_RESERVED_OFST (0) +#define COORD_RESERVED_MSK (0x0000FFFF << COORD_RESERVED_OFST) +#define COORD_ID_OFST (16) // Not connected in firmware TODO +#define COORD_ID_MSK \ + (0x0000FFFF << COORD_ID_OFST) // Not connected in firmware TODO /* Flow control registers --------------------------------------------------*/ /* Flow status Register*/ -#define FLOW_STATUS_REG (0x00 * REG_OFFSET + BASE_FLOW_CONTROL) +#define FLOW_STATUS_REG (0x00 * REG_OFFSET + BASE_FLOW_CONTROL) #define FLOW_STATUS_RUN_BUSY_OFST (0) -#define FLOW_STATUS_RUN_BUSY_MSK (0x00000001 << FLOW_STATUS_RUN_BUSY_OFST) +#define FLOW_STATUS_RUN_BUSY_MSK (0x00000001 << FLOW_STATUS_RUN_BUSY_OFST) #define FLOW_STATUS_WAIT_FOR_TRGGR_OFST (3) -#define FLOW_STATUS_WAIT_FOR_TRGGR_MSK (0x00000001 << FLOW_STATUS_WAIT_FOR_TRGGR_OFST) +#define FLOW_STATUS_WAIT_FOR_TRGGR_MSK \ + (0x00000001 << FLOW_STATUS_WAIT_FOR_TRGGR_OFST) #define FLOW_STATUS_DLY_BFRE_TRGGR_OFST (4) -#define FLOW_STATUS_DLY_BFRE_TRGGR_MSK (0x00000001 << FLOW_STATUS_DLY_BFRE_TRGGR_OFST) +#define FLOW_STATUS_DLY_BFRE_TRGGR_MSK \ + (0x00000001 << FLOW_STATUS_DLY_BFRE_TRGGR_OFST) #define FLOW_STATUS_FIFO_FULL_OFST (5) -#define FLOW_STATUS_FIFO_FULL_MSK (0x00000001 << FLOW_STATUS_FIFO_FULL_OFST) +#define FLOW_STATUS_FIFO_FULL_MSK (0x00000001 << FLOW_STATUS_FIFO_FULL_OFST) #define FLOW_STATUS_DLY_AFTR_TRGGR_OFST (15) -#define FLOW_STATUS_DLY_AFTR_TRGGR_MSK (0x00000001 << FLOW_STATUS_DLY_AFTR_TRGGR_OFST) -#define FLOW_STATUS_CSM_BUSY_OFST (17) -#define FLOW_STATUS_CSM_BUSY_MSK (0x00000001 << FLOW_STATUS_CSM_BUSY_OFST) +#define FLOW_STATUS_DLY_AFTR_TRGGR_MSK \ + (0x00000001 << FLOW_STATUS_DLY_AFTR_TRGGR_OFST) +#define FLOW_STATUS_CSM_BUSY_OFST (17) +#define FLOW_STATUS_CSM_BUSY_MSK (0x00000001 << FLOW_STATUS_CSM_BUSY_OFST) /* Delay left 64bit Register */ -#define GET_DELAY_LSB_REG (0x02 * REG_OFFSET + BASE_FLOW_CONTROL) -#define GET_DELAY_MSB_REG (0x03 * REG_OFFSET + BASE_FLOW_CONTROL) +#define GET_DELAY_LSB_REG (0x02 * REG_OFFSET + BASE_FLOW_CONTROL) +#define GET_DELAY_MSB_REG (0x03 * REG_OFFSET + BASE_FLOW_CONTROL) /* Triggers left 64bit Register */ -#define GET_CYCLES_LSB_REG (0x04 * REG_OFFSET + BASE_FLOW_CONTROL) -#define GET_CYCLES_MSB_REG (0x05 * REG_OFFSET + BASE_FLOW_CONTROL) +#define GET_CYCLES_LSB_REG (0x04 * REG_OFFSET + BASE_FLOW_CONTROL) +#define GET_CYCLES_MSB_REG (0x05 * REG_OFFSET + BASE_FLOW_CONTROL) /* Frames left 64bit Register */ -#define GET_FRAMES_LSB_REG (0x06 * REG_OFFSET + BASE_FLOW_CONTROL) -#define GET_FRAMES_MSB_REG (0x07 * REG_OFFSET + BASE_FLOW_CONTROL) +#define GET_FRAMES_LSB_REG (0x06 * REG_OFFSET + BASE_FLOW_CONTROL) +#define GET_FRAMES_MSB_REG (0x07 * REG_OFFSET + BASE_FLOW_CONTROL) /* Period left 64bit Register */ -#define GET_PERIOD_LSB_REG (0x08 * REG_OFFSET + BASE_FLOW_CONTROL) -#define GET_PERIOD_MSB_REG (0x09 * REG_OFFSET + BASE_FLOW_CONTROL) +#define GET_PERIOD_LSB_REG (0x08 * REG_OFFSET + BASE_FLOW_CONTROL) +#define GET_PERIOD_MSB_REG (0x09 * REG_OFFSET + BASE_FLOW_CONTROL) /* Time from Start 64 bit register */ -#define TIME_FROM_START_LSB_REG (0x0A * REG_OFFSET + BASE_FLOW_CONTROL) -#define TIME_FROM_START_MSB_REG (0x0B * REG_OFFSET + BASE_FLOW_CONTROL) +#define TIME_FROM_START_LSB_REG (0x0A * REG_OFFSET + BASE_FLOW_CONTROL) +#define TIME_FROM_START_MSB_REG (0x0B * REG_OFFSET + BASE_FLOW_CONTROL) -/* Get Frames from Start 64 bit register (frames from last reset using CONTROL_CRST) */ -#define FRAMES_FROM_START_LSB_REG (0x0C * REG_OFFSET + BASE_FLOW_CONTROL) -#define FRAMES_FROM_START_MSB_REG (0x0D * REG_OFFSET + BASE_FLOW_CONTROL) +/* Get Frames from Start 64 bit register (frames from last reset using + * CONTROL_CRST) */ +#define FRAMES_FROM_START_LSB_REG (0x0C * REG_OFFSET + BASE_FLOW_CONTROL) +#define FRAMES_FROM_START_MSB_REG (0x0D * REG_OFFSET + BASE_FLOW_CONTROL) /* Measurement Time 64 bit register (timestamp at a frame start until reset)*/ -#define START_FRAME_TIME_LSB_REG (0x0E * REG_OFFSET + BASE_FLOW_CONTROL) -#define START_FRAME_TIME_MSB_REG (0x0F * REG_OFFSET + BASE_FLOW_CONTROL) +#define START_FRAME_TIME_LSB_REG (0x0E * REG_OFFSET + BASE_FLOW_CONTROL) +#define START_FRAME_TIME_MSB_REG (0x0F * REG_OFFSET + BASE_FLOW_CONTROL) /* Delay 64bit Write-register */ -#define SET_DELAY_LSB_REG (0x22 * REG_OFFSET + BASE_FLOW_CONTROL) -#define SET_DELAY_MSB_REG (0x23 * REG_OFFSET + BASE_FLOW_CONTROL) +#define SET_DELAY_LSB_REG (0x22 * REG_OFFSET + BASE_FLOW_CONTROL) +#define SET_DELAY_MSB_REG (0x23 * REG_OFFSET + BASE_FLOW_CONTROL) /* Cylces (also #bursts) 64bit Write-register */ -#define SET_CYCLES_LSB_REG (0x24 * REG_OFFSET + BASE_FLOW_CONTROL) -#define SET_CYCLES_MSB_REG (0x25 * REG_OFFSET + BASE_FLOW_CONTROL) +#define SET_CYCLES_LSB_REG (0x24 * REG_OFFSET + BASE_FLOW_CONTROL) +#define SET_CYCLES_MSB_REG (0x25 * REG_OFFSET + BASE_FLOW_CONTROL) /* Frames 64bit Write-register */ -#define SET_FRAMES_LSB_REG (0x26 * REG_OFFSET + BASE_FLOW_CONTROL) -#define SET_FRAMES_MSB_REG (0x27 * REG_OFFSET + BASE_FLOW_CONTROL) +#define SET_FRAMES_LSB_REG (0x26 * REG_OFFSET + BASE_FLOW_CONTROL) +#define SET_FRAMES_MSB_REG (0x27 * REG_OFFSET + BASE_FLOW_CONTROL) /* Period (also burst period) 64bit Write-register */ -#define SET_PERIOD_LSB_REG (0x28 * REG_OFFSET + BASE_FLOW_CONTROL) -#define SET_PERIOD_MSB_REG (0x29 * REG_OFFSET + BASE_FLOW_CONTROL) +#define SET_PERIOD_LSB_REG (0x28 * REG_OFFSET + BASE_FLOW_CONTROL) +#define SET_PERIOD_MSB_REG (0x29 * REG_OFFSET + BASE_FLOW_CONTROL) /* External Signal register */ -#define EXT_SIGNAL_REG (0x30 * REG_OFFSET + BASE_FLOW_CONTROL) +#define EXT_SIGNAL_REG (0x30 * REG_OFFSET + BASE_FLOW_CONTROL) -#define EXT_SIGNAL_OFST (0) -#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) +#define EXT_SIGNAL_OFST (0) +#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) /* Trigger Delay 64 bit register */ -#define SET_TRIGGER_DELAY_LSB_REG (0x32 * REG_OFFSET + BASE_FLOW_CONTROL) -#define SET_TRIGGER_DELAY_MSB_REG (0x33 * REG_OFFSET + BASE_FLOW_CONTROL) +#define SET_TRIGGER_DELAY_LSB_REG (0x32 * REG_OFFSET + BASE_FLOW_CONTROL) +#define SET_TRIGGER_DELAY_MSB_REG (0x33 * REG_OFFSET + BASE_FLOW_CONTROL) diff --git a/slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h index 1bdd4fe5b..c7e07ae57 100644 --- a/slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/gotthard2DetectorServer/slsDetectorServer_defs.h @@ -1,143 +1,159 @@ #pragma once #include "sls_detector_defs.h" -#define REQRD_FRMWRE_VRSN (0x190000) +#define REQRD_FRMWRE_VRSN (0x190000) -#define CTRL_SRVR_INIT_TIME_US (300 * 1000) +#define CTRL_SRVR_INIT_TIME_US (300 * 1000) /* Hardware Definitions */ -#define NCHAN (128) -#define NCHIP (10) -#define NDAC (16) -#define NADC (32) -#define ONCHIP_NDAC (7) -#define DYNAMIC_RANGE (16) +#define NCHAN (128) +#define NCHIP (10) +#define NDAC (16) +#define NADC (32) +#define ONCHIP_NDAC (7) +#define DYNAMIC_RANGE (16) #define HV_SOFT_MAX_VOLTAGE (200) #define HV_HARD_MAX_VOLTAGE (530) #define HV_DRIVER_FILE_NAME ("/etc/devlinks/hvdac") #define DAC_DRIVER_FILE_NAME ("/etc/devlinks/dac") #define ONCHIP_DAC_DRIVER_FILE_NAME ("/etc/devlinks/chipdac") -#define TYPE_FILE_NAME ("/etc/devlinks/type") +#define TYPE_FILE_NAME ("/etc/devlinks/type") #define CONFIG_FILE ("config.txt") #define DAC_MAX_MV (2048) -#define ONCHIP_DAC_MAX_VAL (0x3FF) -#define ADU_MAX_VAL (0xFFF) -#define ADU_MAX_BITS (12) -#define MAX_FRAMES_IN_BURST_MODE (2720) -#define TYPE_GOTTHARD2_MODULE_VAL (512) -#define TYPE_TOLERANCE (10) -#define TYPE_NO_MODULE_STARTING_VAL (800) -#define INITIAL_STARTUP_WAIT (1 * 1000 * 1000) +#define ONCHIP_DAC_MAX_VAL (0x3FF) +#define ADU_MAX_VAL (0xFFF) +#define ADU_MAX_BITS (12) +#define MAX_FRAMES_IN_BURST_MODE (2720) +#define TYPE_GOTTHARD2_MODULE_VAL (512) +#define TYPE_TOLERANCE (10) +#define TYPE_NO_MODULE_STARTING_VAL (800) +#define INITIAL_STARTUP_WAIT (1 * 1000 * 1000) /** Default Parameters */ -#define DEFAULT_BURST_MODE (BURST_INTERNAL) -#define DEFAULT_NUM_FRAMES (1) -#define DEFAULT_NUM_CYCLES (1) -#define DEFAULT_NUM_BURSTS (1) -#define DEFAULT_EXPTIME (0) // 0 ms (220ns in firmware) -#define DEFAULT_PERIOD (0) // 0 ms +#define DEFAULT_BURST_MODE (BURST_INTERNAL) +#define DEFAULT_NUM_FRAMES (1) +#define DEFAULT_NUM_CYCLES (1) +#define DEFAULT_NUM_BURSTS (1) +#define DEFAULT_EXPTIME (0) // 0 ms (220ns in firmware) +#define DEFAULT_PERIOD (0) // 0 ms #define DEFAULT_DELAY_AFTER_TRIGGER (0) -#define DEFAULT_BURST_PERIOD (0) -#define DEFAULT_HIGH_VOLTAGE (0) -#define DEFAULT_TIMING_MODE (AUTO_TIMING) -#define DEFAULT_SETTINGS (DYNAMICGAIN) -#define DEFAULT_CURRENT_SOURCE (0) -#define DEFAULT_TIMING_SOURCE (TIMING_INTERNAL) +#define DEFAULT_BURST_PERIOD (0) +#define DEFAULT_HIGH_VOLTAGE (0) +#define DEFAULT_TIMING_MODE (AUTO_TIMING) +#define DEFAULT_SETTINGS (DYNAMICGAIN) +#define DEFAULT_CURRENT_SOURCE (0) +#define DEFAULT_TIMING_SOURCE (TIMING_INTERNAL) -#define DEFAULT_READOUT_C0 (8)//(108333336) // rdo_clk, 108 MHz -#define DEFAULT_READOUT_C1 (8)//(108333336) // rdo_x2_clk, 108 MHz -#define DEFAULT_SYSTEM_C0 (5)//(144444448) // run_clk, 144 MHz -#define DEFAULT_SYSTEM_C1 (10)//(72222224) // chip_clk, 72 MHz -#define DEFAULT_SYSTEM_C2 (5)//(144444448) // sync_clk, 144 MHz -#define DEFAULT_SYSTEM_C3 (5)//(144444448) // str_clk, 144 MHz +#define DEFAULT_READOUT_C0 (8) //(108333336) // rdo_clk, 108 MHz +#define DEFAULT_READOUT_C1 (8) //(108333336) // rdo_x2_clk, 108 MHz +#define DEFAULT_SYSTEM_C0 (5) //(144444448) // run_clk, 144 MHz +#define DEFAULT_SYSTEM_C1 (10) //(72222224) // chip_clk, 72 MHz +#define DEFAULT_SYSTEM_C2 (5) //(144444448) // sync_clk, 144 MHz +#define DEFAULT_SYSTEM_C3 (5) //(144444448) // str_clk, 144 MHz /* Firmware Definitions */ -#define IP_HEADER_SIZE (20) -#define FIXED_PLL_FREQUENCY (20000000) // 20MHz -#define INT_SYSTEM_C0_FREQUENCY (144000000) //144 MHz -#define READOUT_PLL_VCO_FREQ_HZ (866666688) // 866 MHz -#define SYSTEM_PLL_VCO_FREQ_HZ (722222224) // 722 MHz +#define IP_HEADER_SIZE (20) +#define FIXED_PLL_FREQUENCY (20000000) // 20MHz +#define INT_SYSTEM_C0_FREQUENCY (144000000) // 144 MHz +#define READOUT_PLL_VCO_FREQ_HZ (866666688) // 866 MHz +#define SYSTEM_PLL_VCO_FREQ_HZ (722222224) // 722 MHz /** Other Definitions */ -#define BIT16_MASK (0xFFFF) +#define BIT16_MASK (0xFFFF) /* Enums */ -enum DACINDEX {G2_VREF_H_ADC, /* 0 */ \ - G2_DAC_UNUSED, /* 1 */ \ - G2_VB_COMP_FE, /* 2 */ \ - G2_VB_COMP_ADC, /* 3 */ \ - G2_VCOM_CDS, /* 4 */ \ - G2_VREF_RSTORE,/* 5 */ \ - G2_VB_OPA_1ST, /* 6 */ \ - G2_VREF_COMP_FE,/* 7 */ \ - G2_VCOM_ADC1, /* 8 */ \ - G2_VREF_PRECH, /* 9 */ \ - G2_VREF_L_ADC, /* 10 */ \ - G2_VREF_CDS, /* 11 */ \ - G2_VB_CS, /* 12 */ \ - G2_VB_OPA_FD, /* 13 */ \ - G2_DAC_UNUSED2, /* 14 */ \ - G2_VCOM_ADC2 /* 15*/ \ - }; -#define DAC_NAMES "vref_h_adc", "dac_unused", "vb_comp_fe", "vb_comp_adc", "vcom_cds", "vref_rstore", "vb_opa_1st", "vref_comp_fe", "vcom_adc1", "vref_prech", "vref_l_adc", "vref_cds", "vb_cs", "vb_opa_fd", "dac_unused2", "vcom_adc2" - -enum ONCHIP_DACINDEX {G2_VCHIP_COMP_FE, /* 0 */ \ - G2_VCHIP_OPA_1ST, /* 1 */ \ - G2_VCHIP_OPA_FD, /* 2 */ \ - G2_VCHIP_COMP_ADC, /* 3 */ \ - G2_VCHIP_UNUSED, /* 4 */ \ - G2_VCHIP_REF_COMP_FE, /* 5 */ \ - G2_VCHIP_CS /* 6 */ \ - }; -#define ONCHIP_DAC_NAMES "vchip_comp_fe", "vchip_opa_1st", "vchip_opa_fd", "vchip_comp_adc", "vchip_unused", "vchip_ref_comp_fe", "vchip_cs" +enum DACINDEX { + G2_VREF_H_ADC, /* 0 */ + G2_DAC_UNUSED, /* 1 */ + G2_VB_COMP_FE, /* 2 */ + G2_VB_COMP_ADC, /* 3 */ + G2_VCOM_CDS, /* 4 */ + G2_VREF_RSTORE, /* 5 */ + G2_VB_OPA_1ST, /* 6 */ + G2_VREF_COMP_FE, /* 7 */ + G2_VCOM_ADC1, /* 8 */ + G2_VREF_PRECH, /* 9 */ + G2_VREF_L_ADC, /* 10 */ + G2_VREF_CDS, /* 11 */ + G2_VB_CS, /* 12 */ + G2_VB_OPA_FD, /* 13 */ + G2_DAC_UNUSED2, /* 14 */ + G2_VCOM_ADC2 /* 15*/ +}; +#define DAC_NAMES \ + "vref_h_adc", "dac_unused", "vb_comp_fe", "vb_comp_adc", "vcom_cds", \ + "vref_rstore", "vb_opa_1st", "vref_comp_fe", "vcom_adc1", \ + "vref_prech", "vref_l_adc", "vref_cds", "vb_cs", "vb_opa_fd", \ + "dac_unused2", "vcom_adc2" +enum ONCHIP_DACINDEX { + G2_VCHIP_COMP_FE, /* 0 */ + G2_VCHIP_OPA_1ST, /* 1 */ + G2_VCHIP_OPA_FD, /* 2 */ + G2_VCHIP_COMP_ADC, /* 3 */ + G2_VCHIP_UNUSED, /* 4 */ + G2_VCHIP_REF_COMP_FE, /* 5 */ + G2_VCHIP_CS /* 6 */ +}; +#define ONCHIP_DAC_NAMES \ + "vchip_comp_fe", "vchip_opa_1st", "vchip_opa_fd", "vchip_comp_adc", \ + "vchip_unused", "vchip_ref_comp_fe", "vchip_cs" -enum CLKINDEX {READOUT_C0, READOUT_C1, SYSTEM_C0, SYSTEM_C1, SYSTEM_C2, SYSTEM_C3, NUM_CLOCKS}; -#define CLK_NAMES "READOUT_C0", "READOUT_C1", "SYSTEM_C0", "SYSTEM_C1", "SYSTEM_C2", "SYSTEM_C3" - -enum PLLINDEX {READOUT_PLL, SYSTEM_PLL}; +enum CLKINDEX { + READOUT_C0, + READOUT_C1, + SYSTEM_C0, + SYSTEM_C1, + SYSTEM_C2, + SYSTEM_C3, + NUM_CLOCKS +}; +#define CLK_NAMES \ + "READOUT_C0", "READOUT_C1", "SYSTEM_C0", "SYSTEM_C1", "SYSTEM_C2", \ + "SYSTEM_C3" +enum PLLINDEX { READOUT_PLL, SYSTEM_PLL }; /** Chip Definitions */ -#define ASIC_ADDR_MAX_BITS (4) -#define ASIC_CURRENT_INJECT_ADDR (0x9) -#define ASIC_VETO_REF_ADDR (0xA) -#define ASIC_CONF_ADC_ADDR (0xB) -#define ASIC_CONF_GLOBAL_SETT (0xC) +#define ASIC_ADDR_MAX_BITS (4) +#define ASIC_CURRENT_INJECT_ADDR (0x9) +#define ASIC_VETO_REF_ADDR (0xA) +#define ASIC_CONF_ADC_ADDR (0xB) +#define ASIC_CONF_GLOBAL_SETT (0xC) -#define ASIC_GAIN_MAX_BITS (2) -#define ASIC_GAIN_MSK (0x3) -#define ASIC_G0_VAL ((0x0 & ASIC_GAIN_MSK) << ADU_MAX_BITS) -#define ASIC_G1_VAL ((0x1 & ASIC_GAIN_MSK) << ADU_MAX_BITS) -#define ASIC_G2_VAL ((0x3 & ASIC_GAIN_MSK) << ADU_MAX_BITS) -#define ASIC_CONTINUOUS_MODE_MSK (0x7) -#define ASIC_ADC_MAX_BITS (7) -#define ASIC_ADC_MAX_VAL (0x7F) -#define ASIC_GLOBAL_SETT_MAX_BITS (6) -#define ASIC_GLOBAL_BURST_VALUE (0x0) -#define ASIC_GLOBAL_CONT_VALUE (0x1E) +#define ASIC_GAIN_MAX_BITS (2) +#define ASIC_GAIN_MSK (0x3) +#define ASIC_G0_VAL ((0x0 & ASIC_GAIN_MSK) << ADU_MAX_BITS) +#define ASIC_G1_VAL ((0x1 & ASIC_GAIN_MSK) << ADU_MAX_BITS) +#define ASIC_G2_VAL ((0x3 & ASIC_GAIN_MSK) << ADU_MAX_BITS) +#define ASIC_CONTINUOUS_MODE_MSK (0x7) +#define ASIC_ADC_MAX_BITS (7) +#define ASIC_ADC_MAX_VAL (0x7F) +#define ASIC_GLOBAL_SETT_MAX_BITS (6) +#define ASIC_GLOBAL_BURST_VALUE (0x0) +#define ASIC_GLOBAL_CONT_VALUE (0x1E) /* Struct Definitions */ typedef struct udp_header_struct { - uint32_t udp_destmac_msb; - uint16_t udp_srcmac_msb; - uint16_t udp_destmac_lsb; - uint32_t udp_srcmac_lsb; - uint8_t ip_tos; - uint8_t ip_ihl: 4, ip_ver: 4; - uint16_t udp_ethertype; - uint16_t ip_identification; - uint16_t ip_totallength; - uint8_t ip_protocol; - uint8_t ip_ttl; - uint16_t ip_fragmentoffset: 13, ip_flags: 3; - uint16_t ip_srcip_msb; - uint16_t ip_checksum; - uint16_t ip_destip_msb; - uint16_t ip_srcip_lsb; - uint16_t udp_srcport; - uint16_t ip_destip_lsb; - uint16_t udp_checksum; - uint16_t udp_destport; + uint32_t udp_destmac_msb; + uint16_t udp_srcmac_msb; + uint16_t udp_destmac_lsb; + uint32_t udp_srcmac_lsb; + uint8_t ip_tos; + uint8_t ip_ihl : 4, ip_ver : 4; + uint16_t udp_ethertype; + uint16_t ip_identification; + uint16_t ip_totallength; + uint8_t ip_protocol; + uint8_t ip_ttl; + uint16_t ip_fragmentoffset : 13, ip_flags : 3; + uint16_t ip_srcip_msb; + uint16_t ip_checksum; + uint16_t ip_destip_msb; + uint16_t ip_srcip_lsb; + uint16_t udp_srcport; + uint16_t ip_destip_lsb; + uint16_t udp_checksum; + uint16_t udp_destport; } udp_header; -#define UDP_IP_HEADER_LENGTH_BYTES (28) \ No newline at end of file +#define UDP_IP_HEADER_LENGTH_BYTES (28) \ No newline at end of file diff --git a/slsDetectorServers/gotthardDetectorServer/RegisterDefs.h b/slsDetectorServers/gotthardDetectorServer/RegisterDefs.h old mode 100755 new mode 100644 index 4f9c0f1f8..c8ba9c463 --- a/slsDetectorServers/gotthardDetectorServer/RegisterDefs.h +++ b/slsDetectorServers/gotthardDetectorServer/RegisterDefs.h @@ -1,18 +1,23 @@ #pragma once /* Definitions for FPGA*/ -#define MEM_MAP_SHIFT (11) +#define MEM_MAP_SHIFT (11) /** Gain register */ -#define GAIN_REG (0x10 << MEM_MAP_SHIFT) +#define GAIN_REG (0x10 << MEM_MAP_SHIFT) -#define GAIN_CONFGAIN_OFST (0) -#define GAIN_CONFGAIN_MSK (0x000000FF << GAIN_CONFGAIN_OFST) -#define GAIN_CONFGAIN_HGH_GAIN_VAL ((0x0 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK) -#define GAIN_CONFGAIN_DYNMC_GAIN_VAL ((0x8 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK) -#define GAIN_CONFGAIN_LW_GAIN_VAL ((0x6 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK) -#define GAIN_CONFGAIN_MDM_GAIN_VAL ((0x2 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK) -#define GAIN_CONFGAIN_VRY_HGH_GAIN_VAL ((0x1 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK) +#define GAIN_CONFGAIN_OFST (0) +#define GAIN_CONFGAIN_MSK (0x000000FF << GAIN_CONFGAIN_OFST) +#define GAIN_CONFGAIN_HGH_GAIN_VAL \ + ((0x0 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK) +#define GAIN_CONFGAIN_DYNMC_GAIN_VAL \ + ((0x8 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK) +#define GAIN_CONFGAIN_LW_GAIN_VAL \ + ((0x6 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK) +#define GAIN_CONFGAIN_MDM_GAIN_VAL \ + ((0x2 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK) +#define GAIN_CONFGAIN_VRY_HGH_GAIN_VAL \ + ((0x1 << GAIN_CONFGAIN_OFST) & GAIN_CONFGAIN_MSK) /** Flow Control register */ //#define FLOW_CONTROL_REG (0x11 << MEM_MAP_SHIFT) @@ -24,243 +29,261 @@ //#define FRAME_REG (0x13 << MEM_MAP_SHIFT) /** Multi Purpose register */ -#define MULTI_PURPOSE_REG (0x14 << MEM_MAP_SHIFT) +#define MULTI_PURPOSE_REG (0x14 << MEM_MAP_SHIFT) -#define PHS_STP_OFST (0) -#define PHS_STP_MSK (0x00000001 << PHS_STP_OFST) -#define RST_CNTR_OFST (2) -#define RST_CNTR_MSK (0x00000001 << RST_CNTR_OFST) -#define SW1_OFST (5) -#define SW1_MSK (0x00000001 << SW1_OFST) -#define WRT_BCK_OFST (6) -#define WRT_BCK_MSK (0x00000001 << WRT_BCK_OFST) -#define RST_OFST (7) -#define RST_MSK (0x00000001 << RST_OFST) -#define PLL_CLK_SL_OFST (8) -#define PLL_CLK_SL_MSK (0x00000007 << PLL_CLK_SL_OFST) -#define PLL_CLK_SL_MSTR_VAL ((0x1 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK) -#define PLL_CLK_SL_MSTR_ADC_VAL ((0x2 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK) -#define PLL_CLK_SL_SLV_VAL ((0x3 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK) -#define PLL_CLK_SL_SLV_ADC_VAL ((0x4 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK) -#define ENT_RSTN_OFST (11) -#define ENT_RSTN_MSK (0x00000001 << ENT_RSTN_OFST) -#define INT_RSTN_OFST (12) -#define INT_RSTN_MSK (0x00000001 << INT_RSTN_OFST) -#define DGTL_TST_OFST (14) -#define DGTL_TST_MSK (0x00000001 << DGTL_TST_OFST) -#define CHNG_AT_PWR_ON_OFST (15) // Not used in SW -#define CHNG_AT_PWR_ON_MSK (0x00000001 << CHNG_AT_PWR_ON_OFST) // Not used in SW -#define RST_TO_SW1_DLY_OFST (16) -#define RST_TO_SW1_DLY_MSK (0x0000000F << RST_TO_SW1_DLY_OFST) -#define STRT_ACQ_DLY_OFST (20) -#define STRT_ACQ_DLY_MSK (0x0000000F << STRT_ACQ_DLY_OFST) +#define PHS_STP_OFST (0) +#define PHS_STP_MSK (0x00000001 << PHS_STP_OFST) +#define RST_CNTR_OFST (2) +#define RST_CNTR_MSK (0x00000001 << RST_CNTR_OFST) +#define SW1_OFST (5) +#define SW1_MSK (0x00000001 << SW1_OFST) +#define WRT_BCK_OFST (6) +#define WRT_BCK_MSK (0x00000001 << WRT_BCK_OFST) +#define RST_OFST (7) +#define RST_MSK (0x00000001 << RST_OFST) +#define PLL_CLK_SL_OFST (8) +#define PLL_CLK_SL_MSK (0x00000007 << PLL_CLK_SL_OFST) +#define PLL_CLK_SL_MSTR_VAL ((0x1 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK) +#define PLL_CLK_SL_MSTR_ADC_VAL ((0x2 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK) +#define PLL_CLK_SL_SLV_VAL ((0x3 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK) +#define PLL_CLK_SL_SLV_ADC_VAL ((0x4 << PLL_CLK_SL_OFST) & PLL_CLK_SL_MSK) +#define ENT_RSTN_OFST (11) +#define ENT_RSTN_MSK (0x00000001 << ENT_RSTN_OFST) +#define INT_RSTN_OFST (12) +#define INT_RSTN_MSK (0x00000001 << INT_RSTN_OFST) +#define DGTL_TST_OFST (14) +#define DGTL_TST_MSK (0x00000001 << DGTL_TST_OFST) +#define CHNG_AT_PWR_ON_OFST (15) // Not used in SW +#define CHNG_AT_PWR_ON_MSK (0x00000001 << CHNG_AT_PWR_ON_OFST) // Not used in SW +#define RST_TO_SW1_DLY_OFST (16) +#define RST_TO_SW1_DLY_MSK (0x0000000F << RST_TO_SW1_DLY_OFST) +#define STRT_ACQ_DLY_OFST (20) +#define STRT_ACQ_DLY_MSK (0x0000000F << STRT_ACQ_DLY_OFST) /** DAQ register */ -#define DAQ_REG (0x15 << MEM_MAP_SHIFT) +#define DAQ_REG (0x15 << MEM_MAP_SHIFT) -#define DAQ_TKN_TMNG_OFST (0) -#define DAQ_TKN_TMNG_MSK (0x0000FFFF << DAQ_TKN_TMNG_OFST) -#define DAQ_TKN_TMNG_BRD_RVSN_1_VAL ((0x1f16 << DAQ_TKN_TMNG_OFST) & DAQ_TKN_TMNG_MSK) -#define DAQ_TKN_TMNG_BRD_RVSN_2_VAL ((0x1f10 << DAQ_TKN_TMNG_OFST) & DAQ_TKN_TMNG_MSK) -#define DAQ_PCKT_LNGTH_OFST (16) -#define DAQ_PCKT_LNGTH_MSK (0x0000FFFF << DAQ_PCKT_LNGTH_OFST) -#define DAQ_PCKT_LNGTH_NO_ROI_VAL ((0x0013f << DAQ_PCKT_LNGTH_OFST) & DAQ_PCKT_LNGTH_MSK) -#define DAQ_PCKT_LNGTH_ROI_VAL ((0x0007f << DAQ_PCKT_LNGTH_OFST) & DAQ_PCKT_LNGTH_MSK) +#define DAQ_TKN_TMNG_OFST (0) +#define DAQ_TKN_TMNG_MSK (0x0000FFFF << DAQ_TKN_TMNG_OFST) +#define DAQ_TKN_TMNG_BRD_RVSN_1_VAL \ + ((0x1f16 << DAQ_TKN_TMNG_OFST) & DAQ_TKN_TMNG_MSK) +#define DAQ_TKN_TMNG_BRD_RVSN_2_VAL \ + ((0x1f10 << DAQ_TKN_TMNG_OFST) & DAQ_TKN_TMNG_MSK) +#define DAQ_PCKT_LNGTH_OFST (16) +#define DAQ_PCKT_LNGTH_MSK (0x0000FFFF << DAQ_PCKT_LNGTH_OFST) +#define DAQ_PCKT_LNGTH_NO_ROI_VAL \ + ((0x0013f << DAQ_PCKT_LNGTH_OFST) & DAQ_PCKT_LNGTH_MSK) +#define DAQ_PCKT_LNGTH_ROI_VAL \ + ((0x0007f << DAQ_PCKT_LNGTH_OFST) & DAQ_PCKT_LNGTH_MSK) /** Time From Start register */ //#define TIME_FROM_START_REG (0x16 << MEM_MAP_SHIFT) /** DAC Control register */ -#define SPI_REG (0x17 << MEM_MAP_SHIFT) +#define SPI_REG (0x17 << MEM_MAP_SHIFT) -#define SPI_DAC_SRL_CS_OTPT_OFST (0) -#define SPI_DAC_SRL_CS_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CS_OTPT_OFST) -#define SPI_DAC_SRL_CLK_OTPT_OFST (1) -#define SPI_DAC_SRL_CLK_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CLK_OTPT_OFST) -#define SPI_DAC_SRL_DGTL_OTPT_OFST (2) -#define SPI_DAC_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_DAC_SRL_DGTL_OTPT_OFST) +#define SPI_DAC_SRL_CS_OTPT_OFST (0) +#define SPI_DAC_SRL_CS_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CS_OTPT_OFST) +#define SPI_DAC_SRL_CLK_OTPT_OFST (1) +#define SPI_DAC_SRL_CLK_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CLK_OTPT_OFST) +#define SPI_DAC_SRL_DGTL_OTPT_OFST (2) +#define SPI_DAC_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_DAC_SRL_DGTL_OTPT_OFST) /** ADC SPI register */ -#define ADC_SPI_REG (0x18 << MEM_MAP_SHIFT) +#define ADC_SPI_REG (0x18 << MEM_MAP_SHIFT) -#define ADC_SPI_SRL_CLK_OTPT_OFST (0) -#define ADC_SPI_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SRL_CLK_OTPT_OFST) -#define ADC_SPI_SRL_DT_OTPT_OFST (1) -#define ADC_SPI_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SRL_DT_OTPT_OFST) -#define ADC_SPI_SRL_CS_OTPT_OFST (2) -#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000001F << ADC_SPI_SRL_CS_OTPT_OFST) +#define ADC_SPI_SRL_CLK_OTPT_OFST (0) +#define ADC_SPI_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SRL_CLK_OTPT_OFST) +#define ADC_SPI_SRL_DT_OTPT_OFST (1) +#define ADC_SPI_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SRL_DT_OTPT_OFST) +#define ADC_SPI_SRL_CS_OTPT_OFST (2) +#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000001F << ADC_SPI_SRL_CS_OTPT_OFST) /** ADC Sync register */ -#define ADC_SYNC_REG (0x19 << MEM_MAP_SHIFT) +#define ADC_SYNC_REG (0x19 << MEM_MAP_SHIFT) -#define ADC_SYNC_ENET_STRT_DLY_OFST (0) -#define ADC_SYNC_ENET_STRT_DLY_MSK (0x0000000F << ADC_SYNC_ENET_STRT_DLY_OFST) -#define ADC_SYNC_ENET_STRT_DLY_VAL ((0x4 << ADC_SYNC_ENET_STRT_DLY_OFST) & ADC_SYNC_ENET_STRT_DLY_MSK) -#define ADC_SYNC_TKN1_HGH_DLY_OFST (4) -#define ADC_SYNC_TKN1_HGH_DLY_MSK (0x0000000F << ADC_SYNC_TKN1_HGH_DLY_OFST) -#define ADC_SYNC_TKN1_HGH_DLY_VAL ((0x1 << ADC_SYNC_TKN1_HGH_DLY_OFST) & ADC_SYNC_TKN1_HGH_DLY_MSK) -#define ADC_SYNC_TKN2_HGH_DLY_OFST (8) -#define ADC_SYNC_TKN2_HGH_DLY_MSK (0x0000000F << ADC_SYNC_TKN2_HGH_DLY_OFST) -#define ADC_SYNC_TKN2_HGH_DLY_VAL ((0x2 << ADC_SYNC_TKN2_HGH_DLY_OFST) & ADC_SYNC_TKN2_HGH_DLY_MSK) -#define ADC_SYNC_TKN1_LOW_DLY_OFST (12) -#define ADC_SYNC_TKN1_LOW_DLY_MSK (0x0000000F << ADC_SYNC_TKN1_LOW_DLY_OFST) -#define ADC_SYNC_TKN1_LOW_DLY_VAL ((0x2 << ADC_SYNC_TKN1_LOW_DLY_OFST) & ADC_SYNC_TKN1_LOW_DLY_MSK) -#define ADC_SYNC_TKN2_LOW_DLY_OFST (16) -#define ADC_SYNC_TKN2_LOW_DLY_MSK (0x0000000F << ADC_SYNC_TKN2_LOW_DLY_OFST) -#define ADC_SYNC_TKN2_LOW_DLY_VAL ((0x3 << ADC_SYNC_TKN2_LOW_DLY_OFST) & ADC_SYNC_TKN2_LOW_DLY_MSK) -//0x32214 -#define ADC_SYNC_TKN_VAL (ADC_SYNC_ENET_STRT_DLY_VAL | ADC_SYNC_TKN1_HGH_DLY_VAL | ADC_SYNC_TKN2_HGH_DLY_VAL | ADC_SYNC_TKN1_LOW_DLY_VAL | ADC_SYNC_TKN2_LOW_DLY_VAL) -#define ADC_SYNC_CLEAN_FIFOS_OFST (20) -#define ADC_SYNC_CLEAN_FIFOS_MSK (0x00000001 << ADC_SYNC_CLEAN_FIFOS_OFST) -#define ADC_SYNC_ENET_DELAY_OFST (24) -#define ADC_SYNC_ENET_DELAY_MSK (0x000000FF << ADC_SYNC_ENET_DELAY_OFST) -#define ADC_SYNC_ENET_DELAY_NO_ROI_VAL ((0x88 << ADC_SYNC_ENET_DELAY_OFST) & ADC_SYNC_ENET_DELAY_MSK) -#define ADC_SYNC_ENET_DELAY_ROI_VAL ((0x1b << ADC_SYNC_ENET_DELAY_OFST) & ADC_SYNC_ENET_DELAY_MSK) +#define ADC_SYNC_ENET_STRT_DLY_OFST (0) +#define ADC_SYNC_ENET_STRT_DLY_MSK (0x0000000F << ADC_SYNC_ENET_STRT_DLY_OFST) +#define ADC_SYNC_ENET_STRT_DLY_VAL \ + ((0x4 << ADC_SYNC_ENET_STRT_DLY_OFST) & ADC_SYNC_ENET_STRT_DLY_MSK) +#define ADC_SYNC_TKN1_HGH_DLY_OFST (4) +#define ADC_SYNC_TKN1_HGH_DLY_MSK (0x0000000F << ADC_SYNC_TKN1_HGH_DLY_OFST) +#define ADC_SYNC_TKN1_HGH_DLY_VAL \ + ((0x1 << ADC_SYNC_TKN1_HGH_DLY_OFST) & ADC_SYNC_TKN1_HGH_DLY_MSK) +#define ADC_SYNC_TKN2_HGH_DLY_OFST (8) +#define ADC_SYNC_TKN2_HGH_DLY_MSK (0x0000000F << ADC_SYNC_TKN2_HGH_DLY_OFST) +#define ADC_SYNC_TKN2_HGH_DLY_VAL \ + ((0x2 << ADC_SYNC_TKN2_HGH_DLY_OFST) & ADC_SYNC_TKN2_HGH_DLY_MSK) +#define ADC_SYNC_TKN1_LOW_DLY_OFST (12) +#define ADC_SYNC_TKN1_LOW_DLY_MSK (0x0000000F << ADC_SYNC_TKN1_LOW_DLY_OFST) +#define ADC_SYNC_TKN1_LOW_DLY_VAL \ + ((0x2 << ADC_SYNC_TKN1_LOW_DLY_OFST) & ADC_SYNC_TKN1_LOW_DLY_MSK) +#define ADC_SYNC_TKN2_LOW_DLY_OFST (16) +#define ADC_SYNC_TKN2_LOW_DLY_MSK (0x0000000F << ADC_SYNC_TKN2_LOW_DLY_OFST) +#define ADC_SYNC_TKN2_LOW_DLY_VAL \ + ((0x3 << ADC_SYNC_TKN2_LOW_DLY_OFST) & ADC_SYNC_TKN2_LOW_DLY_MSK) +// 0x32214 +#define ADC_SYNC_TKN_VAL \ + (ADC_SYNC_ENET_STRT_DLY_VAL | ADC_SYNC_TKN1_HGH_DLY_VAL | \ + ADC_SYNC_TKN2_HGH_DLY_VAL | ADC_SYNC_TKN1_LOW_DLY_VAL | \ + ADC_SYNC_TKN2_LOW_DLY_VAL) +#define ADC_SYNC_CLEAN_FIFOS_OFST (20) +#define ADC_SYNC_CLEAN_FIFOS_MSK (0x00000001 << ADC_SYNC_CLEAN_FIFOS_OFST) +#define ADC_SYNC_ENET_DELAY_OFST (24) +#define ADC_SYNC_ENET_DELAY_MSK (0x000000FF << ADC_SYNC_ENET_DELAY_OFST) +#define ADC_SYNC_ENET_DELAY_NO_ROI_VAL \ + ((0x88 << ADC_SYNC_ENET_DELAY_OFST) & ADC_SYNC_ENET_DELAY_MSK) +#define ADC_SYNC_ENET_DELAY_ROI_VAL \ + ((0x1b << ADC_SYNC_ENET_DELAY_OFST) & ADC_SYNC_ENET_DELAY_MSK) /** Time From Start register */ //#define MU_TIME_REG (0x1a << MEM_MAP_SHIFT) /** Temperatre SPI In register */ -#define TEMP_SPI_IN_REG (0x1b << MEM_MAP_SHIFT) +#define TEMP_SPI_IN_REG (0x1b << MEM_MAP_SHIFT) -#define TEMP_SPI_IN_T1_CLK_OFST (0) -#define TEMP_SPI_IN_T1_CLK_MSK (0x00000001 << TEMP_SPI_IN_T1_CLK_OFST) -#define TEMP_SPI_IN_T1_CS_OFST (1) -#define TEMP_SPI_IN_T1_CS_MSK (0x00000001 << TEMP_SPI_IN_T1_CS_OFST) -#define TEMP_SPI_IN_T2_CLK_OFST (2) -#define TEMP_SPI_IN_T2_CLK_MSK (0x00000001 << TEMP_SPI_IN_T2_CLK_OFST) -#define TEMP_SPI_IN_T2_CS_OFST (3) -#define TEMP_SPI_IN_T2_CS_MSK (0x00000001 << TEMP_SPI_IN_T2_CS_OFST) -#define TEMP_SPI_IN_IDLE_MSK (TEMP_SPI_IN_T1_CS_MSK | TEMP_SPI_IN_T2_CS_MSK | TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T2_CLK_MSK) +#define TEMP_SPI_IN_T1_CLK_OFST (0) +#define TEMP_SPI_IN_T1_CLK_MSK (0x00000001 << TEMP_SPI_IN_T1_CLK_OFST) +#define TEMP_SPI_IN_T1_CS_OFST (1) +#define TEMP_SPI_IN_T1_CS_MSK (0x00000001 << TEMP_SPI_IN_T1_CS_OFST) +#define TEMP_SPI_IN_T2_CLK_OFST (2) +#define TEMP_SPI_IN_T2_CLK_MSK (0x00000001 << TEMP_SPI_IN_T2_CLK_OFST) +#define TEMP_SPI_IN_T2_CS_OFST (3) +#define TEMP_SPI_IN_T2_CS_MSK (0x00000001 << TEMP_SPI_IN_T2_CS_OFST) +#define TEMP_SPI_IN_IDLE_MSK \ + (TEMP_SPI_IN_T1_CS_MSK | TEMP_SPI_IN_T2_CS_MSK | TEMP_SPI_IN_T1_CLK_MSK | \ + TEMP_SPI_IN_T2_CLK_MSK) /** Temperatre SPI Out register */ -#define TEMP_SPI_OUT_REG (0x1c << MEM_MAP_SHIFT) +#define TEMP_SPI_OUT_REG (0x1c << MEM_MAP_SHIFT) -#define TEMP_SPI_OUT_T1_DT_OFST (0) -#define TEMP_SPI_OUT_T1_DT_MSK (0x00000001 << TEMP_SPI_OUT_T1_DT_OFST) -#define TEMP_SPI_OUT_T2_DT_OFST (1) -#define TEMP_SPI_OUT_T2_DT_MSK (0x00000001 << TEMP_SPI_OUT_T2_DT_OFST) +#define TEMP_SPI_OUT_T1_DT_OFST (0) +#define TEMP_SPI_OUT_T1_DT_MSK (0x00000001 << TEMP_SPI_OUT_T1_DT_OFST) +#define TEMP_SPI_OUT_T2_DT_OFST (1) +#define TEMP_SPI_OUT_T2_DT_MSK (0x00000001 << TEMP_SPI_OUT_T2_DT_OFST) /** TSE Configure register */ -#define TSE_CONF_REG (0x1d << MEM_MAP_SHIFT) +#define TSE_CONF_REG (0x1d << MEM_MAP_SHIFT) /** SPI Configure register */ -#define ENET_CONF_REG (0x1e << MEM_MAP_SHIFT) +#define ENET_CONF_REG (0x1e << MEM_MAP_SHIFT) /** Write TSE Shadow register */ //#define WRITE_TSE_SHADOW_REG (0x1f << MEM_MAP_SHIFT) /** High Voltage register */ -#define HV_REG (0x20 << MEM_MAP_SHIFT) +#define HV_REG (0x20 << MEM_MAP_SHIFT) -#define HV_ENBL_OFST (0) -#define HV_ENBL_MSK (0x00000001 << HV_ENBL_OFST) -#define HV_SEL_OFST (1) -#define HV_SEL_MSK (0x00000007 << HV_SEL_OFST) -#define HV_SEL_90_VAL ((0x0 << HV_SEL_OFST) & HV_SEL_MSK) -#define HV_SEL_110_VAL ((0x1 << HV_SEL_OFST) & HV_SEL_MSK) -#define HV_SEL_120_VAL ((0x2 << HV_SEL_OFST) & HV_SEL_MSK) -#define HV_SEL_150_VAL ((0x3 << HV_SEL_OFST) & HV_SEL_MSK) -#define HV_SEL_180_VAL ((0x4 << HV_SEL_OFST) & HV_SEL_MSK) -#define HV_SEL_200_VAL ((0x5 << HV_SEL_OFST) & HV_SEL_MSK) +#define HV_ENBL_OFST (0) +#define HV_ENBL_MSK (0x00000001 << HV_ENBL_OFST) +#define HV_SEL_OFST (1) +#define HV_SEL_MSK (0x00000007 << HV_SEL_OFST) +#define HV_SEL_90_VAL ((0x0 << HV_SEL_OFST) & HV_SEL_MSK) +#define HV_SEL_110_VAL ((0x1 << HV_SEL_OFST) & HV_SEL_MSK) +#define HV_SEL_120_VAL ((0x2 << HV_SEL_OFST) & HV_SEL_MSK) +#define HV_SEL_150_VAL ((0x3 << HV_SEL_OFST) & HV_SEL_MSK) +#define HV_SEL_180_VAL ((0x4 << HV_SEL_OFST) & HV_SEL_MSK) +#define HV_SEL_200_VAL ((0x5 << HV_SEL_OFST) & HV_SEL_MSK) /** Dummy register */ -#define DUMMY_REG (0x21 << MEM_MAP_SHIFT) +#define DUMMY_REG (0x21 << MEM_MAP_SHIFT) /** Firmware Version register */ -#define FPGA_VERSION_REG (0x22 << MEM_MAP_SHIFT) +#define FPGA_VERSION_REG (0x22 << MEM_MAP_SHIFT) -#define FPGA_VERSION_OFST (0) -#define FPGA_VERSION_MSK (0x00FFFFFF << FPGA_VERSION_OFST) // to get in format yymmdd +#define FPGA_VERSION_OFST (0) +#define FPGA_VERSION_MSK \ + (0x00FFFFFF << FPGA_VERSION_OFST) // to get in format yymmdd /* Fix Pattern register */ -#define FIX_PATT_REG (0x23 << MEM_MAP_SHIFT) +#define FIX_PATT_REG (0x23 << MEM_MAP_SHIFT) -#define FIX_PATT_VAL (0xACDC1980) +#define FIX_PATT_VAL (0xACDC1980) /** 16 bit Control register */ -#define CONTROL_REG (0x24 << MEM_MAP_SHIFT) +#define CONTROL_REG (0x24 << MEM_MAP_SHIFT) -#define CONTROL_STRT_ACQ_OFST (0) -#define CONTROL_STRT_ACQ_MSK (0x00000001 << CONTROL_STRT_ACQ_OFST) -#define CONTROL_STP_ACQ_OFST (1) -#define CONTROL_STP_ACQ_MSK (0x00000001 << CONTROL_STP_ACQ_OFST) -#define CONTROL_STRT_FF_TST_OFST (2) // Not used in FW & SW -#define CONTROL_STRT_FF_TST_MSK (0x00000001 << CONTROL_STRT_FF_TST_OFST) -#define CONTROL_STP_FF_TST_OFST (3) // Not used in FW & SW -#define CONTROL_STP_FF_TST_MSK (0x00000001 << CONTROL_STP_FF_TST_OFST) -#define CONTROL_STRT_RDT_OFST (4) -#define CONTROL_STRT_RDT_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) -#define CONTROL_STP_RDT_OFST (5) -#define CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST) -#define CONTROL_STRT_EXPSR_OFST (6) -#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST) -#define CONTROL_STP_EXPSR_OFST (7) -#define CONTROL_STP_EXPSR_MSK (0x00000001 << CONTROL_STP_EXPSR_OFST) -#define CONTROL_STRT_TRN_OFST (8) -#define CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_TRN_OFST) -#define CONTROL_STP_TRN_OFST (9) -#define CONTROL_STP_TRN_MSK (0x00000001 << CONTROL_STP_TRN_OFST) -#define CONTROL_SYNC_RST_OFST (10) -#define CONTROL_SYNC_RST_MSK (0x00000001 << CONTROL_SYNC_RST_OFST) +#define CONTROL_STRT_ACQ_OFST (0) +#define CONTROL_STRT_ACQ_MSK (0x00000001 << CONTROL_STRT_ACQ_OFST) +#define CONTROL_STP_ACQ_OFST (1) +#define CONTROL_STP_ACQ_MSK (0x00000001 << CONTROL_STP_ACQ_OFST) +#define CONTROL_STRT_FF_TST_OFST (2) // Not used in FW & SW +#define CONTROL_STRT_FF_TST_MSK (0x00000001 << CONTROL_STRT_FF_TST_OFST) +#define CONTROL_STP_FF_TST_OFST (3) // Not used in FW & SW +#define CONTROL_STP_FF_TST_MSK (0x00000001 << CONTROL_STP_FF_TST_OFST) +#define CONTROL_STRT_RDT_OFST (4) +#define CONTROL_STRT_RDT_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) +#define CONTROL_STP_RDT_OFST (5) +#define CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST) +#define CONTROL_STRT_EXPSR_OFST (6) +#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST) +#define CONTROL_STP_EXPSR_OFST (7) +#define CONTROL_STP_EXPSR_MSK (0x00000001 << CONTROL_STP_EXPSR_OFST) +#define CONTROL_STRT_TRN_OFST (8) +#define CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_TRN_OFST) +#define CONTROL_STP_TRN_OFST (9) +#define CONTROL_STP_TRN_MSK (0x00000001 << CONTROL_STP_TRN_OFST) +#define CONTROL_SYNC_RST_OFST (10) +#define CONTROL_SYNC_RST_MSK (0x00000001 << CONTROL_SYNC_RST_OFST) /** Status register */ -#define STATUS_REG (0x25 << MEM_MAP_SHIFT) +#define STATUS_REG (0x25 << MEM_MAP_SHIFT) -#define STATUS_RN_BSY_OFST (0) -#define STATUS_RN_BSY_MSK (0x00000001 << STATUS_RN_BSY_OFST) -#define STATUS_RDT_BSY_OFST (1) -#define STATUS_RDT_BSY_MSK (0x00000001 << STATUS_RDT_BSY_OFST) -#define STATUS_WTNG_FR_TRGGR_OFST (3) -#define STATUS_WTNG_FR_TRGGR_MSK (0x00000001 << STATUS_WTNG_FR_TRGGR_OFST) -#define STATUS_DLY_BFR_OFST (4) -#define STATUS_DLY_BFR_MSK (0x00000001 << STATUS_DLY_BFR_OFST) -#define STATUS_DLY_AFTR_OFST (5) -#define STATUS_DLY_AFTR_MSK (0x00000001 << STATUS_DLY_AFTR_OFST) -#define STATUS_EXPSNG_OFST (6) -#define STATUS_EXPSNG_MSK (0x00000001 << STATUS_EXPSNG_OFST) -#define STATUS_CNT_ENBL_OFST (7) -#define STATUS_CNT_ENBL_MSK (0x00000001 << STATUS_CNT_ENBL_OFST) -#define STATUS_RD_STT_OFST (8) -#define STATUS_RD_STT_MSK (0x00000007 << STATUS_RD_STT_OFST) -#define STATUS_RN_STT_OFST (12) -#define STATUS_RN_STT_MSK (0x00000007 << STATUS_RN_STT_OFST) -#define STATUS_SM_FF_FLL_OFST (15) -#define STATUS_SM_FF_FLL_MSK (0x00000001 << STATUS_SM_FF_FLL_OFST) -#define STATUS_ALL_FF_EMPTY_OFST (11) -#define STATUS_ALL_FF_EMPTY_MSK (0x00000001 << STATUS_ALL_FF_EMPTY_OFST) -#define STATUS_RN_MSHN_BSY_OFST (17) -#define STATUS_RN_MSHN_BSY_MSK (0x00000001 << STATUS_RN_MSHN_BSY_OFST) -#define STATUS_RD_MSHN_BSY_OFST (18) -#define STATUS_RD_MSHN_BSY_MSK (0x00000001 << STATUS_RD_MSHN_BSY_OFST) -#define STATUS_RN_FNSHD_OFST (20) -#define STATUS_RN_FNSHD_MSK (0x00000001 << STATUS_RN_FNSHD_OFST) -#define STATUS_IDLE_MSK (0x0000FFFF << 0) +#define STATUS_RN_BSY_OFST (0) +#define STATUS_RN_BSY_MSK (0x00000001 << STATUS_RN_BSY_OFST) +#define STATUS_RDT_BSY_OFST (1) +#define STATUS_RDT_BSY_MSK (0x00000001 << STATUS_RDT_BSY_OFST) +#define STATUS_WTNG_FR_TRGGR_OFST (3) +#define STATUS_WTNG_FR_TRGGR_MSK (0x00000001 << STATUS_WTNG_FR_TRGGR_OFST) +#define STATUS_DLY_BFR_OFST (4) +#define STATUS_DLY_BFR_MSK (0x00000001 << STATUS_DLY_BFR_OFST) +#define STATUS_DLY_AFTR_OFST (5) +#define STATUS_DLY_AFTR_MSK (0x00000001 << STATUS_DLY_AFTR_OFST) +#define STATUS_EXPSNG_OFST (6) +#define STATUS_EXPSNG_MSK (0x00000001 << STATUS_EXPSNG_OFST) +#define STATUS_CNT_ENBL_OFST (7) +#define STATUS_CNT_ENBL_MSK (0x00000001 << STATUS_CNT_ENBL_OFST) +#define STATUS_RD_STT_OFST (8) +#define STATUS_RD_STT_MSK (0x00000007 << STATUS_RD_STT_OFST) +#define STATUS_RN_STT_OFST (12) +#define STATUS_RN_STT_MSK (0x00000007 << STATUS_RN_STT_OFST) +#define STATUS_SM_FF_FLL_OFST (15) +#define STATUS_SM_FF_FLL_MSK (0x00000001 << STATUS_SM_FF_FLL_OFST) +#define STATUS_ALL_FF_EMPTY_OFST (11) +#define STATUS_ALL_FF_EMPTY_MSK (0x00000001 << STATUS_ALL_FF_EMPTY_OFST) +#define STATUS_RN_MSHN_BSY_OFST (17) +#define STATUS_RN_MSHN_BSY_MSK (0x00000001 << STATUS_RN_MSHN_BSY_OFST) +#define STATUS_RD_MSHN_BSY_OFST (18) +#define STATUS_RD_MSHN_BSY_MSK (0x00000001 << STATUS_RD_MSHN_BSY_OFST) +#define STATUS_RN_FNSHD_OFST (20) +#define STATUS_RN_FNSHD_MSK (0x00000001 << STATUS_RN_FNSHD_OFST) +#define STATUS_IDLE_MSK (0x0000FFFF << 0) /** Config register */ -#define CONFIG_REG (0x26 << MEM_MAP_SHIFT) +#define CONFIG_REG (0x26 << MEM_MAP_SHIFT) -#define CONFIG_SLAVE_OFST (0) // Not used in FW & SW -#define CONFIG_SLAVE_MSK (0x00000001 << CONFIG_SLAVE_OFST) -#define CONFIG_MASTER_OFST (1) // Not used in FW & SW -#define CONFIG_MASTER_MSK (0x00000001 << CONFIG_MASTER_OFST) -#define CONFIG_TM_GT_ENBL_OFST (2) // Not used in FW & SW -#define CONFIG_TM_GT_ENBL_MSK (0x00000001 << CONFIG_TM_GT_ENBL_OFST) -#define CONFIG_CPU_RDT_OFST (12) -#define CONFIG_CPU_RDT_MSK (0x00000001 << CONFIG_CPU_RDT_OFST) -#define CONFIG_CNTNS_RDT_OFST (23) // Not used in FW & SW -#define CONFIG_CNTNS_RDT_MSK (0x00000001 << CONFIG_CNTNS_RDT_OFST) -#define CONFIG_ACCMLT_CNTS_OFST (24) // Not used in FW & SW -#define CONFIG_ACCMLT_CNTS_MSK (0x00000001 << CONFIG_ACCMLT_CNTS_OFST) +#define CONFIG_SLAVE_OFST (0) // Not used in FW & SW +#define CONFIG_SLAVE_MSK (0x00000001 << CONFIG_SLAVE_OFST) +#define CONFIG_MASTER_OFST (1) // Not used in FW & SW +#define CONFIG_MASTER_MSK (0x00000001 << CONFIG_MASTER_OFST) +#define CONFIG_TM_GT_ENBL_OFST (2) // Not used in FW & SW +#define CONFIG_TM_GT_ENBL_MSK (0x00000001 << CONFIG_TM_GT_ENBL_OFST) +#define CONFIG_CPU_RDT_OFST (12) +#define CONFIG_CPU_RDT_MSK (0x00000001 << CONFIG_CPU_RDT_OFST) +#define CONFIG_CNTNS_RDT_OFST (23) // Not used in FW & SW +#define CONFIG_CNTNS_RDT_MSK (0x00000001 << CONFIG_CNTNS_RDT_OFST) +#define CONFIG_ACCMLT_CNTS_OFST (24) // Not used in FW & SW +#define CONFIG_ACCMLT_CNTS_MSK (0x00000001 << CONFIG_ACCMLT_CNTS_OFST) /** External Signal register */ -#define EXT_SIGNAL_REG (0x27 << MEM_MAP_SHIFT) +#define EXT_SIGNAL_REG (0x27 << MEM_MAP_SHIFT) -#define EXT_SIGNAL_OFST (0) -#define EXT_SIGNAL_MSK (0x00000007 << EXT_SIGNAL_OFST) -#define EXT_SIGNAL_OFF_VAL ((0x0 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) -#define EXT_SIGNAL_TRGGR_IN_RSNG_VAL ((0x3 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) -#define EXT_SIGNAL_TRGGR_IN_FLLNG_VAL ((0x4 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) +#define EXT_SIGNAL_OFST (0) +#define EXT_SIGNAL_MSK (0x00000007 << EXT_SIGNAL_OFST) +#define EXT_SIGNAL_OFF_VAL ((0x0 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) +#define EXT_SIGNAL_TRGGR_IN_RSNG_VAL ((0x3 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) +#define EXT_SIGNAL_TRGGR_IN_FLLNG_VAL \ + ((0x4 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) /** Look at me register */ //#define LOOK_AT_ME_REG (0x28 << MEM_MAP_SHIFT) @@ -269,25 +292,26 @@ //#define FPGA_SVN_REG (0x29 << MEM_MAP_SHIFT) /** Chip of Interest register */ -#define CHIP_OF_INTRST_REG (0x2a << MEM_MAP_SHIFT) +#define CHIP_OF_INTRST_REG (0x2a << MEM_MAP_SHIFT) -#define CHIP_OF_INTRST_ADC_SEL_OFST (0) -#define CHIP_OF_INTRST_ADC_SEL_MSK (0x0000001F << CHIP_OF_INTRST_ADC_SEL_OFST) -#define CHIP_OF_INTRST_NUM_CHNNLS_OFST (16) -#define CHIP_OF_INTRST_NUM_CHNNLS_MSK (0x0000FFFF << CHIP_OF_INTRST_NUM_CHNNLS_OFST) +#define CHIP_OF_INTRST_ADC_SEL_OFST (0) +#define CHIP_OF_INTRST_ADC_SEL_MSK (0x0000001F << CHIP_OF_INTRST_ADC_SEL_OFST) +#define CHIP_OF_INTRST_NUM_CHNNLS_OFST (16) +#define CHIP_OF_INTRST_NUM_CHNNLS_MSK \ + (0x0000FFFF << CHIP_OF_INTRST_NUM_CHNNLS_OFST) /** Out MUX register */ //#define OUT_MUX_REG (0x2b << MEM_MAP_SHIFT) /** Board Version register */ -#define BOARD_REVISION_REG (0x2c << MEM_MAP_SHIFT) +#define BOARD_REVISION_REG (0x2c << MEM_MAP_SHIFT) -#define BOARD_REVISION_OFST (0) -#define BOARD_REVISION_MSK (0x0000FFFF << BOARD_REVISION_OFST) -#define DETECTOR_TYPE_OFST (16) -#define DETECTOR_TYPE_MSK (0x0000000F << DETECTOR_TYPE_OFST) +#define BOARD_REVISION_OFST (0) +#define BOARD_REVISION_MSK (0x0000FFFF << BOARD_REVISION_OFST) +#define DETECTOR_TYPE_OFST (16) +#define DETECTOR_TYPE_MSK (0x0000000F << DETECTOR_TYPE_OFST) //#define DETECTOR_TYPE_GOTTHARD_VAL (??) -#define DETECTOR_TYPE_MOENCH_VAL (2) +#define DETECTOR_TYPE_MOENCH_VAL (2) /** Memory Test register */ //#define MEMORY_TEST_REG (0x2d << MEM_MAP_SHIFT) @@ -299,7 +323,7 @@ //#define HIT_COUNT_REG (0x2f << MEM_MAP_SHIFT) /* 16 bit Fifo Data register */ -#define FIFO_DATA_REG (0x50 << MEM_MAP_SHIFT) // Not used in FW and SW (16bit) +#define FIFO_DATA_REG (0x50 << MEM_MAP_SHIFT) // Not used in FW and SW (16bit) /** Dacs Set 1 register */ //#define DACS_SET_1_REG (0x65 << MEM_MAP_SHIFT) @@ -311,44 +335,44 @@ //#define DACS_SET_3_REG (0x67 << MEM_MAP_SHIFT) /* Set Delay 64 bit register */ -#define SET_DELAY_LSB_REG (0x68 << MEM_MAP_SHIFT) -#define SET_DELAY_MSB_REG (0x69 << MEM_MAP_SHIFT) +#define SET_DELAY_LSB_REG (0x68 << MEM_MAP_SHIFT) +#define SET_DELAY_MSB_REG (0x69 << MEM_MAP_SHIFT) /* Get Delay 64 bit register */ -#define GET_DELAY_LSB_REG (0x6a << MEM_MAP_SHIFT) -#define GET_DELAY_MSB_REG (0x6b << MEM_MAP_SHIFT) +#define GET_DELAY_LSB_REG (0x6a << MEM_MAP_SHIFT) +#define GET_DELAY_MSB_REG (0x6b << MEM_MAP_SHIFT) /* Set Triggers 64 bit register */ -#define SET_TRAINS_LSB_REG (0x6c << MEM_MAP_SHIFT) -#define SET_TRAINS_MSB_REG (0x6d << MEM_MAP_SHIFT) +#define SET_TRAINS_LSB_REG (0x6c << MEM_MAP_SHIFT) +#define SET_TRAINS_MSB_REG (0x6d << MEM_MAP_SHIFT) /* Get Triggers 64 bit register */ -#define GET_TRAINS_LSB_REG (0x6e << MEM_MAP_SHIFT) -#define GET_TRAINS_MSB_REG (0x6f << MEM_MAP_SHIFT) +#define GET_TRAINS_LSB_REG (0x6e << MEM_MAP_SHIFT) +#define GET_TRAINS_MSB_REG (0x6f << MEM_MAP_SHIFT) /* Set Frames 64 bit register */ -#define SET_FRAMES_LSB_REG (0x70 << MEM_MAP_SHIFT) -#define SET_FRAMES_MSB_REG (0x71 << MEM_MAP_SHIFT) +#define SET_FRAMES_LSB_REG (0x70 << MEM_MAP_SHIFT) +#define SET_FRAMES_MSB_REG (0x71 << MEM_MAP_SHIFT) /* Get Frames 64 bit register */ -#define GET_FRAMES_LSB_REG (0x72 << MEM_MAP_SHIFT) -#define GET_FRAMES_MSB_REG (0x73 << MEM_MAP_SHIFT) +#define GET_FRAMES_LSB_REG (0x72 << MEM_MAP_SHIFT) +#define GET_FRAMES_MSB_REG (0x73 << MEM_MAP_SHIFT) /* Set Period 64 bit register */ -#define SET_PERIOD_LSB_REG (0x74 << MEM_MAP_SHIFT) -#define SET_PERIOD_MSB_REG (0x75 << MEM_MAP_SHIFT) +#define SET_PERIOD_LSB_REG (0x74 << MEM_MAP_SHIFT) +#define SET_PERIOD_MSB_REG (0x75 << MEM_MAP_SHIFT) /* Get Period 64 bit register */ -#define GET_PERIOD_LSB_REG (0x76 << MEM_MAP_SHIFT) -#define GET_PERIOD_MSB_REG (0x77 << MEM_MAP_SHIFT) +#define GET_PERIOD_LSB_REG (0x76 << MEM_MAP_SHIFT) +#define GET_PERIOD_MSB_REG (0x77 << MEM_MAP_SHIFT) /* Set Exptime 64 bit register */ -#define SET_EXPTIME_LSB_REG (0x78 << MEM_MAP_SHIFT) -#define SET_EXPTIME_MSB_REG (0x79 << MEM_MAP_SHIFT) +#define SET_EXPTIME_LSB_REG (0x78 << MEM_MAP_SHIFT) +#define SET_EXPTIME_MSB_REG (0x79 << MEM_MAP_SHIFT) /* Get Exptime 64 bit register */ -#define GET_EXPTIME_LSB_REG (0x7a << MEM_MAP_SHIFT) -#define GET_EXPTIME_MSB_REG (0x7b << MEM_MAP_SHIFT) +#define GET_EXPTIME_LSB_REG (0x7a << MEM_MAP_SHIFT) +#define GET_EXPTIME_MSB_REG (0x7b << MEM_MAP_SHIFT) /* Set Gates 64 bit register */ //#define SET_GATES_LSB_REG (0x7c << MEM_MAP_SHIFT) @@ -359,11 +383,10 @@ //#define GET_GATES_MSB_REG (0x7f << MEM_MAP_SHIFT) /* Dark Image starting address */ -#define DARK_IMAGE_REG (0x81 << MEM_MAP_SHIFT) +#define DARK_IMAGE_REG (0x81 << MEM_MAP_SHIFT) /* Gain Image starting address */ -#define GAIN_IMAGE_REG (0x82 << MEM_MAP_SHIFT) +#define GAIN_IMAGE_REG (0x82 << MEM_MAP_SHIFT) /* Counter Block Memory starting address */ -#define COUNTER_MEMORY_REG (0x85 << MEM_MAP_SHIFT) - +#define COUNTER_MEMORY_REG (0x85 << MEM_MAP_SHIFT) diff --git a/slsDetectorServers/gotthardDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/gotthardDetectorServer/slsDetectorServer_defs.h old mode 100755 new mode 100644 index e44b665c0..190d05634 --- a/slsDetectorServers/gotthardDetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/gotthardDetectorServer/slsDetectorServer_defs.h @@ -3,125 +3,136 @@ #include /* Enums */ -enum ADCINDEX {TEMP_FPGA, TEMP_ADC}; -enum DACINDEX {G_VREF_DS, G_VCASCN_PB, G_VCASCP_PB, G_VOUT_CM, G_VCASC_OUT, G_VIN_CM, G_VREF_COMP, G_IB_TESTC}; -enum CLKINDEX {ADC_CLK, NUM_CLOCKS}; -#define CLK_NAMES "adc" +enum ADCINDEX { TEMP_FPGA, TEMP_ADC }; +enum DACINDEX { + G_VREF_DS, + G_VCASCN_PB, + G_VCASCP_PB, + G_VOUT_CM, + G_VCASC_OUT, + G_VIN_CM, + G_VREF_COMP, + G_IB_TESTC +}; +enum CLKINDEX { ADC_CLK, NUM_CLOCKS }; +#define CLK_NAMES "adc" -#define DEFAULT_DAC_VALS { \ - 660, /* G_VREF_DS */ \ - 650, /* G_VCASCN_PB */ \ - 1480, /* G_VCASCP_PB */ \ - 1520, /* G_VOUT_CM */ \ - 1320, /* G_VCASC_OUT */ \ - 1350, /* G_VIN_CM */ \ - 350, /* G_VREF_COMP */ \ - 2001 /* G_IB_TESTC */ \ - }; +#define DEFAULT_DAC_VALS \ + { \ + 660, /* G_VREF_DS */ \ + 650, /* G_VCASCN_PB */ \ + 1480, /* G_VCASCP_PB */ \ + 1520, /* G_VOUT_CM */ \ + 1320, /* G_VCASC_OUT */ \ + 1350, /* G_VIN_CM */ \ + 350, /* G_VREF_COMP */ \ + 2001 /* G_IB_TESTC */ \ + }; /* for 25 um */ -#define CONFIG_FILE "config.txt" +#define CONFIG_FILE "config.txt" /* Hardware Definitions */ -#define NCHAN (128) -#define NCHIP (10) -#define NDAC (8) -#define NCHIPS_PER_ADC (2) -#define NCHAN_PER_ADC (256) -#define DYNAMIC_RANGE (16) -#define NUM_BITS_PER_PIXEL (DYNAMIC_RANGE / 8) -#define DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL) -#define CLK_FREQ (32007729) /* Hz */ +#define NCHAN (128) +#define NCHIP (10) +#define NDAC (8) +#define NCHIPS_PER_ADC (2) +#define NCHAN_PER_ADC (256) +#define DYNAMIC_RANGE (16) +#define NUM_BITS_PER_PIXEL (DYNAMIC_RANGE / 8) +#define DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL) +#define CLK_FREQ (32007729) /* Hz */ /** Firmware Definitions */ -#define IP_PACKET_SIZE_NO_ROI (NCHIP * (NCHAN / 2) * 2 + 14 + 20) // 2 packets, so divide by 2 -#define IP_PACKET_SIZE_ROI (NCHIPS_PER_ADC * NCHAN * 2 + 14 + 20) +#define IP_PACKET_SIZE_NO_ROI \ + (NCHIP * (NCHAN / 2) * 2 + 14 + 20) // 2 packets, so divide by 2 +#define IP_PACKET_SIZE_ROI (NCHIPS_PER_ADC * NCHAN * 2 + 14 + 20) -#define UDP_PACKETSIZE_NO_ROI (NCHIP * (NCHAN / 2) * 2 + 4 + 8 + 2) // 2 packets, so divide by 2 -#define UDP_PACKETSIZE_ROI (NCHIPS_PER_ADC * NCHAN * 2 + 4 + 8 + 2) +#define UDP_PACKETSIZE_NO_ROI \ + (NCHIP * (NCHAN / 2) * 2 + 4 + 8 + 2) // 2 packets, so divide by 2 +#define UDP_PACKETSIZE_ROI (NCHIPS_PER_ADC * NCHAN * 2 + 4 + 8 + 2) /** Default Parameters */ -#define DEFAULT_NUM_FRAMES (1) -#define DEFAULT_NUM_CYCLES (1) -#define DEFAULT_EXPTIME (1 * 1000 * 1000) // 1 ms -#define DEFAULT_PERIOD (1 * 1000 * 1000 * 1000) // 1 s -#define DEFAULT_DELAY (0) -#define DEFAULT_SETTINGS (DYNAMICGAIN) -#define DEFAULT_TIMING_MODE (AUTO_TIMING) -#define DEFAULT_TRIGGER_MODE (TRIGGER_IN_RISING_EDGE) -#define DEFAULT_HIGH_VOLTAGE (0) -#define DEFAULT_PHASE_SHIFT (120) -#define DEFAULT_TX_UDP_PORT (0xE185) +#define DEFAULT_NUM_FRAMES (1) +#define DEFAULT_NUM_CYCLES (1) +#define DEFAULT_EXPTIME (1 * 1000 * 1000) // 1 ms +#define DEFAULT_PERIOD (1 * 1000 * 1000 * 1000) // 1 s +#define DEFAULT_DELAY (0) +#define DEFAULT_SETTINGS (DYNAMICGAIN) +#define DEFAULT_TIMING_MODE (AUTO_TIMING) +#define DEFAULT_TRIGGER_MODE (TRIGGER_IN_RISING_EDGE) +#define DEFAULT_HIGH_VOLTAGE (0) +#define DEFAULT_PHASE_SHIFT (120) +#define DEFAULT_TX_UDP_PORT (0xE185) -#define DAC_MIN_MV (0) -#define DAC_MAX_MV (2500) +#define DAC_MIN_MV (0) +#define DAC_MAX_MV (2500) /** ENEt conf structs */ -typedef struct mac_header_struct{ - u_int8_t mac_dest_mac2; - u_int8_t mac_dest_mac1; - u_int8_t mac_dummy1; - u_int8_t mac_dummy2; - u_int8_t mac_dest_mac6; - u_int8_t mac_dest_mac5; - u_int8_t mac_dest_mac4; - u_int8_t mac_dest_mac3; - u_int8_t mac_src_mac4; - u_int8_t mac_src_mac3; - u_int8_t mac_src_mac2; - u_int8_t mac_src_mac1; - u_int16_t mac_ether_type; - u_int8_t mac_src_mac6; - u_int8_t mac_src_mac5; +typedef struct mac_header_struct { + u_int8_t mac_dest_mac2; + u_int8_t mac_dest_mac1; + u_int8_t mac_dummy1; + u_int8_t mac_dummy2; + u_int8_t mac_dest_mac6; + u_int8_t mac_dest_mac5; + u_int8_t mac_dest_mac4; + u_int8_t mac_dest_mac3; + u_int8_t mac_src_mac4; + u_int8_t mac_src_mac3; + u_int8_t mac_src_mac2; + u_int8_t mac_src_mac1; + u_int16_t mac_ether_type; + u_int8_t mac_src_mac6; + u_int8_t mac_src_mac5; } mac_header; typedef struct ip_header_struct { - u_int16_t ip_len; - u_int8_t ip_tos; - u_int8_t ip_ihl:4 ,ip_ver:4; - u_int16_t ip_offset:13,ip_flag:3; - u_int16_t ip_ident; - u_int16_t ip_chksum; - u_int8_t ip_protocol; - u_int8_t ip_ttl; - u_int32_t ip_sourceip; - u_int32_t ip_destip; + u_int16_t ip_len; + u_int8_t ip_tos; + u_int8_t ip_ihl : 4, ip_ver : 4; + u_int16_t ip_offset : 13, ip_flag : 3; + u_int16_t ip_ident; + u_int16_t ip_chksum; + u_int8_t ip_protocol; + u_int8_t ip_ttl; + u_int32_t ip_sourceip; + u_int32_t ip_destip; } ip_header; -typedef struct udp_header_struct{ - u_int16_t udp_destport; - u_int16_t udp_srcport; - u_int16_t udp_chksum; - u_int16_t udp_len; +typedef struct udp_header_struct { + u_int16_t udp_destport; + u_int16_t udp_srcport; + u_int16_t udp_chksum; + u_int16_t udp_len; } udp_header; -typedef struct mac_conf_struct{ - mac_header mac; - ip_header ip; - udp_header udp; - u_int32_t npack; - u_int32_t lpack; - u_int32_t npad; - u_int32_t cdone; +typedef struct mac_conf_struct { + mac_header mac; + ip_header ip; + udp_header udp; + u_int32_t npack; + u_int32_t lpack; + u_int32_t npad; + u_int32_t cdone; } mac_conf; -typedef struct tse_conf_struct{ - u_int32_t rev; //0x0 - u_int32_t scratch; - u_int32_t command_config; - u_int32_t mac_0; //0x3 - u_int32_t mac_1; - u_int32_t frm_length; - u_int32_t pause_quant; - u_int32_t rx_section_empty; //0x7 - u_int32_t rx_section_full; - u_int32_t tx_section_empty; - u_int32_t tx_section_full; - u_int32_t rx_almost_empty; //0xB - u_int32_t rx_almost_full; - u_int32_t tx_almost_empty; - u_int32_t tx_almost_full; - u_int32_t mdio_addr0; //0xF - u_int32_t mdio_addr1; -}tse_conf; - +typedef struct tse_conf_struct { + u_int32_t rev; // 0x0 + u_int32_t scratch; + u_int32_t command_config; + u_int32_t mac_0; // 0x3 + u_int32_t mac_1; + u_int32_t frm_length; + u_int32_t pause_quant; + u_int32_t rx_section_empty; // 0x7 + u_int32_t rx_section_full; + u_int32_t tx_section_empty; + u_int32_t tx_section_full; + u_int32_t rx_almost_empty; // 0xB + u_int32_t rx_almost_full; + u_int32_t tx_almost_empty; + u_int32_t tx_almost_full; + u_int32_t mdio_addr0; // 0xF + u_int32_t mdio_addr1; +} tse_conf; diff --git a/slsDetectorServers/jungfrauDetectorServer/RegisterDefs.h b/slsDetectorServers/jungfrauDetectorServer/RegisterDefs.h old mode 100755 new mode 100644 index 5eedb3bcb..15764d237 --- a/slsDetectorServers/jungfrauDetectorServer/RegisterDefs.h +++ b/slsDetectorServers/jungfrauDetectorServer/RegisterDefs.h @@ -4,441 +4,495 @@ #define MEM_MAP_SHIFT 1 /* FPGA Version register */ -#define FPGA_VERSION_REG (0x00 << MEM_MAP_SHIFT) - -#define FPGA_COMPILATION_DATE_OFST (0) -#define FPGA_COMPILATION_DATE_MSK (0x00FFFFFF << FPGA_COMPILATION_DATE_OFST) -#define DETECTOR_TYPE_OFST (24) -#define DETECTOR_TYPE_MSK (0x000000FF << DETECTOR_TYPE_OFST) - +#define FPGA_VERSION_REG (0x00 << MEM_MAP_SHIFT) +#define FPGA_COMPILATION_DATE_OFST (0) +#define FPGA_COMPILATION_DATE_MSK (0x00FFFFFF << FPGA_COMPILATION_DATE_OFST) +#define DETECTOR_TYPE_OFST (24) +#define DETECTOR_TYPE_MSK (0x000000FF << DETECTOR_TYPE_OFST) /* Fix pattern register */ -#define FIX_PATT_REG (0x01 << MEM_MAP_SHIFT) +#define FIX_PATT_REG (0x01 << MEM_MAP_SHIFT) -#define FIX_PATT_VAL (0xACDC2014) +#define FIX_PATT_VAL (0xACDC2014) /* Status register */ -#define STATUS_REG (0x02 << MEM_MAP_SHIFT) - -#define RUN_BUSY_OFST (0) -#define RUN_BUSY_MSK (0x00000001 << RUN_BUSY_OFST) -#define WAITING_FOR_TRIGGER_OFST (3) -#define WAITING_FOR_TRIGGER_MSK (0x00000001 << WAITING_FOR_TRIGGER_OFST) -#define DELAYBEFORE_OFST (4) //Not used in software -#define DELAYBEFORE_MSK (0x00000001 << DELAYBEFORE_OFST) //Not used in software -#define DELAYAFTER_OFST (5) //Not used in software -#define DELAYAFTER_MSK (0x00000001 << DELAYAFTER_OFST) //Not used in software -#define STOPPED_OFST (15) -#define STOPPED_MSK (0x00000001 << STOPPED_OFST) -#define RUNMACHINE_BUSY_OFST (17) -#define RUNMACHINE_BUSY_MSK (0x00000001 << RUNMACHINE_BUSY_OFST) +#define STATUS_REG (0x02 << MEM_MAP_SHIFT) +#define RUN_BUSY_OFST (0) +#define RUN_BUSY_MSK (0x00000001 << RUN_BUSY_OFST) +#define WAITING_FOR_TRIGGER_OFST (3) +#define WAITING_FOR_TRIGGER_MSK (0x00000001 << WAITING_FOR_TRIGGER_OFST) +#define DELAYBEFORE_OFST (4) // Not used in software +#define DELAYBEFORE_MSK (0x00000001 << DELAYBEFORE_OFST) // Not used in software +#define DELAYAFTER_OFST (5) // Not used in software +#define DELAYAFTER_MSK (0x00000001 << DELAYAFTER_OFST) // Not used in software +#define STOPPED_OFST (15) +#define STOPPED_MSK (0x00000001 << STOPPED_OFST) +#define RUNMACHINE_BUSY_OFST (17) +#define RUNMACHINE_BUSY_MSK (0x00000001 << RUNMACHINE_BUSY_OFST) /* Look at me register */ -#define LOOK_AT_ME_REG (0x03 << MEM_MAP_SHIFT) //Not used in firmware or software +#define LOOK_AT_ME_REG \ + (0x03 << MEM_MAP_SHIFT) // Not used in firmware or software /* System Status register */ -#define SYSTEM_STATUS_REG (0x04 << MEM_MAP_SHIFT) //Not used in software - -#define DDR3_CAL_DONE_OFST (0) //Not used in software -#define DDR3_CAL_DONE_MSK (0x00000001 << DDR3_CAL_DONE_OFST) //Not used in software -#define DDR3_CAL_FAIL_OFST (1) //Not used in software -#define DDR3_CAL_FAIL_MSK (0x00000001 << DDR3_CAL_FAIL_OFST) //Not used in software -#define DDR3_INIT_DONE_OFST (2) //Not used in software -#define DDR3_INIT_DONE_MSK (0x00000001 << DDR3_INIT_DONE_OFST) //Not used in software -#define RECONFIG_PLL_LCK_OFST (3) //Not used in software -#define RECONFIG_PLL_LCK_MSK (0x00000001 << RECONFIG_PLL_LCK_OFST) //Not used in software -#define PLL_A_LCK_OFST (4) //Not used in software -#define PLL_A_LCK_MSK (0x00000001 << PLL_A_LCK_OFST) //Not used in software -#define DD3_PLL_LCK_OFST (5) //Not used in software -#define DD3_PLL_LCK_MSK (0x00000001 << DD3_PLL_LCK_OFST) //Not used in software +#define SYSTEM_STATUS_REG (0x04 << MEM_MAP_SHIFT) // Not used in software +#define DDR3_CAL_DONE_OFST (0) // Not used in software +#define DDR3_CAL_DONE_MSK \ + (0x00000001 << DDR3_CAL_DONE_OFST) // Not used in software +#define DDR3_CAL_FAIL_OFST (1) // Not used in software +#define DDR3_CAL_FAIL_MSK \ + (0x00000001 << DDR3_CAL_FAIL_OFST) // Not used in software +#define DDR3_INIT_DONE_OFST (2) // Not used in software +#define DDR3_INIT_DONE_MSK \ + (0x00000001 << DDR3_INIT_DONE_OFST) // Not used in software +#define RECONFIG_PLL_LCK_OFST (3) // Not used in software +#define RECONFIG_PLL_LCK_MSK \ + (0x00000001 << RECONFIG_PLL_LCK_OFST) // Not used in software +#define PLL_A_LCK_OFST (4) // Not used in software +#define PLL_A_LCK_MSK (0x00000001 << PLL_A_LCK_OFST) // Not used in software +#define DD3_PLL_LCK_OFST (5) // Not used in software +#define DD3_PLL_LCK_MSK (0x00000001 << DD3_PLL_LCK_OFST) // Not used in software /* Module Control Board Serial Number Register */ -#define MOD_SERIAL_NUM_REG (0x0A << MEM_MAP_SHIFT) - -#define HARDWARE_SERIAL_NUM_OFST (0) -#define HARDWARE_SERIAL_NUM_MSK (0x000000FF << HARDWARE_SERIAL_NUM_OFST) -#define HARDWARE_VERSION_NUM_OFST (16) -#define HARDWARE_VERSION_NUM_MSK (0x0000003F << HARDWARE_VERSION_NUM_OFST) -#define HARDWARE_VERSION_2_VAL ((0x2 << HARDWARE_VERSION_NUM_OFST) & HARDWARE_VERSION_NUM_MSK) +#define MOD_SERIAL_NUM_REG (0x0A << MEM_MAP_SHIFT) +#define HARDWARE_SERIAL_NUM_OFST (0) +#define HARDWARE_SERIAL_NUM_MSK (0x000000FF << HARDWARE_SERIAL_NUM_OFST) +#define HARDWARE_VERSION_NUM_OFST (16) +#define HARDWARE_VERSION_NUM_MSK (0x0000003F << HARDWARE_VERSION_NUM_OFST) +#define HARDWARE_VERSION_2_VAL \ + ((0x2 << HARDWARE_VERSION_NUM_OFST) & HARDWARE_VERSION_NUM_MSK) /* API Version Register */ -#define API_VERSION_REG (0x0F << MEM_MAP_SHIFT) +#define API_VERSION_REG (0x0F << MEM_MAP_SHIFT) -#define API_VERSION_OFST (0) -#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST) -#define API_VERSION_DETECTOR_TYPE_OFST (24) //Not used in software -#define API_VERSION_DETECTOR_TYPE_MSK (0x000000FF << API_VERSION_DETECTOR_TYPE_OFST) //Not used in software +#define API_VERSION_OFST (0) +#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST) +#define API_VERSION_DETECTOR_TYPE_OFST (24) // Not used in software +#define API_VERSION_DETECTOR_TYPE_MSK \ + (0x000000FF << API_VERSION_DETECTOR_TYPE_OFST) // Not used in software /* Time from Start 64 bit register */ -#define TIME_FROM_START_LSB_REG (0x10 << MEM_MAP_SHIFT) -#define TIME_FROM_START_MSB_REG (0x11 << MEM_MAP_SHIFT) +#define TIME_FROM_START_LSB_REG (0x10 << MEM_MAP_SHIFT) +#define TIME_FROM_START_MSB_REG (0x11 << MEM_MAP_SHIFT) /* Get Delay 64 bit register */ -#define GET_DELAY_LSB_REG (0x12 << MEM_MAP_SHIFT) // different kind of delay -#define GET_DELAY_MSB_REG (0x13 << MEM_MAP_SHIFT) // different kind of delay +#define GET_DELAY_LSB_REG (0x12 << MEM_MAP_SHIFT) // different kind of delay +#define GET_DELAY_MSB_REG (0x13 << MEM_MAP_SHIFT) // different kind of delay /* Get Triggers 64 bit register */ -#define GET_CYCLES_LSB_REG (0x14 << MEM_MAP_SHIFT) -#define GET_CYCLES_MSB_REG (0x15 << MEM_MAP_SHIFT) +#define GET_CYCLES_LSB_REG (0x14 << MEM_MAP_SHIFT) +#define GET_CYCLES_MSB_REG (0x15 << MEM_MAP_SHIFT) /* Get Frames 64 bit register */ -#define GET_FRAMES_LSB_REG (0x16 << MEM_MAP_SHIFT) -#define GET_FRAMES_MSB_REG (0x17 << MEM_MAP_SHIFT) +#define GET_FRAMES_LSB_REG (0x16 << MEM_MAP_SHIFT) +#define GET_FRAMES_MSB_REG (0x17 << MEM_MAP_SHIFT) /* Get Period 64 bit register tT = T x 50 ns */ -#define GET_PERIOD_LSB_REG (0x18 << MEM_MAP_SHIFT) -#define GET_PERIOD_MSB_REG (0x19 << MEM_MAP_SHIFT) +#define GET_PERIOD_LSB_REG (0x18 << MEM_MAP_SHIFT) +#define GET_PERIOD_MSB_REG (0x19 << MEM_MAP_SHIFT) /** Get Temperature Carlos, incorrectl as get gates */ -#define GET_TEMPERATURE_TMP112_REG (0x1c << MEM_MAP_SHIFT) // (after multiplying by 625) in 10ths of millidegrees of TMP112 +#define GET_TEMPERATURE_TMP112_REG \ + (0x1c << MEM_MAP_SHIFT) // (after multiplying by 625) in 10ths of + // millidegrees of TMP112 -#define TEMPERATURE_VALUE_BIT (0) -#define TEMPERATURE_VALUE_MSK (0x000007FF << TEMPERATURE_VALUE_BIT) -#define TEMPERATURE_POLARITY_BIT (11) -#define TEMPERATURE_POLARITY_MSK (0x00000001 << TEMPERATURE_POLARITY_BIT) +#define TEMPERATURE_VALUE_BIT (0) +#define TEMPERATURE_VALUE_MSK (0x000007FF << TEMPERATURE_VALUE_BIT) +#define TEMPERATURE_POLARITY_BIT (11) +#define TEMPERATURE_POLARITY_MSK (0x00000001 << TEMPERATURE_POLARITY_BIT) -/* Get Frames from Start 64 bit register (frames from last reset using CONTROL_CRST) */ -#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) -#define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT) +/* Get Frames from Start 64 bit register (frames from last reset using + * CONTROL_CRST) */ +#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) +#define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT) /* Get Starting Frame Number */ -#define GET_FRAME_NUMBER_LSB_REG (0x24 << MEM_MAP_SHIFT) -#define GET_FRAME_NUMBER_MSB_REG (0x25 << MEM_MAP_SHIFT) +#define GET_FRAME_NUMBER_LSB_REG (0x24 << MEM_MAP_SHIFT) +#define GET_FRAME_NUMBER_MSB_REG (0x25 << MEM_MAP_SHIFT) /* Measurement Time 64 bit register (timestamp at a frame start until reset)*/ -#define START_FRAME_TIME_LSB_REG (0x26 << MEM_MAP_SHIFT) -#define START_FRAME_TIME_MSB_REG (0x27 << MEM_MAP_SHIFT) +#define START_FRAME_TIME_LSB_REG (0x26 << MEM_MAP_SHIFT) +#define START_FRAME_TIME_MSB_REG (0x27 << MEM_MAP_SHIFT) /* SPI (Serial Peripheral Interface) Register */ -#define SPI_REG (0x40 << MEM_MAP_SHIFT) +#define SPI_REG (0x40 << MEM_MAP_SHIFT) -#define SPI_DAC_SRL_DGTL_OTPT_OFST (0) -#define SPI_DAC_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_DAC_SRL_DGTL_OTPT_OFST) -#define SPI_DAC_SRL_CLK_OTPT_OFST (1) -#define SPI_DAC_SRL_CLK_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CLK_OTPT_OFST) -#define SPI_DAC_SRL_CS_OTPT_OFST (2) -#define SPI_DAC_SRL_CS_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CS_OTPT_OFST) -#define SPI_HV_SRL_DGTL_OTPT_OFST (8) -#define SPI_HV_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_HV_SRL_DGTL_OTPT_OFST) -#define SPI_HV_SRL_CLK_OTPT_OFST (9) -#define SPI_HV_SRL_CLK_OTPT_MSK (0x00000001 << SPI_HV_SRL_CLK_OTPT_OFST) -#define SPI_HV_SRL_CS_OTPT_OFST (10) -#define SPI_HV_SRL_CS_OTPT_MSK (0x00000001 << SPI_HV_SRL_CS_OTPT_OFST) +#define SPI_DAC_SRL_DGTL_OTPT_OFST (0) +#define SPI_DAC_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_DAC_SRL_DGTL_OTPT_OFST) +#define SPI_DAC_SRL_CLK_OTPT_OFST (1) +#define SPI_DAC_SRL_CLK_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CLK_OTPT_OFST) +#define SPI_DAC_SRL_CS_OTPT_OFST (2) +#define SPI_DAC_SRL_CS_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CS_OTPT_OFST) +#define SPI_HV_SRL_DGTL_OTPT_OFST (8) +#define SPI_HV_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_HV_SRL_DGTL_OTPT_OFST) +#define SPI_HV_SRL_CLK_OTPT_OFST (9) +#define SPI_HV_SRL_CLK_OTPT_MSK (0x00000001 << SPI_HV_SRL_CLK_OTPT_OFST) +#define SPI_HV_SRL_CS_OTPT_OFST (10) +#define SPI_HV_SRL_CS_OTPT_MSK (0x00000001 << SPI_HV_SRL_CS_OTPT_OFST) /* ADC SPI (Serial Peripheral Interface) Register */ -#define ADC_SPI_REG (0x41 << MEM_MAP_SHIFT) +#define ADC_SPI_REG (0x41 << MEM_MAP_SHIFT) -#define ADC_SPI_SRL_CLK_OTPT_OFST (0) -#define ADC_SPI_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SRL_CLK_OTPT_OFST) -#define ADC_SPI_SRL_DT_OTPT_OFST (1) -#define ADC_SPI_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SRL_DT_OTPT_OFST) -#define ADC_SPI_SRL_CS_OTPT_OFST (2) -#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SRL_CS_OTPT_OFST) +#define ADC_SPI_SRL_CLK_OTPT_OFST (0) +#define ADC_SPI_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SRL_CLK_OTPT_OFST) +#define ADC_SPI_SRL_DT_OTPT_OFST (1) +#define ADC_SPI_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SRL_DT_OTPT_OFST) +#define ADC_SPI_SRL_CS_OTPT_OFST (2) +#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SRL_CS_OTPT_OFST) /* ADC offset Register */ -#define ADC_OFST_REG (0x42 << MEM_MAP_SHIFT) +#define ADC_OFST_REG (0x42 << MEM_MAP_SHIFT) /* ADC Port Invert Register */ -#define ADC_PORT_INVERT_REG (0x43 << MEM_MAP_SHIFT) +#define ADC_PORT_INVERT_REG (0x43 << MEM_MAP_SHIFT) -#define ADC_PORT_INVERT_ADC_0_OFST (0) -#define ADC_PORT_INVERT_ADC_0_MSK (0x000000FF << ADC_PORT_INVERT_ADC_0_OFST) -#define ADC_PORT_INVERT_ADC_1_OFST (8) -#define ADC_PORT_INVERT_ADC_1_MSK (0x000000FF << ADC_PORT_INVERT_ADC_1_OFST) -#define ADC_PORT_INVERT_ADC_2_OFST (16) -#define ADC_PORT_INVERT_ADC_2_MSK (0x000000FF << ADC_PORT_INVERT_ADC_2_OFST) -#define ADC_PORT_INVERT_ADC_3_OFST (24) -#define ADC_PORT_INVERT_ADC_3_MSK (0x000000FF << ADC_PORT_INVERT_ADC_3_OFST) +#define ADC_PORT_INVERT_ADC_0_OFST (0) +#define ADC_PORT_INVERT_ADC_0_MSK (0x000000FF << ADC_PORT_INVERT_ADC_0_OFST) +#define ADC_PORT_INVERT_ADC_1_OFST (8) +#define ADC_PORT_INVERT_ADC_1_MSK (0x000000FF << ADC_PORT_INVERT_ADC_1_OFST) +#define ADC_PORT_INVERT_ADC_2_OFST (16) +#define ADC_PORT_INVERT_ADC_2_MSK (0x000000FF << ADC_PORT_INVERT_ADC_2_OFST) +#define ADC_PORT_INVERT_ADC_3_OFST (24) +#define ADC_PORT_INVERT_ADC_3_MSK (0x000000FF << ADC_PORT_INVERT_ADC_3_OFST) /* Configuration Register */ -#define CONFIG_REG (0x4D << MEM_MAP_SHIFT) +#define CONFIG_REG (0x4D << MEM_MAP_SHIFT) -// readout timer (from chip) to stabilize (esp in burst acquisition mode) tRDT = (RDT + 1) * 25ns +// readout timer (from chip) to stabilize (esp in burst acquisition mode) tRDT = +// (RDT + 1) * 25ns #define CONFIG_RDT_TMR_OFST (0) #define CONFIG_RDT_TMR_MSK (0x0000FFFF << CONFIG_RDT_TMR_OFST) #define CONFIG_OPRTN_MDE_2_X_10GbE_OFST (16) -#define CONFIG_OPRTN_MDE_2_X_10GbE_MSK (0x00000001 << CONFIG_OPRTN_MDE_2_X_10GbE_OFST) +#define CONFIG_OPRTN_MDE_2_X_10GbE_MSK \ + (0x00000001 << CONFIG_OPRTN_MDE_2_X_10GbE_OFST) // if 0, outer is the primary interface #define CONFIG_INNR_PRIMRY_INTRFCE_OFST (17) -#define CONFIG_INNR_PRIMRY_INTRFCE_MSK (0x00000001 << CONFIG_INNR_PRIMRY_INTRFCE_OFST) -#define CONFIG_READOUT_SPEED_OFST (20) -#define CONFIG_READOUT_SPEED_MSK (0x00000003 << CONFIG_READOUT_SPEED_OFST) -#define CONFIG_QUARTER_SPEED_10MHZ_VAL ((0x0 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) -#define CONFIG_HALF_SPEED_20MHZ_VAL ((0x1 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) -#define CONFIG_FULL_SPEED_40MHZ_VAL ((0x2 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) -#define CONFIG_TDMA_ENABLE_OFST (24) -#define CONFIG_TDMA_ENABLE_MSK (0x00000001 << CONFIG_TDMA_ENABLE_OFST) -#define CONFIG_TDMA_TIMESLOT_OFST (25) // 1ms -#define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST) -#define CONFIG_ETHRNT_FLW_CNTRL_OFST (31) -#define CONFIG_ETHRNT_FLW_CNTRL_MSK (0x00000001 << CONFIG_ETHRNT_FLW_CNTRL_OFST) +#define CONFIG_INNR_PRIMRY_INTRFCE_MSK \ + (0x00000001 << CONFIG_INNR_PRIMRY_INTRFCE_OFST) +#define CONFIG_READOUT_SPEED_OFST (20) +#define CONFIG_READOUT_SPEED_MSK (0x00000003 << CONFIG_READOUT_SPEED_OFST) +#define CONFIG_QUARTER_SPEED_10MHZ_VAL \ + ((0x0 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) +#define CONFIG_HALF_SPEED_20MHZ_VAL \ + ((0x1 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) +#define CONFIG_FULL_SPEED_40MHZ_VAL \ + ((0x2 << CONFIG_READOUT_SPEED_OFST) & CONFIG_READOUT_SPEED_MSK) +#define CONFIG_TDMA_ENABLE_OFST (24) +#define CONFIG_TDMA_ENABLE_MSK (0x00000001 << CONFIG_TDMA_ENABLE_OFST) +#define CONFIG_TDMA_TIMESLOT_OFST (25) // 1ms +#define CONFIG_TDMA_TIMESLOT_MSK (0x0000001F << CONFIG_TDMA_TIMESLOT_OFST) +#define CONFIG_ETHRNT_FLW_CNTRL_OFST (31) +#define CONFIG_ETHRNT_FLW_CNTRL_MSK (0x00000001 << CONFIG_ETHRNT_FLW_CNTRL_OFST) /* External Signal Register */ -#define EXT_SIGNAL_REG (0x4E << MEM_MAP_SHIFT) +#define EXT_SIGNAL_REG (0x4E << MEM_MAP_SHIFT) -#define EXT_SIGNAL_OFST (0) -#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) +#define EXT_SIGNAL_OFST (0) +#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) /* Control Register */ -#define CONTROL_REG (0x4F << MEM_MAP_SHIFT) +#define CONTROL_REG (0x4F << MEM_MAP_SHIFT) -#define CONTROL_START_ACQ_OFST (0) -#define CONTROL_START_ACQ_MSK (0x00000001 << CONTROL_START_ACQ_OFST) -#define CONTROL_STOP_ACQ_OFST (1) -#define CONTROL_STOP_ACQ_MSK (0x00000001 << CONTROL_STOP_ACQ_OFST) -#define CONTROL_CORE_RST_OFST (10) -#define CONTROL_CORE_RST_MSK (0x00000001 << CONTROL_CORE_RST_OFST) -#define CONTROL_PERIPHERAL_RST_OFST (11) //DDR3 HMem Ctrlr, GBE, Temp -#define CONTROL_PERIPHERAL_RST_MSK (0x00000001 << CONTROL_PERIPHERAL_RST_OFST) //DDR3 HMem Ctrlr, GBE, Temp -#define CONTROL_DDR3_MEM_RST_OFST (12) //only PHY, not DDR3 PLL ,Not used in software -#define CONTROL_DDR3_MEM_RST_MSK (0x00000001 << CONTROL_DDR3_MEM_RST_OFST) //only PHY, not DDR3 PLL ,Not used in software -#define CONTROL_ACQ_FIFO_CLR_OFST (14) -#define CONTROL_ACQ_FIFO_CLR_MSK (0x00000001 << CONTROL_ACQ_FIFO_CLR_OFST) -#define CONTROL_STORAGE_CELL_NUM_OFST (16) -#define CONTROL_STORAGE_CELL_NUM_MSK (0x0000000F << CONTROL_STORAGE_CELL_NUM_OFST) +#define CONTROL_START_ACQ_OFST (0) +#define CONTROL_START_ACQ_MSK (0x00000001 << CONTROL_START_ACQ_OFST) +#define CONTROL_STOP_ACQ_OFST (1) +#define CONTROL_STOP_ACQ_MSK (0x00000001 << CONTROL_STOP_ACQ_OFST) +#define CONTROL_CORE_RST_OFST (10) +#define CONTROL_CORE_RST_MSK (0x00000001 << CONTROL_CORE_RST_OFST) +#define CONTROL_PERIPHERAL_RST_OFST (11) // DDR3 HMem Ctrlr, GBE, Temp +#define CONTROL_PERIPHERAL_RST_MSK \ + (0x00000001 << CONTROL_PERIPHERAL_RST_OFST) // DDR3 HMem Ctrlr, GBE, Temp +#define CONTROL_DDR3_MEM_RST_OFST \ + (12) // only PHY, not DDR3 PLL ,Not used in software +#define CONTROL_DDR3_MEM_RST_MSK \ + (0x00000001 << CONTROL_DDR3_MEM_RST_OFST) // only PHY, not DDR3 PLL ,Not + // used in software +#define CONTROL_ACQ_FIFO_CLR_OFST (14) +#define CONTROL_ACQ_FIFO_CLR_MSK (0x00000001 << CONTROL_ACQ_FIFO_CLR_OFST) +#define CONTROL_STORAGE_CELL_NUM_OFST (16) +#define CONTROL_STORAGE_CELL_NUM_MSK \ + (0x0000000F << CONTROL_STORAGE_CELL_NUM_OFST) #define CONTROL_RX_ADDTNL_ENDPTS_NUM_OFST (20) -#define CONTROL_RX_ADDTNL_ENDPTS_NUM_MSK (0x0000003F << CONTROL_RX_ADDTNL_ENDPTS_NUM_OFST) -#define CONTROL_RX_ENDPTS_START_OFST (26) -#define CONTROL_RX_ENDPTS_START_MSK (0x0000003F << CONTROL_RX_ENDPTS_START_OFST) - - +#define CONTROL_RX_ADDTNL_ENDPTS_NUM_MSK \ + (0x0000003F << CONTROL_RX_ADDTNL_ENDPTS_NUM_OFST) +#define CONTROL_RX_ENDPTS_START_OFST (26) +#define CONTROL_RX_ENDPTS_START_MSK (0x0000003F << CONTROL_RX_ENDPTS_START_OFST) /* Reconfiguratble PLL Paramater Register */ -#define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT) +#define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT) /* Reconfiguratble PLL Control Regiser */ -#define PLL_CNTRL_REG (0x51 << MEM_MAP_SHIFT) +#define PLL_CNTRL_REG (0x51 << MEM_MAP_SHIFT) -#define PLL_CNTRL_RCNFG_PRMTR_RST_OFST (0) //parameter reset -#define PLL_CNTRL_RCNFG_PRMTR_RST_MSK (0x00000001 << PLL_CNTRL_RCNFG_PRMTR_RST_OFST) //parameter reset -#define PLL_CNTRL_WR_PRMTR_OFST (2) -#define PLL_CNTRL_WR_PRMTR_MSK (0x00000001 << PLL_CNTRL_WR_PRMTR_OFST) -#define PLL_CNTRL_PLL_RST_OFST (3) -#define PLL_CNTRL_PLL_RST_MSK (0x00000001 << PLL_CNTRL_PLL_RST_OFST) -#define PLL_CNTRL_DBIT_WR_PRMTR_OFST (5) -#define PLL_CNTRL_DBIT_WR_PRMTR_MSK (0x00000001 << PLL_CNTRL_DBIT_WR_PRMTR_OFST) -#define PLL_CNTRL_ADDR_OFST (16) -#define PLL_CNTRL_ADDR_MSK (0x0000003F << PLL_CNTRL_ADDR_OFST) +#define PLL_CNTRL_RCNFG_PRMTR_RST_OFST (0) // parameter reset +#define PLL_CNTRL_RCNFG_PRMTR_RST_MSK \ + (0x00000001 << PLL_CNTRL_RCNFG_PRMTR_RST_OFST) // parameter reset +#define PLL_CNTRL_WR_PRMTR_OFST (2) +#define PLL_CNTRL_WR_PRMTR_MSK (0x00000001 << PLL_CNTRL_WR_PRMTR_OFST) +#define PLL_CNTRL_PLL_RST_OFST (3) +#define PLL_CNTRL_PLL_RST_MSK (0x00000001 << PLL_CNTRL_PLL_RST_OFST) +#define PLL_CNTRL_DBIT_WR_PRMTR_OFST (5) +#define PLL_CNTRL_DBIT_WR_PRMTR_MSK (0x00000001 << PLL_CNTRL_DBIT_WR_PRMTR_OFST) +#define PLL_CNTRL_ADDR_OFST (16) +#define PLL_CNTRL_ADDR_MSK (0x0000003F << PLL_CNTRL_ADDR_OFST) /* Sample Register */ -#define SAMPLE_REG (0x59 << MEM_MAP_SHIFT) +#define SAMPLE_REG (0x59 << MEM_MAP_SHIFT) -#define SAMPLE_ADC_SAMPLE_SEL_OFST (0) -#define SAMPLE_ADC_SAMPLE_SEL_MSK (0x00000007 << SAMPLE_ADC_SAMPLE_SEL_OFST) -#define SAMPLE_ADC_SAMPLE_0_VAL ((0x0 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) -#define SAMPLE_ADC_SAMPLE_1_VAL ((0x1 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) -#define SAMPLE_ADC_SAMPLE_2_VAL ((0x2 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) -#define SAMPLE_ADC_SAMPLE_3_VAL ((0x3 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) -#define SAMPLE_ADC_SAMPLE_4_VAL ((0x4 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) -#define SAMPLE_ADC_SAMPLE_5_VAL ((0x5 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) -#define SAMPLE_ADC_SAMPLE_6_VAL ((0x6 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) -#define SAMPLE_ADC_SAMPLE_7_VAL ((0x7 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_SEL_OFST (0) +#define SAMPLE_ADC_SAMPLE_SEL_MSK (0x00000007 << SAMPLE_ADC_SAMPLE_SEL_OFST) +#define SAMPLE_ADC_SAMPLE_0_VAL \ + ((0x0 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_1_VAL \ + ((0x1 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_2_VAL \ + ((0x2 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_3_VAL \ + ((0x3 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_4_VAL \ + ((0x4 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_5_VAL \ + ((0x5 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_6_VAL \ + ((0x6 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) +#define SAMPLE_ADC_SAMPLE_7_VAL \ + ((0x7 << SAMPLE_ADC_SAMPLE_SEL_OFST) & SAMPLE_ADC_SAMPLE_SEL_MSK) // Decimation = ADF + 1 -#define SAMPLE_ADC_DECMT_FACTOR_OFST (4) -#define SAMPLE_ADC_DECMT_FACTOR_MSK (0x00000007 << SAMPLE_ADC_DECMT_FACTOR_OFST) -#define SAMPLE_ADC_DECMT_FACTOR_0_VAL ((0x0 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) -#define SAMPLE_ADC_DECMT_FACTOR_1_VAL ((0x1 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) -#define SAMPLE_ADC_DECMT_FACTOR_2_VAL ((0x2 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) -#define SAMPLE_ADC_DECMT_FACTOR_3_VAL ((0x3 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) -#define SAMPLE_ADC_DECMT_FACTOR_4_VAL ((0x4 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) -#define SAMPLE_ADC_DECMT_FACTOR_5_VAL ((0x5 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) -#define SAMPLE_ADC_DECMT_FACTOR_6_VAL ((0x6 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) -#define SAMPLE_ADC_DECMT_FACTOR_7_VAL ((0x7 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_OFST (4) +#define SAMPLE_ADC_DECMT_FACTOR_MSK (0x00000007 << SAMPLE_ADC_DECMT_FACTOR_OFST) +#define SAMPLE_ADC_DECMT_FACTOR_0_VAL \ + ((0x0 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_1_VAL \ + ((0x1 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_2_VAL \ + ((0x2 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_3_VAL \ + ((0x3 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_4_VAL \ + ((0x4 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_5_VAL \ + ((0x5 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_6_VAL \ + ((0x6 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) +#define SAMPLE_ADC_DECMT_FACTOR_7_VAL \ + ((0x7 << SAMPLE_ADC_DECMT_FACTOR_OFST) & SAMPLE_ADC_DECMT_FACTOR_MSK) -#define SAMPLE_DGTL_SAMPLE_SEL_OFST (8) -#define SAMPLE_DGTL_SAMPLE_SEL_MSK (0x0000000F << SAMPLE_DGTL_SAMPLE_SEL_OFST) -#define SAMPLE_DGTL_SAMPLE_0_VAL ((0x0 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_1_VAL ((0x1 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_2_VAL ((0x2 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_3_VAL ((0x3 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_4_VAL ((0x4 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_5_VAL ((0x5 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_6_VAL ((0x6 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_7_VAL ((0x7 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_8_VAL ((0x8 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_9_VAL ((0x9 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_10_VAL ((0xa << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_11_VAL ((0xb << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_12_VAL ((0xc << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_13_VAL ((0xd << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_14_VAL ((0xe << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_SAMPLE_15_VAL ((0xf << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_SEL_OFST (8) +#define SAMPLE_DGTL_SAMPLE_SEL_MSK (0x0000000F << SAMPLE_DGTL_SAMPLE_SEL_OFST) +#define SAMPLE_DGTL_SAMPLE_0_VAL \ + ((0x0 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_1_VAL \ + ((0x1 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_2_VAL \ + ((0x2 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_3_VAL \ + ((0x3 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_4_VAL \ + ((0x4 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_5_VAL \ + ((0x5 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_6_VAL \ + ((0x6 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_7_VAL \ + ((0x7 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_8_VAL \ + ((0x8 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_9_VAL \ + ((0x9 << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_10_VAL \ + ((0xa << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_11_VAL \ + ((0xb << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_12_VAL \ + ((0xc << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_13_VAL \ + ((0xd << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_14_VAL \ + ((0xe << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) +#define SAMPLE_DGTL_SAMPLE_15_VAL \ + ((0xf << SAMPLE_DGTL_SAMPLE_SEL_OFST) & SAMPLE_DGTL_SAMPLE_SEL_MSK) -#define SAMPLE_DGTL_DECMT_FACTOR_OFST (12) -#define SAMPLE_DGTL_DECMT_FACTOR_MSK (0x00000003 << SAMPLE_DGTL_DECMT_FACTOR_OFST) -#define SAMPLE_DECMT_FACTOR_FULL_VAL ((0x0 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) -#define SAMPLE_DECMT_FACTOR_HALF_VAL ((0x1 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) -#define SAMPLE_DECMT_FACTOR_QUARTER_VAL ((0x2 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) +#define SAMPLE_DGTL_DECMT_FACTOR_OFST (12) +#define SAMPLE_DGTL_DECMT_FACTOR_MSK \ + (0x00000003 << SAMPLE_DGTL_DECMT_FACTOR_OFST) +#define SAMPLE_DECMT_FACTOR_FULL_VAL \ + ((0x0 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) +#define SAMPLE_DECMT_FACTOR_HALF_VAL \ + ((0x1 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) +#define SAMPLE_DECMT_FACTOR_QUARTER_VAL \ + ((0x2 << SAMPLE_DGTL_DECMT_FACTOR_OFST) & SAMPLE_DGTL_DECMT_FACTOR_MSK) /** Vref Comp Mod Register */ -#define EXT_DAQ_CTRL_REG (0x5C << MEM_MAP_SHIFT) +#define EXT_DAQ_CTRL_REG (0x5C << MEM_MAP_SHIFT) #define EXT_DAQ_CTRL_VREF_COMP_OFST (0) #define EXT_DAQ_CTRL_VREF_COMP_MSK (0x00000FFF << EXT_DAQ_CTRL_VREF_COMP_OFST) #define EXT_DAQ_CTRL_CMP_LGC_ENBL_OFST (15) -#define EXT_DAQ_CTRL_CMP_LGC_ENBL_MSK (0x00000001 << EXT_DAQ_CTRL_CMP_LGC_ENBL_OFST) -#define EXT_DAQ_CTRL_INPT_DETECT_OFST (16) -#define EXT_DAQ_CTRL_INPT_DETECT_MSK (0x00000007 << EXT_DAQ_CTRL_INPT_DETECT_OFST) +#define EXT_DAQ_CTRL_CMP_LGC_ENBL_MSK \ + (0x00000001 << EXT_DAQ_CTRL_CMP_LGC_ENBL_OFST) +#define EXT_DAQ_CTRL_INPT_DETECT_OFST (16) +#define EXT_DAQ_CTRL_INPT_DETECT_MSK \ + (0x00000007 << EXT_DAQ_CTRL_INPT_DETECT_OFST) #define EXT_DAQ_CTRL_INPT_DETECT_ENBL_OFST (19) -#define EXT_DAQ_CTRL_INPT_DETECT_ENBL_MSK (0x00000001 << EXT_DAQ_CTRL_INPT_DETECT_ENBL_OFST) - +#define EXT_DAQ_CTRL_INPT_DETECT_ENBL_MSK \ + (0x00000001 << EXT_DAQ_CTRL_INPT_DETECT_ENBL_OFST) /** DAQ Register */ -#define DAQ_REG (0x5D << MEM_MAP_SHIFT) +#define DAQ_REG (0x5D << MEM_MAP_SHIFT) -#define DAQ_SETTINGS_MSK (DAQ_HIGH_GAIN_MSK | DAQ_FIX_GAIN_MSK | DAQ_FRCE_SWTCH_GAIN_MSK) -#define DAQ_HIGH_GAIN_OFST (0) -#define DAQ_HIGH_GAIN_MSK (0x00000001 << DAQ_HIGH_GAIN_OFST) -#define DAQ_FIX_GAIN_DYNMC_VAL ((0x0 << DAQ_HIGH_GAIN_OFST) & DAQ_HIGH_GAIN_MSK) -#define DAQ_FIX_GAIN_HIGHGAIN_VAL ((0x1 << DAQ_HIGH_GAIN_OFST) & DAQ_HIGH_GAIN_MSK) -#define DAQ_FIX_GAIN_OFST (1) -#define DAQ_FIX_GAIN_MSK (0x00000003 << DAQ_FIX_GAIN_OFST) -#define DAQ_FIX_GAIN_STG_1_VAL ((0x1 << DAQ_FIX_GAIN_OFST) & DAQ_FIX_GAIN_MSK) -#define DAQ_FIX_GAIN_STG_2_VAL ((0x3 << DAQ_FIX_GAIN_OFST) & DAQ_FIX_GAIN_MSK) -#define DAQ_CMP_RST_OFST (4) -#define DAQ_CMP_RST_MSK (0x00000001 << DAQ_CMP_RST_OFST) -#define DAQ_STRG_CELL_SLCT_OFST (8) -#define DAQ_STRG_CELL_SLCT_MSK (0x0000000F << DAQ_STRG_CELL_SLCT_OFST) -#define DAQ_FRCE_SWTCH_GAIN_OFST (12) -#define DAQ_FRCE_SWTCH_GAIN_MSK (0x00000003 << DAQ_FRCE_SWTCH_GAIN_OFST) -#define DAQ_FRCE_GAIN_STG_1_VAL ((0x1 << DAQ_FRCE_SWTCH_GAIN_OFST) & DAQ_FRCE_SWTCH_GAIN_MSK) -#define DAQ_FRCE_GAIN_STG_2_VAL ((0x3 << DAQ_FRCE_SWTCH_GAIN_OFST) & DAQ_FRCE_SWTCH_GAIN_MSK) -#define DAQ_ELCTRN_CLLCTN_MDE_OFST (14) -#define DAQ_ELCTRN_CLLCTN_MDE_MSK (0x00000001 << DAQ_ELCTRN_CLLCTN_MDE_OFST) -#define DAQ_G2_CNNT_OFST (15) -#define DAQ_G2_CNNT_MSK (0x00000001 << DAQ_G2_CNNT_OFST) -#define DAQ_CRRNT_SRC_ENBL_OFST (16) -#define DAQ_CRRNT_SRC_ENBL_MSK (0x00000001 << DAQ_CRRNT_SRC_ENBL_OFST) -#define DAQ_CRRNT_SRC_CLMN_FIX_OFST (17) -#define DAQ_CRRNT_SRC_CLMN_FIX_MSK (0x00000001 << DAQ_CRRNT_SRC_CLMN_FIX_OFST) -#define DAQ_CRRNT_SRC_CLMN_SLCT_OFST (20) -#define DAQ_CRRNT_SRC_CLMN_SLCT_MSK (0x0000003F << DAQ_CRRNT_SRC_CLMN_SLCT_OFST) +#define DAQ_SETTINGS_MSK \ + (DAQ_HIGH_GAIN_MSK | DAQ_FIX_GAIN_MSK | DAQ_FRCE_SWTCH_GAIN_MSK) +#define DAQ_HIGH_GAIN_OFST (0) +#define DAQ_HIGH_GAIN_MSK (0x00000001 << DAQ_HIGH_GAIN_OFST) +#define DAQ_FIX_GAIN_DYNMC_VAL ((0x0 << DAQ_HIGH_GAIN_OFST) & DAQ_HIGH_GAIN_MSK) +#define DAQ_FIX_GAIN_HIGHGAIN_VAL \ + ((0x1 << DAQ_HIGH_GAIN_OFST) & DAQ_HIGH_GAIN_MSK) +#define DAQ_FIX_GAIN_OFST (1) +#define DAQ_FIX_GAIN_MSK (0x00000003 << DAQ_FIX_GAIN_OFST) +#define DAQ_FIX_GAIN_STG_1_VAL ((0x1 << DAQ_FIX_GAIN_OFST) & DAQ_FIX_GAIN_MSK) +#define DAQ_FIX_GAIN_STG_2_VAL ((0x3 << DAQ_FIX_GAIN_OFST) & DAQ_FIX_GAIN_MSK) +#define DAQ_CMP_RST_OFST (4) +#define DAQ_CMP_RST_MSK (0x00000001 << DAQ_CMP_RST_OFST) +#define DAQ_STRG_CELL_SLCT_OFST (8) +#define DAQ_STRG_CELL_SLCT_MSK (0x0000000F << DAQ_STRG_CELL_SLCT_OFST) +#define DAQ_FRCE_SWTCH_GAIN_OFST (12) +#define DAQ_FRCE_SWTCH_GAIN_MSK (0x00000003 << DAQ_FRCE_SWTCH_GAIN_OFST) +#define DAQ_FRCE_GAIN_STG_1_VAL \ + ((0x1 << DAQ_FRCE_SWTCH_GAIN_OFST) & DAQ_FRCE_SWTCH_GAIN_MSK) +#define DAQ_FRCE_GAIN_STG_2_VAL \ + ((0x3 << DAQ_FRCE_SWTCH_GAIN_OFST) & DAQ_FRCE_SWTCH_GAIN_MSK) +#define DAQ_ELCTRN_CLLCTN_MDE_OFST (14) +#define DAQ_ELCTRN_CLLCTN_MDE_MSK (0x00000001 << DAQ_ELCTRN_CLLCTN_MDE_OFST) +#define DAQ_G2_CNNT_OFST (15) +#define DAQ_G2_CNNT_MSK (0x00000001 << DAQ_G2_CNNT_OFST) +#define DAQ_CRRNT_SRC_ENBL_OFST (16) +#define DAQ_CRRNT_SRC_ENBL_MSK (0x00000001 << DAQ_CRRNT_SRC_ENBL_OFST) +#define DAQ_CRRNT_SRC_CLMN_FIX_OFST (17) +#define DAQ_CRRNT_SRC_CLMN_FIX_MSK (0x00000001 << DAQ_CRRNT_SRC_CLMN_FIX_OFST) +#define DAQ_CRRNT_SRC_CLMN_SLCT_OFST (20) +#define DAQ_CRRNT_SRC_CLMN_SLCT_MSK (0x0000003F << DAQ_CRRNT_SRC_CLMN_SLCT_OFST) /** Chip Power Register */ -#define CHIP_POWER_REG (0x5E << MEM_MAP_SHIFT) - -#define CHIP_POWER_ENABLE_OFST (0) -#define CHIP_POWER_ENABLE_MSK (0x00000001 << CHIP_POWER_ENABLE_OFST) -#define CHIP_POWER_STATUS_OFST (1) -#define CHIP_POWER_STATUS_MSK (0x00000001 << CHIP_POWER_STATUS_OFST) +#define CHIP_POWER_REG (0x5E << MEM_MAP_SHIFT) +#define CHIP_POWER_ENABLE_OFST (0) +#define CHIP_POWER_ENABLE_MSK (0x00000001 << CHIP_POWER_ENABLE_OFST) +#define CHIP_POWER_STATUS_OFST (1) +#define CHIP_POWER_STATUS_MSK (0x00000001 << CHIP_POWER_STATUS_OFST) /** Temperature Control Register */ -#define TEMP_CTRL_REG (0x5F << MEM_MAP_SHIFT) +#define TEMP_CTRL_REG (0x5F << MEM_MAP_SHIFT) -#define TEMP_CTRL_PROTCT_THRSHLD_OFST (0) -#define TEMP_CTRL_PROTCT_THRSHLD_MSK (0x000007FF << TEMP_CTRL_PROTCT_THRSHLD_OFST) -#define TEMP_CTRL_PROTCT_ENABLE_OFST (16) -#define TEMP_CTRL_PROTCT_ENABLE_MSK (0x00000001 << TEMP_CTRL_PROTCT_ENABLE_OFST) +#define TEMP_CTRL_PROTCT_THRSHLD_OFST (0) +#define TEMP_CTRL_PROTCT_THRSHLD_MSK \ + (0x000007FF << TEMP_CTRL_PROTCT_THRSHLD_OFST) +#define TEMP_CTRL_PROTCT_ENABLE_OFST (16) +#define TEMP_CTRL_PROTCT_ENABLE_MSK (0x00000001 << TEMP_CTRL_PROTCT_ENABLE_OFST) // set when temp higher than over threshold, write 1 to clear it -#define TEMP_CTRL_OVR_TMP_EVNT_OFST (31) -#define TEMP_CTRL_OVR_TMP_EVNT_MSK (0x00000001 << TEMP_CTRL_OVR_TMP_EVNT_OFST) - +#define TEMP_CTRL_OVR_TMP_EVNT_OFST (31) +#define TEMP_CTRL_OVR_TMP_EVNT_MSK (0x00000001 << TEMP_CTRL_OVR_TMP_EVNT_OFST) /* Set Delay 64 bit register */ -#define SET_DELAY_LSB_REG (0x60 << MEM_MAP_SHIFT) // different kind of delay -#define SET_DELAY_MSB_REG (0x61 << MEM_MAP_SHIFT) // different kind of delay +#define SET_DELAY_LSB_REG (0x60 << MEM_MAP_SHIFT) // different kind of delay +#define SET_DELAY_MSB_REG (0x61 << MEM_MAP_SHIFT) // different kind of delay /* Set Triggers 64 bit register */ -#define SET_CYCLES_LSB_REG (0x62 << MEM_MAP_SHIFT) -#define SET_CYCLES_MSB_REG (0x63 << MEM_MAP_SHIFT) +#define SET_CYCLES_LSB_REG (0x62 << MEM_MAP_SHIFT) +#define SET_CYCLES_MSB_REG (0x63 << MEM_MAP_SHIFT) /* Set Frames 64 bit register */ -#define SET_FRAMES_LSB_REG (0x64 << MEM_MAP_SHIFT) -#define SET_FRAMES_MSB_REG (0x65 << MEM_MAP_SHIFT) +#define SET_FRAMES_LSB_REG (0x64 << MEM_MAP_SHIFT) +#define SET_FRAMES_MSB_REG (0x65 << MEM_MAP_SHIFT) /* Set Period 64 bit register tT = T x 50 ns */ -#define SET_PERIOD_LSB_REG (0x66 << MEM_MAP_SHIFT) -#define SET_PERIOD_MSB_REG (0x67 << MEM_MAP_SHIFT) +#define SET_PERIOD_LSB_REG (0x66 << MEM_MAP_SHIFT) +#define SET_PERIOD_MSB_REG (0x67 << MEM_MAP_SHIFT) /* Set Exptime 64 bit register eEXP = Exp x 25 ns */ -#define SET_EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) -#define SET_EXPTIME_MSB_REG (0x69 << MEM_MAP_SHIFT) +#define SET_EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) +#define SET_EXPTIME_MSB_REG (0x69 << MEM_MAP_SHIFT) /* Starting Frame number 64 bit register */ -#define FRAME_NUMBER_LSB_REG (0x6A << MEM_MAP_SHIFT) -#define FRAME_NUMBER_MSB_REG (0x6B << MEM_MAP_SHIFT) +#define FRAME_NUMBER_LSB_REG (0x6A << MEM_MAP_SHIFT) +#define FRAME_NUMBER_MSB_REG (0x6B << MEM_MAP_SHIFT) /* Trigger Delay 32 bit register */ -#define SET_TRIGGER_DELAY_LSB_REG (0x70 << MEM_MAP_SHIFT) -#define SET_TRIGGER_DELAY_MSB_REG (0x71 << MEM_MAP_SHIFT) +#define SET_TRIGGER_DELAY_LSB_REG (0x70 << MEM_MAP_SHIFT) +#define SET_TRIGGER_DELAY_MSB_REG (0x71 << MEM_MAP_SHIFT) /** Module row coordinates */ -#define COORD_ROW_REG (0x7C << MEM_MAP_SHIFT) +#define COORD_ROW_REG (0x7C << MEM_MAP_SHIFT) -#define COORD_ROW_OUTER_OFST (0) -#define COORD_ROW_OUTER_MSK (0x0000FFFF << COORD_ROW_OUTER_OFST) -#define COORD_ROW_INNER_OFST (16) -#define COORD_ROW_INNER_MSK (0x0000FFFF << COORD_ROW_INNER_OFST) +#define COORD_ROW_OUTER_OFST (0) +#define COORD_ROW_OUTER_MSK (0x0000FFFF << COORD_ROW_OUTER_OFST) +#define COORD_ROW_INNER_OFST (16) +#define COORD_ROW_INNER_MSK (0x0000FFFF << COORD_ROW_INNER_OFST) /** Module column coordinates */ -#define COORD_COL_REG (0x7D << MEM_MAP_SHIFT) - -#define COORD_COL_OUTER_OFST (0) -#define COORD_COL_OUTER_MSK (0x0000FFFF << COORD_COL_OUTER_OFST) -#define COORD_COL_INNER_OFST (16) -#define COORD_COL_INNER_MSK (0x0000FFFF << COORD_COL_INNER_OFST) +#define COORD_COL_REG (0x7D << MEM_MAP_SHIFT) +#define COORD_COL_OUTER_OFST (0) +#define COORD_COL_OUTER_MSK (0x0000FFFF << COORD_COL_OUTER_OFST) +#define COORD_COL_INNER_OFST (16) +#define COORD_COL_INNER_MSK (0x0000FFFF << COORD_COL_INNER_OFST) /** Module column coordinates */ -#define COORD_RESERVED_REG (0x7E << MEM_MAP_SHIFT) +#define COORD_RESERVED_REG (0x7E << MEM_MAP_SHIFT) -#define COORD_RESERVED_OUTER_OFST (0) -#define COORD_RESERVED_OUTER_MSK (0x0000FFFF << COORD_RESERVED_OUTER_OFST) -#define COORD_RESERVED_INNER_OFST (16) -#define COORD_RESERVED_INNER_MSK (0x0000FFFF << COORD_RESERVED_INNER_OFST) +#define COORD_RESERVED_OUTER_OFST (0) +#define COORD_RESERVED_OUTER_MSK (0x0000FFFF << COORD_RESERVED_OUTER_OFST) +#define COORD_RESERVED_INNER_OFST (16) +#define COORD_RESERVED_INNER_MSK (0x0000FFFF << COORD_RESERVED_INNER_OFST) /* ASIC Control Register */ -#define ASIC_CTRL_REG (0x7F << MEM_MAP_SHIFT) +#define ASIC_CTRL_REG (0x7F << MEM_MAP_SHIFT) // tPC = (PCT + 1) * 25ns -#define ASIC_CTRL_PRCHRG_TMR_OFST (0) -#define ASIC_CTRL_PRCHRG_TMR_MSK (0x000000FF << ASIC_CTRL_PRCHRG_TMR_OFST) -#define ASIC_CTRL_PRCHRG_TMR_VAL ((0x1F << ASIC_CTRL_PRCHRG_TMR_OFST) & ASIC_CTRL_PRCHRG_TMR_MSK) +#define ASIC_CTRL_PRCHRG_TMR_OFST (0) +#define ASIC_CTRL_PRCHRG_TMR_MSK (0x000000FF << ASIC_CTRL_PRCHRG_TMR_OFST) +#define ASIC_CTRL_PRCHRG_TMR_VAL \ + ((0x1F << ASIC_CTRL_PRCHRG_TMR_OFST) & ASIC_CTRL_PRCHRG_TMR_MSK) // tDS = (DST + 1) * 25ns -#define ASIC_CTRL_DS_TMR_OFST (8) -#define ASIC_CTRL_DS_TMR_MSK (0x000000FF << ASIC_CTRL_DS_TMR_OFST) -#define ASIC_CTRL_DS_TMR_VAL ((0x1F << ASIC_CTRL_DS_TMR_OFST) & ASIC_CTRL_DS_TMR_MSK) -// tET = (ET + 1) * 25ns (increase timeout range between 2 consecutive storage cells) -#define ASIC_CTRL_EXPSRE_TMR_OFST (16) -#define ASIC_CTRL_EXPSRE_TMR_MSK (0x0000FFFF << ASIC_CTRL_EXPSRE_TMR_OFST) -#define ASIC_CTRL_EXPSRE_TMR_MAX_VAL (0x0000FFFF / (CLK_RUN * 1E-3)) - +#define ASIC_CTRL_DS_TMR_OFST (8) +#define ASIC_CTRL_DS_TMR_MSK (0x000000FF << ASIC_CTRL_DS_TMR_OFST) +#define ASIC_CTRL_DS_TMR_VAL \ + ((0x1F << ASIC_CTRL_DS_TMR_OFST) & ASIC_CTRL_DS_TMR_MSK) +// tET = (ET + 1) * 25ns (increase timeout range between 2 consecutive storage +// cells) +#define ASIC_CTRL_EXPSRE_TMR_OFST (16) +#define ASIC_CTRL_EXPSRE_TMR_MSK (0x0000FFFF << ASIC_CTRL_EXPSRE_TMR_OFST) +#define ASIC_CTRL_EXPSRE_TMR_MAX_VAL (0x0000FFFF / (CLK_RUN * 1E-3)) /* ADC 0 Deserializer Control */ -#define ADC_DSRLZR_0_REG (0xF0 << MEM_MAP_SHIFT) -#define ADC_DSRLZR_0_RFRSH_ALGNMNT_OFST (31) /* Refresh alignment */ -#define ADC_DSRLZR_0_RFRSH_ALGNMNT_MSK (0x00000001 << ADC_DSRLZR_0_RFRSH_ALGNMNT_OFST) +#define ADC_DSRLZR_0_REG (0xF0 << MEM_MAP_SHIFT) +#define ADC_DSRLZR_0_RFRSH_ALGNMNT_OFST (31) /* Refresh alignment */ +#define ADC_DSRLZR_0_RFRSH_ALGNMNT_MSK \ + (0x00000001 << ADC_DSRLZR_0_RFRSH_ALGNMNT_OFST) /* ADC 0 Deserializer Control */ -#define ADC_DSRLZR_1_REG (0xF1 << MEM_MAP_SHIFT) +#define ADC_DSRLZR_1_REG (0xF1 << MEM_MAP_SHIFT) #define ADC_DSRLZR_1_RFRSH_ALGNMNT_OFST (31) -#define ADC_DSRLZR_1_RFRSH_ALGNMNT_MSK (0x00000001 << ADC_DSRLZR_1_RFRSH_ALGNMNT_OFST) +#define ADC_DSRLZR_1_RFRSH_ALGNMNT_MSK \ + (0x00000001 << ADC_DSRLZR_1_RFRSH_ALGNMNT_OFST) /* ADC 0 Deserializer Control */ -#define ADC_DSRLZR_2_REG (0xF2 << MEM_MAP_SHIFT) +#define ADC_DSRLZR_2_REG (0xF2 << MEM_MAP_SHIFT) #define ADC_DSRLZR_2_RFRSH_ALGNMNT_OFST (31) -#define ADC_DSRLZR_2_RFRSH_ALGNMNT_MSK (0x00000001 << ADC_DSRLZR_2_RFRSH_ALGNMNT_OFST) +#define ADC_DSRLZR_2_RFRSH_ALGNMNT_MSK \ + (0x00000001 << ADC_DSRLZR_2_RFRSH_ALGNMNT_OFST) /* ADC 0 Deserializer Control */ -#define ADC_DSRLZR_3_REG (0xF3 << MEM_MAP_SHIFT) +#define ADC_DSRLZR_3_REG (0xF3 << MEM_MAP_SHIFT) #define ADC_DSRLZR_3_RFRSH_ALGNMNT_OFST (31) -#define ADC_DSRLZR_3_RFRSH_ALGNMNT_MSK (0x00000001 << ADC_DSRLZR_3_RFRSH_ALGNMNT_OFST) - - - +#define ADC_DSRLZR_3_RFRSH_ALGNMNT_MSK \ + (0x00000001 << ADC_DSRLZR_3_RFRSH_ALGNMNT_OFST) /* Round Robin */ -#define RXR_ENDPOINTS_MAX (64) -#define RXR_ENDPOINT_OUTER_START_REG (0x1000 << MEM_MAP_SHIFT) -#define RXR_ENDPOINT_INNER_START_REG (0x2000 << MEM_MAP_SHIFT) - -#define RXR_ENDPOINT_OFST (0x10 << MEM_MAP_SHIFT) - - - - +#define RXR_ENDPOINTS_MAX (64) +#define RXR_ENDPOINT_OUTER_START_REG (0x1000 << MEM_MAP_SHIFT) +#define RXR_ENDPOINT_INNER_START_REG (0x2000 << MEM_MAP_SHIFT) +#define RXR_ENDPOINT_OFST (0x10 << MEM_MAP_SHIFT) diff --git a/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h old mode 100755 new mode 100644 index d61dd013e..7de12a3f9 --- a/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h @@ -1,128 +1,144 @@ #pragma once -#include "sls_detector_defs.h" #include "RegisterDefs.h" +#include "sls_detector_defs.h" +#define MIN_REQRD_VRSN_T_RD_API 0x171220 +#define REQRD_FRMWRE_VRSN_BOARD2 0x190716 // old +#define REQRD_FRMWRE_VRSN 0x200305 // new -#define MIN_REQRD_VRSN_T_RD_API 0x171220 -#define REQRD_FRMWRE_VRSN_BOARD2 0x190716 // old -#define REQRD_FRMWRE_VRSN 0x200305 // new - -#define CTRL_SRVR_INIT_TIME_US (300 * 1000) +#define CTRL_SRVR_INIT_TIME_US (300 * 1000) /* Struct Definitions */ typedef struct udp_header_struct { - uint32_t udp_destmac_msb; - uint16_t udp_srcmac_msb; - uint16_t udp_destmac_lsb; - uint32_t udp_srcmac_lsb; - uint8_t ip_tos; - uint8_t ip_ihl: 4, ip_ver: 4; - uint16_t udp_ethertype; - uint16_t ip_identification; - uint16_t ip_totallength; - uint8_t ip_protocol; - uint8_t ip_ttl; - uint16_t ip_fragmentoffset: 13, ip_flags: 3; - uint16_t ip_srcip_msb; - uint16_t ip_checksum; - uint16_t ip_destip_msb; - uint16_t ip_srcip_lsb; - uint16_t udp_srcport; - uint16_t ip_destip_lsb; - uint16_t udp_checksum; - uint16_t udp_destport; + uint32_t udp_destmac_msb; + uint16_t udp_srcmac_msb; + uint16_t udp_destmac_lsb; + uint32_t udp_srcmac_lsb; + uint8_t ip_tos; + uint8_t ip_ihl : 4, ip_ver : 4; + uint16_t udp_ethertype; + uint16_t ip_identification; + uint16_t ip_totallength; + uint8_t ip_protocol; + uint8_t ip_ttl; + uint16_t ip_fragmentoffset : 13, ip_flags : 3; + uint16_t ip_srcip_msb; + uint16_t ip_checksum; + uint16_t ip_destip_msb; + uint16_t ip_srcip_lsb; + uint16_t udp_srcport; + uint16_t ip_destip_lsb; + uint16_t udp_checksum; + uint16_t udp_destport; } udp_header; -#define IP_HEADER_SIZE (20) -#define UDP_IP_HEADER_LENGTH_BYTES (28) - +#define IP_HEADER_SIZE (20) +#define UDP_IP_HEADER_LENGTH_BYTES (28) /* Enums */ -enum ADCINDEX {TEMP_FPGA, TEMP_ADC}; -enum DACINDEX {J_VB_COMP, J_VDD_PROT, J_VIN_COM, J_VREF_PRECH, J_VB_PIXBUF, J_VB_DS, J_VREF_DS, J_VREF_COMP }; -#define DEFAULT_DAC_VALS { 1220, /* J_VB_COMP */ \ - 3000, /* J_VDD_PROT */ \ - 1053, /* J_VIN_COM */ \ - 1450, /* J_VREF_PRECH */ \ - 750, /* J_VB_PIXBUF */ \ - 1000, /* J_VB_DS */ \ - 480, /* J_VREF_DS */ \ - 420 /* J_VREF_COMP */ \ - }; -enum NETWORKINDEX { TXN_FRAME, FLOWCTRL_10G }; -enum CLKINDEX {RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS}; -#define CLK_NAMES "run", "adc", "dbit" +enum ADCINDEX { TEMP_FPGA, TEMP_ADC }; +enum DACINDEX { + J_VB_COMP, + J_VDD_PROT, + J_VIN_COM, + J_VREF_PRECH, + J_VB_PIXBUF, + J_VB_DS, + J_VREF_DS, + J_VREF_COMP +}; +#define DEFAULT_DAC_VALS \ + { \ + 1220, /* J_VB_COMP */ \ + 3000, /* J_VDD_PROT */ \ + 1053, /* J_VIN_COM */ \ + 1450, /* J_VREF_PRECH */ \ + 750, /* J_VB_PIXBUF */ \ + 1000, /* J_VB_DS */ \ + 480, /* J_VREF_DS */ \ + 420 /* J_VREF_COMP */ \ + }; +enum NETWORKINDEX { TXN_FRAME, FLOWCTRL_10G }; +enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS }; +#define CLK_NAMES "run", "adc", "dbit" /* Hardware Definitions */ -#define NCHAN (256 * 256) -#define NCHIP (8) -#define NDAC (8) -#define NDAC_OLDBOARD (16) -#define DYNAMIC_RANGE (16) -#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8) -#define DATA_BYTES (NCHIP * NCHAN * NUM_BYTES_PER_PIXEL) -#define CLK_RUN (40) /* MHz */ -#define CLK_SYNC (20) /* MHz */ -#define ADC_CLK_INDEX (1) -#define DBIT_CLK_INDEX (0) +#define NCHAN (256 * 256) +#define NCHIP (8) +#define NDAC (8) +#define NDAC_OLDBOARD (16) +#define DYNAMIC_RANGE (16) +#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8) +#define DATA_BYTES (NCHIP * NCHAN * NUM_BYTES_PER_PIXEL) +#define CLK_RUN (40) /* MHz */ +#define CLK_SYNC (20) /* MHz */ +#define ADC_CLK_INDEX (1) +#define DBIT_CLK_INDEX (0) /** Default Parameters */ -#define DEFAULT_NUM_FRAMES (100*1000*1000) +#define DEFAULT_NUM_FRAMES (100 * 1000 * 1000) #define DEFAULT_STARTING_FRAME_NUMBER (1) -#define DEFAULT_NUM_CYCLES (1) -#define DEFAULT_EXPTIME (10*1000) //ns -#define DEFAULT_PERIOD (2*1000*1000) //ns -#define DEFAULT_DELAY (0) -#define DEFAULT_HIGH_VOLTAGE (0) -#define DEFAULT_TIMING_MODE (AUTO_TIMING) -#define DEFAULT_SETTINGS (DYNAMICGAIN) -#define DEFAULT_TX_UDP_PORT (0x7e9a) -#define DEFAULT_TMP_THRSHLD (65*1000) //milli degree Celsius -#define DEFAULT_NUM_STRG_CLLS (0) -#define DEFAULT_STRG_CLL_STRT (0xf) -#define DEFAULT_STRG_CLL_DLY (0) +#define DEFAULT_NUM_CYCLES (1) +#define DEFAULT_EXPTIME (10 * 1000) // ns +#define DEFAULT_PERIOD (2 * 1000 * 1000) // ns +#define DEFAULT_DELAY (0) +#define DEFAULT_HIGH_VOLTAGE (0) +#define DEFAULT_TIMING_MODE (AUTO_TIMING) +#define DEFAULT_SETTINGS (DYNAMICGAIN) +#define DEFAULT_TX_UDP_PORT (0x7e9a) +#define DEFAULT_TMP_THRSHLD (65 * 1000) // milli degree Celsius +#define DEFAULT_NUM_STRG_CLLS (0) +#define DEFAULT_STRG_CLL_STRT (0xf) +#define DEFAULT_STRG_CLL_DLY (0) -#define HIGHVOLTAGE_MIN (60) -#define HIGHVOLTAGE_MAX (200) -#define DAC_MIN_MV (0) -#define DAC_MAX_MV (2500) +#define HIGHVOLTAGE_MIN (60) +#define HIGHVOLTAGE_MAX (200) +#define DAC_MIN_MV (0) +#define DAC_MAX_MV (2500) /* Defines in the Firmware */ #define MAX_TIMESLOT_VAL (0x1F) -#define MAX_THRESHOLD_TEMP_VAL (127999) //millidegrees -#define MAX_STORAGE_CELL_VAL (15) //0xF -#define MAX_STORAGE_CELL_DLY_NS_VAL (ASIC_CTRL_EXPSRE_TMR_MAX_VAL) +#define MAX_THRESHOLD_TEMP_VAL (127999) // millidegrees +#define MAX_STORAGE_CELL_VAL (15) // 0xF +#define MAX_STORAGE_CELL_DLY_NS_VAL (ASIC_CTRL_EXPSRE_TMR_MAX_VAL) #define ACQ_TIME_MIN_CLOCK (2) -#define MAX_PHASE_SHIFTS (160) -#define BIT16_MASK (0xFFFF) +#define MAX_PHASE_SHIFTS (160) +#define BIT16_MASK (0xFFFF) +#define ADC_OFST_FULL_SPEED_VAL (0xf) +#define ADC_OFST_HALF_SPEED_VAL (0xb) +#define ADC_OFST_QUARTER_SPEED_VAL (0x7) +#define ADC_OFST_HALF_SPEED_BOARD2_VAL (0x13) +#define ADC_OFST_QUARTER_SPEED_BOARD2_VAL (0x0b) +#define ADC_PORT_INVERT_VAL (0x5A5A5A5A) +#define ADC_PORT_INVERT_BOARD2_VAL (0x453b2a9c) -#define ADC_OFST_FULL_SPEED_VAL (0xf) -#define ADC_OFST_HALF_SPEED_VAL (0xb) -#define ADC_OFST_QUARTER_SPEED_VAL (0x7) -#define ADC_OFST_HALF_SPEED_BOARD2_VAL (0x13) -#define ADC_OFST_QUARTER_SPEED_BOARD2_VAL (0x0b) +#define SAMPLE_ADC_FULL_SPEED \ + (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + \ + SAMPLE_DGTL_SAMPLE_2_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x200 +#define SAMPLE_ADC_HALF_SPEED \ + (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + \ + SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1310 +#define SAMPLE_ADC_QUARTER_SPEED \ + (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_3_VAL + \ + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2630 +#define SAMPLE_ADC_HALF_SPEED_BOARD2 \ + (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + \ + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1600 +#define SAMPLE_ADC_QUARTER_SPEED_BOARD2 \ + (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + \ + SAMPLE_DGTL_SAMPLE_11_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2b10 -#define ADC_PORT_INVERT_VAL (0x5A5A5A5A) -#define ADC_PORT_INVERT_BOARD2_VAL (0x453b2a9c) +#define ADC_PHASE_FULL_SPEED (28) +#define ADC_PHASE_HALF_SPEED (35) +#define ADC_PHASE_QUARTER_SPEED (35) +#define ADC_PHASE_HALF_SPEED_BOARD2 (0x1E) // 30 +#define ADC_PHASE_QUARTER_SPEED_BOARD2 (0x1E) // 30 -#define SAMPLE_ADC_FULL_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_DGTL_SAMPLE_2_VAL + SAMPLE_DECMT_FACTOR_FULL_VAL) // 0x200 -#define SAMPLE_ADC_HALF_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_DGTL_SAMPLE_3_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1310 -#define SAMPLE_ADC_QUARTER_SPEED (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_3_VAL + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2630 -#define SAMPLE_ADC_HALF_SPEED_BOARD2 (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_0_VAL + SAMPLE_DGTL_SAMPLE_6_VAL + SAMPLE_DECMT_FACTOR_HALF_VAL) // 0x1600 -#define SAMPLE_ADC_QUARTER_SPEED_BOARD2 (SAMPLE_ADC_SAMPLE_0_VAL + SAMPLE_ADC_DECMT_FACTOR_1_VAL + SAMPLE_DGTL_SAMPLE_11_VAL + SAMPLE_DECMT_FACTOR_QUARTER_VAL) // 0x2b10 - -#define ADC_PHASE_FULL_SPEED (28) -#define ADC_PHASE_HALF_SPEED (35) -#define ADC_PHASE_QUARTER_SPEED (35) -#define ADC_PHASE_HALF_SPEED_BOARD2 (0x1E) //30 -#define ADC_PHASE_QUARTER_SPEED_BOARD2 (0x1E) //30 - - -#define DBIT_PHASE_FULL_SPEED (37) -#define DBIT_PHASE_HALF_SPEED (37) -#define DBIT_PHASE_QUARTER_SPEED (37) -#define DBIT_PHASE_HALF_SPEED_BOARD2 (37) -#define DBIT_PHASE_QUARTER_SPEED_BOARD2 (37) +#define DBIT_PHASE_FULL_SPEED (37) +#define DBIT_PHASE_HALF_SPEED (37) +#define DBIT_PHASE_QUARTER_SPEED (37) +#define DBIT_PHASE_HALF_SPEED_BOARD2 (37) +#define DBIT_PHASE_QUARTER_SPEED_BOARD2 (37) diff --git a/slsDetectorServers/moenchDetectorServer/RegisterDefs.h b/slsDetectorServers/moenchDetectorServer/RegisterDefs.h old mode 100755 new mode 100644 index ca8263056..8dc4ea18a --- a/slsDetectorServers/moenchDetectorServer/RegisterDefs.h +++ b/slsDetectorServers/moenchDetectorServer/RegisterDefs.h @@ -3,542 +3,570 @@ /* Definitions for FPGA */ #define MEM_MAP_SHIFT 1 - /* FPGA Version RO register */ -#define FPGA_VERSION_REG (0x00 << MEM_MAP_SHIFT) +#define FPGA_VERSION_REG (0x00 << MEM_MAP_SHIFT) -#define FPGA_VERSION_BRD_RVSN_OFST (0) -#define FPGA_VERSION_BRD_RVSN_MSK (0x00FFFFFF << FPGA_VERSION_BRD_RVSN_OFST) -#define FPGA_VERSION_DTCTR_TYP_OFST (24) -#define FPGA_VERSION_DTCTR_TYP_MSK (0x000000FF << FPGA_VERSION_DTCTR_TYP_OFST) -#define FPGA_VERSION_DTCTR_TYP_MOENCH_VAL ((0x5 << FPGA_VERSION_DTCTR_TYP_OFST) & FPGA_VERSION_DTCTR_TYP_MSK) +#define FPGA_VERSION_BRD_RVSN_OFST (0) +#define FPGA_VERSION_BRD_RVSN_MSK (0x00FFFFFF << FPGA_VERSION_BRD_RVSN_OFST) +#define FPGA_VERSION_DTCTR_TYP_OFST (24) +#define FPGA_VERSION_DTCTR_TYP_MSK (0x000000FF << FPGA_VERSION_DTCTR_TYP_OFST) +#define FPGA_VERSION_DTCTR_TYP_MOENCH_VAL \ + ((0x5 << FPGA_VERSION_DTCTR_TYP_OFST) & FPGA_VERSION_DTCTR_TYP_MSK) /* Fix pattern RO register */ -#define FIX_PATT_REG (0x01 << MEM_MAP_SHIFT) +#define FIX_PATT_REG (0x01 << MEM_MAP_SHIFT) -#define FIX_PATT_VAL (0xACDC2016) +#define FIX_PATT_VAL (0xACDC2016) /* Status RO register */ -#define STATUS_REG (0x02 << MEM_MAP_SHIFT) +#define STATUS_REG (0x02 << MEM_MAP_SHIFT) -#define STATUS_RN_BSY_OFST (0) -#define STATUS_RN_BSY_MSK (0x00000001 << STATUS_RN_BSY_OFST) -#define STATUS_RDT_BSY_OFST (1) -#define STATUS_RDT_BSY_MSK (0x00000001 << STATUS_RDT_BSY_OFST) -#define STATUS_ANY_FF_FLL_OFST (2) -#define STATUS_ANY_FF_FLL_MSK (0x00000001 << STATUS_ANY_FF_FLL_OFST) -#define STATUS_WTNG_FR_TRGGR_OFST (3) -#define STATUS_WTNG_FR_TRGGR_MSK (0x00000001 << STATUS_WTNG_FR_TRGGR_OFST) -#define STATUS_DLY_BFR_OFST (4) -#define STATUS_DLY_BFR_MSK (0x00000001 << STATUS_DLY_BFR_OFST) -#define STATUS_DLY_AFTR_OFST (5) -#define STATUS_DLY_AFTR_MSK (0x00000001 << STATUS_DLY_AFTR_OFST) -#define STATUS_EXPSNG_OFST (6) -#define STATUS_EXPSNG_MSK (0x00000001 << STATUS_EXPSNG_OFST) -#define STATUS_CNT_ENBL_OFST (7) -#define STATUS_CNT_ENBL_MSK (0x00000001 << STATUS_CNT_ENBL_OFST) -#define STATUS_SM_FF_FLL_OFST (11) -#define STATUS_SM_FF_FLL_MSK (0x00000001 << STATUS_SM_FF_FLL_OFST) -#define STATUS_STPPD_OFST (15) -#define STATUS_STPPD_MSK (0x00000001 << STATUS_STPPD_OFST) -#define STATUS_ALL_FF_EMPTY_OFST (16) -#define STATUS_ALL_FF_EMPTY_MSK (0x00000001 << STATUS_ALL_FF_EMPTY_OFST) -#define STATUS_CYCL_RN_BSY_OFST (17) -#define STATUS_CYCL_RN_BSY_MSK (0x00000001 << STATUS_CYCL_RN_BSY_OFST) -#define STATUS_FRM_RN_BSY_OFST (18) -#define STATUS_FRM_RN_BSY_MSK (0x00000001 << STATUS_FRM_RN_BSY_OFST) -#define STATUS_ADC_DESERON_OFST (19) -#define STATUS_ADC_DESERON_MSK (0x00000001 << STATUS_ADC_DESERON_OFST) -#define STATUS_PLL_RCNFG_BSY_OFST (20) -#define STATUS_PLL_RCNFG_BSY_MSK (0x00000001 << STATUS_PLL_RCNFG_BSY_OFST) -#define STATUS_DT_STRMNG_BSY_OFST (21) -#define STATUS_DT_STRMNG_BSY_MSK (0x00000001 << STATUS_DT_STRMNG_BSY_OFST) -#define STATUS_FRM_PCKR_BSY_OFST (22) -#define STATUS_FRM_PCKR_BSY_MSK (0x00000001 << STATUS_FRM_PCKR_BSY_OFST) -#define STATUS_PLL_PHS_DN_OFST (23) -#define STATUS_PLL_PHS_DN_MSK (0x00000001 << STATUS_PLL_PHS_DN_OFST) -#define STATUS_PT_CNTRL_STTS_OFF_OFST (24) -#define STATUS_PT_CNTRL_STTS_OFF_MSK (0x000000FF << STATUS_PT_CNTRL_STTS_OFF_OFST) -#define STATUS_IDLE_MSK (0x677FF) +#define STATUS_RN_BSY_OFST (0) +#define STATUS_RN_BSY_MSK (0x00000001 << STATUS_RN_BSY_OFST) +#define STATUS_RDT_BSY_OFST (1) +#define STATUS_RDT_BSY_MSK (0x00000001 << STATUS_RDT_BSY_OFST) +#define STATUS_ANY_FF_FLL_OFST (2) +#define STATUS_ANY_FF_FLL_MSK (0x00000001 << STATUS_ANY_FF_FLL_OFST) +#define STATUS_WTNG_FR_TRGGR_OFST (3) +#define STATUS_WTNG_FR_TRGGR_MSK (0x00000001 << STATUS_WTNG_FR_TRGGR_OFST) +#define STATUS_DLY_BFR_OFST (4) +#define STATUS_DLY_BFR_MSK (0x00000001 << STATUS_DLY_BFR_OFST) +#define STATUS_DLY_AFTR_OFST (5) +#define STATUS_DLY_AFTR_MSK (0x00000001 << STATUS_DLY_AFTR_OFST) +#define STATUS_EXPSNG_OFST (6) +#define STATUS_EXPSNG_MSK (0x00000001 << STATUS_EXPSNG_OFST) +#define STATUS_CNT_ENBL_OFST (7) +#define STATUS_CNT_ENBL_MSK (0x00000001 << STATUS_CNT_ENBL_OFST) +#define STATUS_SM_FF_FLL_OFST (11) +#define STATUS_SM_FF_FLL_MSK (0x00000001 << STATUS_SM_FF_FLL_OFST) +#define STATUS_STPPD_OFST (15) +#define STATUS_STPPD_MSK (0x00000001 << STATUS_STPPD_OFST) +#define STATUS_ALL_FF_EMPTY_OFST (16) +#define STATUS_ALL_FF_EMPTY_MSK (0x00000001 << STATUS_ALL_FF_EMPTY_OFST) +#define STATUS_CYCL_RN_BSY_OFST (17) +#define STATUS_CYCL_RN_BSY_MSK (0x00000001 << STATUS_CYCL_RN_BSY_OFST) +#define STATUS_FRM_RN_BSY_OFST (18) +#define STATUS_FRM_RN_BSY_MSK (0x00000001 << STATUS_FRM_RN_BSY_OFST) +#define STATUS_ADC_DESERON_OFST (19) +#define STATUS_ADC_DESERON_MSK (0x00000001 << STATUS_ADC_DESERON_OFST) +#define STATUS_PLL_RCNFG_BSY_OFST (20) +#define STATUS_PLL_RCNFG_BSY_MSK (0x00000001 << STATUS_PLL_RCNFG_BSY_OFST) +#define STATUS_DT_STRMNG_BSY_OFST (21) +#define STATUS_DT_STRMNG_BSY_MSK (0x00000001 << STATUS_DT_STRMNG_BSY_OFST) +#define STATUS_FRM_PCKR_BSY_OFST (22) +#define STATUS_FRM_PCKR_BSY_MSK (0x00000001 << STATUS_FRM_PCKR_BSY_OFST) +#define STATUS_PLL_PHS_DN_OFST (23) +#define STATUS_PLL_PHS_DN_MSK (0x00000001 << STATUS_PLL_PHS_DN_OFST) +#define STATUS_PT_CNTRL_STTS_OFF_OFST (24) +#define STATUS_PT_CNTRL_STTS_OFF_MSK \ + (0x000000FF << STATUS_PT_CNTRL_STTS_OFF_OFST) +#define STATUS_IDLE_MSK (0x677FF) /* Look at me RO register TODO */ -#define LOOK_AT_ME_REG (0x03 << MEM_MAP_SHIFT) +#define LOOK_AT_ME_REG (0x03 << MEM_MAP_SHIFT) /* System Status RO register */ -#define SYSTEM_STATUS_REG (0x04 << MEM_MAP_SHIFT) +#define SYSTEM_STATUS_REG (0x04 << MEM_MAP_SHIFT) -#define SYSTEM_STATUS_DDR3_CLBRTN_OK_OFST (0) -#define SYSTEM_STATUS_DDR3_CLBRTN_OK_MSK (0x00000001 << SYSTEM_STATUS_DDR3_CLBRTN_OK_OFST) -#define SYSTEM_STATUS_DDR3_CLBRTN_FL_OFST (1) -#define SYSTEM_STATUS_DDR3_CLBRTN_FL_MSK (0x00000001 << SYSTEM_STATUS_DDR3_CLBRTN_FL_OFST) -#define SYSTEM_STATUS_DDR3_INT_DN_OFST (2) -#define SYSTEM_STATUS_DDR3_INT_DN_MSK (0x00000001 << SYSTEM_STATUS_DDR3_INT_DN_OFST) -#define SYSTEM_STATUS_RCNFG_PLL_LCK_OFST (3) -#define SYSTEM_STATUS_RCNFG_PLL_LCK_MSK (0x00000001 << SYSTEM_STATUS_RCNFG_PLL_LCK_OFST) -#define SYSTEM_STATUS_PLL_A_LCK_OFST (4) -#define SYSTEM_STATUS_PLL_A_LCK_MSK (0x00000001 << SYSTEM_STATUS_PLL_A_LCK_OFST) +#define SYSTEM_STATUS_DDR3_CLBRTN_OK_OFST (0) +#define SYSTEM_STATUS_DDR3_CLBRTN_OK_MSK \ + (0x00000001 << SYSTEM_STATUS_DDR3_CLBRTN_OK_OFST) +#define SYSTEM_STATUS_DDR3_CLBRTN_FL_OFST (1) +#define SYSTEM_STATUS_DDR3_CLBRTN_FL_MSK \ + (0x00000001 << SYSTEM_STATUS_DDR3_CLBRTN_FL_OFST) +#define SYSTEM_STATUS_DDR3_INT_DN_OFST (2) +#define SYSTEM_STATUS_DDR3_INT_DN_MSK \ + (0x00000001 << SYSTEM_STATUS_DDR3_INT_DN_OFST) +#define SYSTEM_STATUS_RCNFG_PLL_LCK_OFST (3) +#define SYSTEM_STATUS_RCNFG_PLL_LCK_MSK \ + (0x00000001 << SYSTEM_STATUS_RCNFG_PLL_LCK_OFST) +#define SYSTEM_STATUS_PLL_A_LCK_OFST (4) +#define SYSTEM_STATUS_PLL_A_LCK_MSK (0x00000001 << SYSTEM_STATUS_PLL_A_LCK_OFST) -/* PLL Param (Reconfiguratble PLL Parameter) RO register TODO FIXME: Same as PLL_PARAM_REG 0x50 */ +/* PLL Param (Reconfiguratble PLL Parameter) RO register TODO FIXME: Same as + * PLL_PARAM_REG 0x50 */ //#define PLL_PARAM_REG (0x05 << MEM_MAP_SHIFT) /* FIFO Data RO register TODO */ -#define FIFO_DATA_REG (0x06 << MEM_MAP_SHIFT) +#define FIFO_DATA_REG (0x06 << MEM_MAP_SHIFT) -#define FIFO_DATA_HRDWR_SRL_NMBR_OFST (0) -#define FIFO_DATA_HRDWR_SRL_NMBR_MSK (0x0000FFFF << FIFO_DATA_HRDWR_SRL_NMBR_OFST) +#define FIFO_DATA_HRDWR_SRL_NMBR_OFST (0) +#define FIFO_DATA_HRDWR_SRL_NMBR_MSK \ + (0x0000FFFF << FIFO_DATA_HRDWR_SRL_NMBR_OFST) //#define FIFO_DATA_WRD_OFST (16) //#define FIFO_DATA_WRD_MSK (0x0000FFFF << FIFO_DATA_WRD_OFST) /* FIFO Status RO register TODO */ -#define FIFO_STATUS_REG (0x07 << MEM_MAP_SHIFT) +#define FIFO_STATUS_REG (0x07 << MEM_MAP_SHIFT) /* FIFO Empty RO register TODO */ -#define FIFO_EMPTY_REG (0x08 << MEM_MAP_SHIFT) -#define FIFO_EMPTY_ALL_EMPTY_MSK (0xFFFFFFFF) +#define FIFO_EMPTY_REG (0x08 << MEM_MAP_SHIFT) +#define FIFO_EMPTY_ALL_EMPTY_MSK (0xFFFFFFFF) /* FIFO Full RO register TODO */ -#define FIFO_FULL_REG (0x09 << MEM_MAP_SHIFT) +#define FIFO_FULL_REG (0x09 << MEM_MAP_SHIFT) /* MCB Serial Number RO register */ -#define MOD_SERIAL_NUMBER_REG (0x0A << MEM_MAP_SHIFT) +#define MOD_SERIAL_NUMBER_REG (0x0A << MEM_MAP_SHIFT) -#define MOD_SERIAL_NUMBER_OFST (0) -#define MOD_SERIAL_NUMBER_MSK (0x000000FF << MOD_SERIAL_NUMBER_OFST) -#define MOD_SERIAL_NUMBER_VRSN_OFST (16) -#define MOD_SERIAL_NUMBER_VRSN_MSK (0x0000003F << MOD_SERIAL_NUMBER_VRSN_OFST) +#define MOD_SERIAL_NUMBER_OFST (0) +#define MOD_SERIAL_NUMBER_MSK (0x000000FF << MOD_SERIAL_NUMBER_OFST) +#define MOD_SERIAL_NUMBER_VRSN_OFST (16) +#define MOD_SERIAL_NUMBER_VRSN_MSK (0x0000003F << MOD_SERIAL_NUMBER_VRSN_OFST) /* API Version RO register */ -#define API_VERSION_REG (0x0F << MEM_MAP_SHIFT) +#define API_VERSION_REG (0x0F << MEM_MAP_SHIFT) -#define API_VERSION_OFST (0) -#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST) -#define API_VERSION_DTCTR_TYP_OFST (24) -#define API_VERSION_DTCTR_TYP_MSK (0x000000FF << API_VERSION_DTCTR_TYP_OFST) +#define API_VERSION_OFST (0) +#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST) +#define API_VERSION_DTCTR_TYP_OFST (24) +#define API_VERSION_DTCTR_TYP_MSK (0x000000FF << API_VERSION_DTCTR_TYP_OFST) -/* Time from Start 64 bit RO register. t = GCLK x 50 ns. Reset using CONTROL_CRST. TODO */ -#define TIME_FROM_START_LSB_REG (0x10 << MEM_MAP_SHIFT) -#define TIME_FROM_START_MSB_REG (0x11 << MEM_MAP_SHIFT) +/* Time from Start 64 bit RO register. t = GCLK x 50 ns. Reset using + * CONTROL_CRST. TODO */ +#define TIME_FROM_START_LSB_REG (0x10 << MEM_MAP_SHIFT) +#define TIME_FROM_START_MSB_REG (0x11 << MEM_MAP_SHIFT) /* Delay Left 64 bit RO register. t = DLY x 50 ns. TODO */ -#define DELAY_LEFT_LSB_REG (0x12 << MEM_MAP_SHIFT) -#define DELAY_LEFT_MSB_REG (0x13 << MEM_MAP_SHIFT) +#define DELAY_LEFT_LSB_REG (0x12 << MEM_MAP_SHIFT) +#define DELAY_LEFT_MSB_REG (0x13 << MEM_MAP_SHIFT) /* Triggers Left 64 bit RO register TODO */ -#define CYCLES_LEFT_LSB_REG (0x14 << MEM_MAP_SHIFT) -#define CYCLES_LEFT_MSB_REG (0x15 << MEM_MAP_SHIFT) +#define CYCLES_LEFT_LSB_REG (0x14 << MEM_MAP_SHIFT) +#define CYCLES_LEFT_MSB_REG (0x15 << MEM_MAP_SHIFT) /* Frames Left 64 bit RO register TODO */ -#define FRAMES_LEFT_LSB_REG (0x16 << MEM_MAP_SHIFT) -#define FRAMES_LEFT_MSB_REG (0x17 << MEM_MAP_SHIFT) +#define FRAMES_LEFT_LSB_REG (0x16 << MEM_MAP_SHIFT) +#define FRAMES_LEFT_MSB_REG (0x17 << MEM_MAP_SHIFT) /* Period Left 64 bit RO register. t = T x 50 ns. TODO */ -#define PERIOD_LEFT_LSB_REG (0x18 << MEM_MAP_SHIFT) -#define PERIOD_LEFT_MSB_REG (0x19 << MEM_MAP_SHIFT) +#define PERIOD_LEFT_LSB_REG (0x18 << MEM_MAP_SHIFT) +#define PERIOD_LEFT_MSB_REG (0x19 << MEM_MAP_SHIFT) /* Exposure Time Left 64 bit RO register */ -//#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not used in FW -//#define EXPTIME_LEFT_MSB_REG (0x1B << MEM_MAP_SHIFT) // Not used in FW +//#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not +//used in FW #define EXPTIME_LEFT_MSB_REG (0x1B << MEM_MAP_SHIFT) +//// Not used in FW /* Gates Left 64 bit RO register */ -//#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not used in FW -//#define GATES_LEFT_MSB_REG (0x1D << MEM_MAP_SHIFT) // Not used in FW +//#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not +//used in FW #define GATES_LEFT_MSB_REG (0x1D << MEM_MAP_SHIFT) +//// Not used in FW /* Data In 64 bit RO register TODO */ -#define DATA_IN_LSB_REG (0x1E << MEM_MAP_SHIFT) -#define DATA_IN_MSB_REG (0x1F << MEM_MAP_SHIFT) +#define DATA_IN_LSB_REG (0x1E << MEM_MAP_SHIFT) +#define DATA_IN_MSB_REG (0x1F << MEM_MAP_SHIFT) /* Pattern Out 64 bit RO register */ -#define PATTERN_OUT_LSB_REG (0x20 << MEM_MAP_SHIFT) -#define PATTERN_OUT_MSB_REG (0x21 << MEM_MAP_SHIFT) +#define PATTERN_OUT_LSB_REG (0x20 << MEM_MAP_SHIFT) +#define PATTERN_OUT_MSB_REG (0x21 << MEM_MAP_SHIFT) /* Frames From Start 64 bit RO register TODO */ -//#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not used in FW -//#define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT) // Not used in FW +//#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not +//used in FW #define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT) +//// Not used in FW /* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */ -#define FRAMES_FROM_START_PG_LSB_REG (0x24 << MEM_MAP_SHIFT) -#define FRAMES_FROM_START_PG_MSB_REG (0x25 << MEM_MAP_SHIFT) +#define FRAMES_FROM_START_PG_LSB_REG (0x24 << MEM_MAP_SHIFT) +#define FRAMES_FROM_START_PG_MSB_REG (0x25 << MEM_MAP_SHIFT) -/* Start Frame Time (Measurement Time) 64 bit register (timestamp at a frame start until reset) TODO */ -#define START_FRAME_TIME_LSB_REG (0x26 << MEM_MAP_SHIFT) -#define START_FRAME_TIME_MSB_REG (0x27 << MEM_MAP_SHIFT) +/* Start Frame Time (Measurement Time) 64 bit register (timestamp at a frame + * start until reset) TODO */ +#define START_FRAME_TIME_LSB_REG (0x26 << MEM_MAP_SHIFT) +#define START_FRAME_TIME_MSB_REG (0x27 << MEM_MAP_SHIFT) /* Power Status RO register */ -#define POWER_STATUS_REG (0x29 << MEM_MAP_SHIFT) +#define POWER_STATUS_REG (0x29 << MEM_MAP_SHIFT) -#define POWER_STATUS_ALRT_OFST (27) -#define POWER_STATUS_ALRT_MSK (0x0000001F << POWER_STATUS_ALRT_OFST) +#define POWER_STATUS_ALRT_OFST (27) +#define POWER_STATUS_ALRT_MSK (0x0000001F << POWER_STATUS_ALRT_OFST) /* DAC Value Out RO register */ //#define DAC_VAL_OUT_REG (0x2A << MEM_MAP_SHIFT) /* Slow ADC SPI Value RO register */ -#define ADC_SPI_SLOW_VAL_REG (0x2B << MEM_MAP_SHIFT) +#define ADC_SPI_SLOW_VAL_REG (0x2B << MEM_MAP_SHIFT) /* FIFO Digital In Status RO register */ -#define FIFO_DIN_STATUS_REG (0x3B << MEM_MAP_SHIFT) -#define FIFO_DIN_STATUS_FIFO_FULL_OFST (30) -#define FIFO_DIN_STATUS_FIFO_FULL_MSK (0x00000001 << FIFO_DIN_STATUS_FIFO_FULL_OFST) -#define FIFO_DIN_STATUS_FIFO_EMPTY_OFST (31) -#define FIFO_DIN_STATUS_FIFO_EMPTY_MSK (0x00000001 << FIFO_DIN_STATUS_FIFO_EMPTY_OFST) +#define FIFO_DIN_STATUS_REG (0x3B << MEM_MAP_SHIFT) +#define FIFO_DIN_STATUS_FIFO_FULL_OFST (30) +#define FIFO_DIN_STATUS_FIFO_FULL_MSK \ + (0x00000001 << FIFO_DIN_STATUS_FIFO_FULL_OFST) +#define FIFO_DIN_STATUS_FIFO_EMPTY_OFST (31) +#define FIFO_DIN_STATUS_FIFO_EMPTY_MSK \ + (0x00000001 << FIFO_DIN_STATUS_FIFO_EMPTY_OFST) /* FIFO Digital In 64 bit RO register */ -#define FIFO_DIN_LSB_REG (0x3C << MEM_MAP_SHIFT) -#define FIFO_DIN_MSB_REG (0x3D << MEM_MAP_SHIFT) +#define FIFO_DIN_LSB_REG (0x3C << MEM_MAP_SHIFT) +#define FIFO_DIN_MSB_REG (0x3D << MEM_MAP_SHIFT) /* SPI (Serial Peripheral Interface) DAC, HV RW register */ -#define SPI_REG (0x40 << MEM_MAP_SHIFT) +#define SPI_REG (0x40 << MEM_MAP_SHIFT) -#define SPI_DAC_SRL_DGTL_OTPT_OFST (0) -#define SPI_DAC_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_DAC_SRL_DGTL_OTPT_OFST) -#define SPI_DAC_SRL_CLK_OTPT_OFST (1) -#define SPI_DAC_SRL_CLK_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CLK_OTPT_OFST) -#define SPI_DAC_SRL_CS_OTPT_OFST (2) -#define SPI_DAC_SRL_CS_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CS_OTPT_OFST) -#define SPI_HV_SRL_DGTL_OTPT_OFST (8) -#define SPI_HV_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_HV_SRL_DGTL_OTPT_OFST) -#define SPI_HV_SRL_CLK_OTPT_OFST (9) -#define SPI_HV_SRL_CLK_OTPT_MSK (0x00000001 << SPI_HV_SRL_CLK_OTPT_OFST) -#define SPI_HV_SRL_CS_OTPT_OFST (10) -#define SPI_HV_SRL_CS_OTPT_MSK (0x00000001 << SPI_HV_SRL_CS_OTPT_OFST) +#define SPI_DAC_SRL_DGTL_OTPT_OFST (0) +#define SPI_DAC_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_DAC_SRL_DGTL_OTPT_OFST) +#define SPI_DAC_SRL_CLK_OTPT_OFST (1) +#define SPI_DAC_SRL_CLK_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CLK_OTPT_OFST) +#define SPI_DAC_SRL_CS_OTPT_OFST (2) +#define SPI_DAC_SRL_CS_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CS_OTPT_OFST) +#define SPI_HV_SRL_DGTL_OTPT_OFST (8) +#define SPI_HV_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_HV_SRL_DGTL_OTPT_OFST) +#define SPI_HV_SRL_CLK_OTPT_OFST (9) +#define SPI_HV_SRL_CLK_OTPT_MSK (0x00000001 << SPI_HV_SRL_CLK_OTPT_OFST) +#define SPI_HV_SRL_CS_OTPT_OFST (10) +#define SPI_HV_SRL_CS_OTPT_MSK (0x00000001 << SPI_HV_SRL_CS_OTPT_OFST) /* ADC SPI (Serial Peripheral Interface) RW register */ -#define ADC_SPI_REG (0x41 << MEM_MAP_SHIFT) +#define ADC_SPI_REG (0x41 << MEM_MAP_SHIFT) -#define ADC_SPI_SRL_CLK_OTPT_OFST (0) -#define ADC_SPI_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SRL_CLK_OTPT_OFST) -#define ADC_SPI_SRL_DT_OTPT_OFST (1) -#define ADC_SPI_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SRL_DT_OTPT_OFST) -#define ADC_SPI_SRL_CS_OTPT_OFST (2) -#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SRL_CS_OTPT_OFST) -#define ADC_SPI_SLOW_SRL_DT_OFST (8) -#define ADC_SPI_SLOW_SRL_DT_MSK (0x00000001 << ADC_SPI_SLOW_SRL_DT_OFST) -#define ADC_SPI_SLOW_SRL_CLK_OFST (9) -#define ADC_SPI_SLOW_SRL_CLK_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CLK_OFST) -#define ADC_SPI_SLOW_SRL_CNV_OFST (10) -#define ADC_SPI_SLOW_SRL_CNV_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CNV_OFST) +#define ADC_SPI_SRL_CLK_OTPT_OFST (0) +#define ADC_SPI_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SRL_CLK_OTPT_OFST) +#define ADC_SPI_SRL_DT_OTPT_OFST (1) +#define ADC_SPI_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SRL_DT_OTPT_OFST) +#define ADC_SPI_SRL_CS_OTPT_OFST (2) +#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SRL_CS_OTPT_OFST) +#define ADC_SPI_SLOW_SRL_DT_OFST (8) +#define ADC_SPI_SLOW_SRL_DT_MSK (0x00000001 << ADC_SPI_SLOW_SRL_DT_OFST) +#define ADC_SPI_SLOW_SRL_CLK_OFST (9) +#define ADC_SPI_SLOW_SRL_CLK_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CLK_OFST) +#define ADC_SPI_SLOW_SRL_CNV_OFST (10) +#define ADC_SPI_SLOW_SRL_CNV_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CNV_OFST) /* ADC Offset RW register */ -#define ADC_OFFSET_REG (0x42 << MEM_MAP_SHIFT) +#define ADC_OFFSET_REG (0x42 << MEM_MAP_SHIFT) -#define ADC_OFFSET_ADC_PPLN_OFST (0) -#define ADC_OFFSET_ADC_PPLN_MSK (0x000000FF << ADC_OFFSET_ADC_PPLN_OFST) -#define ADC_OFFSET_DBT_PPLN_OFST (16) -#define ADC_OFFSET_DBT_PPLN_MSK (0x000000FF << ADC_OFFSET_DBT_PPLN_OFST) +#define ADC_OFFSET_ADC_PPLN_OFST (0) +#define ADC_OFFSET_ADC_PPLN_MSK (0x000000FF << ADC_OFFSET_ADC_PPLN_OFST) +#define ADC_OFFSET_DBT_PPLN_OFST (16) +#define ADC_OFFSET_DBT_PPLN_MSK (0x000000FF << ADC_OFFSET_DBT_PPLN_OFST) /* ADC Port Invert RW register */ -#define ADC_PORT_INVERT_REG (0x43 << MEM_MAP_SHIFT) +#define ADC_PORT_INVERT_REG (0x43 << MEM_MAP_SHIFT) -#define ADC_PORT_INVERT_0_INPT_OFST (0) -#define ADC_PORT_INVERT_0_INPT_MSK (0x000000FF << ADC_PORT_INVERT_0_INPT_OFST) -#define ADC_PORT_INVERT_1_INPT_OFST (8) -#define ADC_PORT_INVERT_1_INPT_MSK (0x000000FF << ADC_PORT_INVERT_1_INPT_OFST) -#define ADC_PORT_INVERT_2_INPT_OFST (16) -#define ADC_PORT_INVERT_2_INPT_MSK (0x000000FF << ADC_PORT_INVERT_2_INPT_OFST) -#define ADC_PORT_INVERT_3_INPT_OFST (24) -#define ADC_PORT_INVERT_3_INPT_MSK (0x000000FF << ADC_PORT_INVERT_3_INPT_OFST) +#define ADC_PORT_INVERT_0_INPT_OFST (0) +#define ADC_PORT_INVERT_0_INPT_MSK (0x000000FF << ADC_PORT_INVERT_0_INPT_OFST) +#define ADC_PORT_INVERT_1_INPT_OFST (8) +#define ADC_PORT_INVERT_1_INPT_MSK (0x000000FF << ADC_PORT_INVERT_1_INPT_OFST) +#define ADC_PORT_INVERT_2_INPT_OFST (16) +#define ADC_PORT_INVERT_2_INPT_MSK (0x000000FF << ADC_PORT_INVERT_2_INPT_OFST) +#define ADC_PORT_INVERT_3_INPT_OFST (24) +#define ADC_PORT_INVERT_3_INPT_MSK (0x000000FF << ADC_PORT_INVERT_3_INPT_OFST) /* Dummy RW register */ -#define DUMMY_REG (0x44 << MEM_MAP_SHIFT) +#define DUMMY_REG (0x44 << MEM_MAP_SHIFT) -#define DUMMY_FIFO_CHNNL_SLCT_OFST (0) -#define DUMMY_FIFO_CHNNL_SLCT_MSK (0x0000003F << DUMMY_FIFO_CHNNL_SLCT_OFST) -#define DUMMY_ANLG_FIFO_RD_STRBE_OFST (8) -#define DUMMY_ANLG_FIFO_RD_STRBE_MSK (0x00000001 << DUMMY_ANLG_FIFO_RD_STRBE_OFST) -#define DUMMY_DGTL_FIFO_RD_STRBE_OFST (9) -#define DUMMY_DGTL_FIFO_RD_STRBE_MSK (0x00000001 << DUMMY_DGTL_FIFO_RD_STRBE_OFST) +#define DUMMY_FIFO_CHNNL_SLCT_OFST (0) +#define DUMMY_FIFO_CHNNL_SLCT_MSK (0x0000003F << DUMMY_FIFO_CHNNL_SLCT_OFST) +#define DUMMY_ANLG_FIFO_RD_STRBE_OFST (8) +#define DUMMY_ANLG_FIFO_RD_STRBE_MSK \ + (0x00000001 << DUMMY_ANLG_FIFO_RD_STRBE_OFST) +#define DUMMY_DGTL_FIFO_RD_STRBE_OFST (9) +#define DUMMY_DGTL_FIFO_RD_STRBE_MSK \ + (0x00000001 << DUMMY_DGTL_FIFO_RD_STRBE_OFST) /* Receiver IP Address RW register */ -#define RX_IP_REG (0x45 << MEM_MAP_SHIFT) +#define RX_IP_REG (0x45 << MEM_MAP_SHIFT) /* UDP Port RW register */ -#define UDP_PORT_REG (0x46 << MEM_MAP_SHIFT) +#define UDP_PORT_REG (0x46 << MEM_MAP_SHIFT) -#define UDP_PORT_RX_OFST (0) -#define UDP_PORT_RX_MSK (0x0000FFFF << UDP_PORT_RX_OFST) -#define UDP_PORT_TX_OFST (16) -#define UDP_PORT_TX_MSK (0x0000FFFF << UDP_PORT_TX_OFST) +#define UDP_PORT_RX_OFST (0) +#define UDP_PORT_RX_MSK (0x0000FFFF << UDP_PORT_RX_OFST) +#define UDP_PORT_TX_OFST (16) +#define UDP_PORT_TX_MSK (0x0000FFFF << UDP_PORT_TX_OFST) /* Receiver Mac Address 64 bit RW register */ -#define RX_MAC_LSB_REG (0x47 << MEM_MAP_SHIFT) -#define RX_MAC_MSB_REG (0x48 << MEM_MAP_SHIFT) +#define RX_MAC_LSB_REG (0x47 << MEM_MAP_SHIFT) +#define RX_MAC_MSB_REG (0x48 << MEM_MAP_SHIFT) -#define RX_MAC_LSB_OFST (0) -#define RX_MAC_LSB_MSK (0xFFFFFFFF << RX_MAC_LSB_OFST) -#define RX_MAC_MSB_OFST (0) -#define RX_MAC_MSB_MSK (0x0000FFFF << RX_MAC_MSB_OFST) +#define RX_MAC_LSB_OFST (0) +#define RX_MAC_LSB_MSK (0xFFFFFFFF << RX_MAC_LSB_OFST) +#define RX_MAC_MSB_OFST (0) +#define RX_MAC_MSB_MSK (0x0000FFFF << RX_MAC_MSB_OFST) /* Detector/ Transmitter Mac Address 64 bit RW register */ -#define TX_MAC_LSB_REG (0x49 << MEM_MAP_SHIFT) -#define TX_MAC_MSB_REG (0x4A << MEM_MAP_SHIFT) +#define TX_MAC_LSB_REG (0x49 << MEM_MAP_SHIFT) +#define TX_MAC_MSB_REG (0x4A << MEM_MAP_SHIFT) -#define TX_MAC_LSB_OFST (0) -#define TX_MAC_LSB_MSK (0xFFFFFFFF << TX_MAC_LSB_OFST) -#define TX_MAC_MSB_OFST (0) -#define TX_MAC_MSB_MSK (0x0000FFFF << TX_MAC_MSB_OFST) +#define TX_MAC_LSB_OFST (0) +#define TX_MAC_LSB_MSK (0xFFFFFFFF << TX_MAC_LSB_OFST) +#define TX_MAC_MSB_OFST (0) +#define TX_MAC_MSB_MSK (0x0000FFFF << TX_MAC_MSB_OFST) /* Detector/ Transmitter IP Address RW register */ -#define TX_IP_REG (0x4B << MEM_MAP_SHIFT) +#define TX_IP_REG (0x4B << MEM_MAP_SHIFT) /* Detector/ Transmitter IP Checksum RW register */ -#define TX_IP_CHECKSUM_REG (0x4C << MEM_MAP_SHIFT) +#define TX_IP_CHECKSUM_REG (0x4C << MEM_MAP_SHIFT) -#define TX_IP_CHECKSUM_OFST (0) -#define TX_IP_CHECKSUM_MSK (0x0000FFFF << TX_IP_CHECKSUM_OFST) +#define TX_IP_CHECKSUM_OFST (0) +#define TX_IP_CHECKSUM_MSK (0x0000FFFF << TX_IP_CHECKSUM_OFST) /* Configuration RW register */ -#define CONFIG_REG (0x4D << MEM_MAP_SHIFT) +#define CONFIG_REG (0x4D << MEM_MAP_SHIFT) -#define CONFIG_LED_DSBL_OFST (0) // Not used in firmware or software -#define CONFIG_LED_DSBL_MSK (0x00000001 << CONFIG_LED_DSBL_OFST) -#define CONFIG_DSBL_ANLG_OTPT_OFST (8) -#define CONFIG_DSBL_ANLG_OTPT_MSK (0x00000001 << CONFIG_DSBL_ANLG_OTPT_OFST) -#define CONFIG_ENBLE_DGTL_OTPT_OFST (9) -#define CONFIG_ENBLE_DGTL_OTPT_MSK (0x00000001 << CONFIG_ENBLE_DGTL_OTPT_OFST) -#define CONFIG_GB10_SND_UDP_OFST (12) -#define CONFIG_GB10_SND_UDP_MSK (0x00000001 << CONFIG_GB10_SND_UDP_OFST) +#define CONFIG_LED_DSBL_OFST (0) // Not used in firmware or software +#define CONFIG_LED_DSBL_MSK (0x00000001 << CONFIG_LED_DSBL_OFST) +#define CONFIG_DSBL_ANLG_OTPT_OFST (8) +#define CONFIG_DSBL_ANLG_OTPT_MSK (0x00000001 << CONFIG_DSBL_ANLG_OTPT_OFST) +#define CONFIG_ENBLE_DGTL_OTPT_OFST (9) +#define CONFIG_ENBLE_DGTL_OTPT_MSK (0x00000001 << CONFIG_ENBLE_DGTL_OTPT_OFST) +#define CONFIG_GB10_SND_UDP_OFST (12) +#define CONFIG_GB10_SND_UDP_MSK (0x00000001 << CONFIG_GB10_SND_UDP_OFST) /* External Signal RW register */ -#define EXT_SIGNAL_REG (0x4E << MEM_MAP_SHIFT) +#define EXT_SIGNAL_REG (0x4E << MEM_MAP_SHIFT) -#define EXT_SIGNAL_OFST (0) -#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) -#define EXT_SIGNAL_AUTO_VAL ((0x0 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) -#define EXT_SIGNAL_TRGGR_VAL ((0x1 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) +#define EXT_SIGNAL_OFST (0) +#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) +#define EXT_SIGNAL_AUTO_VAL ((0x0 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) +#define EXT_SIGNAL_TRGGR_VAL ((0x1 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) /* Control RW register */ -#define CONTROL_REG (0x4F << MEM_MAP_SHIFT) +#define CONTROL_REG (0x4F << MEM_MAP_SHIFT) -#define CONTROL_STRT_ACQSTN_OFST (0) -#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST) -#define CONTROL_STP_ACQSTN_OFST (1) -#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) +#define CONTROL_STRT_ACQSTN_OFST (0) +#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST) +#define CONTROL_STP_ACQSTN_OFST (1) +#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) //#define CONTROL_STRT_FF_TST_OFST (2) -//#define CONTROL_STRT_FF_TST_MSK (0x00000001 << CONTROL_STRT_FF_TST_OFST) -//#define CONTROL_STP_FF_TST_OFST (3) -//#define CONTROL_STP_FF_TST_MSK (0x00000001 << CONTROL_STP_FF_TST_OFST) -//#define CONTROL_STRT_RDT_OFST (4) -//#define CONTROL_STRT_RDT_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) -//#define CONTROL_STP_RDT_OFST (5) -//#define CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST) -#define CONTROL_STRT_EXPSR_OFST (6) -#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST) +//#define CONTROL_STRT_FF_TST_MSK (0x00000001 << +//CONTROL_STRT_FF_TST_OFST) #define CONTROL_STP_FF_TST_OFST (3) +//#define CONTROL_STP_FF_TST_MSK (0x00000001 << +//CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4) +//#define CONTROL_STRT_RDT_MSK (0x00000001 << +//CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5) #define +//CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST) +#define CONTROL_STRT_EXPSR_OFST (6) +#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST) //#define CONTROL_STP_EXPSR_OFST (7) -//#define CONTROL_STP_EXPSR_MSK (0x00000001 << CONTROL_STP_RDT_OFST) -//#define CONTROL_STRT_TRN_OFST (8) -//#define CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) +//#define CONTROL_STP_EXPSR_MSK (0x00000001 << +//CONTROL_STP_RDT_OFST) #define CONTROL_STRT_TRN_OFST (8) #define +//CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) //#define CONTROL_STP_TRN_OFST (9) -//#define CONTROL_STP_TRN_MSK (0x00000001 << CONTROL_STP_RDT_OFST) -#define CONTROL_CRE_RST_OFST (10) -#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) -#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? -#define CONTROL_PRPHRL_RST_MSK (0x00000001 << CONTROL_PRPHRL_RST_OFST) -#define CONTROL_MMRY_RST_OFST (12) -#define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST) +//#define CONTROL_STP_TRN_MSK (0x00000001 << +//CONTROL_STP_RDT_OFST) +#define CONTROL_CRE_RST_OFST (10) +#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) +#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? +#define CONTROL_PRPHRL_RST_MSK (0x00000001 << CONTROL_PRPHRL_RST_OFST) +#define CONTROL_MMRY_RST_OFST (12) +#define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST) //#define CONTROL_PLL_RCNFG_WR_OFST (13) -//#define CONTROL_PLL_RCNFG_WR_MSK (0x00000001 << CONTROL_PLL_RCNFG_WR_OFST) -#define CONTROL_SND_10GB_PCKT_OFST (14) -#define CONTROL_SND_10GB_PCKT_MSK (0x00000001 << CONTROL_SND_10GB_PCKT_OFST) -#define CONTROL_CLR_ACQSTN_FIFO_OFST (15) -#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST) +//#define CONTROL_PLL_RCNFG_WR_MSK (0x00000001 << +//CONTROL_PLL_RCNFG_WR_OFST) +#define CONTROL_SND_10GB_PCKT_OFST (14) +#define CONTROL_SND_10GB_PCKT_MSK (0x00000001 << CONTROL_SND_10GB_PCKT_OFST) +#define CONTROL_CLR_ACQSTN_FIFO_OFST (15) +#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST) /* Reconfiguratble PLL Paramater RW register */ -#define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT) +#define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT) /* Reconfiguratble PLL Control RW regiser */ -#define PLL_CNTRL_REG (0x51 << MEM_MAP_SHIFT) +#define PLL_CNTRL_REG (0x51 << MEM_MAP_SHIFT) -#define PLL_CNTRL_RCNFG_PRMTR_RST_OFST (0) -#define PLL_CNTRL_RCNFG_PRMTR_RST_MSK (0x00000001 << PLL_CNTRL_RCNFG_PRMTR_RST_OFST) -#define PLL_CNTRL_WR_PRMTR_OFST (2) -#define PLL_CNTRL_WR_PRMTR_MSK (0x00000001 << PLL_CNTRL_WR_PRMTR_OFST) -#define PLL_CNTRL_PLL_RST_OFST (3) -#define PLL_CNTRL_PLL_RST_MSK (0x00000001 << PLL_CNTRL_PLL_RST_OFST) -#define PLL_CNTRL_ADDR_OFST (16) -#define PLL_CNTRL_ADDR_MSK (0x0000003F << PLL_CNTRL_ADDR_OFST) +#define PLL_CNTRL_RCNFG_PRMTR_RST_OFST (0) +#define PLL_CNTRL_RCNFG_PRMTR_RST_MSK \ + (0x00000001 << PLL_CNTRL_RCNFG_PRMTR_RST_OFST) +#define PLL_CNTRL_WR_PRMTR_OFST (2) +#define PLL_CNTRL_WR_PRMTR_MSK (0x00000001 << PLL_CNTRL_WR_PRMTR_OFST) +#define PLL_CNTRL_PLL_RST_OFST (3) +#define PLL_CNTRL_PLL_RST_MSK (0x00000001 << PLL_CNTRL_PLL_RST_OFST) +#define PLL_CNTRL_ADDR_OFST (16) +#define PLL_CNTRL_ADDR_MSK (0x0000003F << PLL_CNTRL_ADDR_OFST) /* Pattern Control RW register */ -#define PATTERN_CNTRL_REG (0x52 << MEM_MAP_SHIFT) +#define PATTERN_CNTRL_REG (0x52 << MEM_MAP_SHIFT) -#define PATTERN_CNTRL_WR_OFST (0) -#define PATTERN_CNTRL_WR_MSK (0x00000001 << PATTERN_CNTRL_WR_OFST) -#define PATTERN_CNTRL_RD_OFST (1) -#define PATTERN_CNTRL_RD_MSK (0x00000001 << PATTERN_CNTRL_RD_OFST) -#define PATTERN_CNTRL_ADDR_OFST (16) -#define PATTERN_CNTRL_ADDR_MSK (0x00001FFF << PATTERN_CNTRL_ADDR_OFST) +#define PATTERN_CNTRL_WR_OFST (0) +#define PATTERN_CNTRL_WR_MSK (0x00000001 << PATTERN_CNTRL_WR_OFST) +#define PATTERN_CNTRL_RD_OFST (1) +#define PATTERN_CNTRL_RD_MSK (0x00000001 << PATTERN_CNTRL_RD_OFST) +#define PATTERN_CNTRL_ADDR_OFST (16) +#define PATTERN_CNTRL_ADDR_MSK (0x00001FFF << PATTERN_CNTRL_ADDR_OFST) /* Pattern Limit RW regiser */ -#define PATTERN_LIMIT_REG (0x53 << MEM_MAP_SHIFT) +#define PATTERN_LIMIT_REG (0x53 << MEM_MAP_SHIFT) -#define PATTERN_LIMIT_STRT_OFST (0) -#define PATTERN_LIMIT_STRT_MSK (0x00001FFF << PATTERN_LIMIT_STRT_OFST) -#define PATTERN_LIMIT_STP_OFST (16) -#define PATTERN_LIMIT_STP_MSK (0x00001FFF << PATTERN_LIMIT_STP_OFST) +#define PATTERN_LIMIT_STRT_OFST (0) +#define PATTERN_LIMIT_STRT_MSK (0x00001FFF << PATTERN_LIMIT_STRT_OFST) +#define PATTERN_LIMIT_STP_OFST (16) +#define PATTERN_LIMIT_STP_MSK (0x00001FFF << PATTERN_LIMIT_STP_OFST) /* Pattern Loop 0 Address RW regiser */ -#define PATTERN_LOOP_0_ADDR_REG (0x54 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_0_ADDR_REG (0x54 << MEM_MAP_SHIFT) -#define PATTERN_LOOP_0_ADDR_STRT_OFST (0) -#define PATTERN_LOOP_0_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STRT_OFST) -#define PATTERN_LOOP_0_ADDR_STP_OFST (16) -#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STP_OFST) +#define PATTERN_LOOP_0_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_0_ADDR_STRT_MSK \ + (0x00001FFF << PATTERN_LOOP_0_ADDR_STRT_OFST) +#define PATTERN_LOOP_0_ADDR_STP_OFST (16) +#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STP_OFST) /* Pattern Loop 0 Iteration RW regiser */ -#define PATTERN_LOOP_0_ITERATION_REG (0x55 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_0_ITERATION_REG (0x55 << MEM_MAP_SHIFT) /* Pattern Loop 1 Address RW regiser */ -#define PATTERN_LOOP_1_ADDR_REG (0x56 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_1_ADDR_REG (0x56 << MEM_MAP_SHIFT) -#define PATTERN_LOOP_1_ADDR_STRT_OFST (0) -#define PATTERN_LOOP_1_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STRT_OFST) -#define PATTERN_LOOP_1_ADDR_STP_OFST (16) -#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STP_OFST) +#define PATTERN_LOOP_1_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_1_ADDR_STRT_MSK \ + (0x00001FFF << PATTERN_LOOP_1_ADDR_STRT_OFST) +#define PATTERN_LOOP_1_ADDR_STP_OFST (16) +#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STP_OFST) /* Pattern Loop 1 Iteration RW regiser */ -#define PATTERN_LOOP_1_ITERATION_REG (0x57 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_1_ITERATION_REG (0x57 << MEM_MAP_SHIFT) /* Pattern Loop 2 Address RW regiser */ -#define PATTERN_LOOP_2_ADDR_REG (0x58 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_2_ADDR_REG (0x58 << MEM_MAP_SHIFT) -#define PATTERN_LOOP_2_ADDR_STRT_OFST (0) -#define PATTERN_LOOP_2_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STRT_OFST) -#define PATTERN_LOOP_2_ADDR_STP_OFST (16) -#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STP_OFST) +#define PATTERN_LOOP_2_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_2_ADDR_STRT_MSK \ + (0x00001FFF << PATTERN_LOOP_2_ADDR_STRT_OFST) +#define PATTERN_LOOP_2_ADDR_STP_OFST (16) +#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STP_OFST) /* Pattern Loop 2 Iteration RW regiser */ -#define PATTERN_LOOP_2_ITERATION_REG (0x59 << MEM_MAP_SHIFT) +#define PATTERN_LOOP_2_ITERATION_REG (0x59 << MEM_MAP_SHIFT) /* Pattern Wait 0 RW regiser */ -#define PATTERN_WAIT_0_ADDR_REG (0x5A << MEM_MAP_SHIFT) +#define PATTERN_WAIT_0_ADDR_REG (0x5A << MEM_MAP_SHIFT) -#define PATTERN_WAIT_0_ADDR_OFST (0) -#define PATTERN_WAIT_0_ADDR_MSK (0x00001FFF << PATTERN_WAIT_0_ADDR_OFST) -//FIXME: is mask 3FF +#define PATTERN_WAIT_0_ADDR_OFST (0) +#define PATTERN_WAIT_0_ADDR_MSK (0x00001FFF << PATTERN_WAIT_0_ADDR_OFST) +// FIXME: is mask 3FF /* Pattern Wait 1 RW regiser */ -#define PATTERN_WAIT_1_ADDR_REG (0x5B << MEM_MAP_SHIFT) +#define PATTERN_WAIT_1_ADDR_REG (0x5B << MEM_MAP_SHIFT) -#define PATTERN_WAIT_1_ADDR_OFST (0) -#define PATTERN_WAIT_1_ADDR_MSK (0x00001FFF << PATTERN_WAIT_1_ADDR_OFST) +#define PATTERN_WAIT_1_ADDR_OFST (0) +#define PATTERN_WAIT_1_ADDR_MSK (0x00001FFF << PATTERN_WAIT_1_ADDR_OFST) /* Pattern Wait 2 RW regiser */ -#define PATTERN_WAIT_2_ADDR_REG (0x5C << MEM_MAP_SHIFT) +#define PATTERN_WAIT_2_ADDR_REG (0x5C << MEM_MAP_SHIFT) -#define PATTERN_WAIT_2_ADDR_OFST (0) -#define PATTERN_WAIT_2_ADDR_MSK (0x00001FFF << PATTERN_WAIT_2_ADDR_OFST) +#define PATTERN_WAIT_2_ADDR_OFST (0) +#define PATTERN_WAIT_2_ADDR_MSK (0x00001FFF << PATTERN_WAIT_2_ADDR_OFST) /* Samples RW register */ -#define SAMPLES_REG (0x5D << MEM_MAP_SHIFT) +#define SAMPLES_REG (0x5D << MEM_MAP_SHIFT) -#define SAMPLES_DIGITAL_OFST (0) -#define SAMPLES_DIGITAL_MSK (0x0000FFFF << SAMPLES_DIGITAL_OFST) -#define SAMPLES_ANALOG_OFST (16) -#define SAMPLES_ANALOG_MSK (0x0000FFFF << SAMPLES_ANALOG_OFST) +#define SAMPLES_DIGITAL_OFST (0) +#define SAMPLES_DIGITAL_MSK (0x0000FFFF << SAMPLES_DIGITAL_OFST) +#define SAMPLES_ANALOG_OFST (16) +#define SAMPLES_ANALOG_MSK (0x0000FFFF << SAMPLES_ANALOG_OFST) /** Power RW register */ -#define POWER_REG (0x5E << MEM_MAP_SHIFT) +#define POWER_REG (0x5E << MEM_MAP_SHIFT) -#define POWER_CHIP_OFST (16) -#define POWER_CHIP_MSK (0x00000001 << POWER_CHIP_OFST) -#define POWER_HV_INTERNAL_SLCT_OFST (31) -#define POWER_HV_INTERNAL_SLCT_MSK (0x00000001 << POWER_HV_INTERNAL_SLCT_OFST) +#define POWER_CHIP_OFST (16) +#define POWER_CHIP_MSK (0x00000001 << POWER_CHIP_OFST) +#define POWER_HV_INTERNAL_SLCT_OFST (31) +#define POWER_HV_INTERNAL_SLCT_MSK (0x00000001 << POWER_HV_INTERNAL_SLCT_OFST) /* Number of Words RW register TODO */ -#define NUMBER_OF_WORDS_REG (0x5F << MEM_MAP_SHIFT) - +#define NUMBER_OF_WORDS_REG (0x5F << MEM_MAP_SHIFT) /* Delay 64 bit RW register. t = DLY x 50 ns. */ -#define DELAY_LSB_REG (0x60 << MEM_MAP_SHIFT) -#define DELAY_MSB_REG (0x61 << MEM_MAP_SHIFT) +#define DELAY_LSB_REG (0x60 << MEM_MAP_SHIFT) +#define DELAY_MSB_REG (0x61 << MEM_MAP_SHIFT) /* Triggers 64 bit RW register */ -#define CYCLES_LSB_REG (0x62 << MEM_MAP_SHIFT) -#define CYCLES_MSB_REG (0x63 << MEM_MAP_SHIFT) +#define CYCLES_LSB_REG (0x62 << MEM_MAP_SHIFT) +#define CYCLES_MSB_REG (0x63 << MEM_MAP_SHIFT) /* Frames 64 bit RW register */ -#define FRAMES_LSB_REG (0x64 << MEM_MAP_SHIFT) -#define FRAMES_MSB_REG (0x65 << MEM_MAP_SHIFT) +#define FRAMES_LSB_REG (0x64 << MEM_MAP_SHIFT) +#define FRAMES_MSB_REG (0x65 << MEM_MAP_SHIFT) /* Period 64 bit RW register */ -#define PERIOD_LSB_REG (0x66 << MEM_MAP_SHIFT) -#define PERIOD_MSB_REG (0x67 << MEM_MAP_SHIFT) +#define PERIOD_LSB_REG (0x66 << MEM_MAP_SHIFT) +#define PERIOD_MSB_REG (0x67 << MEM_MAP_SHIFT) /* Period 64 bit RW register */ -//#define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) // Not used in FW -//#define EXPTIME_MSB_REG (0x69 << MEM_MAP_SHIFT) // Not used in FW +//#define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) // +//Not used in FW #define EXPTIME_MSB_REG (0x69 << +//MEM_MAP_SHIFT) // Not used in FW /* Gates 64 bit RW register */ -//#define GATES_LSB_REG (0x6A << MEM_MAP_SHIFT) // Not used in FW -//#define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) // Not used in FW +//#define GATES_LSB_REG (0x6A << MEM_MAP_SHIFT) // Not used +//in FW #define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) // +//Not used in FW /* Pattern IO Control 64 bit RW regiser * Each bit configured as output(1)/ input(0) */ -#define PATTERN_IO_CNTRL_LSB_REG (0x6C << MEM_MAP_SHIFT) -#define PATTERN_IO_CNTRL_MSB_REG (0x6D << MEM_MAP_SHIFT) +#define PATTERN_IO_CNTRL_LSB_REG (0x6C << MEM_MAP_SHIFT) +#define PATTERN_IO_CNTRL_MSB_REG (0x6D << MEM_MAP_SHIFT) /* Pattern IO Clock Control 64 bit RW regiser * When bit n enabled (1), clocked output for DIO[n] (T run clock) * When bit n disabled (0), Dio[n] driven by its pattern output */ -#define PATTERN_IO_CLK_CNTRL_LSB_REG (0x6E << MEM_MAP_SHIFT) -#define PATTERN_IO_CLK_CNTRL_MSB_REG (0x6F << MEM_MAP_SHIFT) +#define PATTERN_IO_CLK_CNTRL_LSB_REG (0x6E << MEM_MAP_SHIFT) +#define PATTERN_IO_CLK_CNTRL_MSB_REG (0x6F << MEM_MAP_SHIFT) /* Pattern In 64 bit RW register */ -#define PATTERN_IN_LSB_REG (0x70 << MEM_MAP_SHIFT) -#define PATTERN_IN_MSB_REG (0x71 << MEM_MAP_SHIFT) +#define PATTERN_IN_LSB_REG (0x70 << MEM_MAP_SHIFT) +#define PATTERN_IN_MSB_REG (0x71 << MEM_MAP_SHIFT) /* Pattern Wait Timer 0 64 bit RW register. t = PWT1 x T run clock */ -#define PATTERN_WAIT_TIMER_0_LSB_REG (0x72 << MEM_MAP_SHIFT) -#define PATTERN_WAIT_TIMER_0_MSB_REG (0x73 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_0_LSB_REG (0x72 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_0_MSB_REG (0x73 << MEM_MAP_SHIFT) /* Pattern Wait Timer 1 64 bit RW register. t = PWT2 x T run clock */ -#define PATTERN_WAIT_TIMER_1_LSB_REG (0x74 << MEM_MAP_SHIFT) -#define PATTERN_WAIT_TIMER_1_MSB_REG (0x75 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_1_LSB_REG (0x74 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_1_MSB_REG (0x75 << MEM_MAP_SHIFT) /* Pattern Wait Timer 2 64 bit RW register. t = PWT3 x T run clock */ -#define PATTERN_WAIT_TIMER_2_LSB_REG (0x76 << MEM_MAP_SHIFT) -#define PATTERN_WAIT_TIMER_2_MSB_REG (0x77 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_2_LSB_REG (0x76 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_2_MSB_REG (0x77 << MEM_MAP_SHIFT) /* Readout enable RW register */ -#define READOUT_10G_ENABLE_REG (0x79 << MEM_MAP_SHIFT) +#define READOUT_10G_ENABLE_REG (0x79 << MEM_MAP_SHIFT) -#define READOUT_10G_ENABLE_ANLG_OFST (0) -#define READOUT_10G_ENABLE_ANLG_MSK (0x000000FF << READOUT_10G_ENABLE_ANLG_OFST) -#define READOUT_10G_ENABLE_DGTL_OFST (8) -#define READOUT_10G_ENABLE_DGTL_MSK (0x00000001 << READOUT_10G_ENABLE_DGTL_OFST) +#define READOUT_10G_ENABLE_ANLG_OFST (0) +#define READOUT_10G_ENABLE_ANLG_MSK (0x000000FF << READOUT_10G_ENABLE_ANLG_OFST) +#define READOUT_10G_ENABLE_DGTL_OFST (8) +#define READOUT_10G_ENABLE_DGTL_MSK (0x00000001 << READOUT_10G_ENABLE_DGTL_OFST) /* Digital Bit External Trigger RW register */ -#define DBIT_EXT_TRG_REG (0x7B << MEM_MAP_SHIFT) // Not used in firmware or software +#define DBIT_EXT_TRG_REG \ + (0x7B << MEM_MAP_SHIFT) // Not used in firmware or software -#define DBIT_EXT_TRG_SRC_OFST (0) -#define DBIT_EXT_TRG_SRC_MSK (0x0000003F << DBIT_EXT_TRG_SRC_OFST) -#define DBIT_EXT_TRG_OPRTN_MD_OFST (16) -#define DBIT_EXT_TRG_OPRTN_MD_MSK (0x00000001 << DBIT_EXT_TRG_OPRTN_MD_OFST) +#define DBIT_EXT_TRG_SRC_OFST (0) +#define DBIT_EXT_TRG_SRC_MSK (0x0000003F << DBIT_EXT_TRG_SRC_OFST) +#define DBIT_EXT_TRG_OPRTN_MD_OFST (16) +#define DBIT_EXT_TRG_OPRTN_MD_MSK (0x00000001 << DBIT_EXT_TRG_OPRTN_MD_OFST) /* Pin Delay 0 RW register */ -#define OUTPUT_DELAY_0_REG (0x7C << MEM_MAP_SHIFT) // Not used in firmware or software +#define OUTPUT_DELAY_0_REG \ + (0x7C << MEM_MAP_SHIFT) // Not used in firmware or software -#define OUTPUT_DELAY_0_OTPT_STTNG_STEPS (25) -#define OUTPUT_DELAY_0_OTPT_STTNG_OFST (0) //t = OTPT_STTNG * 25 ps, max for Cyclone V = 775 ps -#define OUTPUT_DELAY_0_OTPT_STTNG_MSK (0x0000001F << OUTPUT_DELAY_0_OTPT_STTNG_OFST) -// 1: load dynamic output settings, 0: trigger start of dynamic output delay configuration pn falling edge of ODT (output delay trigger) bit -#define OUTPUT_DELAY_0_OTPT_TRGGR_OFST (31) -#define OUTPUT_DELAY_0_OTPT_TRGGR_MSK (0x00000001 << OUTPUT_DELAY_0_OTPT_TRGGR_OFST) -#define OUTPUT_DELAY_0_OTPT_TRGGR_LD_VAL (1) -#define OUTPUT_DELAY_0_OTPT_TRGGR_STRT_VAL (0) +#define OUTPUT_DELAY_0_OTPT_STTNG_STEPS (25) +#define OUTPUT_DELAY_0_OTPT_STTNG_OFST \ + (0) // t = OTPT_STTNG * 25 ps, max for Cyclone V = 775 ps +#define OUTPUT_DELAY_0_OTPT_STTNG_MSK \ + (0x0000001F << OUTPUT_DELAY_0_OTPT_STTNG_OFST) +// 1: load dynamic output settings, 0: trigger start of dynamic output delay +// configuration pn falling edge of ODT (output delay trigger) bit +#define OUTPUT_DELAY_0_OTPT_TRGGR_OFST (31) +#define OUTPUT_DELAY_0_OTPT_TRGGR_MSK \ + (0x00000001 << OUTPUT_DELAY_0_OTPT_TRGGR_OFST) +#define OUTPUT_DELAY_0_OTPT_TRGGR_LD_VAL (1) +#define OUTPUT_DELAY_0_OTPT_TRGGR_STRT_VAL (0) /* Pin Delay 1 RW register * Each bit configured as enable for dynamic output delay configuration */ -#define PIN_DELAY_1_REG (0x7D << MEM_MAP_SHIFT) // Not used in firmware or software +#define PIN_DELAY_1_REG \ + (0x7D << MEM_MAP_SHIFT) // Not used in firmware or software /** Pattern Mask 64 bit RW regiser */ -#define PATTERN_MASK_LSB_REG (0x80 << MEM_MAP_SHIFT) -#define PATTERN_MASK_MSB_REG (0x81 << MEM_MAP_SHIFT) +#define PATTERN_MASK_LSB_REG (0x80 << MEM_MAP_SHIFT) +#define PATTERN_MASK_MSB_REG (0x81 << MEM_MAP_SHIFT) /** Pattern Set 64 bit RW regiser */ -#define PATTERN_SET_LSB_REG (0x82 << MEM_MAP_SHIFT) -#define PATTERN_SET_MSB_REG (0x83 << MEM_MAP_SHIFT) +#define PATTERN_SET_LSB_REG (0x82 << MEM_MAP_SHIFT) +#define PATTERN_SET_MSB_REG (0x83 << MEM_MAP_SHIFT) /* Round Robin */ -#define RXR_ENDPOINT_START_REG (0x1000 << MEM_MAP_SHIFT) - - +#define RXR_ENDPOINT_START_REG (0x1000 << MEM_MAP_SHIFT) diff --git a/slsDetectorServers/moenchDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/moenchDetectorServer/slsDetectorServer_defs.h old mode 100755 new mode 100644 index f7b5801f5..060ab08ae --- a/slsDetectorServers/moenchDetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/moenchDetectorServer/slsDetectorServer_defs.h @@ -1,128 +1,143 @@ #pragma once -#include "sls_detector_defs.h" #include "RegisterDefs.h" +#include "sls_detector_defs.h" +#define MIN_REQRD_VRSN_T_RD_API 0x180314 +#define REQRD_FRMWR_VRSN 0x200302 -#define MIN_REQRD_VRSN_T_RD_API 0x180314 -#define REQRD_FRMWR_VRSN 0x200302 - -#define CTRL_SRVR_INIT_TIME_US (2 * 1000 * 1000) +#define CTRL_SRVR_INIT_TIME_US (2 * 1000 * 1000) /* Struct Definitions */ typedef struct udp_header_struct { - uint32_t udp_destmac_msb; - uint16_t udp_srcmac_msb; - uint16_t udp_destmac_lsb; - uint32_t udp_srcmac_lsb; - uint8_t ip_tos; - uint8_t ip_ihl: 4, ip_ver: 4; - uint16_t udp_ethertype; - uint16_t ip_identification; - uint16_t ip_totallength; - uint8_t ip_protocol; - uint8_t ip_ttl; - uint16_t ip_fragmentoffset: 13, ip_flags: 3; - uint16_t ip_srcip_msb; - uint16_t ip_checksum; - uint16_t ip_destip_msb; - uint16_t ip_srcip_lsb; - uint16_t udp_srcport; - uint16_t ip_destip_lsb; - uint16_t udp_checksum; - uint16_t udp_destport; + uint32_t udp_destmac_msb; + uint16_t udp_srcmac_msb; + uint16_t udp_destmac_lsb; + uint32_t udp_srcmac_lsb; + uint8_t ip_tos; + uint8_t ip_ihl : 4, ip_ver : 4; + uint16_t udp_ethertype; + uint16_t ip_identification; + uint16_t ip_totallength; + uint8_t ip_protocol; + uint8_t ip_ttl; + uint16_t ip_fragmentoffset : 13, ip_flags : 3; + uint16_t ip_srcip_msb; + uint16_t ip_checksum; + uint16_t ip_destip_msb; + uint16_t ip_srcip_lsb; + uint16_t udp_srcport; + uint16_t ip_destip_lsb; + uint16_t udp_checksum; + uint16_t udp_destport; } udp_header; -#define IP_HEADER_SIZE (20) -#define UDP_IP_HEADER_LENGTH_BYTES (28) +#define IP_HEADER_SIZE (20) +#define UDP_IP_HEADER_LENGTH_BYTES (28) /* Enums */ -enum DACINDEX {MO_VBP_COLBUF, MO_VIPRE, MO_VIN_CM, MO_VB_SDA, MO_VCASC_SFP, MO_VOUT_CM, MO_VIPRE_CDS, MO_IBIAS_SFP}; -#define DAC_NAMES "vbp_colbuf", "vipre", "vin_cm", "vb_sda", "vcasc_sfp", "vout_cm", "vipre_cds", "ibias_sfp" -#define DEFAULT_DAC_VALS { 1300, /* MO_VBP_COLBUF */ \ - 1000, /* MO_VIPRE */ \ - 1400, /* MO_VIN_CM */ \ - 680, /* MO_VB_SDA */ \ - 1428, /* MO_VCASC_SFP */ \ - 1200, /* MO_VOUT_CM */ \ - 800, /* MO_VIPRE_CDS */ \ - 900 /* MO_IBIAS_SFP */ \ - }; +enum DACINDEX { + MO_VBP_COLBUF, + MO_VIPRE, + MO_VIN_CM, + MO_VB_SDA, + MO_VCASC_SFP, + MO_VOUT_CM, + MO_VIPRE_CDS, + MO_IBIAS_SFP +}; +#define DAC_NAMES \ + "vbp_colbuf", "vipre", "vin_cm", "vb_sda", "vcasc_sfp", "vout_cm", \ + "vipre_cds", "ibias_sfp" +#define DEFAULT_DAC_VALS \ + { \ + 1300, /* MO_VBP_COLBUF */ \ + 1000, /* MO_VIPRE */ \ + 1400, /* MO_VIN_CM */ \ + 680, /* MO_VB_SDA */ \ + 1428, /* MO_VCASC_SFP */ \ + 1200, /* MO_VOUT_CM */ \ + 800, /* MO_VIPRE_CDS */ \ + 900 /* MO_IBIAS_SFP */ \ + }; -enum CLKINDEX {RUN_CLK, ADC_CLK, SYNC_CLK, DBIT_CLK, NUM_CLOCKS}; -#define CLK_NAMES "run", "adc", "sync", "dbit" +enum CLKINDEX { RUN_CLK, ADC_CLK, SYNC_CLK, DBIT_CLK, NUM_CLOCKS }; +#define CLK_NAMES "run", "adc", "sync", "dbit" /* Hardware Definitions */ -#define NCHAN (32) -#define NCHIP (1) -#define NDAC (8) -#define DYNAMIC_RANGE (16) -#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8) -#define CLK_FREQ (156.25) /* MHz */ -#define NSAMPLES_PER_ROW (25) -#define NCHANS_PER_ADC (25) +#define NCHAN (32) +#define NCHIP (1) +#define NDAC (8) +#define DYNAMIC_RANGE (16) +#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8) +#define CLK_FREQ (156.25) /* MHz */ +#define NSAMPLES_PER_ROW (25) +#define NCHANS_PER_ADC (25) /** Default Parameters */ -#define DEFAULT_PATTERN_FILE ("DefaultPattern.txt") -#define DEFAULT_DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL) -#define DEFAULT_NUM_SAMPLES (5000) -#define DEFAULT_EXPTIME (0) -#define DEFAULT_NUM_FRAMES (1) -#define DEFAULT_NUM_CYCLES (1) -#define DEFAULT_PERIOD (1 * 1000 * 1000) //ns -#define DEFAULT_DELAY (0) -#define DEFAULT_HIGH_VOLTAGE (0) -#define DEFAULT_VLIMIT (-100) -#define DEFAULT_TIMING_MODE (AUTO_TIMING) -#define DEFAULT_TX_UDP_PORT (0x7e9a) +#define DEFAULT_PATTERN_FILE ("DefaultPattern.txt") +#define DEFAULT_DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL) +#define DEFAULT_NUM_SAMPLES (5000) +#define DEFAULT_EXPTIME (0) +#define DEFAULT_NUM_FRAMES (1) +#define DEFAULT_NUM_CYCLES (1) +#define DEFAULT_PERIOD (1 * 1000 * 1000) // ns +#define DEFAULT_DELAY (0) +#define DEFAULT_HIGH_VOLTAGE (0) +#define DEFAULT_VLIMIT (-100) +#define DEFAULT_TIMING_MODE (AUTO_TIMING) +#define DEFAULT_TX_UDP_PORT (0x7e9a) #define DEFAULT_RUN_CLK_AT_STARTUP (200) // 40 -#define DEFAULT_ADC_CLK_AT_STARTUP (40) // 20 -#define DEFAULT_SYNC_CLK_AT_STARTUP (40) // 20 +#define DEFAULT_ADC_CLK_AT_STARTUP (40) // 20 +#define DEFAULT_SYNC_CLK_AT_STARTUP (40) // 20 #define DEFAULT_DBIT_CLK_AT_STARTUP (200) -#define DEFAULT_RUN_CLK (40) -#define DEFAULT_ADC_CLK (20) -#define DEFAULT_DBIT_CLK (40) -#define DEFAULT_ADC_PHASE_DEG (30) +#define DEFAULT_RUN_CLK (40) +#define DEFAULT_ADC_CLK (20) +#define DEFAULT_DBIT_CLK (40) +#define DEFAULT_ADC_PHASE_DEG (30) -#define DEFAULT_PIPELINE (15) -#define DEFAULT_SETTINGS (G4_HIGHGAIN) +#define DEFAULT_PIPELINE (15) +#define DEFAULT_SETTINGS (G4_HIGHGAIN) // settings -#define DEFAULT_PATSETBIT (0x00000C800000800AULL) -#define G1_HIGHGAIN_PATMASK (0x00000C0000008008ULL) -#define G1_LOWGAIN_PATMASK (0x0000040000008000ULL) -#define G2_HIGHCAP_HIGHGAIN_PATMASK (0x0000080000000008ULL) -#define G2_HIGHCAP_LOWGAIN_PATMASK (0x0000000000000000ULL) -#define G2_LOWCAP_HIGHGAIN_PATMASK (0x00000C800000800AULL) -#define G2_LOWCAP_LOWGAIN_PATMASK (0x0000048000008002ULL) -#define G4_HIGHGAIN_PATMASK (0x000008800000000AULL) -#define G4_LOWGAIN_PATMASK (0x0000008000000002ULL) +#define DEFAULT_PATSETBIT (0x00000C800000800AULL) +#define G1_HIGHGAIN_PATMASK (0x00000C0000008008ULL) +#define G1_LOWGAIN_PATMASK (0x0000040000008000ULL) +#define G2_HIGHCAP_HIGHGAIN_PATMASK (0x0000080000000008ULL) +#define G2_HIGHCAP_LOWGAIN_PATMASK (0x0000000000000000ULL) +#define G2_LOWCAP_HIGHGAIN_PATMASK (0x00000C800000800AULL) +#define G2_LOWCAP_LOWGAIN_PATMASK (0x0000048000008002ULL) +#define G4_HIGHGAIN_PATMASK (0x000008800000000AULL) +#define G4_LOWGAIN_PATMASK (0x0000008000000002ULL) -#define HIGHVOLTAGE_MIN (60) -#define HIGHVOLTAGE_MAX (200) // min dac val -#define DAC_MIN_MV (0) -#define DAC_MAX_MV (2500) +#define HIGHVOLTAGE_MIN (60) +#define HIGHVOLTAGE_MAX (200) // min dac val +#define DAC_MIN_MV (0) +#define DAC_MAX_MV (2500) /* Defines in the Firmware */ -#define MAX_PATTERN_LENGTH (0x2000) -#define DIGITAL_IO_DELAY_MAXIMUM_PS ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * OUTPUT_DELAY_0_OTPT_STTNG_STEPS) -#define MAX_PHASE_SHIFTS_STEPS (8) +#define MAX_PATTERN_LENGTH (0x2000) +#define DIGITAL_IO_DELAY_MAXIMUM_PS \ + ((OUTPUT_DELAY_0_OTPT_STTNG_MSK >> OUTPUT_DELAY_0_OTPT_STTNG_OFST) * \ + OUTPUT_DELAY_0_OTPT_STTNG_STEPS) +#define MAX_PHASE_SHIFTS_STEPS (8) -#define WAIT_TME_US_FR_ACQDONE_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo -#define WAIT_TIME_US_PLL (10 * 1000) -#define WAIT_TIME_US_STP_ACQ (100) -#define WAIT_TIME_CONFIGURE_MAC (2 * 1000 * 1000) -#define WAIT_TIME_PATTERN_READ (10) -#define WAIT_TIME_1US_FOR_LOOP_CNT (50) // around 30 is 1 us in blackfin +#define WAIT_TME_US_FR_ACQDONE_REG \ + (100) // wait time in us after acquisition done to ensure there is no data + // in fifo +#define WAIT_TIME_US_PLL (10 * 1000) +#define WAIT_TIME_US_STP_ACQ (100) +#define WAIT_TIME_CONFIGURE_MAC (2 * 1000 * 1000) +#define WAIT_TIME_PATTERN_READ (10) +#define WAIT_TIME_1US_FOR_LOOP_CNT (50) // around 30 is 1 us in blackfin /* MSB & LSB DEFINES */ -#define MSB_OF_64_BIT_REG_OFST (32) -#define LSB_OF_64_BIT_REG_OFST (0) -#define BIT32_MSK (0xFFFFFFFF) -#define BIT16_MASK (0xFFFF) - -#define ADC_PORT_INVERT_VAL (0x4a342593) -#define MAXIMUM_ADC_CLK (20) -#define PLL_VCO_FREQ_MHZ (800) +#define MSB_OF_64_BIT_REG_OFST (32) +#define LSB_OF_64_BIT_REG_OFST (0) +#define BIT32_MSK (0xFFFFFFFF) +#define BIT16_MASK (0xFFFF) +#define ADC_PORT_INVERT_VAL (0x4a342593) +#define MAXIMUM_ADC_CLK (20) +#define PLL_VCO_FREQ_MHZ (800) diff --git a/slsDetectorServers/mythen3DetectorServer/RegisterDefs.h b/slsDetectorServers/mythen3DetectorServer/RegisterDefs.h index 54ee93c9a..4cc54b714 100644 --- a/slsDetectorServers/mythen3DetectorServer/RegisterDefs.h +++ b/slsDetectorServers/mythen3DetectorServer/RegisterDefs.h @@ -1,315 +1,326 @@ #pragma once - -#define REG_OFFSET (4) +#define REG_OFFSET (4) /* Base addresses 0x1804 0000 ---------------------------------------------*/ /* Reconfiguration core for readout pll */ -#define BASE_READOUT_PLL (0x0000) // 0x1804_0000 - 0x1804_07FF +#define BASE_READOUT_PLL (0x0000) // 0x1804_0000 - 0x1804_07FF /* Reconfiguration core for system pll */ -#define BASE_SYSTEM_PLL (0x0800) // 0x1804_0800 - 0x1804_0FFF +#define BASE_SYSTEM_PLL (0x0800) // 0x1804_0800 - 0x1804_0FFF /* Clock Generation */ -#define BASE_CLK_GENERATION (0x1000) // 0x1804_1000 - 0x1804_XXXX //TODO +#define BASE_CLK_GENERATION (0x1000) // 0x1804_1000 - 0x1804_XXXX //TODO /* Base addresses 0x1806 0000 ---------------------------------------------*/ /* General purpose control and status registers */ -#define BASE_CONTROL (0x0000) // 0x1806_0000 - 0x1806_00FF +#define BASE_CONTROL (0x0000) // 0x1806_0000 - 0x1806_00FF // https://git.psi.ch/sls_detectors_firmware/mythen_III_mcb/blob/master/code/hdl/ctrl/ctrl.vhd /* ASIC Control */ -#define BASE_ASIC (0x0100) // 0x1806_0100 - 0x1806_010F +#define BASE_ASIC (0x0100) // 0x1806_0100 - 0x1806_010F /* ASIC Digital Interface. Data recovery core */ -#define BASE_ADIF (0x0110) // 0x1806_0110 - 0x1806_011F +#define BASE_ADIF (0x0110) // 0x1806_0110 - 0x1806_011F // https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/2e81ccbdbc5cb81813ba190fbdba43e8d6884eb9/adif/adif_ctrl.vhd /* Formatting of data core */ -#define BASE_FMT (0x0120) // 0x1806_0120 - 0x1806_012F +#define BASE_FMT (0x0120) // 0x1806_0120 - 0x1806_012F /* Packetizer */ -#define BASE_PKT (0x0140) // 0x1806_0140 - 0x1806_014F +#define BASE_PKT (0x0140) // 0x1806_0140 - 0x1806_014F // https://git.psi.ch/sls_detectors_firmware/mythen_III_mcb/blob/master/code/hdl/pkt/pkt_ctrl.vhd /* Pattern control and status registers */ -#define BASE_PATTERN_CONTROL (0x00200) // 0x1806_0200 - 0x1806_02FF +#define BASE_PATTERN_CONTROL (0x00200) // 0x1806_0200 - 0x1806_02FF // https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/2e81ccbdbc5cb81813ba190fbdba43e8d6884eb9/pattern_flow/pattern_flow_ctrl.vhd /* UDP datagram generator */ -#define BASE_UDP_RAM (0x01000) // 0x1806_1000 - 0x1806_1FFF +#define BASE_UDP_RAM (0x01000) // 0x1806_1000 - 0x1806_1FFF /* Pattern RAM. Pattern table */ -#define BASE_PATTERN_RAM (0x10000) // 0x1807_0000 - 0x1807_FFFF - - - -/* Clock Generation registers ------------------------------------------------------*/ -#define PLL_RESET_REG (0x00 * REG_OFFSET + BASE_CLK_GENERATION) - -#define PLL_RESET_READOUT_OFST (0) -#define PLL_RESET_READOUT_MSK (0x00000001 << PLL_RESET_READOUT_OFST) -#define PLL_RESET_SYSTEM_OFST (1) -#define PLL_RESET_SYSTEM_MSK (0x00000001 << PLL_RESET_SYSTEM_OFST) +#define BASE_PATTERN_RAM (0x10000) // 0x1807_0000 - 0x1807_FFFF +/* Clock Generation registers + * ------------------------------------------------------*/ +#define PLL_RESET_REG (0x00 * REG_OFFSET + BASE_CLK_GENERATION) +#define PLL_RESET_READOUT_OFST (0) +#define PLL_RESET_READOUT_MSK (0x00000001 << PLL_RESET_READOUT_OFST) +#define PLL_RESET_SYSTEM_OFST (1) +#define PLL_RESET_SYSTEM_MSK (0x00000001 << PLL_RESET_SYSTEM_OFST) /* Control registers --------------------------------------------------*/ /* Module Control Board Serial Number Register */ -#define MCB_SERIAL_NO_REG (0x00 * REG_OFFSET + BASE_CONTROL) +#define MCB_SERIAL_NO_REG (0x00 * REG_OFFSET + BASE_CONTROL) -#define MCB_SERIAL_NO_VRSN_OFST (16) -#define MCB_SERIAL_NO_VRSN_MSK (0x0000001F << MCB_SERIAL_NO_VRSN_OFST) +#define MCB_SERIAL_NO_VRSN_OFST (16) +#define MCB_SERIAL_NO_VRSN_MSK (0x0000001F << MCB_SERIAL_NO_VRSN_OFST) /* FPGA Version register */ -#define FPGA_VERSION_REG (0x01 * REG_OFFSET + BASE_CONTROL) - -#define FPGA_COMPILATION_DATE_OFST (0) -#define FPGA_COMPILATION_DATE_MSK (0x00FFFFFF << FPGA_COMPILATION_DATE_OFST) -#define DETECTOR_TYPE_OFST (24) -#define DETECTOR_TYPE_MSK (0x000000FF << DETECTOR_TYPE_OFST) +#define FPGA_VERSION_REG (0x01 * REG_OFFSET + BASE_CONTROL) +#define FPGA_COMPILATION_DATE_OFST (0) +#define FPGA_COMPILATION_DATE_MSK (0x00FFFFFF << FPGA_COMPILATION_DATE_OFST) +#define DETECTOR_TYPE_OFST (24) +#define DETECTOR_TYPE_MSK (0x000000FF << DETECTOR_TYPE_OFST) /* API Version Register */ -#define API_VERSION_REG (0x02 * REG_OFFSET + BASE_CONTROL) +#define API_VERSION_REG (0x02 * REG_OFFSET + BASE_CONTROL) -#define API_VERSION_OFST (0) -#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST) -#define API_VERSION_DETECTOR_TYPE_OFST (24) //Not used in software -#define API_VERSION_DETECTOR_TYPE_MSK (0x000000FF << API_VERSION_DETECTOR_TYPE_OFST) //Not used in software +#define API_VERSION_OFST (0) +#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST) +#define API_VERSION_DETECTOR_TYPE_OFST (24) // Not used in software +#define API_VERSION_DETECTOR_TYPE_MSK \ + (0x000000FF << API_VERSION_DETECTOR_TYPE_OFST) // Not used in software /* Fix pattern register */ -#define FIX_PATT_REG (0x03 * REG_OFFSET + BASE_CONTROL) -#define FIX_PATT_VAL (0xACDC2019) +#define FIX_PATT_REG (0x03 * REG_OFFSET + BASE_CONTROL) +#define FIX_PATT_VAL (0xACDC2019) /* Status register */ -#define STATUS_REG (0x04 * REG_OFFSET + BASE_CONTROL) +#define STATUS_REG (0x04 * REG_OFFSET + BASE_CONTROL) /* Look at me register, read only */ -#define LOOK_AT_ME_REG (0x05 * REG_OFFSET + BASE_CONTROL) //Not used in firmware or software, good to play with - -#define SYSTEM_STATUS_REG (0x06 * REG_OFFSET + BASE_CONTROL) //Not used in software +#define LOOK_AT_ME_REG \ + (0x05 * REG_OFFSET + \ + BASE_CONTROL) // Not used in firmware or software, good to play with +#define SYSTEM_STATUS_REG \ + (0x06 * REG_OFFSET + BASE_CONTROL) // Not used in software /* Config RW regiseter */ -#define CONFIG_REG (0x20 * REG_OFFSET + BASE_CONTROL) -#define CONFIG_COUNTER_ENA_OFST (0) -#define CONFIG_COUNTER_ENA_MSK (0x00000003 << CONFIG_COUNTER_ENA_OFST) -#define CONFIG_COUNTER_ENA_DEFAULT_VAL ((0x0 << CONFIG_COUNTER_ENA_OFST) & CONFIG_COUNTER_ENA_MSK) -#define CONFIG_COUNTER_ENA_1_VAL ((0x1 << CONFIG_COUNTER_ENA_OFST) & CONFIG_COUNTER_ENA_MSK) -#define CONFIG_COUNTER_ENA_2_VAL ((0x2 << CONFIG_COUNTER_ENA_OFST) & CONFIG_COUNTER_ENA_MSK) -#define CONFIG_COUNTER_ENA_ALL_VAL ((0x3 << CONFIG_COUNTER_ENA_OFST) & CONFIG_COUNTER_ENA_MSK) -#define CONFIG_DYNAMIC_RANGE_OFST (4) -#define CONFIG_DYNAMIC_RANGE_MSK (0x00000003 << CONFIG_DYNAMIC_RANGE_OFST) -#define CONFIG_DYNAMIC_RANGE_1_VAL ((0x0 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK) -#define CONFIG_DYNAMIC_RANGE_4_VAL ((0x1 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK) -#define CONFIG_DYNAMIC_RANGE_16_VAL ((0x2 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK) -#define CONFIG_DYNAMIC_RANGE_24_VAL ((0x3 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK) +#define CONFIG_REG (0x20 * REG_OFFSET + BASE_CONTROL) +#define CONFIG_COUNTER_ENA_OFST (0) +#define CONFIG_COUNTER_ENA_MSK (0x00000003 << CONFIG_COUNTER_ENA_OFST) +#define CONFIG_COUNTER_ENA_DEFAULT_VAL \ + ((0x0 << CONFIG_COUNTER_ENA_OFST) & CONFIG_COUNTER_ENA_MSK) +#define CONFIG_COUNTER_ENA_1_VAL \ + ((0x1 << CONFIG_COUNTER_ENA_OFST) & CONFIG_COUNTER_ENA_MSK) +#define CONFIG_COUNTER_ENA_2_VAL \ + ((0x2 << CONFIG_COUNTER_ENA_OFST) & CONFIG_COUNTER_ENA_MSK) +#define CONFIG_COUNTER_ENA_ALL_VAL \ + ((0x3 << CONFIG_COUNTER_ENA_OFST) & CONFIG_COUNTER_ENA_MSK) +#define CONFIG_DYNAMIC_RANGE_OFST (4) +#define CONFIG_DYNAMIC_RANGE_MSK (0x00000003 << CONFIG_DYNAMIC_RANGE_OFST) +#define CONFIG_DYNAMIC_RANGE_1_VAL \ + ((0x0 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK) +#define CONFIG_DYNAMIC_RANGE_4_VAL \ + ((0x1 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK) +#define CONFIG_DYNAMIC_RANGE_16_VAL \ + ((0x2 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK) +#define CONFIG_DYNAMIC_RANGE_24_VAL \ + ((0x3 << CONFIG_DYNAMIC_RANGE_OFST) & CONFIG_DYNAMIC_RANGE_MSK) -/* Control RW register */ -#define CONTROL_REG (0x21 * REG_OFFSET + BASE_CONTROL) +/* Control RW register */ +#define CONTROL_REG (0x21 * REG_OFFSET + BASE_CONTROL) -#define CONTROL_STRT_ACQSTN_OFST (0) -#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST) -#define CONTROL_STP_ACQSTN_OFST (1) -#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) -#define CONTROL_CRE_RST_OFST (10) -#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) -#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? -#define CONTROL_PRPHRL_RST_MSK (0x00000001 << CONTROL_PRPHRL_RST_OFST) -#define CONTROL_CLR_ACQSTN_FIFO_OFST (15) -#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST) -#define CONTROL_PWR_CHIP_OFST (31) -#define CONTROL_PWR_CHIP_MSK (0x00000001 << CONTROL_PWR_CHIP_OFST) +#define CONTROL_STRT_ACQSTN_OFST (0) +#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST) +#define CONTROL_STP_ACQSTN_OFST (1) +#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) +#define CONTROL_CRE_RST_OFST (10) +#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) +#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? +#define CONTROL_PRPHRL_RST_MSK (0x00000001 << CONTROL_PRPHRL_RST_OFST) +#define CONTROL_CLR_ACQSTN_FIFO_OFST (15) +#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST) +#define CONTROL_PWR_CHIP_OFST (31) +#define CONTROL_PWR_CHIP_MSK (0x00000001 << CONTROL_PWR_CHIP_OFST) /* Pattern IO Control 64 bit register */ -#define PATTERN_IO_CTRL_LSB_REG (0x22 * REG_OFFSET + BASE_CONTROL) -#define PATTERN_IO_CTRL_MSB_REG (0x23 * REG_OFFSET + BASE_CONTROL) - -#define DTA_OFFSET_REG (0x24 * REG_OFFSET + BASE_CONTROL) - +#define PATTERN_IO_CTRL_LSB_REG (0x22 * REG_OFFSET + BASE_CONTROL) +#define PATTERN_IO_CTRL_MSB_REG (0x23 * REG_OFFSET + BASE_CONTROL) +#define DTA_OFFSET_REG (0x24 * REG_OFFSET + BASE_CONTROL) /* Packetizer -------------------------------------------------------------*/ /* Packetizer Config Register */ -#define PKT_CONFIG_REG (0x00 * REG_OFFSET + BASE_PKT) +#define PKT_CONFIG_REG (0x00 * REG_OFFSET + BASE_PKT) -#define PKT_CONFIG_NRXR_MAX_OFST (0) -#define PKT_CONFIG_NRXR_MAX_MSK (0x0000003F << PKT_CONFIG_NRXR_MAX_OFST) -#define PKT_CONFIG_RXR_START_ID_OFST (8) -#define PKT_CONFIG_RXR_START_ID_MSK (0x0000003F << PKT_CONFIG_RXR_START_ID_OFST) +#define PKT_CONFIG_NRXR_MAX_OFST (0) +#define PKT_CONFIG_NRXR_MAX_MSK (0x0000003F << PKT_CONFIG_NRXR_MAX_OFST) +#define PKT_CONFIG_RXR_START_ID_OFST (8) +#define PKT_CONFIG_RXR_START_ID_MSK (0x0000003F << PKT_CONFIG_RXR_START_ID_OFST) /* Module Coordinates Register */ -#define COORD_0_REG (0x02 * REG_OFFSET + BASE_PKT) -#define COORD_ROW_OFST (0) -#define COORD_ROW_MSK (0x0000FFFF << COORD_ROW_OFST) -#define COORD_COL_OFST (16) -#define COORD_COL_MSK (0x0000FFFF << COORD_COL_OFST) +#define COORD_0_REG (0x02 * REG_OFFSET + BASE_PKT) +#define COORD_ROW_OFST (0) +#define COORD_ROW_MSK (0x0000FFFF << COORD_ROW_OFST) +#define COORD_COL_OFST (16) +#define COORD_COL_MSK (0x0000FFFF << COORD_COL_OFST) /* Module ID Register */ -#define COORD_1_REG (0x03 * REG_OFFSET + BASE_PKT) -#define COORD_RESERVED_OFST (0) -#define COORD_RESERVED_MSK (0x0000FFFF << COORD_RESERVED_OFST) -#define COORD_ID_OFST (16) // Not connected in firmware TODO -#define COORD_ID_MSK (0x0000FFFF << COORD_ID_OFST) // Not connected in firmware TODO +#define COORD_1_REG (0x03 * REG_OFFSET + BASE_PKT) +#define COORD_RESERVED_OFST (0) +#define COORD_RESERVED_MSK (0x0000FFFF << COORD_RESERVED_OFST) +#define COORD_ID_OFST (16) // Not connected in firmware TODO +#define COORD_ID_MSK \ + (0x0000FFFF << COORD_ID_OFST) // Not connected in firmware TODO - -/* Pattern Control registers --------------------------------------------------*/ +/* Pattern Control registers + * --------------------------------------------------*/ /* Pattern status Register*/ -#define PAT_STATUS_REG (0x00 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PAT_STATUS_RUN_BUSY_OFST (0) -#define PAT_STATUS_RUN_BUSY_MSK (0x00000001 << PAT_STATUS_RUN_BUSY_OFST) -#define PAT_STATUS_WAIT_FOR_TRGGR_OFST (3) -#define PAT_STATUS_WAIT_FOR_TRGGR_MSK (0x00000001 << PAT_STATUS_WAIT_FOR_TRGGR_OFST) -#define PAT_STATUS_DLY_BFRE_TRGGR_OFST (4) -#define PAT_STATUS_DLY_BFRE_TRGGR_MSK (0x00000001 << PAT_STATUS_DLY_BFRE_TRGGR_OFST) -#define PAT_STATUS_FIFO_FULL_OFST (5) -#define PAT_STATUS_FIFO_FULL_MSK (0x00000001 << PAT_STATUS_FIFO_FULL_OFST) -#define PAT_STATUS_DLY_AFTR_TRGGR_OFST (15) -#define PAT_STATUS_DLY_AFTR_TRGGR_MSK (0x00000001 << PAT_STATUS_DLY_AFTR_TRGGR_OFST) -#define PAT_STATUS_CSM_BUSY_OFST (17) -#define PAT_STATUS_CSM_BUSY_MSK (0x00000001 << PAT_STATUS_CSM_BUSY_OFST) +#define PAT_STATUS_REG (0x00 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PAT_STATUS_RUN_BUSY_OFST (0) +#define PAT_STATUS_RUN_BUSY_MSK (0x00000001 << PAT_STATUS_RUN_BUSY_OFST) +#define PAT_STATUS_WAIT_FOR_TRGGR_OFST (3) +#define PAT_STATUS_WAIT_FOR_TRGGR_MSK \ + (0x00000001 << PAT_STATUS_WAIT_FOR_TRGGR_OFST) +#define PAT_STATUS_DLY_BFRE_TRGGR_OFST (4) +#define PAT_STATUS_DLY_BFRE_TRGGR_MSK \ + (0x00000001 << PAT_STATUS_DLY_BFRE_TRGGR_OFST) +#define PAT_STATUS_FIFO_FULL_OFST (5) +#define PAT_STATUS_FIFO_FULL_MSK (0x00000001 << PAT_STATUS_FIFO_FULL_OFST) +#define PAT_STATUS_DLY_AFTR_TRGGR_OFST (15) +#define PAT_STATUS_DLY_AFTR_TRGGR_MSK \ + (0x00000001 << PAT_STATUS_DLY_AFTR_TRGGR_OFST) +#define PAT_STATUS_CSM_BUSY_OFST (17) +#define PAT_STATUS_CSM_BUSY_MSK (0x00000001 << PAT_STATUS_CSM_BUSY_OFST) /* Delay left 64bit Register */ -#define GET_DELAY_LSB_REG (0x02 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define GET_DELAY_MSB_REG (0x03 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define GET_DELAY_LSB_REG (0x02 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define GET_DELAY_MSB_REG (0x03 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Triggers left 64bit Register */ -#define GET_CYCLES_LSB_REG (0x04 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define GET_CYCLES_MSB_REG (0x05 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define GET_CYCLES_LSB_REG (0x04 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define GET_CYCLES_MSB_REG (0x05 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Frames left 64bit Register */ -#define GET_FRAMES_LSB_REG (0x06 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define GET_FRAMES_MSB_REG (0x07 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define GET_FRAMES_LSB_REG (0x06 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define GET_FRAMES_MSB_REG (0x07 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Period left 64bit Register */ -#define GET_PERIOD_LSB_REG (0x08 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define GET_PERIOD_MSB_REG (0x09 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define GET_PERIOD_LSB_REG (0x08 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define GET_PERIOD_MSB_REG (0x09 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Time from Start 64 bit register */ -#define TIME_FROM_START_LSB_REG (0x0A * REG_OFFSET + BASE_PATTERN_CONTROL) -#define TIME_FROM_START_MSB_REG (0x0B * REG_OFFSET + BASE_PATTERN_CONTROL) +#define TIME_FROM_START_LSB_REG (0x0A * REG_OFFSET + BASE_PATTERN_CONTROL) +#define TIME_FROM_START_MSB_REG (0x0B * REG_OFFSET + BASE_PATTERN_CONTROL) -/* Get Frames from Start 64 bit register (frames from last reset using CONTROL_CRST) */ -#define FRAMES_FROM_START_LSB_REG (0x0C * REG_OFFSET + BASE_PATTERN_CONTROL) -#define FRAMES_FROM_START_MSB_REG (0x0D * REG_OFFSET + BASE_PATTERN_CONTROL) +/* Get Frames from Start 64 bit register (frames from last reset using + * CONTROL_CRST) */ +#define FRAMES_FROM_START_LSB_REG (0x0C * REG_OFFSET + BASE_PATTERN_CONTROL) +#define FRAMES_FROM_START_MSB_REG (0x0D * REG_OFFSET + BASE_PATTERN_CONTROL) /* Measurement Time 64 bit register (timestamp at a frame start until reset)*/ -#define START_FRAME_TIME_LSB_REG (0x0E * REG_OFFSET + BASE_PATTERN_CONTROL) -#define START_FRAME_TIME_MSB_REG (0x0F * REG_OFFSET + BASE_PATTERN_CONTROL) +#define START_FRAME_TIME_LSB_REG (0x0E * REG_OFFSET + BASE_PATTERN_CONTROL) +#define START_FRAME_TIME_MSB_REG (0x0F * REG_OFFSET + BASE_PATTERN_CONTROL) /* Delay 64bit Write-register */ -#define SET_DELAY_LSB_REG (0x22 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define SET_DELAY_MSB_REG (0x23 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define SET_DELAY_LSB_REG (0x22 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define SET_DELAY_MSB_REG (0x23 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Cylces 64bit Write-register */ -#define SET_CYCLES_LSB_REG (0x24 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define SET_CYCLES_MSB_REG (0x25 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define SET_CYCLES_LSB_REG (0x24 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define SET_CYCLES_MSB_REG (0x25 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Frames 64bit Write-register */ -#define SET_FRAMES_LSB_REG (0x26 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define SET_FRAMES_MSB_REG (0x27 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define SET_FRAMES_LSB_REG (0x26 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define SET_FRAMES_MSB_REG (0x27 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Period 64bit Write-register */ -#define SET_PERIOD_LSB_REG (0x28 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define SET_PERIOD_MSB_REG (0x29 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define SET_PERIOD_LSB_REG (0x28 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define SET_PERIOD_MSB_REG (0x29 * REG_OFFSET + BASE_PATTERN_CONTROL) /* External Signal register */ -#define EXT_SIGNAL_REG (0x30 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define EXT_SIGNAL_REG (0x30 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define EXT_SIGNAL_OFST (0) -#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) +#define EXT_SIGNAL_OFST (0) +#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) /* Trigger Delay 64 bit register */ -#define SET_TRIGGER_DELAY_LSB_REG (0x32 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define SET_TRIGGER_DELAY_MSB_REG (0x33 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define SET_TRIGGER_DELAY_LSB_REG (0x32 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define SET_TRIGGER_DELAY_MSB_REG (0x33 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Pattern Limit RW Register */ -#define PATTERN_LIMIT_REG (0x40 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_LIMIT_REG (0x40 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PATTERN_LIMIT_STRT_OFST (0) -#define PATTERN_LIMIT_STRT_MSK (0x00001FFF << PATTERN_LIMIT_STRT_OFST) -#define PATTERN_LIMIT_STP_OFST (16) -#define PATTERN_LIMIT_STP_MSK (0x00001FFF << PATTERN_LIMIT_STP_OFST) +#define PATTERN_LIMIT_STRT_OFST (0) +#define PATTERN_LIMIT_STRT_MSK (0x00001FFF << PATTERN_LIMIT_STRT_OFST) +#define PATTERN_LIMIT_STP_OFST (16) +#define PATTERN_LIMIT_STP_MSK (0x00001FFF << PATTERN_LIMIT_STP_OFST) /** Pattern Mask 64 bit RW regiser */ -#define PATTERN_MASK_LSB_REG (0x42 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PATTERN_MASK_MSB_REG (0x43 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_MASK_LSB_REG (0x42 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_MASK_MSB_REG (0x43 * REG_OFFSET + BASE_PATTERN_CONTROL) /** Pattern Set 64 bit RW regiser */ -#define PATTERN_SET_LSB_REG (0x44 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PATTERN_SET_MSB_REG (0x45 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_SET_LSB_REG (0x44 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_SET_MSB_REG (0x45 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Pattern Wait Timer 0 64bit RW Register */ -#define PATTERN_WAIT_TIMER_0_LSB_REG (0x60 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PATTERN_WAIT_TIMER_0_MSB_REG (0x61 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_WAIT_TIMER_0_LSB_REG (0x60 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_WAIT_TIMER_0_MSB_REG (0x61 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Pattern Wait 0 RW Register*/ -#define PATTERN_WAIT_0_ADDR_REG (0x62 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_WAIT_0_ADDR_REG (0x62 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PATTERN_WAIT_0_ADDR_OFST (0) -#define PATTERN_WAIT_0_ADDR_MSK (0x00001FFF << PATTERN_WAIT_0_ADDR_OFST) +#define PATTERN_WAIT_0_ADDR_OFST (0) +#define PATTERN_WAIT_0_ADDR_MSK (0x00001FFF << PATTERN_WAIT_0_ADDR_OFST) /* Pattern Loop 0 Iteration RW Register */ -#define PATTERN_LOOP_0_ITERATION_REG (0x63 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_LOOP_0_ITERATION_REG (0x63 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Pattern Loop 0 Address RW Register */ -#define PATTERN_LOOP_0_ADDR_REG (0x64 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_LOOP_0_ADDR_REG (0x64 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PATTERN_LOOP_0_ADDR_STRT_OFST (0) -#define PATTERN_LOOP_0_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STRT_OFST) -#define PATTERN_LOOP_0_ADDR_STP_OFST (16) -#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STP_OFST) +#define PATTERN_LOOP_0_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_0_ADDR_STRT_MSK \ + (0x00001FFF << PATTERN_LOOP_0_ADDR_STRT_OFST) +#define PATTERN_LOOP_0_ADDR_STP_OFST (16) +#define PATTERN_LOOP_0_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_0_ADDR_STP_OFST) /* Pattern Wait Timer 1 64bit RW Register */ -#define PATTERN_WAIT_TIMER_1_LSB_REG (0x65 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PATTERN_WAIT_TIMER_1_MSB_REG (0x66 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_WAIT_TIMER_1_LSB_REG (0x65 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_WAIT_TIMER_1_MSB_REG (0x66 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Pattern Wait 1 RW Register*/ -#define PATTERN_WAIT_1_ADDR_REG (0x67 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_WAIT_1_ADDR_REG (0x67 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PATTERN_WAIT_1_ADDR_OFST (0) -#define PATTERN_WAIT_1_ADDR_MSK (0x00001FFF << PATTERN_WAIT_1_ADDR_OFST) +#define PATTERN_WAIT_1_ADDR_OFST (0) +#define PATTERN_WAIT_1_ADDR_MSK (0x00001FFF << PATTERN_WAIT_1_ADDR_OFST) /* Pattern Loop 1 Iteration RW Register */ -#define PATTERN_LOOP_1_ITERATION_REG (0x68 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_LOOP_1_ITERATION_REG (0x68 * REG_OFFSET + BASE_PATTERN_CONTROL) /* Pattern Loop 1 Address RW Register */ -#define PATTERN_LOOP_1_ADDR_REG (0x69 * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_LOOP_1_ADDR_REG (0x69 * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PATTERN_LOOP_1_ADDR_STRT_OFST (0) -#define PATTERN_LOOP_1_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STRT_OFST) -#define PATTERN_LOOP_1_ADDR_STP_OFST (16) -#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STP_OFST) +#define PATTERN_LOOP_1_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_1_ADDR_STRT_MSK \ + (0x00001FFF << PATTERN_LOOP_1_ADDR_STRT_OFST) +#define PATTERN_LOOP_1_ADDR_STP_OFST (16) +#define PATTERN_LOOP_1_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_1_ADDR_STP_OFST) /* Pattern Wait Timer 2 64bit RW Register */ -#define PATTERN_WAIT_TIMER_2_LSB_REG (0x6A * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PATTERN_WAIT_TIMER_2_MSB_REG (0x6B * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_WAIT_TIMER_2_LSB_REG (0x6A * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_WAIT_TIMER_2_MSB_REG (0x6B * REG_OFFSET + BASE_PATTERN_CONTROL) /* Pattern Wait 2 RW Register*/ -#define PATTERN_WAIT_2_ADDR_REG (0x6C * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_WAIT_2_ADDR_REG (0x6C * REG_OFFSET + BASE_PATTERN_CONTROL) -#define PATTERN_WAIT_2_ADDR_OFST (0) -#define PATTERN_WAIT_2_ADDR_MSK (0x00001FFF << PATTERN_WAIT_2_ADDR_OFST) +#define PATTERN_WAIT_2_ADDR_OFST (0) +#define PATTERN_WAIT_2_ADDR_MSK (0x00001FFF << PATTERN_WAIT_2_ADDR_OFST) /* Pattern Loop 2 Iteration RW Register */ -#define PATTERN_LOOP_2_ITERATION_REG (0x6D * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_LOOP_2_ITERATION_REG (0x6D * REG_OFFSET + BASE_PATTERN_CONTROL) /* Pattern Loop 0 Address RW Register */ -#define PATTERN_LOOP_2_ADDR_REG (0x6E * REG_OFFSET + BASE_PATTERN_CONTROL) - -#define PATTERN_LOOP_2_ADDR_STRT_OFST (0) -#define PATTERN_LOOP_2_ADDR_STRT_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STRT_OFST) -#define PATTERN_LOOP_2_ADDR_STP_OFST (16) -#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STP_OFST) +#define PATTERN_LOOP_2_ADDR_REG (0x6E * REG_OFFSET + BASE_PATTERN_CONTROL) +#define PATTERN_LOOP_2_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_2_ADDR_STRT_MSK \ + (0x00001FFF << PATTERN_LOOP_2_ADDR_STRT_OFST) +#define PATTERN_LOOP_2_ADDR_STP_OFST (16) +#define PATTERN_LOOP_2_ADDR_STP_MSK (0x00001FFF << PATTERN_LOOP_2_ADDR_STP_OFST) /* Pattern RAM registers --------------------------------------------------*/ /* Register of first word */ -#define PATTERN_STEP0_LSB_REG (0x0 * REG_OFFSET + BASE_PATTERN_RAM) -#define PATTERN_STEP0_MSB_REG (0x1 * REG_OFFSET + BASE_PATTERN_RAM) +#define PATTERN_STEP0_LSB_REG (0x0 * REG_OFFSET + BASE_PATTERN_RAM) +#define PATTERN_STEP0_MSB_REG (0x1 * REG_OFFSET + BASE_PATTERN_RAM) diff --git a/slsDetectorServers/mythen3DetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/mythen3DetectorServer/slsDetectorServer_defs.h index d584dd268..d11fb35f3 100644 --- a/slsDetectorServers/mythen3DetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/mythen3DetectorServer/slsDetectorServer_defs.h @@ -1,100 +1,128 @@ #pragma once #include "sls_detector_defs.h" -#define REQRD_FRMWRE_VRSN 0x190000 +#define REQRD_FRMWRE_VRSN 0x190000 -#define CTRL_SRVR_INIT_TIME_US (300 * 1000) +#define CTRL_SRVR_INIT_TIME_US (300 * 1000) /* Hardware Definitions */ -#define NCOUNTERS (3) -#define MAX_COUNTER_MSK (0x7) -#define NCHAN_1_COUNTER (128) -#define NCHAN (128 * NCOUNTERS) -#define NCHIP (10) -#define NDAC (16) +#define NCOUNTERS (3) +#define MAX_COUNTER_MSK (0x7) +#define NCHAN_1_COUNTER (128) +#define NCHAN (128 * NCOUNTERS) +#define NCHIP (10) +#define NDAC (16) #define HV_SOFT_MAX_VOLTAGE (200) #define HV_HARD_MAX_VOLTAGE (530) #define HV_DRIVER_FILE_NAME ("/etc/devlinks/hvdac") #define DAC_DRIVER_FILE_NAME ("/etc/devlinks/dac") -#define TYPE_FILE_NAME ("/etc/devlinks/type") +#define TYPE_FILE_NAME ("/etc/devlinks/type") #define DAC_MAX_MV (2048) -#define TYPE_MYTHEN3_MODULE_VAL (93) -#define TYPE_TOLERANCE (10) -#define TYPE_NO_MODULE_STARTING_VAL (800) - +#define TYPE_MYTHEN3_MODULE_VAL (93) +#define TYPE_TOLERANCE (10) +#define TYPE_NO_MODULE_STARTING_VAL (800) /** Default Parameters */ -#define DEFAULT_DYNAMIC_RANGE (24) -#define DEFAULT_NUM_FRAMES (1) -#define DEFAULT_NUM_CYCLES (1) -#define DEFAULT_EXPTIME (100*1000*1000) //ns -#define DEFAULT_PERIOD (2*1000*1000) //ns +#define DEFAULT_DYNAMIC_RANGE (24) +#define DEFAULT_NUM_FRAMES (1) +#define DEFAULT_NUM_CYCLES (1) +#define DEFAULT_EXPTIME (100 * 1000 * 1000) // ns +#define DEFAULT_PERIOD (2 * 1000 * 1000) // ns #define DEFAULT_DELAY_AFTER_TRIGGER (0) #define DEFAULT_HIGH_VOLTAGE (0) -#define DEFAULT_TIMING_MODE (AUTO_TIMING) -#define DEFAULT_READOUT_C0 (10)//(125000000) // rdo_clk, 125 MHz -#define DEFAULT_READOUT_C1 (10)//(125000000) // rdo_x2_clk, 125 MHz -#define DEFAULT_SYSTEM_C0 (5)//(250000000) // run_clk, 250 MHz -#define DEFAULT_SYSTEM_C1 (10)//(125000000) // chip_clk, 125 MHz -#define DEFAULT_SYSTEM_C2 (10)//(125000000) // sync_clk, 125 MHz - +#define DEFAULT_TIMING_MODE (AUTO_TIMING) +#define DEFAULT_READOUT_C0 (10) //(125000000) // rdo_clk, 125 MHz +#define DEFAULT_READOUT_C1 (10) //(125000000) // rdo_x2_clk, 125 MHz +#define DEFAULT_SYSTEM_C0 (5) //(250000000) // run_clk, 250 MHz +#define DEFAULT_SYSTEM_C1 (10) //(125000000) // chip_clk, 125 MHz +#define DEFAULT_SYSTEM_C2 (10) //(125000000) // sync_clk, 125 MHz /* Firmware Definitions */ -#define IP_HEADER_SIZE (20) -#define FIXED_PLL_FREQUENCY (020000000) // 20MHz -#define READOUT_PLL_VCO_FREQ_HZ (1250000000) // 1.25GHz -#define SYSTEM_PLL_VCO_FREQ_HZ (1250000000) // 1.25GHz -#define MAX_PATTERN_LENGTH (0x2000) // maximum number of words (64bit) +#define IP_HEADER_SIZE (20) +#define FIXED_PLL_FREQUENCY (020000000) // 20MHz +#define READOUT_PLL_VCO_FREQ_HZ (1250000000) // 1.25GHz +#define SYSTEM_PLL_VCO_FREQ_HZ (1250000000) // 1.25GHz +#define MAX_PATTERN_LENGTH (0x2000) // maximum number of words (64bit) /** Other Definitions */ -#define BIT16_MASK (0xFFFF) +#define BIT16_MASK (0xFFFF) /* Enums */ -enum DACINDEX {M_CASSH, M_VTH2, M_VRFSH, M_VRFSHNPOL, M_VIPRE_OUT, M_VTH3, M_VTH1, M_VICIN, M_CAS, M_VRF, M_VPL, M_VIPRE, M_VIINSH, M_VPH, M_VTRIM, M_VDCSH}; -#define DAC_NAMES "vcassh", "vth2", "vshaper", "vshaperneg", "vipre_out", "vth3", "vth1", "vicin", "vcas", "vpreamp", "vpl", "vipre", "viinsh", "vph", "vtrim", "vdcsh" -#define DEFAULT_DAC_VALS {1200, /* casSh */ \ - 2800, /* Vth2 */ \ - 1280, /* VrfSh */ \ - 2800, /* VrfShNpol */ \ - 1220, /* vIpreOut */ \ - 2800, /* Vth3 */ \ - 2800, /* Vth1 */ \ - 1708, /* vIcin */ \ - 1800, /* cas */ \ - 1100, /* Vrf */ \ - 1100, /* VPL */ \ - 2624, /* vIpre */ \ - 1708, /* vIinSh */ \ - 1712, /* VPH */ \ - 2800, /* vTrim */ \ - 800 /* VdcSh */ \ - }; -enum CLKINDEX {READOUT_C0, READOUT_C1, SYSTEM_C0, SYSTEM_C1, SYSTEM_C2, NUM_CLOCKS}; -#define CLK_NAMES "READOUT_C0", "READOUT_C1", "SYSTEM_C0", "SYSTEM_C1", "SYSTEM_C2" -enum PLLINDEX {READOUT_PLL, SYSTEM_PLL}; +enum DACINDEX { + M_CASSH, + M_VTH2, + M_VRFSH, + M_VRFSHNPOL, + M_VIPRE_OUT, + M_VTH3, + M_VTH1, + M_VICIN, + M_CAS, + M_VRF, + M_VPL, + M_VIPRE, + M_VIINSH, + M_VPH, + M_VTRIM, + M_VDCSH +}; +#define DAC_NAMES \ + "vcassh", "vth2", "vshaper", "vshaperneg", "vipre_out", "vth3", "vth1", \ + "vicin", "vcas", "vpreamp", "vpl", "vipre", "viinsh", "vph", "vtrim", \ + "vdcsh" +#define DEFAULT_DAC_VALS \ + { \ + 1200, /* casSh */ \ + 2800, /* Vth2 */ \ + 1280, /* VrfSh */ \ + 2800, /* VrfShNpol */ \ + 1220, /* vIpreOut */ \ + 2800, /* Vth3 */ \ + 2800, /* Vth1 */ \ + 1708, /* vIcin */ \ + 1800, /* cas */ \ + 1100, /* Vrf */ \ + 1100, /* VPL */ \ + 2624, /* vIpre */ \ + 1708, /* vIinSh */ \ + 1712, /* VPH */ \ + 2800, /* vTrim */ \ + 800 /* VdcSh */ \ + }; +enum CLKINDEX { + READOUT_C0, + READOUT_C1, + SYSTEM_C0, + SYSTEM_C1, + SYSTEM_C2, + NUM_CLOCKS +}; +#define CLK_NAMES \ + "READOUT_C0", "READOUT_C1", "SYSTEM_C0", "SYSTEM_C1", "SYSTEM_C2" +enum PLLINDEX { READOUT_PLL, SYSTEM_PLL }; /* Struct Definitions */ typedef struct udp_header_struct { - uint32_t udp_destmac_msb; - uint16_t udp_srcmac_msb; - uint16_t udp_destmac_lsb; - uint32_t udp_srcmac_lsb; - uint8_t ip_tos; - uint8_t ip_ihl: 4, ip_ver: 4; - uint16_t udp_ethertype; - uint16_t ip_identification; - uint16_t ip_totallength; - uint8_t ip_protocol; - uint8_t ip_ttl; - uint16_t ip_fragmentoffset: 13, ip_flags: 3; - uint16_t ip_srcip_msb; - uint16_t ip_checksum; - uint16_t ip_destip_msb; - uint16_t ip_srcip_lsb; - uint16_t udp_srcport; - uint16_t ip_destip_lsb; - uint16_t udp_checksum; - uint16_t udp_destport; + uint32_t udp_destmac_msb; + uint16_t udp_srcmac_msb; + uint16_t udp_destmac_lsb; + uint32_t udp_srcmac_lsb; + uint8_t ip_tos; + uint8_t ip_ihl : 4, ip_ver : 4; + uint16_t udp_ethertype; + uint16_t ip_identification; + uint16_t ip_totallength; + uint8_t ip_protocol; + uint8_t ip_ttl; + uint16_t ip_fragmentoffset : 13, ip_flags : 3; + uint16_t ip_srcip_msb; + uint16_t ip_checksum; + uint16_t ip_destip_msb; + uint16_t ip_srcip_lsb; + uint16_t udp_srcport; + uint16_t ip_destip_lsb; + uint16_t udp_checksum; + uint16_t udp_destport; } udp_header; -#define UDP_IP_HEADER_LENGTH_BYTES (28) -#define PACKETS_PER_FRAME (2) +#define UDP_IP_HEADER_LENGTH_BYTES (28) +#define PACKETS_PER_FRAME (2) diff --git a/slsDetectorServers/slsDetectorServer/include/AD7689.h b/slsDetectorServers/slsDetectorServer/include/AD7689.h old mode 100755 new mode 100644 index ff3785da9..e30a0e8ed --- a/slsDetectorServers/slsDetectorServer/include/AD7689.h +++ b/slsDetectorServers/slsDetectorServer/include/AD7689.h @@ -11,7 +11,8 @@ * @param dmsk digital output mask * @param dofst digital output offset */ -void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst); +void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk, + uint32_t clkmsk, uint32_t dmsk, int dofst); /** * Disable SPI diff --git a/slsDetectorServers/slsDetectorServer/include/AD9252.h b/slsDetectorServers/slsDetectorServer/include/AD9252.h old mode 100755 new mode 100644 index c05b3f246..2982a1962 --- a/slsDetectorServers/slsDetectorServer/include/AD9252.h +++ b/slsDetectorServers/slsDetectorServer/include/AD9252.h @@ -10,7 +10,8 @@ * @param dmsk digital output mask * @param dofst digital output offset */ -void AD9252_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst); +void AD9252_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, + uint32_t dmsk, int dofst); /** * Disable SPI diff --git a/slsDetectorServers/slsDetectorServer/include/AD9257.h b/slsDetectorServers/slsDetectorServer/include/AD9257.h old mode 100755 new mode 100644 index a24919525..333050106 --- a/slsDetectorServers/slsDetectorServer/include/AD9257.h +++ b/slsDetectorServers/slsDetectorServer/include/AD9257.h @@ -10,12 +10,13 @@ * @param dmsk digital output mask * @param dofst digital output offset */ -void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst); +void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, + uint32_t dmsk, int dofst); /** * Disable SPI */ -void AD9257_Disable() ; +void AD9257_Disable(); /** * Get vref voltage @@ -24,7 +25,8 @@ int AD9257_GetVrefVoltage(int mV); /** * Set vref voltage - * @param val voltage to be set (0 for 1.0V, 1 for 1.14V, 2 for 1.33V, 3 for 1.6V, 4 for 2.0V + * @param val voltage to be set (0 for 1.0V, 1 for 1.14V, 2 for 1.33V, 3 + * for 1.6V, 4 for 2.0V * @returns ok or fail */ int AD9257_SetVrefVoltage(int val, int mV); diff --git a/slsDetectorServers/slsDetectorServer/include/ALTERA_PLL.h b/slsDetectorServers/slsDetectorServer/include/ALTERA_PLL.h old mode 100755 new mode 100644 index 9110b5652..b3187260b --- a/slsDetectorServers/slsDetectorServer/include/ALTERA_PLL.h +++ b/slsDetectorServers/slsDetectorServer/include/ALTERA_PLL.h @@ -15,7 +15,9 @@ * @param wd2msk write parameter mask for pll for dbit clock (Jungfrau only) * @param clk2Index clkIndex of second pll (Jungfrau only) */ -void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, int aofst, uint32_t wd2msk, int clk2Index); +void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, + uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, + int aofst, uint32_t wd2msk, int clk2Index); #else /** * Set Defines @@ -27,26 +29,30 @@ void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32 * @param amsk address mask * @param aofst address offset */ -void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, int aofst); +void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, + uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, + int aofst); #endif /** * Reset only PLL */ -void ALTERA_PLL_ResetPLL (); +void ALTERA_PLL_ResetPLL(); /** * Reset PLL Reconfiguration and PLL */ -void ALTERA_PLL_ResetPLLAndReconfiguration (); +void ALTERA_PLL_ResetPLLAndReconfiguration(); /** * Set PLL Reconfig register * @param reg register * @param val value - * @param useDefaultWRMask only jungfrau for dbit clk (clkindex1, use second WR mask) + * @param useDefaultWRMask only jungfrau for dbit clk (clkindex1, use second WR + * mask) */ -void ALTERA_PLL_SetPllReconfigReg(uint32_t reg, uint32_t val, int useSecondWRMask); +void ALTERA_PLL_SetPllReconfigReg(uint32_t reg, uint32_t val, + int useSecondWRMask); /** * Write Phase Shift @@ -67,5 +73,4 @@ void ALTERA_PLL_SetModePolling(); * @param value frequency to set to * @param frequency set */ -int ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value); - +int ALTERA_PLL_SetOuputFrequency(int clkIndex, int pllVCOFreqMhz, int value); diff --git a/slsDetectorServers/slsDetectorServer/include/ALTERA_PLL_CYCLONE10.h b/slsDetectorServers/slsDetectorServer/include/ALTERA_PLL_CYCLONE10.h old mode 100755 new mode 100644 index 647fc8b87..85cd9a992 --- a/slsDetectorServers/slsDetectorServer/include/ALTERA_PLL_CYCLONE10.h +++ b/slsDetectorServers/slsDetectorServer/include/ALTERA_PLL_CYCLONE10.h @@ -14,7 +14,10 @@ * @param vcofreq0 vco frequency of pll 0 * @param vcofreq1 vco frequency of pll 1 */ -void ALTERA_PLL_C10_SetDefines(int regofst, uint32_t baseaddr0, uint32_t baseaddr1, uint32_t resetreg0, uint32_t resetreg1, uint32_t resetmsk0, uint32_t resetmsk1, int vcofreq0, int vcofreq1); +void ALTERA_PLL_C10_SetDefines(int regofst, uint32_t baseaddr0, + uint32_t baseaddr1, uint32_t resetreg0, + uint32_t resetreg1, uint32_t resetmsk0, + uint32_t resetmsk1, int vcofreq0, int vcofreq1); /** * Get Max Clock Divider @@ -35,7 +38,7 @@ int ALTERA_PLL_C10_GetVCOFrequency(int pllIndex); int ALTERA_PLL_C10_GetMaxPhaseShiftStepsofVCO(); /** - * Start reconfiguration + * Start reconfiguration * @param pllIndex pll index */ void ALTERA_PLL_C10_Reconfigure(int pllIndex); @@ -44,7 +47,7 @@ void ALTERA_PLL_C10_Reconfigure(int pllIndex); * Reset pll * @param pllIndex pll index */ -void ALTERA_PLL_C10_ResetPLL (int pllIndex); +void ALTERA_PLL_C10_ResetPLL(int pllIndex); /** * Set Phase Shift @@ -53,7 +56,8 @@ void ALTERA_PLL_C10_ResetPLL (int pllIndex); * @param phase phase shift * @param pos 1 if up down direction of shift is positive, else 0 */ -void ALTERA_PLL_C10_SetPhaseShift(int pllIndex, int clkIndex, int phase, int pos); +void ALTERA_PLL_C10_SetPhaseShift(int pllIndex, int clkIndex, int phase, + int pos); /** * Calculate and write output frequency @@ -61,5 +65,4 @@ void ALTERA_PLL_C10_SetPhaseShift(int pllIndex, int clkIndex, int phase, int pos * @param clkIndex clock index * @param value clock divider to set to */ -void ALTERA_PLL_C10_SetOuputClockDivider (int pllIndex, int clkIndex, int value); - +void ALTERA_PLL_C10_SetOuputClockDivider(int pllIndex, int clkIndex, int value); diff --git a/slsDetectorServers/slsDetectorServer/include/ASIC_Driver.h b/slsDetectorServers/slsDetectorServer/include/ASIC_Driver.h old mode 100755 new mode 100644 index 1410886de..597022a12 --- a/slsDetectorServers/slsDetectorServer/include/ASIC_Driver.h +++ b/slsDetectorServers/slsDetectorServer/include/ASIC_Driver.h @@ -6,7 +6,7 @@ * Set Defines * @param driverfname driver file name */ -void ASIC_Driver_SetDefines(char* driverfname); +void ASIC_Driver_SetDefines(char *driverfname); /** * Set value @@ -15,4 +15,4 @@ void ASIC_Driver_SetDefines(char* driverfname); * @param buffer buffer * @return OK or FAIL */ -int ASIC_Driver_Set(int index, int length, char* buffer); \ No newline at end of file +int ASIC_Driver_Set(int index, int length, char *buffer); \ No newline at end of file diff --git a/slsDetectorServers/slsDetectorServer/include/DAC6571.h b/slsDetectorServers/slsDetectorServer/include/DAC6571.h old mode 100755 new mode 100644 index 6dc26e731..41bac9486 --- a/slsDetectorServers/slsDetectorServer/include/DAC6571.h +++ b/slsDetectorServers/slsDetectorServer/include/DAC6571.h @@ -4,17 +4,14 @@ /** * Set Defines - * @param hardMaxV maximum hardware limit + * @param hardMaxV maximum hardware limit * @param driverfname driver file name */ -void DAC6571_SetDefines(int hardMaxV, char* driverfname); +void DAC6571_SetDefines(int hardMaxV, char *driverfname); /** * Set value * @param val value to set * @return OK or FAIL */ -int DAC6571_Set (int val) ; - - - +int DAC6571_Set(int val); diff --git a/slsDetectorServers/slsDetectorServer/include/I2C.h b/slsDetectorServers/slsDetectorServer/include/I2C.h old mode 100755 new mode 100644 index d9fc5f355..e8fd1a332 --- a/slsDetectorServers/slsDetectorServer/include/I2C.h +++ b/slsDetectorServers/slsDetectorServer/include/I2C.h @@ -15,9 +15,9 @@ * @param sdreg sda hold register (defined in RegisterDefs.h) * @param treg transfer command fifo register (defined in RegisterDefs.h) */ -void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg, - uint32_t rreg, uint32_t rlvlreg, - uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg); +void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg, uint32_t rreg, + uint32_t rlvlreg, uint32_t slreg, uint32_t shreg, + uint32_t sdreg, uint32_t treg); /** * Read register @@ -34,5 +34,3 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr); * @param data data to be written (16 bit) */ void I2C_Write(uint32_t devId, uint32_t addr, uint16_t data); - - diff --git a/slsDetectorServers/slsDetectorServer/include/INA226.h b/slsDetectorServers/slsDetectorServer/include/INA226.h old mode 100755 new mode 100644 index 0926ecc8a..20ed47b4b --- a/slsDetectorServers/slsDetectorServer/include/INA226.h +++ b/slsDetectorServers/slsDetectorServer/include/INA226.h @@ -4,7 +4,8 @@ /** * Configure the I2C core and Enable core - * @param rOhm shunt resister value in Ohms (defined in slsDetectorServer_defs.h) + * @param rOhm shunt resister value in Ohms (defined in + * slsDetectorServer_defs.h) * @param creg control register (defined in RegisterDefs.h) * @param sreg status register (defined in RegisterDefs.h) * @param rreg rx data fifo register (defined in RegisterDefs.h) @@ -15,8 +16,8 @@ * @param treg transfer command fifo register (defined in RegisterDefs.h) */ void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t sreg, - uint32_t rreg, uint32_t rlvlreg, - uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg); + uint32_t rreg, uint32_t rlvlreg, uint32_t slreg, + uint32_t shreg, uint32_t sdreg, uint32_t treg); /** * Calibrate resolution of current register diff --git a/slsDetectorServers/slsDetectorServer/include/LTC2620.h b/slsDetectorServers/slsDetectorServer/include/LTC2620.h old mode 100755 new mode 100644 index b0e190d56..5d053af44 --- a/slsDetectorServers/slsDetectorServer/include/LTC2620.h +++ b/slsDetectorServers/slsDetectorServer/include/LTC2620.h @@ -9,11 +9,13 @@ * @param clkmsk clock output mask * @param dmsk digital output mask * @param dofst digital output offset - * @param nd total number of dacs for this board (for dac channel and daisy chain chip id) + * @param nd total number of dacs for this board (for dac channel and daisy + * chain chip id) * @param minMV minimum voltage determined by hardware * @param maxMV maximum voltage determined by hardware */ -void LTC2620_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst, int nd, int minMV, int maxMV); +void LTC2620_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, + uint32_t dmsk, int dofst, int nd, int minMV, int maxMV); /** * Disable SPI @@ -46,7 +48,7 @@ int LTC2620_GetMaxNumSteps(); * @param dacval pointer to value converted to dac units * @returns FAIL when voltage outside limits, OK if conversion successful */ -int LTC2620_VoltageToDac(int voltage, int* dacval); +int LTC2620_VoltageToDac(int voltage, int *dacval); /** * Convert dac units to voltage @@ -54,7 +56,7 @@ int LTC2620_VoltageToDac(int voltage, int* dacval); * @param voltage pointer to value converted to mV * @returns FAIL when voltage outside limits, OK if conversion successful */ -int LTC2620_DacToVoltage(int dacval, int* voltage); +int LTC2620_DacToVoltage(int dacval, int *voltage); /** * Set a single chip (all non ctb detectors use this) @@ -70,7 +72,7 @@ void LTC2620_SetSingle(int cmd, int data, int dacaddr); * @param valw current value of register while bit banging * @param val data to be sent (data, dac addr and command) */ -void LTC2620_SendDaisyData(uint32_t* valw, uint32_t val); +void LTC2620_SendDaisyData(uint32_t *valw, uint32_t val); /** * Set a single chip (all non ctb detectors use this) @@ -84,7 +86,8 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex); /** * Sets a single chip (LTC2620_SetSingle) or multiple chip (LTC2620_SetDaisy) - * multiple chip is only for ctb where the multiple chips are connected in daisy fashion + * multiple chip is only for ctb where the multiple chips are connected in daisy + * fashion * @param cmd command to send * @param data dac value to be set * @param dacaddr dac channel number for the chip @@ -102,7 +105,7 @@ void LTC2620_Configure(); * @param dacnum dac number * @param data dac value to set */ -void LTC2620_SetDAC (int dacnum, int data); +void LTC2620_SetDAC(int dacnum, int data); /** * Set dac in dac units or mV @@ -112,4 +115,4 @@ void LTC2620_SetDAC (int dacnum, int data); * @param dacval pointer to value in dac units * @returns OK or FAIL for success of operation */ -int LTC2620_SetDACValue (int dacnum, int val, int mV, int* dacval); \ No newline at end of file +int LTC2620_SetDACValue(int dacnum, int val, int mV, int *dacval); \ No newline at end of file diff --git a/slsDetectorServers/slsDetectorServer/include/LTC2620_Driver.h b/slsDetectorServers/slsDetectorServer/include/LTC2620_Driver.h old mode 100755 new mode 100644 index f2bc47c0f..78c05a199 --- a/slsDetectorServers/slsDetectorServer/include/LTC2620_Driver.h +++ b/slsDetectorServers/slsDetectorServer/include/LTC2620_Driver.h @@ -4,12 +4,11 @@ /** * Set Defines - * @param hardMaxV maximum hardware limit + * @param hardMaxV maximum hardware limit * @param driverfname driver file name * @param numdacs number of dacs */ -void LTC2620_D_SetDefines(int hardMaxV, char* driverfname, int numdacs); - +void LTC2620_D_SetDefines(int hardMaxV, char *driverfname, int numdacs); /** * Get max number of steps @@ -22,7 +21,7 @@ int LTC2620_D_GetMaxNumSteps(); * @param dacval pointer to value converted to dac units * @returns FAIL when voltage outside limits, OK if conversion successful */ -int LTC2620_D_VoltageToDac(int voltage, int* dacval); +int LTC2620_D_VoltageToDac(int voltage, int *dacval); /** * Convert dac units to voltage @@ -30,7 +29,7 @@ int LTC2620_D_VoltageToDac(int voltage, int* dacval); * @param voltage pointer to value converted to mV * @returns FAIL when voltage outside limits, OK if conversion successful */ -int LTC2620_D_DacToVoltage(int dacval, int* voltage); +int LTC2620_D_DacToVoltage(int dacval, int *voltage); /** * Set value @@ -41,4 +40,5 @@ int LTC2620_D_DacToVoltage(int dacval, int* voltage); * @param dacval pointer to dac value * @return OK or FAIL */ -int LTC2620_D_SetDACValue(int dacnum, int val, int mV, char* dacname, int *dacval); \ No newline at end of file +int LTC2620_D_SetDACValue(int dacnum, int val, int mV, char *dacname, + int *dacval); \ No newline at end of file diff --git a/slsDetectorServers/slsDetectorServer/include/MAX1932.h b/slsDetectorServers/slsDetectorServer/include/MAX1932.h old mode 100755 new mode 100644 index 2a3ed7d78..4eccf05f4 --- a/slsDetectorServers/slsDetectorServer/include/MAX1932.h +++ b/slsDetectorServers/slsDetectorServer/include/MAX1932.h @@ -12,8 +12,8 @@ * @param minMV minimum voltage determined by hardware * @param maxMV maximum voltage determined by hardware */ -void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst, - int minMV, int maxMV); +void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, + uint32_t dmsk, int dofst, int minMV, int maxMV); /** * Disable SPI @@ -25,7 +25,4 @@ void MAX1932_Disable(); * @param val pointer to value to set * @return OK or FAIL */ -int MAX1932_Set (int* val) ; - - - +int MAX1932_Set(int *val); diff --git a/slsDetectorServers/slsDetectorServer/include/UDPPacketHeaderGenerator.h b/slsDetectorServers/slsDetectorServer/include/UDPPacketHeaderGenerator.h old mode 100755 new mode 100644 index 64d5966cb..51c8ff246 --- a/slsDetectorServers/slsDetectorServer/include/UDPPacketHeaderGenerator.h +++ b/slsDetectorServers/slsDetectorServer/include/UDPPacketHeaderGenerator.h @@ -2,13 +2,13 @@ #include -/** - * Get current udp packet number +/** + * Get current udp packet number */ uint32_t getUDPPacketNumber(); -/** - * Get current udp frame number +/** + * Get current udp frame number */ uint64_t getUDPFrameNumber(); @@ -17,10 +17,10 @@ uint64_t getUDPFrameNumber(); * @param buffer pointer to header * @param id module id */ -void createUDPPacketHeader(char* buffer, uint16_t id); +void createUDPPacketHeader(char *buffer, uint16_t id); -/** - * fill up the udp packet with data till its full +/** + * fill up the udp packet with data till its full * @param buffer pointer to memory */ -int fillUDPPacket(char* buffer); +int fillUDPPacket(char *buffer); diff --git a/slsDetectorServers/slsDetectorServer/include/blackfin.h b/slsDetectorServers/slsDetectorServer/include/blackfin.h old mode 100755 new mode 100644 index 1e91e1361..a1995cfa9 --- a/slsDetectorServers/slsDetectorServer/include/blackfin.h +++ b/slsDetectorServers/slsDetectorServer/include/blackfin.h @@ -1,10 +1,10 @@ #pragma once -#include #include +#include /** I2C defines */ -#define I2C_CLOCK_MHZ (131.25) +#define I2C_CLOCK_MHZ (131.25) /** * Write into a 16 bit register @@ -98,7 +98,7 @@ u_int32_t writeRegister16(u_int32_t offset, u_int32_t data); /** * Get base address for memory copy */ -uint32_t* Blackfin_getBaseAddress(); +uint32_t *Blackfin_getBaseAddress(); /** * Map FPGA */ diff --git a/slsDetectorServers/slsDetectorServer/include/clogger.h b/slsDetectorServers/slsDetectorServer/include/clogger.h old mode 100755 new mode 100644 index aeb6a0b37..29ba4480f --- a/slsDetectorServers/slsDetectorServer/include/clogger.h +++ b/slsDetectorServers/slsDetectorServer/include/clogger.h @@ -2,10 +2,9 @@ #include "ansi.h" -#include -#include #include - +#include +#include #ifdef FIFODEBUG #define FILELOG_MAX_LEVEL logDEBUG5 @@ -21,48 +20,85 @@ #define FILELOG_MAX_LEVEL logINFO #endif -enum TLogLevel{ -logERROR, logWARNING, logINFOBLUE, logINFOGREEN, logINFORED, logINFO, -logDEBUG, logDEBUG1, logDEBUG2, logDEBUG3, logDEBUG4, logDEBUG5 +enum TLogLevel { + logERROR, + logWARNING, + logINFOBLUE, + logINFOGREEN, + logINFORED, + logINFO, + logDEBUG, + logDEBUG1, + logDEBUG2, + logDEBUG3, + logDEBUG4, + logDEBUG5 }; #define ERROR_MSG_LENGTH 1000 -#define LOG(lvl, fmt, ...) \ - if (lvl > FILELOG_MAX_LEVEL); \ - else {char* temp = FILELOG_BuildLog fmt; FILELOG_PrintLog(lvl, temp);free(temp);} +#define LOG(lvl, fmt, ...) \ + if (lvl > FILELOG_MAX_LEVEL) \ + ; \ + else { \ + char *temp = FILELOG_BuildLog fmt; \ + FILELOG_PrintLog(lvl, temp); \ + free(temp); \ + } -static inline void FILELOG_PrintLog(enum TLogLevel level, char* m) { - switch(level) { - case logERROR: cprintf(RED BOLD, "ERROR: %s", m); break; - case logWARNING: cprintf(YELLOW BOLD, "WARNING: %s", m); break; - case logINFOBLUE: cprintf(BLUE, "INFO: %s", m); break; - case logINFOGREEN: cprintf(GREEN, "INFO: %s", m); break; - case logINFORED: cprintf(RED, "INFO: %s", m); break; - case logINFO: cprintf(RESET, "INFO: %s", m); break; - case logDEBUG: cprintf(MAGENTA, "DEBUG: %s", m); break; - case logDEBUG1: cprintf(MAGENTA, "DEBUG1: %s", m); break; - case logDEBUG2: cprintf(MAGENTA, "DEBUG2: %s", m); break; - case logDEBUG3: cprintf(MAGENTA, "DEBUG3: %s", m); break; - case logDEBUG4: cprintf(MAGENTA, "DEBUG4: %s", m); break; - case logDEBUG5: cprintf(MAGENTA, "DEBUG5: %s", m); break; - } - fflush(stdout); +static inline void FILELOG_PrintLog(enum TLogLevel level, char *m) { + switch (level) { + case logERROR: + cprintf(RED BOLD, "ERROR: %s", m); + break; + case logWARNING: + cprintf(YELLOW BOLD, "WARNING: %s", m); + break; + case logINFOBLUE: + cprintf(BLUE, "INFO: %s", m); + break; + case logINFOGREEN: + cprintf(GREEN, "INFO: %s", m); + break; + case logINFORED: + cprintf(RED, "INFO: %s", m); + break; + case logINFO: + cprintf(RESET, "INFO: %s", m); + break; + case logDEBUG: + cprintf(MAGENTA, "DEBUG: %s", m); + break; + case logDEBUG1: + cprintf(MAGENTA, "DEBUG1: %s", m); + break; + case logDEBUG2: + cprintf(MAGENTA, "DEBUG2: %s", m); + break; + case logDEBUG3: + cprintf(MAGENTA, "DEBUG3: %s", m); + break; + case logDEBUG4: + cprintf(MAGENTA, "DEBUG4: %s", m); + break; + case logDEBUG5: + cprintf(MAGENTA, "DEBUG5: %s", m); + break; + } + fflush(stdout); } -static inline char* FILELOG_BuildLog(const char* fmt, ...) { - char* p; - va_list ap; - p = malloc(ERROR_MSG_LENGTH); - va_start(ap, fmt); - int ret = vsnprintf(p, ERROR_MSG_LENGTH, fmt, ap); - va_end(ap); - if (ret < 0 || ret >= ERROR_MSG_LENGTH) { - FILELOG_PrintLog(logERROR, ("Could not print the " - "complete error message in the next print.\n")); - } - return p; +static inline char *FILELOG_BuildLog(const char *fmt, ...) { + char *p; + va_list ap; + p = malloc(ERROR_MSG_LENGTH); + va_start(ap, fmt); + int ret = vsnprintf(p, ERROR_MSG_LENGTH, fmt, ap); + va_end(ap); + if (ret < 0 || ret >= ERROR_MSG_LENGTH) { + FILELOG_PrintLog(logERROR, + ("Could not print the " + "complete error message in the next print.\n")); + } + return p; }; - - - diff --git a/slsDetectorServers/slsDetectorServer/include/common.h b/slsDetectorServers/slsDetectorServer/include/common.h old mode 100755 new mode 100644 index 4d4f98dbd..0c4e4a95c --- a/slsDetectorServers/slsDetectorServer/include/common.h +++ b/slsDetectorServers/slsDetectorServer/include/common.h @@ -1,7 +1,8 @@ #pragma once /** - * Convert a value from a range to a different range (eg voltage to dac or vice versa) + * Convert a value from a range to a different range (eg voltage to dac or vice + * versa) * @param inputMin input minimum * @param inputMax input maximum * @param outputMin output minimum @@ -10,5 +11,5 @@ * @param outputValue pointer to output value * @returns FAIL if input value is out of bounds, else OK */ -int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outputMax, - int inputValue, int* outputValue); +int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, + int outputMax, int inputValue, int *outputValue); diff --git a/slsDetectorServers/slsDetectorServer/include/commonServerFunctions.h b/slsDetectorServers/slsDetectorServer/include/commonServerFunctions.h old mode 100755 new mode 100644 index 24820d256..3f5cb9e7e --- a/slsDetectorServers/slsDetectorServer/include/commonServerFunctions.h +++ b/slsDetectorServers/slsDetectorServer/include/commonServerFunctions.h @@ -2,14 +2,23 @@ #include -void SPIChipSelect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t clkmask, uint32_t digoutmask, int convBit); +void SPIChipSelect(uint32_t *valw, uint32_t addr, uint32_t csmask, + uint32_t clkmask, uint32_t digoutmask, int convBit); -void SPIChipDeselect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t clkmask, uint32_t digoutmask, int convBit); +void SPIChipDeselect(uint32_t *valw, uint32_t addr, uint32_t csmask, + uint32_t clkmask, uint32_t digoutmask, int convBit); -void sendDataToSPI (uint32_t* valw, uint32_t addr, uint32_t val, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset); +void sendDataToSPI(uint32_t *valw, uint32_t addr, uint32_t val, + int numbitstosend, uint32_t clkmask, uint32_t digoutmask, + int digofset); -uint32_t receiveDataFromSPI (uint32_t* valw, uint32_t addr, int numbitstoreceive, uint32_t clkmask, uint32_t readaddr) ; +uint32_t receiveDataFromSPI(uint32_t *valw, uint32_t addr, int numbitstoreceive, + uint32_t clkmask, uint32_t readaddr); -void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset, int convBit); +void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask, + int numbitstosend, uint32_t clkmask, uint32_t digoutmask, + int digofset, int convBit); -uint32_t serializeFromSPI(uint32_t addr, uint32_t csmask, int numbitstoreceive, uint32_t clkmask, uint32_t digoutmask, uint32_t readaddr, int convBit); +uint32_t serializeFromSPI(uint32_t addr, uint32_t csmask, int numbitstoreceive, + uint32_t clkmask, uint32_t digoutmask, + uint32_t readaddr, int convBit); diff --git a/slsDetectorServers/slsDetectorServer/include/communication_funcs.h b/slsDetectorServers/slsDetectorServer/include/communication_funcs.h old mode 100755 new mode 100644 index 990e7d6e9..ad14b6dd2 --- a/slsDetectorServers/slsDetectorServer/include/communication_funcs.h +++ b/slsDetectorServers/slsDetectorServer/include/communication_funcs.h @@ -1,22 +1,16 @@ #ifndef COMMUNICATION_FUNCS_H #define COMMUNICATION_FUNCS_H - #include "sls_detector_defs.h" -typedef enum{ - INT16, - INT32, - INT64, - OTHER -}intType; +typedef enum { INT16, INT32, INT64, OTHER } intType; // communciate with stop server #ifdef VIRTUAL #define FILE_STATUS "/tmp/Sls_virtual_server_status_" -#define FILE_STOP "/tmp/Sls_virtual_server_stop_" -#define FD_STATUS 0 -#define FD_STOP 1 +#define FILE_STOP "/tmp/Sls_virtual_server_stop_" +#define FD_STATUS 0 +#define FD_STOP 1 #endif int bindSocket(unsigned short int port_number); @@ -24,14 +18,14 @@ int acceptConnection(int socketDescriptor); void closeConnection(int file_Des); void exitServer(int socketDescriptor); -void swapData(void* val,int length,intType itype); -int sendData(int file_des, void* buf,int length, intType itype); -int receiveData(int file_des, void* buf,int length, intType itype); -int sendDataOnly(int file_des, void* buf,int length); -int receiveDataOnly(int file_des, void* buf,int length); +void swapData(void *val, int length, intType itype); +int sendData(int file_des, void *buf, int length, intType itype); +int receiveData(int file_des, void *buf, int length, intType itype); +int sendDataOnly(int file_des, void *buf, int length); +int receiveDataOnly(int file_des, void *buf, int length); int sendModule(int file_des, sls_detector_module *myMod); -int receiveModule(int file_des, sls_detector_module* myMod); +int receiveModule(int file_des, sls_detector_module *myMod); /** * Servers sets and prints error message for locked server @@ -39,7 +33,6 @@ int receiveModule(int file_des, sls_detector_module* myMod); */ void Server_LockedError(); - /** * Server verifies if it is unlocked, * sets and prints appropriate message if it is locked and different clients @@ -47,16 +40,17 @@ void Server_LockedError(); */ int Server_VerifyLock(); - /** - * Server sends result to client (also set ret to force_update if different clients) + * Server sends result to client (also set ret to force_update if different + * clients) * @param fileDes file descriptor for the socket - * @param itype 32 or 64 or others to determine to swap data from big endian to little endian + * @param itype 32 or 64 or others to determine to swap data from big endian to + * little endian * @param retval pointer to result * @param retvalSize size of result * @returns result of operation */ -int Server_SendResult(int fileDes, intType itype, void* retval, int retvalSize); +int Server_SendResult(int fileDes, intType itype, void *retval, int retvalSize); /** * Convert mac address from integer to char array @@ -64,20 +58,20 @@ int Server_SendResult(int fileDes, intType itype, void* retval, int retvalSize); * @param size size of char array result * @param mac mac address as an integer */ -void getMacAddressinString(char* cmac, int size, uint64_t mac); +void getMacAddressinString(char *cmac, int size, uint64_t mac); /** * Convert ip address from integer to char array * @param cip char arrary result * @param ip ip address as an integer */ -void getIpAddressinString(char* cip, uint32_t ip); +void getIpAddressinString(char *cip, uint32_t ip); /** * Convert string to ip address * @param cip string source * @param ip result */ -void getIpAddressFromString(char* cip, uint32_t* ip); +void getIpAddressFromString(char *cip, uint32_t *ip); #endif diff --git a/slsDetectorServers/slsDetectorServer/include/communication_funcs_UDP.h b/slsDetectorServers/slsDetectorServer/include/communication_funcs_UDP.h old mode 100755 new mode 100644 index 5da5762ca..01d9226eb --- a/slsDetectorServers/slsDetectorServer/include/communication_funcs_UDP.h +++ b/slsDetectorServers/slsDetectorServer/include/communication_funcs_UDP.h @@ -11,7 +11,8 @@ int getUdPSocketDescriptor(int index); * @param ip udp destination ip * @param port udp destination port */ -int setUDPDestinationDetails(int index, const char* ip, unsigned short int port); +int setUDPDestinationDetails(int index, const char *ip, + unsigned short int port); /** * Create udp socket @@ -25,7 +26,7 @@ int createUDPSocket(int index); * @param buf pointer to memory to write * @param length length of buffer to write to socket */ -int sendUDPPacket(int index, const char* buf, int length); +int sendUDPPacket(int index, const char *buf, int length); /** * Close udp socket diff --git a/slsDetectorServers/slsDetectorServer/include/communication_virtual.h b/slsDetectorServers/slsDetectorServer/include/communication_virtual.h old mode 100755 new mode 100644 index 06c6558d4..a38f8d8a4 --- a/slsDetectorServers/slsDetectorServer/include/communication_virtual.h +++ b/slsDetectorServers/slsDetectorServer/include/communication_virtual.h @@ -8,7 +8,9 @@ void ComVirtual_setStatus(int value); int ComVirtual_getStatus(); void ComVirtual_setStop(int value); int ComVirtual_getStop(); -int ComVirtual_writeToFile(int value, const char* fname, const char* serverName); -int ComVirtual_readFromFile(int* value, const char* fname, const char* serverName); +int ComVirtual_writeToFile(int value, const char *fname, + const char *serverName); +int ComVirtual_readFromFile(int *value, const char *fname, + const char *serverName); #endif diff --git a/slsDetectorServers/slsDetectorServer/include/nios.h b/slsDetectorServers/slsDetectorServer/include/nios.h old mode 100755 new mode 100644 index 34c05bbc4..d8b0ac2b4 --- a/slsDetectorServers/slsDetectorServer/include/nios.h +++ b/slsDetectorServers/slsDetectorServer/include/nios.h @@ -1,7 +1,7 @@ #pragma once -#include #include +#include /** * Write into a 32 bit register for cspbase 1 @@ -86,4 +86,4 @@ int mapCSP0(void); /** * Get Nios base address */ -u_int32_t* Nios_getBaseAddress(); +u_int32_t *Nios_getBaseAddress(); diff --git a/slsDetectorServers/slsDetectorServer/include/programFpgaBlackfin.h b/slsDetectorServers/slsDetectorServer/include/programFpgaBlackfin.h old mode 100755 new mode 100644 index b4dd76fb5..3b9991a71 --- a/slsDetectorServers/slsDetectorServer/include/programFpgaBlackfin.h +++ b/slsDetectorServers/slsDetectorServer/include/programFpgaBlackfin.h @@ -1,7 +1,7 @@ #pragma once -#include #include +#include /** * Define GPIO pins if not defined @@ -34,14 +34,14 @@ void eraseFlash(); * @param filefp pointer to flash * @return 0 for success, 1 for fail (cannot open file for writing program) */ -int startWritingFPGAprogram(FILE** filefp); +int startWritingFPGAprogram(FILE **filefp); /** * When done writing the program, close file pointer and * notify FPGA to pick up the program from flash * @param filefp pointer to flash */ -void stopWritingFPGAprogram(FILE* filefp); +void stopWritingFPGAprogram(FILE *filefp); /** * Write FPGA Program to flash @@ -50,4 +50,4 @@ void stopWritingFPGAprogram(FILE* filefp); * @param filefp pointer to flash * @return 0 for success, 1 for fail (cannot write) */ -int writeFPGAProgram(char* fpgasrc, uint64_t fsize, FILE* filefp); +int writeFPGAProgram(char *fpgasrc, uint64_t fsize, FILE *filefp); diff --git a/slsDetectorServers/slsDetectorServer/include/programFpgaNios.h b/slsDetectorServers/slsDetectorServer/include/programFpgaNios.h old mode 100755 new mode 100644 index bf5ce2b84..27770b478 --- a/slsDetectorServers/slsDetectorServer/include/programFpgaNios.h +++ b/slsDetectorServers/slsDetectorServer/include/programFpgaNios.h @@ -1,14 +1,15 @@ #pragma once -#include #include +#include #define NIOS_MAX_APP_IMAGE_SIZE (0x00580000) /** Notify microcontroller of successful server start up */ void NotifyServerStartSuccess(); -/** create notification file to notify watchdog of critical tasks (to not shutdown) */ +/** create notification file to notify watchdog of critical tasks (to not + * shutdown) */ void CreateNotificationForCriticalTasks(); /** write 1 to notification file to postpone shut down process if requested*/ @@ -23,8 +24,8 @@ void rebootControllerAndFPGA(); /** finds the right mtd drive * @param mess error message * @returns ok or fail -*/ -int findFlash(char* mess); + */ +int findFlash(char *mess); /** erase flash */ void eraseFlash(); @@ -35,7 +36,7 @@ void eraseFlash(); * @param fsize file size * @returns ok or fail */ -int eraseAndWriteToFlash(char* mess, char* fpgasrc, uint64_t fsize); +int eraseAndWriteToFlash(char *mess, char *fpgasrc, uint64_t fsize); /** * Write FPGA Program to flash @@ -45,4 +46,4 @@ int eraseAndWriteToFlash(char* mess, char* fpgasrc, uint64_t fsize); * @param filefp pointer to flash * @return ok or fail */ -int writeFPGAProgram(char* mess, char* fpgasrc, uint64_t fsize, FILE* filefp); +int writeFPGAProgram(char *mess, char *fpgasrc, uint64_t fsize, FILE *filefp); diff --git a/slsDetectorServers/slsDetectorServer/include/readDefaultPattern.h b/slsDetectorServers/slsDetectorServer/include/readDefaultPattern.h old mode 100755 new mode 100644 index a1554236a..9792aad11 --- a/slsDetectorServers/slsDetectorServer/include/readDefaultPattern.h +++ b/slsDetectorServers/slsDetectorServer/include/readDefaultPattern.h @@ -1,22 +1,24 @@ #pragma once -#include #include +#include -int loadDefaultPattern(char* fname); +int loadDefaultPattern(char *fname); -int default_writePatternWord(char* line, uint32_t addr, uint64_t word); +int default_writePatternWord(char *line, uint32_t addr, uint64_t word); -int default_writePatternIOControl(char* line, uint64_t arg); +int default_writePatternIOControl(char *line, uint64_t arg); -int default_writePatternClkControl(char* line, uint64_t arg); +int default_writePatternClkControl(char *line, uint64_t arg); -int default_setPatternLoopLimits(char* line, uint32_t startAddr, uint32_t stopAddr); +int default_setPatternLoopLimits(char *line, uint32_t startAddr, + uint32_t stopAddr); -int default_setPatternLoopAddresses(char* line, int level, uint32_t startAddr, uint32_t stopAddr); +int default_setPatternLoopAddresses(char *line, int level, uint32_t startAddr, + uint32_t stopAddr); -int default_setPatternLoopCycles(char* line, int level, int numLoops); +int default_setPatternLoopCycles(char *line, int level, int numLoops); -int default_setPatternWaitAddresses(char* line, int level, uint32_t addr); +int default_setPatternWaitAddresses(char *line, int level, uint32_t addr); -int default_setPatternWaitTime(char* line, int level, uint64_t waittime); \ No newline at end of file +int default_setPatternWaitTime(char *line, int level, uint64_t waittime); \ No newline at end of file diff --git a/slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h b/slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h old mode 100755 new mode 100644 index 4a68981dc..006ce81d7 --- a/slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h +++ b/slsDetectorServers/slsDetectorServer/include/slsDetectorFunctionList.h @@ -1,11 +1,12 @@ -#include "sls_detector_defs.h" #include "slsDetectorServer_defs.h" // DAC_INDEX, ADC_INDEX, also include RegisterDefs.h +#include "sls_detector_defs.h" #ifdef GOTTHARDD -#include "clogger.h" // runState(enum TLogLevel) -#include "AD9252.h" // old board compatibility +#include "AD9252.h" // old board compatibility +#include "clogger.h" // runState(enum TLogLevel) #endif -#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) -#include "AD9257.h" // commonServerFunctions.h, blackfin.h, ansi.h +#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || \ + defined(MOENCHD) +#include "AD9257.h" // commonServerFunctions.h, blackfin.h, ansi.h #endif #ifdef MOENCHD #include "readDefaultPattern.h" @@ -19,533 +20,528 @@ #if defined(MYTHEN3D) || defined(GOTTHARD2D) #include "nios.h" -#elif defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) +#elif defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || \ + defined(MOENCHD) #include "blackfin.h" #endif - +#include // FILE #include -#include // FILE #include /**************************************************** This functions are used by the slsDetectroServer_funcs interface. -Here are the definitions, but the actual implementation should be done for each single detector. +Here are the definitions, but the actual implementation should be done for each +single detector. ****************************************************/ -enum interfaceType {OUTER, INNER}; +enum interfaceType { OUTER, INNER }; typedef struct udpStruct_s { - int srcport; - int srcport2; - int dstport; - int dstport2; - uint64_t srcmac; - uint64_t srcmac2; - uint64_t dstmac; - uint64_t dstmac2; - uint32_t srcip; - uint32_t srcip2; - uint32_t dstip; - uint32_t dstip2; -}udpStruct; - + int srcport; + int srcport2; + int dstport; + int dstport2; + uint64_t srcmac; + uint64_t srcmac2; + uint64_t dstmac; + uint64_t dstmac2; + uint32_t srcip; + uint32_t srcip2; + uint32_t dstip; + uint32_t dstip2; +} udpStruct; // basic tests -int isInitCheckDone(); -int getInitResult(char** mess); -void basictests(); -#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) -int checkType(); -int testFpga(); -int testBus(); +int isInitCheckDone(); +int getInitResult(char **mess); +void basictests(); +#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || \ + defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) +int checkType(); +int testFpga(); +int testBus(); #endif -#if defined(GOTTHARDD) || ((defined(EIGERD) || defined(JUNGFRAUD)) && defined(VIRTUAL)) -void setTestImageMode(int ival); -int getTestImageMode(); +#if defined(GOTTHARDD) || \ + ((defined(EIGERD) || defined(JUNGFRAUD)) && defined(VIRTUAL)) +void setTestImageMode(int ival); +int getTestImageMode(); #endif // Ids -u_int64_t getServerVersion(); -u_int64_t getClientServerAPIVersion(); -u_int64_t getFirmwareVersion(); -u_int64_t getFirmwareAPIVersion(); -#if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) -u_int16_t getHardwareVersionNumber(); +u_int64_t getServerVersion(); +u_int64_t getClientServerAPIVersion(); +u_int64_t getFirmwareVersion(); +u_int64_t getFirmwareAPIVersion(); +#if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || \ + defined(MYTHEN3D) || defined(GOTTHARD2D) +u_int16_t getHardwareVersionNumber(); #endif #if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) -u_int16_t getHardwareSerialNumber(); +u_int16_t getHardwareSerialNumber(); #endif #ifdef JUNGFRAUD -int isHardwareVersion2(); +int isHardwareVersion2(); #endif -u_int32_t getDetectorNumber(); -u_int64_t getDetectorMAC(); -u_int32_t getDetectorIP(); +u_int32_t getDetectorNumber(); +u_int64_t getDetectorMAC(); +u_int32_t getDetectorIP(); #ifdef GOTTHARDD -u_int32_t getBoardRevision(); +u_int32_t getBoardRevision(); #endif - // initialization -void initControlServer(); -void initStopServer(); +void initControlServer(); +void initStopServer(); #ifdef EIGERD -void getModuleConfiguration(); +void getModuleConfiguration(); #endif // set up detector #ifdef EIGERD -void allocateDetectorStructureMemory(); +void allocateDetectorStructureMemory(); #endif -void setupDetector(); +void setupDetector(); #if defined(CHIPTESTBOARDD) || defined(MOENCHD) -int updateDatabytesandAllocateRAM(); -void updateDataBytes(); +int updateDatabytesandAllocateRAM(); +void updateDataBytes(); #endif -#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(MYTHEN3D) || defined(MOENCHD) -int setDefaultDacs(); +#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(MYTHEN3D) || \ + defined(MOENCHD) +int setDefaultDacs(); #endif #ifdef GOTTHARD2D -int readConfigFile(); +int readConfigFile(); #endif - // advanced read/write reg #ifdef EIGERD -int writeRegister(uint32_t offset, uint32_t data); -int readRegister(uint32_t offset, uint32_t* retval); +int writeRegister(uint32_t offset, uint32_t data); +int readRegister(uint32_t offset, uint32_t *retval); #elif GOTTHARDD -uint32_t writeRegister16And32(uint32_t offset, uint32_t data); //FIXME its not there in ctb or moench? -uint32_t readRegister16And32(uint32_t offset); +uint32_t +writeRegister16And32(uint32_t offset, + uint32_t data); // FIXME its not there in ctb or moench? +uint32_t readRegister16And32(uint32_t offset); #endif - // firmware functions (resets) -#if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) -void cleanFifos(); -void resetCore(); -void resetPeripheral(); +#if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || \ + defined(MYTHEN3D) || defined(GOTTHARD2D) +void cleanFifos(); +void resetCore(); +void resetPeripheral(); #elif GOTTHARDD -void setPhaseShiftOnce(); -void setPhaseShift(int numphaseshift); -void cleanFifos(); -void setADCSyncRegister(); -void setDAQRegister(); -void setChipOfInterestRegister(int adc); -void setROIADC(int adc); -void setGbitReadout(); -int readConfigFile(); -void setMasterSlaveConfiguration(); +void setPhaseShiftOnce(); +void setPhaseShift(int numphaseshift); +void cleanFifos(); +void setADCSyncRegister(); +void setDAQRegister(); +void setChipOfInterestRegister(int adc); +void setROIADC(int adc); +void setGbitReadout(); +int readConfigFile(); +void setMasterSlaveConfiguration(); #endif - // parameters - dr, roi -int setDynamicRange(int dr); +int setDynamicRange(int dr); #ifdef GOTTHARDD -int setROI(ROI arg); -ROI getROI(); +int setROI(ROI arg); +ROI getROI(); #endif #ifdef JUNGFRAUD -void setADCInvertRegister(uint32_t val); -uint32_t getADCInvertRegister(); +void setADCInvertRegister(uint32_t val); +uint32_t getADCInvertRegister(); #endif #if defined(CHIPTESTBOARDD) || defined(MOENCHD) -int setADCEnableMask(uint32_t mask); -uint32_t getADCEnableMask(); -void setADCEnableMask_10G(uint32_t mask); -uint32_t getADCEnableMask_10G(); -void setADCInvertRegister(uint32_t val); -uint32_t getADCInvertRegister(); +int setADCEnableMask(uint32_t mask); +uint32_t getADCEnableMask(); +void setADCEnableMask_10G(uint32_t mask); +uint32_t getADCEnableMask_10G(); +void setADCInvertRegister(uint32_t val); +uint32_t getADCInvertRegister(); #endif #if defined(CHIPTESTBOARDD) -int setExternalSamplingSource(int val); -int setExternalSampling(int val); +int setExternalSamplingSource(int val); +int setExternalSampling(int val); #endif // parameters - readout #ifdef EIGERD -int setParallelMode(int mode); -int getParallelMode(); -int setOverFlowMode(int mode); -int getOverFlowMode(); -void setStoreInRamMode(int mode); -int getStoreInRamMode(); +int setParallelMode(int mode); +int getParallelMode(); +int setOverFlowMode(int mode); +int getOverFlowMode(); +void setStoreInRamMode(int mode); +int getStoreInRamMode(); #endif #ifdef CHIPTESTBOARDD -int setReadoutMode(enum readoutMode mode); -int getReadoutMode(); +int setReadoutMode(enum readoutMode mode); +int getReadoutMode(); #endif - - // parameters - timer #ifdef JUNGFRAUD -int selectStoragecellStart(int pos); +int selectStoragecellStart(int pos); #endif -#if defined(JUNGFRAUD) || defined(EIGERD) -int setStartingFrameNumber(uint64_t value); -int getStartingFrameNumber(uint64_t* value); +#if defined(JUNGFRAUD) || defined(EIGERD) +int setStartingFrameNumber(uint64_t value); +int getStartingFrameNumber(uint64_t *value); #endif -void setNumFrames(int64_t val); -int64_t getNumFrames(); -void setNumTriggers(int64_t val); -int64_t getNumTriggers(); -int setExpTime(int64_t val); -int64_t getExpTime(); -int setPeriod(int64_t val); -int64_t getPeriod(); +void setNumFrames(int64_t val); +int64_t getNumFrames(); +void setNumTriggers(int64_t val); +int64_t getNumTriggers(); +int setExpTime(int64_t val); +int64_t getExpTime(); +int setPeriod(int64_t val); +int64_t getPeriod(); #ifdef GOTTHARD2D -void setNumBursts(int64_t val); -int64_t getNumBursts(); -int setBurstPeriod(int64_t val); -int64_t getBurstPeriod(); +void setNumBursts(int64_t val); +int64_t getNumBursts(); +int setBurstPeriod(int64_t val); +int64_t getBurstPeriod(); #endif #ifdef EIGERD -int setSubExpTime(int64_t val); -int64_t getSubExpTime(); -int setSubDeadTime(int64_t val); -int64_t getSubDeadTime(); -int64_t getMeasuredPeriod(); -int64_t getMeasuredSubPeriod(); +int setSubExpTime(int64_t val); +int64_t getSubExpTime(); +int setSubDeadTime(int64_t val); +int64_t getSubDeadTime(); +int64_t getMeasuredPeriod(); +int64_t getMeasuredSubPeriod(); #endif #ifdef JUNGFRAUD -void setNumAdditionalStorageCells(int val); -int getNumAdditionalStorageCells(); -int setStorageCellDelay(int64_t val); -int64_t getStorageCellDelay(); +void setNumAdditionalStorageCells(int val); +int getNumAdditionalStorageCells(); +int setStorageCellDelay(int64_t val); +int64_t getStorageCellDelay(); #endif #if defined(CHIPTESTBOARDD) || defined(MOENCHD) -int setNumAnalogSamples(int val); -int getNumAnalogSamples(); +int setNumAnalogSamples(int val); +int getNumAnalogSamples(); #endif #ifdef CHIPTESTBOARDD -int setNumDigitalSamples(int val); -int getNumDigitalSamples(); +int setNumDigitalSamples(int val); +int getNumDigitalSamples(); #endif #ifdef MYTHEN3D -void setCounterMask(uint32_t arg); -uint32_t getCounterMask(); +void setCounterMask(uint32_t arg); +uint32_t getCounterMask(); #endif -#if defined(JUNGFRAUD) || defined(GOTTHARDD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) -int setDelayAfterTrigger(int64_t val); -int64_t getDelayAfterTrigger(); -int64_t getNumFramesLeft(); -int64_t getNumTriggersLeft(); -int64_t getDelayAfterTriggerLeft(); -int64_t getPeriodLeft(); +#if defined(JUNGFRAUD) || defined(GOTTHARDD) || defined(CHIPTESTBOARDD) || \ + defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) +int setDelayAfterTrigger(int64_t val); +int64_t getDelayAfterTrigger(); +int64_t getNumFramesLeft(); +int64_t getNumTriggersLeft(); +int64_t getDelayAfterTriggerLeft(); +int64_t getPeriodLeft(); #endif #ifdef GOTTHARDD -int64_t getExpTimeLeft(); +int64_t getExpTimeLeft(); #endif -#if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) -int64_t getFramesFromStart(); -int64_t getActualTime(); -int64_t getMeasurementTime(); +#if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || \ + defined(MYTHEN3D) || defined(GOTTHARD2D) +int64_t getFramesFromStart(); +int64_t getActualTime(); +int64_t getMeasurementTime(); #endif - - // parameters - module, settings -#if (!defined(CHIPTESTBOARDD)) && (!defined(MOENCHD)) && (!defined(MYTHEN3D)) && (!defined(GOTTHARD2D)) -int setModule(sls_detector_module myMod, char* mess); -int getModule(sls_detector_module *myMod); +#if (!defined(CHIPTESTBOARDD)) && (!defined(MOENCHD)) && \ + (!defined(MYTHEN3D)) && (!defined(GOTTHARD2D)) +int setModule(sls_detector_module myMod, char *mess); +int getModule(sls_detector_module *myMod); #endif -#if (!defined(CHIPTESTBOARDD)) && (!defined(MYTHEN3D)) -enum detectorSettings setSettings(enum detectorSettings sett); +#if (!defined(CHIPTESTBOARDD)) && (!defined(MYTHEN3D)) +enum detectorSettings setSettings(enum detectorSettings sett); #endif #if !defined(MYTHEN3D) -enum detectorSettings getSettings(); +enum detectorSettings getSettings(); #endif // parameters - threshold #ifdef EIGERD -int getThresholdEnergy(); -int setThresholdEnergy(int ev); +int getThresholdEnergy(); +int setThresholdEnergy(int ev); #endif // parameters - dac, adc, hv #ifdef GOTTHARD2D -int setOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex, int val); -int getOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex); +int setOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex, int val); +int getOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex); #endif -void setDAC(enum DACINDEX ind, int val, int mV); -int getDAC(enum DACINDEX ind, int mV); -int getMaxDacSteps(); +void setDAC(enum DACINDEX ind, int val, int mV); +int getDAC(enum DACINDEX ind, int mV); +int getMaxDacSteps(); #if defined(CHIPTESTBOARDD) || defined(MOENCHD) -int dacToVoltage(int dac); -int checkVLimitCompliant(int mV); -int checkVLimitDacCompliant(int dac); -int getVLimit(); -void setVLimit(int l); +int dacToVoltage(int dac); +int checkVLimitCompliant(int mV); +int checkVLimitDacCompliant(int dac); +int getVLimit(); +void setVLimit(int l); #endif #ifdef CHIPTESTBOARDD -int isVchipValid(int val); -int getVchip(); -void setVchip(int val); -int getVChipToSet(enum DACINDEX ind, int val); -int getDACIndexFromADCIndex(enum ADCINDEX ind); -int getADCIndexFromDACIndex(enum DACINDEX ind); -int isPowerValid(enum DACINDEX ind, int val); -int getPower(); -void setPower(enum DACINDEX ind, int val); -void powerOff(); +int isVchipValid(int val); +int getVchip(); +void setVchip(int val); +int getVChipToSet(enum DACINDEX ind, int val); +int getDACIndexFromADCIndex(enum ADCINDEX ind); +int getADCIndexFromDACIndex(enum DACINDEX ind); +int isPowerValid(enum DACINDEX ind, int val); +int getPower(); +void setPower(enum DACINDEX ind, int val); +void powerOff(); #endif -#if !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) -int getADC(enum ADCINDEX ind); +#if !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) +int getADC(enum ADCINDEX ind); #endif -int setHighVoltage(int val); - - +int setHighVoltage(int val); // parameters - timing, extsig -void setTiming( enum timingMode arg); -enum timingMode getTiming(); +void setTiming(enum timingMode arg); +enum timingMode getTiming(); #ifdef GOTTHARDD -void setExtSignal(enum externalSignalFlag mode); -int getExtSignal(); +void setExtSignal(enum externalSignalFlag mode); +int getExtSignal(); #endif // configure mac #ifdef GOTTHARDD -void calcChecksum(mac_conf* mac, int sourceip, int destip); +void calcChecksum(mac_conf *mac, int sourceip, int destip); #elif JUNGFRAUD -void setNumberofUDPInterfaces(int val); -int getNumberofUDPInterfaces(); -void selectPrimaryInterface(int val); -int getPrimaryInterface(); -void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip, uint64_t destmac, uint32_t destport, uint64_t sourcemac, uint32_t sourceip, uint32_t sourceport); +void setNumberofUDPInterfaces(int val); +int getNumberofUDPInterfaces(); +void selectPrimaryInterface(int val); +int getPrimaryInterface(); +void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip, + uint64_t destmac, uint32_t destport, uint64_t sourcemac, + uint32_t sourceip, uint32_t sourceport); #endif -#if defined(JUNGFRAUD) || defined(GOTTHARD2D) || defined(MYTHEN3D) || defined(CHIPTESTBOARDD) || defined(MOENCHD) -void calcChecksum(udp_header* udp); +#if defined(JUNGFRAUD) || defined(GOTTHARD2D) || defined(MYTHEN3D) || \ + defined(CHIPTESTBOARDD) || defined(MOENCHD) +void calcChecksum(udp_header *udp); #endif #ifdef GOTTHARDD -int getAdcConfigured(); +int getAdcConfigured(); #endif - - -int configureMAC(); -int setDetectorPosition(int pos[]); -int* getDetectorPosition(); - +int configureMAC(); +int setDetectorPosition(int pos[]); +int *getDetectorPosition(); #ifdef EIGERD -int setQuad(int value); -int getQuad(); -int setInterruptSubframe(int value); -int getInterruptSubframe(); -int setReadNLines(int value); -int getReadNLines(); +int setQuad(int value); +int getQuad(); +int setInterruptSubframe(int value); +int getInterruptSubframe(); +int setReadNLines(int value); +int getReadNLines(); #endif #if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(EIGERD) -int enableTenGigabitEthernet(int val); +int enableTenGigabitEthernet(int val); #endif - // very detector specific // moench specific - powerchip #ifdef MOENCHD -int powerChip (int on); -int setAnalogOnlyReadout(); +int powerChip(int on); +int setAnalogOnlyReadout(); #endif -// chip test board or moench specific - configure frequency, phase, pll, flashing firmware +// chip test board or moench specific - configure frequency, phase, pll, +// flashing firmware #if defined(CHIPTESTBOARDD) || defined(MOENCHD) -int setPhase(enum CLKINDEX ind, int val, int degrees); -int getPhase(enum CLKINDEX ind, int degrees); -int getMaxPhase(enum CLKINDEX ind); -int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval); -int setFrequency(enum CLKINDEX ind, int val); -int getFrequency(enum CLKINDEX ind); -void configureSyncFrequency(enum CLKINDEX ind); -void setPipeline(enum CLKINDEX ind, int val); -int getPipeline(enum CLKINDEX ind); +int setPhase(enum CLKINDEX ind, int val, int degrees); +int getPhase(enum CLKINDEX ind, int degrees); +int getMaxPhase(enum CLKINDEX ind); +int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval); +int setFrequency(enum CLKINDEX ind, int val); +int getFrequency(enum CLKINDEX ind); +void configureSyncFrequency(enum CLKINDEX ind); +void setPipeline(enum CLKINDEX ind, int val); +int getPipeline(enum CLKINDEX ind); // patterns -uint64_t writePatternIOControl(uint64_t word); -uint64_t writePatternClkControl(uint64_t word); -uint64_t readPatternWord(int addr); -uint64_t writePatternWord(int addr, uint64_t word); -int setPatternWaitAddress(int level, int addr); -uint64_t setPatternWaitTime(int level, uint64_t t); -void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop); +uint64_t writePatternIOControl(uint64_t word); +uint64_t writePatternClkControl(uint64_t word); +uint64_t readPatternWord(int addr); +uint64_t writePatternWord(int addr, uint64_t word); +int setPatternWaitAddress(int level, int addr); +uint64_t setPatternWaitTime(int level, uint64_t t); +void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop); #ifdef CHIPTESTBOARDD -int setLEDEnable(int enable); -void setDigitalIODelay(uint64_t pinMask, int delay); +int setLEDEnable(int enable); +void setDigitalIODelay(uint64_t pinMask, int delay); #endif -void setPatternMask(uint64_t mask); -uint64_t getPatternMask(); -void setPatternBitMask(uint64_t mask); -uint64_t getPatternBitMask(); +void setPatternMask(uint64_t mask); +uint64_t getPatternMask(); +void setPatternBitMask(uint64_t mask); +uint64_t getPatternBitMask(); #endif -// jungfrau specific - powerchip, autocompdisable, clockdiv, asictimer, clock, pll, flashing firmware +// jungfrau specific - powerchip, autocompdisable, clockdiv, asictimer, clock, +// pll, flashing firmware #ifdef JUNGFRAUD -void initReadoutConfiguration(); -int powerChip (int on); -int autoCompDisable(int on); -void configureASICTimer(); -int setClockDivider(enum CLKINDEX ind, int val); -int getClockDivider(enum CLKINDEX ind); -int setPhase(enum CLKINDEX ind, int val, int degrees); -int getPhase(enum CLKINDEX ind, int degrees); -int getMaxPhase(enum CLKINDEX ind); -int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval); -int setThresholdTemperature(int val); -int setTemperatureControl(int val); -int setTemperatureEvent(int val); -void alignDeserializer(); +void initReadoutConfiguration(); +int powerChip(int on); +int autoCompDisable(int on); +void configureASICTimer(); +int setClockDivider(enum CLKINDEX ind, int val); +int getClockDivider(enum CLKINDEX ind); +int setPhase(enum CLKINDEX ind, int val, int degrees); +int getPhase(enum CLKINDEX ind, int degrees); +int getMaxPhase(enum CLKINDEX ind); +int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval); +int setThresholdTemperature(int val); +int setTemperatureControl(int val); +int setTemperatureEvent(int val); +void alignDeserializer(); // eiger specific - iodelay, pulse, rate, temp, activate, delay nw parameter #elif EIGERD -int setClockDivider(enum CLKINDEX ind, int val); -int getClockDivider(enum CLKINDEX ind); -int setIODelay(int val); -int setCounterBit(int val); -int pulsePixel(int n, int x, int y); -int pulsePixelNMove(int n, int x, int y); -int pulseChip(int n); -int updateRateCorrection(char* mess); -int validateAndSetRateCorrection(int64_t tau_ns, char* mess); -int setRateCorrection(int64_t custom_tau_in_nsec); -int getRateCorrectionEnable(); -int getDefaultSettingsTau_in_nsec(); -void setDefaultSettingsTau_in_nsec(int t); -int64_t getCurrentTau(); -void setExternalGating(int enable[]); -int setAllTrimbits(int val); -int getAllTrimbits(); -int getBebFPGATemp(); -int activate(int enable); +int setClockDivider(enum CLKINDEX ind, int val); +int getClockDivider(enum CLKINDEX ind); +int setIODelay(int val); +int setCounterBit(int val); +int pulsePixel(int n, int x, int y); +int pulsePixelNMove(int n, int x, int y); +int pulseChip(int n); +int updateRateCorrection(char *mess); +int validateAndSetRateCorrection(int64_t tau_ns, char *mess); +int setRateCorrection(int64_t custom_tau_in_nsec); +int getRateCorrectionEnable(); +int getDefaultSettingsTau_in_nsec(); +void setDefaultSettingsTau_in_nsec(int t); +int64_t getCurrentTau(); +void setExternalGating(int enable[]); +int setAllTrimbits(int val); +int getAllTrimbits(); +int getBebFPGATemp(); +int activate(int enable); // gotthard specific - adc phase #elif GOTTHARDD -int setPhase(enum CLKINDEX ind, int val, int degrees); +int setPhase(enum CLKINDEX ind, int val, int degrees); #elif MYTHEN3D -uint64_t readPatternWord(int addr); -uint64_t writePatternWord(int addr, uint64_t word); -int setPatternWaitAddress(int level, int addr); -uint64_t setPatternWaitTime(int level, uint64_t t); -void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop); -void setPatternMask(uint64_t mask); -uint64_t getPatternMask(); -void setPatternBitMask(uint64_t mask); -uint64_t getPatternBitMask(); -int checkDetectorType(); -int powerChip (int on); -int setPhase(enum CLKINDEX ind, int val, int degrees); -int getPhase(enum CLKINDEX ind, int degrees); -int getMaxPhase(enum CLKINDEX ind); -int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval); -//void setFrequency(enum CLKINDEX ind, int val); -int getFrequency(enum CLKINDEX ind); -int getVCOFrequency(enum CLKINDEX ind); -int getMaxClockDivider(); -int setClockDivider(enum CLKINDEX ind, int val); -int getClockDivider(enum CLKINDEX ind); +uint64_t readPatternWord(int addr); +uint64_t writePatternWord(int addr, uint64_t word); +int setPatternWaitAddress(int level, int addr); +uint64_t setPatternWaitTime(int level, uint64_t t); +void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop); +void setPatternMask(uint64_t mask); +uint64_t getPatternMask(); +void setPatternBitMask(uint64_t mask); +uint64_t getPatternBitMask(); +int checkDetectorType(); +int powerChip(int on); +int setPhase(enum CLKINDEX ind, int val, int degrees); +int getPhase(enum CLKINDEX ind, int degrees); +int getMaxPhase(enum CLKINDEX ind); +int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval); +// void setFrequency(enum CLKINDEX ind, int val); +int getFrequency(enum CLKINDEX ind); +int getVCOFrequency(enum CLKINDEX ind); +int getMaxClockDivider(); +int setClockDivider(enum CLKINDEX ind, int val); +int getClockDivider(enum CLKINDEX ind); #elif GOTTHARD2D -int checkDetectorType(); -int powerChip (int on); -int setPhase(enum CLKINDEX ind, int val, int degrees); -int getPhase(enum CLKINDEX ind, int degrees); -int getMaxPhase(enum CLKINDEX ind); -int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval); -//void setFrequency(enum CLKINDEX ind, int val); -int getFrequency(enum CLKINDEX ind); -int getVCOFrequency(enum CLKINDEX ind); -int getMaxClockDivider(); -int setClockDivider(enum CLKINDEX ind, int val); -int getClockDivider(enum CLKINDEX ind); -int setInjectChannel(int offset, int increment); -void getInjectedChannels(int* offset, int* increment); -int setVetoReference(int gainIndex, int value); -int setVetoPhoton(int chipIndex, int gainIndex, int* values); -int getVetoPhoton(int chipIndex, int* retvals); -int configureSingleADCDriver(int chipIndex); -int configureADC(); -int setBurstModeinFPGA(enum burstMode value); -int setBurstMode(enum burstMode burst); -enum burstMode getBurstMode(); -void setCurrentSource(int value); -int getCurrentSource(); -void setTimingSource(enum timingSourceType value); -enum timingSourceType getTimingSource(); +int checkDetectorType(); +int powerChip(int on); +int setPhase(enum CLKINDEX ind, int val, int degrees); +int getPhase(enum CLKINDEX ind, int degrees); +int getMaxPhase(enum CLKINDEX ind); +int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval); +// void setFrequency(enum CLKINDEX ind, int val); +int getFrequency(enum CLKINDEX ind); +int getVCOFrequency(enum CLKINDEX ind); +int getMaxClockDivider(); +int setClockDivider(enum CLKINDEX ind, int val); +int getClockDivider(enum CLKINDEX ind); +int setInjectChannel(int offset, int increment); +void getInjectedChannels(int *offset, int *increment); +int setVetoReference(int gainIndex, int value); +int setVetoPhoton(int chipIndex, int gainIndex, int *values); +int getVetoPhoton(int chipIndex, int *retvals); +int configureSingleADCDriver(int chipIndex); +int configureADC(); +int setBurstModeinFPGA(enum burstMode value); +int setBurstMode(enum burstMode burst); +enum burstMode getBurstMode(); +void setCurrentSource(int value); +int getCurrentSource(); +void setTimingSource(enum timingSourceType value); +enum timingSourceType getTimingSource(); #endif #if defined(JUNGFRAUD) || defined(EIGERD) -int getTenGigaFlowControl(); -int setTenGigaFlowControl(int value); -int getTransmissionDelayFrame(); -int setTransmissionDelayFrame(int value); +int getTenGigaFlowControl(); +int setTenGigaFlowControl(int value); +int getTransmissionDelayFrame(); +int setTransmissionDelayFrame(int value); #endif #ifdef EIGERD -int getTransmissionDelayLeft(); -int setTransmissionDelayLeft(int value); -int getTransmissionDelayRight(); -int setTransmissionDelayRight(int value); +int getTransmissionDelayLeft(); +int setTransmissionDelayLeft(int value); +int getTransmissionDelayRight(); +int setTransmissionDelayRight(int value); #endif - - - // aquisition #ifdef EIGERD -int prepareAcquisition(); +int prepareAcquisition(); #endif -int startStateMachine(); +int startStateMachine(); #ifdef VIRTUAL -void* start_timer(void* arg); +void *start_timer(void *arg); #endif -int stopStateMachine(); +int stopStateMachine(); #ifdef EIGERD -int softwareTrigger(); +int softwareTrigger(); #endif #ifdef EIGERD -int startReadOut(); +int startReadOut(); #endif -enum runStatus getRunStatus(); -void readFrame(int *ret, char *mess); +enum runStatus getRunStatus(); +void readFrame(int *ret, char *mess); #if defined(CHIPTESTBOARDD) || defined(MOENCHD) -void readandSendUDPFrames(int *ret, char *mess); -void unsetFifoReadStrobes(); -void readSample(int ns); -uint32_t checkDataInFifo(); -int checkFifoForEndOfAcquisition(); -int readFrameFromFifo(); +void readandSendUDPFrames(int *ret, char *mess); +void unsetFifoReadStrobes(); +void readSample(int ns); +uint32_t checkDataInFifo(); +int checkFifoForEndOfAcquisition(); +int readFrameFromFifo(); #endif -#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) -u_int32_t runBusy(); +#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || \ + defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) +u_int32_t runBusy(); #endif #ifdef GOTTHARDD -u_int32_t runState(enum TLogLevel lev); +u_int32_t runState(enum TLogLevel lev); #endif - -//common +// common #ifdef EIGERD -int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod); +int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod); #endif -int calculateDataBytes(); -int getTotalNumberOfChannels(); -#if defined(MOENCHD) || defined(CHIPTESTBOARDD) -void getNumberOfChannels(int* nchanx, int* nchany); +int calculateDataBytes(); +int getTotalNumberOfChannels(); +#if defined(MOENCHD) || defined(CHIPTESTBOARDD) +void getNumberOfChannels(int *nchanx, int *nchany); #endif -int getNumberOfChips(); -int getNumberOfDACs(); -int getNumberOfChannelsPerChip(); - - - +int getNumberOfChips(); +int getNumberOfDACs(); +int getNumberOfChannelsPerChip(); diff --git a/slsDetectorServers/slsDetectorServer/include/slsDetectorServer_funcs.h b/slsDetectorServers/slsDetectorServer/include/slsDetectorServer_funcs.h old mode 100755 new mode 100644 index c64ac28ad..23028e9f9 --- a/slsDetectorServers/slsDetectorServer/include/slsDetectorServer_funcs.h +++ b/slsDetectorServers/slsDetectorServer/include/slsDetectorServer_funcs.h @@ -1,23 +1,24 @@ #pragma once -#include "sls_detector_defs.h" #include "clogger.h" +#include "sls_detector_defs.h" -enum numberMode {DEC, HEX}; -#define GOODBYE (-200) -#define REBOOT (-400) +enum numberMode { DEC, HEX }; +#define GOODBYE (-200) +#define REBOOT (-400) // initialization functions int printSocketReadError(); void init_detector(); int decode_function(int); -const char* getRetName(); -const char* getFunctionName(enum detFuncs func); +const char *getRetName(); +const char *getFunctionName(enum detFuncs func); void function_table(); void functionNotImplemented(); -void modeNotImplemented(char* modename, int mode); -void validate(int arg, int retval, char* modename, enum numberMode nummode); -void validate64(int64_t arg, int64_t retval, char* modename, enum numberMode nummode); -int executeCommand(char* command, char* result, enum TLogLevel level); +void modeNotImplemented(char *modename, int mode); +void validate(int arg, int retval, char *modename, enum numberMode nummode); +void validate64(int64_t arg, int64_t retval, char *modename, + enum numberMode nummode); +int executeCommand(char *command, char *result, enum TLogLevel level); int M_nofunc(int); #if defined(MYTHEN3D) || defined(GOTTHARD2D) void rebootNiosControllerAndFPGA(); @@ -217,4 +218,3 @@ int set_timing_source(int); int get_num_channels(int); int update_rate_correction(int); int get_receiver_parameters(int); - From 7d94ad51ab2dd3fad6aef8634411f4cb5c1c8fb6 Mon Sep 17 00:00:00 2001 From: Dhanya Thattil Date: Tue, 5 May 2020 15:30:44 +0200 Subject: [PATCH 2/4] format slsdetectorservers .c --- cmake/clang-format.cmake | 2 +- .../ctbDetectorServer/RegisterDefs.h | 34 +- .../slsDetectorFunctionList.c | 1947 +-- .../eigerDetectorServer/9mhvserial_bf.c | 339 +- slsDetectorServers/eigerDetectorServer/Beb.c | 2524 ++-- .../eigerDetectorServer/FebControl.c | 3859 +++--- .../eigerDetectorServer/FebControl.h | 7 +- .../eigerDetectorServer/FebInterface.c | 315 +- .../eigerDetectorServer/FebRegisterDefs.h | 6 +- .../eigerDetectorServer/HardwareIO.c | 36 +- .../eigerDetectorServer/LocalLinkInterface.c | 340 +- .../slsDetectorFunctionList.c | 3051 +++-- .../slsDetectorFunctionList.c | 3412 ++--- .../slsDetectorFunctionList.c | 1429 +-- .../slsDetectorFunctionList.c | 2431 ++-- .../moenchDetectorServer/RegisterDefs.h | 34 +- .../slsDetectorFunctionList.c | 1847 +-- .../slsDetectorFunctionList.c | 1922 +-- .../slsDetectorServer/src/AD7689.c | 240 +- .../slsDetectorServer/src/AD9252.c | 218 +- .../slsDetectorServer/src/AD9257.c | 439 +- .../slsDetectorServer/src/ALTERA_PLL.c | 282 +- .../src/ALTERA_PLL_CYCLONE10.c | 126 +- .../slsDetectorServer/src/ASIC_Driver.c | 32 +- .../slsDetectorServer/src/DAC6571.c | 34 +- .../slsDetectorServer/src/I2C.c | 227 +- .../slsDetectorServer/src/INA226.c | 101 +- .../slsDetectorServer/src/LTC2620.c | 169 +- .../slsDetectorServer/src/LTC2620_Driver.c | 63 +- .../slsDetectorServer/src/MAX1932.c | 36 +- .../src/UDPPacketHeaderGenerator.c | 195 +- .../slsDetectorServer/src/blackfin.c | 159 +- .../slsDetectorServer/src/common.c | 19 +- .../src/commonServerFunctions.c | 124 +- .../src/communication_funcs.c | 1010 +- .../src/communication_funcs_UDP.c | 179 +- .../src/communication_virtual.c | 89 +- .../slsDetectorServer/src/nios.c | 177 +- .../src/programFpgaBlackfin.c | 207 +- .../slsDetectorServer/src/programFpgaNios.c | 222 +- .../src/readDefaultPattern.c | 471 +- .../slsDetectorServer/src/slsDetectorServer.c | 238 +- .../src/slsDetectorServer_funcs.c | 10449 ++++++++-------- 43 files changed, 20315 insertions(+), 18726 deletions(-) mode change 100755 => 100644 slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/9mhvserial_bf.c mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/Beb.c mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/FebControl.c mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/FebInterface.c mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/HardwareIO.c mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/LocalLinkInterface.c mode change 100755 => 100644 slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c mode change 100755 => 100644 slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c mode change 100755 => 100644 slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c mode change 100755 => 100644 slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/AD7689.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/AD9252.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/AD9257.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/ALTERA_PLL.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/ASIC_Driver.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/DAC6571.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/I2C.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/INA226.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/LTC2620.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/LTC2620_Driver.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/MAX1932.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/UDPPacketHeaderGenerator.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/blackfin.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/common.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/commonServerFunctions.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/communication_funcs.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/communication_funcs_UDP.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/communication_virtual.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/nios.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/programFpgaBlackfin.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/programFpgaNios.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/readDefaultPattern.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/slsDetectorServer.c mode change 100755 => 100644 slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c diff --git a/cmake/clang-format.cmake b/cmake/clang-format.cmake index 158361c84..89d523959 100644 --- a/cmake/clang-format.cmake +++ b/cmake/clang-format.cmake @@ -1,7 +1,7 @@ # A CMake script to find all source files and setup clang-format targets for them # Find all source files -set(ClangFormat_CXX_FILE_EXTENSIONS ${ClangFormat_CXX_FILE_EXTENSIONS} *.cpp *.h *.cxx *.hxx *.hpp *.cc *.ipp) +set(ClangFormat_CXX_FILE_EXTENSIONS ${ClangFormat_CXX_FILE_EXTENSIONS} *.cpp *.h *.cxx *.hxx *.hpp *.cc *.ipp *.c) file(GLOB_RECURSE ALL_SOURCE_FILES ${ClangFormat_CXX_FILE_EXTENSIONS}) # Don't include some common build folders diff --git a/slsDetectorServers/ctbDetectorServer/RegisterDefs.h b/slsDetectorServers/ctbDetectorServer/RegisterDefs.h index 663259a5a..30e9f0649 100644 --- a/slsDetectorServers/ctbDetectorServer/RegisterDefs.h +++ b/slsDetectorServers/ctbDetectorServer/RegisterDefs.h @@ -145,12 +145,14 @@ /* Exposure Time Left 64 bit RO register */ //#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not -//used in FW #define EXPTIME_LEFT_MSB_REG (0x1B << MEM_MAP_SHIFT) +// used in FW #define EXPTIME_LEFT_MSB_REG (0x1B << +// MEM_MAP_SHIFT) //// Not used in FW /* Gates Left 64 bit RO register */ //#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not -//used in FW #define GATES_LEFT_MSB_REG (0x1D << MEM_MAP_SHIFT) +// used in FW #define GATES_LEFT_MSB_REG (0x1D << +// MEM_MAP_SHIFT) //// Not used in FW /* Data In 64 bit RO register TODO */ @@ -163,7 +165,8 @@ /* Frames From Start 64 bit RO register TODO */ //#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not -//used in FW #define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT) +// used in FW #define FRAMES_FROM_START_MSB_REG (0x23 << +// MEM_MAP_SHIFT) //// Not used in FW /* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */ @@ -331,21 +334,22 @@ #define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) //#define CONTROL_STRT_FF_TST_OFST (2) //#define CONTROL_STRT_FF_TST_MSK (0x00000001 << -//CONTROL_STRT_FF_TST_OFST) #define CONTROL_STP_FF_TST_OFST (3) +// CONTROL_STRT_FF_TST_OFST) #define CONTROL_STP_FF_TST_OFST (3) //#define CONTROL_STP_FF_TST_MSK (0x00000001 << -//CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4) +// CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4) //#define CONTROL_STRT_RDT_MSK (0x00000001 << -//CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5) #define -//CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST) +// CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5) +// #define CONTROL_STP_RDT_MSK (0x00000001 << +// CONTROL_STP_RDT_OFST) #define CONTROL_STRT_EXPSR_OFST (6) #define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST) //#define CONTROL_STP_EXPSR_OFST (7) //#define CONTROL_STP_EXPSR_MSK (0x00000001 << -//CONTROL_STP_RDT_OFST) #define CONTROL_STRT_TRN_OFST (8) #define -//CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) +// CONTROL_STP_RDT_OFST) #define CONTROL_STRT_TRN_OFST (8) #define +// CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) //#define CONTROL_STP_TRN_OFST (9) //#define CONTROL_STP_TRN_MSK (0x00000001 << -//CONTROL_STP_RDT_OFST) +// CONTROL_STP_RDT_OFST) #define CONTROL_CRE_RST_OFST (10) #define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) #define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? @@ -354,7 +358,7 @@ #define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST) //#define CONTROL_PLL_RCNFG_WR_OFST (13) //#define CONTROL_PLL_RCNFG_WR_MSK (0x00000001 << -//CONTROL_PLL_RCNFG_WR_OFST) +// CONTROL_PLL_RCNFG_WR_OFST) #define CONTROL_SND_10GB_PCKT_OFST (14) #define CONTROL_SND_10GB_PCKT_MSK (0x00000001 << CONTROL_SND_10GB_PCKT_OFST) #define CONTROL_CLR_ACQSTN_FIFO_OFST (15) @@ -486,13 +490,13 @@ /* Period 64 bit RW register */ //#define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) // -//Not used in FW #define EXPTIME_MSB_REG (0x69 << -//MEM_MAP_SHIFT) // Not used in FW +// Not used in FW #define EXPTIME_MSB_REG (0x69 << +// MEM_MAP_SHIFT) // Not used in FW /* Gates 64 bit RW register */ //#define GATES_LSB_REG (0x6A << MEM_MAP_SHIFT) // Not used -//in FW #define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) // -//Not used in FW +// in FW #define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) // +// Not used in FW /* Pattern IO Control 64 bit RW regiser * Each bit configured as output(1)/ input(0) */ diff --git a/slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c old mode 100755 new mode 100644 index 4e87de588..98bf99f1f --- a/slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c @@ -1,26 +1,26 @@ #include "slsDetectorFunctionList.h" -#include "versionAPI.h" #include "clogger.h" +#include "versionAPI.h" -#include "communication_funcs_UDP.h" -#include "UDPPacketHeaderGenerator.h" -#include "common.h" #include "AD7689.h" // slow adcs +#include "ALTERA_PLL.h" // pll +#include "INA226.h" // i2c #include "LTC2620.h" // dacs #include "MAX1932.h" // hv -#include "INA226.h" // i2c -#include "ALTERA_PLL.h" // pll +#include "UDPPacketHeaderGenerator.h" +#include "common.h" +#include "communication_funcs_UDP.h" #ifdef VIRTUAL #include "communication_virtual.h" #endif -#include -#include // usleep #include +#include +#include // usleep #ifdef VIRTUAL +#include //ceil #include #include -#include //ceil #endif // Global variable from slsDetectorServer_funcs @@ -34,8 +34,8 @@ extern uint32_t udpPacketNumber; // Global variable from communication_funcs.c extern int isControlServer; -extern void getMacAddressinString(char* cmac, int size, uint64_t mac); -extern void getIpAddressinString(char* cip, uint32_t ip); +extern void getMacAddressinString(char *cmac, int size, uint64_t mac); +extern void getIpAddressinString(char *cip, uint32_t ip); int initError = OK; int initCheckDone = 0; @@ -51,8 +51,8 @@ int virtual_stop = 0; int dataBytes = 0; int analogDataBytes = 0; int digitalDataBytes = 0; -char* analogData = 0; -char* digitalData = 0; +char *analogData = 0; +char *digitalData = 0; char volatile *analogDataPtr = 0; char volatile *digitalDataPtr = 0; char udpPacketData[UDP_PACKET_DATA_BYTES + sizeof(sls_detector_header)]; @@ -61,7 +61,6 @@ uint32_t adcEnableMask_1g = 0; // 10g readout uint8_t adcEnableMask_10g = 0; - int32_t clkPhase[NUM_CLOCKS] = {}; uint32_t clkFrequency[NUM_CLOCKS] = {40, 20, 20, 200}; int dacValues[NDAC] = {}; @@ -74,13 +73,11 @@ int naSamples = 1; int ndSamples = 1; int detPos[2] = {0, 0}; -int isInitCheckDone() { - return initCheckDone; -} +int isInitCheckDone() { return initCheckDone; } -int getInitResult(char** mess) { - *mess = initErrorMessage; - return initError; +int getInitResult(char **mess) { + *mess = initErrorMessage; + return initError; } void basictests() { @@ -88,110 +85,108 @@ void basictests() { initCheckDone = 0; memset(initErrorMessage, 0, MAX_STR_LENGTH); #ifdef VIRTUAL - LOG(logINFOBLUE, ("******** Chip Test Board Virtual Server *****************\n")); + LOG(logINFOBLUE, + ("******** Chip Test Board Virtual Server *****************\n")); if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; } return; #else - defineGPIOpins(); - resetFPGA(); + defineGPIOpins(); + resetFPGA(); if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; } // does check only if flag is 0 (by default), set by command line - if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL) || (testBus() == FAIL))) { - strcpy(initErrorMessage, - "Could not pass basic tests of FPGA and bus. Dangerous to continue.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; - } + if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL) || + (testBus() == FAIL))) { + strcpy(initErrorMessage, "Could not pass basic tests of FPGA and bus. " + "Dangerous to continue.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; + } - uint16_t hversion = getHardwareVersionNumber(); - uint16_t hsnumber = getHardwareSerialNumber(); - uint32_t ipadd = getDetectorIP(); - uint64_t macadd = getDetectorMAC(); - int64_t fwversion = getFirmwareVersion(); - int64_t swversion = getServerVersion(); - int64_t sw_fw_apiversion = 0; - int64_t client_sw_apiversion = getClientServerAPIVersion(); + uint16_t hversion = getHardwareVersionNumber(); + uint16_t hsnumber = getHardwareSerialNumber(); + uint32_t ipadd = getDetectorIP(); + uint64_t macadd = getDetectorMAC(); + int64_t fwversion = getFirmwareVersion(); + int64_t swversion = getServerVersion(); + int64_t sw_fw_apiversion = 0; + int64_t client_sw_apiversion = getClientServerAPIVersion(); + if (fwversion >= MIN_REQRD_VRSN_T_RD_API) + sw_fw_apiversion = getFirmwareAPIVersion(); + LOG(logINFOBLUE, + ("************ Chip Test Board Server *********************\n" + "Hardware Version:\t\t 0x%x\n" + "Hardware Serial Nr:\t\t 0x%x\n" - if (fwversion >= MIN_REQRD_VRSN_T_RD_API) - sw_fw_apiversion = getFirmwareAPIVersion(); - LOG(logINFOBLUE, ("************ Chip Test Board Server *********************\n" - "Hardware Version:\t\t 0x%x\n" - "Hardware Serial Nr:\t\t 0x%x\n" + "Detector IP Addr:\t\t 0x%x\n" + "Detector MAC Addr:\t\t 0x%llx\n\n" - "Detector IP Addr:\t\t 0x%x\n" - "Detector MAC Addr:\t\t 0x%llx\n\n" + "Firmware Version:\t\t 0x%llx\n" + "Software Version:\t\t 0x%llx\n" + "F/w-S/w API Version:\t\t 0x%llx\n" + "Required Firmware Version:\t 0x%x\n" + "Client-Software API Version:\t 0x%llx\n" + "********************************************************\n", + hversion, hsnumber, ipadd, (long long unsigned int)macadd, + (long long int)fwversion, (long long int)swversion, + (long long int)sw_fw_apiversion, REQRD_FRMWR_VRSN, + (long long int)client_sw_apiversion)); - "Firmware Version:\t\t 0x%llx\n" - "Software Version:\t\t 0x%llx\n" - "F/w-S/w API Version:\t\t 0x%llx\n" - "Required Firmware Version:\t 0x%x\n" - "Client-Software API Version:\t 0x%llx\n" - "********************************************************\n", - hversion, hsnumber, - ipadd, - (long long unsigned int)macadd, - (long long int)fwversion, - (long long int)swversion, - (long long int)sw_fw_apiversion, - REQRD_FRMWR_VRSN, - (long long int)client_sw_apiversion - )); + // return if flag is not zero, debug mode + if (debugflag) { + return; + } - // return if flag is not zero, debug mode - if (debugflag) { - return; - } - - - //cant read versions + // cant read versions LOG(logINFO, ("Testing Firmware-software compatibility:\n")); - if(!fwversion || !sw_fw_apiversion){ - strcpy(initErrorMessage, - "Cant read versions from FPGA. Please update firmware.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + if (!fwversion || !sw_fw_apiversion) { + strcpy(initErrorMessage, + "Cant read versions from FPGA. Please update firmware.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for API compatibility - old server - if(sw_fw_apiversion > REQRD_FRMWR_VRSN){ - sprintf(initErrorMessage, - "This detector software software version (0x%llx) is incompatible.\n" - "Please update detector software (min. 0x%llx) to be compatible with this firmware.\n", - (long long int)sw_fw_apiversion, - (long long int)REQRD_FRMWR_VRSN); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + // check for API compatibility - old server + if (sw_fw_apiversion > REQRD_FRMWR_VRSN) { + sprintf(initErrorMessage, + "This detector software software version (0x%llx) is " + "incompatible.\n" + "Please update detector software (min. 0x%llx) to be " + "compatible with this firmware.\n", + (long long int)sw_fw_apiversion, + (long long int)REQRD_FRMWR_VRSN); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for firmware compatibility - old firmware - if( REQRD_FRMWR_VRSN > fwversion) { - sprintf(initErrorMessage, - "This firmware version (0x%llx) is incompatible.\n" - "Please update firmware (min. 0x%llx) to be compatible with this server.\n", - (long long int)fwversion, - (long long int)REQRD_FRMWR_VRSN); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } - LOG(logINFO, ("\tCompatibility - success\n")); + // check for firmware compatibility - old firmware + if (REQRD_FRMWR_VRSN > fwversion) { + sprintf(initErrorMessage, + "This firmware version (0x%llx) is incompatible.\n" + "Please update firmware (min. 0x%llx) to be compatible with " + "this server.\n", + (long long int)fwversion, (long long int)REQRD_FRMWR_VRSN); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } + LOG(logINFO, ("\tCompatibility - success\n")); #endif } @@ -199,15 +194,19 @@ int checkType() { #ifdef VIRTUAL return OK; #endif - uint32_t type = ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_DTCTR_TYP_MSK) >> FPGA_VERSION_DTCTR_TYP_OFST); - uint32_t expectedType = (((FPGA_VERSION_DTCTR_TYP_CTB_VAL) & FPGA_VERSION_DTCTR_TYP_MSK) >> FPGA_VERSION_DTCTR_TYP_OFST); + uint32_t type = ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_DTCTR_TYP_MSK) >> + FPGA_VERSION_DTCTR_TYP_OFST); + uint32_t expectedType = + (((FPGA_VERSION_DTCTR_TYP_CTB_VAL)&FPGA_VERSION_DTCTR_TYP_MSK) >> + FPGA_VERSION_DTCTR_TYP_OFST); - if (type != expectedType) { - LOG(logERROR, ("(Type Fail) - This is not a Chip Test Board firmware (read %d, expected %d)\n", - type, expectedType)); + if (type != expectedType) { + LOG(logERROR, ("(Type Fail) - This is not a Chip Test Board firmware " + "(read %d, expected %d)\n", + type, expectedType)); return FAIL; - } - return OK; + } + return OK; } int testFpga() { @@ -216,13 +215,15 @@ int testFpga() { #endif LOG(logINFO, ("Testing FPGA:\n")); - //fixed pattern + // fixed pattern int ret = OK; uint32_t val = bus_r(FIX_PATT_REG); if (val == FIX_PATT_VAL) { - LOG(logINFO, ("\tFixed pattern: successful match (0x%08x)\n",val)); + LOG(logINFO, ("\tFixed pattern: successful match (0x%08x)\n", val)); } else { - LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL)); + LOG(logERROR, + ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", + val, FIX_PATT_VAL)); ret = FAIL; } @@ -243,7 +244,7 @@ int testFpga() { readval = bus_r(addr); if (readval != val) { LOG(logERROR, ("1:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); + i, val, readval)); ret = FAIL; break; } @@ -252,7 +253,7 @@ int testFpga() { readval = bus_r(addr); if (readval != val) { LOG(logERROR, ("2:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); + i, val, readval)); ret = FAIL; break; } @@ -261,7 +262,7 @@ int testFpga() { readval = bus_r(addr); if (readval != val) { LOG(logERROR, ("3:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); + i, val, readval)); ret = FAIL; break; } @@ -270,7 +271,7 @@ int testFpga() { readval = bus_r(addr); if (readval != val) { LOG(logERROR, ("4:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); + i, val, readval)); ret = FAIL; break; } @@ -278,7 +279,9 @@ int testFpga() { // write back previous value bus_w(addr, previousValue); if (ret == OK) { - LOG(logINFO, ("\tSuccessfully tested FPGA Delay LSB Register %d times\n", times)); + LOG(logINFO, + ("\tSuccessfully tested FPGA Delay LSB Register %d times\n", + times)); } } @@ -304,10 +307,10 @@ int testBus() { for (i = 0; i < times; ++i) { val += 0xbbbbb; bus_w(addr, val); - readval = bus_r(addr); + readval = bus_r(addr); if (readval != val) { - LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); + LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", i, + val, readval)); ret = FAIL; } } @@ -321,22 +324,18 @@ int testBus() { return ret; } - /* Ids */ -uint64_t getServerVersion() { - return APICTB; -} +uint64_t getServerVersion() { return APICTB; } -uint64_t getClientServerAPIVersion() { - return APICTB; -} +uint64_t getClientServerAPIVersion() { return APICTB; } uint64_t getFirmwareVersion() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_BRD_RVSN_MSK) >> FPGA_VERSION_BRD_RVSN_OFST); + return ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_BRD_RVSN_MSK) >> + FPGA_VERSION_BRD_RVSN_OFST); } uint64_t getFirmwareAPIVersion() { @@ -350,96 +349,100 @@ uint16_t getHardwareVersionNumber() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(MOD_SERIAL_NUMBER_REG) & MOD_SERIAL_NUMBER_VRSN_MSK) >> MOD_SERIAL_NUMBER_VRSN_OFST); + return ((bus_r(MOD_SERIAL_NUMBER_REG) & MOD_SERIAL_NUMBER_VRSN_MSK) >> + MOD_SERIAL_NUMBER_VRSN_OFST); } uint16_t getHardwareSerialNumber() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(MOD_SERIAL_NUMBER_REG) & MOD_SERIAL_NUMBER_MSK) >> MOD_SERIAL_NUMBER_OFST); + return ((bus_r(MOD_SERIAL_NUMBER_REG) & MOD_SERIAL_NUMBER_MSK) >> + MOD_SERIAL_NUMBER_OFST); } -uint32_t getDetectorNumber(){ +uint32_t getDetectorNumber() { #ifdef VIRTUAL return 0; #endif - return bus_r(MOD_SERIAL_NUMBER_REG); + return bus_r(MOD_SERIAL_NUMBER_REG); } -uint64_t getDetectorMAC() { +uint64_t getDetectorMAC() { #ifdef VIRTUAL return 0; #else - char output[255],mac[255]=""; - uint64_t res=0; - FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - //getting rid of ":" - char * pch; - pch = strtok (output,":"); - while (pch != NULL){ - strcat(mac,pch); - pch = strtok (NULL, ":"); - } - sscanf(mac,"%llx",&res); - return res; + char output[255], mac[255] = ""; + uint64_t res = 0; + FILE *sysFile = + popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + // getting rid of ":" + char *pch; + pch = strtok(output, ":"); + while (pch != NULL) { + strcat(mac, pch); + pch = strtok(NULL, ":"); + } + sscanf(mac, "%llx", &res); + return res; #endif } -uint32_t getDetectorIP(){ +uint32_t getDetectorIP() { #ifdef VIRTUAL return 0; #endif - char temp[50]=""; - uint32_t res=0; - //execute and get address - char output[255]; - FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); + char temp[50] = ""; + uint32_t res = 0; + // execute and get address + char output[255]; + FILE *sysFile = popen( + "ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", + "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); - //converting IPaddress to hex. - char* pcword = strtok (output,"."); - while (pcword != NULL) { - sprintf(output,"%02x",atoi(pcword)); - strcat(temp,output); - pcword = strtok (NULL, "."); - } - strcpy(output,temp); - sscanf(output, "%x", &res); - //LOG(logINFO, ("ip:%x\n",res); + // converting IPaddress to hex. + char *pcword = strtok(output, "."); + while (pcword != NULL) { + sprintf(output, "%02x", atoi(pcword)); + strcat(temp, output); + pcword = strtok(NULL, "."); + } + strcpy(output, temp); + sscanf(output, "%x", &res); + // LOG(logINFO, ("ip:%x\n",res); - return res; + return res; } - /* initialization */ -void initControlServer(){ - if (initError == OK) { - setupDetector(); - } - initCheckDone = 1; +void initControlServer() { + if (initError == OK) { + setupDetector(); + } + initCheckDone = 1; } void initStopServer() { - usleep(CTRL_SRVR_INIT_TIME_US); - if (mapCSP0() == FAIL) { - LOG(logERROR, ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); - exit(EXIT_FAILURE); - } + usleep(CTRL_SRVR_INIT_TIME_US); + if (mapCSP0() == FAIL) { + LOG(logERROR, + ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); + exit(EXIT_FAILURE); + } #ifdef VIRTUAL - virtual_stop = 0; - if (!isControlServer) { - ComVirtual_setStop(virtual_stop); - } + virtual_stop = 0; + if (!isControlServer) { + ComVirtual_setStop(virtual_stop); + } #endif } - /* set up detector */ void setupDetector() { @@ -456,7 +459,7 @@ void setupDetector() { if (digitalData) { free(digitalData); digitalData = 0; - } + } analogDataPtr = 0; digitalDataPtr = 0; { @@ -480,10 +483,10 @@ void setupDetector() { naSamples = 1; ndSamples = 1; #ifdef VIRTUAL - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } #endif ALTERA_PLL_ResetPLLAndReconfiguration(); @@ -492,7 +495,9 @@ void setupDetector() { cleanFifos(); // hv - MAX1932_SetDefines(SPI_REG, SPI_HV_SRL_CS_OTPT_MSK, SPI_HV_SRL_CLK_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_OFST, HIGHVOLTAGE_MIN, HIGHVOLTAGE_MAX); + MAX1932_SetDefines(SPI_REG, SPI_HV_SRL_CS_OTPT_MSK, SPI_HV_SRL_CLK_OTPT_MSK, + SPI_HV_SRL_DGTL_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_OFST, + HIGHVOLTAGE_MIN, HIGHVOLTAGE_MAX); MAX1932_Disable(); setHighVoltage(DEFAULT_HIGH_VOLTAGE); @@ -500,31 +505,44 @@ void setupDetector() { powerOff(); // adcs - AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST); + AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, + ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, + ADC_SPI_SRL_DT_OTPT_OFST); AD9257_Disable(); AD9257_Configure(); // slow adcs - AD7689_SetDefines(ADC_SPI_REG, ADC_SPI_SLOW_VAL_REG, ADC_SPI_SLOW_SRL_CNV_MSK, ADC_SPI_SLOW_SRL_CLK_MSK, ADC_SPI_SLOW_SRL_DT_MSK, ADC_SPI_SLOW_SRL_DT_OFST); + AD7689_SetDefines(ADC_SPI_REG, ADC_SPI_SLOW_VAL_REG, + ADC_SPI_SLOW_SRL_CNV_MSK, ADC_SPI_SLOW_SRL_CLK_MSK, + ADC_SPI_SLOW_SRL_DT_MSK, ADC_SPI_SLOW_SRL_DT_OFST); AD7689_Disable(); AD7689_Configure(); // dacs - LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, DAC_MAX_MV); //has to be before setvchip + LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, + SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, + SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, + DAC_MAX_MV); // has to be before setvchip LTC2620_Disable(); LTC2620_Configure(); - // switch off dacs (power regulators most likely only sets to minimum (if power enable on)) + // switch off dacs (power regulators most likely only sets to minimum (if + // power enable on)) LOG(logINFOBLUE, ("Powering down all dacs\n")); - { - int idac = 0; - for (idac = 0; idac < NDAC; ++idac) { - setDAC(idac, LTC2620_GetPowerDownValue(), 0); //has to be before setvchip - } - } + { + int idac = 0; + for (idac = 0; idac < NDAC; ++idac) { + setDAC(idac, LTC2620_GetPowerDownValue(), + 0); // has to be before setvchip + } + } // power regulators // I2C - INA226_ConfigureI2CCore(I2C_SHUNT_RESISTER_OHMS, I2C_CONTROL_REG, I2C_STATUS_REG, I2C_RX_DATA_FIFO_REG, I2C_RX_DATA_FIFO_LEVEL_REG, I2C_SCL_LOW_COUNT_REG, I2C_SCL_HIGH_COUNT_REG, I2C_SDA_HOLD_REG, I2C_TRANSFER_COMMAND_FIFO_REG); + INA226_ConfigureI2CCore(I2C_SHUNT_RESISTER_OHMS, I2C_CONTROL_REG, + I2C_STATUS_REG, I2C_RX_DATA_FIFO_REG, + I2C_RX_DATA_FIFO_LEVEL_REG, I2C_SCL_LOW_COUNT_REG, + I2C_SCL_HIGH_COUNT_REG, I2C_SDA_HOLD_REG, + I2C_TRANSFER_COMMAND_FIFO_REG); INA226_CalibrateCurrentRegister(I2C_POWER_VIO_DEVICE_ID); INA226_CalibrateCurrentRegister(I2C_POWER_VA_DEVICE_ID); INA226_CalibrateCurrentRegister(I2C_POWER_VB_DEVICE_ID); @@ -532,55 +550,61 @@ void setupDetector() { INA226_CalibrateCurrentRegister(I2C_POWER_VD_DEVICE_ID); setVchip(VCHIP_MIN_MV); - // altera pll - ALTERA_PLL_SetDefines(PLL_CNTRL_REG, PLL_PARAM_REG, PLL_CNTRL_RCNFG_PRMTR_RST_MSK, PLL_CNTRL_WR_PRMTR_MSK, PLL_CNTRL_PLL_RST_MSK, PLL_CNTRL_ADDR_MSK, PLL_CNTRL_ADDR_OFST); + // altera pll + ALTERA_PLL_SetDefines(PLL_CNTRL_REG, PLL_PARAM_REG, + PLL_CNTRL_RCNFG_PRMTR_RST_MSK, PLL_CNTRL_WR_PRMTR_MSK, + PLL_CNTRL_PLL_RST_MSK, PLL_CNTRL_ADDR_MSK, + PLL_CNTRL_ADDR_OFST); - setADCInvertRegister(0);// depends on chip + setADCInvertRegister(0); // depends on chip - LOG(logINFOBLUE, ("Setting Default parameters\n")); - cleanFifos(); // FIXME: why twice? - resetCore(); + LOG(logINFOBLUE, ("Setting Default parameters\n")); + cleanFifos(); // FIXME: why twice? + resetCore(); - // 1G UDP - enableTenGigabitEthernet(0); + // 1G UDP + enableTenGigabitEthernet(0); - //Initialization of acquistion parameters - setNumAnalogSamples(DEFAULT_NUM_SAMPLES); - setNumDigitalSamples(DEFAULT_NUM_SAMPLES); // update databytes and allocate ram - setNumFrames(DEFAULT_NUM_FRAMES); - setExpTime(DEFAULT_EXPTIME); - setNumTriggers(DEFAULT_NUM_CYCLES); - setPeriod(DEFAULT_PERIOD); - setDelayAfterTrigger(DEFAULT_DELAY); - setTiming(DEFAULT_TIMING_MODE); + // Initialization of acquistion parameters + setNumAnalogSamples(DEFAULT_NUM_SAMPLES); + setNumDigitalSamples( + DEFAULT_NUM_SAMPLES); // update databytes and allocate ram + setNumFrames(DEFAULT_NUM_FRAMES); + setExpTime(DEFAULT_EXPTIME); + setNumTriggers(DEFAULT_NUM_CYCLES); + setPeriod(DEFAULT_PERIOD); + setDelayAfterTrigger(DEFAULT_DELAY); + setTiming(DEFAULT_TIMING_MODE); setADCEnableMask(BIT32_MSK); - setADCEnableMask_10G(BIT32_MSK); - if (setReadoutMode(ANALOG_ONLY) == FAIL) { + setADCEnableMask_10G(BIT32_MSK); + if (setReadoutMode(ANALOG_ONLY) == FAIL) { strcpy(initErrorMessage, - "Could not set readout mode to analog only.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; + "Could not set readout mode to analog only.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; } } int updateDatabytesandAllocateRAM() { - int oldAnalogDataBytes = analogDataBytes; + int oldAnalogDataBytes = analogDataBytes; int oldDigitalDataBytes = digitalDataBytes; - updateDataBytes(); + updateDataBytes(); - // update only if change in databytes - if (analogDataBytes == oldAnalogDataBytes && digitalDataBytes == oldDigitalDataBytes) { - LOG(logDEBUG1, ("RAM size (Analog:%d, Digital:%d) already allocated. Nothing to be done.\n", - analogDataBytes, digitalDataBytes)); - return OK; - } - // Zero databytes - if (analogDataBytes == 0 && digitalDataBytes == 0) { - LOG(logERROR, ("Can not allocate RAM for 0 bytes.\n")); - return FAIL; - } - // clear RAM + // update only if change in databytes + if (analogDataBytes == oldAnalogDataBytes && + digitalDataBytes == oldDigitalDataBytes) { + LOG(logDEBUG1, ("RAM size (Analog:%d, Digital:%d) already allocated. " + "Nothing to be done.\n", + analogDataBytes, digitalDataBytes)); + return OK; + } + // Zero databytes + if (analogDataBytes == 0 && digitalDataBytes == 0) { + LOG(logERROR, ("Can not allocate RAM for 0 bytes.\n")); + return FAIL; + } + // clear RAM if (analogData) { free(analogData); analogData = 0; @@ -588,14 +612,14 @@ int updateDatabytesandAllocateRAM() { if (digitalData) { free(digitalData); digitalData = 0; - } - // allocate RAM + } + // allocate RAM if (analogDataBytes) { - analogData = malloc(analogDataBytes); + analogData = malloc(analogDataBytes); // cannot malloc if (analogData == NULL) { LOG(logERROR, ("Can not allocate analog data RAM for even 1 frame. " - "Probable cause: Memory Leak.\n")); + "Probable cause: Memory Leak.\n")); return FAIL; } LOG(logINFO, ("\tAnalog RAM allocated to %d bytes\n", analogDataBytes)); @@ -604,15 +628,15 @@ int updateDatabytesandAllocateRAM() { digitalData = malloc(digitalDataBytes); // cannot malloc if (digitalData == NULL) { - LOG(logERROR, ("Can not allocate digital data RAM for even 1 frame. " - "Probable cause: Memory Leak.\n")); + LOG(logERROR, + ("Can not allocate digital data RAM for even 1 frame. " + "Probable cause: Memory Leak.\n")); return FAIL; } } - - LOG(logINFO, ("\tDigital RAM allocated to %d bytes\n", digitalDataBytes)); - return OK; + LOG(logINFO, ("\tDigital RAM allocated to %d bytes\n", digitalDataBytes)); + return OK; } void updateDataBytes() { @@ -632,58 +656,57 @@ void updateDataBytes() { } } analogDataBytes = nachans * (DYNAMIC_RANGE / 8) * naSamples; - LOG(logINFO, ("\t#Analog Channels:%d, Databytes:%d\n", nachans, analogDataBytes)); + LOG(logINFO, ("\t#Analog Channels:%d, Databytes:%d\n", nachans, + analogDataBytes)); } // digital if (digitalEnable) { ndchans = NCHAN_DIGITAL; digitalDataBytes = (sizeof(uint64_t) * ndSamples); - LOG(logINFO, ("\t#Digital Channels:%d, Databytes:%d\n", ndchans, digitalDataBytes)); + LOG(logINFO, ("\t#Digital Channels:%d, Databytes:%d\n", ndchans, + digitalDataBytes)); } // total int nchans = nachans + ndchans; dataBytes = analogDataBytes + digitalDataBytes; - LOG(logINFO, ("\t#Total Channels:%d, Total Databytes:%d\n", nchans, dataBytes)); + LOG(logINFO, + ("\t#Total Channels:%d, Total Databytes:%d\n", nchans, dataBytes)); } - /* firmware functions (resets) */ void cleanFifos() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Clearing Acquisition Fifos\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CLR_ACQSTN_FIFO_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CLR_ACQSTN_FIFO_MSK); + LOG(logINFO, ("Clearing Acquisition Fifos\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CLR_ACQSTN_FIFO_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CLR_ACQSTN_FIFO_MSK); } void resetCore() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Resetting Core\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CRE_RST_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CRE_RST_MSK); + LOG(logINFO, ("Resetting Core\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CRE_RST_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CRE_RST_MSK); } void resetPeripheral() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Resetting Peripheral\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PRPHRL_RST_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PRPHRL_RST_MSK); + LOG(logINFO, ("Resetting Peripheral\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PRPHRL_RST_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PRPHRL_RST_MSK); } - /* set parameters - dr, adcenablemask */ -int setDynamicRange(int dr){ - return DYNAMIC_RANGE; -} +int setDynamicRange(int dr) { return DYNAMIC_RANGE; } int setADCEnableMask(uint32_t mask) { if (mask == 0u) { @@ -701,15 +724,13 @@ int setADCEnableMask(uint32_t mask) { return OK; } -uint32_t getADCEnableMask() { - return adcEnableMask_1g; -} +uint32_t getADCEnableMask() { return adcEnableMask_1g; } void setADCEnableMask_10G(uint32_t mask) { if (mask == 0u) { LOG(logERROR, ("Cannot set 10gb adc mask to 0\n")); return; - } + } // convert 32 bit mask to 8 bit mask uint8_t actualMask = 0; if (mask != 0) { @@ -721,20 +742,25 @@ void setADCEnableMask_10G(uint32_t mask) { } ++ival; } - } + } - LOG(logINFO, ("Setting adcEnableMask 10G to 0x%x (from 0x%08x)\n", actualMask, mask)); + LOG(logINFO, ("Setting adcEnableMask 10G to 0x%x (from 0x%08x)\n", + actualMask, mask)); adcEnableMask_10g = actualMask; if (analogEnable) { uint32_t addr = READOUT_10G_ENABLE_REG; bus_w(addr, bus_r(addr) & (~READOUT_10G_ENABLE_ANLG_MSK)); - bus_w(addr, bus_r(addr) | ((adcEnableMask_10g << READOUT_10G_ENABLE_ANLG_OFST) & READOUT_10G_ENABLE_ANLG_MSK)); + bus_w(addr, bus_r(addr) | + ((adcEnableMask_10g << READOUT_10G_ENABLE_ANLG_OFST) & + READOUT_10G_ENABLE_ANLG_MSK)); } } uint32_t getADCEnableMask_10G() { if (analogEnable) { - adcEnableMask_10g = ((bus_r(READOUT_10G_ENABLE_REG) & READOUT_10G_ENABLE_ANLG_MSK) >> READOUT_10G_ENABLE_ANLG_OFST); + adcEnableMask_10g = + ((bus_r(READOUT_10G_ENABLE_REG) & READOUT_10G_ENABLE_ANLG_MSK) >> + READOUT_10G_ENABLE_ANLG_OFST); } // convert 8 bit mask to 32 bit mask @@ -760,16 +786,15 @@ void setADCInvertRegister(uint32_t val) { bus_w(ADC_PORT_INVERT_REG, val); } -uint32_t getADCInvertRegister() { - return bus_r(ADC_PORT_INVERT_REG); -} +uint32_t getADCInvertRegister() { return bus_r(ADC_PORT_INVERT_REG); } int setExternalSamplingSource(int val) { uint32_t addr = DBIT_EXT_TRG_REG; if (val >= 0) { LOG(logINFO, ("Setting External sampling source to %d\n", val)); - bus_w(addr, bus_r(addr) &~ DBIT_EXT_TRG_SRC_MSK); - bus_w(addr, bus_r(addr) | ((val << DBIT_EXT_TRG_SRC_OFST) & DBIT_EXT_TRG_SRC_MSK)); + bus_w(addr, bus_r(addr) & ~DBIT_EXT_TRG_SRC_MSK); + bus_w(addr, bus_r(addr) | ((val << DBIT_EXT_TRG_SRC_OFST) & + DBIT_EXT_TRG_SRC_MSK)); } return ((bus_r(addr) & DBIT_EXT_TRG_SRC_MSK) >> DBIT_EXT_TRG_SRC_OFST); } @@ -779,13 +804,13 @@ int setExternalSampling(int val) { if (val > 0) { LOG(logINFO, ("Enabling External sampling\n")); bus_w(addr, bus_r(addr) | DBIT_EXT_TRG_OPRTN_MD_MSK); - } - else if (val == 0) { + } else if (val == 0) { LOG(logINFO, ("Disabling External sampling\n")); - bus_w(addr, bus_r(addr) &~ DBIT_EXT_TRG_OPRTN_MD_MSK); + bus_w(addr, bus_r(addr) & ~DBIT_EXT_TRG_OPRTN_MD_MSK); } - return ((bus_r(addr) & DBIT_EXT_TRG_OPRTN_MD_MSK) >> DBIT_EXT_TRG_OPRTN_MD_OFST); + return ((bus_r(addr) & DBIT_EXT_TRG_OPRTN_MD_MSK) >> + DBIT_EXT_TRG_OPRTN_MD_OFST); } /* parameters - readout */ @@ -793,7 +818,7 @@ int setExternalSampling(int val) { int setReadoutMode(enum readoutMode mode) { analogEnable = 0; digitalEnable = 0; - switch(mode) { + switch (mode) { case ANALOG_ONLY: LOG(logINFO, ("Setting Analog Only Readout\n")); analogEnable = 1; @@ -812,26 +837,32 @@ int setReadoutMode(enum readoutMode mode) { return FAIL; } - uint32_t addr = CONFIG_REG; uint32_t addr_readout_10g = READOUT_10G_ENABLE_REG; // default: analog only - bus_w(addr, bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) & (~CONFIG_ENBLE_DGTL_OTPT_MSK)); - bus_w(addr_readout_10g, bus_r(addr_readout_10g) & (~READOUT_10G_ENABLE_ANLG_MSK) & ~(READOUT_10G_ENABLE_DGTL_MSK)); - bus_w(addr_readout_10g, bus_r(addr_readout_10g) | ((adcEnableMask_10g << READOUT_10G_ENABLE_ANLG_OFST) & READOUT_10G_ENABLE_ANLG_MSK)); + bus_w(addr, bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) & + (~CONFIG_ENBLE_DGTL_OTPT_MSK)); + bus_w(addr_readout_10g, bus_r(addr_readout_10g) & + (~READOUT_10G_ENABLE_ANLG_MSK) & + ~(READOUT_10G_ENABLE_DGTL_MSK)); + bus_w(addr_readout_10g, + bus_r(addr_readout_10g) | + ((adcEnableMask_10g << READOUT_10G_ENABLE_ANLG_OFST) & + READOUT_10G_ENABLE_ANLG_MSK)); // disable analog (digital only) if (!analogEnable) { bus_w(addr, bus_r(addr) | CONFIG_DSBL_ANLG_OTPT_MSK); - bus_w(addr_readout_10g, bus_r(addr_readout_10g) & (~READOUT_10G_ENABLE_ANLG_MSK)); + bus_w(addr_readout_10g, + bus_r(addr_readout_10g) & (~READOUT_10G_ENABLE_ANLG_MSK)); } // enable digital (analog and digital) if (digitalEnable) { bus_w(addr, bus_r(addr) | CONFIG_ENBLE_DGTL_OTPT_MSK); - bus_w(addr_readout_10g, bus_r(addr_readout_10g) | READOUT_10G_ENABLE_DGTL_MSK); + bus_w(addr_readout_10g, + bus_r(addr_readout_10g) | READOUT_10G_ENABLE_DGTL_MSK); } - // 1Gb if (!enableTenGigabitEthernet(-1)) { if (updateDatabytesandAllocateRAM() == FAIL) { @@ -842,8 +873,13 @@ int setReadoutMode(enum readoutMode mode) { // 10Gb else { // validate adcenablemask for 10g - if (analogEnable && adcEnableMask_10g != ((bus_r(READOUT_10G_ENABLE_REG) & READOUT_10G_ENABLE_ANLG_MSK) >> READOUT_10G_ENABLE_ANLG_OFST)) { - LOG(logERROR, ("Setting readout mode failed. Could not set 10g adc enable mask to 0x%x\n.", adcEnableMask_10g)); + if (analogEnable && + adcEnableMask_10g != ((bus_r(READOUT_10G_ENABLE_REG) & + READOUT_10G_ENABLE_ANLG_MSK) >> + READOUT_10G_ENABLE_ANLG_OFST)) { + LOG(logERROR, ("Setting readout mode failed. Could not set 10g adc " + "enable mask to 0x%x\n.", + adcEnableMask_10g)); return FAIL; } } @@ -859,14 +895,14 @@ int getReadoutMode() { return ANALOG_ONLY; } else if (!analogEnable && digitalEnable) { LOG(logDEBUG1, ("Getting readout: Digital Only\n")); - return DIGITAL_ONLY; + return DIGITAL_ONLY; } else { - LOG(logERROR, ("Read unknown readout (Both digital and analog are disabled)\n")); + LOG(logERROR, + ("Read unknown readout (Both digital and analog are disabled)\n")); return -1; - } + } } - /* parameters - timer */ void setNumFrames(int64_t val) { if (val > 0) { @@ -875,20 +911,16 @@ void setNumFrames(int64_t val) { } } -int64_t getNumFrames() { - return get64BitReg(FRAMES_LSB_REG, FRAMES_MSB_REG); -} +int64_t getNumFrames() { return get64BitReg(FRAMES_LSB_REG, FRAMES_MSB_REG); } void setNumTriggers(int64_t val) { if (val > 0) { LOG(logINFO, ("Setting number of triggers %lld\n", (long long int)val)); set64BitReg(val, CYCLES_LSB_REG, CYCLES_MSB_REG); - } + } } -int64_t getNumTriggers() { - return get64BitReg(CYCLES_LSB_REG, CYCLES_MSB_REG); -} +int64_t getNumTriggers() { return get64BitReg(CYCLES_LSB_REG, CYCLES_MSB_REG); } int setNumAnalogSamples(int val) { if (val < 0) { @@ -897,8 +929,9 @@ int setNumAnalogSamples(int val) { } LOG(logINFO, ("Setting number of analog samples %d\n", val)); naSamples = val; - bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) &~ SAMPLES_ANALOG_MSK); - bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) | ((val << SAMPLES_ANALOG_OFST) & SAMPLES_ANALOG_MSK)); + bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) & ~SAMPLES_ANALOG_MSK); + bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) | + ((val << SAMPLES_ANALOG_OFST) & SAMPLES_ANALOG_MSK)); // 1Gb if (!enableTenGigabitEthernet(-1)) { @@ -909,9 +942,7 @@ int setNumAnalogSamples(int val) { return OK; } -int getNumAnalogSamples() { - return naSamples; -} +int getNumAnalogSamples() { return naSamples; } int setNumDigitalSamples(int val) { if (val < 0) { @@ -920,8 +951,9 @@ int setNumDigitalSamples(int val) { } LOG(logINFO, ("Setting number of digital samples %d\n", val)); ndSamples = val; - bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) &~ SAMPLES_DIGITAL_MSK); - bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) | ((val << SAMPLES_DIGITAL_OFST) & SAMPLES_DIGITAL_MSK)); + bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) & ~SAMPLES_DIGITAL_MSK); + bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) | ((val << SAMPLES_DIGITAL_OFST) & + SAMPLES_DIGITAL_MSK)); // 1Gb if (!enableTenGigabitEthernet(-1)) { if (updateDatabytesandAllocateRAM() == FAIL) { @@ -931,9 +963,7 @@ int setNumDigitalSamples(int val) { return OK; } -int getNumDigitalSamples() { - return ndSamples; -} +int getNumDigitalSamples() { return ndSamples; } int setExpTime(int64_t val) { if (val < 0) { @@ -976,12 +1006,14 @@ int setPeriod(int64_t val) { } int64_t getPeriod() { - return get64BitReg(PERIOD_LSB_REG, PERIOD_MSB_REG)/ (1E-3 * clkFrequency[SYNC_CLK]); + return get64BitReg(PERIOD_LSB_REG, PERIOD_MSB_REG) / + (1E-3 * clkFrequency[SYNC_CLK]); } int setDelayAfterTrigger(int64_t val) { if (val < 0) { - LOG(logERROR, ("Invalid delay after trigger: %lld ns\n", (long long int)val)); + LOG(logERROR, + ("Invalid delay after trigger: %lld ns\n", (long long int)val)); return FAIL; } LOG(logINFO, ("Setting delay after trigger %lld ns\n", (long long int)val)); @@ -998,7 +1030,8 @@ int setDelayAfterTrigger(int64_t val) { } int64_t getDelayAfterTrigger() { - return get64BitReg(DELAY_LSB_REG, DELAY_MSB_REG) / (1E-3 * clkFrequency[SYNC_CLK]); + return get64BitReg(DELAY_LSB_REG, DELAY_MSB_REG) / + (1E-3 * clkFrequency[SYNC_CLK]); } int64_t getNumFramesLeft() { @@ -1010,40 +1043,41 @@ int64_t getNumTriggersLeft() { } int64_t getDelayAfterTriggerLeft() { - return get64BitReg(DELAY_LEFT_LSB_REG, DELAY_LEFT_MSB_REG) / (1E-3 * clkFrequency[SYNC_CLK]); + return get64BitReg(DELAY_LEFT_LSB_REG, DELAY_LEFT_MSB_REG) / + (1E-3 * clkFrequency[SYNC_CLK]); } int64_t getPeriodLeft() { - return get64BitReg(PERIOD_LEFT_LSB_REG, PERIOD_LEFT_MSB_REG) / (1E-3 * clkFrequency[SYNC_CLK]); + return get64BitReg(PERIOD_LEFT_LSB_REG, PERIOD_LEFT_MSB_REG) / + (1E-3 * clkFrequency[SYNC_CLK]); } int64_t getFramesFromStart() { - return get64BitReg(FRAMES_FROM_START_PG_LSB_REG, FRAMES_FROM_START_PG_MSB_REG); + return get64BitReg(FRAMES_FROM_START_PG_LSB_REG, + FRAMES_FROM_START_PG_MSB_REG); } int64_t getActualTime() { - return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / (1E-3 * CLK_FREQ); + return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / + (1E-3 * CLK_FREQ); } int64_t getMeasurementTime() { - return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / (1E-3 * CLK_FREQ); + return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / + (1E-3 * CLK_FREQ); } - - /* parameters - settings */ -enum detectorSettings getSettings() { - return UNDEFINED; -} +enum detectorSettings getSettings() { return UNDEFINED; } /* parameters - dac, adc, hv */ - void setDAC(enum DACINDEX ind, int val, int mV) { if (val < 0 && val != LTC2620_GetPowerDownValue()) return; - LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, (mV ? "mV" : "dac units"))); + LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, + (mV ? "mV" : "dac units"))); int dacval = val; #ifdef VIRTUAL if (!mV) { @@ -1061,18 +1095,17 @@ void setDAC(enum DACINDEX ind, int val, int mV) { int getDAC(enum DACINDEX ind, int mV) { if (!mV) { - LOG(logDEBUG1, ("Getting DAC %d : %d dac\n",ind, dacValues[ind])); + LOG(logDEBUG1, ("Getting DAC %d : %d dac\n", ind, dacValues[ind])); return dacValues[ind]; } int voltage = -1; - LTC2620_DacToVoltage(dacValues[ind], &voltage); - LOG(logDEBUG1, ("Getting DAC %d : %d dac (%d mV)\n",ind, dacValues[ind], voltage)); - return voltage; + LTC2620_DacToVoltage(dacValues[ind], &voltage); + LOG(logDEBUG1, + ("Getting DAC %d : %d dac (%d mV)\n", ind, dacValues[ind], voltage)); + return voltage; } -int getMaxDacSteps() { - return LTC2620_GetMaxNumSteps(); -} +int getMaxDacSteps() { return LTC2620_GetMaxNumSteps(); } int dacToVoltage(int dac) { int val; @@ -1098,9 +1131,7 @@ int checkVLimitDacCompliant(int dac) { return OK; } -int getVLimit() { - return vLimit; -} +int getVLimit() { return vLimit; } void setVLimit(int l) { if (l >= 0) @@ -1116,12 +1147,14 @@ int isVchipValid(int val) { int getVchip() { // not set yet - if (dacValues[D_PWR_CHIP] == -1 || dacValues[D_PWR_CHIP] == LTC2620_GetPowerDownValue()) + if (dacValues[D_PWR_CHIP] == -1 || + dacValues[D_PWR_CHIP] == LTC2620_GetPowerDownValue()) return dacValues[D_PWR_CHIP]; int voltage = -1; // dac to voltage - ConvertToDifferentRange(LTC2620_GetMaxInput(), LTC2620_GetMinInput(), VCHIP_MIN_MV, VCHIP_MAX_MV, - dacValues[D_PWR_CHIP], &voltage); + ConvertToDifferentRange(LTC2620_GetMaxInput(), LTC2620_GetMinInput(), + VCHIP_MIN_MV, VCHIP_MAX_MV, dacValues[D_PWR_CHIP], + &voltage); return voltage; } @@ -1135,13 +1168,18 @@ void setVchip(int val) { // validate & convert it to dac if (val != LTC2620_GetPowerDownValue()) { // convert voltage to dac - if (ConvertToDifferentRange(VCHIP_MIN_MV, VCHIP_MAX_MV, LTC2620_GetMaxInput(), LTC2620_GetMinInput(), //min val is max V + if (ConvertToDifferentRange( + VCHIP_MIN_MV, VCHIP_MAX_MV, LTC2620_GetMaxInput(), + LTC2620_GetMinInput(), // min val is max V val, &dacval) == FAIL) { - LOG(logERROR, ("\tVChip %d mV invalid. Is not between %d and %d mV\n", val, VCHIP_MIN_MV, VCHIP_MAX_MV)); + LOG(logERROR, + ("\tVChip %d mV invalid. Is not between %d and %d mV\n", + val, VCHIP_MIN_MV, VCHIP_MAX_MV)); return; } } - LOG(logINFO, ("Setting Vchip (DAC %d): %d dac (%d mV)\n",D_PWR_CHIP, dacval, val)); + LOG(logINFO, ("Setting Vchip (DAC %d): %d dac (%d mV)\n", D_PWR_CHIP, + dacval, val)); // set setDAC(D_PWR_CHIP, dacval, 0); } @@ -1160,7 +1198,7 @@ int getVChipToSet(enum DACINDEX ind, int val) { int ipwr = 0; // loop through the adcs - for (ipwr = 0; ipwr < NPWR -1; ++ipwr) { + for (ipwr = 0; ipwr < NPWR - 1; ++ipwr) { // get the dac values for each adc int dacmV = getPower(getDACIndexFromADCIndex(ipwr)); @@ -1182,7 +1220,8 @@ int getVChipToSet(enum DACINDEX ind, int val) { max = VCHIP_MIN_MV; // with correct calulations, vchip val should never be greater than vchipmax if (max > VCHIP_MAX_MV) { - LOG(logERROR, ("Vchip value to set %d is beyond its maximum (WEIRD)\n", max)); + LOG(logERROR, + ("Vchip value to set %d is beyond its maximum (WEIRD)\n", max)); return -1; } return max; @@ -1228,7 +1267,8 @@ int isPowerValid(enum DACINDEX ind, int val) { int min = (ind == D_PWR_IO) ? VIO_MIN_MV : POWER_RGLTR_MIN; // not power_rgltr_max because it is allowed only upto vchip max - 200 - if (val != 0 && (val != LTC2620_GetPowerDownValue()) && (val < min || val > (VCHIP_MAX_MV - VCHIP_POWER_INCRMNT))) { + if (val != 0 && (val != LTC2620_GetPowerDownValue()) && + (val < min || val > (VCHIP_MAX_MV - VCHIP_POWER_INCRMNT))) { return 0; } return 1; @@ -1252,28 +1292,34 @@ int getPower(enum DACINDEX ind) { // not set yet if (dacValues[ind] == -1) { - LOG(logERROR, ("Power enabled, but unknown dac value for power index %d!", ind)); + LOG(logERROR, + ("Power enabled, but unknown dac value for power index %d!", ind)); return -1; } // dac powered off if (dacValues[ind] == LTC2620_GetPowerDownValue()) { - LOG(logWARNING, ("Power %d enabled, dac value %d, voltage at minimum or 0\n", ind, LTC2620_GetPowerDownValue())); + LOG(logWARNING, + ("Power %d enabled, dac value %d, voltage at minimum or 0\n", ind, + LTC2620_GetPowerDownValue())); return LTC2620_GetPowerDownValue(); } - // vchip not set, weird error, should not happen (as vchip set to max in the beginning) - // unless user set vchip to LTC2620_GetPowerDownValue() and then tried to get a power regulator value - if (dacValues[D_PWR_CHIP] == -1 || dacValues[D_PWR_CHIP] == LTC2620_GetPowerDownValue()) { + // vchip not set, weird error, should not happen (as vchip set to max in the + // beginning) unless user set vchip to LTC2620_GetPowerDownValue() and then + // tried to get a power regulator value + if (dacValues[D_PWR_CHIP] == -1 || + dacValues[D_PWR_CHIP] == LTC2620_GetPowerDownValue()) { LOG(logERROR, ("Cannot read power regulator %d (vchip not set)." - "Set a power regulator, which will also set vchip.\n")); + "Set a power regulator, which will also set vchip.\n")); return -1; } // convert dac to voltage int retval = -1; - ConvertToDifferentRange(LTC2620_GetMaxInput(), LTC2620_GetMinInput(), POWER_RGLTR_MIN, POWER_RGLTR_MAX, - dacValues[ind], &retval); + ConvertToDifferentRange(LTC2620_GetMaxInput(), LTC2620_GetMinInput(), + POWER_RGLTR_MIN, POWER_RGLTR_MAX, dacValues[ind], + &retval); return retval; } @@ -1294,12 +1340,16 @@ void setPower(enum DACINDEX ind, int val) { // validate value (already checked at tcp) if (!isPowerValid(ind, val)) { - LOG(logERROR, ("Invalid value of %d mV for Power %d. Is not between %d and %d mV\n", - val, ind, (ind == D_PWR_IO ? VIO_MIN_MV : POWER_RGLTR_MIN), POWER_RGLTR_MAX)); + LOG(logERROR, + ("Invalid value of %d mV for Power %d. Is not between %d and " + "%d mV\n", + val, ind, (ind == D_PWR_IO ? VIO_MIN_MV : POWER_RGLTR_MIN), + POWER_RGLTR_MAX)); return; } - // get vchip to set vchip (calculated now before switching off power enable) + // get vchip to set vchip (calculated now before switching off power + // enable) int vchip = getVChipToSet(ind, val); LOG(logDEBUG1, ("Vchip to set: %d\n", vchip)); // index problem of vchip calculation problem @@ -1317,7 +1367,8 @@ void setPower(enum DACINDEX ind, int val) { // set vchip setVchip(vchip); if (getVchip() != vchip) { - LOG(logERROR, ("Weird, Could not set vchip. Set %d, read %d\n.", vchip, getVchip())); + LOG(logERROR, ("Weird, Could not set vchip. Set %d, read %d\n.", + vchip, getVchip())); return; } @@ -1331,15 +1382,19 @@ void setPower(enum DACINDEX ind, int val) { int dacval = -1; // convert voltage to dac - if (ConvertToDifferentRange(POWER_RGLTR_MIN, POWER_RGLTR_MAX, LTC2620_GetMaxInput(), LTC2620_GetMinInput(), - val, &dacval) == FAIL) { - LOG(logERROR, ("\tPower index %d of value %d mV invalid. Is not between %d and %d mV\n", - ind, val, POWER_RGLTR_MIN, vchip - VCHIP_POWER_INCRMNT)); + if (ConvertToDifferentRange( + POWER_RGLTR_MIN, POWER_RGLTR_MAX, LTC2620_GetMaxInput(), + LTC2620_GetMinInput(), val, &dacval) == FAIL) { + LOG(logERROR, + ("\tPower index %d of value %d mV invalid. Is not between " + "%d and %d mV\n", + ind, val, POWER_RGLTR_MIN, vchip - VCHIP_POWER_INCRMNT)); return; } // set and power on/ update dac - LOG(logINFO, ("Setting P%d (DAC %d): %d dac (%d mV)\n", adcIndex, ind, dacval, val)); + LOG(logINFO, ("Setting P%d (DAC %d): %d dac (%d mV)\n", adcIndex, + ind, dacval, val)); setDAC(ind, dacval, 0); // to be sure of valid conversion @@ -1358,12 +1413,11 @@ void powerOff() { LOG(logDEBUG1, ("Power Register: 0x%08x\n", bus_r(addr))); } - -int getADC(enum ADCINDEX ind){ +int getADC(enum ADCINDEX ind) { #ifdef VIRTUAL return 0; #endif - switch(ind) { + switch (ind) { case V_PWR_IO: case V_PWR_A: case V_PWR_B: @@ -1377,7 +1431,8 @@ int getADC(enum ADCINDEX ind){ case I_PWR_C: case I_PWR_D: LOG(logDEBUG1, ("Reading I2C Current for device Id: %d\n", (int)ind)); - return INA226_ReadCurrent(I2C_POWER_VIO_DEVICE_ID + (int)(ind - I_PWR_IO)); + return INA226_ReadCurrent(I2C_POWER_VIO_DEVICE_ID + + (int)(ind - I_PWR_IO)); // slow adcs case S_TMP: @@ -1399,37 +1454,30 @@ int getADC(enum ADCINDEX ind){ } } +int setHighVoltage(int val) { + // setting hv + if (val >= 0) { + LOG(logINFO, ("Setting High voltage: %d V\n", val)); + uint32_t addr = POWER_REG; -int setHighVoltage(int val){ - // setting hv - if (val >= 0) { - LOG(logINFO, ("Setting High voltage: %d V\n", val)); - uint32_t addr = POWER_REG; + // switch to external high voltage + bus_w(addr, bus_r(addr) & (~POWER_HV_INTERNAL_SLCT_MSK)); - // switch to external high voltage - bus_w(addr, bus_r(addr) & (~POWER_HV_INTERNAL_SLCT_MSK)); + MAX1932_Set(&val); - MAX1932_Set(&val); + // switch on internal high voltage, if set + if (val > 0) + bus_w(addr, bus_r(addr) | POWER_HV_INTERNAL_SLCT_MSK); - // switch on internal high voltage, if set - if (val > 0) - bus_w(addr, bus_r(addr) | POWER_HV_INTERNAL_SLCT_MSK); - - highvoltage = val; - } - return highvoltage; + highvoltage = val; + } + return highvoltage; } - - - - - /* parameters - timing, extsig */ - -void setTiming( enum timingMode arg){ - switch(arg){ +void setTiming(enum timingMode arg) { + switch (arg) { case AUTO_TIMING: LOG(logINFO, ("Set Timing: Auto\n")); bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK); @@ -1443,132 +1491,127 @@ void setTiming( enum timingMode arg){ } } - enum timingMode getTiming() { if (bus_r(EXT_SIGNAL_REG) == EXT_SIGNAL_MSK) return TRIGGER_EXPOSURE; return AUTO_TIMING; } - - /* configure mac */ +void calcChecksum(udp_header *udp) { + int count = IP_HEADER_SIZE; + long int sum = 0; -void calcChecksum(udp_header* udp) { - int count = IP_HEADER_SIZE; - long int sum = 0; - - // start at ip_tos as the memory is not continous for ip header - uint16_t *addr = (uint16_t*) (&(udp->ip_tos)); + // start at ip_tos as the memory is not continous for ip header + uint16_t *addr = (uint16_t *)(&(udp->ip_tos)); - sum += *addr++; - count -= 2; + sum += *addr++; + count -= 2; - // ignore ethertype (from udp header) - addr++; + // ignore ethertype (from udp header) + addr++; - // from identification to srcip_lsb - while( count > 2 ) { - sum += *addr++; - count -= 2; - } + // from identification to srcip_lsb + while (count > 2) { + sum += *addr++; + count -= 2; + } - // ignore src udp port (from udp header) - addr++; - - if (count > 0) - sum += *addr; // Add left-over byte, if any - while (sum >> 16) - sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits - long int checksum = sum & 0xffff; - checksum += UDP_IP_HEADER_LENGTH_BYTES; - LOG(logINFO, ("\tIP checksum is 0x%lx\n",checksum)); - udp->ip_checksum = checksum; + // ignore src udp port (from udp header) + addr++; + + if (count > 0) + sum += *addr; // Add left-over byte, if any + while (sum >> 16) + sum = (sum & 0xffff) + (sum >> 16); // Fold 32-bit sum to 16 bits + long int checksum = sum & 0xffff; + checksum += UDP_IP_HEADER_LENGTH_BYTES; + LOG(logINFO, ("\tIP checksum is 0x%lx\n", checksum)); + udp->ip_checksum = checksum; } - -int configureMAC(){ +int configureMAC() { uint32_t srcip = udpDetails.srcip; - uint32_t dstip = udpDetails.dstip; - uint64_t srcmac = udpDetails.srcmac; - uint64_t dstmac = udpDetails.dstmac; - int srcport = udpDetails.srcport; - int dstport = udpDetails.dstport; + uint32_t dstip = udpDetails.dstip; + uint64_t srcmac = udpDetails.srcmac; + uint64_t dstmac = udpDetails.dstmac; + int srcport = udpDetails.srcport; + int dstport = udpDetails.dstport; - LOG(logINFOBLUE, ("Configuring MAC\n")); - char src_mac[50], src_ip[INET_ADDRSTRLEN],dst_mac[50], dst_ip[INET_ADDRSTRLEN]; - getMacAddressinString(src_mac, 50, srcmac); - getMacAddressinString(dst_mac, 50, dstmac); - getIpAddressinString(src_ip, srcip); - getIpAddressinString(dst_ip, dstip); + LOG(logINFOBLUE, ("Configuring MAC\n")); + char src_mac[50], src_ip[INET_ADDRSTRLEN], dst_mac[50], + dst_ip[INET_ADDRSTRLEN]; + getMacAddressinString(src_mac, 50, srcmac); + getMacAddressinString(dst_mac, 50, dstmac); + getIpAddressinString(src_ip, srcip); + getIpAddressinString(dst_ip, dstip); - LOG(logINFO, ( - "\tSource IP : %s\n" - "\tSource MAC : %s\n" - "\tSource Port : %d\n" - "\tDest IP : %s\n" - "\tDest MAC : %s\n" - "\tDest Port : %d\n", - src_ip, src_mac, srcport, - dst_ip, dst_mac, dstport)); + LOG(logINFO, ("\tSource IP : %s\n" + "\tSource MAC : %s\n" + "\tSource Port : %d\n" + "\tDest IP : %s\n" + "\tDest MAC : %s\n" + "\tDest Port : %d\n", + src_ip, src_mac, srcport, dst_ip, dst_mac, dstport)); - // 1 giga udp - if (!enableTenGigabitEthernet(-1)) { + // 1 giga udp + if (!enableTenGigabitEthernet(-1)) { LOG(logINFOBLUE, ("\t1G MAC\n")); - if (updateDatabytesandAllocateRAM() == FAIL) - return -1; - if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { - LOG(logERROR, ("could not set udp 1G destination IP and port\n")); - return FAIL; - } - return OK; - } + if (updateDatabytesandAllocateRAM() == FAIL) + return -1; + if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { + LOG(logERROR, ("could not set udp 1G destination IP and port\n")); + return FAIL; + } + return OK; + } - // 10 G + // 10 G LOG(logINFOBLUE, ("\t10G MAC\n")); - // start addr - uint32_t addr = RXR_ENDPOINT_START_REG; - // get struct memory - udp_header *udp = (udp_header*) (Blackfin_getBaseAddress() + addr / 2); - memset(udp, 0, sizeof(udp_header)); + // start addr + uint32_t addr = RXR_ENDPOINT_START_REG; + // get struct memory + udp_header *udp = (udp_header *)(Blackfin_getBaseAddress() + addr / 2); + memset(udp, 0, sizeof(udp_header)); - // mac addresses - // msb (32) + lsb (16) - udp->udp_destmac_msb = ((dstmac >> 16) & BIT32_MASK); - udp->udp_destmac_lsb = ((dstmac >> 0) & BIT16_MASK); - // msb (16) + lsb (32) - udp->udp_srcmac_msb = ((srcmac >> 32) & BIT16_MASK); - udp->udp_srcmac_lsb = ((srcmac >> 0) & BIT32_MASK); + // mac addresses + // msb (32) + lsb (16) + udp->udp_destmac_msb = ((dstmac >> 16) & BIT32_MASK); + udp->udp_destmac_lsb = ((dstmac >> 0) & BIT16_MASK); + // msb (16) + lsb (32) + udp->udp_srcmac_msb = ((srcmac >> 32) & BIT16_MASK); + udp->udp_srcmac_lsb = ((srcmac >> 0) & BIT32_MASK); - // ip addresses - udp->ip_srcip_msb = ((srcip >> 16) & BIT16_MASK); - udp->ip_srcip_lsb = ((srcip >> 0) & BIT16_MASK); - udp->ip_destip_msb = ((dstip >> 16) & BIT16_MASK); - udp->ip_destip_lsb = ((dstip >> 0) & BIT16_MASK); + // ip addresses + udp->ip_srcip_msb = ((srcip >> 16) & BIT16_MASK); + udp->ip_srcip_lsb = ((srcip >> 0) & BIT16_MASK); + udp->ip_destip_msb = ((dstip >> 16) & BIT16_MASK); + udp->ip_destip_lsb = ((dstip >> 0) & BIT16_MASK); - // source port - udp->udp_srcport = srcport; - udp->udp_destport = dstport; + // source port + udp->udp_srcport = srcport; + udp->udp_destport = dstport; - // other defines - udp->udp_ethertype = 0x800; - udp->ip_ver = 0x4; - udp->ip_ihl = 0x5; - udp->ip_flags = 0x2; //FIXME - udp->ip_ttl = 0x40; - udp->ip_protocol = 0x11; - // total length is redefined in firmware + // other defines + udp->udp_ethertype = 0x800; + udp->ip_ver = 0x4; + udp->ip_ihl = 0x5; + udp->ip_flags = 0x2; // FIXME + udp->ip_ttl = 0x40; + udp->ip_protocol = 0x11; + // total length is redefined in firmware - calcChecksum(udp); + calcChecksum(udp); - cleanFifos();//FIXME: resetPerpheral() for ctb? + cleanFifos(); // FIXME: resetPerpheral() for ctb? resetPeripheral(); - LOG(logINFO, ("Waiting for %d s for mac to be up\n", WAIT_TIME_CONFIGURE_MAC / (1000 * 1000))); + LOG(logINFO, ("Waiting for %d s for mac to be up\n", + WAIT_TIME_CONFIGURE_MAC / (1000 * 1000))); usleep(WAIT_TIME_CONFIGURE_MAC); // todo maybe without - return OK; + return OK; } int setDetectorPosition(int pos[]) { @@ -1576,67 +1619,65 @@ int setDetectorPosition(int pos[]) { return OK; } -int* getDetectorPosition() { - return detPos; -} +int *getDetectorPosition() { return detPos; } int enableTenGigabitEthernet(int val) { #ifdef VIRTUAL return 0; #endif - uint32_t addr = CONFIG_REG; + uint32_t addr = CONFIG_REG; - // set - if (val != -1) { - LOG(logINFO, ("Setting 10Gbe: %d\n", (val > 0) ? 1 : 0)); - if (val > 0) { - bus_w(addr, bus_r(addr) | CONFIG_GB10_SND_UDP_MSK); - } else { - bus_w(addr, bus_r(addr) & (~CONFIG_GB10_SND_UDP_MSK)); - } - //configuremac called from client - } - return ((bus_r(addr) & CONFIG_GB10_SND_UDP_MSK) >> CONFIG_GB10_SND_UDP_OFST); + // set + if (val != -1) { + LOG(logINFO, ("Setting 10Gbe: %d\n", (val > 0) ? 1 : 0)); + if (val > 0) { + bus_w(addr, bus_r(addr) | CONFIG_GB10_SND_UDP_MSK); + } else { + bus_w(addr, bus_r(addr) & (~CONFIG_GB10_SND_UDP_MSK)); + } + // configuremac called from client + } + return ((bus_r(addr) & CONFIG_GB10_SND_UDP_MSK) >> + CONFIG_GB10_SND_UDP_OFST); } - - - /* ctb specific - configure frequency, phase, pll */ - int setPhase(enum CLKINDEX ind, int val, int degrees) { - if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to set phase\n", ind)); - return FAIL; - } - char* clock_names[] = {CLK_NAMES}; - LOG(logINFO, ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], ind, val, degrees == 0 ? "" : "degrees")); - int maxShift = getMaxPhase(ind); - // validation - if (degrees && (val < 0 || val > 359)) { - LOG(logERROR, ("\tPhase outside limits (0 - 359°C)\n")); - return FAIL; - } - if (!degrees && (val < 0 || val > maxShift - 1)) { - LOG(logERROR, ("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1)); - return FAIL; - } + if (ind != ADC_CLK && ind != DBIT_CLK) { + LOG(logERROR, ("Unknown clock index %d to set phase\n", ind)); + return FAIL; + } + char *clock_names[] = {CLK_NAMES}; + LOG(logINFO, ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], + ind, val, degrees == 0 ? "" : "degrees")); + int maxShift = getMaxPhase(ind); + // validation + if (degrees && (val < 0 || val > 359)) { + LOG(logERROR, ("\tPhase outside limits (0 - 359°C)\n")); + return FAIL; + } + if (!degrees && (val < 0 || val > maxShift - 1)) { + LOG(logERROR, + ("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1)); + return FAIL; + } - int valShift = val; - // convert to phase shift - if (degrees) { - ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); - } - LOG(logDEBUG1, ("phase shift: %d (degrees/shift: %d)\n", valShift, val)); + int valShift = val; + // convert to phase shift + if (degrees) { + ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); + } + LOG(logDEBUG1, ("phase shift: %d (degrees/shift: %d)\n", valShift, val)); - int relativePhase = valShift - clkPhase[ind]; - LOG(logDEBUG1, ("relative phase shift: %d (Current phase: %d)\n", relativePhase, clkPhase[ind])); + int relativePhase = valShift - clkPhase[ind]; + LOG(logDEBUG1, ("relative phase shift: %d (Current phase: %d)\n", + relativePhase, clkPhase[ind])); // same phase if (!relativePhase) { - LOG(logINFO, ("\tNothing to do in Phase Shift\n")); - return OK; + LOG(logINFO, ("\tNothing to do in Phase Shift\n")); + return OK; } LOG(logINFOBLUE, ("Configuring Phase\n")); @@ -1644,9 +1685,10 @@ int setPhase(enum CLKINDEX ind, int val, int degrees) { if (relativePhase > 0) { phase = (maxShift - relativePhase); } else { - phase = (-1) * relativePhase; + phase = (-1) * relativePhase; } - LOG(logDEBUG1, ("[Single Direction] Phase:%d (0x%x). Max Phase shifts:%d\n", phase, phase, maxShift)); + LOG(logDEBUG1, ("[Single Direction] Phase:%d (0x%x). Max Phase shifts:%d\n", + phase, phase, maxShift)); ALTERA_PLL_SetPhaseShift(phase, (int)ind, 0); @@ -1655,63 +1697,68 @@ int setPhase(enum CLKINDEX ind, int val, int degrees) { } int getPhase(enum CLKINDEX ind, int degrees) { - if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to get phase\n", ind)); - return -1; - } - if (!degrees) - return clkPhase[ind]; - // convert back to degrees - int val = 0; - ConvertToDifferentRange(0, getMaxPhase(ind) - 1, 0, 359, clkPhase[ind], &val); - return val; + if (ind != ADC_CLK && ind != DBIT_CLK) { + LOG(logERROR, ("Unknown clock index %d to get phase\n", ind)); + return -1; + } + if (!degrees) + return clkPhase[ind]; + // convert back to degrees + int val = 0; + ConvertToDifferentRange(0, getMaxPhase(ind) - 1, 0, 359, clkPhase[ind], + &val); + return val; } int getMaxPhase(enum CLKINDEX ind) { - if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind)); - return -1; - } - int ret = ((double)PLL_VCO_FREQ_MHZ / (double)clkFrequency[ind]) * MAX_PHASE_SHIFTS_STEPS; + if (ind != ADC_CLK && ind != DBIT_CLK) { + LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind)); + return -1; + } + int ret = ((double)PLL_VCO_FREQ_MHZ / (double)clkFrequency[ind]) * + MAX_PHASE_SHIFTS_STEPS; - char* clock_names[] = {CLK_NAMES}; - LOG(logDEBUG1, ("Max Phase Shift (%s): %d (Clock: %d MHz, VCO:%d MHz)\n", - clock_names[ind], ret, clkFrequency[ind], PLL_VCO_FREQ_MHZ)); + char *clock_names[] = {CLK_NAMES}; + LOG(logDEBUG1, + ("Max Phase Shift (%s): %d (Clock: %d MHz, VCO:%d MHz)\n", + clock_names[ind], ret, clkFrequency[ind], PLL_VCO_FREQ_MHZ)); - return ret; + return ret; } int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) { - if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to validate phase in degrees\n", ind)); - return FAIL; - } - if (val == -1) { - return OK; + if (ind != ADC_CLK && ind != DBIT_CLK) { + LOG(logERROR, + ("Unknown clock index %d to validate phase in degrees\n", ind)); + return FAIL; } - LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", ind)); - int maxShift = getMaxPhase(ind); - // convert degrees to shift - int valShift = 0; - ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); - // convert back to degrees - ConvertToDifferentRange(0, maxShift - 1, 0, 359, valShift, &val); + if (val == -1) { + return OK; + } + LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", ind)); + int maxShift = getMaxPhase(ind); + // convert degrees to shift + int valShift = 0; + ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); + // convert back to degrees + ConvertToDifferentRange(0, maxShift - 1, 0, 359, valShift, &val); - if (val == retval) - return OK; - return FAIL; + if (val == retval) + return OK; + return FAIL; } int setFrequency(enum CLKINDEX ind, int val) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to set frequency\n", ind)); - return FAIL; - } + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to set frequency\n", ind)); + return FAIL; + } if (val <= 0) { return FAIL; } - char* clock_names[] = {CLK_NAMES}; - LOG(logINFO, ("\tSetting %s clock (%d) frequency to %d MHz\n", clock_names[ind], ind, val)); + char *clock_names[] = {CLK_NAMES}; + LOG(logINFO, ("\tSetting %s clock (%d) frequency to %d MHz\n", + clock_names[ind], ind, val)); // check adc clk too high if (ind == ADC_CLK && val > MAXIMUM_ADC_CLK) { @@ -1726,9 +1773,11 @@ int setFrequency(enum CLKINDEX ind, int val) { LOG(logDEBUG1, ("\tRemembering DBIT phase: %d degrees\n", dbitPhase)); // Calculate and set output frequency - clkFrequency[ind] = ALTERA_PLL_SetOuputFrequency (ind, PLL_VCO_FREQ_MHZ, val); - LOG(logINFO, ("\t%s clock (%d) frequency set to %d MHz\n", clock_names[ind], ind, clkFrequency[ind])); - + clkFrequency[ind] = + ALTERA_PLL_SetOuputFrequency(ind, PLL_VCO_FREQ_MHZ, val); + LOG(logINFO, ("\t%s clock (%d) frequency set to %d MHz\n", clock_names[ind], + ind, clkFrequency[ind])); + // phase reset by pll (when setting output frequency) clkPhase[ADC_CLK] = 0; clkPhase[DBIT_CLK] = 0; @@ -1737,9 +1786,10 @@ int setFrequency(enum CLKINDEX ind, int val) { LOG(logINFO, ("\tCorrecting ADC phase to %d degrees\n", adcPhase)); setPhase(ADC_CLK, adcPhase, 1); LOG(logINFO, ("\tCorrecting DBIT phase to %d degrees\n", dbitPhase)); - setPhase(DBIT_CLK, dbitPhase, 1); + setPhase(DBIT_CLK, dbitPhase, 1); - // required to reconfigure as adc clock is stopped temporarily when resetting pll (in changing output frequency) + // required to reconfigure as adc clock is stopped temporarily when + // resetting pll (in changing output frequency) AD9257_Configure(); if (ind != SYNC_CLK) { @@ -1749,17 +1799,17 @@ int setFrequency(enum CLKINDEX ind, int val) { } int getFrequency(enum CLKINDEX ind) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind)); - return -1; - } + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind)); + return -1; + } return clkFrequency[ind]; } void configureSyncFrequency(enum CLKINDEX ind) { - char* clock_names[] = {CLK_NAMES}; + char *clock_names[] = {CLK_NAMES}; int clka = 0, clkb = 0; - switch(ind) { + switch (ind) { case ADC_CLK: clka = DBIT_CLK; clkb = RUN_CLK; @@ -1773,7 +1823,8 @@ void configureSyncFrequency(enum CLKINDEX ind) { clkb = ADC_CLK; break; default: - LOG(logERROR, ("Unknown clock index %d to configure sync frequcny\n", ind)); + LOG(logERROR, + ("Unknown clock index %d to configure sync frequcny\n", ind)); return; } @@ -1781,8 +1832,10 @@ void configureSyncFrequency(enum CLKINDEX ind) { int retval = getFrequency(ind); int aFreq = getFrequency(clka); int bFreq = getFrequency(clkb); - LOG(logDEBUG1, ("Sync Frequncy:%d, RetvalFreq(%s):%d, aFreq(%s):%d, bFreq(%s):%d\n", - syncFreq, clock_names[ind], retval, clock_names[clka], aFreq, clock_names[clkb], bFreq)); + LOG(logDEBUG1, + ("Sync Frequncy:%d, RetvalFreq(%s):%d, aFreq(%s):%d, bFreq(%s):%d\n", + syncFreq, clock_names[ind], retval, clock_names[clka], aFreq, + clock_names[clkb], bFreq)); int configure = 0; @@ -1791,7 +1844,7 @@ void configureSyncFrequency(enum CLKINDEX ind) { min = (retval < min) ? retval : min; // sync is greater than min - if (syncFreq > retval) { + if (syncFreq > retval) { LOG(logINFO, ("\t--Configuring Sync Clock\n")); configure = 1; } @@ -1808,15 +1861,16 @@ void configureSyncFrequency(enum CLKINDEX ind) { } void setPipeline(enum CLKINDEX ind, int val) { - if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to set pipeline\n", ind)); - return; - } + if (ind != ADC_CLK && ind != DBIT_CLK) { + LOG(logERROR, ("Unknown clock index %d to set pipeline\n", ind)); + return; + } if (val < 0) { return; } - char* clock_names[] = {CLK_NAMES}; - LOG(logINFO, ("Setting %s clock (%d) Pipeline to %d\n", clock_names[ind], ind, val)); + char *clock_names[] = {CLK_NAMES}; + LOG(logINFO, + ("Setting %s clock (%d) Pipeline to %d\n", clock_names[ind], ind, val)); uint32_t offset = ADC_OFFSET_ADC_PPLN_OFST; uint32_t mask = ADC_OFFSET_ADC_PPLN_MSK; if (ind == DBIT_CLK) { @@ -1826,43 +1880,50 @@ void setPipeline(enum CLKINDEX ind, int val) { uint32_t addr = ADC_OFFSET_REG; // reset value - bus_w(addr, bus_r(addr) & ~ mask); + bus_w(addr, bus_r(addr) & ~mask); // set value bus_w(addr, bus_r(addr) | ((val << offset) & mask)); - LOG(logDEBUG1, (" %s clock (%d) Offset: 0x%8x\n", clock_names[ind], ind, bus_r(addr))); + LOG(logDEBUG1, + (" %s clock (%d) Offset: 0x%8x\n", clock_names[ind], ind, bus_r(addr))); } int getPipeline(enum CLKINDEX ind) { if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to get pipeline\n", ind)); - return -1; - } - if (ind == DBIT_CLK) { - return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_DBT_PPLN_MSK) >> ADC_OFFSET_DBT_PPLN_OFST); + LOG(logERROR, ("Unknown clock index %d to get pipeline\n", ind)); + return -1; } - return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >> ADC_OFFSET_ADC_PPLN_OFST); + if (ind == DBIT_CLK) { + return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_DBT_PPLN_MSK) >> + ADC_OFFSET_DBT_PPLN_OFST); + } + return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >> + ADC_OFFSET_ADC_PPLN_OFST); } - // patterns uint64_t writePatternIOControl(uint64_t word) { if ((int64_t)word != -1) { - LOG(logINFO, ("Setting Pattern I/O Control: 0x%llx\n", (long long int) word)); + LOG(logINFO, + ("Setting Pattern I/O Control: 0x%llx\n", (long long int)word)); set64BitReg(word, PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG); } - uint64_t retval = get64BitReg(PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG); - LOG(logDEBUG1, (" I/O Control retval: 0x%llx\n", (long long int) retval)); + uint64_t retval = + get64BitReg(PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG); + LOG(logDEBUG1, (" I/O Control retval: 0x%llx\n", (long long int)retval)); return retval; } uint64_t writePatternClkControl(uint64_t word) { if ((int64_t)word != -1) { - LOG(logINFO, ("Setting Pattern Clock Control: 0x%llx\n", (long long int) word)); - set64BitReg(word, PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG); + LOG(logINFO, + ("Setting Pattern Clock Control: 0x%llx\n", (long long int)word)); + set64BitReg(word, PATTERN_IO_CLK_CNTRL_LSB_REG, + PATTERN_IO_CLK_CNTRL_MSB_REG); } - uint64_t retval = get64BitReg(PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG); - LOG(logDEBUG1, (" Clock Control retval: 0x%llx\n", (long long int) retval)); + uint64_t retval = + get64BitReg(PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG); + LOG(logDEBUG1, (" Clock Control retval: 0x%llx\n", (long long int)retval)); return retval; } @@ -1870,7 +1931,8 @@ uint64_t readPatternWord(int addr) { // error (handled in tcp) if (addr < 0 || addr >= MAX_PATTERN_LENGTH) { LOG(logERROR, ("Cannot get Pattern - Word. Invalid addr 0x%x. " - "Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH)); + "Should be between 0 and 0x%x\n", + addr, MAX_PATTERN_LENGTH)); return -1; } @@ -1889,7 +1951,8 @@ uint64_t readPatternWord(int addr) { // read value uint64_t retval = get64BitReg(PATTERN_OUT_LSB_REG, PATTERN_OUT_MSB_REG); - LOG(logDEBUG1, (" Word(addr:0x%x) retval: 0x%llx\n", addr, (long long int) retval)); + LOG(logDEBUG1, + (" Word(addr:0x%x) retval: 0x%llx\n", addr, (long long int)retval)); return retval; } @@ -1902,16 +1965,19 @@ uint64_t writePatternWord(int addr, uint64_t word) { // error (handled in tcp) if (addr < 0 || addr >= MAX_PATTERN_LENGTH) { LOG(logERROR, ("Cannot set Pattern - Word. Invalid addr 0x%x. " - "Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH)); + "Should be between 0 and 0x%x\n", + addr, MAX_PATTERN_LENGTH)); return -1; } - LOG(logINFO, ("Setting Pattern Word (addr:0x%x, word:0x%llx)\n", addr, (long long int) word)); + LOG(logINFO, ("Setting Pattern Word (addr:0x%x, word:0x%llx)\n", addr, + (long long int)word)); uint32_t reg = PATTERN_CNTRL_REG; // write word set64BitReg(word, PATTERN_IN_LSB_REG, PATTERN_IN_MSB_REG); - LOG(logDEBUG1, (" Wrote word. PatternIn Reg: 0x%llx\n", get64BitReg(PATTERN_IN_LSB_REG, PATTERN_IN_MSB_REG))); + LOG(logDEBUG1, (" Wrote word. PatternIn Reg: 0x%llx\n", + get64BitReg(PATTERN_IN_LSB_REG, PATTERN_IN_MSB_REG))); // overwrite with only addr bus_w(reg, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK)); @@ -1923,7 +1989,7 @@ uint64_t writePatternWord(int addr, uint64_t word) { bus_w(reg, bus_r(reg) & (~PATTERN_CNTRL_WR_MSK)); return word; - //return readPatternWord(addr); // will start executing the pattern + // return readPatternWord(addr); // will start executing the pattern } int setPatternWaitAddress(int level, int addr) { @@ -1931,7 +1997,8 @@ int setPatternWaitAddress(int level, int addr) { // error (handled in tcp) if (addr >= MAX_PATTERN_LENGTH) { LOG(logERROR, ("Cannot set Pattern Wait Address. Invalid addr 0x%x. " - "Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH)); + "Should be between 0 and 0x%x\n", + addr, MAX_PATTERN_LENGTH)); return -1; } @@ -1957,19 +2024,22 @@ int setPatternWaitAddress(int level, int addr) { break; default: LOG(logERROR, ("Cannot set Pattern Wait Address. Invalid level 0x%x. " - "Should be between 0 and 2.\n", level)); + "Should be between 0 and 2.\n", + level)); return -1; } // set if (addr >= 0) { - LOG(logINFO, ("Setting Pattern Wait Address (level:%d, addr:0x%x)\n", level, addr)); + LOG(logINFO, ("Setting Pattern Wait Address (level:%d, addr:0x%x)\n", + level, addr)); bus_w(reg, ((addr << offset) & mask)); } // get uint32_t regval = ((bus_r(reg) & mask) >> offset); - LOG(logDEBUG1, (" Wait Address retval (level:%d, addr:0x%x)\n", level, regval)); + LOG(logDEBUG1, + (" Wait Address retval (level:%d, addr:0x%x)\n", level, regval)); return regval; } @@ -1992,29 +2062,33 @@ uint64_t setPatternWaitTime(int level, uint64_t t) { break; default: LOG(logERROR, ("Cannot set Pattern Wait Time. Invalid level %d. " - "Should be between 0 and 2.\n", level)); + "Should be between 0 and 2.\n", + level)); return -1; } // set if ((int64_t)t >= 0) { - LOG(logINFO, ("Setting Pattern Wait Time (level:%d, t:%lld)\n", level, (long long int)t)); + LOG(logINFO, ("Setting Pattern Wait Time (level:%d, t:%lld)\n", level, + (long long int)t)); set64BitReg(t, regl, regm); } // get uint64_t regval = get64BitReg(regl, regm); - LOG(logDEBUG1, (" Wait Time retval (level:%d, t:%lld)\n", level, (long long int)regval)); + LOG(logDEBUG1, (" Wait Time retval (level:%d, t:%lld)\n", level, + (long long int)regval)); return regval; } void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { // (checked at tcp) - if (*startAddr >= MAX_PATTERN_LENGTH || *stopAddr >= MAX_PATTERN_LENGTH) { - LOG(logERROR, ("Cannot set Pattern Loop, Address (startaddr:0x%x, stopaddr:0x%x) must be " - "less than 0x%x\n", - *startAddr, *stopAddr, MAX_PATTERN_LENGTH)); + if (*startAddr >= MAX_PATTERN_LENGTH || *stopAddr >= MAX_PATTERN_LENGTH) { + LOG(logERROR, ("Cannot set Pattern Loop, Address (startaddr:0x%x, " + "stopaddr:0x%x) must be " + "less than 0x%x\n", + *startAddr, *stopAddr, MAX_PATTERN_LENGTH)); } uint32_t addr = 0; @@ -2061,7 +2135,8 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { default: // already checked at tcp interface LOG(logERROR, ("Cannot set Pattern loop. Invalid level %d. " - "Should be between -1 and 2.\n", level)); + "Should be between -1 and 2.\n", + level)); *startAddr = 0; *stopAddr = 0; *nLoop = 0; @@ -2071,8 +2146,8 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { if (level >= 0) { // set iteration if (*nLoop >= 0) { - LOG(logINFO, ("Setting Pattern Loop (level:%d, nLoop:%d)\n", - level, *nLoop)); + LOG(logINFO, + ("Setting Pattern Loop (level:%d, nLoop:%d)\n", level, *nLoop)); bus_w(nLoopReg, *nLoop); } *nLoop = bus_r(nLoopReg); @@ -2080,150 +2155,155 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { // set if (*startAddr >= 0 && *stopAddr >= 0) { - // writing start and stop addr - LOG(logINFO, ("Setting Pattern Loop (level:%d, startaddr:0x%x, stopaddr:0x%x)\n", - level, *startAddr, *stopAddr)); - bus_w(addr, ((*startAddr << startOffset) & startMask) | ((*stopAddr << stopOffset) & stopMask)); - LOG(logDEBUG1, ("Addr:0x%x, val:0x%x\n", addr, bus_r(addr))); + // writing start and stop addr + LOG(logINFO, + ("Setting Pattern Loop (level:%d, startaddr:0x%x, stopaddr:0x%x)\n", + level, *startAddr, *stopAddr)); + bus_w(addr, ((*startAddr << startOffset) & startMask) | + ((*stopAddr << stopOffset) & stopMask)); + LOG(logDEBUG1, ("Addr:0x%x, val:0x%x\n", addr, bus_r(addr))); } // get else { - *startAddr = ((bus_r(addr) & startMask) >> startOffset); - LOG(logDEBUG1, ("Getting Pattern Loop Start Address (level:%d, Read startAddr:0x%x)\n", - level, *startAddr)); + *startAddr = ((bus_r(addr) & startMask) >> startOffset); + LOG(logDEBUG1, ("Getting Pattern Loop Start Address (level:%d, Read " + "startAddr:0x%x)\n", + level, *startAddr)); - *stopAddr = ((bus_r(addr) & stopMask) >> stopOffset); - LOG(logDEBUG1, ("Getting Pattern Loop Stop Address (level:%d, Read stopAddr:0x%x)\n", - level, *stopAddr)); + *stopAddr = ((bus_r(addr) & stopMask) >> stopOffset); + LOG(logDEBUG1, ("Getting Pattern Loop Stop Address (level:%d, Read " + "stopAddr:0x%x)\n", + level, *stopAddr)); } } +int setLEDEnable(int enable) { + uint32_t addr = CONFIG_REG; -int setLEDEnable(int enable) { - uint32_t addr = CONFIG_REG; - - // set - if (enable >= 0) { - LOG(logINFO, ("Switching LED %s\n", (enable > 0) ? "ON" : "OFF")); - // disable - if (enable == 0) { - bus_w(addr, bus_r(addr) | CONFIG_LED_DSBL_MSK); - } - // enable - else { - bus_w(addr, bus_r(addr) & (~CONFIG_LED_DSBL_MSK)); - } - } - // ~ to get the opposite - return (((~bus_r(addr)) & CONFIG_LED_DSBL_MSK) >> CONFIG_LED_DSBL_OFST); + // set + if (enable >= 0) { + LOG(logINFO, ("Switching LED %s\n", (enable > 0) ? "ON" : "OFF")); + // disable + if (enable == 0) { + bus_w(addr, bus_r(addr) | CONFIG_LED_DSBL_MSK); + } + // enable + else { + bus_w(addr, bus_r(addr) & (~CONFIG_LED_DSBL_MSK)); + } + } + // ~ to get the opposite + return (((~bus_r(addr)) & CONFIG_LED_DSBL_MSK) >> CONFIG_LED_DSBL_OFST); } void setDigitalIODelay(uint64_t pinMask, int delay) { - LOG(logINFO, ("Setings Digital IO Delay (pinMask:0x%llx, delay: %d ps)\n", - (long long unsigned int)pinMask, delay)); + LOG(logINFO, ("Setings Digital IO Delay (pinMask:0x%llx, delay: %d ps)\n", + (long long unsigned int)pinMask, delay)); - int delayunit = delay / OUTPUT_DELAY_0_OTPT_STTNG_STEPS; - LOG(logDEBUG1, ("delay unit: 0x%x (steps of 25ps)\n", delayunit)); + int delayunit = delay / OUTPUT_DELAY_0_OTPT_STTNG_STEPS; + LOG(logDEBUG1, ("delay unit: 0x%x (steps of 25ps)\n", delayunit)); - // set pin mask - bus_w(PIN_DELAY_1_REG, pinMask); + // set pin mask + bus_w(PIN_DELAY_1_REG, pinMask); - uint32_t addr = OUTPUT_DELAY_0_REG; - // set delay - bus_w(addr, bus_r(addr) & (~OUTPUT_DELAY_0_OTPT_STTNG_MSK)); - bus_w(addr, (bus_r(addr) | ((delayunit << OUTPUT_DELAY_0_OTPT_STTNG_OFST) & OUTPUT_DELAY_0_OTPT_STTNG_MSK))); + uint32_t addr = OUTPUT_DELAY_0_REG; + // set delay + bus_w(addr, bus_r(addr) & (~OUTPUT_DELAY_0_OTPT_STTNG_MSK)); + bus_w(addr, (bus_r(addr) | ((delayunit << OUTPUT_DELAY_0_OTPT_STTNG_OFST) & + OUTPUT_DELAY_0_OTPT_STTNG_MSK))); - // load value - bus_w(addr, bus_r(addr) | OUTPUT_DELAY_0_OTPT_TRGGR_MSK); + // load value + bus_w(addr, bus_r(addr) | OUTPUT_DELAY_0_OTPT_TRGGR_MSK); - // trigger configuration - bus_w(addr, bus_r(addr) & (~OUTPUT_DELAY_0_OTPT_TRGGR_MSK)); + // trigger configuration + bus_w(addr, bus_r(addr) & (~OUTPUT_DELAY_0_OTPT_TRGGR_MSK)); } void setPatternMask(uint64_t mask) { - set64BitReg(mask, PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); + set64BitReg(mask, PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); } uint64_t getPatternMask() { - return get64BitReg(PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); + return get64BitReg(PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); } void setPatternBitMask(uint64_t mask) { - set64BitReg(mask, PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); + set64BitReg(mask, PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); } uint64_t getPatternBitMask() { - return get64BitReg(PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); + return get64BitReg(PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); } - /* aquisition */ -int startStateMachine(){ +int startStateMachine() { #ifdef VIRTUAL - // create udp socket - if(createUDPSocket(0) != OK) { - return FAIL; - } - LOG(logINFOBLUE, ("Starting State Machine\n")); + // create udp socket + if (createUDPSocket(0) != OK) { + return FAIL; + } + LOG(logINFOBLUE, ("Starting State Machine\n")); virtual_status = 1; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - virtual_stop = ComVirtual_getStop(); - if (virtual_stop != 0) { - LOG(logERROR, ("Cant start acquisition. " - "Stop server has not updated stop status to 0\n")); - return FAIL; - } - } - if(pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { - LOG(logERROR, ("Could not start Virtual acquisition thread\n")); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - return FAIL; - } - LOG(logINFOGREEN, ("Virtual Acquisition started\n")); - return OK; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + virtual_stop = ComVirtual_getStop(); + if (virtual_stop != 0) { + LOG(logERROR, ("Cant start acquisition. " + "Stop server has not updated stop status to 0\n")); + return FAIL; + } + } + if (pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { + LOG(logERROR, ("Could not start Virtual acquisition thread\n")); + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + return FAIL; + } + LOG(logINFOGREEN, ("Virtual Acquisition started\n")); + return OK; #endif int send_to_10g = enableTenGigabitEthernet(-1); - // 1 giga udp - if (send_to_10g == 0) { - // create udp socket - if(createUDPSocket(0) != OK) { - return FAIL; - } - // update header with modId, detType and version. Reset offset and fnum - createUDPPacketHeader(udpPacketData, getHardwareSerialNumber()); - } - - LOG(logINFOBLUE, ("Starting State Machine\n")); - cleanFifos(); - if (send_to_10g == 0) { - unsetFifoReadStrobes(); // FIXME: unnecessary to write bus_w(dumm, 0) as it is 0 in the beginnig and the strobes are always unset if set + // 1 giga udp + if (send_to_10g == 0) { + // create udp socket + if (createUDPSocket(0) != OK) { + return FAIL; + } + // update header with modId, detType and version. Reset offset and fnum + createUDPPacketHeader(udpPacketData, getHardwareSerialNumber()); } - //start state machine - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK | CONTROL_STRT_EXPSR_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STRT_ACQSTN_MSK & ~CONTROL_STRT_EXPSR_MSK); + LOG(logINFOBLUE, ("Starting State Machine\n")); + cleanFifos(); + if (send_to_10g == 0) { + unsetFifoReadStrobes(); // FIXME: unnecessary to write bus_w(dumm, 0) as + // it is 0 in the beginnig and the strobes are + // always unset if set + } - LOG(logINFO, ("Status Register: %08x\n",bus_r(STATUS_REG))); - return OK; + // start state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK | + CONTROL_STRT_EXPSR_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STRT_ACQSTN_MSK & + ~CONTROL_STRT_EXPSR_MSK); + + LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); + return OK; } - #ifdef VIRTUAL -void* start_timer(void* arg) { - if (!isControlServer) { - return NULL; - } +void *start_timer(void *arg) { + if (!isControlServer) { + return NULL; + } - int64_t periodNs = getPeriod(); - int numFrames = (getNumFrames() * - getNumTriggers() ); - int64_t expUs = getExpTime() / 1000; + int64_t periodNs = getPeriod(); + int numFrames = (getNumFrames() * getNumTriggers()); + int64_t expUs = getExpTime() / 1000; int imageSize = dataBytes; int dataSize = UDP_PACKET_DATA_BYTES; @@ -2236,20 +2316,20 @@ void* start_timer(void* arg) { { int i = 0; for (i = 0; i < imageSize; i += sizeof(uint16_t)) { - *((uint16_t*)(imageData + i)) = i; - } + *((uint16_t *)(imageData + i)) = i; + } } - // Send data + // Send data { int frameNr = 0; // loop over number of frames - for(frameNr = 0; frameNr != numFrames; ++frameNr ) { + for (frameNr = 0; frameNr != numFrames; ++frameNr) { - // update the virtual stop from stop server - virtual_stop = ComVirtual_getStop(); - //check if virtual_stop is high - if(virtual_stop == 1){ + // update the virtual stop from stop server + virtual_stop = ComVirtual_getStop(); + // check if virtual_stop is high + if (virtual_stop == 1) { break; } @@ -2262,14 +2342,15 @@ void* start_timer(void* arg) { // loop packet { int i = 0; - for(i = 0; i != packetsPerFrame; ++i) { - + for (i = 0; i != packetsPerFrame; ++i) { + char packetData[packetSize]; memset(packetData, 0, packetSize); // set header - sls_detector_header* header = (sls_detector_header*)(packetData); + sls_detector_header *header = + (sls_detector_header *)(packetData); header->detType = (uint16_t)myDetectorType; - header->version = SLS_DETECTOR_HEADER_VERSION - 1; + header->version = SLS_DETECTOR_HEADER_VERSION - 1; header->frameNumber = frameNr; header->packetNumber = i; header->modId = 0; @@ -2277,192 +2358,191 @@ void* start_timer(void* arg) { header->column = detPos[Y]; // fill data - memcpy(packetData + sizeof(sls_detector_header), imageData + srcOffset, dataSize); + memcpy(packetData + sizeof(sls_detector_header), + imageData + srcOffset, dataSize); srcOffset += dataSize; - + sendUDPPacket(0, packetData, packetSize); } } LOG(logINFO, ("Sent frame: %d\n", frameNr)); clock_gettime(CLOCK_REALTIME, &end); int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 + - (end.tv_nsec - begin.tv_nsec)); + (end.tv_nsec - begin.tv_nsec)); // sleep for (period - exptime) if (frameNr < numFrames) { // if there is a next frame if (periodNs > timeNs) { - usleep((periodNs - timeNs)/ 1000); + usleep((periodNs - timeNs) / 1000); } } } } - closeUDPSocket(0); + closeUDPSocket(0); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - LOG(logINFOBLUE, ("Finished Acquiring\n")); - return NULL; + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + LOG(logINFOBLUE, ("Finished Acquiring\n")); + return NULL; } #endif -int stopStateMachine(){ - LOG(logINFORED, ("Stopping State Machine\n")); +int stopStateMachine() { + LOG(logINFORED, ("Stopping State Machine\n")); #ifdef VIRTUAL - if (!isControlServer) { - virtual_stop = 1; - ComVirtual_setStop(virtual_stop); - // read till status is idle - int tempStatus = 1; - while(tempStatus == 1) { - tempStatus = ComVirtual_getStatus(); - } - virtual_stop = 0; - ComVirtual_setStop(virtual_stop); - LOG(logINFO, ("Stopped State Machine\n")); - } - return OK; + if (!isControlServer) { + virtual_stop = 1; + ComVirtual_setStop(virtual_stop); + // read till status is idle + int tempStatus = 1; + while (tempStatus == 1) { + tempStatus = ComVirtual_getStatus(); + } + virtual_stop = 0; + ComVirtual_setStop(virtual_stop); + LOG(logINFO, ("Stopped State Machine\n")); + } + return OK; #endif - //stop state machine - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STP_ACQSTN_MSK); - usleep(WAIT_TIME_US_STP_ACQ); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STP_ACQSTN_MSK); + // stop state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STP_ACQSTN_MSK); + usleep(WAIT_TIME_US_STP_ACQ); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STP_ACQSTN_MSK); - LOG(logINFO, ("Status Register: %08x\n",bus_r(STATUS_REG))); + LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); - return OK; + return OK; } - - - - -enum runStatus getRunStatus(){ +enum runStatus getRunStatus() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } - if(virtual_status == 0) { - LOG(logINFOBLUE, ("Status: IDLE\n")); - return IDLE; - }else{ - LOG(logINFOBLUE, ("Status: RUNNING\n")); - return RUNNING; - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } + if (virtual_status == 0) { + LOG(logINFOBLUE, ("Status: IDLE\n")); + return IDLE; + } else { + LOG(logINFOBLUE, ("Status: RUNNING\n")); + return RUNNING; + } #endif - LOG(logDEBUG1, ("Getting status\n")); + LOG(logDEBUG1, ("Getting status\n")); - uint32_t retval = bus_r(STATUS_REG); - LOG(logINFO, ("Status Register: %08x\n",retval)); + uint32_t retval = bus_r(STATUS_REG); + LOG(logINFO, ("Status Register: %08x\n", retval)); - // error - //if (retval & STATUS_SM_FF_FLL_MSK) { This bit is high when a analog fifo is full Or when external stop - if (retval & STATUS_ANY_FF_FLL_MSK) { // if adc or digital fifo is full - LOG(logINFORED, ("Status: Error (Any fifo full)\n")); - return ERROR; - } + // error + // if (retval & STATUS_SM_FF_FLL_MSK) { This bit is high when a analog fifo + // is full Or when external stop + if (retval & STATUS_ANY_FF_FLL_MSK) { // if adc or digital fifo is full + LOG(logINFORED, ("Status: Error (Any fifo full)\n")); + return ERROR; + } - // running - if(retval & STATUS_RN_BSY_MSK) { - if (retval & STATUS_WTNG_FR_TRGGR_MSK) { - LOG(logINFOBLUE, ("Status: Waiting for Trigger\n")); - return WAITING; - } + // running + if (retval & STATUS_RN_BSY_MSK) { + if (retval & STATUS_WTNG_FR_TRGGR_MSK) { + LOG(logINFOBLUE, ("Status: Waiting for Trigger\n")); + return WAITING; + } - LOG(logINFOBLUE, ("Status: Running\n")); - return RUNNING; + LOG(logINFOBLUE, ("Status: Running\n")); + return RUNNING; - } + } - // not running - else { - if (retval & STATUS_STPPD_MSK) { - LOG(logINFOBLUE, ("Status: Stopped\n")); - return STOPPED; - } + // not running + else { + if (retval & STATUS_STPPD_MSK) { + LOG(logINFOBLUE, ("Status: Stopped\n")); + return STOPPED; + } - if (retval & STATUS_FRM_RN_BSY_MSK) { - LOG(logINFOBLUE, ("Status: Transmitting (Read machine busy)\n")); - return TRANSMITTING; - } + if (retval & STATUS_FRM_RN_BSY_MSK) { + LOG(logINFOBLUE, ("Status: Transmitting (Read machine busy)\n")); + return TRANSMITTING; + } + if (!(retval & STATUS_IDLE_MSK)) { + LOG(logINFOBLUE, ("Status: Idle\n")); + return IDLE; + } - if (! (retval & STATUS_IDLE_MSK)) { - LOG(logINFOBLUE, ("Status: Idle\n")); - return IDLE; - } - - LOG(logERROR, ("Status: Unknown status %08x\n", retval)); - return ERROR; - } + LOG(logERROR, ("Status: Unknown status %08x\n", retval)); + return ERROR; + } } - void readandSendUDPFrames(int *ret, char *mess) { - LOG(logDEBUG1, ("Reading from 1G UDP\n")); + LOG(logDEBUG1, ("Reading from 1G UDP\n")); - // validate udp socket - if (getUdPSocketDescriptor(0) <= 0) { - *ret = FAIL; - sprintf(mess,"UDP Socket not created. sockfd:%d\n", getUdPSocketDescriptor(0)); - LOG(logERROR, (mess)); - return; - } + // validate udp socket + if (getUdPSocketDescriptor(0) <= 0) { + *ret = FAIL; + sprintf(mess, "UDP Socket not created. sockfd:%d\n", + getUdPSocketDescriptor(0)); + LOG(logERROR, (mess)); + return; + } - // every frame read - while(readFrameFromFifo() == OK) { - int bytesToSend = 0, n = 0; - while((bytesToSend = fillUDPPacket(udpPacketData))) { - n += sendUDPPacket(0, udpPacketData, bytesToSend); - } - if (n >= dataBytes) { - LOG(logINFO, (" Frame %lld sent (%d packets, %d databytes, n:%d bytes sent)\n", - udpFrameNumber, udpPacketNumber + 1, dataBytes, n)); - } - } - closeUDPSocket(0); + // every frame read + while (readFrameFromFifo() == OK) { + int bytesToSend = 0, n = 0; + while ((bytesToSend = fillUDPPacket(udpPacketData))) { + n += sendUDPPacket(0, udpPacketData, bytesToSend); + } + if (n >= dataBytes) { + LOG(logINFO, (" Frame %lld sent (%d packets, %d databytes, n:%d " + "bytes sent)\n", + udpFrameNumber, udpPacketNumber + 1, dataBytes, n)); + } + } + closeUDPSocket(0); } - void readFrame(int *ret, char *mess) { #ifdef VIRTUAL // wait for acquisition to be done - while(runBusy()){ + while (runBusy()) { usleep(500); // random } LOG(logINFOGREEN, ("acquisition successfully finished\n")); - return; + return; #endif - // 1G - if (!enableTenGigabitEthernet(-1)) { - readandSendUDPFrames(ret, mess); - } - // 10G - else { - // wait for acquisition to be done - while(runBusy()){ - usleep(500); // random - } - } + // 1G + if (!enableTenGigabitEthernet(-1)) { + readandSendUDPFrames(ret, mess); + } + // 10G + else { + // wait for acquisition to be done + while (runBusy()) { + usleep(500); // random + } + } - // ret could be fail in 1gudp for not creating udp sockets - if (*ret != FAIL) { - // frames left to give status - int64_t retval = getNumFramesLeft() + 2; - if ( retval > 1) { - sprintf(mess,"No data and run stopped: %lld frames left\n",(long long int)retval); - LOG(logERROR, (mess)); - } else { - LOG(logINFOGREEN, ("Acquisition successfully finished\n")); - } - } + // ret could be fail in 1gudp for not creating udp sockets + if (*ret != FAIL) { + // frames left to give status + int64_t retval = getNumFramesLeft() + 2; + if (retval > 1) { + sprintf(mess, "No data and run stopped: %lld frames left\n", + (long long int)retval); + LOG(logERROR, (mess)); + } else { + LOG(logINFOGREEN, ("Acquisition successfully finished\n")); + } + } *ret = (int)OK; } void unsetFifoReadStrobes() { - bus_w(DUMMY_REG, bus_r(DUMMY_REG) & (~DUMMY_ANLG_FIFO_RD_STRBE_MSK) & (~DUMMY_DGTL_FIFO_RD_STRBE_MSK)); + bus_w(DUMMY_REG, bus_r(DUMMY_REG) & (~DUMMY_ANLG_FIFO_RD_STRBE_MSK) & + (~DUMMY_DGTL_FIFO_RD_STRBE_MSK)); } void readSample(int ns) { @@ -2484,9 +2564,11 @@ void readSample(int ns) { ; } - if (!(ns%1000)) { - LOG(logDEBUG1, ("Reading sample ns:%d of %d AEmtpy:0x%x AFull:0x%x Status:0x%x\n", - ns, naSamples, bus_r(FIFO_EMPTY_REG), bus_r(FIFO_FULL_REG), bus_r(STATUS_REG))); + if (!(ns % 1000)) { + LOG(logDEBUG1, ("Reading sample ns:%d of %d AEmtpy:0x%x AFull:0x%x " + "Status:0x%x\n", + ns, naSamples, bus_r(FIFO_EMPTY_REG), + bus_r(FIFO_FULL_REG), bus_r(STATUS_REG))); } // loop through all channels @@ -2500,16 +2582,17 @@ void readSample(int ns) { bus_w(addr, bus_r(addr) & ~(DUMMY_FIFO_CHNNL_SLCT_MSK)); // select channel - bus_w(addr, bus_r(addr) | ((ich << DUMMY_FIFO_CHNNL_SLCT_OFST) & DUMMY_FIFO_CHNNL_SLCT_MSK)); + bus_w(addr, bus_r(addr) | ((ich << DUMMY_FIFO_CHNNL_SLCT_OFST) & + DUMMY_FIFO_CHNNL_SLCT_MSK)); // read fifo and write it to current position of data pointer - *((uint16_t*)analogDataPtr) = bus_r16(fifoAddr); + *((uint16_t *)analogDataPtr) = bus_r16(fifoAddr); // keep reading till the value is the same - /* while (*((uint16_t*)analogDataPtr) != bus_r16(fifoAddr)) { - LOG(logDEBUG1, ("%d ", ich)); - *((uint16_t*)analogDataPtr) = bus_r16(fifoAddr); - }*/ + /* while (*((uint16_t*)analogDataPtr) != bus_r16(fifoAddr)) { + LOG(logDEBUG1, ("%d ", ich)); + *((uint16_t*)analogDataPtr) = bus_r16(fifoAddr); + }*/ // increment pointer to data out destination analogDataPtr += 2; @@ -2531,56 +2614,66 @@ void readSample(int ns) { } // wait as it is connected directly to fifo running on a different clock - if (!(ns%1000)) { - LOG(logDEBUG1, ("Reading sample ns:%d of %d DEmtpy:%d DFull:%d Status:0x%x\n", - ns, ndSamples, - ((bus_r(FIFO_DIN_STATUS_REG) & FIFO_DIN_STATUS_FIFO_EMPTY_MSK) >> FIFO_DIN_STATUS_FIFO_EMPTY_OFST), - ((bus_r(FIFO_DIN_STATUS_REG) & FIFO_DIN_STATUS_FIFO_FULL_MSK) >> FIFO_DIN_STATUS_FIFO_FULL_OFST), - bus_r(STATUS_REG))); + if (!(ns % 1000)) { + LOG(logDEBUG1, + ("Reading sample ns:%d of %d DEmtpy:%d DFull:%d Status:0x%x\n", + ns, ndSamples, + ((bus_r(FIFO_DIN_STATUS_REG) & + FIFO_DIN_STATUS_FIFO_EMPTY_MSK) >> + FIFO_DIN_STATUS_FIFO_EMPTY_OFST), + ((bus_r(FIFO_DIN_STATUS_REG) & + FIFO_DIN_STATUS_FIFO_FULL_MSK) >> + FIFO_DIN_STATUS_FIFO_FULL_OFST), + bus_r(STATUS_REG))); } - + // read fifo and write it to current position of data pointer - *((uint64_t*)digitalDataPtr) = get64BitReg(FIFO_DIN_LSB_REG, FIFO_DIN_MSB_REG); + *((uint64_t *)digitalDataPtr) = + get64BitReg(FIFO_DIN_LSB_REG, FIFO_DIN_MSB_REG); digitalDataPtr += 8; } } uint32_t checkDataInFifo() { - uint32_t dataPresent = 0; - if (analogEnable) { - uint32_t analogFifoEmpty = bus_r(FIFO_EMPTY_REG); - LOG(logINFO, ("Analog Fifo Empty (32 channels): 0x%08x\n", analogFifoEmpty)); - dataPresent = (~analogFifoEmpty); - } - if (!dataPresent && digitalEnable) { - int digitalFifoEmpty = ((bus_r(FIFO_DIN_STATUS_REG) & FIFO_DIN_STATUS_FIFO_EMPTY_MSK) >> FIFO_DIN_STATUS_FIFO_EMPTY_OFST); - LOG(logINFO, ("Digital Fifo Empty: %d\n",digitalFifoEmpty)); - dataPresent = (digitalFifoEmpty ? 0 : 1); - } + uint32_t dataPresent = 0; + if (analogEnable) { + uint32_t analogFifoEmpty = bus_r(FIFO_EMPTY_REG); + LOG(logINFO, + ("Analog Fifo Empty (32 channels): 0x%08x\n", analogFifoEmpty)); + dataPresent = (~analogFifoEmpty); + } + if (!dataPresent && digitalEnable) { + int digitalFifoEmpty = + ((bus_r(FIFO_DIN_STATUS_REG) & FIFO_DIN_STATUS_FIFO_EMPTY_MSK) >> + FIFO_DIN_STATUS_FIFO_EMPTY_OFST); + LOG(logINFO, ("Digital Fifo Empty: %d\n", digitalFifoEmpty)); + dataPresent = (digitalFifoEmpty ? 0 : 1); + } LOG(logDEBUG2, ("Data in Fifo :0x%x\n", dataPresent)); - return dataPresent; + return dataPresent; } // only called for starting of a new frame int checkFifoForEndOfAcquisition() { - uint32_t dataPresent = checkDataInFifo(); + uint32_t dataPresent = checkDataInFifo(); LOG(logDEBUG2, ("status:0x%x\n", bus_r(STATUS_REG))); // as long as no data while (!dataPresent) { // acquisition done if (!runBusy()) { - // wait to be sure there is no data in fifo + // wait to be sure there is no data in fifo usleep(WAIT_TME_US_FR_ACQDONE_REG); // still no data if (!checkDataInFifo()) { LOG(logINFO, ("Acquisition Finished (State: 0x%08x), " - "no frame found .\n", bus_r(STATUS_REG))); + "no frame found .\n", + bus_r(STATUS_REG))); return FAIL; } // got data, exit - else { + else { break; } } @@ -2592,8 +2685,8 @@ int checkFifoForEndOfAcquisition() { } int readFrameFromFifo() { - int ns = 0; - // point the data pointer to the starting position of data + int ns = 0; + // point the data pointer to the starting position of data analogDataPtr = analogData; digitalDataPtr = digitalData; @@ -2604,8 +2697,8 @@ int readFrameFromFifo() { // read Sample int maxSamples = (naSamples > ndSamples) ? naSamples : ndSamples; - while(ns < maxSamples) { - // chceck if no data in fifo, return ns?//FIXME: ask Anna + while (ns < maxSamples) { + // chceck if no data in fifo, return ns?//FIXME: ask Anna readSample(ns); ns++; } @@ -2616,28 +2709,19 @@ int readFrameFromFifo() { uint32_t runBusy() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } return virtual_status; #endif - uint32_t s = (bus_r(STATUS_REG) & STATUS_RN_BSY_MSK); - //LOG(logDEBUG1, ("Status Register: %08x\n", s)); - return s; + uint32_t s = (bus_r(STATUS_REG) & STATUS_RN_BSY_MSK); + // LOG(logDEBUG1, ("Status Register: %08x\n", s)); + return s; } - - - - - - - /* common */ -int calculateDataBytes(){ - return dataBytes; -} +int calculateDataBytes() { return dataBytes; } int getTotalNumberOfChannels() { int nchanx = 0, nchany = 0; @@ -2645,11 +2729,12 @@ int getTotalNumberOfChannels() { return nchanx * nchany; } -void getNumberOfChannels(int* nchanx, int* nchany) { +void getNumberOfChannels(int *nchanx, int *nchany) { int nachans = 0, ndchans = 0; // analog channels (normal, analog/digital readout) if (analogEnable) { - uint32_t mask = enableTenGigabitEthernet(-1) ? adcEnableMask_10g : adcEnableMask_1g; + uint32_t mask = + enableTenGigabitEthernet(-1) ? adcEnableMask_10g : adcEnableMask_1g; if (mask == BIT32_MASK) { nachans = NCHAN_ANALOG; } else { @@ -2657,7 +2742,7 @@ void getNumberOfChannels(int* nchanx, int* nchany) { for (ich = 0; ich < NCHAN_ANALOG; ++ich) { if ((mask & (1 << ich)) != 0U) ++nachans; - } + } } LOG(logDEBUG1, ("Analog Channels: %d\n", nachans)); } @@ -2672,6 +2757,6 @@ void getNumberOfChannels(int* nchanx, int* nchany) { *nchany = 1; } -int getNumberOfChips(){return NCHIP;} -int getNumberOfDACs(){return NDAC;} -int getNumberOfChannelsPerChip(){return NCHAN;} +int getNumberOfChips() { return NCHIP; } +int getNumberOfDACs() { return NDAC; } +int getNumberOfChannelsPerChip() { return NCHAN; } diff --git a/slsDetectorServers/eigerDetectorServer/9mhvserial_bf.c b/slsDetectorServers/eigerDetectorServer/9mhvserial_bf.c old mode 100755 new mode 100644 index b1367d8e8..a402cbc0a --- a/slsDetectorServers/eigerDetectorServer/9mhvserial_bf.c +++ b/slsDetectorServers/eigerDetectorServer/9mhvserial_bf.c @@ -1,202 +1,197 @@ #include "ansi.h" -#include /* POSIX terminal control definitions */ -#include -#include // atoi -#include // File control definitions -#include // ioctl -#include // read, close -#include // memset -#include // I2C_SLAVE, __u8 reg #include +#include // File control definitions +#include // I2C_SLAVE, __u8 reg +#include +#include // atoi +#include // memset +#include // ioctl +#include /* POSIX terminal control definitions */ +#include // read, close -#define PORTNAME "/dev/ttyBF1" -#define GOODBYE 200 -#define BUFFERSIZE 16 -#define I2C_DEVICE_FILE "/dev/i2c-0" -#define I2C_DEVICE_ADDRESS 0x4C +#define PORTNAME "/dev/ttyBF1" +#define GOODBYE 200 +#define BUFFERSIZE 16 +#define I2C_DEVICE_FILE "/dev/i2c-0" +#define I2C_DEVICE_ADDRESS 0x4C //#define I2C_DEVICE_ADDRESS 0x48 -#define I2C_REGISTER_ADDRESS 0x40 +#define I2C_REGISTER_ADDRESS 0x40 +int i2c_open(const char *file, unsigned int addr) { + // device file + int fd = open(file, O_RDWR); + if (fd < 0) { + LOG(logERROR, ("Warning: Unable to open file %s\n", file)); + return -1; + } -int i2c_open(const char* file,unsigned int addr){ - - //device file - int fd = open( file, O_RDWR ); - if (fd < 0) { - LOG(logERROR, ("Warning: Unable to open file %s\n",file)); - return -1; - } - - //device address - if( ioctl( fd, I2C_SLAVE, addr&0x7F ) < 0 ) { - LOG(logERROR, ("Warning: Unable to set slave address:0x%x \n",addr)); - return -2; - } - return fd; + // device address + if (ioctl(fd, I2C_SLAVE, addr & 0x7F) < 0) { + LOG(logERROR, ("Warning: Unable to set slave address:0x%x \n", addr)); + return -2; + } + return fd; } +int i2c_read() { -int i2c_read(){ + int fd = i2c_open(I2C_DEVICE_FILE, I2C_DEVICE_ADDRESS); + __u8 reg = I2C_REGISTER_ADDRESS & 0xff; - int fd = i2c_open(I2C_DEVICE_FILE, I2C_DEVICE_ADDRESS); - __u8 reg = I2C_REGISTER_ADDRESS & 0xff; - - unsigned char buf = reg; - if (write(fd, &buf, 1)!= 1){ - LOG(logERROR, ("Warning: Unable to write read request to register %d\n", reg)); - return -1; - } - //read and update value (but old value read out) - if(read(fd, &buf, 1) != 1){ - LOG(logERROR, ("Warning: Unable to read register %d\n", reg)); - return -2; - } - //read again to read the updated value - if(read(fd, &buf, 1) != 1){ - LOG(logERROR, ("Warning: Unable to read register %d\n", reg)); - return -2; - } - close(fd); - return buf; + unsigned char buf = reg; + if (write(fd, &buf, 1) != 1) { + LOG(logERROR, + ("Warning: Unable to write read request to register %d\n", reg)); + return -1; + } + // read and update value (but old value read out) + if (read(fd, &buf, 1) != 1) { + LOG(logERROR, ("Warning: Unable to read register %d\n", reg)); + return -2; + } + // read again to read the updated value + if (read(fd, &buf, 1) != 1) { + LOG(logERROR, ("Warning: Unable to read register %d\n", reg)); + return -2; + } + close(fd); + return buf; } +int i2c_write(unsigned int value) { -int i2c_write(unsigned int value){ + __u8 val = value & 0xff; - __u8 val = value & 0xff; + int fd = i2c_open(I2C_DEVICE_FILE, I2C_DEVICE_ADDRESS); + if (fd < 0) + return fd; - int fd = i2c_open(I2C_DEVICE_FILE, I2C_DEVICE_ADDRESS); - if(fd < 0) - return fd; + __u8 reg = I2C_REGISTER_ADDRESS & 0xff; + char buf[3]; + buf[0] = reg; + buf[1] = val; + if (write(fd, buf, 2) != 2) { + LOG(logERROR, + ("Warning: Unable to write %d to register %d\n", val, reg)); + return -1; + } - __u8 reg = I2C_REGISTER_ADDRESS & 0xff; - char buf[3]; - buf[0] = reg; - buf[1] = val; - if (write(fd, buf, 2) != 2) { - LOG(logERROR, ("Warning: Unable to write %d to register %d\n",val, reg)); - return -1; - } - - close(fd); - return 0; + close(fd); + return 0; } +int main(int argc, char *argv[]) { + int fd = open(PORTNAME, O_RDWR | O_NOCTTY | O_SYNC); + if (fd < 0) { + LOG(logERROR, ("Warning: Unable to open port %s\n", PORTNAME)); + return -1; + } + LOG(logINFO, ("opened port at %s\n", PORTNAME)); + struct termios serial_conf; + // reset structure + memset(&serial_conf, 0, sizeof(serial_conf)); + // control options + serial_conf.c_cflag = B2400 | CS8 | CREAD | CLOCAL; + // input options + serial_conf.c_iflag = IGNPAR; + // output options + serial_conf.c_oflag = 0; + // line options + serial_conf.c_lflag = ICANON; + // flush input + if (tcflush(fd, TCIOFLUSH) < 0) { + LOG(logERROR, ("Warning: error form tcflush %d\n", errno)); + return 0; + } + // set new options for the port, TCSANOW:changes occur immediately without + // waiting for data to complete + if (tcsetattr(fd, TCSANOW, &serial_conf) < 0) { + LOG(logERROR, ("Warning: error form tcsetattr %d\n", errno)); + return 0; + } + if (tcsetattr(fd, TCSAFLUSH, &serial_conf) < 0) { + LOG(logERROR, ("Warning: error form tcsetattr %d\n", errno)); + return 0; + } -int main(int argc, char* argv[]) { + int ret = 0; + int n = 0; + int ival = 0; + char buffer[BUFFERSIZE]; + memset(buffer, 0, BUFFERSIZE); + buffer[BUFFERSIZE - 1] = '\n'; + LOG(logINFO, ("Ready...\n")); - int fd = open(PORTNAME, O_RDWR | O_NOCTTY | O_SYNC); - if(fd < 0){ - LOG(logERROR, ("Warning: Unable to open port %s\n", PORTNAME)); - return -1; - } - LOG(logINFO, ("opened port at %s\n",PORTNAME)); + while (ret != GOODBYE) { + memset(buffer, 0, BUFFERSIZE); + n = read(fd, buffer, BUFFERSIZE); + LOG(logDEBUG1, ("Received %d Bytes\n", n)); + LOG(logINFO, ("Got message: '%s'\n", buffer)); - struct termios serial_conf; - // reset structure - memset(&serial_conf,0,sizeof(serial_conf)); - // control options - serial_conf.c_cflag = B2400 | CS8 | CREAD | CLOCAL; - // input options - serial_conf.c_iflag = IGNPAR; - // output options - serial_conf.c_oflag = 0; - // line options - serial_conf.c_lflag = ICANON; - // flush input - if(tcflush(fd, TCIOFLUSH) < 0){ - LOG(logERROR, ("Warning: error form tcflush %d\n", errno)); - return 0; - } - // set new options for the port, TCSANOW:changes occur immediately without waiting for data to complete - if(tcsetattr(fd, TCSANOW, &serial_conf) < 0){ - LOG(logERROR, ("Warning: error form tcsetattr %d\n", errno)); - return 0; - } + switch (buffer[0]) { + case '\0': + LOG(logINFO, ("Got Start (Detector restart)\n")); + break; + case 's': + LOG(logINFO, ("Got Start \n")); + break; + case 'p': + if (!sscanf(&buffer[1], "%d", &ival)) { + LOG(logERROR, ("Warning: cannot scan voltage value\n")); + break; + } + // ok/ fail + memset(buffer, 0, BUFFERSIZE); + buffer[BUFFERSIZE - 1] = '\n'; + if (i2c_write(ival) < 0) + strcpy(buffer, "fail "); + else + strcpy(buffer, "success "); + LOG(logINFO, ("Sending: '%s'\n", buffer)); + n = write(fd, buffer, BUFFERSIZE); + LOG(logDEBUG1, ("Sent %d Bytes\n", n)); + break; - if(tcsetattr(fd, TCSAFLUSH, &serial_conf) < 0){ - LOG(logERROR, ("Warning: error form tcsetattr %d\n", errno)); - return 0; - } + case 'g': + ival = i2c_read(); + // ok/ fail + memset(buffer, 0, BUFFERSIZE); + buffer[BUFFERSIZE - 1] = '\n'; + if (ival < 0) + strcpy(buffer, "fail "); + else + strcpy(buffer, "success "); + n = write(fd, buffer, BUFFERSIZE); + LOG(logINFO, ("Sending: '%s'\n", buffer)); + LOG(logDEBUG1, ("Sent %d Bytes\n", n)); + // value + memset(buffer, 0, BUFFERSIZE); + buffer[BUFFERSIZE - 1] = '\n'; + if (ival >= 0) { + LOG(logINFO, ("Sending: '%d'\n", ival)); + sprintf(buffer, "%d ", ival); + n = write(fd, buffer, BUFFERSIZE); + LOG(logINFO, ("Sent %d Bytes\n", n)); + } else + LOG(logERROR, ("%s\n", buffer)); + break; - int ret = 0; - int n = 0; - int ival= 0; - char buffer[BUFFERSIZE]; - memset(buffer,0,BUFFERSIZE); - buffer[BUFFERSIZE-1] = '\n'; - LOG(logINFO, ("Ready...\n")); + case 'e': + printf("Exiting Program\n"); + ret = GOODBYE; + break; + default: + LOG(logERROR, ("Unknown Command. buffer:'%s'\n", buffer)); + break; + } + } - - while(ret != GOODBYE){ - memset(buffer,0,BUFFERSIZE); - n = read(fd,buffer,BUFFERSIZE); - LOG(logDEBUG1, ("Received %d Bytes\n", n)); - LOG(logINFO, ("Got message: '%s'\n",buffer)); - - switch(buffer[0]){ - case '\0': - LOG(logINFO, ("Got Start (Detector restart)\n")); - break; - case 's': - LOG(logINFO, ("Got Start \n")); - break; - case 'p': - if (!sscanf(&buffer[1],"%d",&ival)){ - LOG(logERROR, ("Warning: cannot scan voltage value\n")); - break; - } - // ok/ fail - memset(buffer,0,BUFFERSIZE); - buffer[BUFFERSIZE-1] = '\n'; - if(i2c_write(ival)<0) - strcpy(buffer,"fail "); - else - strcpy(buffer,"success "); - LOG(logINFO, ("Sending: '%s'\n",buffer)); - n = write(fd, buffer, BUFFERSIZE); - LOG(logDEBUG1, ("Sent %d Bytes\n", n)); - break; - - case 'g': - ival = i2c_read(); - //ok/ fail - memset(buffer,0,BUFFERSIZE); - buffer[BUFFERSIZE-1] = '\n'; - if(ival < 0) - strcpy(buffer,"fail "); - else - strcpy(buffer,"success "); - n = write(fd, buffer, BUFFERSIZE); - LOG(logINFO, ("Sending: '%s'\n",buffer)); - LOG(logDEBUG1, ("Sent %d Bytes\n", n)); - //value - memset(buffer,0,BUFFERSIZE); - buffer[BUFFERSIZE-1] = '\n'; - if(ival >= 0){ - LOG(logINFO, ("Sending: '%d'\n",ival)); - sprintf(buffer,"%d ",ival); - n = write(fd, buffer, BUFFERSIZE); - LOG(logINFO, ("Sent %d Bytes\n", n)); - }else LOG(logERROR, ("%s\n",buffer)); - break; - - case 'e': - printf("Exiting Program\n"); - ret = GOODBYE; - break; - default: - LOG(logERROR, ("Unknown Command. buffer:'%s'\n",buffer)); - break; - } - } - - close(fd); - printf("Goodbye Serial Communication for HV(9M)\n"); - return 0; + close(fd); + printf("Goodbye Serial Communication for HV(9M)\n"); + return 0; } diff --git a/slsDetectorServers/eigerDetectorServer/Beb.c b/slsDetectorServers/eigerDetectorServer/Beb.c old mode 100755 new mode 100644 index da6dcac56..0513a3949 --- a/slsDetectorServers/eigerDetectorServer/Beb.c +++ b/slsDetectorServers/eigerDetectorServer/Beb.c @@ -1,32 +1,31 @@ -#include "clogger.h" #include "Beb.h" #include "FebRegisterDefs.h" +#include "clogger.h" #include "xparameters.h" -#include -#include -#include #include +#include +#include +#include #define MAX(x, y) (((x) > (y)) ? (x) : (y)) - struct BebInfo beb_infos[10]; int bebInfoSize = 0; -struct LocalLinkInterface ll_beb_local,* ll_beb; +struct LocalLinkInterface ll_beb_local, *ll_beb; struct udp_header_type udp_header; -int Beb_send_ndata; -unsigned int Beb_send_buffer_size; -unsigned int* Beb_send_data_raw; -unsigned int* Beb_send_data; +int Beb_send_ndata; +unsigned int Beb_send_buffer_size; +unsigned int *Beb_send_data_raw; +unsigned int *Beb_send_data; -int Beb_recv_ndata; -unsigned int Beb_recv_buffer_size; -unsigned int* Beb_recv_data_raw; -unsigned int* Beb_recv_data; +int Beb_recv_ndata; +unsigned int Beb_recv_buffer_size; +unsigned int *Beb_recv_data_raw; +unsigned int *Beb_recv_data; short Beb_bit_mode; int BEB_MMAP_SIZE = 0x1000; @@ -34,1465 +33,1578 @@ int BEB_MMAP_SIZE = 0x1000; int Beb_activated = 1; uint32_t Beb_detid = 0; -int Beb_top =0; +int Beb_top = 0; uint64_t Beb_deactivatedStartFrameNumber = 0; int Beb_quadEnable = 0; int Beb_positions[2] = {0, 0}; int Beb_readNLines = MAX_ROWS_PER_READOUT; - -void BebInfo_BebInfo(struct BebInfo* bebInfo, unsigned int beb_num) { - bebInfo->beb_number=beb_num; - bebInfo->serial_address=0; - strcpy(bebInfo->src_mac_1GbE,""); - strcpy(bebInfo->src_mac_10GbE,""); - strcpy(bebInfo->src_ip_1GbE,""); - strcpy(bebInfo->src_ip_10GbE,""); - bebInfo->src_port_1GbE=bebInfo->src_port_10GbE=0; +void BebInfo_BebInfo(struct BebInfo *bebInfo, unsigned int beb_num) { + bebInfo->beb_number = beb_num; + bebInfo->serial_address = 0; + strcpy(bebInfo->src_mac_1GbE, ""); + strcpy(bebInfo->src_mac_10GbE, ""); + strcpy(bebInfo->src_ip_1GbE, ""); + strcpy(bebInfo->src_ip_10GbE, ""); + bebInfo->src_port_1GbE = bebInfo->src_port_10GbE = 0; } - -int BebInfo_SetSerialAddress(struct BebInfo* bebInfo, unsigned int a) { - //address pre shifted - if (a>0xff) return 0; - bebInfo->serial_address = 0x04000000 | ((a&0xff)<<16); - return 1; +int BebInfo_SetSerialAddress(struct BebInfo *bebInfo, unsigned int a) { + // address pre shifted + if (a > 0xff) + return 0; + bebInfo->serial_address = 0x04000000 | ((a & 0xff) << 16); + return 1; } - -int BebInfo_SetHeaderInfo(struct BebInfo* bebInfo, int ten_gig, char* src_mac, char* src_ip, unsigned int src_port) { - if (ten_gig) { strcpy(bebInfo->src_mac_10GbE,src_mac); strcpy(bebInfo->src_ip_10GbE,src_ip); bebInfo->src_port_10GbE = src_port;} - else { strcpy(bebInfo->src_mac_1GbE,src_mac); strcpy(bebInfo->src_ip_1GbE,src_ip); bebInfo->src_port_1GbE = src_port;} - return 1; +int BebInfo_SetHeaderInfo(struct BebInfo *bebInfo, int ten_gig, char *src_mac, + char *src_ip, unsigned int src_port) { + if (ten_gig) { + strcpy(bebInfo->src_mac_10GbE, src_mac); + strcpy(bebInfo->src_ip_10GbE, src_ip); + bebInfo->src_port_10GbE = src_port; + } else { + strcpy(bebInfo->src_mac_1GbE, src_mac); + strcpy(bebInfo->src_ip_1GbE, src_ip); + bebInfo->src_port_1GbE = src_port; + } + return 1; } - - -unsigned int BebInfo_GetBebNumber(struct BebInfo* bebInfo) {return bebInfo->beb_number;} -unsigned int BebInfo_GetSerialAddress(struct BebInfo* bebInfo) {return bebInfo->serial_address;} -char* BebInfo_GetSrcMAC(struct BebInfo* bebInfo, int ten_gig) {return ten_gig ? bebInfo->src_mac_10GbE : bebInfo->src_mac_1GbE;} -char* BebInfo_GetSrcIP(struct BebInfo* bebInfo, int ten_gig) {return ten_gig ? bebInfo->src_ip_10GbE : bebInfo->src_ip_1GbE;} -unsigned int BebInfo_GetSrcPort(struct BebInfo* bebInfo, int ten_gig) {return ten_gig ? bebInfo->src_port_10GbE : bebInfo->src_port_1GbE;} - - -void BebInfo_Print(struct BebInfo* bebInfo) { - LOG(logINFO, ( - "%d) Beb Info:\n" - "\tSerial Add: 0x%x\n" - "\tMAC 1GbE: %s\n" - "\tIP 1GbE: %s\n" - "\tPort 1GbE: %d\n" - "\tMAC 10GbE: %s\n" - "\tIP 10GbE: %s\n" - "\tPort 10GbE: %d\n", - bebInfo->beb_number, - bebInfo->serial_address, - bebInfo->src_mac_1GbE, - bebInfo->src_ip_1GbE, - bebInfo->src_port_1GbE, - bebInfo->src_mac_10GbE, - bebInfo->src_ip_10GbE, - bebInfo->src_port_10GbE)); +unsigned int BebInfo_GetBebNumber(struct BebInfo *bebInfo) { + return bebInfo->beb_number; +} +unsigned int BebInfo_GetSerialAddress(struct BebInfo *bebInfo) { + return bebInfo->serial_address; +} +char *BebInfo_GetSrcMAC(struct BebInfo *bebInfo, int ten_gig) { + return ten_gig ? bebInfo->src_mac_10GbE : bebInfo->src_mac_1GbE; +} +char *BebInfo_GetSrcIP(struct BebInfo *bebInfo, int ten_gig) { + return ten_gig ? bebInfo->src_ip_10GbE : bebInfo->src_ip_1GbE; +} +unsigned int BebInfo_GetSrcPort(struct BebInfo *bebInfo, int ten_gig) { + return ten_gig ? bebInfo->src_port_10GbE : bebInfo->src_port_1GbE; } +void BebInfo_Print(struct BebInfo *bebInfo) { + LOG(logINFO, + ("%d) Beb Info:\n" + "\tSerial Add: 0x%x\n" + "\tMAC 1GbE: %s\n" + "\tIP 1GbE: %s\n" + "\tPort 1GbE: %d\n" + "\tMAC 10GbE: %s\n" + "\tIP 10GbE: %s\n" + "\tPort 10GbE: %d\n", + bebInfo->beb_number, bebInfo->serial_address, bebInfo->src_mac_1GbE, + bebInfo->src_ip_1GbE, bebInfo->src_port_1GbE, bebInfo->src_mac_10GbE, + bebInfo->src_ip_10GbE, bebInfo->src_port_10GbE)); +} void Beb_Beb(int id) { - Beb_detid = id; - Beb_send_ndata = 0; - Beb_send_buffer_size = 1026; - Beb_send_data_raw = malloc((Beb_send_buffer_size+1) * sizeof(unsigned int)); - Beb_send_data = &Beb_send_data_raw[1]; + Beb_detid = id; + Beb_send_ndata = 0; + Beb_send_buffer_size = 1026; + Beb_send_data_raw = + malloc((Beb_send_buffer_size + 1) * sizeof(unsigned int)); + Beb_send_data = &Beb_send_data_raw[1]; - Beb_recv_ndata = 0; - Beb_recv_buffer_size = 1026; - Beb_recv_data_raw = malloc((Beb_recv_buffer_size+1) * sizeof(unsigned int)); - Beb_recv_data = &Beb_recv_data_raw[1]; + Beb_recv_ndata = 0; + Beb_recv_buffer_size = 1026; + Beb_recv_data_raw = + malloc((Beb_recv_buffer_size + 1) * sizeof(unsigned int)); + Beb_recv_data = &Beb_recv_data_raw[1]; - udp_header= (struct udp_header_type) { - {0x00, 0x50, 0xc5, 0xb2, 0xcb, 0x46}, // DST MAC - {0x00, 0x50, 0xc2, 0x46, 0xd9, 0x02}, // SRC MAC - {0x08, 0x00}, - {0x45}, - {0x00}, - {0x00, 0x00}, - {0x00, 0x00}, - {0x40}, - {0x00}, - {0xff}, - {0x11}, - {0x00, 0x00}, - {129, 205, 205, 128}, // Src IP - {129, 205, 205, 122}, // Dst IP - {0x0f, 0xa1}, - {0x13, 0x89}, - {0x00, 0x00}, //{0x00, 0x11}, - {0x00, 0x00} - }; + udp_header = (struct udp_header_type){ + {0x00, 0x50, 0xc5, 0xb2, 0xcb, 0x46}, // DST MAC + {0x00, 0x50, 0xc2, 0x46, 0xd9, 0x02}, // SRC MAC + {0x08, 0x00}, + {0x45}, + {0x00}, + {0x00, 0x00}, + {0x00, 0x00}, + {0x40}, + {0x00}, + {0xff}, + {0x11}, + {0x00, 0x00}, + {129, 205, 205, 128}, // Src IP + {129, 205, 205, 122}, // Dst IP + {0x0f, 0xa1}, + {0x13, 0x89}, + {0x00, 0x00}, //{0x00, 0x11}, + {0x00, 0x00}}; + if (!Beb_InitBebInfos()) + exit(1); - if (!Beb_InitBebInfos()) exit(1); + LOG(logDEBUG1, ("Printing Beb infos:\n")); + unsigned int i; + for (i = 1; i < bebInfoSize; i++) + BebInfo_Print(&beb_infos[i]); - LOG(logDEBUG1, ("Printing Beb infos:\n")); - unsigned int i; - for(i=1;i 0) - Beb_close(fd,csp0base); + // close file pointer + if (fd > 0) + Beb_close(fd, csp0base); - return ret; + return ret; } /* do not work at the moment */ int Beb_SetSlaveViaSoftware() { - if (!Beb_activated) - return 0; + if (!Beb_activated) + return 0; - //mapping new memory - u_int32_t* csp0base=0; - u_int32_t value = 0, ret = 1; + // mapping new memory + u_int32_t *csp0base = 0; + u_int32_t value = 0, ret = 1; - //open file pointer - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd < 0) { - LOG(logERROR, ("Set Slave FAIL\n")); - } else { - value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET); - value&=~MASTER_BIT; - value|=OVERWRITE_HARDWARE_BIT; - int newval = Beb_Write32(csp0base, MASTERCONFIG_OFFSET,value); - if (newval!=value) { - LOG(logERROR, ("Could not set Slave via Software\n")); - } else { - ret = 0; - } - } + // open file pointer + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd < 0) { + LOG(logERROR, ("Set Slave FAIL\n")); + } else { + value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET); + value &= ~MASTER_BIT; + value |= OVERWRITE_HARDWARE_BIT; + int newval = Beb_Write32(csp0base, MASTERCONFIG_OFFSET, value); + if (newval != value) { + LOG(logERROR, ("Could not set Slave via Software\n")); + } else { + ret = 0; + } + } - //close file pointer - if (fd > 0) - Beb_close(fd,csp0base); + // close file pointer + if (fd > 0) + Beb_close(fd, csp0base); - return ret; + return ret; } int Beb_Activate(int enable) { - //mapping new memory - u_int32_t* csp0base=0; - u_int32_t value = 0, ret = -1; + // mapping new memory + u_int32_t *csp0base = 0; + u_int32_t value = 0, ret = -1; - //open file pointer - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd < 0) { - LOG(logERROR, ("Deactivate FAIL\n")); - } else { - if (enable > -1) { - value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET); - LOG(logINFO, ("Deactivate register value before:%d\n",value)); - if (enable) - value&=~DEACTIVATE_BIT; - else - value|=DEACTIVATE_BIT; + // open file pointer + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd < 0) { + LOG(logERROR, ("Deactivate FAIL\n")); + } else { + if (enable > -1) { + value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET); + LOG(logINFO, ("Deactivate register value before:%d\n", value)); + if (enable) + value &= ~DEACTIVATE_BIT; + else + value |= DEACTIVATE_BIT; - int newval = Beb_Write32(csp0base, MASTERCONFIG_OFFSET,value); - if (newval!=value) { - if (enable) { - LOG(logERROR, ("Could not activate via Software\n")); - } else { - LOG(logERROR, ("Could not deactivate via Software\n")); - } - } - } + int newval = Beb_Write32(csp0base, MASTERCONFIG_OFFSET, value); + if (newval != value) { + if (enable) { + LOG(logERROR, ("Could not activate via Software\n")); + } else { + LOG(logERROR, ("Could not deactivate via Software\n")); + } + } + } - value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET); - if (value&DEACTIVATE_BIT) ret = 0; - else ret = 1; - if (enable == -1) { - if (ret) { - LOG(logINFOBLUE, ("Detector is active. Register value:%d\n", value)); - } else { - LOG(logERROR, ("Detector is deactivated! Register value:%d\n", value)); - } - } + value = Beb_Read32(csp0base, MASTERCONFIG_OFFSET); + if (value & DEACTIVATE_BIT) + ret = 0; + else + ret = 1; + if (enable == -1) { + if (ret) { + LOG(logINFOBLUE, + ("Detector is active. Register value:%d\n", value)); + } else { + LOG(logERROR, + ("Detector is deactivated! Register value:%d\n", value)); + } + } + } + // close file pointer + if (fd > 0) + Beb_close(fd, csp0base); - } - //close file pointer - if (fd > 0) - Beb_close(fd,csp0base); + Beb_activated = ret; - Beb_activated = ret; - - return ret; + return ret; } - -int Beb_GetActivate() { - return Beb_activated; -} +int Beb_GetActivate() { return Beb_activated; } int Beb_Set32bitOverflow(int val) { - if (!Beb_activated) - return val; + if (!Beb_activated) + return val; - //mapping new memory - u_int32_t* csp0base=0; - u_int32_t valueread = 0; - u_int32_t offset = FLOW_REG_OFFSET; - if (val>0) val = 1; + // mapping new memory + u_int32_t *csp0base = 0; + u_int32_t valueread = 0; + u_int32_t offset = FLOW_REG_OFFSET; + if (val > 0) + val = 1; - //open file pointer - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd < 0) { - LOG(logERROR, ("Could not read register to set overflow flag in 32 bit mode. FAIL\n")); - return -1; - } - else { - if (val > -1) { - // reset bit - valueread = Beb_Read32(csp0base, offset); - Beb_Write32(csp0base, offset,valueread & ~FLOW_REG_OVERFLOW_32_BIT_MSK); + // open file pointer + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd < 0) { + LOG(logERROR, ("Could not read register to set overflow flag in 32 bit " + "mode. FAIL\n")); + return -1; + } else { + if (val > -1) { + // reset bit + valueread = Beb_Read32(csp0base, offset); + Beb_Write32(csp0base, offset, + valueread & ~FLOW_REG_OVERFLOW_32_BIT_MSK); - // set bit - valueread = Beb_Read32(csp0base, offset); - Beb_Write32(csp0base, offset,valueread | - ((val << FLOW_REG_OVERFLOW_32_BIT_OFST) & FLOW_REG_OVERFLOW_32_BIT_MSK)); - } + // set bit + valueread = Beb_Read32(csp0base, offset); + Beb_Write32(csp0base, offset, + valueread | ((val << FLOW_REG_OVERFLOW_32_BIT_OFST) & + FLOW_REG_OVERFLOW_32_BIT_MSK)); + } - valueread = (Beb_Read32(csp0base, offset) & FLOW_REG_OVERFLOW_32_BIT_MSK) >> FLOW_REG_OVERFLOW_32_BIT_OFST; - } - //close file pointer - if (fd > 0) - Beb_close(fd,csp0base); + valueread = + (Beb_Read32(csp0base, offset) & FLOW_REG_OVERFLOW_32_BIT_MSK) >> + FLOW_REG_OVERFLOW_32_BIT_OFST; + } + // close file pointer + if (fd > 0) + Beb_close(fd, csp0base); - return valueread; + return valueread; } int Beb_GetTenGigaFlowControl() { - u_int32_t offset = FLOW_REG_OFFSET; - u_int32_t* csp0base = 0; - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd <= 0) { - LOG(logERROR, ("Could not read register to get ten giga flow control. FAIL\n")); - return -1; - } else { - u_int32_t retval = Beb_Read32(csp0base, offset); - retval = (retval & FLOW_REG_TXM_FLOW_CNTRL_10G_MSK) >> FLOW_REG_TXM_FLOW_CNTRL_10G_OFST; + u_int32_t offset = FLOW_REG_OFFSET; + u_int32_t *csp0base = 0; + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd <= 0) { + LOG(logERROR, + ("Could not read register to get ten giga flow control. FAIL\n")); + return -1; + } else { + u_int32_t retval = Beb_Read32(csp0base, offset); + retval = (retval & FLOW_REG_TXM_FLOW_CNTRL_10G_MSK) >> + FLOW_REG_TXM_FLOW_CNTRL_10G_OFST; - Beb_close(fd,csp0base); - return retval; - } + Beb_close(fd, csp0base); + return retval; + } } int Beb_SetTenGigaFlowControl(int value) { - LOG(logINFO, ("Setting ten giga flow control to %d\n", value)); - value = value == 0 ? 0 : 1; - u_int32_t offset = FLOW_REG_OFFSET; - u_int32_t* csp0base = 0; - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd <= 0) { - LOG(logERROR, ("Could not read register to set ten giga flow control. FAIL\n")); - return 0; - } else { - // reset bit - u_int32_t retval = Beb_Read32(csp0base, offset); - Beb_Write32(csp0base, offset,retval & ~FLOW_REG_TXM_FLOW_CNTRL_10G_MSK); + LOG(logINFO, ("Setting ten giga flow control to %d\n", value)); + value = value == 0 ? 0 : 1; + u_int32_t offset = FLOW_REG_OFFSET; + u_int32_t *csp0base = 0; + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd <= 0) { + LOG(logERROR, + ("Could not read register to set ten giga flow control. FAIL\n")); + return 0; + } else { + // reset bit + u_int32_t retval = Beb_Read32(csp0base, offset); + Beb_Write32(csp0base, offset, + retval & ~FLOW_REG_TXM_FLOW_CNTRL_10G_MSK); - // set bit - retval = Beb_Read32(csp0base, offset); - Beb_Write32(csp0base, offset,retval | - ((value << FLOW_REG_TXM_FLOW_CNTRL_10G_OFST) & FLOW_REG_TXM_FLOW_CNTRL_10G_MSK)); + // set bit + retval = Beb_Read32(csp0base, offset); + Beb_Write32(csp0base, offset, + retval | ((value << FLOW_REG_TXM_FLOW_CNTRL_10G_OFST) & + FLOW_REG_TXM_FLOW_CNTRL_10G_MSK)); - Beb_close(fd,csp0base); - return 1; - } + Beb_close(fd, csp0base); + return 1; + } } int Beb_GetTransmissionDelayFrame() { - u_int32_t offset = TXM_DELAY_FRAME_OFFSET; - u_int32_t* csp0base = 0; - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd <= 0) { - LOG(logERROR, ("Could not read register to get transmission delay frame. FAIL\n")); - return -1; - } else { - u_int32_t retval = Beb_Read32(csp0base, offset); - Beb_close(fd,csp0base); - return retval; - } + u_int32_t offset = TXM_DELAY_FRAME_OFFSET; + u_int32_t *csp0base = 0; + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd <= 0) { + LOG(logERROR, ("Could not read register to get transmission delay " + "frame. FAIL\n")); + return -1; + } else { + u_int32_t retval = Beb_Read32(csp0base, offset); + Beb_close(fd, csp0base); + return retval; + } } int Beb_SetTransmissionDelayFrame(int value) { - LOG(logINFO, ("Setting transmission delay frame to %d\n", value)); - if (value < 0) { - LOG(logERROR, ("Invalid transmission delay frame value %d\n", value)); - return 0; - } - u_int32_t offset = TXM_DELAY_FRAME_OFFSET; - u_int32_t* csp0base = 0; - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd <= 0) { - LOG(logERROR, ("Could not read register to set transmission delay frame. FAIL\n")); - return 0; - } else { - Beb_Write32(csp0base, offset, value); - Beb_close(fd,csp0base); - return 1; - } + LOG(logINFO, ("Setting transmission delay frame to %d\n", value)); + if (value < 0) { + LOG(logERROR, ("Invalid transmission delay frame value %d\n", value)); + return 0; + } + u_int32_t offset = TXM_DELAY_FRAME_OFFSET; + u_int32_t *csp0base = 0; + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd <= 0) { + LOG(logERROR, ("Could not read register to set transmission delay " + "frame. FAIL\n")); + return 0; + } else { + Beb_Write32(csp0base, offset, value); + Beb_close(fd, csp0base); + return 1; + } } int Beb_GetTransmissionDelayLeft() { - u_int32_t offset = TXM_DELAY_LEFT_OFFSET; - u_int32_t* csp0base = 0; - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd <= 0) { - LOG(logERROR, ("Could not read register to get transmission delay left. FAIL\n")); - return -1; - } else { - u_int32_t retval = Beb_Read32(csp0base, offset); - Beb_close(fd,csp0base); - return retval; - } + u_int32_t offset = TXM_DELAY_LEFT_OFFSET; + u_int32_t *csp0base = 0; + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd <= 0) { + LOG(logERROR, + ("Could not read register to get transmission delay left. FAIL\n")); + return -1; + } else { + u_int32_t retval = Beb_Read32(csp0base, offset); + Beb_close(fd, csp0base); + return retval; + } } int Beb_SetTransmissionDelayLeft(int value) { - LOG(logINFO, ("Setting transmission delay left to %d\n", value)); - if (value < 0) { - LOG(logERROR, ("Invalid transmission delay left value %d\n", value)); - return 0; - } - u_int32_t offset = TXM_DELAY_LEFT_OFFSET; - u_int32_t* csp0base = 0; - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd <= 0) { - LOG(logERROR, ("Could not read register to set transmission delay left. FAIL\n")); - return 0; - } else { - Beb_Write32(csp0base, offset, value); - Beb_close(fd,csp0base); - return 1; - } + LOG(logINFO, ("Setting transmission delay left to %d\n", value)); + if (value < 0) { + LOG(logERROR, ("Invalid transmission delay left value %d\n", value)); + return 0; + } + u_int32_t offset = TXM_DELAY_LEFT_OFFSET; + u_int32_t *csp0base = 0; + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd <= 0) { + LOG(logERROR, + ("Could not read register to set transmission delay left. FAIL\n")); + return 0; + } else { + Beb_Write32(csp0base, offset, value); + Beb_close(fd, csp0base); + return 1; + } } int Beb_GetTransmissionDelayRight() { - u_int32_t offset = TXM_DELAY_RIGHT_OFFSET; - u_int32_t* csp0base = 0; - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd <= 0) { - LOG(logERROR, ("Could not read register to get transmission delay right. FAIL\n")); - return -1; - } else { - u_int32_t retval = Beb_Read32(csp0base, offset); - Beb_close(fd,csp0base); - return retval; - } + u_int32_t offset = TXM_DELAY_RIGHT_OFFSET; + u_int32_t *csp0base = 0; + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd <= 0) { + LOG(logERROR, ("Could not read register to get transmission delay " + "right. FAIL\n")); + return -1; + } else { + u_int32_t retval = Beb_Read32(csp0base, offset); + Beb_close(fd, csp0base); + return retval; + } } int Beb_SetTransmissionDelayRight(int value) { - LOG(logINFO, ("Setting transmission delay right to %d\n", value)); - if (value < 0) { - LOG(logERROR, ("Invalid transmission delay right value %d\n", value)); - return 0; - } - u_int32_t offset = TXM_DELAY_RIGHT_OFFSET; - u_int32_t* csp0base = 0; - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd <= 0) { - LOG(logERROR, ("Could not read register to set transmission delay right. FAIL\n")); - return 0; - } else { - Beb_Write32(csp0base, offset, value); - Beb_close(fd,csp0base); - return 1; - } + LOG(logINFO, ("Setting transmission delay right to %d\n", value)); + if (value < 0) { + LOG(logERROR, ("Invalid transmission delay right value %d\n", value)); + return 0; + } + u_int32_t offset = TXM_DELAY_RIGHT_OFFSET; + u_int32_t *csp0base = 0; + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd <= 0) { + LOG(logERROR, ("Could not read register to set transmission delay " + "right. FAIL\n")); + return 0; + } else { + Beb_Write32(csp0base, offset, value); + Beb_close(fd, csp0base); + return 1; + } } - int Beb_SetNetworkParameter(enum NETWORKINDEX mode, int val) { - if (!Beb_activated) - return val; + if (!Beb_activated) + return val; + // mapping new memory + u_int32_t *csp0base = 0; + u_int32_t valueread = 0; + u_int32_t offset = TXM_DELAY_LEFT_OFFSET; + char modename[100] = ""; - //mapping new memory - u_int32_t* csp0base=0; - u_int32_t valueread = 0; - u_int32_t offset = TXM_DELAY_LEFT_OFFSET; - char modename[100] = ""; + switch (mode) { + case TXN_LEFT: + offset = TXM_DELAY_LEFT_OFFSET; + strcpy(modename, "Transmission Delay Left"); + break; + case TXN_RIGHT: + offset = TXM_DELAY_RIGHT_OFFSET; + strcpy(modename, "Transmission Delay Right"); + break; - switch(mode) { - case TXN_LEFT: - offset = TXM_DELAY_LEFT_OFFSET; - strcpy(modename,"Transmission Delay Left"); - break; - case TXN_RIGHT: - offset = TXM_DELAY_RIGHT_OFFSET; - strcpy(modename,"Transmission Delay Right"); - break; + default: + LOG(logERROR, ("Unrecognized mode in network parameter: %d\n", mode)); + return -1; + } + // open file pointer + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd < 0) { + LOG(logERROR, + ("Could not read register to set network parameter. FAIL\n")); + return -1; + } else { + if (val > -1) { + valueread = Beb_Read32(csp0base, offset); + Beb_Write32(csp0base, offset, val); + } + valueread = Beb_Read32(csp0base, offset); + } + // close file pointer + if (fd > 0) + Beb_close(fd, csp0base); - default: LOG(logERROR, ("Unrecognized mode in network parameter: %d\n",mode)); return -1; - } - //open file pointer - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd < 0) { - LOG(logERROR, ("Could not read register to set network parameter. FAIL\n")); - return -1; - } else { - if (val > -1) { - valueread = Beb_Read32(csp0base, offset); - Beb_Write32(csp0base, offset,val); - - } - - valueread = Beb_Read32(csp0base, offset); - - - } - //close file pointer - if (fd > 0) - Beb_close(fd,csp0base); - - return valueread; + return valueread; } - int Beb_ResetToHardwareSettings() { - if (!Beb_activated) - return 1; + if (!Beb_activated) + return 1; - //mapping new memory - u_int32_t* csp0base=0; - u_int32_t value = 0, ret = 1; + // mapping new memory + u_int32_t *csp0base = 0; + u_int32_t value = 0, ret = 1; - //open file pointer - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd < 0) { - LOG(logERROR, ("Reset to Hardware Settings FAIL\n")); - } else { - value = Beb_Write32(csp0base, MASTERCONFIG_OFFSET,0); - if (value) { - LOG(logERROR, ("Could not reset to hardware settings\n")); - } else { - ret = 0; - } - } + // open file pointer + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd < 0) { + LOG(logERROR, ("Reset to Hardware Settings FAIL\n")); + } else { + value = Beb_Write32(csp0base, MASTERCONFIG_OFFSET, 0); + if (value) { + LOG(logERROR, ("Could not reset to hardware settings\n")); + } else { + ret = 0; + } + } - //close file pointer - if (fd > 0) - Beb_close(fd,csp0base); + // close file pointer + if (fd > 0) + Beb_close(fd, csp0base); - return ret; + return ret; } - - u_int32_t Beb_GetFirmwareRevision() { - //mapping new memory - u_int32_t* csp0base=0; - u_int32_t value = 0; + // mapping new memory + u_int32_t *csp0base = 0; + u_int32_t value = 0; - //open file pointer - int fd = Beb_open(&csp0base,XPAR_VERSION); - if (fd < 0) { - LOG(logERROR, ("Firmware Revision Read FAIL\n")); - } else { - value = Beb_Read32(csp0base, FIRMWARE_VERSION_OFFSET); - if (!value) { - LOG(logERROR, ("Firmware Revision Number does not exist in this version\n")); - } - } + // open file pointer + int fd = Beb_open(&csp0base, XPAR_VERSION); + if (fd < 0) { + LOG(logERROR, ("Firmware Revision Read FAIL\n")); + } else { + value = Beb_Read32(csp0base, FIRMWARE_VERSION_OFFSET); + if (!value) { + LOG(logERROR, + ("Firmware Revision Number does not exist in this version\n")); + } + } - //close file pointer - if (fd > 0) - Beb_close(fd,csp0base); + // close file pointer + if (fd > 0) + Beb_close(fd, csp0base); - return value; + return value; } - u_int32_t Beb_GetFirmwareSoftwareAPIVersion() { - //mapping new memory - u_int32_t* csp0base=0; - u_int32_t value = 0; + // mapping new memory + u_int32_t *csp0base = 0; + u_int32_t value = 0; - //open file pointer - int fd = Beb_open(&csp0base,XPAR_VERSION); - if (fd < 0) { - LOG(logERROR, ("Firmware Software API Version Read FAIL\n")); - } else { - value = Beb_Read32(csp0base, FIRMWARESOFTWARE_API_OFFSET); - if (!value) { - LOG(logERROR, ("Firmware Software API Version does not exist in this version\n")); - } - } + // open file pointer + int fd = Beb_open(&csp0base, XPAR_VERSION); + if (fd < 0) { + LOG(logERROR, ("Firmware Software API Version Read FAIL\n")); + } else { + value = Beb_Read32(csp0base, FIRMWARESOFTWARE_API_OFFSET); + if (!value) { + LOG(logERROR, ("Firmware Software API Version does not exist in " + "this version\n")); + } + } - //close file pointer - if (fd > 0) - Beb_close(fd,csp0base); + // close file pointer + if (fd > 0) + Beb_close(fd, csp0base); - return value; + return value; } void Beb_ResetFrameNumber() { - if (!Beb_activated) - return; + if (!Beb_activated) + return; - //mapping new memory to read master top module configuration - u_int32_t* csp0base=0; - //open file pointer - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_SYS_BASEADDR); - if (fd < 0) { - LOG(logERROR, ("Reset Frame Number FAIL\n")); - } else { - //write a 1 - Beb_Write32(csp0base, FRAME_NUM_RESET_OFFSET, 1); - usleep(100000); //100ms - //write a 0 - Beb_Write32(csp0base, FRAME_NUM_RESET_OFFSET, 0); - LOG(logINFO, ("Frame Number Reset OK\n")); - //close file pointer - Beb_close(fd,csp0base); - } + // mapping new memory to read master top module configuration + u_int32_t *csp0base = 0; + // open file pointer + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_SYS_BASEADDR); + if (fd < 0) { + LOG(logERROR, ("Reset Frame Number FAIL\n")); + } else { + // write a 1 + Beb_Write32(csp0base, FRAME_NUM_RESET_OFFSET, 1); + usleep(100000); // 100ms + // write a 0 + Beb_Write32(csp0base, FRAME_NUM_RESET_OFFSET, 0); + LOG(logINFO, ("Frame Number Reset OK\n")); + // close file pointer + Beb_close(fd, csp0base); + } } - void Beb_ClearBebInfos() { - //unsigned int i; - //for(i=0;iSetSerialAddress(0); //0xc4000000 +b->SetHeaderInfo(0,"00:50:c2:46:d9:34","129.129.205.78",42000 + 26); // 1 GbE, +ip address can be acquire from the network "arp" +b->SetHeaderInfo(1,"00:50:c2:46:d9:35","10.0.26.1",52000 + 26); //10 GbE, +everything calculable/setable beb_infos.push_back(b); + */ - - /* - //loop through file to fill vector. - BebInfo* b = new BebInfo(26); - b->SetSerialAddress(0); //0xc4000000 - b->SetHeaderInfo(0,"00:50:c2:46:d9:34","129.129.205.78",42000 + 26); // 1 GbE, ip address can be acquire from the network "arp" - b->SetHeaderInfo(1,"00:50:c2:46:d9:35","10.0.26.1",52000 + 26); //10 GbE, everything calculable/setable - beb_infos.push_back(b); - */ - - - return Beb_CheckSourceStuffBebInfo(); + return Beb_CheckSourceStuffBebInfo(); } +int Beb_SetBebSrcHeaderInfos(unsigned int beb_number, int ten_gig, + char *src_mac, char *src_ip, + unsigned int src_port) { + // so that the values can be reset externally for now.... + unsigned int i = 1; /*Beb_GetBebInfoIndex(beb_number);*/ + /******* if (!i) return 0;****************************/ // i must be greater + // than 0, zero is + // the global send + BebInfo_SetHeaderInfo(&beb_infos[i], ten_gig, src_mac, src_ip, src_port); -int Beb_SetBebSrcHeaderInfos(unsigned int beb_number, int ten_gig, char* src_mac, char* src_ip,unsigned int src_port) { - //so that the values can be reset externally for now.... + LOG(logINFO, ("Printing Beb info number (%d) :\n", i)); + BebInfo_Print(&beb_infos[i]); - unsigned int i = 1;/*Beb_GetBebInfoIndex(beb_number);*/ - /******* if (!i) return 0;****************************/ //i must be greater than 0, zero is the global send - BebInfo_SetHeaderInfo(&beb_infos[i],ten_gig,src_mac,src_ip,src_port); - - LOG(logINFO, ("Printing Beb info number (%d) :\n",i)); - BebInfo_Print(&beb_infos[i]); - - return 1; + return 1; } - - - int Beb_CheckSourceStuffBebInfo() { - unsigned int i; - for(i=1;i=bebInfoSize) { - LOG(logERROR, ("WriteTo index error.\n")); - return 0; - } + if (index >= bebInfoSize) { + LOG(logERROR, ("WriteTo index error.\n")); + return 0; + } - Beb_send_data_raw[0] = 0x90000000 | BebInfo_GetSerialAddress(&beb_infos[index]); - if (Local_Write(ll_beb,4,Beb_send_data_raw)!=4) return 0; + Beb_send_data_raw[0] = + 0x90000000 | BebInfo_GetSerialAddress(&beb_infos[index]); + if (Local_Write(ll_beb, 4, Beb_send_data_raw) != 4) + return 0; - Beb_send_data_raw[0] = 0xc0000000; - if ((Beb_send_ndata+1)*4!=Local_Write(ll_beb,(Beb_send_ndata+1)*4,Beb_send_data_raw)) return 0; + Beb_send_data_raw[0] = 0xc0000000; + if ((Beb_send_ndata + 1) * 4 != + Local_Write(ll_beb, (Beb_send_ndata + 1) * 4, Beb_send_data_raw)) + return 0; - return 1; + return 1; } - void Beb_SwapDataFun(int little_endian, unsigned int n, unsigned int *d) { - unsigned int i; - if (little_endian) for(i=0;i>8) | ((d[i]&0xff000000)>>24)); //little_endian - else for(i=0;i>16)); + unsigned int i; + if (little_endian) + for (i = 0; i < n; i++) + d[i] = (((d[i] & 0xff) << 24) | ((d[i] & 0xff00) << 8) | + ((d[i] & 0xff0000) >> 8) | + ((d[i] & 0xff000000) >> 24)); // little_endian + else + for (i = 0; i < n; i++) + d[i] = (((d[i] & 0xffff) << 16) | ((d[i] & 0xffff0000) >> 16)); } +int Beb_SetByteOrder() { return 1; } -int Beb_SetByteOrder() { - return 1; +int Beb_SetUpUDPHeader(unsigned int beb_number, int ten_gig, + unsigned int header_number, char *dst_mac, char *dst_ip, + unsigned int dst_port) { + + if (!Beb_activated) + return 1; + + u_int32_t bram_phy_addr; + u_int32_t *csp0base = 0; + /*u_int32_t* bram_ptr = NULL;*/ + if (ten_gig) + bram_phy_addr = 0xC6002000; + else + bram_phy_addr = 0xC6001000; + + if (!Beb_SetHeaderData(beb_number, ten_gig, dst_mac, dst_ip, dst_port)) + return 0; + + int fd = Beb_open(&csp0base, bram_phy_addr); + if (fd < 0) { + LOG(logERROR, ("Set up UDP Header FAIL\n")); + } else { + // read data + memcpy(csp0base + header_number * 16, &udp_header, sizeof(udp_header)); + // close file pointer + Beb_close(fd, csp0base); + } + return 1; } - -int Beb_SetUpUDPHeader(unsigned int beb_number, int ten_gig, unsigned int header_number, char* dst_mac, char* dst_ip, unsigned int dst_port) { - - if (!Beb_activated) - return 1; - - u_int32_t bram_phy_addr; - u_int32_t* csp0base=0; - /*u_int32_t* bram_ptr = NULL;*/ - if (ten_gig) - bram_phy_addr = 0xC6002000; - else - bram_phy_addr = 0xC6001000; - - if (!Beb_SetHeaderData(beb_number,ten_gig,dst_mac,dst_ip,dst_port)) return 0; - - - - int fd = Beb_open(&csp0base,bram_phy_addr); - if (fd < 0) { - LOG(logERROR, ("Set up UDP Header FAIL\n")); - } else { - //read data - memcpy(csp0base+header_number*16, &udp_header, sizeof(udp_header)); - //close file pointer - Beb_close(fd,csp0base); - } - return 1; +int Beb_SetHeaderData(unsigned int beb_number, int ten_gig, char *dst_mac, + char *dst_ip, unsigned int dst_port) { + unsigned int i = 1; /*Beb_GetBebInfoIndex(beb_number);*/ + /***********************************if (!i) return 0; + * *************************************///i must be greater than 0, zero is the global send + return Beb_SetHeaderData1(BebInfo_GetSrcMAC(&beb_infos[i], ten_gig), + BebInfo_GetSrcIP(&beb_infos[i], ten_gig), + BebInfo_GetSrcPort(&beb_infos[i], ten_gig), + dst_mac, dst_ip, dst_port); } +int Beb_SetHeaderData1(char *src_mac, char *src_ip, unsigned int src_port, + char *dst_mac, char *dst_ip, unsigned int dst_port) { + /* example header*/ + // static unsigned int* word_ptr = new unsigned int [16]; + /*static*/ + /* +udp_header_type udp_header = { + {0x00, 0x50, 0xc5, 0xb2, 0xcb, 0x46}, // DST MAC + {0x00, 0x50, 0xc2, 0x46, 0xd9, 0x02}, // SRC MAC + {0x08, 0x00}, + {0x45}, + {0x00}, + {0x00, 0x00}, + {0x00, 0x00}, + {0x40}, + {0x00}, + {0xff}, + {0x11}, + {0x00, 0x00}, + {129, 205, 205, 128}, // Src IP + {129, 205, 205, 122}, // Dst IP + {0x0f, 0xa1}, + {0x13, 0x89}, + {0x00, 0x00}, //{0x00, 0x11}, + {0x00, 0x00} + }; + */ + if (!Beb_SetMAC(src_mac, &(udp_header.src_mac[0]))) + return 0; + LOG(logINFO, ("Setting Source MAC to %s\n", src_mac)); + if (!Beb_SetIP(src_ip, &(udp_header.src_ip[0]))) + return 0; + LOG(logINFO, ("Setting Source IP to %s\n", src_ip)); + if (!Beb_SetPortNumber(src_port, &(udp_header.src_port[0]))) + return 0; + LOG(logINFO, ("Setting Source port to %d\n", src_port)); -int Beb_SetHeaderData(unsigned int beb_number, int ten_gig, char* dst_mac, char* dst_ip, unsigned int dst_port) { - unsigned int i = 1;/*Beb_GetBebInfoIndex(beb_number);*/ - /***********************************if (!i) return 0; *************************************///i must be greater than 0, zero is the global send - return Beb_SetHeaderData1(BebInfo_GetSrcMAC(&beb_infos[i],ten_gig),BebInfo_GetSrcIP(&beb_infos[i],ten_gig),BebInfo_GetSrcPort(&beb_infos[i],ten_gig),dst_mac,dst_ip,dst_port); + if (!Beb_SetMAC(dst_mac, &(udp_header.dst_mac[0]))) + return 0; + LOG(logINFO, ("Setting Destination MAC to %s\n", dst_mac)); + if (!Beb_SetIP(dst_ip, &(udp_header.dst_ip[0]))) + return 0; + LOG(logINFO, ("Setting Destination IP to %s\n", dst_ip)); + if (!Beb_SetPortNumber(dst_port, &(udp_header.dst_port[0]))) + return 0; + LOG(logINFO, ("Setting Destination port to %d\n", dst_port)); + + Beb_AdjustIPChecksum(&udp_header); + + unsigned int *base_ptr = (unsigned int *)&udp_header; + unsigned int num_words = (sizeof(struct udp_header_type) + 3) / 4; + // for(unsigned int i=0; i %s\n", macVal)); + return 0; + } - if (!Beb_SetMAC(dst_mac,&(udp_header.dst_mac[0]))) return 0; - LOG(logINFO, ("Setting Destination MAC to %s\n",dst_mac)); - if (!Beb_SetIP(dst_ip,&(udp_header.dst_ip[0]))) return 0; - LOG(logINFO, ("Setting Destination IP to %s\n",dst_ip)); - if (!Beb_SetPortNumber(dst_port,&(udp_header.dst_port[0]))) return 0; - LOG(logINFO, ("Setting Destination port to %d\n",dst_port)); - - - Beb_AdjustIPChecksum(&udp_header); - - unsigned int* base_ptr = (unsigned int *) &udp_header; - unsigned int num_words = ( sizeof(struct udp_header_type) + 3 ) / 4; - // for(unsigned int i=0; i 3) || (strlen(pch) < 1))) || + ((i == 3) && ((strlen(pch) < 1) || (strlen(pch) > 3)))) { + LOG(logERROR, ("Error: in ip address -> %s\n", ipVal)); + return 0; + } -int Beb_SetMAC(char* mac, uint8_t* dst_ptr) { - char macVal[50];strcpy(macVal,mac); - - int i = 0; - char *pch = strtok (macVal,":"); - while (pch != NULL) { - if (strlen(pch)!=2) { - LOG(logERROR, ("Error: in mac address -> %s\n",macVal)); - return 0; - } - - int itemp; - sscanf(pch,"%x",&itemp); - dst_ptr[i] = (u_int8_t)itemp; - pch = strtok (NULL, ":"); - i++; - } - return 1; + int itemp; + sscanf(pch, "%d", &itemp); + dst_ptr[i] = (u_int8_t)itemp; + pch = strtok(NULL, "."); + i++; + } + return 1; } -int Beb_SetIP(char* ip, uint8_t* dst_ptr) { - char ipVal[50];strcpy(ipVal,ip); - int i = 0; - char *pch = strtok (ipVal,"."); - while (pch != NULL) { - if (((i!=3) && ((strlen(pch)>3) || (strlen(pch)<1))) || ((i==3)&&((strlen(pch)<1) || (strlen(pch) > 3)))) { - LOG(logERROR, ("Error: in ip address -> %s\n",ipVal)); - return 0; - } - - int itemp; - sscanf(pch,"%d",&itemp); - dst_ptr[i] = (u_int8_t)itemp; - pch = strtok (NULL, "."); - i++; - } - return 1; +int Beb_SetPortNumber(unsigned int port_number, uint8_t *dst_ptr) { + dst_ptr[0] = (port_number >> 8) & 0xff; + dst_ptr[1] = port_number & 0xff; + return 1; } -int Beb_SetPortNumber(unsigned int port_number, uint8_t* dst_ptr) { - dst_ptr[0] = (port_number >> 8) & 0xff ; - dst_ptr[1] = port_number & 0xff; - return 1; -} - - void Beb_AdjustIPChecksum(struct udp_header_type *ip) { - unsigned char *cptr = (unsigned char *) ip->ver_headerlen; + unsigned char *cptr = (unsigned char *)ip->ver_headerlen; - ip->ip_header_checksum[0] = 0; - ip->ip_header_checksum[1] = 0; - ip->total_length[0] = 0; - ip->total_length[1] = 28; // IP + UDP Header Length + ip->ip_header_checksum[0] = 0; + ip->ip_header_checksum[1] = 0; + ip->total_length[0] = 0; + ip->total_length[1] = 28; // IP + UDP Header Length - // calc ip checksum - unsigned int ip_checksum = 0; - unsigned int i; - for(i=0; i<10; i++) { - ip_checksum += ( (cptr[2*i] << 8) + (cptr[2*i + 1]) ); - if (ip_checksum & 0x00010000) ip_checksum = (ip_checksum + 1) & 0x0000ffff; - } + // calc ip checksum + unsigned int ip_checksum = 0; + unsigned int i; + for (i = 0; i < 10; i++) { + ip_checksum += ((cptr[2 * i] << 8) + (cptr[2 * i + 1])); + if (ip_checksum & 0x00010000) + ip_checksum = (ip_checksum + 1) & 0x0000ffff; + } - ip->ip_header_checksum[0] = (ip_checksum >> 8) & 0xff ; - ip->ip_header_checksum[1] = ip_checksum & 0xff ; + ip->ip_header_checksum[0] = (ip_checksum >> 8) & 0xff; + ip->ip_header_checksum[1] = ip_checksum & 0xff; } +int Beb_SendMultiReadRequest(unsigned int beb_number, unsigned int left_right, + int ten_gig, unsigned int dst_number, + unsigned int npackets, unsigned int packet_size, + int stop_read_when_fifo_empty) { + // This is a dead function, will be removed in future + // ================================================== -int Beb_SendMultiReadRequest(unsigned int beb_number, unsigned int left_right, int ten_gig, unsigned int dst_number, unsigned int npackets, unsigned int packet_size, int stop_read_when_fifo_empty) { + unsigned int i = + 1; /*Beb_GetBebInfoIndex(beb_number); //zero is the global send*/ - // This is a dead function, will be removed in future - // ================================================== + Beb_send_ndata = 3; + if (left_right == 1) + Beb_send_data[0] = 0x00040000; + else if (left_right == 2) + Beb_send_data[0] = 0x00080000; + else if (left_right == 3) + Beb_send_data[0] = 0x000c0000; + else + return 0; - unsigned int i = 1;/*Beb_GetBebInfoIndex(beb_number); //zero is the global send*/ + // packet_size/=2; + if (dst_number > 0x3f) + return 0; + if (packet_size > 0x3ff) + return 0; + if (npackets == 0 || npackets > 0x100) + return 0; + npackets--; - Beb_send_ndata = 3; - if (left_right == 1) Beb_send_data[0] = 0x00040000; - else if (left_right == 2) Beb_send_data[0] = 0x00080000; - else if (left_right == 3) Beb_send_data[0] = 0x000c0000; - else return 0; + Beb_send_data[1] = 0x62000000 | (!stop_read_when_fifo_empty) << 27 | + (ten_gig == 1) << 24 | packet_size << 14 | + dst_number << 8 | npackets; + LOG(logDEBUG1, ("Beb_send_data[1]:%X\n", Beb_send_data[1])); + Beb_send_data[2] = 0; - //packet_size/=2; - if (dst_number>0x3f) return 0; - if (packet_size>0x3ff) return 0; - if (npackets==0||npackets>0x100) return 0; - npackets--; + Beb_SwapDataFun(0, 2, &(Beb_send_data[1])); + LOG(logDEBUG1, ("Beb_send_data[1] Swapped:%X\n", Beb_send_data[1])); + if (Beb_activated) { + if (!Beb_WriteTo(i)) + return 0; + } - Beb_send_data[1] = 0x62000000 | (!stop_read_when_fifo_empty) << 27 | (ten_gig==1) << 24 | packet_size << 14 | dst_number << 8 | npackets; - LOG(logDEBUG1, ("Beb_send_data[1]:%X\n",Beb_send_data[1])); - Beb_send_data[2] = 0; - - Beb_SwapDataFun(0,2,&(Beb_send_data[1])); - LOG(logDEBUG1, ("Beb_send_data[1] Swapped:%X\n",Beb_send_data[1])); - - if (Beb_activated) { - if (!Beb_WriteTo(i)) return 0; - } - - return 1; + return 1; } - int Beb_SetUpTransferParameters(short the_bit_mode) { - if (the_bit_mode!=4&&the_bit_mode!=8&&the_bit_mode!=16&&the_bit_mode!=32) return 0; - Beb_bit_mode = the_bit_mode; + if (the_bit_mode != 4 && the_bit_mode != 8 && the_bit_mode != 16 && + the_bit_mode != 32) + return 0; + Beb_bit_mode = the_bit_mode; - //nimages = the_number_of_images; - // on_dst = 0; + // nimages = the_number_of_images; + // on_dst = 0; - return 1; + return 1; } +int Beb_StopAcquisition() { + if (!Beb_activated) + return 1; -int Beb_StopAcquisition() -{ - if (!Beb_activated) - return 1; + u_int32_t *csp0base = 0; + volatile u_int32_t valuel, valuer; + // open file pointer + int fd = Beb_open(&csp0base, XPAR_CMD_GENERATOR); + if (fd < 0) { + LOG(logERROR, ("Beb Stop Acquisition FAIL\n")); + return 0; + } else { + // find value + valuel = Beb_Read32(csp0base, (LEFT_OFFSET + STOP_ACQ_OFFSET)); + valuer = Beb_Read32(csp0base, (RIGHT_OFFSET + STOP_ACQ_OFFSET)); + // high + Beb_Write32(csp0base, (LEFT_OFFSET + STOP_ACQ_OFFSET), + (valuel | STOP_ACQ_BIT)); + Beb_Write32(csp0base, (RIGHT_OFFSET + STOP_ACQ_OFFSET), + (valuer | STOP_ACQ_BIT)); + // low + Beb_Write32(csp0base, (LEFT_OFFSET + STOP_ACQ_OFFSET), + (valuel & (~STOP_ACQ_BIT))); + Beb_Write32(csp0base, (RIGHT_OFFSET + STOP_ACQ_OFFSET), + (valuer & (~STOP_ACQ_BIT))); - u_int32_t* csp0base=0; - volatile u_int32_t valuel,valuer; - //open file pointer - int fd = Beb_open(&csp0base,XPAR_CMD_GENERATOR); - if (fd < 0) { - LOG(logERROR, ("Beb Stop Acquisition FAIL\n")); - return 0; - } else { - //find value - valuel = Beb_Read32(csp0base, (LEFT_OFFSET+STOP_ACQ_OFFSET)); - valuer = Beb_Read32(csp0base, (RIGHT_OFFSET+STOP_ACQ_OFFSET)); - //high - Beb_Write32(csp0base, (LEFT_OFFSET + STOP_ACQ_OFFSET),(valuel|STOP_ACQ_BIT)); - Beb_Write32(csp0base, (RIGHT_OFFSET + STOP_ACQ_OFFSET),(valuer|STOP_ACQ_BIT)); - //low - Beb_Write32(csp0base, (LEFT_OFFSET + STOP_ACQ_OFFSET),(valuel&(~STOP_ACQ_BIT))); - Beb_Write32(csp0base, (RIGHT_OFFSET + STOP_ACQ_OFFSET),(valuer&(~STOP_ACQ_BIT))); - - LOG(logINFO, ("Beb Stop Acquisition OK\n")); - //close file pointer - Beb_close(fd,csp0base); - } - return 1; + LOG(logINFO, ("Beb Stop Acquisition OK\n")); + // close file pointer + Beb_close(fd, csp0base); + } + return 1; } -int Beb_RequestNImages(unsigned int beb_number, int ten_gig, unsigned int dst_number, unsigned int nimages, int test_just_send_out_packets_no_wait) { - if (!Beb_activated) - return 1; +int Beb_RequestNImages(unsigned int beb_number, int ten_gig, + unsigned int dst_number, unsigned int nimages, + int test_just_send_out_packets_no_wait) { + if (!Beb_activated) + return 1; - if (dst_number>64) return 0; + if (dst_number > 64) + return 0; - unsigned int maxnl = MAX_ROWS_PER_READOUT; - unsigned int maxnp = (ten_gig ? 4 : 16) * Beb_bit_mode; - unsigned int nl = Beb_readNLines; - unsigned int npackets = (nl * maxnp) / maxnl; - if ((nl * maxnp) % maxnl) { - LOG(logERROR, ("Read N Lines is incorrect. Switching to Full Image Readout\n")); - npackets = maxnp; - } - int in_two_requests = (npackets > MAX_PACKETS_PER_REQUEST) ? 1 : 0; - if (in_two_requests) { - npackets /= 2; - } - unsigned int header_size = 4; //4*64 bits - unsigned int packet_size = ten_gig ? 0x200 : 0x80; // 4k or 1k packets + unsigned int maxnl = MAX_ROWS_PER_READOUT; + unsigned int maxnp = (ten_gig ? 4 : 16) * Beb_bit_mode; + unsigned int nl = Beb_readNLines; + unsigned int npackets = (nl * maxnp) / maxnl; + if ((nl * maxnp) % maxnl) { + LOG(logERROR, + ("Read N Lines is incorrect. Switching to Full Image Readout\n")); + npackets = maxnp; + } + int in_two_requests = (npackets > MAX_PACKETS_PER_REQUEST) ? 1 : 0; + if (in_two_requests) { + npackets /= 2; + } + unsigned int header_size = 4; // 4*64 bits + unsigned int packet_size = ten_gig ? 0x200 : 0x80; // 4k or 1k packets - LOG(logDEBUG1, ("----Beb_RequestNImages Start----\n")); - LOG(logINFO, ("beb_number:%d, ten_gig:%d,dst_number:%d, npackets:%d, " - "Beb_bit_mode:%d, header_size:%d, nimages:%d, test_just_send_out_packets_no_wait:%d\n", - beb_number, ten_gig, dst_number, npackets, Beb_bit_mode, header_size, - nimages, test_just_send_out_packets_no_wait)); + LOG(logDEBUG1, ("----Beb_RequestNImages Start----\n")); + LOG(logINFO, ("beb_number:%d, ten_gig:%d,dst_number:%d, npackets:%d, " + "Beb_bit_mode:%d, header_size:%d, nimages:%d, " + "test_just_send_out_packets_no_wait:%d\n", + beb_number, ten_gig, dst_number, npackets, Beb_bit_mode, + header_size, nimages, test_just_send_out_packets_no_wait)); - u_int32_t right_port_value = 0x2000; - u_int32_t* csp0base=0; - volatile u_int32_t value; - //open file pointer - int fd = Beb_open(&csp0base,XPAR_CMD_GENERATOR); - if (fd < 0) { - LOG(logERROR, ("Beb Request N Images FAIL\n")); - return 0; - } else { - { - int i; - for (i=0; i < 10; i++) - LOG(logDEBUG1, ("%X\n",Beb_Read32(csp0base, (LEFT_OFFSET + i*4)))); - } - // Generating commands - u_int32_t send_header_command = 0x62000000 | (!test_just_send_out_packets_no_wait) << 27 | (ten_gig==1) << 24 | header_size << 14 | 0; - u_int32_t send_frame_command = 0x62000000 | (!test_just_send_out_packets_no_wait) << 27 | (ten_gig==1) << 24 | packet_size << 14 | (npackets-1); - { - int i; - for (i=0; i < 10; i++) - LOG(logDEBUG1, ("%X\n",Beb_Read32(csp0base, (LEFT_OFFSET + i*4)))); - LOG(logDEBUG1, ("%d\n",in_two_requests)); - } - //"0x20 << 8" is dst_number (0x00 for left, 0x20 for right) - //Left - Beb_Write32(csp0base, (LEFT_OFFSET + FIRST_CMD_PART1_OFFSET),0); - Beb_Write32(csp0base, (LEFT_OFFSET + FIRST_CMD_PART2_OFFSET),send_header_command); - Beb_Write32(csp0base, (LEFT_OFFSET + SECOND_CMD_PART1_OFFSET),0); - Beb_Write32(csp0base, (LEFT_OFFSET + SECOND_CMD_PART2_OFFSET),send_frame_command); - value = Beb_Read32(csp0base,(LEFT_OFFSET + TWO_REQUESTS_OFFSET)); - if (in_two_requests) Beb_Write32(csp0base, (LEFT_OFFSET + TWO_REQUESTS_OFFSET),(value | TWO_REQUESTS_BIT)); - else Beb_Write32(csp0base, (LEFT_OFFSET + TWO_REQUESTS_OFFSET),(value &~(TWO_REQUESTS_BIT))); + u_int32_t right_port_value = 0x2000; + u_int32_t *csp0base = 0; + volatile u_int32_t value; + // open file pointer + int fd = Beb_open(&csp0base, XPAR_CMD_GENERATOR); + if (fd < 0) { + LOG(logERROR, ("Beb Request N Images FAIL\n")); + return 0; + } else { + { + int i; + for (i = 0; i < 10; i++) + LOG(logDEBUG1, + ("%X\n", Beb_Read32(csp0base, (LEFT_OFFSET + i * 4)))); + } + // Generating commands + u_int32_t send_header_command = + 0x62000000 | (!test_just_send_out_packets_no_wait) << 27 | + (ten_gig == 1) << 24 | header_size << 14 | 0; + u_int32_t send_frame_command = + 0x62000000 | (!test_just_send_out_packets_no_wait) << 27 | + (ten_gig == 1) << 24 | packet_size << 14 | (npackets - 1); + { + int i; + for (i = 0; i < 10; i++) + LOG(logDEBUG1, + ("%X\n", Beb_Read32(csp0base, (LEFT_OFFSET + i * 4)))); + LOG(logDEBUG1, ("%d\n", in_two_requests)); + } + //"0x20 << 8" is dst_number (0x00 for left, 0x20 for right) + // Left + Beb_Write32(csp0base, (LEFT_OFFSET + FIRST_CMD_PART1_OFFSET), 0); + Beb_Write32(csp0base, (LEFT_OFFSET + FIRST_CMD_PART2_OFFSET), + send_header_command); + Beb_Write32(csp0base, (LEFT_OFFSET + SECOND_CMD_PART1_OFFSET), 0); + Beb_Write32(csp0base, (LEFT_OFFSET + SECOND_CMD_PART2_OFFSET), + send_frame_command); + value = Beb_Read32(csp0base, (LEFT_OFFSET + TWO_REQUESTS_OFFSET)); + if (in_two_requests) + Beb_Write32(csp0base, (LEFT_OFFSET + TWO_REQUESTS_OFFSET), + (value | TWO_REQUESTS_BIT)); + else + Beb_Write32(csp0base, (LEFT_OFFSET + TWO_REQUESTS_OFFSET), + (value & ~(TWO_REQUESTS_BIT))); - // Right - Beb_Write32(csp0base, (RIGHT_OFFSET + FIRST_CMD_PART1_OFFSET),0); - Beb_Write32(csp0base, (RIGHT_OFFSET + FIRST_CMD_PART2_OFFSET),send_header_command | right_port_value); - Beb_Write32(csp0base, (RIGHT_OFFSET + SECOND_CMD_PART1_OFFSET),0); - Beb_Write32(csp0base, (RIGHT_OFFSET + SECOND_CMD_PART2_OFFSET),send_frame_command | right_port_value); - value = Beb_Read32(csp0base,(RIGHT_OFFSET + TWO_REQUESTS_OFFSET)); - if (in_two_requests) Beb_Write32(csp0base, (RIGHT_OFFSET + TWO_REQUESTS_OFFSET),(value | TWO_REQUESTS_BIT)); - else Beb_Write32(csp0base, (RIGHT_OFFSET + TWO_REQUESTS_OFFSET),(value &~(TWO_REQUESTS_BIT))); + // Right + Beb_Write32(csp0base, (RIGHT_OFFSET + FIRST_CMD_PART1_OFFSET), 0); + Beb_Write32(csp0base, (RIGHT_OFFSET + FIRST_CMD_PART2_OFFSET), + send_header_command | right_port_value); + Beb_Write32(csp0base, (RIGHT_OFFSET + SECOND_CMD_PART1_OFFSET), 0); + Beb_Write32(csp0base, (RIGHT_OFFSET + SECOND_CMD_PART2_OFFSET), + send_frame_command | right_port_value); + value = Beb_Read32(csp0base, (RIGHT_OFFSET + TWO_REQUESTS_OFFSET)); + if (in_two_requests) + Beb_Write32(csp0base, (RIGHT_OFFSET + TWO_REQUESTS_OFFSET), + (value | TWO_REQUESTS_BIT)); + else + Beb_Write32(csp0base, (RIGHT_OFFSET + TWO_REQUESTS_OFFSET), + (value & ~(TWO_REQUESTS_BIT))); + // Set number of frames + Beb_Write32(csp0base, (LEFT_OFFSET + COMMAND_COUNTER_OFFSET), + nimages * (2 + in_two_requests)); + Beb_Write32(csp0base, (RIGHT_OFFSET + COMMAND_COUNTER_OFFSET), + nimages * (2 + in_two_requests)); + { + int i; + for (i = 0; i < 10; i++) + LOG(logDEBUG1, + ("%X\n", Beb_Read32(csp0base, + (LEFT_OFFSET + i * 4)))); //*(ptrl+i)); + LOG(logDEBUG1, ("%d\n", in_two_requests)); + } + Beb_close(fd, csp0base); - // Set number of frames - Beb_Write32(csp0base, (LEFT_OFFSET + COMMAND_COUNTER_OFFSET), nimages*(2+in_two_requests)); - Beb_Write32(csp0base, (RIGHT_OFFSET + COMMAND_COUNTER_OFFSET), nimages*(2+in_two_requests)); - { - int i; - for (i=0; i < 10; i++) - LOG(logDEBUG1, ("%X\n",Beb_Read32(csp0base, (LEFT_OFFSET + i*4)))); //*(ptrl+i)); - LOG(logDEBUG1, ("%d\n",in_two_requests)); - } - Beb_close(fd,csp0base); + LOG(logDEBUG1, ("----Beb_RequestNImages----\n")); + } - LOG(logDEBUG1, ("----Beb_RequestNImages----\n")); - } - - return 1; + return 1; } - int Beb_Test(unsigned int beb_number) { - LOG(logINFO, ("Testing module number: %d\n",beb_number)); + LOG(logINFO, ("Testing module number: %d\n", beb_number)); + // int SetUpUDPHeader(unsigned int beb_number, int ten_gig, unsigned int + // header_number, string dst_mac, string dst_ip, unsigned int dst_port) { + // SetUpUDPHeader(26,0,0,"60:fb:42:f4:e3:d2","129.129.205.186",22000); - //int SetUpUDPHeader(unsigned int beb_number, int ten_gig, unsigned int header_number, string dst_mac, string dst_ip, unsigned int dst_port) { - //SetUpUDPHeader(26,0,0,"60:fb:42:f4:e3:d2","129.129.205.186",22000); + unsigned int index = Beb_GetBebInfoIndex(beb_number); + if (!index) { + LOG(logERROR, ("Error beb number (%d)not in list????\n", beb_number)); + return 0; + } - unsigned int index = Beb_GetBebInfoIndex(beb_number); - if (!index) { - LOG(logERROR, ("Error beb number (%d)not in list????\n",beb_number)); - return 0; - } + unsigned int i; + for (i = 0; i < 64; i++) { + if (!Beb_SetUpUDPHeader(beb_number, 0, i, "60:fb:42:f4:e3:d2", + "129.129.205.186", 22000 + i)) { + LOG(logERROR, ("Error setting up header table....\n")); + return 0; + } + } - unsigned int i; - for(i=0;i<64;i++) { - if (!Beb_SetUpUDPHeader(beb_number,0,i,"60:fb:42:f4:e3:d2","129.129.205.186",22000+i)) { - LOG(logERROR, ("Error setting up header table....\n")); - return 0; - } - } + // SendMultiReadRequest(unsigned int beb_number, unsigned int left_right, + // int ten_gig, unsigned int dst_number, unsigned int npackets, unsigned + // int packet_size, int stop_read_when_fifo_empty=1); + for (i = 0; i < 64; i++) { + if (!Beb_SendMultiReadRequest(beb_number, i % 3 + 1, 0, i, 1, 0, 1)) { + LOG(logERROR, ("Error requesting data....\n")); + return 0; + } + } - // SendMultiReadRequest(unsigned int beb_number, unsigned int left_right, int ten_gig, unsigned int dst_number, unsigned int npackets, unsigned int packet_size, int stop_read_when_fifo_empty=1); - for(i=0;i<64;i++) { - if (!Beb_SendMultiReadRequest(beb_number,i%3+1,0,i,1,0,1)) { - LOG(logERROR, ("Error requesting data....\n")); - return 0; - } - } - - - return 1; + return 1; } // Returns the FPGA temperature from the xps sysmon ip core // Temperature value is cropped and not well rounded -int Beb_GetBebFPGATemp() -{ +int Beb_GetBebFPGATemp() { - u_int32_t* csp0base=0; - int temperature=0; - int ret; - //open file pointer - int fd = Beb_open(&csp0base,XPAR_SYSMON_0_BASEADDR); - if (fd < 0) { - LOG(logERROR, ("Module Configuration FAIL\n")); - } else { - //read data - ret = Beb_Read32(csp0base, FPGA_TEMP_OFFSET); - temperature = ((((float)(ret)/65536.0f)/0.00198421639f ) - 273.15f)*1000; // Static conversation, copied from xps sysmon standalone driver - //close file pointer - Beb_close(fd,csp0base); - } + u_int32_t *csp0base = 0; + int temperature = 0; + int ret; + // open file pointer + int fd = Beb_open(&csp0base, XPAR_SYSMON_0_BASEADDR); + if (fd < 0) { + LOG(logERROR, ("Module Configuration FAIL\n")); + } else { + // read data + ret = Beb_Read32(csp0base, FPGA_TEMP_OFFSET); + temperature = ((((float)(ret) / 65536.0f) / 0.00198421639f) - 273.15f) * + 1000; // Static conversation, copied from xps sysmon + // standalone driver + // close file pointer + Beb_close(fd, csp0base); + } - return temperature; + return temperature; } - void Beb_SetDetectorNumber(uint32_t detid) { - if (!Beb_activated) - return; + if (!Beb_activated) + return; - uint32_t swapid = Beb_swap_uint16(detid); - //LOG(logINFO, "detector id %d swapped %d\n", detid, swapid)); - u_int32_t* csp0base=0; - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_TEST_BASEADDR); - if (fd < 0) { - LOG(logERROR, ("Set Detector ID FAIL\n")); - return; - } else { - uint32_t value = Beb_Read32(csp0base, UDP_HEADER_A_LEFT_OFST); - value &= UDP_HEADER_X_MSK; // to keep previous x value - Beb_Write32(csp0base, UDP_HEADER_A_LEFT_OFST, value | ((swapid << UDP_HEADER_ID_OFST) & UDP_HEADER_ID_MSK)); - value = Beb_Read32(csp0base, UDP_HEADER_A_LEFT_OFST); - if ((value & UDP_HEADER_ID_MSK) != ((swapid << UDP_HEADER_ID_OFST) & UDP_HEADER_ID_MSK)) { - LOG(logERROR, ("Set Detector ID FAIL\n")); - } - value = Beb_Read32(csp0base, UDP_HEADER_A_RIGHT_OFST); - value &= UDP_HEADER_X_MSK; // to keep previous x value - Beb_Write32(csp0base, UDP_HEADER_A_RIGHT_OFST, value | ((swapid << UDP_HEADER_ID_OFST) & UDP_HEADER_ID_MSK)); - value = Beb_Read32(csp0base, UDP_HEADER_A_RIGHT_OFST); - if ((value & UDP_HEADER_ID_MSK) != ((swapid << UDP_HEADER_ID_OFST) & UDP_HEADER_ID_MSK)) { - LOG(logERROR, ("Set Detector ID FAIL\n")); - } - Beb_close(fd,csp0base); - } - LOG(logINFO, ("Detector id %d set in UDP Header\n\n", detid)); + uint32_t swapid = Beb_swap_uint16(detid); + // LOG(logINFO, "detector id %d swapped %d\n", detid, swapid)); + u_int32_t *csp0base = 0; + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_TEST_BASEADDR); + if (fd < 0) { + LOG(logERROR, ("Set Detector ID FAIL\n")); + return; + } else { + uint32_t value = Beb_Read32(csp0base, UDP_HEADER_A_LEFT_OFST); + value &= UDP_HEADER_X_MSK; // to keep previous x value + Beb_Write32(csp0base, UDP_HEADER_A_LEFT_OFST, + value | + ((swapid << UDP_HEADER_ID_OFST) & UDP_HEADER_ID_MSK)); + value = Beb_Read32(csp0base, UDP_HEADER_A_LEFT_OFST); + if ((value & UDP_HEADER_ID_MSK) != + ((swapid << UDP_HEADER_ID_OFST) & UDP_HEADER_ID_MSK)) { + LOG(logERROR, ("Set Detector ID FAIL\n")); + } + value = Beb_Read32(csp0base, UDP_HEADER_A_RIGHT_OFST); + value &= UDP_HEADER_X_MSK; // to keep previous x value + Beb_Write32(csp0base, UDP_HEADER_A_RIGHT_OFST, + value | + ((swapid << UDP_HEADER_ID_OFST) & UDP_HEADER_ID_MSK)); + value = Beb_Read32(csp0base, UDP_HEADER_A_RIGHT_OFST); + if ((value & UDP_HEADER_ID_MSK) != + ((swapid << UDP_HEADER_ID_OFST) & UDP_HEADER_ID_MSK)) { + LOG(logERROR, ("Set Detector ID FAIL\n")); + } + Beb_close(fd, csp0base); + } + LOG(logINFO, ("Detector id %d set in UDP Header\n\n", detid)); } int Beb_SetQuad(int value) { - if (value < 0) - return OK; - LOG(logINFO, ("Setting Quad to %d in Beb\n", value)); - Beb_quadEnable = (value == 0 ? 0 : 1); - return Beb_SetDetectorPosition(Beb_positions); + if (value < 0) + return OK; + LOG(logINFO, ("Setting Quad to %d in Beb\n", value)); + Beb_quadEnable = (value == 0 ? 0 : 1); + return Beb_SetDetectorPosition(Beb_positions); } -int Beb_GetQuad() { - return Beb_quadEnable; -} +int Beb_GetQuad() { return Beb_quadEnable; } -int* Beb_GetDetectorPosition() { - return Beb_positions; -} +int *Beb_GetDetectorPosition() { return Beb_positions; } int Beb_SetDetectorPosition(int pos[]) { - if (!Beb_activated) - return OK; - LOG(logINFO, ("Got Position values %d %d...\n", pos[0],pos[1])); + if (!Beb_activated) + return OK; + LOG(logINFO, ("Got Position values %d %d...\n", pos[0], pos[1])); - // save positions - Beb_positions[0] = pos[0]; - Beb_positions[1] = pos[1]; + // save positions + Beb_positions[0] = pos[0]; + Beb_positions[1] = pos[1]; - // get left and right - int posLeft[2] = {pos[0], Beb_top ? pos[1] : pos[1] + 1}; - int posRight[2] = {pos[0], Beb_top ? pos[1] + 1 : pos[1]}; + // get left and right + int posLeft[2] = {pos[0], Beb_top ? pos[1] : pos[1] + 1}; + int posRight[2] = {pos[0], Beb_top ? pos[1] + 1 : pos[1]}; - if (Beb_quadEnable) { - posRight[0] = 1; // right is next row - posRight[1] = 0; // right same first column - } + if (Beb_quadEnable) { + posRight[0] = 1; // right is next row + posRight[1] = 0; // right same first column + } - int ret = FAIL; - //mapping new memory to read master top module configuration - u_int32_t* csp0base=0; - //open file pointer - int fd = Beb_open(&csp0base,XPAR_PLB_GPIO_TEST_BASEADDR); - if (fd < 0) { - LOG(logERROR, ("Set Detector Position FAIL\n")); - return FAIL; - } else { - uint32_t value = 0; - ret = OK; - // x left - int posval = Beb_swap_uint16(posLeft[0]); - value = Beb_Read32(csp0base, UDP_HEADER_A_LEFT_OFST); - value &= UDP_HEADER_ID_MSK; // to keep previous id value - Beb_Write32(csp0base, UDP_HEADER_A_LEFT_OFST, value | ((posval << UDP_HEADER_X_OFST) & UDP_HEADER_X_MSK)); - value = Beb_Read32(csp0base, UDP_HEADER_A_LEFT_OFST); - if ((value & UDP_HEADER_X_MSK) != ((posval << UDP_HEADER_X_OFST) & UDP_HEADER_X_MSK)) { - LOG(logERROR, ("Could not set row position for left port\n")); - ret = FAIL; - } - // x right - posval = Beb_swap_uint16(posRight[0]); - value = Beb_Read32(csp0base, UDP_HEADER_A_RIGHT_OFST); - value &= UDP_HEADER_ID_MSK; // to keep previous id value - Beb_Write32(csp0base, UDP_HEADER_A_RIGHT_OFST, value | ((posval << UDP_HEADER_X_OFST) & UDP_HEADER_X_MSK)); - value = Beb_Read32(csp0base, UDP_HEADER_A_RIGHT_OFST); - if ((value & UDP_HEADER_X_MSK) != ((posval << UDP_HEADER_X_OFST) & UDP_HEADER_X_MSK)) { - LOG(logERROR, ("Could not set row position for right port\n")); - ret = FAIL; - } + int ret = FAIL; + // mapping new memory to read master top module configuration + u_int32_t *csp0base = 0; + // open file pointer + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_TEST_BASEADDR); + if (fd < 0) { + LOG(logERROR, ("Set Detector Position FAIL\n")); + return FAIL; + } else { + uint32_t value = 0; + ret = OK; + // x left + int posval = Beb_swap_uint16(posLeft[0]); + value = Beb_Read32(csp0base, UDP_HEADER_A_LEFT_OFST); + value &= UDP_HEADER_ID_MSK; // to keep previous id value + Beb_Write32(csp0base, UDP_HEADER_A_LEFT_OFST, + value | ((posval << UDP_HEADER_X_OFST) & UDP_HEADER_X_MSK)); + value = Beb_Read32(csp0base, UDP_HEADER_A_LEFT_OFST); + if ((value & UDP_HEADER_X_MSK) != + ((posval << UDP_HEADER_X_OFST) & UDP_HEADER_X_MSK)) { + LOG(logERROR, ("Could not set row position for left port\n")); + ret = FAIL; + } + // x right + posval = Beb_swap_uint16(posRight[0]); + value = Beb_Read32(csp0base, UDP_HEADER_A_RIGHT_OFST); + value &= UDP_HEADER_ID_MSK; // to keep previous id value + Beb_Write32(csp0base, UDP_HEADER_A_RIGHT_OFST, + value | ((posval << UDP_HEADER_X_OFST) & UDP_HEADER_X_MSK)); + value = Beb_Read32(csp0base, UDP_HEADER_A_RIGHT_OFST); + if ((value & UDP_HEADER_X_MSK) != + ((posval << UDP_HEADER_X_OFST) & UDP_HEADER_X_MSK)) { + LOG(logERROR, ("Could not set row position for right port\n")); + ret = FAIL; + } + // y left (column) + posval = Beb_swap_uint16(posLeft[1]); + value = Beb_Read32(csp0base, UDP_HEADER_B_LEFT_OFST); + value &= UDP_HEADER_Z_MSK; // to keep previous z value + Beb_Write32(csp0base, UDP_HEADER_B_LEFT_OFST, + value | ((posval << UDP_HEADER_Y_OFST) & UDP_HEADER_Y_MSK)); + value = Beb_Read32(csp0base, UDP_HEADER_B_LEFT_OFST); + if ((value & UDP_HEADER_Y_MSK) != + ((posval << UDP_HEADER_Y_OFST) & UDP_HEADER_Y_MSK)) { + LOG(logERROR, ("Could not set column position for left port\n")); + ret = FAIL; + } + // y right + posval = Beb_swap_uint16(posRight[1]); + value = Beb_Read32(csp0base, UDP_HEADER_B_RIGHT_OFST); + value &= UDP_HEADER_Z_MSK; // to keep previous z value + Beb_Write32(csp0base, UDP_HEADER_B_RIGHT_OFST, + value | ((posval << UDP_HEADER_Y_OFST) & UDP_HEADER_Y_MSK)); + value = Beb_Read32(csp0base, UDP_HEADER_B_RIGHT_OFST); + if ((value & UDP_HEADER_Y_MSK) != + ((posval << UDP_HEADER_Y_OFST) & UDP_HEADER_Y_MSK)) { + LOG(logERROR, ("Could not set column position for right port\n")); + ret = FAIL; + } - // y left (column) - posval = Beb_swap_uint16(posLeft[1]); - value = Beb_Read32(csp0base, UDP_HEADER_B_LEFT_OFST); - value &= UDP_HEADER_Z_MSK; // to keep previous z value - Beb_Write32(csp0base, UDP_HEADER_B_LEFT_OFST, value | ((posval << UDP_HEADER_Y_OFST) & UDP_HEADER_Y_MSK)); - value = Beb_Read32(csp0base, UDP_HEADER_B_LEFT_OFST); - if ((value & UDP_HEADER_Y_MSK) != ((posval << UDP_HEADER_Y_OFST) & UDP_HEADER_Y_MSK)) { - LOG(logERROR, ("Could not set column position for left port\n")); - ret = FAIL; - } + // close file pointer + Beb_close(fd, csp0base); + } + if (ret == OK) { + LOG(logINFO, ("Position set to...\n" + "\tLeft: [%d, %d]\n" + "\tRight:[%d, %d]\n", + posLeft[0], posLeft[1], posRight[0], posRight[1])); + } - // y right - posval = Beb_swap_uint16(posRight[1]); - value = Beb_Read32(csp0base, UDP_HEADER_B_RIGHT_OFST); - value &= UDP_HEADER_Z_MSK; // to keep previous z value - Beb_Write32(csp0base, UDP_HEADER_B_RIGHT_OFST, value | ((posval << UDP_HEADER_Y_OFST) & UDP_HEADER_Y_MSK)); - value = Beb_Read32(csp0base, UDP_HEADER_B_RIGHT_OFST); - if ((value & UDP_HEADER_Y_MSK) != ((posval << UDP_HEADER_Y_OFST) & UDP_HEADER_Y_MSK)) { - LOG(logERROR, ("Could not set column position for right port\n")); - ret = FAIL; - } - - - //close file pointer - Beb_close(fd,csp0base); - } - if (ret == OK) { - LOG(logINFO, ("Position set to...\n" - "\tLeft: [%d, %d]\n" - "\tRight:[%d, %d]\n", - posLeft[0], posLeft[1], posRight[0], posRight[1])); - } - - return ret; + return ret; } int Beb_SetStartingFrameNumber(uint64_t value) { - if (!Beb_activated) { - Beb_deactivatedStartFrameNumber = value; - return OK; - } - LOG(logINFO, ("Setting start frame number: %llu\n", (long long unsigned int)value)); + if (!Beb_activated) { + Beb_deactivatedStartFrameNumber = value; + return OK; + } + LOG(logINFO, + ("Setting start frame number: %llu\n", (long long unsigned int)value)); - u_int32_t* csp0base = 0; - int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_TEST_BASEADDR); - if (fd < 0) { - LOG(logERROR, ("Set Start Frame Number FAIL\n")); - return FAIL; - } - // since the read is not implemented in firmware yet - Beb_deactivatedStartFrameNumber = value; + u_int32_t *csp0base = 0; + int fd = Beb_open(&csp0base, XPAR_PLB_GPIO_TEST_BASEADDR); + if (fd < 0) { + LOG(logERROR, ("Set Start Frame Number FAIL\n")); + return FAIL; + } + // since the read is not implemented in firmware yet + Beb_deactivatedStartFrameNumber = value; - // decrement for firmware - uint64_t valueInFirmware = value - 1; - Beb_Write32(csp0base, UDP_HEADER_FRAME_NUMBER_LSB_OFST, valueInFirmware & (0xffffffff)); - Beb_Write32(csp0base, UDP_HEADER_FRAME_NUMBER_MSB_OFST, (valueInFirmware >> 32) & (0xffffffff)); - Beb_close(fd,csp0base); + // decrement for firmware + uint64_t valueInFirmware = value - 1; + Beb_Write32(csp0base, UDP_HEADER_FRAME_NUMBER_LSB_OFST, + valueInFirmware & (0xffffffff)); + Beb_Write32(csp0base, UDP_HEADER_FRAME_NUMBER_MSB_OFST, + (valueInFirmware >> 32) & (0xffffffff)); + Beb_close(fd, csp0base); - LOG(logINFO, ("Going to reset Frame Number\n")); - Beb_ResetFrameNumber(); - return OK; + LOG(logINFO, ("Going to reset Frame Number\n")); + Beb_ResetFrameNumber(); + return OK; } -int Beb_GetStartingFrameNumber(uint64_t* retval, int tengigaEnable) { - if (!Beb_activated) { - *retval = Beb_deactivatedStartFrameNumber; - return OK; - } +int Beb_GetStartingFrameNumber(uint64_t *retval, int tengigaEnable) { + if (!Beb_activated) { + *retval = Beb_deactivatedStartFrameNumber; + return OK; + } - LOG(logDEBUG1, ("Getting start frame number\n")); - u_int32_t* csp0base = 0; - int fd = Beb_open(&csp0base, XPAR_COUNTER_BASEADDR); - if (fd < 0) { - LOG(logERROR, ("Get Start Frame Number FAIL\n")); - return FAIL; - } + LOG(logDEBUG1, ("Getting start frame number\n")); + u_int32_t *csp0base = 0; + int fd = Beb_open(&csp0base, XPAR_COUNTER_BASEADDR); + if (fd < 0) { + LOG(logERROR, ("Get Start Frame Number FAIL\n")); + return FAIL; + } - uint32_t temp = 0; - if (!tengigaEnable) { - uint64_t left1g = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_MSB_OFST); - temp = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_LSB_OFST); - left1g = ((left1g << 32) | temp) >> 16; - ++left1g; // increment for firmware + uint32_t temp = 0; + if (!tengigaEnable) { + uint64_t left1g = + Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_MSB_OFST); + temp = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_LSB_OFST); + left1g = ((left1g << 32) | temp) >> 16; + ++left1g; // increment for firmware - uint64_t right1g = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_MSB_OFST); - temp = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_LSB_OFST); - right1g = ((right1g << 32) | temp) >> 16; - ++right1g; // increment for firmware + uint64_t right1g = + Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_MSB_OFST); + temp = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_LSB_OFST); + right1g = ((right1g << 32) | temp) >> 16; + ++right1g; // increment for firmware - Beb_close(fd,csp0base); - if (left1g != right1g) { - LOG(logERROR, ("Retrieved inconsistent frame numbers from 1g left %llu and right %llu\n", - (long long int)left1g, (long long int)right1g)); - *retval = (left1g > right1g) ? left1g : right1g; // give max to set it to when stopping acq & different value - return -2; // to differentiate between failed address mapping - } - *retval = left1g; - } - - else { - uint64_t left10g = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_MSB_OFST); - temp = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_LSB_OFST); - left10g = ((left10g << 32) | temp) >> 16; - ++left10g; // increment for firmware + Beb_close(fd, csp0base); + if (left1g != right1g) { + LOG(logERROR, ("Retrieved inconsistent frame numbers from 1g left " + "%llu and right %llu\n", + (long long int)left1g, (long long int)right1g)); + *retval = (left1g > right1g) + ? left1g + : right1g; // give max to set it to when stopping acq + // & different value + return -2; // to differentiate between failed address mapping + } + *retval = left1g; + } - uint64_t right10g = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_MSB_OFST); - temp = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_LSB_OFST); - right10g = ((right10g << 32) | temp) >> 16; - Beb_close(fd,csp0base); - ++right10g; // increment for firmware + else { + uint64_t left10g = + Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_MSB_OFST); + temp = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_LSB_OFST); + left10g = ((left10g << 32) | temp) >> 16; + ++left10g; // increment for firmware - if (left10g != right10g) { - LOG(logERROR, ("Retrieved inconsistent frame numbers from `0g left %llu and right %llu\n", - (long long int)left10g, (long long int)right10g)); - *retval = (left10g > right10g) ? left10g : right10g; // give max to set it to when stopping acq & different value - return -2; // to differentiate between failed address mapping - } - *retval = left10g; - } - return OK; + uint64_t right10g = + Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_MSB_OFST); + temp = Beb_Read32(csp0base, UDP_HEADER_GET_FNUM_1G_LEFT_LSB_OFST); + right10g = ((right10g << 32) | temp) >> 16; + Beb_close(fd, csp0base); + ++right10g; // increment for firmware + + if (left10g != right10g) { + LOG(logERROR, ("Retrieved inconsistent frame numbers from `0g left " + "%llu and right %llu\n", + (long long int)left10g, (long long int)right10g)); + *retval = (left10g > right10g) + ? left10g + : right10g; // give max to set it to when stopping acq + // & different value + return -2; // to differentiate between failed address mapping + } + *retval = left10g; + } + return OK; } -void Beb_SetReadNLines(int value) { - Beb_readNLines = value; +void Beb_SetReadNLines(int value) { Beb_readNLines = value; } + +uint16_t Beb_swap_uint16(uint16_t val) { return (val << 8) | (val >> 8); } + +int Beb_open(u_int32_t **csp0base, u_int32_t offset) { + + int fd = open("/dev/mem", O_RDWR | O_SYNC, 0); + if (fd == -1) { + LOG(logERROR, ("\nCan't find /dev/mem!\n")); + } else { + LOG(logDEBUG1, ("/dev/mem opened\n")); + *csp0base = (u_int32_t *)mmap(0, BEB_MMAP_SIZE, PROT_READ | PROT_WRITE, + MAP_FILE | MAP_SHARED, fd, offset); + if (*csp0base == MAP_FAILED) { + LOG(logERROR, ("\nCan't map memmory area!!\n")); + fd = -1; + } else + LOG(logDEBUG1, ("CSP0 mapped %p\n", (void *)*csp0base)); + } + return fd; } - -uint16_t Beb_swap_uint16( uint16_t val) { - return (val << 8) | (val >> 8 ); +u_int32_t Beb_Read32(u_int32_t *baseaddr, u_int32_t offset) { + volatile u_int32_t value; + value = *(u_int32_t *)(baseaddr + offset / (sizeof(u_int32_t))); + return value; } -int Beb_open(u_int32_t** csp0base, u_int32_t offset) { - - int fd = open("/dev/mem", O_RDWR | O_SYNC, 0); - if (fd == -1) { - LOG(logERROR, ("\nCan't find /dev/mem!\n")); - } else { - LOG(logDEBUG1, ("/dev/mem opened\n")); - *csp0base = (u_int32_t*)mmap(0, BEB_MMAP_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, offset); - if (*csp0base == MAP_FAILED) { - LOG(logERROR, ("\nCan't map memmory area!!\n")); - fd = -1; - } - else LOG(logDEBUG1, ("CSP0 mapped %p\n",(void*)*csp0base)); - } - return fd; +u_int32_t Beb_Write32(u_int32_t *baseaddr, u_int32_t offset, u_int32_t data) { + volatile u_int32_t *ptr1; + ptr1 = (u_int32_t *)(baseaddr + offset / (sizeof(u_int32_t))); + *ptr1 = data; + return *ptr1; } -u_int32_t Beb_Read32 (u_int32_t* baseaddr, u_int32_t offset) { - volatile u_int32_t value; - value=* (u_int32_t*)(baseaddr + offset/(sizeof(u_int32_t))); - return value; -} - - -u_int32_t Beb_Write32 (u_int32_t* baseaddr, u_int32_t offset, u_int32_t data) { - volatile u_int32_t *ptr1; - ptr1=(u_int32_t*)(baseaddr + offset/(sizeof(u_int32_t))); - *ptr1 = data; - return *ptr1; -} - -void Beb_close(int fd,u_int32_t* csp0base) { - if (fd >= 0) - close(fd); - munmap(csp0base,BEB_MMAP_SIZE); +void Beb_close(int fd, u_int32_t *csp0base) { + if (fd >= 0) + close(fd); + munmap(csp0base, BEB_MMAP_SIZE); } diff --git a/slsDetectorServers/eigerDetectorServer/FebControl.c b/slsDetectorServers/eigerDetectorServer/FebControl.c old mode 100755 new mode 100644 index 0ccfa98e6..1233ec55e --- a/slsDetectorServers/eigerDetectorServer/FebControl.c +++ b/slsDetectorServers/eigerDetectorServer/FebControl.c @@ -1,36 +1,40 @@ #include "FebControl.h" -#include "FebRegisterDefs.h" -#include "slsDetectorServer_defs.h" -#include "clogger.h" #include "Beb.h" +#include "FebRegisterDefs.h" +#include "clogger.h" +#include "slsDetectorServer_defs.h" -#include -#include -#include -#include -#include // POSIX terminal control definitions(CS8, CREAD, CLOCAL..) #include #include +#include +#include +#include // POSIX terminal control definitions(CS8, CREAD, CLOCAL..) +#include +#include - -//GetDAQStatusRegister(512,current_mode_bits_from_fpga)) { +// GetDAQStatusRegister(512,current_mode_bits_from_fpga)) { unsigned int Module_ndacs = 16; -char Module_dac_names[16][10]={"SvP","Vtr","Vrf","Vrs","SvN","Vtgstv","Vcmp_ll","Vcmp_lr","cal","Vcmp_rl","rxb_rb","rxb_lb","Vcmp_rr","Vcp","Vcn","Vis"}; - - +char Module_dac_names[16][10] = {"SvP", "Vtr", "Vrf", "Vrs", + "SvN", "Vtgstv", "Vcmp_ll", "Vcmp_lr", + "cal", "Vcmp_rl", "rxb_rb", "rxb_lb", + "Vcmp_rr", "Vcp", "Vcn", "Vis"}; struct Module modules[10]; int moduleSize = 0; -unsigned int Feb_Control_staticBits; //program=1,m4=2,m8=4,test=8,rotest=16,cs_bar_left=32,cs_bar_right=64 -unsigned int Feb_Control_acquireNReadoutMode; //safe or parallel, half or full speed -unsigned int Feb_Control_triggerMode; //internal timer, external start, external window, signal polarity (external trigger and enable) -unsigned int Feb_Control_externalEnableMode; //external enabling engaged and it's polarity +unsigned int + Feb_Control_staticBits; // program=1,m4=2,m8=4,test=8,rotest=16,cs_bar_left=32,cs_bar_right=64 +unsigned int + Feb_Control_acquireNReadoutMode; // safe or parallel, half or full speed +unsigned int + Feb_Control_triggerMode; // internal timer, external start, external window, + // signal polarity (external trigger and enable) +unsigned int Feb_Control_externalEnableMode; // external enabling engaged and + // it's polarity unsigned int Feb_Control_subFrameMode; unsigned int Feb_Control_softwareTrigger; - unsigned int Feb_Control_nimages; double Feb_Control_exposure_time_in_sec; int64_t Feb_Control_subframe_exposure_time_in_10nsec; @@ -40,9 +44,8 @@ double Feb_Control_exposure_period_in_sec; int64_t Feb_Control_RateTable_Tau_in_nsec = -1; int64_t Feb_Control_RateTable_Period_in_nsec = -1; -unsigned int Feb_Control_trimbit_size; -unsigned int* Feb_Control_last_downloaded_trimbits; - +unsigned int Feb_Control_trimbit_size; +unsigned int *Feb_Control_last_downloaded_trimbits; int Feb_Control_module_number; int Feb_Control_current_index; @@ -54,2151 +57,2559 @@ int Feb_control_normal = 0; unsigned int Feb_Control_rate_correction_table[1024]; double Feb_Control_rate_meas[16384]; -double ratemax=-1; +double ratemax = -1; int Feb_Control_activated = 1; int Feb_Control_hv_fd = -1; +void Module_Module(struct Module *mod, unsigned int number, + unsigned int address_top) { + unsigned int i; + mod->module_number = number; + mod->top_address_valid = 1; + mod->top_left_address = 0x100 | (0xff & address_top); + mod->top_right_address = (0x200 | (0xff & address_top)); + mod->bottom_address_valid = 0; + mod->bottom_left_address = 0; + mod->bottom_right_address = 0; -void Module_Module(struct Module* mod,unsigned int number, unsigned int address_top) { - unsigned int i; - mod->module_number = number; - mod->top_address_valid = 1; - mod->top_left_address = 0x100 | (0xff & address_top); - mod->top_right_address = (0x200 | (0xff & address_top)); - mod-> bottom_address_valid = 0; - mod-> bottom_left_address = 0; - mod-> bottom_right_address = 0; - - mod->high_voltage = -1; - mod->top_dac = malloc(Module_ndacs * sizeof(int)); - mod->bottom_dac = malloc(Module_ndacs * sizeof(int)); - for(i=0;itop_dac[i] = mod->top_address_valid ? -1:0; - for(i=0;ibottom_dac[i] = mod->bottom_address_valid ? -1:0; + mod->high_voltage = -1; + mod->top_dac = malloc(Module_ndacs * sizeof(int)); + mod->bottom_dac = malloc(Module_ndacs * sizeof(int)); + for (i = 0; i < Module_ndacs; i++) + mod->top_dac[i] = mod->top_address_valid ? -1 : 0; + for (i = 0; i < Module_ndacs; i++) + mod->bottom_dac[i] = mod->bottom_address_valid ? -1 : 0; } +void Module_ModuleBottom(struct Module *mod, unsigned int number, + unsigned int address_bottom) { + unsigned int i; + mod->module_number = number; + mod->top_address_valid = 0; + mod->top_left_address = 0; + mod->top_right_address = 0; + mod->bottom_address_valid = 1; + mod->bottom_left_address = 0x100 | (0xff & address_bottom); + mod->bottom_right_address = (0x200 | (0xff & address_bottom)); -void Module_ModuleBottom(struct Module* mod,unsigned int number, unsigned int address_bottom) { - unsigned int i; - mod->module_number = number; - mod->top_address_valid = 0; - mod->top_left_address = 0; - mod->top_right_address = 0; - mod-> bottom_address_valid = 1; - mod-> bottom_left_address = 0x100 | (0xff & address_bottom); - mod-> bottom_right_address = (0x200 | (0xff & address_bottom)); + mod->high_voltage = -1; - mod->high_voltage = -1; + for (i = 0; i < 4; i++) + mod->idelay_top[i] = mod->idelay_bottom[i] = 0; - for(i=0;i<4;i++) mod->idelay_top[i]=mod->idelay_bottom[i]=0; - - mod->top_dac = malloc(Module_ndacs * sizeof(int)); - mod->bottom_dac = malloc(Module_ndacs * sizeof(int)); - for(i=0;itop_dac[i] = mod->top_address_valid ? -1:0; - for(i=0;ibottom_dac[i] = mod->bottom_address_valid ? -1:0; + mod->top_dac = malloc(Module_ndacs * sizeof(int)); + mod->bottom_dac = malloc(Module_ndacs * sizeof(int)); + for (i = 0; i < Module_ndacs; i++) + mod->top_dac[i] = mod->top_address_valid ? -1 : 0; + for (i = 0; i < Module_ndacs; i++) + mod->bottom_dac[i] = mod->bottom_address_valid ? -1 : 0; } +void Module_Module1(struct Module *mod, unsigned int number, + unsigned int address_top, unsigned int address_bottom) { + unsigned int i; + mod->module_number = number; + mod->top_address_valid = 1; + mod->top_left_address = 0x100 | (0xff & address_top); + mod->top_right_address = 0x200 | (0xff & address_top); + mod->bottom_address_valid = 1; + mod->bottom_left_address = 0x100 | (0xff & address_bottom); + mod->bottom_right_address = 0x200 | (0xff & address_bottom); + mod->high_voltage = -1; -void Module_Module1(struct Module* mod,unsigned int number, unsigned int address_top, unsigned int address_bottom) { - unsigned int i; - mod->module_number = number; - mod->top_address_valid = 1; - mod->top_left_address = 0x100 | (0xff & address_top); - mod->top_right_address = 0x200 | (0xff & address_top); - mod->bottom_address_valid = 1; - mod->bottom_left_address = 0x100 | (0xff & address_bottom); - mod->bottom_right_address = 0x200 | (0xff & address_bottom); + for (i = 0; i < 4; i++) + mod->idelay_top[i] = mod->idelay_bottom[i] = 0; - mod->high_voltage = -1; - - for(i=0;i<4;i++) mod->idelay_top[i]=mod->idelay_bottom[i]=0; - - mod->top_dac = malloc(Module_ndacs * sizeof(int)); - mod->bottom_dac = malloc(Module_ndacs * sizeof(int)); - for(i=0;itop_dac[i] = mod->top_address_valid ? -1:0; - for(i=0;ibottom_dac[i] = mod->bottom_address_valid ? -1:0; + mod->top_dac = malloc(Module_ndacs * sizeof(int)); + mod->bottom_dac = malloc(Module_ndacs * sizeof(int)); + for (i = 0; i < Module_ndacs; i++) + mod->top_dac[i] = mod->top_address_valid ? -1 : 0; + for (i = 0; i < Module_ndacs; i++) + mod->bottom_dac[i] = mod->bottom_address_valid ? -1 : 0; } - -unsigned int Module_GetModuleNumber(struct Module* mod) {return mod->module_number;} -int Module_TopAddressIsValid(struct Module* mod) {return mod->top_address_valid;} -unsigned int Module_GetTopBaseAddress(struct Module* mod) {return (mod->top_left_address&0xff);} -unsigned int Module_GetTopLeftAddress(struct Module* mod) {return mod->top_left_address;} -unsigned int Module_GetTopRightAddress(struct Module* mod) {return mod->top_right_address;} -unsigned int Module_GetBottomBaseAddress(struct Module* mod) {return (mod->bottom_left_address&0xff);} -int Module_BottomAddressIsValid(struct Module* mod) {return mod->bottom_address_valid;} -unsigned int Module_GetBottomLeftAddress(struct Module* mod) {return mod->bottom_left_address;} -unsigned int Module_GetBottomRightAddress(struct Module* mod) {return mod->bottom_right_address;} - -unsigned int Module_SetTopIDelay(struct Module* mod,unsigned int chip,unsigned int value) { return Module_TopAddressIsValid(mod) &&chip<4 ? (mod->idelay_top[chip]=value) : 0;} //chip 0=ll,1=lr,0=rl,1=rr -unsigned int Module_GetTopIDelay(struct Module* mod,unsigned int chip) { return chip<4 ? mod->idelay_top[chip] : 0;} //chip 0=ll,1=lr,0=rl,1=rr -unsigned int Module_SetBottomIDelay(struct Module* mod,unsigned int chip,unsigned int value) { return Module_BottomAddressIsValid(mod) &&chip<4 ? (mod->idelay_bottom[chip]=value) : 0;} //chip 0=ll,1=lr,0=rl,1=rr -unsigned int Module_GetBottomIDelay(struct Module* mod,unsigned int chip) { return chip<4 ? mod->idelay_bottom[chip] : 0;} //chip 0=ll,1=lr,0=rl,1=rr - -float Module_SetHighVoltage(struct Module* mod,float value) { return Feb_control_master ? (mod->high_voltage=value) : -1;}// Module_TopAddressIsValid(mod) ? (mod->high_voltage=value) : -1;} -float Module_GetHighVoltage(struct Module* mod) { return mod->high_voltage;} - -int Module_SetTopDACValue(struct Module* mod,unsigned int i, int value) { return (itop_dac[i]=value) : -1;} -int Module_GetTopDACValue(struct Module* mod,unsigned int i) { return (itop_dac[i] : -1;} -int Module_SetBottomDACValue(struct Module* mod,unsigned int i, int value) { return (ibottom_dac[i]=value): -1;} -int Module_GetBottomDACValue(struct Module* mod,unsigned int i) { return (ibottom_dac[i] : -1;} - - - -void Feb_Control_activate(int activate) { - Feb_Control_activated = activate; +unsigned int Module_GetModuleNumber(struct Module *mod) { + return mod->module_number; } +int Module_TopAddressIsValid(struct Module *mod) { + return mod->top_address_valid; +} +unsigned int Module_GetTopBaseAddress(struct Module *mod) { + return (mod->top_left_address & 0xff); +} +unsigned int Module_GetTopLeftAddress(struct Module *mod) { + return mod->top_left_address; +} +unsigned int Module_GetTopRightAddress(struct Module *mod) { + return mod->top_right_address; +} +unsigned int Module_GetBottomBaseAddress(struct Module *mod) { + return (mod->bottom_left_address & 0xff); +} +int Module_BottomAddressIsValid(struct Module *mod) { + return mod->bottom_address_valid; +} +unsigned int Module_GetBottomLeftAddress(struct Module *mod) { + return mod->bottom_left_address; +} +unsigned int Module_GetBottomRightAddress(struct Module *mod) { + return mod->bottom_right_address; +} + +unsigned int Module_SetTopIDelay(struct Module *mod, unsigned int chip, + unsigned int value) { + return Module_TopAddressIsValid(mod) && chip < 4 + ? (mod->idelay_top[chip] = value) + : 0; +} // chip 0=ll,1=lr,0=rl,1=rr +unsigned int Module_GetTopIDelay(struct Module *mod, unsigned int chip) { + return chip < 4 ? mod->idelay_top[chip] : 0; +} // chip 0=ll,1=lr,0=rl,1=rr +unsigned int Module_SetBottomIDelay(struct Module *mod, unsigned int chip, + unsigned int value) { + return Module_BottomAddressIsValid(mod) && chip < 4 + ? (mod->idelay_bottom[chip] = value) + : 0; +} // chip 0=ll,1=lr,0=rl,1=rr +unsigned int Module_GetBottomIDelay(struct Module *mod, unsigned int chip) { + return chip < 4 ? mod->idelay_bottom[chip] : 0; +} // chip 0=ll,1=lr,0=rl,1=rr + +float Module_SetHighVoltage(struct Module *mod, float value) { + return Feb_control_master ? (mod->high_voltage = value) : -1; +} // Module_TopAddressIsValid(mod) ? (mod->high_voltage=value) : -1;} +float Module_GetHighVoltage(struct Module *mod) { return mod->high_voltage; } + +int Module_SetTopDACValue(struct Module *mod, unsigned int i, int value) { + return (i < Module_ndacs && Module_TopAddressIsValid(mod)) + ? (mod->top_dac[i] = value) + : -1; +} +int Module_GetTopDACValue(struct Module *mod, unsigned int i) { + return (i < Module_ndacs) ? mod->top_dac[i] : -1; +} +int Module_SetBottomDACValue(struct Module *mod, unsigned int i, int value) { + return (i < Module_ndacs && Module_BottomAddressIsValid(mod)) + ? (mod->bottom_dac[i] = value) + : -1; +} +int Module_GetBottomDACValue(struct Module *mod, unsigned int i) { + return (i < Module_ndacs) ? mod->bottom_dac[i] : -1; +} + +void Feb_Control_activate(int activate) { Feb_Control_activated = activate; } int Feb_Control_IsBottomModule() { - if (Module_BottomAddressIsValid(&modules[Feb_Control_current_index])) - return 1; - return 0; -} - - -int Feb_Control_GetModuleNumber() { - return Feb_Control_module_number; + if (Module_BottomAddressIsValid(&modules[Feb_Control_current_index])) + return 1; + return 0; } +int Feb_Control_GetModuleNumber() { return Feb_Control_module_number; } void Feb_Control_FebControl() { - Feb_Control_staticBits=Feb_Control_acquireNReadoutMode=Feb_Control_triggerMode=Feb_Control_externalEnableMode=Feb_Control_subFrameMode=0; - Feb_Control_trimbit_size=263680; - Feb_Control_last_downloaded_trimbits = malloc(Feb_Control_trimbit_size * sizeof(int)); - moduleSize = 0; + Feb_Control_staticBits = Feb_Control_acquireNReadoutMode = + Feb_Control_triggerMode = Feb_Control_externalEnableMode = + Feb_Control_subFrameMode = 0; + Feb_Control_trimbit_size = 263680; + Feb_Control_last_downloaded_trimbits = + malloc(Feb_Control_trimbit_size * sizeof(int)); + moduleSize = 0; } - - - int Feb_Control_Init(int master, int top, int normal, int module_num) { - unsigned int i; - Feb_Control_module_number = 0; - Feb_Control_current_index = 0; - Feb_control_master = master; - Feb_control_normal = normal; + unsigned int i; + Feb_Control_module_number = 0; + Feb_Control_current_index = 0; + Feb_control_master = master; + Feb_control_normal = normal; - //global send - Feb_Control_AddModule1(0,1,0xff,0,1); - Feb_Control_PrintModuleList(); - Feb_Control_module_number = (module_num & 0xFF); + // global send + Feb_Control_AddModule1(0, 1, 0xff, 0, 1); + Feb_Control_PrintModuleList(); + Feb_Control_module_number = (module_num & 0xFF); - int serial = !top; - LOG(logDEBUG1, ("serial: %d\n",serial)); + int serial = !top; + LOG(logDEBUG1, ("serial: %d\n", serial)); - Feb_Control_current_index = 1; + Feb_Control_current_index = 1; + // Add the half module + Feb_Control_AddModule1(Feb_Control_module_number, top, serial, serial, 1); + Feb_Control_PrintModuleList(); - //Add the half module - Feb_Control_AddModule1(Feb_Control_module_number,top,serial,serial,1); - Feb_Control_PrintModuleList(); + unsigned int nfebs = 0; + unsigned int *feb_list = malloc(moduleSize * 4 * sizeof(unsigned int)); + for (i = 1; i < moduleSize; i++) { + if (Module_TopAddressIsValid(&modules[i])) { + feb_list[nfebs++] = Module_GetTopRightAddress(&modules[i]); + feb_list[nfebs++] = Module_GetTopLeftAddress(&modules[i]); + } + if (Module_BottomAddressIsValid(&modules[i])) { + feb_list[nfebs++] = Module_GetBottomRightAddress(&modules[i]); + feb_list[nfebs++] = Module_GetBottomLeftAddress(&modules[i]); + } + } + Feb_Interface_SendCompleteList(nfebs, feb_list); + free(feb_list); + if (Feb_Control_activated) + Feb_Interface_SetByteOrder(); - unsigned int nfebs = 0; - unsigned int* feb_list = malloc(moduleSize*4 * sizeof(unsigned int)); - for(i=1;i3) { - LOG(logERROR, ("SetIDelay chip_pos %d doesn't exist.\n",chip_pos)); - return 0; - } +int Feb_Control_SetIDelays1( + unsigned int module_num, unsigned int chip_pos, + unsigned int ndelay_units) { // chip_pos 0=ll,1=lr,0=rl,1=rr + unsigned int i; + // currently set same for top and bottom + if (chip_pos > 3) { + LOG(logERROR, ("SetIDelay chip_pos %d doesn't exist.\n", chip_pos)); + return 0; + } - unsigned int module_index=0; - if (!Feb_Control_GetModuleIndex(module_num,&module_index)) { - LOG(logERROR, ("could not set i delay module number %d invalid.\n",module_num)); - return 0; - } + unsigned int module_index = 0; + if (!Feb_Control_GetModuleIndex(module_num, &module_index)) { + LOG(logERROR, + ("could not set i delay module number %d invalid.\n", module_num)); + return 0; + } - int ok = 1; - if (chip_pos/2==0) { //left fpga - if (Module_TopAddressIsValid(&modules[module_index])) { - if (Feb_Control_SendIDelays(Module_GetTopLeftAddress(&modules[module_index]),chip_pos%2==0,0xffffffff,ndelay_units)) { - if (module_index!=0) Module_SetTopIDelay(&modules[module_index],chip_pos,ndelay_units); - else { - for(i=0;i 0x3ff) + ndelay_units = 0x3ff; + // this is global + unsigned int delay_data_valid_nclks = + 15 - ((ndelay_units & 0x3c0) >> 6); // data valid delay upto 15 clks + ndelay_units &= 0x3f; -int Feb_Control_SendIDelays(unsigned int dst_num, int chip_lr, unsigned int channels, unsigned int ndelay_units) { - if (ndelay_units>0x3ff) ndelay_units=0x3ff; - // this is global - unsigned int delay_data_valid_nclks = 15 - ((ndelay_units&0x3c0)>>6); //data valid delay upto 15 clks - ndelay_units &= 0x3f; + unsigned int set_left_delay_channels = chip_lr ? channels : 0; + unsigned int set_right_delay_channels = chip_lr ? 0 : channels; - unsigned int set_left_delay_channels = chip_lr ? channels:0; - unsigned int set_right_delay_channels = chip_lr ? 0:channels; + LOG(logDEBUG1, + ("\tSetting delays of %s chips of dst_num %d, " + "tracks 0x%x to %d, %d clks and %d units.\n", + ((set_left_delay_channels != 0) ? "left" : "right"), dst_num, channels, + (((15 - delay_data_valid_nclks) << 6) | ndelay_units), + delay_data_valid_nclks, ndelay_units)); + if (Feb_Control_activated) { + if (!Feb_Interface_WriteRegister( + dst_num, CHIP_DATA_OUT_DELAY_REG2, + 1 << 31 | delay_data_valid_nclks << 16 | ndelay_units, 0, + 0) || // the 1<<31 time enables the setting of the data valid + // delays + !Feb_Interface_WriteRegister(dst_num, CHIP_DATA_OUT_DELAY_REG3, + set_left_delay_channels, 0, 0) || + !Feb_Interface_WriteRegister(dst_num, CHIP_DATA_OUT_DELAY_REG4, + set_right_delay_channels, 0, 0) || + !Feb_Interface_WriteRegister(dst_num, CHIP_DATA_OUT_DELAY_REG_CTRL, + CHIP_DATA_OUT_DELAY_SET, 1, 1)) { + LOG(logERROR, ("could not SetChipDataInputDelays(...).\n")); + return 0; + } + } - LOG(logDEBUG1, ("\tSetting delays of %s chips of dst_num %d, " - "tracks 0x%x to %d, %d clks and %d units.\n", - ((set_left_delay_channels != 0) ? "left" : "right"), - dst_num, channels, (((15-delay_data_valid_nclks)<<6)|ndelay_units), - delay_data_valid_nclks, ndelay_units)); - - if (Feb_Control_activated) { - if (!Feb_Interface_WriteRegister(dst_num,CHIP_DATA_OUT_DELAY_REG2, 1<<31 | delay_data_valid_nclks<<16 | ndelay_units,0,0) || //the 1<<31 time enables the setting of the data valid delays - !Feb_Interface_WriteRegister(dst_num,CHIP_DATA_OUT_DELAY_REG3,set_left_delay_channels,0,0) || - !Feb_Interface_WriteRegister(dst_num,CHIP_DATA_OUT_DELAY_REG4,set_right_delay_channels,0,0) || - !Feb_Interface_WriteRegister(dst_num,CHIP_DATA_OUT_DELAY_REG_CTRL,CHIP_DATA_OUT_DELAY_SET,1,1)) { - LOG(logERROR, ("could not SetChipDataInputDelays(...).\n")); - return 0; - } - } - - return 1; + return 1; } - -int Feb_Control_VoltageToDAC(float value, unsigned int* digital,unsigned int nsteps,float vmin,float vmax) { - if (valuevmax) return 0; - *digital = (int)(((value-vmin)/(vmax-vmin))*(nsteps-1) + 0.5); - return 1; +int Feb_Control_VoltageToDAC(float value, unsigned int *digital, + unsigned int nsteps, float vmin, float vmax) { + if (value < vmin || value > vmax) + return 0; + *digital = (int)(((value - vmin) / (vmax - vmin)) * (nsteps - 1) + 0.5); + return 1; } -float Feb_Control_DACToVoltage(unsigned int digital,unsigned int nsteps,float vmin,float vmax) { - return vmin+(vmax-vmin)*digital/(nsteps-1); +float Feb_Control_DACToVoltage(unsigned int digital, unsigned int nsteps, + float vmin, float vmax) { + return vmin + (vmax - vmin) * digital / (nsteps - 1); } - -//only master gets to call this function +// only master gets to call this function int Feb_Control_SetHighVoltage(int value) { - LOG(logDEBUG1, (" Setting High Voltage:\t")); - /* - * maximum voltage of the hv dc/dc converter: - * 300 for single module power distribution board - * 200 for 9M power distribution board - * but limit is 200V for both - */ - const float vmin=0; - float vmax=200; - if (Feb_control_normal) - vmax=300; - const float vlimit=200; - const unsigned int ntotalsteps = 256; - unsigned int nsteps = ntotalsteps*vlimit/vmax; - unsigned int dacval = 0; + LOG(logDEBUG1, (" Setting High Voltage:\t")); + /* + * maximum voltage of the hv dc/dc converter: + * 300 for single module power distribution board + * 200 for 9M power distribution board + * but limit is 200V for both + */ + const float vmin = 0; + float vmax = 200; + if (Feb_control_normal) + vmax = 300; + const float vlimit = 200; + const unsigned int ntotalsteps = 256; + unsigned int nsteps = ntotalsteps * vlimit / vmax; + unsigned int dacval = 0; - //calculate dac value - if (!Feb_Control_VoltageToDAC(value,&dacval,nsteps,vmin,vlimit)) { - LOG(logERROR, ("SetHighVoltage bad value, %d. The range is 0 to %d V.\n",value, (int)vlimit)); - return -1; - } - LOG(logINFO, ("High Voltage set to %dV\n", value)); - LOG(logDEBUG1, ("High Voltage set to (%d dac):\t%dV\n", dacval, value)); + // calculate dac value + if (!Feb_Control_VoltageToDAC(value, &dacval, nsteps, vmin, vlimit)) { + LOG(logERROR, + ("SetHighVoltage bad value, %d. The range is 0 to %d V.\n", value, + (int)vlimit)); + return -1; + } + LOG(logINFO, ("High Voltage set to %dV\n", value)); + LOG(logDEBUG1, ("High Voltage set to (%d dac):\t%dV\n", dacval, value)); - return Feb_Control_SendHighVoltage(dacval); + return Feb_Control_SendHighVoltage(dacval); } +int Feb_Control_GetHighVoltage(int *value) { + LOG(logDEBUG1, (" Getting High Voltage:\t")); + unsigned int dacval = 0; -int Feb_Control_GetHighVoltage(int* value) { - LOG(logDEBUG1, (" Getting High Voltage:\t")); - unsigned int dacval = 0; + if (!Feb_Control_ReceiveHighVoltage(&dacval)) + return 0; - if (!Feb_Control_ReceiveHighVoltage(&dacval)) - return 0; - - //ok, convert dac to v - /* - * maximum voltage of the hv dc/dc converter: - * 300 for single module power distribution board - * 200 for 9M power distribution board - * but limit is 200V for both - */ - const float vmin=0; - float vmax=200; - if (Feb_control_normal) - vmax=300; - const float vlimit=200; - const unsigned int ntotalsteps = 256; - unsigned int nsteps = ntotalsteps*vlimit/vmax; - *value = (int)(Feb_Control_DACToVoltage(dacval,nsteps,vmin,vlimit)+0.5); - LOG(logINFO, ("High Voltage read %dV\n", *value)); - LOG(logDEBUG1, ("High Voltage read (%d dac)\t%dV\n", dacval, *value)); - return 1; + // ok, convert dac to v + /* + * maximum voltage of the hv dc/dc converter: + * 300 for single module power distribution board + * 200 for 9M power distribution board + * but limit is 200V for both + */ + const float vmin = 0; + float vmax = 200; + if (Feb_control_normal) + vmax = 300; + const float vlimit = 200; + const unsigned int ntotalsteps = 256; + unsigned int nsteps = ntotalsteps * vlimit / vmax; + *value = + (int)(Feb_Control_DACToVoltage(dacval, nsteps, vmin, vlimit) + 0.5); + LOG(logINFO, ("High Voltage read %dV\n", *value)); + LOG(logDEBUG1, ("High Voltage read (%d dac)\t%dV\n", dacval, *value)); + return 1; } - int Feb_Control_SendHighVoltage(int dacvalue) { - //normal - if (Feb_control_normal) { - //open file - FILE* fd=fopen(NORMAL_HIGHVOLTAGE_OUTPUTPORT,"w"); - if (fd==NULL) { - LOG(logERROR, ("Could not open file for writing to set high voltage\n")); - return 0; - } - //convert to string, add 0 and write to file - fprintf(fd, "%d0\n", dacvalue); - fclose(fd); - } + // normal + if (Feb_control_normal) { + // open file + FILE *fd = fopen(NORMAL_HIGHVOLTAGE_OUTPUTPORT, "w"); + if (fd == NULL) { + LOG(logERROR, + ("Could not open file for writing to set high voltage\n")); + return 0; + } + // convert to string, add 0 and write to file + fprintf(fd, "%d0\n", dacvalue); + fclose(fd); + } - //9m - else { - /*Feb_Control_OpenSerialCommunication();*/ - if (Feb_Control_hv_fd == -1) { - LOG(logERROR, ("High voltage serial communication not set up for 9m\n")); - return 0; - } + // 9m + else { + /*Feb_Control_OpenSerialCommunication();*/ + if (Feb_Control_hv_fd == -1) { + LOG(logERROR, + ("High voltage serial communication not set up for 9m\n")); + return 0; + } - char buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE]; - memset(buffer,0,SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); - buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE-1]='\n'; - int n; - sprintf(buffer,"p%d",dacvalue); - LOG(logINFO, ("Sending HV: '%s'\n",buffer)); - n = write(Feb_Control_hv_fd, buffer, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); - if (n < 0) { - LOG(logERROR, ("writing to i2c bus\n")); - return 0; - } + char buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE]; + memset(buffer, 0, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); + buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE - 1] = '\n'; + int n; + sprintf(buffer, "p%d", dacvalue); + LOG(logINFO, ("Sending HV: '%s'\n", buffer)); + n = write(Feb_Control_hv_fd, buffer, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); + if (n < 0) { + LOG(logERROR, ("writing to i2c bus\n")); + return 0; + } #ifdef VERBOSEI - LOG(logINFO, ("Sent %d Bytes\n", n)); + LOG(logINFO, ("Sent %d Bytes\n", n)); #endif - //ok/fail - memset(buffer,0,SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); - buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE-1] = '\n'; - n = read(Feb_Control_hv_fd, buffer, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); - if (n < 0) { - LOG(logERROR, ("reading from i2c bus\n")); - return 0; - } + // ok/fail + memset(buffer, 0, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); + buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE - 1] = '\n'; + n = read(Feb_Control_hv_fd, buffer, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); + if (n < 0) { + LOG(logERROR, ("reading from i2c bus\n")); + return 0; + } #ifdef VERBOSEI - LOG(logINFO, ("Received %d Bytes\n", n)); + LOG(logINFO, ("Received %d Bytes\n", n)); #endif - LOG(logINFO, ("Received HV: '%s'\n",buffer)); - fflush(stdout); - /*Feb_Control_CloseSerialCommunication();*/ - if (buffer[0] != 's') { - LOG(logERROR, ("\nError: Failed to set high voltage\n")); - return 0; - } - LOG(logINFO, ("%s\n",buffer)); + LOG(logINFO, ("Received HV: '%s'\n", buffer)); + fflush(stdout); + /*Feb_Control_CloseSerialCommunication();*/ + if (buffer[0] != 's') { + LOG(logERROR, ("\nError: Failed to set high voltage\n")); + return 0; + } + LOG(logINFO, ("%s\n", buffer)); + } - } - - return 1; + return 1; } +int Feb_Control_ReceiveHighVoltage(unsigned int *value) { + // normal + if (Feb_control_normal) { + // open file + FILE *fd = fopen(NORMAL_HIGHVOLTAGE_INPUTPORT, "r"); + if (fd == NULL) { + LOG(logERROR, + ("Could not open file for writing to get high voltage\n")); + return 0; + } + // read, assigning line to null and readbytes to 0 then getline + // allocates initial buffer + size_t readbytes = 0; + char *line = NULL; + if (getline(&line, &readbytes, fd) == -1) { + LOG(logERROR, ("could not read file to get high voltage\n")); + return 0; + } + // read again to read the updated value + rewind(fd); + free(line); + readbytes = 0; + readbytes = getline(&line, &readbytes, fd); + if (readbytes == -1) { + LOG(logERROR, ("could not read file to get high voltage\n")); + return 0; + } + // Remove the trailing 0 + *value = atoi(line) / 10; + free(line); + fclose(fd); + } + // 9m + else { + /*Feb_Control_OpenSerialCommunication();*/ + if (Feb_Control_hv_fd == -1) { + LOG(logERROR, + ("High voltage serial communication not set up for 9m\n")); + return 0; + } + char buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE]; + buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE - 1] = '\n'; + int n = 0; + // request - -int Feb_Control_ReceiveHighVoltage(unsigned int* value) { - - //normal - if (Feb_control_normal) { - //open file - FILE* fd=fopen(NORMAL_HIGHVOLTAGE_INPUTPORT,"r"); - if (fd==NULL) { - LOG(logERROR, ("Could not open file for writing to get high voltage\n")); - return 0; - } - - //read, assigning line to null and readbytes to 0 then getline allocates initial buffer - size_t readbytes=0; - char* line=NULL; - if (getline(&line, &readbytes, fd) == -1) { - LOG(logERROR, ("could not read file to get high voltage\n")); - return 0; - } - //read again to read the updated value - rewind(fd); - free(line); - readbytes=0; - readbytes = getline(&line, &readbytes, fd); - if (readbytes == -1) { - LOG(logERROR, ("could not read file to get high voltage\n")); - return 0; - } - // Remove the trailing 0 - *value = atoi(line)/10; - free(line); - fclose(fd); - } - - - //9m - else { - /*Feb_Control_OpenSerialCommunication();*/ - - if (Feb_Control_hv_fd == -1) { - LOG(logERROR, ("High voltage serial communication not set up for 9m\n")); - return 0; - } - char buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE]; - buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE-1]='\n'; - int n = 0; - //request - - strcpy(buffer,"g "); - LOG(logINFO, ("\nSending HV: '%s'\n",buffer)); - n = write(Feb_Control_hv_fd, buffer, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); - if (n < 0) { - LOG(logERROR, ("writing to i2c bus\n")); - return 0; - } + strcpy(buffer, "g "); + LOG(logINFO, ("\nSending HV: '%s'\n", buffer)); + n = write(Feb_Control_hv_fd, buffer, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); + if (n < 0) { + LOG(logERROR, ("writing to i2c bus\n")); + return 0; + } #ifdef VERBOSEI - LOG(logINFO, ("Sent %d Bytes\n", n)); + LOG(logINFO, ("Sent %d Bytes\n", n)); #endif - //ok/fail - memset(buffer,0,SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); - buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE-1] = '\n'; - n = read(Feb_Control_hv_fd, buffer, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); - if (n < 0) { - LOG(logERROR, ("reading from i2c bus\n")); - return 0; - } + // ok/fail + memset(buffer, 0, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); + buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE - 1] = '\n'; + n = read(Feb_Control_hv_fd, buffer, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); + if (n < 0) { + LOG(logERROR, ("reading from i2c bus\n")); + return 0; + } #ifdef VERBOSEI - LOG(logINFO, ("Received %d Bytes\n", n)); + LOG(logINFO, ("Received %d Bytes\n", n)); #endif - LOG(logINFO, ("Received HV: '%s'\n",buffer)); - if (buffer[0] != 's') { - LOG(logERROR, ("failed to read high voltage\n")); - return 0; - } + LOG(logINFO, ("Received HV: '%s'\n", buffer)); + if (buffer[0] != 's') { + LOG(logERROR, ("failed to read high voltage\n")); + return 0; + } - memset(buffer,0,SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); - buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE-1] = '\n'; - n = read(Feb_Control_hv_fd, buffer, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); - if (n < 0) { - LOG(logERROR, ("reading from i2c bus\n")); - return 0; - } + memset(buffer, 0, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); + buffer[SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE - 1] = '\n'; + n = read(Feb_Control_hv_fd, buffer, SPECIAL9M_HIGHVOLTAGE_BUFFERSIZE); + if (n < 0) { + LOG(logERROR, ("reading from i2c bus\n")); + return 0; + } #ifdef VERBOSEI - LOG(logINFO, ("Received %d Bytes\n", n)); + LOG(logINFO, ("Received %d Bytes\n", n)); #endif - LOG(logINFO, ("Received HV: '%s'\n",buffer)); - /*Feb_Control_OpenSerialCommunication();*/ - if (!sscanf(buffer,"%d",value)) { - LOG(logERROR, ("failed to scan high voltage read\n")); - return 0; - } - } - return 1; + LOG(logINFO, ("Received HV: '%s'\n", buffer)); + /*Feb_Control_OpenSerialCommunication();*/ + if (!sscanf(buffer, "%d", value)) { + LOG(logERROR, ("failed to scan high voltage read\n")); + return 0; + } + } + return 1; } +int Feb_Control_DecodeDACString(char *dac_str, unsigned int *module_index, + int *top, int *bottom, unsigned int *dac_ch) { + char *local_s = dac_str; + *module_index = Feb_Control_current_index; + *top = 1; // make them both 1 instead of this + *bottom = 1; + if (Module_BottomAddressIsValid(&modules[*module_index])) + *top = 0; + else + *bottom = 0; + *dac_ch = 0; + if (!Feb_Control_GetDACNumber(local_s, dac_ch)) { + LOG(logERROR, ("invalid dac_name: %s (%s)\n", dac_str, local_s)); + return 0; + } -int Feb_Control_DecodeDACString(char* dac_str, unsigned int* module_index, int* top, int* bottom, unsigned int* dac_ch) { - char* local_s = dac_str; - *module_index = Feb_Control_current_index; - *top = 1;//make them both 1 instead of this - *bottom = 1; - - if (Module_BottomAddressIsValid(&modules[*module_index])) - *top=0; - else - *bottom=0; - - *dac_ch = 0; - if (!Feb_Control_GetDACNumber(local_s,dac_ch)) { - LOG(logERROR, ("invalid dac_name: %s (%s)\n",dac_str,local_s)); - return 0; - } - - return 1; + return 1; } -int Feb_Control_SetDAC(char* dac_str, int value, int is_a_voltage_mv) { - unsigned int i; - unsigned int module_index, dac_ch; - int top, bottom; - if (!Feb_Control_DecodeDACString(dac_str,&module_index,&top,&bottom,&dac_ch)) return 0; +int Feb_Control_SetDAC(char *dac_str, int value, int is_a_voltage_mv) { + unsigned int i; + unsigned int module_index, dac_ch; + int top, bottom; + if (!Feb_Control_DecodeDACString(dac_str, &module_index, &top, &bottom, + &dac_ch)) + return 0; - unsigned int v = value; - if (is_a_voltage_mv&&!Feb_Control_VoltageToDAC(value,&v,4096,0,2048)) { - LOG(logERROR, ("SetDac bad value, %d. The range is 0 to 2048 mV.\n",value)); - return 0; - } - if (v<0||v>4095) { - LOG(logERROR, ("SetDac bad value, %d. The range is 0 to 4095.\n",v)); - return 0; - } + unsigned int v = value; + if (is_a_voltage_mv && + !Feb_Control_VoltageToDAC(value, &v, 4096, 0, 2048)) { + LOG(logERROR, + ("SetDac bad value, %d. The range is 0 to 2048 mV.\n", value)); + return 0; + } + if (v < 0 || v > 4095) { + LOG(logERROR, ("SetDac bad value, %d. The range is 0 to 4095.\n", v)); + return 0; + } - if (top&&Module_TopAddressIsValid(&modules[module_index])) { + if (top && Module_TopAddressIsValid(&modules[module_index])) { - if (!Feb_Control_SendDACValue(Module_GetTopRightAddress(&modules[module_index]),dac_ch,&v)) return 0; + if (!Feb_Control_SendDACValue( + Module_GetTopRightAddress(&modules[module_index]), dac_ch, &v)) + return 0; + if (module_index != 0) + Module_SetTopDACValue(&modules[module_index], dac_ch, v); + else + for (i = 0; i < moduleSize; i++) + Module_SetTopDACValue(&modules[i], dac_ch, v); + } - if (module_index!=0) Module_SetTopDACValue(&modules[module_index],dac_ch,v); - else for(i=0;i=Module_ndacs) { - LOG(logERROR, ("GetDACName index out of range, %d invalid.\n",dac_num)); - return 0; - } - strcpy(s,Module_dac_names[dac_num]); - return 1; +int Feb_Control_GetDACName(unsigned int dac_num, char *s) { + if (dac_num >= Module_ndacs) { + LOG(logERROR, + ("GetDACName index out of range, %d invalid.\n", dac_num)); + return 0; + } + strcpy(s, Module_dac_names[dac_num]); + return 1; } -int Feb_Control_GetDACNumber(char* s, unsigned int* n) { - unsigned int i; - for(i=0;i 15) { + LOG(logERROR, ("invalid ch for SetDAC.\n")); + return 0; + } - if (ch<0||ch>15) { - LOG(logERROR, ("invalid ch for SetDAC.\n")); - return 0; - } + // if (voltage<0) return PowerDownDAC(socket_num,ch); - //if (voltage<0) return PowerDownDAC(socket_num,ch); + *value &= 0xfff; + unsigned int dac_ic = (ch < 8) ? 1 : 2; + unsigned int dac_ch = ch % 8; + unsigned int r = + dac_ic << 30 | 3 << 16 | dac_ch << 12 | *value; // 3 write and power up - *value&=0xfff; - unsigned int dac_ic = (ch<8) ? 1:2; - unsigned int dac_ch = ch%8; - unsigned int r = dac_ic<<30 | 3<<16 | dac_ch<<12 | *value; //3 write and power up + if (Feb_Control_activated) { + if (!Feb_Interface_WriteRegister(dst_num, 0, r, 1, 0)) { + LOG(logERROR, ("trouble setting dac %d voltage.\n", ch)); + return 0; + } + } + float voltage = Feb_Control_DACToVoltage(*value, 4096, 0, 2048); - if (Feb_Control_activated) { - if (!Feb_Interface_WriteRegister(dst_num,0,r,1,0)) { - LOG(logERROR, ("trouble setting dac %d voltage.\n",ch)); - return 0; - } - } - - float voltage=Feb_Control_DACToVoltage(*value,4096,0,2048); - - LOG(logINFO, ("%s set to %d (%.2fmV)\n", Module_dac_names[ch],*value,voltage)); - LOG(logDEBUG1, ("Dac number %d (%s) of dst %d set to %d (%f mV)\n",ch,Module_dac_names[ch],dst_num,*value,voltage)); - return 1; + LOG(logINFO, + ("%s set to %d (%.2fmV)\n", Module_dac_names[ch], *value, voltage)); + LOG(logDEBUG1, ("Dac number %d (%s) of dst %d set to %d (%f mV)\n", ch, + Module_dac_names[ch], dst_num, *value, voltage)); + return 1; } +int Feb_Control_SetTrimbits(unsigned int module_num, unsigned int *trimbits, + int top) { + LOG(logINFO, ("Setting Trimbits\n")); + // for (int iy=10000;iy<20020;++iy)//263681 + // for (int iy=263670;iy<263680;++iy)//263681 + // LOG(logINFO, ("%d:%c\t\t",iy,trimbits[iy])); -int Feb_Control_SetTrimbits(unsigned int module_num, unsigned int *trimbits, int top) { - LOG(logINFO, ("Setting Trimbits\n")); + unsigned int trimbits_to_load_l[1024]; + unsigned int trimbits_to_load_r[1024]; - //for (int iy=10000;iy<20020;++iy)//263681 - //for (int iy=263670;iy<263680;++iy)//263681 - // LOG(logINFO, ("%d:%c\t\t",iy,trimbits[iy])); + unsigned int module_index = 0; + if (!Feb_Control_GetModuleIndex(module_num, &module_index)) { + LOG(logERROR, ("could not set trimbits, bad module number.\n")); + return 0; + } - unsigned int trimbits_to_load_l[1024]; - unsigned int trimbits_to_load_r[1024]; + if (Feb_Control_Reset() == STATUS_ERROR) { + LOG(logERROR, ("could not reset DAQ.\n")); + } + int l_r; + for (l_r = 0; l_r < 2; l_r++) { // l_r loop + unsigned int disable_chip_mask = + l_r ? DAQ_CS_BAR_LEFT : DAQ_CS_BAR_RIGHT; + if (Feb_Control_activated) { + if (!(Feb_Interface_WriteRegister(0xfff, DAQ_REG_STATIC_BITS, + disable_chip_mask | + DAQ_STATIC_BIT_PROGRAM | + DAQ_STATIC_BIT_M8, + 0, 0) && + Feb_Control_SetCommandRegister(DAQ_SET_STATIC_BIT) && + (Feb_Control_StartDAQOnlyNWaitForFinish(5000) == + STATUS_IDLE))) { + LOG(logERROR, ("Could not select chips\n")); + return 0; + } + } - unsigned int module_index=0; - if (!Feb_Control_GetModuleIndex(module_num,&module_index)) { - LOG(logERROR, ("could not set trimbits, bad module number.\n")); - return 0; - } + int row_set; + for (row_set = 0; row_set < 16; row_set++) { // 16 rows at a time + if (row_set == 0) { + if (!Feb_Control_SetCommandRegister( + DAQ_RESET_COMPLETELY | DAQ_SEND_A_TOKEN_IN | + DAQ_LOAD_16ROWS_OF_TRIMBITS)) { + LOG(logERROR, ("Could not Feb_Control_SetCommandRegister " + "for loading trim bits.\n")); + return 0; + } + } else { + if (!Feb_Control_SetCommandRegister( + DAQ_LOAD_16ROWS_OF_TRIMBITS)) { + LOG(logERROR, ("Could not Feb_Control_SetCommandRegister " + "for loading trim bits.\n")); + return 0; + } + } - if (Feb_Control_Reset() == STATUS_ERROR) { - LOG(logERROR, ("could not reset DAQ.\n")); - } - int l_r; - for(l_r=0;l_r<2;l_r++) { // l_r loop - unsigned int disable_chip_mask = l_r ? DAQ_CS_BAR_LEFT : DAQ_CS_BAR_RIGHT; - if (Feb_Control_activated) { - if (!(Feb_Interface_WriteRegister(0xfff,DAQ_REG_STATIC_BITS,disable_chip_mask|DAQ_STATIC_BIT_PROGRAM|DAQ_STATIC_BIT_M8,0,0) - &&Feb_Control_SetCommandRegister(DAQ_SET_STATIC_BIT) - &&(Feb_Control_StartDAQOnlyNWaitForFinish(5000) == STATUS_IDLE))) { - LOG(logERROR, ("Could not select chips\n")); - return 0; - } - } + int row; + for (row = 0; row < 16; row++) { // row loop + int offset = 2 * 32 * row; + int sc; + for (sc = 0; sc < 32; sc++) { // supercolumn loop sc + int super_column_start_position_l = + 1030 * row + l_r * 258 + sc * 8; + int super_column_start_position_r = + 1030 * row + 516 + l_r * 258 + sc * 8; - int row_set; - for(row_set=0;row_set<16;row_set++) { //16 rows at a time - if (row_set==0) { - if (!Feb_Control_SetCommandRegister(DAQ_RESET_COMPLETELY|DAQ_SEND_A_TOKEN_IN|DAQ_LOAD_16ROWS_OF_TRIMBITS)) { - LOG(logERROR, ("Could not Feb_Control_SetCommandRegister for loading trim bits.\n")); - return 0; - } - } else { - if (!Feb_Control_SetCommandRegister(DAQ_LOAD_16ROWS_OF_TRIMBITS)) { - LOG(logERROR, ("Could not Feb_Control_SetCommandRegister for loading trim bits.\n")); - return 0; - } - } + /* + int super_column_start_position_l = 1024*row + l_r + *256 + sc*8; //256 per row, 8 per super column int + super_column_start_position_r = 1024*row + 512 + l_r *256 + + sc*8; //256 per row, 8 per super column + */ + int chip_sc = 31 - sc; + trimbits_to_load_l[offset + chip_sc] = 0; + trimbits_to_load_r[offset + chip_sc] = 0; + trimbits_to_load_l[offset + chip_sc + 32] = 0; + trimbits_to_load_r[offset + chip_sc + 32] = 0; + int i; + for (i = 0; i < 8; i++) { // column loop i - int row; - for(row=0;row<16;row++) { //row loop - int offset = 2*32*row; - int sc; - for(sc=0;sc<32;sc++) { //supercolumn loop sc - int super_column_start_position_l = 1030*row + l_r *258 + sc*8; - int super_column_start_position_r = 1030*row + 516 + l_r *258 + sc*8; + if (top == 1) { + trimbits_to_load_l[offset + chip_sc] |= + (0x7 & + trimbits[row_set * 16480 + + super_column_start_position_l + i]) + << ((7 - i) * 4); // low + trimbits_to_load_l[offset + chip_sc + 32] |= + ((0x38 & + trimbits[row_set * 16480 + + super_column_start_position_l + + i]) >> + 3) + << ((7 - i) * 4); // upper + trimbits_to_load_r[offset + chip_sc] |= + (0x7 & + trimbits[row_set * 16480 + + super_column_start_position_r + i]) + << ((7 - i) * 4); // low + trimbits_to_load_r[offset + chip_sc + 32] |= + ((0x38 & + trimbits[row_set * 16480 + + super_column_start_position_r + + i]) >> + 3) + << ((7 - i) * 4); // upper + } else { + trimbits_to_load_l[offset + chip_sc] |= + (0x7 & + trimbits[263679 - + (row_set * 16480 + + super_column_start_position_l + i)]) + << ((7 - i) * 4); // low + trimbits_to_load_l[offset + chip_sc + 32] |= + ((0x38 & + trimbits[263679 - + (row_set * 16480 + + super_column_start_position_l + + i)]) >> + 3) + << ((7 - i) * 4); // upper + trimbits_to_load_r[offset + chip_sc] |= + (0x7 & + trimbits[263679 - + (row_set * 16480 + + super_column_start_position_r + i)]) + << ((7 - i) * 4); // low + trimbits_to_load_r[offset + chip_sc + 32] |= + ((0x38 & + trimbits[263679 - + (row_set * 16480 + + super_column_start_position_r + + i)]) >> + 3) + << ((7 - i) * 4); // upper + } + } // end column loop i + } // end supercolumn loop sc + } // end row loop - /* - int super_column_start_position_l = 1024*row + l_r *256 + sc*8; //256 per row, 8 per super column - int super_column_start_position_r = 1024*row + 512 + l_r *256 + sc*8; //256 per row, 8 per super column - */ - int chip_sc = 31 - sc; - trimbits_to_load_l[offset+chip_sc] = 0; - trimbits_to_load_r[offset+chip_sc] = 0; - trimbits_to_load_l[offset+chip_sc+32] = 0; - trimbits_to_load_r[offset+chip_sc+32] = 0; - int i; - for(i=0;i<8;i++) { // column loop i + if (Module_TopAddressIsValid(&modules[1])) { + if (Feb_Control_activated) { + if (!Feb_Interface_WriteMemoryInLoops( + Module_GetTopLeftAddress( + &modules[Feb_Control_current_index]), + 0, 0, 1024, trimbits_to_load_l) || + !Feb_Interface_WriteMemoryInLoops( + Module_GetTopRightAddress( + &modules[Feb_Control_current_index]), + 0, 0, 1024, trimbits_to_load_r) || + // if + // (!Feb_Interface_WriteMemory(Module_GetTopLeftAddress(&modules[0]),0,0,1023,trimbits_to_load_r)|| + // !Feb_Interface_WriteMemory(Module_GetTopRightAddress(&modules[0]),0,0,1023,trimbits_to_load_l)|| + (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != + STATUS_IDLE)) { + LOG(logERROR, (" some errror!\n")); + return 0; + } + } + } else { + if (Feb_Control_activated) { + if (!Feb_Interface_WriteMemoryInLoops( + Module_GetBottomLeftAddress( + &modules[Feb_Control_current_index]), + 0, 0, 1024, trimbits_to_load_l) || + !Feb_Interface_WriteMemoryInLoops( + Module_GetBottomRightAddress( + &modules[Feb_Control_current_index]), + 0, 0, 1024, trimbits_to_load_r) || + // if + // (!Feb_Interface_WriteMemory(Module_GetTopLeftAddress(&modules[0]),0,0,1023,trimbits_to_load_r)|| + // !Feb_Interface_WriteMemory(Module_GetTopRightAddress(&modules[0]),0,0,1023,trimbits_to_load_l)|| + (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != + STATUS_IDLE)) { + LOG(logERROR, (" some errror!\n")); + return 0; + } + } + } - if (top==1) { - trimbits_to_load_l[offset+chip_sc] |= ( 0x7 & trimbits[row_set*16480+super_column_start_position_l+i])<<((7-i)*4);//low - trimbits_to_load_l[offset+chip_sc+32] |= ((0x38 & trimbits[row_set*16480+super_column_start_position_l+i])>>3)<<((7-i)*4);//upper - trimbits_to_load_r[offset+chip_sc] |= ( 0x7 & trimbits[row_set*16480+super_column_start_position_r+i])<<((7-i)*4);//low - trimbits_to_load_r[offset+chip_sc+32] |= ((0x38 & trimbits[row_set*16480+super_column_start_position_r+i])>>3)<<((7-i)*4);//upper - } else { - trimbits_to_load_l[offset+chip_sc] |= ( 0x7 & trimbits[263679 - (row_set*16480+super_column_start_position_l+i)])<<((7-i)*4);//low - trimbits_to_load_l[offset+chip_sc+32] |= ((0x38 & trimbits[263679 - (row_set*16480+super_column_start_position_l+i)])>>3)<<((7-i)*4);//upper - trimbits_to_load_r[offset+chip_sc] |= ( 0x7 & trimbits[263679 - (row_set*16480+super_column_start_position_r+i)])<<((7-i)*4);//low - trimbits_to_load_r[offset+chip_sc+32] |= ((0x38 & trimbits[263679 - (row_set*16480+super_column_start_position_r+i)])>>3)<<((7-i)*4);//upper + } // end row_set loop (groups of 16 rows) + } // end l_r loop - } - } // end column loop i - } //end supercolumn loop sc - } //end row loop + memcpy(Feb_Control_last_downloaded_trimbits, trimbits, + Feb_Control_trimbit_size * sizeof(unsigned int)); - if (Module_TopAddressIsValid(&modules[1])) { - if (Feb_Control_activated) { - if (!Feb_Interface_WriteMemoryInLoops(Module_GetTopLeftAddress(&modules[Feb_Control_current_index]),0,0,1024,trimbits_to_load_l)|| - !Feb_Interface_WriteMemoryInLoops(Module_GetTopRightAddress(&modules[Feb_Control_current_index]),0,0,1024,trimbits_to_load_r)|| - //if (!Feb_Interface_WriteMemory(Module_GetTopLeftAddress(&modules[0]),0,0,1023,trimbits_to_load_r)|| - // !Feb_Interface_WriteMemory(Module_GetTopRightAddress(&modules[0]),0,0,1023,trimbits_to_load_l)|| - (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { - LOG(logERROR, (" some errror!\n")); - return 0; - } - } - } else { - if (Feb_Control_activated) { - if (!Feb_Interface_WriteMemoryInLoops(Module_GetBottomLeftAddress(&modules[Feb_Control_current_index]),0,0,1024,trimbits_to_load_l)|| - !Feb_Interface_WriteMemoryInLoops(Module_GetBottomRightAddress(&modules[Feb_Control_current_index]),0,0,1024,trimbits_to_load_r)|| - //if (!Feb_Interface_WriteMemory(Module_GetTopLeftAddress(&modules[0]),0,0,1023,trimbits_to_load_r)|| - // !Feb_Interface_WriteMemory(Module_GetTopRightAddress(&modules[0]),0,0,1023,trimbits_to_load_l)|| - (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { - LOG(logERROR, (" some errror!\n")); - return 0; - } - } - } - - } //end row_set loop (groups of 16 rows) - } // end l_r loop - - memcpy(Feb_Control_last_downloaded_trimbits,trimbits,Feb_Control_trimbit_size*sizeof(unsigned int)); - - return Feb_Control_SetStaticBits(); //send the static bits + return Feb_Control_SetStaticBits(); // send the static bits } - -unsigned int* Feb_Control_GetTrimbits() { - return Feb_Control_last_downloaded_trimbits; +unsigned int *Feb_Control_GetTrimbits() { + return Feb_Control_last_downloaded_trimbits; } - - - unsigned int Feb_Control_AddressToAll() { - LOG(logDEBUG1, ("in Feb_Control_AddressToAll()\n")); + LOG(logDEBUG1, ("in Feb_Control_AddressToAll()\n")); + if (moduleSize == 0) + return 0; + if (Module_BottomAddressIsValid(&modules[1])) { + // if (Feb_Control_am_i_master) + return Module_GetBottomLeftAddress(&modules[1]) | + Module_GetBottomRightAddress(&modules[1]); + // else return 0; + } - if (moduleSize==0) return 0; - - - if (Module_BottomAddressIsValid(&modules[1])) { - //if (Feb_Control_am_i_master) - return Module_GetBottomLeftAddress(&modules[1])|Module_GetBottomRightAddress(&modules[1]); - // else return 0; - } - - return Module_GetTopLeftAddress(&modules[1])|Module_GetTopRightAddress(&modules[1]); - //return Module_GetTopLeftAddress(&modules[0])|Module_GetTopRightAddress(&modules[0]); - - + return Module_GetTopLeftAddress(&modules[1]) | + Module_GetTopRightAddress(&modules[1]); + // return + // Module_GetTopLeftAddress(&modules[0])|Module_GetTopRightAddress(&modules[0]); } int Feb_Control_SetCommandRegister(unsigned int cmd) { - if (Feb_Control_activated) - return Feb_Interface_WriteRegister(Feb_Control_AddressToAll(),DAQ_REG_CHIP_CMDS,cmd,0,0); - else - return 1; + if (Feb_Control_activated) + return Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), + DAQ_REG_CHIP_CMDS, cmd, 0, 0); + else + return 1; } +int Feb_Control_GetDAQStatusRegister(unsigned int dst_address, + unsigned int *ret_status) { + // if deactivated, should be handled earlier and should not get into this + // function + if (Feb_Control_activated) { + if (!Feb_Interface_ReadRegister(dst_address, DAQ_REG_STATUS, + ret_status)) { + LOG(logERROR, ("Error: reading status register.\n")); + return 0; + } + } -int Feb_Control_GetDAQStatusRegister(unsigned int dst_address, unsigned int* ret_status) { - //if deactivated, should be handled earlier and should not get into this function - if (Feb_Control_activated) { - if (!Feb_Interface_ReadRegister(dst_address,DAQ_REG_STATUS,ret_status)) { - LOG(logERROR, ("Error: reading status register.\n")); - return 0; - } - } - - *ret_status = (0x02FF0000 & *ret_status) >> 16; - return 1; + *ret_status = (0x02FF0000 & *ret_status) >> 16; + return 1; } - int Feb_Control_StartDAQOnlyNWaitForFinish(int sleep_time_us) { - if (Feb_Control_activated) { - if (!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(),DAQ_REG_CTRL,0,0,0)||!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(),DAQ_REG_CTRL,DAQ_CTRL_START,0,0)) { - LOG(logERROR, ("could not start.\n")); - return 0; - } - } - return Feb_Control_WaitForFinishedFlag(sleep_time_us); + if (Feb_Control_activated) { + if (!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), + DAQ_REG_CTRL, 0, 0, 0) || + !Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), + DAQ_REG_CTRL, DAQ_CTRL_START, 0, 0)) { + LOG(logERROR, ("could not start.\n")); + return 0; + } + } + return Feb_Control_WaitForFinishedFlag(sleep_time_us); } - int Feb_Control_AcquisitionInProgress() { - unsigned int status_reg_r=0,status_reg_l=0; + unsigned int status_reg_r = 0, status_reg_l = 0; - //deactivated should return end of acquisition - if (!Feb_Control_activated) - return STATUS_IDLE; + // deactivated should return end of acquisition + if (!Feb_Control_activated) + return STATUS_IDLE; - int ind = Feb_Control_current_index; - if (Module_BottomAddressIsValid(&modules[ind])) { + int ind = Feb_Control_current_index; + if (Module_BottomAddressIsValid(&modules[ind])) { - if (!(Feb_Control_GetDAQStatusRegister(Module_GetBottomRightAddress(&modules[ind]),&status_reg_r))) - {LOG(logERROR, ("Error: Trouble reading Status register. bottom right address\n"));return STATUS_ERROR;} - if (!(Feb_Control_GetDAQStatusRegister(Module_GetBottomLeftAddress(&modules[ind]),&status_reg_l))) - {LOG(logERROR, ("Error: Trouble reading Status register. bottom left address\n"));return STATUS_ERROR;} + if (!(Feb_Control_GetDAQStatusRegister( + Module_GetBottomRightAddress(&modules[ind]), &status_reg_r))) { + LOG(logERROR, ("Error: Trouble reading Status register. bottom " + "right address\n")); + return STATUS_ERROR; + } + if (!(Feb_Control_GetDAQStatusRegister( + Module_GetBottomLeftAddress(&modules[ind]), &status_reg_l))) { + LOG(logERROR, ("Error: Trouble reading Status register. bottom " + "left address\n")); + return STATUS_ERROR; + } - } else { - if (!(Feb_Control_GetDAQStatusRegister(Module_GetTopRightAddress(&modules[ind]),&status_reg_r))) - {LOG(logERROR, ("Error: Trouble reading Status register. top right address\n"));return STATUS_ERROR;} - if (!(Feb_Control_GetDAQStatusRegister(Module_GetTopLeftAddress(&modules[ind]),&status_reg_l))) - {LOG(logERROR, ("Error: Trouble reading Status register. top left address\n"));return STATUS_ERROR;} - } + } else { + if (!(Feb_Control_GetDAQStatusRegister( + Module_GetTopRightAddress(&modules[ind]), &status_reg_r))) { + LOG(logERROR, ("Error: Trouble reading Status register. top right " + "address\n")); + return STATUS_ERROR; + } + if (!(Feb_Control_GetDAQStatusRegister( + Module_GetTopLeftAddress(&modules[ind]), &status_reg_l))) { + LOG(logERROR, + ("Error: Trouble reading Status register. top left address\n")); + return STATUS_ERROR; + } + } - //running - if ((status_reg_r|status_reg_l)&DAQ_STATUS_DAQ_RUNNING) { - LOG(logDEBUG1, ("**runningggg\n")); - return STATUS_RUNNING; - } - //idle - return STATUS_IDLE; + // running + if ((status_reg_r | status_reg_l) & DAQ_STATUS_DAQ_RUNNING) { + LOG(logDEBUG1, ("**runningggg\n")); + return STATUS_RUNNING; + } + // idle + return STATUS_IDLE; } - int Feb_Control_AcquisitionStartedBit() { - unsigned int status_reg_r=0,status_reg_l=0; + unsigned int status_reg_r = 0, status_reg_l = 0; - //deactivated should return acquisition started/ready - if (!Feb_Control_activated) - return 1; + // deactivated should return acquisition started/ready + if (!Feb_Control_activated) + return 1; - int ind = Feb_Control_current_index; - if (Module_BottomAddressIsValid(&modules[ind])) { + int ind = Feb_Control_current_index; + if (Module_BottomAddressIsValid(&modules[ind])) { - if (!(Feb_Control_GetDAQStatusRegister(Module_GetBottomRightAddress(&modules[ind]),&status_reg_r))) - {LOG(logERROR, ("Error: Trouble reading Status register. bottom right address\n"));return -1;} - if (!(Feb_Control_GetDAQStatusRegister(Module_GetBottomLeftAddress(&modules[ind]),&status_reg_l))) - {LOG(logERROR, ("Error: Trouble reading Status register. bottom left address\n"));return -1;} + if (!(Feb_Control_GetDAQStatusRegister( + Module_GetBottomRightAddress(&modules[ind]), &status_reg_r))) { + LOG(logERROR, ("Error: Trouble reading Status register. bottom " + "right address\n")); + return -1; + } + if (!(Feb_Control_GetDAQStatusRegister( + Module_GetBottomLeftAddress(&modules[ind]), &status_reg_l))) { + LOG(logERROR, ("Error: Trouble reading Status register. bottom " + "left address\n")); + return -1; + } - } else { - if (!(Feb_Control_GetDAQStatusRegister(Module_GetTopRightAddress(&modules[ind]),&status_reg_r))) - {LOG(logERROR, ("Error: Trouble reading Status register. top right address\n")); return -1;} - if (!(Feb_Control_GetDAQStatusRegister(Module_GetTopLeftAddress(&modules[ind]),&status_reg_l))) - {LOG(logERROR, ("Error: Trouble reading Status register. top left address\n"));return -1;} - } + } else { + if (!(Feb_Control_GetDAQStatusRegister( + Module_GetTopRightAddress(&modules[ind]), &status_reg_r))) { + LOG(logERROR, ("Error: Trouble reading Status register. top right " + "address\n")); + return -1; + } + if (!(Feb_Control_GetDAQStatusRegister( + Module_GetTopLeftAddress(&modules[ind]), &status_reg_l))) { + LOG(logERROR, + ("Error: Trouble reading Status register. top left address\n")); + return -1; + } + } - //doesnt mean it started, just the bit - if ((status_reg_r|status_reg_l)&DAQ_STATUS_DAQ_RUN_TOGGLE) - return 1; + // doesnt mean it started, just the bit + if ((status_reg_r | status_reg_l) & DAQ_STATUS_DAQ_RUN_TOGGLE) + return 1; - return 0; + return 0; } - - int Feb_Control_WaitForFinishedFlag(int sleep_time_us) { - int is_running = Feb_Control_AcquisitionInProgress(); + int is_running = Feb_Control_AcquisitionInProgress(); - int check_error = 0; + int check_error = 0; - // it will break out if it is idle or if check_error is more than 5 times - while(is_running != STATUS_IDLE) { - usleep(sleep_time_us); - is_running = Feb_Control_AcquisitionInProgress(); + // it will break out if it is idle or if check_error is more than 5 times + while (is_running != STATUS_IDLE) { + usleep(sleep_time_us); + is_running = Feb_Control_AcquisitionInProgress(); - // check error only 5 times (ensuring it is not something that happens sometimes) - if (is_running == STATUS_ERROR) { - if (check_error == 5) - break; - check_error++; - }// reset check_error for next time - else check_error = 0; + // check error only 5 times (ensuring it is not something that happens + // sometimes) + if (is_running == STATUS_ERROR) { + if (check_error == 5) + break; + check_error++; + } // reset check_error for next time + else + check_error = 0; + } - } - - return is_running; + return is_running; } - int Feb_Control_WaitForStartedFlag(int sleep_time_us, int prev_flag) { - //deactivated dont wait (otherwise give a toggle value back) - if (!Feb_Control_activated) - return 1; + // deactivated dont wait (otherwise give a toggle value back) + if (!Feb_Control_activated) + return 1; - //did not start - if (prev_flag == -1) - return 0; + // did not start + if (prev_flag == -1) + return 0; - int value = prev_flag; - while(value == prev_flag) { - usleep(sleep_time_us); - value = Feb_Control_AcquisitionStartedBit(); - } + int value = prev_flag; + while (value == prev_flag) { + usleep(sleep_time_us); + value = Feb_Control_AcquisitionStartedBit(); + } - //did not start - if (value == -1) - return 0; + // did not start + if (value == -1) + return 0; - return 1; + return 1; } - int Feb_Control_Reset() { - LOG(logINFO, ("Reset daq\n")); - if (Feb_Control_activated) { - if (!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(),DAQ_REG_CTRL,0,0,0) || !Feb_Interface_WriteRegister(Feb_Control_AddressToAll(),DAQ_REG_CTRL,DAQ_CTRL_RESET,0,0) || !Feb_Interface_WriteRegister(Feb_Control_AddressToAll(),DAQ_REG_CTRL,0,0,0)) { - LOG(logERROR, ("Could not reset daq, no response.\n")); - return 0; - } - } + LOG(logINFO, ("Reset daq\n")); + if (Feb_Control_activated) { + if (!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), + DAQ_REG_CTRL, 0, 0, 0) || + !Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), + DAQ_REG_CTRL, DAQ_CTRL_RESET, 0, 0) || + !Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), + DAQ_REG_CTRL, 0, 0, 0)) { + LOG(logERROR, ("Could not reset daq, no response.\n")); + return 0; + } + } - return Feb_Control_WaitForFinishedFlag(5000); + return Feb_Control_WaitForFinishedFlag(5000); } - - - int Feb_Control_SetStaticBits() { - if (Feb_Control_activated) { - //program=1,m4=2,m8=4,test=8,rotest=16,cs_bar_left=32,cs_bar_right=64 - if (!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(),DAQ_REG_STATIC_BITS,Feb_Control_staticBits,0,0) || - !Feb_Control_SetCommandRegister(DAQ_SET_STATIC_BIT) || - (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { - LOG(logERROR, ("Could not set static bits\n")); - return 0; - } - } + if (Feb_Control_activated) { + // program=1,m4=2,m8=4,test=8,rotest=16,cs_bar_left=32,cs_bar_right=64 + if (!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), + DAQ_REG_STATIC_BITS, + Feb_Control_staticBits, 0, 0) || + !Feb_Control_SetCommandRegister(DAQ_SET_STATIC_BIT) || + (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { + LOG(logERROR, ("Could not set static bits\n")); + return 0; + } + } - return 1; + return 1; } int Feb_Control_SetStaticBits1(unsigned int the_static_bits) { - Feb_Control_staticBits = the_static_bits; - return Feb_Control_SetStaticBits(); + Feb_Control_staticBits = the_static_bits; + return Feb_Control_SetStaticBits(); } int Feb_Control_SetInTestModeVariable(int on) { - if (on) Feb_Control_staticBits |= DAQ_STATIC_BIT_CHIP_TEST; //setting test bit to high - else Feb_Control_staticBits &= (~DAQ_STATIC_BIT_CHIP_TEST); //setting test bit to low - return 1; + if (on) + Feb_Control_staticBits |= + DAQ_STATIC_BIT_CHIP_TEST; // setting test bit to high + else + Feb_Control_staticBits &= + (~DAQ_STATIC_BIT_CHIP_TEST); // setting test bit to low + return 1; } int Feb_Control_GetTestModeVariable() { - return Feb_Control_staticBits&DAQ_STATIC_BIT_CHIP_TEST; + return Feb_Control_staticBits & DAQ_STATIC_BIT_CHIP_TEST; } int Feb_Control_SetDynamicRange(unsigned int four_eight_sixteen_or_thirtytwo) { - static unsigned int everything_but_bit_mode = DAQ_STATIC_BIT_PROGRAM|DAQ_STATIC_BIT_CHIP_TEST|DAQ_STATIC_BIT_ROTEST; - if (four_eight_sixteen_or_thirtytwo==4) { - Feb_Control_staticBits = DAQ_STATIC_BIT_M4 | (Feb_Control_staticBits&everything_but_bit_mode); //leave test bits in currernt state - Feb_Control_subFrameMode &= ~DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING; - } else if (four_eight_sixteen_or_thirtytwo==8) { - Feb_Control_staticBits = DAQ_STATIC_BIT_M8 | (Feb_Control_staticBits&everything_but_bit_mode); - Feb_Control_subFrameMode &= ~DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING; - } else if (four_eight_sixteen_or_thirtytwo==16) { - Feb_Control_staticBits = DAQ_STATIC_BIT_M12 | (Feb_Control_staticBits&everything_but_bit_mode); - Feb_Control_subFrameMode &= ~DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING; - } else if (four_eight_sixteen_or_thirtytwo==32) { - Feb_Control_staticBits = DAQ_STATIC_BIT_M12 | (Feb_Control_staticBits&everything_but_bit_mode); - Feb_Control_subFrameMode |= DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING; - } else { - LOG(logERROR, ("dynamic range (%d) not valid, not setting bit mode.\n",four_eight_sixteen_or_thirtytwo)); - LOG(logINFO, ("Set dynamic range int must equal 4,8 16, or 32.\n")); - return 0; - } + static unsigned int everything_but_bit_mode = DAQ_STATIC_BIT_PROGRAM | + DAQ_STATIC_BIT_CHIP_TEST | + DAQ_STATIC_BIT_ROTEST; + if (four_eight_sixteen_or_thirtytwo == 4) { + Feb_Control_staticBits = + DAQ_STATIC_BIT_M4 | + (Feb_Control_staticBits & + everything_but_bit_mode); // leave test bits in currernt state + Feb_Control_subFrameMode &= ~DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING; + } else if (four_eight_sixteen_or_thirtytwo == 8) { + Feb_Control_staticBits = DAQ_STATIC_BIT_M8 | (Feb_Control_staticBits & + everything_but_bit_mode); + Feb_Control_subFrameMode &= ~DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING; + } else if (four_eight_sixteen_or_thirtytwo == 16) { + Feb_Control_staticBits = DAQ_STATIC_BIT_M12 | (Feb_Control_staticBits & + everything_but_bit_mode); + Feb_Control_subFrameMode &= ~DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING; + } else if (four_eight_sixteen_or_thirtytwo == 32) { + Feb_Control_staticBits = DAQ_STATIC_BIT_M12 | (Feb_Control_staticBits & + everything_but_bit_mode); + Feb_Control_subFrameMode |= DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING; + } else { + LOG(logERROR, ("dynamic range (%d) not valid, not setting bit mode.\n", + four_eight_sixteen_or_thirtytwo)); + LOG(logINFO, ("Set dynamic range int must equal 4,8 16, or 32.\n")); + return 0; + } - LOG(logINFO, ("Dynamic range set to %d\n",four_eight_sixteen_or_thirtytwo)); - return 1; + LOG(logINFO, + ("Dynamic range set to %d\n", four_eight_sixteen_or_thirtytwo)); + return 1; } unsigned int Feb_Control_GetDynamicRange() { - if (Feb_Control_subFrameMode&DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING) return 32; - else if (DAQ_STATIC_BIT_M4&Feb_Control_staticBits) return 4; - else if (DAQ_STATIC_BIT_M8&Feb_Control_staticBits) return 8; + if (Feb_Control_subFrameMode & DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING) + return 32; + else if (DAQ_STATIC_BIT_M4 & Feb_Control_staticBits) + return 4; + else if (DAQ_STATIC_BIT_M8 & Feb_Control_staticBits) + return 8; - return 16; + return 16; } -int Feb_Control_SetReadoutSpeed(unsigned int readout_speed) { //0->full,1->half,2->quarter or 3->super_slow - Feb_Control_acquireNReadoutMode &= (~DAQ_CHIP_CONTROLLER_SUPER_SLOW_SPEED); - if (readout_speed==1) { - Feb_Control_acquireNReadoutMode |= DAQ_CHIP_CONTROLLER_HALF_SPEED; - LOG(logINFO, ("Speed set to half speed (50 MHz)\n")); - } else if (readout_speed==2) { - Feb_Control_acquireNReadoutMode |= DAQ_CHIP_CONTROLLER_QUARTER_SPEED; - LOG(logINFO, ("Speed set to quarter speed (25 MHz)\n")); - } else { - if (readout_speed) { - LOG(logERROR, ("readout speed %d unknown, defaulting to full speed.\n",readout_speed)); - LOG(logINFO, ("full speed, (100 MHz)\n")); - return 0; - } - LOG(logINFO, ("Speed set to full speed (100 MHz)\n")); - } +int Feb_Control_SetReadoutSpeed( + unsigned int readout_speed) { // 0->full,1->half,2->quarter or 3->super_slow + Feb_Control_acquireNReadoutMode &= (~DAQ_CHIP_CONTROLLER_SUPER_SLOW_SPEED); + if (readout_speed == 1) { + Feb_Control_acquireNReadoutMode |= DAQ_CHIP_CONTROLLER_HALF_SPEED; + LOG(logINFO, ("Speed set to half speed (50 MHz)\n")); + } else if (readout_speed == 2) { + Feb_Control_acquireNReadoutMode |= DAQ_CHIP_CONTROLLER_QUARTER_SPEED; + LOG(logINFO, ("Speed set to quarter speed (25 MHz)\n")); + } else { + if (readout_speed) { + LOG(logERROR, + ("readout speed %d unknown, defaulting to full speed.\n", + readout_speed)); + LOG(logINFO, ("full speed, (100 MHz)\n")); + return 0; + } + LOG(logINFO, ("Speed set to full speed (100 MHz)\n")); + } - return 1; + return 1; } -int Feb_Control_SetReadoutMode(unsigned int readout_mode) { //0->parallel,1->non-parallel,2-> safe_mode - Feb_Control_acquireNReadoutMode &= (~DAQ_NEXPOSURERS_PARALLEL_MODE); - if (readout_mode==1) { - Feb_Control_acquireNReadoutMode |= DAQ_NEXPOSURERS_NORMAL_NONPARALLEL_MODE; - LOG(logINFO, ("Readout mode set to Non Parallel\n")); - } else if (readout_mode==2) { - Feb_Control_acquireNReadoutMode |= DAQ_NEXPOSURERS_SAFEST_MODE_ROW_CLK_BEFORE_MODE; - LOG(logINFO, ("Readout mode set to Safe (row clk before main clk readout sequence)\n")); - } else { - Feb_Control_acquireNReadoutMode |= DAQ_NEXPOSURERS_PARALLEL_MODE; - if (readout_mode) { - LOG(logERROR, ("readout mode %d) unknown, defaulting to parallel readout.\n",readout_mode)); - LOG(logINFO, ("Readout mode set to Parallel\n")); - return 0; - } - LOG(logINFO, ("Readout mode set to Parallel\n")); - } +int Feb_Control_SetReadoutMode( + unsigned int readout_mode) { // 0->parallel,1->non-parallel,2-> safe_mode + Feb_Control_acquireNReadoutMode &= (~DAQ_NEXPOSURERS_PARALLEL_MODE); + if (readout_mode == 1) { + Feb_Control_acquireNReadoutMode |= + DAQ_NEXPOSURERS_NORMAL_NONPARALLEL_MODE; + LOG(logINFO, ("Readout mode set to Non Parallel\n")); + } else if (readout_mode == 2) { + Feb_Control_acquireNReadoutMode |= + DAQ_NEXPOSURERS_SAFEST_MODE_ROW_CLK_BEFORE_MODE; + LOG(logINFO, ("Readout mode set to Safe (row clk before main clk " + "readout sequence)\n")); + } else { + Feb_Control_acquireNReadoutMode |= DAQ_NEXPOSURERS_PARALLEL_MODE; + if (readout_mode) { + LOG(logERROR, + ("readout mode %d) unknown, defaulting to parallel readout.\n", + readout_mode)); + LOG(logINFO, ("Readout mode set to Parallel\n")); + return 0; + } + LOG(logINFO, ("Readout mode set to Parallel\n")); + } - return 1; + return 1; } -int Feb_Control_SetTriggerMode(unsigned int trigger_mode,int polarity) { - //"00"-> internal exposure time and period, - //"01"-> external acquistion start and internal exposure time and period, - //"10"-> external start trigger and internal exposure time, - //"11"-> external triggered start and stop of exposures - Feb_Control_triggerMode = (~DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START_AND_STOP); +int Feb_Control_SetTriggerMode(unsigned int trigger_mode, int polarity) { + //"00"-> internal exposure time and period, + //"01"-> external acquistion start and internal exposure time and period, + //"10"-> external start trigger and internal exposure time, + //"11"-> external triggered start and stop of exposures + Feb_Control_triggerMode = (~DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START_AND_STOP); - if (trigger_mode == 1) { - Feb_Control_triggerMode = DAQ_NEXPOSURERS_EXTERNAL_ACQUISITION_START; - LOG(logINFO, ("Trigger mode set to Burst Trigger\n")); - } else if (trigger_mode == 2) { - Feb_Control_triggerMode = DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START; - LOG(logINFO, ("Trigger mode set to Trigger Exposure\n")); - } else if (trigger_mode == 3) { - Feb_Control_triggerMode = DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START_AND_STOP; - LOG(logINFO, ("Trigger mode set to Gated\n")); - } else { - Feb_Control_triggerMode = DAQ_NEXPOSURERS_INTERNAL_ACQUISITION; - if (trigger_mode) { - LOG(logERROR, ("trigger %d) unknown, defaulting to Auto\n",trigger_mode)); - } + if (trigger_mode == 1) { + Feb_Control_triggerMode = DAQ_NEXPOSURERS_EXTERNAL_ACQUISITION_START; + LOG(logINFO, ("Trigger mode set to Burst Trigger\n")); + } else if (trigger_mode == 2) { + Feb_Control_triggerMode = DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START; + LOG(logINFO, ("Trigger mode set to Trigger Exposure\n")); + } else if (trigger_mode == 3) { + Feb_Control_triggerMode = DAQ_NEXPOSURERS_EXTERNAL_IMAGE_START_AND_STOP; + LOG(logINFO, ("Trigger mode set to Gated\n")); + } else { + Feb_Control_triggerMode = DAQ_NEXPOSURERS_INTERNAL_ACQUISITION; + if (trigger_mode) { + LOG(logERROR, + ("trigger %d) unknown, defaulting to Auto\n", trigger_mode)); + } - LOG(logINFO, ("Trigger mode set to Auto\n")); - return trigger_mode==0; - } + LOG(logINFO, ("Trigger mode set to Auto\n")); + return trigger_mode == 0; + } - if (polarity) { - Feb_Control_triggerMode |= DAQ_NEXPOSURERS_EXTERNAL_TRIGGER_POLARITY; - LOG(logINFO, ("External trigger polarity set to positive\n")); - } else { - Feb_Control_triggerMode &= (~DAQ_NEXPOSURERS_EXTERNAL_TRIGGER_POLARITY); - LOG(logINFO, ("External trigger polarity set to negitive\n")); - } + if (polarity) { + Feb_Control_triggerMode |= DAQ_NEXPOSURERS_EXTERNAL_TRIGGER_POLARITY; + LOG(logINFO, ("External trigger polarity set to positive\n")); + } else { + Feb_Control_triggerMode &= (~DAQ_NEXPOSURERS_EXTERNAL_TRIGGER_POLARITY); + LOG(logINFO, ("External trigger polarity set to negitive\n")); + } - return 1; + return 1; } - int Feb_Control_SetExternalEnableMode(int use_external_enable, int polarity) { - if (use_external_enable) { - Feb_Control_externalEnableMode |= DAQ_NEXPOSURERS_EXTERNAL_ENABLING; - if (polarity) { - Feb_Control_externalEnableMode |= DAQ_NEXPOSURERS_EXTERNAL_ENABLING_POLARITY; - } else { - Feb_Control_externalEnableMode &= (~DAQ_NEXPOSURERS_EXTERNAL_ENABLING_POLARITY); - } - LOG(logINFO, ("External enabling enabled, polarity set to %s\n", - (polarity ? "positive" : "negative"))); + if (use_external_enable) { + Feb_Control_externalEnableMode |= DAQ_NEXPOSURERS_EXTERNAL_ENABLING; + if (polarity) { + Feb_Control_externalEnableMode |= + DAQ_NEXPOSURERS_EXTERNAL_ENABLING_POLARITY; + } else { + Feb_Control_externalEnableMode &= + (~DAQ_NEXPOSURERS_EXTERNAL_ENABLING_POLARITY); + } + LOG(logINFO, ("External enabling enabled, polarity set to %s\n", + (polarity ? "positive" : "negative"))); - } else { - Feb_Control_externalEnableMode = 0; /* changed by Dhanya according to old code &= (~DAQ_NEXPOSURERS_EXTERNAL_ENABLING);*/ - LOG(logINFO, ("External enabling disabled\n")); - } + } else { + Feb_Control_externalEnableMode = + 0; /* changed by Dhanya according to old code &= + (~DAQ_NEXPOSURERS_EXTERNAL_ENABLING);*/ + LOG(logINFO, ("External enabling disabled\n")); + } - return 1; + return 1; } int Feb_Control_SetNExposures(unsigned int n_images) { - if (!n_images) { - LOG(logERROR, ("nimages must be greater than zero.%d\n",n_images)); - return 0; - } + if (!n_images) { + LOG(logERROR, ("nimages must be greater than zero.%d\n", n_images)); + return 0; + } - Feb_Control_nimages = n_images; - LOG(logDEBUG1, ("Number of images set to %d\n",Feb_Control_nimages)); - return 1; + Feb_Control_nimages = n_images; + LOG(logDEBUG1, ("Number of images set to %d\n", Feb_Control_nimages)); + return 1; } -unsigned int Feb_Control_GetNExposures() {return Feb_Control_nimages;} +unsigned int Feb_Control_GetNExposures() { return Feb_Control_nimages; } int Feb_Control_SetExposureTime(double the_exposure_time_in_sec) { - Feb_Control_exposure_time_in_sec = the_exposure_time_in_sec; - LOG(logDEBUG1, ("Exposure time set to %fs\n",Feb_Control_exposure_time_in_sec)); - return 1; + Feb_Control_exposure_time_in_sec = the_exposure_time_in_sec; + LOG(logDEBUG1, + ("Exposure time set to %fs\n", Feb_Control_exposure_time_in_sec)); + return 1; +} +double Feb_Control_GetExposureTime() { + return Feb_Control_exposure_time_in_sec; +} +int64_t Feb_Control_GetExposureTime_in_nsec() { + return (int64_t)(Feb_Control_exposure_time_in_sec * (1E9)); } -double Feb_Control_GetExposureTime() {return Feb_Control_exposure_time_in_sec;} -int64_t Feb_Control_GetExposureTime_in_nsec() {return (int64_t)(Feb_Control_exposure_time_in_sec*(1E9));} -int Feb_Control_SetSubFrameExposureTime(int64_t the_subframe_exposure_time_in_10nsec) { - Feb_Control_subframe_exposure_time_in_10nsec = the_subframe_exposure_time_in_10nsec; - LOG(logDEBUG1, ("Sub Frame Exposure time set to %lldns\n",(long long int)Feb_Control_subframe_exposure_time_in_10nsec * 10)); - return 1; +int Feb_Control_SetSubFrameExposureTime( + int64_t the_subframe_exposure_time_in_10nsec) { + Feb_Control_subframe_exposure_time_in_10nsec = + the_subframe_exposure_time_in_10nsec; + LOG(logDEBUG1, + ("Sub Frame Exposure time set to %lldns\n", + (long long int)Feb_Control_subframe_exposure_time_in_10nsec * 10)); + return 1; +} +int64_t Feb_Control_GetSubFrameExposureTime() { + return Feb_Control_subframe_exposure_time_in_10nsec * 10; } -int64_t Feb_Control_GetSubFrameExposureTime() {return Feb_Control_subframe_exposure_time_in_10nsec*10;} int Feb_Control_SetSubFramePeriod(int64_t the_subframe_period_in_10nsec) { - Feb_Control_subframe_period_in_10nsec = the_subframe_period_in_10nsec; - LOG(logDEBUG1, ("Sub Frame Period set to %lldns\n",(long long int)Feb_Control_subframe_period_in_10nsec * 10)); - return 1; + Feb_Control_subframe_period_in_10nsec = the_subframe_period_in_10nsec; + LOG(logDEBUG1, ("Sub Frame Period set to %lldns\n", + (long long int)Feb_Control_subframe_period_in_10nsec * 10)); + return 1; +} +int64_t Feb_Control_GetSubFramePeriod() { + return Feb_Control_subframe_period_in_10nsec * 10; } -int64_t Feb_Control_GetSubFramePeriod() {return Feb_Control_subframe_period_in_10nsec*10;} - int Feb_Control_SetExposurePeriod(double the_exposure_period_in_sec) { - Feb_Control_exposure_period_in_sec = the_exposure_period_in_sec; - LOG(logDEBUG1, ("Exposure period set to %fs\n",Feb_Control_exposure_period_in_sec)); - return 1; + Feb_Control_exposure_period_in_sec = the_exposure_period_in_sec; + LOG(logDEBUG1, + ("Exposure period set to %fs\n", Feb_Control_exposure_period_in_sec)); + return 1; +} +double Feb_Control_GetExposurePeriod() { + return Feb_Control_exposure_period_in_sec; } -double Feb_Control_GetExposurePeriod() {return Feb_Control_exposure_period_in_sec;} unsigned int Feb_Control_ConvertTimeToRegister(float time_in_sec) { - float n_clk_cycles = round(time_in_sec/10e-9); //200 MHz ctb clk or 100 MHz feb clk + float n_clk_cycles = + round(time_in_sec / 10e-9); // 200 MHz ctb clk or 100 MHz feb clk - unsigned int decoded_time; - if (n_clk_cycles>(pow(2,29)-1)*pow(10,7)) { - float max_time = 10e-9*(pow(2,28)-1)*pow(10,7); - LOG(logERROR, ("time exceeds (%f) maximum exposure time of %f sec.\n",time_in_sec,max_time)); - LOG(logINFO, ("\t Setting to maximum %f us.\n",max_time)); - decoded_time = 0xffffffff; - } else { - int power_of_ten = 0; - while(n_clk_cycles>pow(2,29)-1) { power_of_ten++; n_clk_cycles = round(n_clk_cycles/10.0);} - decoded_time = (int)(n_clk_cycles)<<3 | (int)(power_of_ten); - } + unsigned int decoded_time; + if (n_clk_cycles > (pow(2, 29) - 1) * pow(10, 7)) { + float max_time = 10e-9 * (pow(2, 28) - 1) * pow(10, 7); + LOG(logERROR, ("time exceeds (%f) maximum exposure time of %f sec.\n", + time_in_sec, max_time)); + LOG(logINFO, ("\t Setting to maximum %f us.\n", max_time)); + decoded_time = 0xffffffff; + } else { + int power_of_ten = 0; + while (n_clk_cycles > pow(2, 29) - 1) { + power_of_ten++; + n_clk_cycles = round(n_clk_cycles / 10.0); + } + decoded_time = (int)(n_clk_cycles) << 3 | (int)(power_of_ten); + } - return decoded_time; + return decoded_time; } int Feb_Control_ResetChipCompletely() { - if (!Feb_Control_SetCommandRegister(DAQ_RESET_COMPLETELY) || (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { - LOG(logERROR, ("could not ResetChipCompletely() with 0x%x.\n",DAQ_RESET_COMPLETELY)); - return 0; - } - LOG(logINFO, ("Chip reset completely\n")); - return 1; + if (!Feb_Control_SetCommandRegister(DAQ_RESET_COMPLETELY) || + (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { + LOG(logERROR, ("could not ResetChipCompletely() with 0x%x.\n", + DAQ_RESET_COMPLETELY)); + return 0; + } + LOG(logINFO, ("Chip reset completely\n")); + return 1; } - - int Feb_Control_ResetChipPartially() { - if (!Feb_Control_SetCommandRegister(DAQ_RESET_PERIPHERY) || (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { - LOG(logERROR, ("could not ResetChipPartially with periphery\n")); - return 0; - } - LOG(logINFO, ("Chip reset periphery 0x%x\n",DAQ_RESET_PERIPHERY)); + if (!Feb_Control_SetCommandRegister(DAQ_RESET_PERIPHERY) || + (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { + LOG(logERROR, ("could not ResetChipPartially with periphery\n")); + return 0; + } + LOG(logINFO, ("Chip reset periphery 0x%x\n", DAQ_RESET_PERIPHERY)); - if (!Feb_Control_SetCommandRegister(DAQ_RESET_COLUMN_SELECT) || (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { - LOG(logERROR, ("could not ResetChipPartially with column select\n")); - return 0; - } - LOG(logINFO, ("Chip reset column select 0x%x\n",DAQ_RESET_COLUMN_SELECT)); + if (!Feb_Control_SetCommandRegister(DAQ_RESET_COLUMN_SELECT) || + (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { + LOG(logERROR, ("could not ResetChipPartially with column select\n")); + return 0; + } + LOG(logINFO, ("Chip reset column select 0x%x\n", DAQ_RESET_COLUMN_SELECT)); - return 1; + return 1; } - void Feb_Control_PrintAcquisitionSetup() { - time_t rawtime; - time(&rawtime); - struct tm *timeinfo = localtime(&rawtime); + time_t rawtime; + time(&rawtime); + struct tm *timeinfo = localtime(&rawtime); - LOG(logINFO, ("Starting an exposure: (%s)" - "\t Dynamic range nbits: %d\n" - "\t Trigger mode: 0x%x\n" - "\t Number of exposures: %d\n" - "\t Exsposure time (if used): %f seconds.\n" - "\t Exsposure period (if used): %f seconds.\n\n", - asctime(timeinfo), Feb_Control_GetDynamicRange(), Feb_Control_triggerMode, - Feb_Control_GetNExposures(), Feb_Control_exposure_time_in_sec, - Feb_Control_exposure_period_in_sec)); + LOG(logINFO, + ("Starting an exposure: (%s)" + "\t Dynamic range nbits: %d\n" + "\t Trigger mode: 0x%x\n" + "\t Number of exposures: %d\n" + "\t Exsposure time (if used): %f seconds.\n" + "\t Exsposure period (if used): %f seconds.\n\n", + asctime(timeinfo), Feb_Control_GetDynamicRange(), + Feb_Control_triggerMode, Feb_Control_GetNExposures(), + Feb_Control_exposure_time_in_sec, Feb_Control_exposure_period_in_sec)); } int Feb_Control_SendBitModeToBebServer() { - unsigned int just_bit_mode = (DAQ_STATIC_BIT_M4|DAQ_STATIC_BIT_M8) & Feb_Control_staticBits; - unsigned int bit_mode = 16; //default - if (just_bit_mode == DAQ_STATIC_BIT_M4) bit_mode = 4; - else if (just_bit_mode == DAQ_STATIC_BIT_M8) bit_mode = 8; - else if (Feb_Control_subFrameMode&DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING) bit_mode = 32; + unsigned int just_bit_mode = + (DAQ_STATIC_BIT_M4 | DAQ_STATIC_BIT_M8) & Feb_Control_staticBits; + unsigned int bit_mode = 16; // default + if (just_bit_mode == DAQ_STATIC_BIT_M4) + bit_mode = 4; + else if (just_bit_mode == DAQ_STATIC_BIT_M8) + bit_mode = 8; + else if (Feb_Control_subFrameMode & + DAQ_NEXPOSURERS_ACTIVATE_AUTO_SUBIMAGING) + bit_mode = 32; + if (!Beb_SetUpTransferParameters(bit_mode)) { + LOG(logERROR, ("Error: sending bit mode ...\n")); + return 0; + } - if (!Beb_SetUpTransferParameters(bit_mode)) { - LOG(logERROR, ("Error: sending bit mode ...\n")); - return 0; - } - - return 1; + return 1; } - -int Feb_Control_PrepareForAcquisition() {//return 1; +int Feb_Control_PrepareForAcquisition() { // return 1; LOG(logINFO, ("Going to Prepare for Acquisition\n\n\n")); - static unsigned int reg_nums[20]; - static unsigned int reg_vals[20]; + static unsigned int reg_nums[20]; + static unsigned int reg_vals[20]; - Feb_Control_PrintAcquisitionSetup(); + Feb_Control_PrintAcquisitionSetup(); - // if (!Reset()||!ResetDataStream()) { - if (Feb_Control_Reset() == STATUS_ERROR) { - LOG(logERROR, ("Trouble reseting daq or data stream...\n")); - return 0; - } + // if (!Reset()||!ResetDataStream()) { + if (Feb_Control_Reset() == STATUS_ERROR) { + LOG(logERROR, ("Trouble reseting daq or data stream...\n")); + return 0; + } - if (!Feb_Control_SetStaticBits1(Feb_Control_staticBits&(DAQ_STATIC_BIT_M4|DAQ_STATIC_BIT_M8))) { - LOG(logERROR, ("Trouble setting static bits ...\n")); - return 0; - } + if (!Feb_Control_SetStaticBits1(Feb_Control_staticBits & + (DAQ_STATIC_BIT_M4 | DAQ_STATIC_BIT_M8))) { + LOG(logERROR, ("Trouble setting static bits ...\n")); + return 0; + } - if (!Feb_Control_SendBitModeToBebServer()) { - LOG(logERROR, ("Trouble sending static bits to server ...\n")); - return 0; - } + if (!Feb_Control_SendBitModeToBebServer()) { + LOG(logERROR, ("Trouble sending static bits to server ...\n")); + return 0; + } - int ret=0; - if (Feb_Control_counter_bit) - ret = Feb_Control_ResetChipCompletely(); - else - ret = Feb_Control_ResetChipPartially(); - if (!ret) { - LOG(logERROR, ("Trouble resetting chips ...\n")); - return 0; - } + int ret = 0; + if (Feb_Control_counter_bit) + ret = Feb_Control_ResetChipCompletely(); + else + ret = Feb_Control_ResetChipPartially(); + if (!ret) { + LOG(logERROR, ("Trouble resetting chips ...\n")); + return 0; + } + reg_nums[0] = DAQ_REG_CTRL; + reg_vals[0] = 0; + reg_nums[1] = DAQ_REG_NEXPOSURES; + reg_vals[1] = Feb_Control_nimages; + reg_nums[2] = DAQ_REG_EXPOSURE_TIMER; + reg_vals[2] = + Feb_Control_ConvertTimeToRegister(Feb_Control_exposure_time_in_sec); + reg_nums[3] = DAQ_REG_EXPOSURE_REPEAT_TIMER; + reg_vals[3] = + Feb_Control_ConvertTimeToRegister(Feb_Control_exposure_period_in_sec); + reg_nums[4] = DAQ_REG_CHIP_CMDS; + reg_vals[4] = (Feb_Control_acquireNReadoutMode | Feb_Control_triggerMode | + Feb_Control_externalEnableMode | Feb_Control_subFrameMode); + reg_nums[5] = DAQ_REG_SUBFRAME_EXPOSURES; + reg_vals[5] = + Feb_Control_subframe_exposure_time_in_10nsec; //(1 means 10ns, 100 means + //1000ns) + reg_nums[6] = DAQ_REG_SUBFRAME_PERIOD; + reg_vals[6] = Feb_Control_subframe_period_in_10nsec; //(1 means 10ns, 100 + //means 1000ns) + // if + // (!Feb_Interface_WriteRegisters((Module_GetTopLeftAddress(&modules[1])|Module_GetTopRightAddress(&modules[1])),20,reg_nums,reg_vals,0,0)) + // { + if (Feb_Control_activated) { + if (!Feb_Interface_WriteRegisters(Feb_Control_AddressToAll(), 7, + reg_nums, reg_vals, 0, 0)) { + LOG(logERROR, ("Trouble starting acquisition....\n")); + return 0; + } + } - reg_nums[0]=DAQ_REG_CTRL; - reg_vals[0]=0; - reg_nums[1]=DAQ_REG_NEXPOSURES; - reg_vals[1]=Feb_Control_nimages; - reg_nums[2]=DAQ_REG_EXPOSURE_TIMER; - reg_vals[2]=Feb_Control_ConvertTimeToRegister(Feb_Control_exposure_time_in_sec); - reg_nums[3]=DAQ_REG_EXPOSURE_REPEAT_TIMER; - reg_vals[3]=Feb_Control_ConvertTimeToRegister(Feb_Control_exposure_period_in_sec); - reg_nums[4]=DAQ_REG_CHIP_CMDS; - reg_vals[4]=(Feb_Control_acquireNReadoutMode|Feb_Control_triggerMode|Feb_Control_externalEnableMode|Feb_Control_subFrameMode); - reg_nums[5]=DAQ_REG_SUBFRAME_EXPOSURES; - reg_vals[5]= Feb_Control_subframe_exposure_time_in_10nsec; //(1 means 10ns, 100 means 1000ns) - reg_nums[6]=DAQ_REG_SUBFRAME_PERIOD; - reg_vals[6]= Feb_Control_subframe_period_in_10nsec; //(1 means 10ns, 100 means 1000ns) - // if (!Feb_Interface_WriteRegisters((Module_GetTopLeftAddress(&modules[1])|Module_GetTopRightAddress(&modules[1])),20,reg_nums,reg_vals,0,0)) { - if (Feb_Control_activated) { - if (!Feb_Interface_WriteRegisters(Feb_Control_AddressToAll(),7,reg_nums,reg_vals,0,0)) { - LOG(logERROR, ("Trouble starting acquisition....\n")); - return 0; - } - } - - return 1; + return 1; } - - int Feb_Control_StartAcquisition() { - LOG(logINFOBLUE, ("Starting Acquisition\n")); + LOG(logINFOBLUE, ("Starting Acquisition\n")); - static unsigned int reg_nums[20]; - static unsigned int reg_vals[20]; + static unsigned int reg_nums[20]; + static unsigned int reg_vals[20]; + int i; + for (i = 0; i < 14; i++) { + reg_nums[i] = DAQ_REG_CTRL; + reg_vals[i] = 0; + } + reg_nums[14] = DAQ_REG_CTRL; + reg_vals[14] = ACQ_CTRL_START; - int i; - for(i=0;i<14;i++) { - reg_nums[i]=DAQ_REG_CTRL; - reg_vals[i]=0; - } - reg_nums[14]=DAQ_REG_CTRL; - reg_vals[14]=ACQ_CTRL_START; + if (Feb_Control_activated) { + if (!Feb_Interface_WriteRegisters(Feb_Control_AddressToAll(), 15, + reg_nums, reg_vals, 0, 0)) { + LOG(logERROR, ("Trouble starting acquisition....\n")); + return 0; + } + } - if (Feb_Control_activated) { - if (!Feb_Interface_WriteRegisters(Feb_Control_AddressToAll(),15,reg_nums,reg_vals,0,0)) { - LOG(logERROR, ("Trouble starting acquisition....\n")); - return 0; - } - } - - - return 1; + return 1; } -int Feb_Control_StopAcquisition() { - return Feb_Control_Reset(); -} - - +int Feb_Control_StopAcquisition() { return Feb_Control_Reset(); } int Feb_Control_SaveAllTrimbitsTo(int value, int top) { - unsigned int chanregs[Feb_Control_trimbit_size]; - int i; - for(i=0;i255||y<0||y>255) { - LOG(logERROR, ("Pixel out of range.\n")); - return 0; - } + if (x < 0) { + x = -x; + pulse_multiple = 1; + LOG(logINFO, + ("Pulsing pixel %d in all super columns below number %d.\n", x % 8, + x / 8)); + } + if (x < 0 || x > 255 || y < 0 || y > 255) { + LOG(logERROR, ("Pixel out of range.\n")); + return 0; + } - // y = 255 - y; - int nrowclocks = 0; - nrowclocks += (Feb_Control_staticBits&DAQ_STATIC_BIT_M4) ? 0 : 2*y; - nrowclocks += (Feb_Control_staticBits&DAQ_STATIC_BIT_M8) ? 0 : y; + // y = 255 - y; + int nrowclocks = 0; + nrowclocks += (Feb_Control_staticBits & DAQ_STATIC_BIT_M4) ? 0 : 2 * y; + nrowclocks += (Feb_Control_staticBits & DAQ_STATIC_BIT_M8) ? 0 : y; - Feb_Control_SetInTestModeVariable(1); //on - Feb_Control_SetStaticBits(); - Feb_Control_SetCommandRegister(DAQ_RESET_PERIPHERY|DAQ_RESET_COLUMN_SELECT); - if (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE) { - LOG(logERROR, ("could not pulse pixel as status not idle\n")); - return 0; - } + Feb_Control_SetInTestModeVariable(1); // on + Feb_Control_SetStaticBits(); + Feb_Control_SetCommandRegister(DAQ_RESET_PERIPHERY | + DAQ_RESET_COLUMN_SELECT); + if (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE) { + LOG(logERROR, ("could not pulse pixel as status not idle\n")); + return 0; + } - unsigned int serial_in = 8<<(4*(7-x%8)); - if (!Feb_Control_Shift32InSerialIn(serial_in)) { - LOG(logERROR, ("ChipController::PulsePixel: could shift in the initail 32.\n")); - return 0; - } + unsigned int serial_in = 8 << (4 * (7 - x % 8)); + if (!Feb_Control_Shift32InSerialIn(serial_in)) { + LOG(logERROR, + ("ChipController::PulsePixel: could shift in the initail 32.\n")); + return 0; + } - if (!pulse_multiple) - serial_in=0; - for(i=0;i1023) { - LOG(logERROR, ("Clock row clock ntimes (%d) exceeds the maximum value of 1023.\n\t Setting ntimes to 1023.\n",ntimes)); - ntimes=1023; - } + if (ntimes > 1023) { + LOG(logERROR, ("Clock row clock ntimes (%d) exceeds the maximum value " + "of 1023.\n\t Setting ntimes to 1023.\n", + ntimes)); + ntimes = 1023; + } - if (Feb_Control_activated) { - if (!Feb_Control_SetCommandRegister(DAQ_CLK_ROW_CLK_NTIMES) || - !Feb_Interface_WriteRegister(Feb_Control_AddressToAll(),DAQ_REG_CLK_ROW_CLK_NTIMES,ntimes,0,0) || - (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { - LOG(logERROR, ("could not clock row clock.\n")); - return 0; - } - } + if (Feb_Control_activated) { + if (!Feb_Control_SetCommandRegister(DAQ_CLK_ROW_CLK_NTIMES) || + !Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), + DAQ_REG_CLK_ROW_CLK_NTIMES, ntimes, 0, + 0) || + (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { + LOG(logERROR, ("could not clock row clock.\n")); + return 0; + } + } - return 1; + return 1; } - int Feb_Control_PulseChip(int npulses) { - int i; - int on = 1; + int i; + int on = 1; - if (npulses == -1) { - on = 0; - LOG(logINFO, ("\nResetting to normal mode\n")); - } else { - LOG(logINFO, ("\n\nPulsing Chip.\n"));//really just toggles the enable - LOG(logINFO, ("Vcmp should be set to 2.0 and Vtrim should be 2.\n")); - } + if (npulses == -1) { + on = 0; + LOG(logINFO, ("\nResetting to normal mode\n")); + } else { + LOG(logINFO, ("\n\nPulsing Chip.\n")); // really just toggles the enable + LOG(logINFO, ("Vcmp should be set to 2.0 and Vtrim should be 2.\n")); + } + Feb_Control_SetInTestModeVariable(on); + Feb_Control_SetStaticBits(); // toggle the enable 2x times + Feb_Control_ResetChipCompletely(); - Feb_Control_SetInTestModeVariable(on); - Feb_Control_SetStaticBits(); //toggle the enable 2x times - Feb_Control_ResetChipCompletely(); + for (i = 0; i < npulses; i++) { + if (!Feb_Control_SetCommandRegister( + DAQ_CHIP_CONTROLLER_SUPER_SLOW_SPEED | DAQ_RESET_PERIPHERY | + DAQ_RESET_COLUMN_SELECT)) { + LOG(logERROR, ("some set command register error\n")); + } + if ((Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { + LOG(logERROR, ("some wait error\n")); + } + } + Feb_Control_SetExternalEnableMode(on, 1); + Feb_Control_counter_bit = (on ? 0 : 1); + LOG(logINFO, ("Feb_Control_counter_bit:%d\n", Feb_Control_counter_bit)); - for(i=0;i ratemax) + ratemax = Feb_Control_rate_meas[i]; + } - LOG(logINFO, ("\tCalculating table for tau of %lld ns.\n", tau_in_Nsec)); - int i; - for(i=0;i ratemax) ratemax= Feb_Control_rate_meas[i]; - } + /* + b : index/address of block ram/rate correction table + b0 : base in vhdl + m : slope in vhdl - /* - b : index/address of block ram/rate correction table - b0 : base in vhdl - m : slope in vhdl + Firmware: + data_in(11..2) -> memory address --> memory + data_in( 1..0) -> lsb - Firmware: - data_in(11..2) -> memory address --> memory - data_in( 1..0) -> lsb + mem_data_out(13.. 0) -> base + mem_data_out(17..14) -> slope - mem_data_out(13.. 0) -> base - mem_data_out(17..14) -> slope + delta = slope*lsb + corr = base+delta + */ - delta = slope*lsb - corr = base+delta - */ + int next_i = 0; + double beforemax; + b0[0] = 0; + m[0] = 1; - int next_i=0; - double beforemax; - b0[0] = 0; - m[0] = 1; + Feb_Control_rate_correction_table[0] = + (((int)(m[0] + 0.5) & 0xf) << 14) | ((int)(b0[0] + 0.5) & 0x3fff); - Feb_Control_rate_correction_table[0] = (((int)(m[0]+0.5)&0xf)<<14) | ((int)(b0[0]+0.5)&0x3fff); + int b = 0; + for (b = 1; b < 1024; b++) { + if (m[b - 1] < 15) { + double s = 0, sx = 0, sy = 0, sxx = 0, sxy = 0; + for (;; next_i++) { + if (next_i >= np) { + for (; b < 1024; b++) { + if (beforemax > ratemax) + b0[b] = beforemax; + else + b0[b] = ratemax; + m[b] = 15; + Feb_Control_rate_correction_table[b] = + (((int)(m[b] + 0.5) & 0xf) << 14) | + ((int)(b0[b] + 0.5) & 0x3fff); + } + b = 1024; + break; + } - int b=0; - for(b=1;b<1024;b++) { - if (m[b-1]<15) { - double s=0,sx=0,sy=0,sxx=0,sxy=0; - for(;;next_i++) { - if (next_i>=np) { - for(; b<1024; b++) { - if (beforemax>ratemax) b0[b] = beforemax; - else b0[b] = ratemax; - m[b] = 15; - Feb_Control_rate_correction_table[b] = (((int)(m[b]+0.5)&0xf)<<14) | ((int)(b0[b]+0.5)&0x3fff); - } - b=1024; - break; - } + double x = Feb_Control_rate_meas[next_i] - b * 4; + double y = next_i; + /*LOG(logDEBUG1, ("Start Loop x: %f,\t y: %f,\t s: %f,\t sx: + %f,\t sy: %f,\t sxx: %f,\t sxy: %f,\t " "next_i: %d,\t b: %d,\t + Feb_Control_rate_meas[next_i]: %f\n", x, y, s, sx, sy, sxx, sxy, + next_i, b, Feb_Control_rate_meas[next_i]));*/ - double x = Feb_Control_rate_meas[next_i] - b*4; - double y = next_i; - /*LOG(logDEBUG1, ("Start Loop x: %f,\t y: %f,\t s: %f,\t sx: %f,\t sy: %f,\t sxx: %f,\t sxy: %f,\t " - "next_i: %d,\t b: %d,\t Feb_Control_rate_meas[next_i]: %f\n", - x, y, s, sx, sy, sxx, sxy, next_i, b, Feb_Control_rate_meas[next_i]));*/ - - if (x < -0.5) continue; - if (x > 3.5) break; - s += 1; - sx += x; - sy += y; - sxx += x*x; - sxy += x*y; - /*LOG(logDEBUG1, ("End Loop x: %f,\t y: %f,\t s: %f,\t sx: %f,\t sy: %f,\t sxx: %f,\t sxy: %f,\t " - "next_i: %d,\t b: %d,\t Feb_Control_rate_meas[next_i]: %f\n", - x, y, s, sx, sy, sxx, sxy, next_i, b, Feb_Control_rate_meas[next_i]));*/ - } - double delta = s*sxx - sx*sx; - b0[b] = (sxx*sy - sx*sxy)/delta; - m[b] = (s*sxy - sx*sy) /delta; - beforemax= b0[b]; - - if (m[b]<0||m[b]>15) { - m[b]=15; - if (beforemax>ratemax) b0[b] = beforemax; - else b0[b] = ratemax; - } - /*LOG(logDEBUG1, ("After Loop s: %f,\t sx: %f,\t sy: %f,\t sxx: %f,\t sxy: %f,\t " - "next_i: %d,\t b: %d,\t Feb_Control_rate_meas[next_i]: %f\n", - s, sx, sy, sxx, sxy, next_i, b, Feb_Control_rate_meas[next_i]));*/ - // cout<ratemax) b0[b] = beforemax; - else b0[b] = ratemax; - m[b] = 15; - } - Feb_Control_rate_correction_table[b] = (((int)(m[b]+0.5)&0xf)<<14) | ((int)(b0[b]+0.5)&0x3fff); - /*LOG(logDEBUG1, ("After Loop 4*b: %d\tbase:%d\tslope:%d\n",4*b, (int)(b0[b]+0.5), (int)(m[b]+0.5) ));*/ - } - - if (Feb_Control_SetRateCorrectionTable(Feb_Control_rate_correction_table)) { - Feb_Control_RateTable_Tau_in_nsec = tau_in_Nsec; - Feb_Control_RateTable_Period_in_nsec = period_in_sec*1e9; - return 1; - } else { - Feb_Control_RateTable_Tau_in_nsec = -1; - Feb_Control_RateTable_Period_in_nsec = -1; - return 0; - } + if (x < -0.5) + continue; + if (x > 3.5) + break; + s += 1; + sx += x; + sy += y; + sxx += x * x; + sxy += x * y; + /*LOG(logDEBUG1, ("End Loop x: %f,\t y: %f,\t s: %f,\t sx: + %f,\t sy: %f,\t sxx: %f,\t sxy: %f,\t " "next_i: %d,\t b: %d,\t + Feb_Control_rate_meas[next_i]: %f\n", x, y, s, sx, sy, sxx, sxy, + next_i, b, Feb_Control_rate_meas[next_i]));*/ + } + double delta = s * sxx - sx * sx; + b0[b] = (sxx * sy - sx * sxy) / delta; + m[b] = (s * sxy - sx * sy) / delta; + beforemax = b0[b]; + if (m[b] < 0 || m[b] > 15) { + m[b] = 15; + if (beforemax > ratemax) + b0[b] = beforemax; + else + b0[b] = ratemax; + } + /*LOG(logDEBUG1, ("After Loop s: %f,\t sx: %f,\t sy: %f,\t sxx: + %f,\t sxy: %f,\t " "next_i: %d,\t b: %d,\t + Feb_Control_rate_meas[next_i]: %f\n", + s, sx, sy, sxx, sxy, next_i, b, Feb_Control_rate_meas[next_i]));*/ + // cout< ratemax) + b0[b] = beforemax; + else + b0[b] = ratemax; + m[b] = 15; + } + Feb_Control_rate_correction_table[b] = + (((int)(m[b] + 0.5) & 0xf) << 14) | ((int)(b0[b] + 0.5) & 0x3fff); + /*LOG(logDEBUG1, ("After Loop 4*b: %d\tbase:%d\tslope:%d\n",4*b, + * (int)(b0[b]+0.5), (int)(m[b]+0.5) ));*/ + } + if (Feb_Control_SetRateCorrectionTable(Feb_Control_rate_correction_table)) { + Feb_Control_RateTable_Tau_in_nsec = tau_in_Nsec; + Feb_Control_RateTable_Period_in_nsec = period_in_sec * 1e9; + return 1; + } else { + Feb_Control_RateTable_Tau_in_nsec = -1; + Feb_Control_RateTable_Period_in_nsec = -1; + return 0; + } } - - - int Feb_Control_SetRateCorrectionTable(unsigned int *table) { - if (!table) { - LOG(logERROR, ("Error: could not set rate correction table, point is zero.\n")); - Feb_Control_SetRateCorrectionVariable(0); - return 0; - } + if (!table) { + LOG(logERROR, + ("Error: could not set rate correction table, point is zero.\n")); + Feb_Control_SetRateCorrectionVariable(0); + return 0; + } + LOG(logINFO, ("Setting rate correction table. %d %d %d %d ....\n", table[0], + table[1], table[2], table[3])); - LOG(logINFO, ("Setting rate correction table. %d %d %d %d ....\n", - table[0],table[1],table[2],table[3])); + // was added otherwise after an acquire, startdaqonlywatiforfinish waits + // forever + if (!Feb_Control_SetCommandRegister(DAQ_RESET_COMPLETELY)) { + LOG(logERROR, ("Could not Feb_Control_SetCommandRegister for loading " + "trim bits.\n")); + return 0; + } + LOG(logINFO, ("daq reset completely\n")); - //was added otherwise after an acquire, startdaqonlywatiforfinish waits forever - if (!Feb_Control_SetCommandRegister(DAQ_RESET_COMPLETELY)) { - LOG(logERROR, ("Could not Feb_Control_SetCommandRegister for loading trim bits.\n")); - return 0; - } - LOG(logINFO, ("daq reset completely\n")); - - if (Module_TopAddressIsValid(&modules[1])) { - if (Feb_Control_activated) { - if (!Feb_Interface_WriteMemoryInLoops(Module_GetTopLeftAddress(&modules[Feb_Control_current_index]),1,0,1024,Feb_Control_rate_correction_table)|| - !Feb_Interface_WriteMemoryInLoops(Module_GetTopRightAddress(&modules[Feb_Control_current_index]),1,0,1024,Feb_Control_rate_correction_table)|| - (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { - LOG(logERROR, ("could not write to memory (top) ::Feb_Control_SetRateCorrectionTable\n")); - return 0; - } - } - } else { - if (Feb_Control_activated) { - if (!Feb_Interface_WriteMemoryInLoops(Module_GetBottomLeftAddress(&modules[Feb_Control_current_index]),1,0,1024,Feb_Control_rate_correction_table)|| - !Feb_Interface_WriteMemoryInLoops(Module_GetBottomRightAddress(&modules[Feb_Control_current_index]),1,0,1024,Feb_Control_rate_correction_table)|| - (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { - LOG(logERROR, ("could not write to memory (bottom) ::Feb_Control_SetRateCorrectionTable\n")); - return 0; - } - } - } - return 1; + if (Module_TopAddressIsValid(&modules[1])) { + if (Feb_Control_activated) { + if (!Feb_Interface_WriteMemoryInLoops( + Module_GetTopLeftAddress( + &modules[Feb_Control_current_index]), + 1, 0, 1024, Feb_Control_rate_correction_table) || + !Feb_Interface_WriteMemoryInLoops( + Module_GetTopRightAddress( + &modules[Feb_Control_current_index]), + 1, 0, 1024, Feb_Control_rate_correction_table) || + (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { + LOG(logERROR, ("could not write to memory (top) " + "::Feb_Control_SetRateCorrectionTable\n")); + return 0; + } + } + } else { + if (Feb_Control_activated) { + if (!Feb_Interface_WriteMemoryInLoops( + Module_GetBottomLeftAddress( + &modules[Feb_Control_current_index]), + 1, 0, 1024, Feb_Control_rate_correction_table) || + !Feb_Interface_WriteMemoryInLoops( + Module_GetBottomRightAddress( + &modules[Feb_Control_current_index]), + 1, 0, 1024, Feb_Control_rate_correction_table) || + (Feb_Control_StartDAQOnlyNWaitForFinish(5000) != STATUS_IDLE)) { + LOG(logERROR, ("could not write to memory (bottom) " + "::Feb_Control_SetRateCorrectionTable\n")); + return 0; + } + } + } + return 1; } - -int Feb_Control_GetRateCorrectionVariable() { return (Feb_Control_subFrameMode&DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION);} - +int Feb_Control_GetRateCorrectionVariable() { + return (Feb_Control_subFrameMode & + DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION); +} void Feb_Control_SetRateCorrectionVariable(int activate_rate_correction) { - if (activate_rate_correction) { - Feb_Control_subFrameMode |= DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION; - LOG(logINFO, ("Rate correction activated\n")); - } else { - Feb_Control_subFrameMode &= ~DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION; - LOG(logINFO, ("Rate correction deactivated\n")); - } + if (activate_rate_correction) { + Feb_Control_subFrameMode |= DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION; + LOG(logINFO, ("Rate correction activated\n")); + } else { + Feb_Control_subFrameMode &= ~DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION; + LOG(logINFO, ("Rate correction deactivated\n")); + } } - int Feb_Control_PrintCorrectedValues() { - int i; - int delta, slope, base, lsb, corr; - for (i=0; i < 4096; i++) { - lsb = i&3; - base = Feb_Control_rate_correction_table[i>>2] & 0x3fff; - slope = ((Feb_Control_rate_correction_table[i>>2] & 0x3c000) >> 14); + int i; + int delta, slope, base, lsb, corr; + for (i = 0; i < 4096; i++) { + lsb = i & 3; + base = Feb_Control_rate_correction_table[i >> 2] & 0x3fff; + slope = ((Feb_Control_rate_correction_table[i >> 2] & 0x3c000) >> 14); - delta = slope*lsb; - corr = delta+base; - if (slope==15) corr= 3*slope+base; + delta = slope * lsb; + corr = delta + base; + if (slope == 15) + corr = 3 * slope + base; - LOG(logDEBUG1, ("Readout Input: %d,\tBase:%d,\tSlope:%d,\tLSB:%d,\tDelta:%d\tResult:%d\tReal:%lf\n", - i, base, slope, lsb, delta, corr, Feb_Control_rate_meas[i])); - } - return 1; + LOG(logDEBUG1, + ("Readout Input: " + "%d,\tBase:%d,\tSlope:%d,\tLSB:%d,\tDelta:%d\tResult:%d\tReal:%" + "lf\n", + i, base, slope, lsb, delta, corr, Feb_Control_rate_meas[i])); + } + return 1; } - -//So if software says now 40.00 you neeed to convert to mdegrees 40000(call it A1) and then -//A1/65536/0.00198421639-273.15 +// So if software says now 40.00 you neeed to convert to mdegrees 40000(call it +// A1) and then A1/65536/0.00198421639-273.15 int Feb_Control_GetLeftFPGATemp() { - unsigned int temperature=0; - if (Module_TopAddressIsValid(&modules[1])) - Feb_Interface_ReadRegister(Module_GetTopLeftAddress (&modules[1]),FEB_REG_STATUS, &temperature); - else - Feb_Interface_ReadRegister(Module_GetBottomLeftAddress (&modules[1]),FEB_REG_STATUS, &temperature); - temperature = temperature >> 16; - temperature = ((((float)(temperature)/65536.0f)/0.00198421639f ) - 273.15f)*1000; // Static conversation, copied from xps sysmon standalone driver - //division done in client to send int over network - return (int)temperature; + unsigned int temperature = 0; + if (Module_TopAddressIsValid(&modules[1])) + Feb_Interface_ReadRegister(Module_GetTopLeftAddress(&modules[1]), + FEB_REG_STATUS, &temperature); + else + Feb_Interface_ReadRegister(Module_GetBottomLeftAddress(&modules[1]), + FEB_REG_STATUS, &temperature); + temperature = temperature >> 16; + temperature = + ((((float)(temperature) / 65536.0f) / 0.00198421639f) - 273.15f) * + 1000; // Static conversation, copied from xps sysmon standalone driver + // division done in client to send int over network + return (int)temperature; } int Feb_Control_GetRightFPGATemp() { - unsigned int temperature=0; - if (Module_TopAddressIsValid(&modules[1])) - Feb_Interface_ReadRegister(Module_GetTopRightAddress (&modules[1]),FEB_REG_STATUS, &temperature); - else - Feb_Interface_ReadRegister(Module_GetBottomRightAddress (&modules[1]),FEB_REG_STATUS, &temperature); - temperature = temperature >> 16; - temperature = ((((float)(temperature)/65536.0f)/0.00198421639f ) - 273.15f)*1000; // Static conversation, copied from xps sysmon standalone driver - //division done in client to send int over network - return (int)temperature; + unsigned int temperature = 0; + if (Module_TopAddressIsValid(&modules[1])) + Feb_Interface_ReadRegister(Module_GetTopRightAddress(&modules[1]), + FEB_REG_STATUS, &temperature); + else + Feb_Interface_ReadRegister(Module_GetBottomRightAddress(&modules[1]), + FEB_REG_STATUS, &temperature); + temperature = temperature >> 16; + temperature = + ((((float)(temperature) / 65536.0f) / 0.00198421639f) - 273.15f) * + 1000; // Static conversation, copied from xps sysmon standalone driver + // division done in client to send int over network + return (int)temperature; } int64_t Feb_Control_GetMeasuredPeriod() { - unsigned int sub_num = (Module_TopAddressIsValid(&modules[1])) ? - Module_GetTopLeftAddress (&modules[1]): - Module_GetBottomLeftAddress (&modules[1]); + unsigned int sub_num = (Module_TopAddressIsValid(&modules[1])) + ? Module_GetTopLeftAddress(&modules[1]) + : Module_GetBottomLeftAddress(&modules[1]); - unsigned int value = 0; - Feb_Interface_ReadRegister(sub_num,MEAS_PERIOD_REG, &value); - return (int64_t)value*10; + unsigned int value = 0; + Feb_Interface_ReadRegister(sub_num, MEAS_PERIOD_REG, &value); + return (int64_t)value * 10; } int64_t Feb_Control_GetSubMeasuredPeriod() { - unsigned int sub_num = (Module_TopAddressIsValid(&modules[1])) ? - Module_GetTopLeftAddress (&modules[1]): - Module_GetBottomLeftAddress (&modules[1]); + unsigned int sub_num = (Module_TopAddressIsValid(&modules[1])) + ? Module_GetTopLeftAddress(&modules[1]) + : Module_GetBottomLeftAddress(&modules[1]); - unsigned int value = 0; - Feb_Interface_ReadRegister(sub_num,MEAS_SUBPERIOD_REG, &value); - return (int64_t)value*10; + unsigned int value = 0; + Feb_Interface_ReadRegister(sub_num, MEAS_SUBPERIOD_REG, &value); + return (int64_t)value * 10; } - int Feb_Control_SoftwareTrigger() { - unsigned int orig_value = 0; - Feb_Interface_ReadRegister(Feb_Control_AddressToAll(),DAQ_REG_CHIP_CMDS, &orig_value); + unsigned int orig_value = 0; + Feb_Interface_ReadRegister(Feb_Control_AddressToAll(), DAQ_REG_CHIP_CMDS, + &orig_value); - unsigned int cmd = orig_value | DAQ_REG_CHIP_CMDS_INT_TRIGGER; + unsigned int cmd = orig_value | DAQ_REG_CHIP_CMDS_INT_TRIGGER; - if (Feb_Control_activated) { - // set trigger bit - LOG(logDEBUG1, ("Setting Trigger, Register:0x%x\n",cmd)); - if (!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(),DAQ_REG_CHIP_CMDS,cmd,0,0)) { - LOG(logERROR, ("Could not give software trigger\n")); - return 0; - } - // unset trigger bit - LOG(logDEBUG1, ("Unsetting Trigger, Register:0x%x\n",orig_value)); - if (!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(),DAQ_REG_CHIP_CMDS,orig_value,0,0)) { - LOG(logERROR, ("Could not give software trigger\n")); - return 0; - } - LOG(logINFO, ("Software Internal Trigger Sent!\n")); - } + if (Feb_Control_activated) { + // set trigger bit + LOG(logDEBUG1, ("Setting Trigger, Register:0x%x\n", cmd)); + if (!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), + DAQ_REG_CHIP_CMDS, cmd, 0, 0)) { + LOG(logERROR, ("Could not give software trigger\n")); + return 0; + } + // unset trigger bit + LOG(logDEBUG1, ("Unsetting Trigger, Register:0x%x\n", orig_value)); + if (!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), + DAQ_REG_CHIP_CMDS, orig_value, 0, 0)) { + LOG(logERROR, ("Could not give software trigger\n")); + return 0; + } + LOG(logINFO, ("Software Internal Trigger Sent!\n")); + } - return 1; + return 1; } int Feb_Control_SetInterruptSubframe(int val) { - LOG(logINFO, ("Setting Interrupt Subframe to %d\n", val)); + LOG(logINFO, ("Setting Interrupt Subframe to %d\n", val)); - // they need to be written separately because the left and right registers have different values for this particular register - uint32_t offset = DAQ_REG_HRDWRE; - uint32_t regVal = 0; - char side[2][10] = {"right", "left"}; - char isTop[10]; strcpy(isTop, Module_TopAddressIsValid(&modules[1]) ? "top" : "bottom"); - unsigned int addr[2]; - addr[0] = Module_TopAddressIsValid(&modules[1]) ? Module_GetTopRightAddress (&modules[1]) : Module_GetBottomRightAddress (&modules[1]); - addr[1] = Module_TopAddressIsValid(&modules[1]) ? Module_GetTopLeftAddress (&modules[1]) : Module_GetBottomLeftAddress (&modules[1]); + // they need to be written separately because the left and right registers + // have different values for this particular register + uint32_t offset = DAQ_REG_HRDWRE; + uint32_t regVal = 0; + char side[2][10] = {"right", "left"}; + char isTop[10]; + strcpy(isTop, Module_TopAddressIsValid(&modules[1]) ? "top" : "bottom"); + unsigned int addr[2]; + addr[0] = Module_TopAddressIsValid(&modules[1]) + ? Module_GetTopRightAddress(&modules[1]) + : Module_GetBottomRightAddress(&modules[1]); + addr[1] = Module_TopAddressIsValid(&modules[1]) + ? Module_GetTopLeftAddress(&modules[1]) + : Module_GetBottomLeftAddress(&modules[1]); - int iloop = 0; - for(iloop = 0; iloop < 2; ++iloop) { - // get previous value to keep it - if(!Feb_Interface_ReadRegister(addr[iloop], offset, ®Val)) { - LOG(logERROR, ("Could not read %s %s interrupt subframe\n", isTop, side[iloop])); - return 0; - } - uint32_t data = ((val == 0) ? (regVal &~ DAQ_REG_HRDWRE_INTRRPT_SF_MSK) : (regVal | DAQ_REG_HRDWRE_INTRRPT_SF_MSK)); - if(!Feb_Interface_WriteRegister(addr[iloop], offset, data, 0, 0)) { - LOG(logERROR, ("Could not write 0x%x to %s %s interrupt subframe addr 0x%x\n", data, isTop, side[iloop], offset)); - return 0; - } - } - return 1; + int iloop = 0; + for (iloop = 0; iloop < 2; ++iloop) { + // get previous value to keep it + if (!Feb_Interface_ReadRegister(addr[iloop], offset, ®Val)) { + LOG(logERROR, ("Could not read %s %s interrupt subframe\n", isTop, + side[iloop])); + return 0; + } + uint32_t data = ((val == 0) ? (regVal & ~DAQ_REG_HRDWRE_INTRRPT_SF_MSK) + : (regVal | DAQ_REG_HRDWRE_INTRRPT_SF_MSK)); + if (!Feb_Interface_WriteRegister(addr[iloop], offset, data, 0, 0)) { + LOG(logERROR, + ("Could not write 0x%x to %s %s interrupt subframe addr 0x%x\n", + data, isTop, side[iloop], offset)); + return 0; + } + } + return 1; } int Feb_Control_GetInterruptSubframe() { - // they need to be written separately because the left and right registers have different values for this particular register - uint32_t offset = DAQ_REG_HRDWRE; - uint32_t regVal = 0; + // they need to be written separately because the left and right registers + // have different values for this particular register + uint32_t offset = DAQ_REG_HRDWRE; + uint32_t regVal = 0; - char side[2][10] = {"right", "left"}; - char isTop[10]; strcpy(isTop, Module_TopAddressIsValid(&modules[1]) ? "top" : "bottom"); - unsigned int addr[2]; - addr[0] = Module_TopAddressIsValid(&modules[1]) ? Module_GetTopRightAddress (&modules[1]) : Module_GetBottomRightAddress (&modules[1]); - addr[1] = Module_TopAddressIsValid(&modules[1]) ? Module_GetTopLeftAddress (&modules[1]) : Module_GetBottomLeftAddress (&modules[1]); - uint32_t value[2] = {0, 0}; + char side[2][10] = {"right", "left"}; + char isTop[10]; + strcpy(isTop, Module_TopAddressIsValid(&modules[1]) ? "top" : "bottom"); + unsigned int addr[2]; + addr[0] = Module_TopAddressIsValid(&modules[1]) + ? Module_GetTopRightAddress(&modules[1]) + : Module_GetBottomRightAddress(&modules[1]); + addr[1] = Module_TopAddressIsValid(&modules[1]) + ? Module_GetTopLeftAddress(&modules[1]) + : Module_GetBottomLeftAddress(&modules[1]); + uint32_t value[2] = {0, 0}; - int iloop = 0; - for(iloop = 0; iloop < 2; ++iloop) { - if(!Feb_Interface_ReadRegister(addr[iloop], offset, ®Val)) { - LOG(logERROR, ("Could not read back %s %s interrupt subframe\n", isTop, side[iloop])); - return -1; - } - value[iloop] = (regVal & DAQ_REG_HRDWRE_INTRRPT_SF_MSK) >> DAQ_REG_HRDWRE_INTRRPT_SF_OFST; - } + int iloop = 0; + for (iloop = 0; iloop < 2; ++iloop) { + if (!Feb_Interface_ReadRegister(addr[iloop], offset, ®Val)) { + LOG(logERROR, ("Could not read back %s %s interrupt subframe\n", + isTop, side[iloop])); + return -1; + } + value[iloop] = (regVal & DAQ_REG_HRDWRE_INTRRPT_SF_MSK) >> + DAQ_REG_HRDWRE_INTRRPT_SF_OFST; + } - // inconsistent - if (value[0] != value[1]) { - LOG(logERROR, ("Inconsistent values of interrupt subframe betweeen left %d and right %d\n", value[0], value[1])); - return -1; - } - return value[0]; + // inconsistent + if (value[0] != value[1]) { + LOG(logERROR, ("Inconsistent values of interrupt subframe betweeen " + "left %d and right %d\n", + value[0], value[1])); + return -1; + } + return value[0]; } int Feb_Control_SetQuad(int val) { - // no bottom for quad - if (!Module_TopAddressIsValid(&modules[1])) { - return 1; - } - uint32_t offset = DAQ_REG_HRDWRE; - LOG(logINFO, ("Setting Quad to %d in Feb\n", val)); - unsigned int addr = Module_GetTopRightAddress (&modules[1]); - uint32_t regVal = 0; - if(!Feb_Interface_ReadRegister(addr, offset, ®Val)) { - LOG(logERROR, ("Could not read top right quad reg\n")); - return 0; - } - uint32_t data = ((val == 0) ? (regVal &~ DAQ_REG_HRDWRE_OW_MSK) : ((regVal | DAQ_REG_HRDWRE_OW_MSK) &~ DAQ_REG_HRDWRE_TOP_MSK)); - if(!Feb_Interface_WriteRegister(addr, offset, data, 0, 0)) { - LOG(logERROR, ("Could not write 0x%x to top right quad addr 0x%x\n", data, offset)); - return 0; - } - return 1; + // no bottom for quad + if (!Module_TopAddressIsValid(&modules[1])) { + return 1; + } + uint32_t offset = DAQ_REG_HRDWRE; + LOG(logINFO, ("Setting Quad to %d in Feb\n", val)); + unsigned int addr = Module_GetTopRightAddress(&modules[1]); + uint32_t regVal = 0; + if (!Feb_Interface_ReadRegister(addr, offset, ®Val)) { + LOG(logERROR, ("Could not read top right quad reg\n")); + return 0; + } + uint32_t data = + ((val == 0) + ? (regVal & ~DAQ_REG_HRDWRE_OW_MSK) + : ((regVal | DAQ_REG_HRDWRE_OW_MSK) & ~DAQ_REG_HRDWRE_TOP_MSK)); + if (!Feb_Interface_WriteRegister(addr, offset, data, 0, 0)) { + LOG(logERROR, ("Could not write 0x%x to top right quad addr 0x%x\n", + data, offset)); + return 0; + } + return 1; } int Feb_Control_SetReadNLines(int value) { - LOG(logINFO, ("Setting Read N Lines to %d\n", value)); - if(!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), DAQ_REG_PARTIAL_READOUT, value, 0, 0)) { - LOG(logERROR, ("Could not write %d to read n lines reg\n", value)); - return 0; - } + LOG(logINFO, ("Setting Read N Lines to %d\n", value)); + if (!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), + DAQ_REG_PARTIAL_READOUT, value, 0, 0)) { + LOG(logERROR, ("Could not write %d to read n lines reg\n", value)); + return 0; + } - return 1; + return 1; } int Feb_Control_GetReadNLines() { - uint32_t regVal = 0; - if(!Feb_Interface_ReadRegister(Feb_Control_AddressToAll(), DAQ_REG_PARTIAL_READOUT, ®Val)) { - LOG(logERROR, ("Could not read back read n lines reg\n")); - return -1; - } - LOG(logDEBUG1, ("Retval read n lines: %d\n", regVal)); - return regVal; + uint32_t regVal = 0; + if (!Feb_Interface_ReadRegister(Feb_Control_AddressToAll(), + DAQ_REG_PARTIAL_READOUT, ®Val)) { + LOG(logERROR, ("Could not read back read n lines reg\n")); + return -1; + } + LOG(logDEBUG1, ("Retval read n lines: %d\n", regVal)); + return regVal; } - int Feb_Control_WriteRegister(uint32_t offset, uint32_t data) { - uint32_t actualOffset = offset; - char side[2][10] = {"right", "left"}; - char isTop[10]; strcpy(isTop, Module_TopAddressIsValid(&modules[1]) ? "top" : "bottom"); - unsigned int addr[2]; - addr[0] = Module_TopAddressIsValid(&modules[1]) ? Module_GetTopRightAddress (&modules[1]) : Module_GetBottomRightAddress (&modules[1]); - addr[1] = Module_TopAddressIsValid(&modules[1]) ? Module_GetTopLeftAddress (&modules[1]) : Module_GetBottomLeftAddress (&modules[1]); - - int run[2] = {0, 0}; - // both registers - if (offset < 0x100) { - run[0] = 1; - run[1] = 1; - } - // right registers only - else if (offset >= 0x200) { - run[0] = 1; - actualOffset = offset - 0x200; - } - // left registers only - else { - run[1] = 1; - actualOffset = offset - 0x100; - } + uint32_t actualOffset = offset; + char side[2][10] = {"right", "left"}; + char isTop[10]; + strcpy(isTop, Module_TopAddressIsValid(&modules[1]) ? "top" : "bottom"); + unsigned int addr[2]; + addr[0] = Module_TopAddressIsValid(&modules[1]) + ? Module_GetTopRightAddress(&modules[1]) + : Module_GetBottomRightAddress(&modules[1]); + addr[1] = Module_TopAddressIsValid(&modules[1]) + ? Module_GetTopLeftAddress(&modules[1]) + : Module_GetBottomLeftAddress(&modules[1]); - int iloop = 0; - for(iloop = 0; iloop < 2; ++iloop) { - if(run[iloop]) { - LOG(logINFO, ("Writing 0x%x to %s %s 0x%x\n", data, isTop, side[iloop], actualOffset)); - if(!Feb_Interface_WriteRegister(addr[iloop],actualOffset, data, 0, 0)) { - LOG(logERROR, ("Could not write 0x%x to %s %s addr 0x%x\n", data, isTop, side[iloop], actualOffset)); - return 0; - } - } - } + int run[2] = {0, 0}; + // both registers + if (offset < 0x100) { + run[0] = 1; + run[1] = 1; + } + // right registers only + else if (offset >= 0x200) { + run[0] = 1; + actualOffset = offset - 0x200; + } + // left registers only + else { + run[1] = 1; + actualOffset = offset - 0x100; + } - return 1; + int iloop = 0; + for (iloop = 0; iloop < 2; ++iloop) { + if (run[iloop]) { + LOG(logINFO, ("Writing 0x%x to %s %s 0x%x\n", data, isTop, + side[iloop], actualOffset)); + if (!Feb_Interface_WriteRegister(addr[iloop], actualOffset, data, 0, + 0)) { + LOG(logERROR, ("Could not write 0x%x to %s %s addr 0x%x\n", + data, isTop, side[iloop], actualOffset)); + return 0; + } + } + } + + return 1; } +int Feb_Control_ReadRegister(uint32_t offset, uint32_t *retval) { + uint32_t actualOffset = offset; + char side[2][10] = {"right", "left"}; + char isTop[10]; + strcpy(isTop, Module_TopAddressIsValid(&modules[1]) ? "top" : "bottom"); + unsigned int addr[2]; + addr[0] = Module_TopAddressIsValid(&modules[1]) + ? Module_GetTopRightAddress(&modules[1]) + : Module_GetBottomRightAddress(&modules[1]); + addr[1] = Module_TopAddressIsValid(&modules[1]) + ? Module_GetTopLeftAddress(&modules[1]) + : Module_GetBottomLeftAddress(&modules[1]); + uint32_t value[2] = {0, 0}; -int Feb_Control_ReadRegister(uint32_t offset, uint32_t* retval) { - uint32_t actualOffset = offset; - char side[2][10] = {"right", "left"}; - char isTop[10]; strcpy(isTop, Module_TopAddressIsValid(&modules[1]) ? "top" : "bottom"); - unsigned int addr[2]; - addr[0] = Module_TopAddressIsValid(&modules[1]) ? Module_GetTopRightAddress (&modules[1]) : Module_GetBottomRightAddress (&modules[1]); - addr[1] = Module_TopAddressIsValid(&modules[1]) ? Module_GetTopLeftAddress (&modules[1]) : Module_GetBottomLeftAddress (&modules[1]); - uint32_t value[2] = {0, 0}; + int run[2] = {0, 0}; + // both registers + if (offset < 0x100) { + run[0] = 1; + run[1] = 1; + } + // right registers only + else if (offset >= 0x200) { + run[0] = 1; + actualOffset = offset - 0x200; + } + // left registers only + else { + run[1] = 1; + actualOffset = offset - 0x100; + } - int run[2] = {0, 0}; - // both registers - if (offset < 0x100) { - run[0] = 1; - run[1] = 1; - } - // right registers only - else if (offset >= 0x200) { - run[0] = 1; - actualOffset = offset - 0x200; - } - // left registers only - else { - run[1] = 1; - actualOffset = offset - 0x100; - } + int iloop = 0; + for (iloop = 0; iloop < 2; ++iloop) { + if (run[iloop]) { + if (!Feb_Interface_ReadRegister(addr[iloop], actualOffset, + &value[iloop])) { + LOG(logERROR, ("Could not read from %s %s addr 0x%x\n", isTop, + side[iloop], actualOffset)); + return 0; + } + LOG(logINFO, ("Read 0x%x from %s %s 0x%x\n", value[iloop], isTop, + side[iloop], actualOffset)); + *retval = value[iloop]; + // if not the other (left, not right OR right, not left), return the + // value + if (!run[iloop ? 0 : 1]) { + return 1; + } + } + } - int iloop = 0; - for(iloop = 0; iloop < 2; ++iloop) { - if(run[iloop]) { - if(!Feb_Interface_ReadRegister(addr[iloop],actualOffset, &value[iloop])) { - LOG(logERROR, ("Could not read from %s %s addr 0x%x\n", isTop, side[iloop], actualOffset)); - return 0; - } - LOG(logINFO, ("Read 0x%x from %s %s 0x%x\n", value[iloop], isTop, side[iloop], actualOffset)); - *retval = value[iloop]; - // if not the other (left, not right OR right, not left), return the value - if (!run[iloop ? 0 : 1]) { - return 1; - } - } - } - - // Inconsistent values - if (value[0] != value[1]) { - LOG(logERROR, ("Inconsistent values read from left 0x%x and right 0x%x\n", value[0], value[1])); - return 0; - } - return 1; + // Inconsistent values + if (value[0] != value[1]) { + LOG(logERROR, + ("Inconsistent values read from left 0x%x and right 0x%x\n", + value[0], value[1])); + return 0; + } + return 1; } diff --git a/slsDetectorServers/eigerDetectorServer/FebControl.h b/slsDetectorServers/eigerDetectorServer/FebControl.h index 7188938d4..4c7bc608a 100644 --- a/slsDetectorServers/eigerDetectorServer/FebControl.h +++ b/slsDetectorServers/eigerDetectorServer/FebControl.h @@ -136,9 +136,10 @@ unsigned int Feb_Control_GetDynamicRange(); int Feb_Control_SetReadoutSpeed( unsigned int readout_speed); // 0 was default, 0->full,1->half,2->quarter or // 3->super_slow -int Feb_Control_SetReadoutMode(unsigned int readout_mode); /// 0 was - /// default,0->parallel,1->non-parallel,2-> - /// safe_mode +int Feb_Control_SetReadoutMode( + unsigned int readout_mode); /// 0 was + /// default,0->parallel,1->non-parallel,2-> + /// safe_mode int Feb_Control_SetTriggerMode(unsigned int trigger_mode, int polarity); // 0 and 1 was default, int Feb_Control_SetExternalEnableMode(int use_external_enable, diff --git a/slsDetectorServers/eigerDetectorServer/FebInterface.c b/slsDetectorServers/eigerDetectorServer/FebInterface.c old mode 100755 new mode 100644 index 2cd15104e..d6ef6dd1a --- a/slsDetectorServers/eigerDetectorServer/FebInterface.c +++ b/slsDetectorServers/eigerDetectorServer/FebInterface.c @@ -1,195 +1,236 @@ #include "FebInterface.h" #include "LocalLinkInterface.h" -#include "xparameters.h" #include "clogger.h" +#include "xparameters.h" #include +struct LocalLinkInterface ll_local, *ll; +unsigned int Feb_Interface_nfebs; +unsigned int *Feb_Interface_feb_numb; -struct LocalLinkInterface ll_local,* ll; - -unsigned int Feb_Interface_nfebs; -unsigned int* Feb_Interface_feb_numb; - -int Feb_Interface_send_ndata; -unsigned int Feb_Interface_send_buffer_size; -unsigned int* Feb_Interface_send_data_raw; -unsigned int* Feb_Interface_send_data; - -int Feb_Interface_recv_ndata; -unsigned int Feb_Interface_recv_buffer_size; -unsigned int* Feb_Interface_recv_data_raw; -unsigned int* Feb_Interface_recv_data; +int Feb_Interface_send_ndata; +unsigned int Feb_Interface_send_buffer_size; +unsigned int *Feb_Interface_send_data_raw; +unsigned int *Feb_Interface_send_data; +int Feb_Interface_recv_ndata; +unsigned int Feb_Interface_recv_buffer_size; +unsigned int *Feb_Interface_recv_data_raw; +unsigned int *Feb_Interface_recv_data; void Feb_Interface_FebInterface() { - ll = &ll_local; - Feb_Interface_nfebs = 0; - Feb_Interface_feb_numb = 0; + ll = &ll_local; + Feb_Interface_nfebs = 0; + Feb_Interface_feb_numb = 0; - Feb_Interface_send_ndata = 0; - Feb_Interface_send_buffer_size = 1026; - Feb_Interface_send_data_raw = malloc((Feb_Interface_send_buffer_size+1) * sizeof(unsigned int)); - Feb_Interface_send_data = &Feb_Interface_send_data_raw[1]; + Feb_Interface_send_ndata = 0; + Feb_Interface_send_buffer_size = 1026; + Feb_Interface_send_data_raw = + malloc((Feb_Interface_send_buffer_size + 1) * sizeof(unsigned int)); + Feb_Interface_send_data = &Feb_Interface_send_data_raw[1]; - Feb_Interface_recv_ndata = 0; - Feb_Interface_recv_buffer_size = 1026; - Feb_Interface_recv_data_raw = malloc((Feb_Interface_recv_buffer_size+1) * sizeof(unsigned int)); - Feb_Interface_recv_data = &Feb_Interface_recv_data_raw[1]; - - Local_LocalLinkInterface1(ll,XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR); + Feb_Interface_recv_ndata = 0; + Feb_Interface_recv_buffer_size = 1026; + Feb_Interface_recv_data_raw = + malloc((Feb_Interface_recv_buffer_size + 1) * sizeof(unsigned int)); + Feb_Interface_recv_data = &Feb_Interface_recv_data_raw[1]; + Local_LocalLinkInterface1( + ll, XPAR_PLB_LL_FIFO_AURORA_DUAL_CTRL_FEB_RIGHT_BASEADDR); } - - -void Feb_Interface_SendCompleteList(unsigned int n,unsigned int* list) { - unsigned int i; - if (Feb_Interface_feb_numb) free(Feb_Interface_feb_numb); - Feb_Interface_nfebs = n; - Feb_Interface_feb_numb = malloc(n * sizeof(unsigned int)); - for(i=0;i0xfff) return 0; + if (ch > 0xfff) + return 0; - LOG(logDEBUG1, ("FIW ch %d\n", ch)); + LOG(logDEBUG1, ("FIW ch %d\n", ch)); -Feb_Interface_send_data_raw[0] = 0x8fff0000; -if (Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0; + Feb_Interface_send_data_raw[0] = 0x8fff0000; + if (Local_Write(ll, 4, Feb_Interface_send_data_raw) != 4) + return 0; -Feb_Interface_send_data_raw[0] = 0x90000000 | (ch<<16); -if (Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0; + Feb_Interface_send_data_raw[0] = 0x90000000 | (ch << 16); + if (Local_Write(ll, 4, Feb_Interface_send_data_raw) != 4) + return 0; -Feb_Interface_send_data_raw[0] = 0xc0000000; -return ((Feb_Interface_send_ndata+1)*4==Local_Write(ll,(Feb_Interface_send_ndata+1)*4,Feb_Interface_send_data_raw)); + Feb_Interface_send_data_raw[0] = 0xc0000000; + return ((Feb_Interface_send_ndata + 1) * 4 == + Local_Write(ll, (Feb_Interface_send_ndata + 1) * 4, + Feb_Interface_send_data_raw)); } int Feb_Interface_ReadFrom(unsigned int ch, unsigned int ntrys) { - unsigned int t; - if (ch>=0xfff) return 0; + unsigned int t; + if (ch >= 0xfff) + return 0; - Feb_Interface_recv_data_raw[0] = 0xa0000000 | (ch<<16); - Local_Write(ll,4,Feb_Interface_recv_data_raw); - usleep(20); + Feb_Interface_recv_data_raw[0] = 0xa0000000 | (ch << 16); + Local_Write(ll, 4, Feb_Interface_recv_data_raw); + usleep(20); - Feb_Interface_recv_ndata=-1; - for(t=0;t0) { - Feb_Interface_recv_ndata--; - break; - } - usleep(1000); - } + Feb_Interface_recv_ndata = -1; + for (t = 0; t < ntrys; t++) { + if ((Feb_Interface_recv_ndata = + Local_Read(ll, Feb_Interface_recv_buffer_size * 4, + Feb_Interface_recv_data_raw) / + 4) > 0) { + Feb_Interface_recv_ndata--; + break; + } + usleep(1000); + } - return (Feb_Interface_recv_ndata>=0); + return (Feb_Interface_recv_ndata >= 0); } - - int Feb_Interface_SetByteOrder() { - Feb_Interface_send_data_raw[0] = 0x8fff0000; - if (Local_Write(ll,4,Feb_Interface_send_data_raw)!=4) return 0; - Feb_Interface_send_ndata = 2; - Feb_Interface_send_data[0] = 0; - Feb_Interface_send_data[1] = 0; - unsigned int i; - unsigned int dst = 0xff; - for(i=0;i Feb_Interface_send_buffer_size - 2) + return 0; -int Feb_Interface_ReadRegisters(unsigned int sub_num, unsigned int nreads, unsigned int* reg_nums,unsigned int* values_read) { - //here cout<<"Reading Register ...."<Feb_Interface_send_buffer_size-2) return 0; + Feb_Interface_send_ndata = nreads + 2; + Feb_Interface_send_data[0] = 0x20000000 | nreads << 14; - Feb_Interface_send_ndata = nreads+2; - Feb_Interface_send_data[0] = 0x20000000 | nreads << 14; + for (i = 0; i < nreads; i++) + Feb_Interface_send_data[i + 1] = reg_nums[i]; + Feb_Interface_send_data[nreads + 1] = 0; - for(i=0;iFeb_Interface_send_buffer_size-2) return 0; +int Feb_Interface_WriteRegisters(unsigned int sub_num, unsigned int nwrites, + unsigned int *reg_nums, unsigned int *values, + int *wait_ons, + unsigned int *wait_on_addresses) { + unsigned int i; + nwrites &= 0x3ff; // 10 bits + if (!nwrites || 2 * nwrites > Feb_Interface_send_buffer_size - 2) + return 0; - //cout<<"Write register : "<0) { - n_to_send = ndata_countdown 0) { + n_to_send = ndata_countdown < max_single_packet_size + ? ndata_countdown + : max_single_packet_size; + if (!Feb_Interface_WriteMemory(sub_num, mem_num, start_address, + n_to_send, &(values[ndata_sent]))) { + passed = 0; + break; + } + ndata_countdown -= n_to_send; + ndata_sent += n_to_send; + start_address += n_to_send; + usleep(500); // 500 works + } + return passed; } -int Feb_Interface_WriteMemory(unsigned int sub_num, unsigned int mem_num, unsigned int start_address, unsigned int nwrites, unsigned int *values) { - // -1 means write to all - unsigned int i; - mem_num &= 0x3f; - start_address &= 0x3fff; - nwrites &= 0x3ff; - if (!nwrites||nwrites>Feb_Interface_send_buffer_size-2) { - LOG(logERROR, ("invalid nwrites:%d\n",nwrites)); - return 0; - }//*d-1026 +int Feb_Interface_WriteMemory(unsigned int sub_num, unsigned int mem_num, + unsigned int start_address, unsigned int nwrites, + unsigned int *values) { + // -1 means write to all + unsigned int i; + mem_num &= 0x3f; + start_address &= 0x3fff; + nwrites &= 0x3ff; + if (!nwrites || nwrites > Feb_Interface_send_buffer_size - 2) { + LOG(logERROR, ("invalid nwrites:%d\n", nwrites)); + return 0; + } //*d-1026 - Feb_Interface_send_ndata = nwrites+2;//*d-1026 - Feb_Interface_send_data[0] = 0xc0000000 | mem_num << 24 | nwrites << 14 | start_address; //cmd -> write to memory, nwrites, mem number, start address - Feb_Interface_send_data[nwrites+1] = 0; - for(i=0;i write to memory, nwrites, mem number, start + // address + Feb_Interface_send_data[nwrites + 1] = 0; + for (i = 0; i < nwrites; i++) + Feb_Interface_send_data[i + 1] = values[i]; + if (!Feb_Interface_WriteTo(sub_num)) + return 0; - if (!Feb_Interface_WriteTo(sub_num)) return 0; - - return 1; + return 1; } - - - diff --git a/slsDetectorServers/eigerDetectorServer/FebRegisterDefs.h b/slsDetectorServers/eigerDetectorServer/FebRegisterDefs.h index f2c7adb59..adf70a425 100644 --- a/slsDetectorServers/eigerDetectorServer/FebRegisterDefs.h +++ b/slsDetectorServers/eigerDetectorServer/FebRegisterDefs.h @@ -72,7 +72,7 @@ 0x000c0000 // everything at ~200 kHz (200 kHz MHz ddr readout) //#define DAQ_FIFO_ENABLE 0x00100000 commented out as it -//is not used anywhere +// is not used anywhere #define DAQ_REG_CHIP_CMDS_INT_TRIGGER 0x00100000 // direct chip commands to the DAQ_REG_CHIP_CMDS register @@ -84,7 +84,7 @@ // DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES is old now hard-wired in the firmware // that every image comes with a header #define -//DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES 0x00800000 +// DAQ_NEXPOSURERS_READOUT_COMPLETE_IMAGES 0x00800000 ////DAQ_IGNORE_INITIAL_CRAP and DAQ_CLKOUT_LAST_4_BITS_AND_RETURN_TO_START #define DAQ_NEXPOSURERS_EXTERNAL_ENABLING 0x01000000 @@ -102,7 +102,7 @@ #define DAQ_NEXPOSURERS_ACTIVATE_RATE_CORRECTION 0x40000000 //#define DAQ_MASTER_HALF_MODULE 0x80000000 currently not -//used +// used // chips static bits #define DAQ_STATIC_BIT_PROGRAM 0x00000001 diff --git a/slsDetectorServers/eigerDetectorServer/HardwareIO.c b/slsDetectorServers/eigerDetectorServer/HardwareIO.c old mode 100755 new mode 100644 index f1ffc3c06..e6487af4a --- a/slsDetectorServers/eigerDetectorServer/HardwareIO.c +++ b/slsDetectorServers/eigerDetectorServer/HardwareIO.c @@ -1,76 +1,64 @@ #include "HardwareIO.h" -xfs_u8 HWIO_xfs_in8(xfs_u32 InAddress) -{ +xfs_u8 HWIO_xfs_in8(xfs_u32 InAddress) { /* read the contents of the I/O location and then synchronize the I/O * such that the I/O operation completes before proceeding on */ xfs_u8 IoContents; - __asm__ volatile ("eieio; lbz %0,0(%1)":"=r" (IoContents):"b" - (InAddress)); + __asm__ volatile("eieio; lbz %0,0(%1)" : "=r"(IoContents) : "b"(InAddress)); return IoContents; } /*****************************************************************************/ -xfs_u16 HWIO_xfs_in16(xfs_u32 InAddress) -{ +xfs_u16 HWIO_xfs_in16(xfs_u32 InAddress) { /* read the contents of the I/O location and then synchronize the I/O * such that the I/O operation completes before proceeding on */ xfs_u16 IoContents; - __asm__ volatile ("eieio; lhz %0,0(%1)":"=r" (IoContents):"b" - (InAddress)); + __asm__ volatile("eieio; lhz %0,0(%1)" : "=r"(IoContents) : "b"(InAddress)); return IoContents; } /*****************************************************************************/ -xfs_u32 HWIO_xfs_in32(xfs_u32 InAddress) -{ +xfs_u32 HWIO_xfs_in32(xfs_u32 InAddress) { /* read the contents of the I/O location and then synchronize the I/O * such that the I/O operation completes before proceeding on */ xfs_u32 IoContents; - __asm__ volatile ("eieio; lwz %0,0(%1)":"=r" (IoContents):"b" - (InAddress)); + __asm__ volatile("eieio; lwz %0,0(%1)" : "=r"(IoContents) : "b"(InAddress)); return IoContents; } /*****************************************************************************/ -void HWIO_xfs_out8(xfs_u32 OutAddress, xfs_u8 Value) -{ +void HWIO_xfs_out8(xfs_u32 OutAddress, xfs_u8 Value) { /* write the contents of the I/O location and then synchronize the I/O * such that the I/O operation completes before proceeding on */ - __asm__ volatile ("stb %0,0(%1); eieio"::"r" (Value), "b"(OutAddress)); + __asm__ volatile("stb %0,0(%1); eieio" ::"r"(Value), "b"(OutAddress)); } /*****************************************************************************/ -void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value) -{ +void HWIO_xfs_out16(xfs_u32 OutAddress, xfs_u16 Value) { /* write the contents of the I/O location and then synchronize the I/O * such that the I/O operation completes before proceeding on */ - __asm__ volatile ("sth %0,0(%1); eieio"::"r" (Value), "b"(OutAddress)); + __asm__ volatile("sth %0,0(%1); eieio" ::"r"(Value), "b"(OutAddress)); } /*****************************************************************************/ -void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value) -{ +void HWIO_xfs_out32(xfs_u32 OutAddress, xfs_u32 Value) { /* write the contents of the I/O location and then synchronize the I/O * such that the I/O operation completes before proceeding on */ - __asm__ volatile ("stw %0,0(%1); eieio"::"r" (Value), "b"(OutAddress)); + __asm__ volatile("stw %0,0(%1); eieio" ::"r"(Value), "b"(OutAddress)); } - - - diff --git a/slsDetectorServers/eigerDetectorServer/LocalLinkInterface.c b/slsDetectorServers/eigerDetectorServer/LocalLinkInterface.c old mode 100755 new mode 100644 index f59e03081..97c0f5596 --- a/slsDetectorServers/eigerDetectorServer/LocalLinkInterface.c +++ b/slsDetectorServers/eigerDetectorServer/LocalLinkInterface.c @@ -2,219 +2,221 @@ #include "HardwareMMappingDefs.h" #include "clogger.h" -#include -#include #include +#include +#include - -void Local_LocalLinkInterface1(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr) { - LOG(logDEBUG1, ("Initialize PLB LL FIFOs\n")); - ll->ll_fifo_base=0; - ll->ll_fifo_ctrl_reg=0; - if (Local_Init(ll,ll_fifo_badr)) { - Local_Reset(ll); - LOG(logDEBUG1, ("\tFIFO Status : 0x%08x\n\n\n", Local_StatusVector(ll))); - } else LOG(logERROR, ("\tCould not map LocalLink : 0x%08x\n\n\n", ll_fifo_badr)); +void Local_LocalLinkInterface1(struct LocalLinkInterface *ll, + unsigned int ll_fifo_badr) { + LOG(logDEBUG1, ("Initialize PLB LL FIFOs\n")); + ll->ll_fifo_base = 0; + ll->ll_fifo_ctrl_reg = 0; + if (Local_Init(ll, ll_fifo_badr)) { + Local_Reset(ll); + LOG(logDEBUG1, + ("\tFIFO Status : 0x%08x\n\n\n", Local_StatusVector(ll))); + } else + LOG(logERROR, + ("\tCould not map LocalLink : 0x%08x\n\n\n", ll_fifo_badr)); } - -void Local_LocalLinkInterface(struct LocalLinkInterface* ll) { - LOG(logDEBUG1, ("Initializing new memory\n")); +void Local_LocalLinkInterface(struct LocalLinkInterface *ll) { + LOG(logDEBUG1, ("Initializing new memory\n")); } +int Local_Init(struct LocalLinkInterface *ll, unsigned int ll_fifo_badr) { + int fd; + void *plb_ll_fifo_ptr; + if ((fd = open("/dev/mem", O_RDWR)) < 0) { + fprintf(stderr, "Could not open /dev/mem\n"); + return 0; + } -int Local_Init(struct LocalLinkInterface* ll,unsigned int ll_fifo_badr) { - int fd; - void *plb_ll_fifo_ptr; + plb_ll_fifo_ptr = mmap(0, getpagesize(), PROT_READ | PROT_WRITE, + MAP_FILE | MAP_SHARED, fd, ll_fifo_badr); + close(fd); - if ((fd=open("/dev/mem", O_RDWR)) < 0) { - fprintf(stderr, "Could not open /dev/mem\n"); - return 0; - } + if (plb_ll_fifo_ptr == MAP_FAILED) { + perror("mmap"); + return 0; + } - plb_ll_fifo_ptr = mmap(0, getpagesize(), PROT_READ | PROT_WRITE, MAP_FILE | MAP_SHARED, fd, ll_fifo_badr); - close(fd); + ll->ll_fifo_base = (xfs_u32)plb_ll_fifo_ptr; + ll->ll_fifo_ctrl_reg = 0; - if (plb_ll_fifo_ptr == MAP_FAILED) { - perror ("mmap"); - return 0; - } - - ll->ll_fifo_base = (xfs_u32) plb_ll_fifo_ptr; - ll->ll_fifo_ctrl_reg = 0; - - return 1; + return 1; } - - -int Local_Reset(struct LocalLinkInterface* ll) { - return Local_Reset1(ll,PLB_LL_FIFO_CTRL_RESET_STD); +int Local_Reset(struct LocalLinkInterface *ll) { + return Local_Reset1(ll, PLB_LL_FIFO_CTRL_RESET_STD); } -int Local_Reset1(struct LocalLinkInterface* ll,unsigned int rst_mask) { - ll->ll_fifo_ctrl_reg |= rst_mask; - LOG(logDEBUG1, ("\tCTRL Register bits: 0x%08x\n",ll->ll_fifo_ctrl_reg)); +int Local_Reset1(struct LocalLinkInterface *ll, unsigned int rst_mask) { + ll->ll_fifo_ctrl_reg |= rst_mask; + LOG(logDEBUG1, ("\tCTRL Register bits: 0x%08x\n", ll->ll_fifo_ctrl_reg)); - HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); - HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); - HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); - HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); + HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL, + ll->ll_fifo_ctrl_reg); + HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL, + ll->ll_fifo_ctrl_reg); + HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL, + ll->ll_fifo_ctrl_reg); + HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL, + ll->ll_fifo_ctrl_reg); - ll->ll_fifo_ctrl_reg &= (~rst_mask); + ll->ll_fifo_ctrl_reg &= (~rst_mask); - HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); - return 1; + HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL, + ll->ll_fifo_ctrl_reg); + return 1; } - - -unsigned int Local_StatusVector(struct LocalLinkInterface* ll) { - return HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_STATUS); +unsigned int Local_StatusVector(struct LocalLinkInterface *ll) { + return HWIO_xfs_in32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_STATUS); } -int Local_Write(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer) { - // note: buffer must be word (4 byte) aligned - // frame_len in byte - int vacancy=0; - int i; - int words_send = 0; - int last_word; - unsigned int *word_ptr; - unsigned int fifo_ctrl; - xfs_u32 status; +int Local_Write(struct LocalLinkInterface *ll, unsigned int buffer_len, + void *buffer) { + // note: buffer must be word (4 byte) aligned + // frame_len in byte + int vacancy = 0; + int i; + int words_send = 0; + int last_word; + unsigned int *word_ptr; + unsigned int fifo_ctrl; + xfs_u32 status; - if (buffer_len < 1) return -1; + if (buffer_len < 1) + return -1; - last_word = (buffer_len-1)/4; - word_ptr = (unsigned int *)buffer; + last_word = (buffer_len - 1) / 4; + word_ptr = (unsigned int *)buffer; - LOG(logDEBUG1, ("LL Write - Len: %2d - If: %X - Data: ",buffer_len, ll->ll_fifo_base)); - for (i=0; i < buffer_len/4; i++) - LOG(logDEBUG1, ("%.8X ",*(((unsigned *) buffer)+i))); + LOG(logDEBUG1, ("LL Write - Len: %2d - If: %X - Data: ", buffer_len, + ll->ll_fifo_base)); + for (i = 0; i < buffer_len / 4; i++) + LOG(logDEBUG1, ("%.8X ", *(((unsigned *)buffer) + i))); - while (words_send <= last_word) - { - while (!vacancy)//wait for Fifo to be empty again - { - status = HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_STATUS); - if ((status & PLB_LL_FIFO_STATUS_ALMOSTFULL) == 0) vacancy = 1; - if (vacancy == 0) { - LOG(logERROR, ("Fifo full!\n")); - } - } + while (words_send <= last_word) { + while (!vacancy) // wait for Fifo to be empty again + { + status = + HWIO_xfs_in32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_STATUS); + if ((status & PLB_LL_FIFO_STATUS_ALMOSTFULL) == 0) + vacancy = 1; + if (vacancy == 0) { + LOG(logERROR, ("Fifo full!\n")); + } + } - //Just to know: #define PLB_LL_FIFO_ALMOST_FULL_THRESHOLD_WORDS 100 - for (i=0; ((ill_fifo_base+4*PLB_LL_FIFO_REG_FIFO,word_ptr[words_send++]); - } - } - return buffer_len; + if (words_send == last_word) { + fifo_ctrl |= + (PLB_LL_FIFO_CTRL_LL_EOF | + (((buffer_len - 1) << PLB_LL_FIFO_CTRL_LL_REM_SHIFT) & + PLB_LL_FIFO_CTRL_LL_REM)); + } + Local_ctrl_reg_write_mask(ll, PLB_LL_FIFO_CTRL_LL_MASK, fifo_ctrl); + HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_FIFO, + word_ptr[words_send++]); + } + } + return buffer_len; } +int Local_Read(struct LocalLinkInterface *ll, unsigned int buffer_len, + void *buffer) { + static unsigned int buffer_ptr = 0; + // note: buffer must be word (4 byte) aligned + // frame_len in byte + int len; + unsigned int *word_ptr; + unsigned int status; + volatile unsigned int fifo_val; + int sof = 0; -int Local_Read(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer) { - static unsigned int buffer_ptr = 0; - // note: buffer must be word (4 byte) aligned - // frame_len in byte - int len; - unsigned int *word_ptr; - unsigned int status; - volatile unsigned int fifo_val; - int sof = 0; + LOG(logDEBUG1, ("LL Read - If: %X - Data: ", ll->ll_fifo_base)); - LOG(logDEBUG1, ("LL Read - If: %X - Data: ",ll->ll_fifo_base)); + word_ptr = (unsigned int *)buffer; + do { + status = HWIO_xfs_in32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_STATUS); - word_ptr = (unsigned int *)buffer; - do - { - status = HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_STATUS); + if (!(status & PLB_LL_FIFO_STATUS_EMPTY)) { + if (status & PLB_LL_FIFO_STATUS_LL_SOF) { + if (buffer_ptr) { + buffer_ptr = 0; + return -1; // buffer overflow + } + buffer_ptr = 0; + sof = 1; + } - if (!(status & PLB_LL_FIFO_STATUS_EMPTY)) - { - if (status & PLB_LL_FIFO_STATUS_LL_SOF) - { - if (buffer_ptr) - { - buffer_ptr = 0; - return -1; // buffer overflow - } - buffer_ptr = 0; - sof = 1; - } + fifo_val = HWIO_xfs_in32( + ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_FIFO); // read from fifo - fifo_val = HWIO_xfs_in32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_FIFO); //read from fifo + if ((buffer_ptr > 0) || sof) { + if ((buffer_len >> 2) > buffer_ptr) { + LOG(logDEBUG1, ("%.8X ", fifo_val)); + word_ptr[buffer_ptr++] = fifo_val; // write to buffer + } else { + buffer_ptr = 0; + return -2; // buffer overflow + } - if ((buffer_ptr > 0) || sof) - { - if ( (buffer_len >> 2) > buffer_ptr) - { - LOG(logDEBUG1, ("%.8X ", fifo_val)); - word_ptr[buffer_ptr++] = fifo_val; //write to buffer - } - else - { - buffer_ptr = 0; - return -2; // buffer overflow - } + if (status & PLB_LL_FIFO_STATUS_LL_EOF) { + len = (buffer_ptr << 2) - 3 + + ((status & PLB_LL_FIFO_STATUS_LL_REM) >> + PLB_LL_FIFO_STATUS_LL_REM_SHIFT); + LOG(logDEBUG1, ("Len: %d\n", len)); + buffer_ptr = 0; + return len; + } + } + } + } while (!(status & PLB_LL_FIFO_STATUS_EMPTY)); - if (status & PLB_LL_FIFO_STATUS_LL_EOF) - { - len = (buffer_ptr << 2) -3 + ( (status & PLB_LL_FIFO_STATUS_LL_REM)>>PLB_LL_FIFO_STATUS_LL_REM_SHIFT ); - LOG(logDEBUG1, ("Len: %d\n",len)); - buffer_ptr = 0; - return len; - } - - } - } - } - while(!(status & PLB_LL_FIFO_STATUS_EMPTY)); - - return 0; + return 0; } -int Local_ctrl_reg_write_mask(struct LocalLinkInterface* ll,unsigned int mask, unsigned int val) { - ll->ll_fifo_ctrl_reg &= (~mask); - ll->ll_fifo_ctrl_reg |= ( mask & val); - HWIO_xfs_out32(ll->ll_fifo_base+4*PLB_LL_FIFO_REG_CTRL,ll->ll_fifo_ctrl_reg); - return 1; +int Local_ctrl_reg_write_mask(struct LocalLinkInterface *ll, unsigned int mask, + unsigned int val) { + ll->ll_fifo_ctrl_reg &= (~mask); + ll->ll_fifo_ctrl_reg |= (mask & val); + HWIO_xfs_out32(ll->ll_fifo_base + 4 * PLB_LL_FIFO_REG_CTRL, + ll->ll_fifo_ctrl_reg); + return 1; } +int Local_Test(struct LocalLinkInterface *ll, unsigned int buffer_len, + void *buffer) { -int Local_Test(struct LocalLinkInterface* ll,unsigned int buffer_len, void *buffer) { + int len; + unsigned int rec_buff_len = 4096; + unsigned int rec_buffer[4097]; - int len; - unsigned int rec_buff_len = 4096; - unsigned int rec_buffer[4097]; + Local_Write(ll, buffer_len, buffer); + usleep(10000); + do { + len = Local_Read(ll, rec_buff_len, rec_buffer); + LOG(logDEBUG1, ("receive length: %i\n", len)); - Local_Write(ll,buffer_len,buffer); - usleep(10000); + if (len > 0) { + rec_buffer[len] = 0; + LOG(logINFO, ("%s\n", (char *)rec_buffer)); + } + } while (len > 0); - do{ - len = Local_Read(ll,rec_buff_len,rec_buffer); - LOG(logDEBUG1, ("receive length: %i\n",len)); - - if (len > 0) { - rec_buffer[len]=0; - LOG(logINFO, ("%s\n", (char*) rec_buffer)); - } - } while(len > 0); - - return 1; + return 1; } - diff --git a/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c old mode 100755 new mode 100644 index 24c7300dc..544e8e7ad --- a/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c @@ -1,20 +1,20 @@ #include "slsDetectorFunctionList.h" -#include "versionAPI.h" #include "clogger.h" #include "common.h" +#include "versionAPI.h" #ifndef VIRTUAL -#include "FebControl.h" #include "Beb.h" +#include "FebControl.h" #else #include "communication_virtual.h" #endif -#include //to gethostname #include +#include //to gethostname #ifdef VIRTUAL -#include #include "communication_funcs_UDP.h" +#include #include #include #endif @@ -26,28 +26,31 @@ extern const enum detectorType myDetectorType; // Global variable from communication_funcs.c extern int isControlServer; -extern void getMacAddressinString(char* cmac, int size, uint64_t mac); -extern void getIpAddressinString(char* cip, uint32_t ip); +extern void getMacAddressinString(char *cmac, int size, uint64_t mac); +extern void getIpAddressinString(char *cip, uint32_t ip); int initError = OK; int initCheckDone = 0; char initErrorMessage[MAX_STR_LENGTH]; - -const char* dac_names[16] = {"SvP","Vtr","Vrf","Vrs","SvN","Vtgstv","Vcmp_ll","Vcmp_lr","cal","Vcmp_rl","rxb_rb","rxb_lb","Vcmp_rr","Vcp","Vcn","Vis"}; -int default_tau_from_file= -1; +const char *dac_names[16] = {"SvP", "Vtr", "Vrf", "Vrs", + "SvN", "Vtgstv", "Vcmp_ll", "Vcmp_lr", + "cal", "Vcmp_rl", "rxb_rb", "rxb_lb", + "Vcmp_rr", "Vcp", "Vcn", "Vis"}; +int default_tau_from_file = -1; enum detectorSettings thisSettings; -sls_detector_module *detectorModules=NULL; -int *detectorChans=NULL; -int *detectorDacs=NULL; +sls_detector_module *detectorModules = NULL; +int *detectorChans = NULL; +int *detectorDacs = NULL; int send_to_ten_gig = 0; -int ndsts_in_use=32; -unsigned int nimages_per_request=1; -int on_dst=0; -int dst_requested[32] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; +int ndsts_in_use = 32; +unsigned int nimages_per_request = 1; +int on_dst = 0; +int dst_requested[32] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; -enum masterFlags masterMode=IS_SLAVE; +enum masterFlags masterMode = IS_SLAVE; int top = 0; int master = 0; int normal = 0; @@ -71,118 +74,118 @@ int eiger_nexposures = 1; int eiger_ntriggers = 1; int eiger_tau_ns = 0; - #ifdef VIRTUAL pthread_t virtual_tid; -int virtual_status=0; +int virtual_status = 0; int virtual_stop = 0; -//values for virtual server +// values for virtual server int64_t eiger_virtual_exptime = 0; int64_t eiger_virtual_subexptime = 0; int64_t eiger_virtual_subperiod = 0; int64_t eiger_virtual_period = 0; -int eiger_virtual_counter_bit=1; -int eiger_virtual_ratecorrection_variable=0; -int64_t eiger_virtual_ratetable_tau_in_ns=-1; -int64_t eiger_virtual_ratetable_period_in_ns=-1; -int eiger_virtual_transmission_delay_left=0; -int eiger_virtual_transmission_delay_right=0; -int eiger_virtual_transmission_delay_frame=0; -int eiger_virtual_transmission_flowcontrol_10g=0; -int eiger_virtual_activate=1; +int eiger_virtual_counter_bit = 1; +int eiger_virtual_ratecorrection_variable = 0; +int64_t eiger_virtual_ratetable_tau_in_ns = -1; +int64_t eiger_virtual_ratetable_period_in_ns = -1; +int eiger_virtual_transmission_delay_left = 0; +int eiger_virtual_transmission_delay_right = 0; +int eiger_virtual_transmission_delay_frame = 0; +int eiger_virtual_transmission_flowcontrol_10g = 0; +int eiger_virtual_activate = 1; uint64_t eiger_virtual_startingframenumber = 1; int eiger_virtual_detPos[2] = {0, 0}; int eiger_virtual_test_mode = 0; int eiger_virtual_quad_mode = 0; #endif +int isInitCheckDone() { return initCheckDone; } - - -int isInitCheckDone() { - return initCheckDone; -} - -int getInitResult(char** mess) { - *mess = initErrorMessage; - return initError; +int getInitResult(char **mess) { + *mess = initErrorMessage; + return initError; } void basictests() { - initError = OK; - initCheckDone = 0; - memset(initErrorMessage, 0, MAX_STR_LENGTH); + initError = OK; + initCheckDone = 0; + memset(initErrorMessage, 0, MAX_STR_LENGTH); #ifdef VIRTUAL - LOG(logINFOBLUE, ("************ EIGER Virtual Server *****************\n\n")); + LOG(logINFOBLUE, + ("************ EIGER Virtual Server *****************\n\n")); #endif - uint32_t ipadd = getDetectorIP(); - uint64_t macadd = getDetectorMAC(); - int64_t fwversion = getFirmwareVersion(); - int64_t swversion = getServerVersion(); - int64_t sw_fw_apiversion = getFirmwareAPIVersion(); - int64_t client_sw_apiversion = getClientServerAPIVersion(); + uint32_t ipadd = getDetectorIP(); + uint64_t macadd = getDetectorMAC(); + int64_t fwversion = getFirmwareVersion(); + int64_t swversion = getServerVersion(); + int64_t sw_fw_apiversion = getFirmwareAPIVersion(); + int64_t client_sw_apiversion = getClientServerAPIVersion(); - LOG(logINFOBLUE, ("**************** EIGER Server *********************\n\n" - "Detector IP Addr:\t\t 0x%x\n" - "Detector MAC Addr:\t\t 0x%llx\n" + LOG(logINFOBLUE, + ("**************** EIGER Server *********************\n\n" + "Detector IP Addr:\t\t 0x%x\n" + "Detector MAC Addr:\t\t 0x%llx\n" - "Firmware Version:\t\t %lld\n" - "Software Version:\t\t 0x%llx\n" - "F/w-S/w API Version:\t\t %lld\n" - "Required Firmware Version:\t %d\n" - "Client-Software API Version:\t 0x%llx\n" - "\n" - "********************************************************\n", - (unsigned int)ipadd, - (long long unsigned int)macadd, - (long long int)fwversion, - (long long int)swversion, - (long long int)sw_fw_apiversion, - REQUIRED_FIRMWARE_VERSION, - (long long int)client_sw_apiversion)); - - // update default udpdstip and udpdstmac (1g is hardware ip and hardware mac) - udpDetails.srcip = ipadd; - udpDetails.srcmac = macadd; + "Firmware Version:\t\t %lld\n" + "Software Version:\t\t 0x%llx\n" + "F/w-S/w API Version:\t\t %lld\n" + "Required Firmware Version:\t %d\n" + "Client-Software API Version:\t 0x%llx\n" + "\n" + "********************************************************\n", + (unsigned int)ipadd, (long long unsigned int)macadd, + (long long int)fwversion, (long long int)swversion, + (long long int)sw_fw_apiversion, REQUIRED_FIRMWARE_VERSION, + (long long int)client_sw_apiversion)); + + // update default udpdstip and udpdstmac (1g is hardware ip and hardware + // mac) + udpDetails.srcip = ipadd; + udpDetails.srcmac = macadd; #ifdef VIRTUAL - return; + return; #endif - // return if debugflag is not zero, debug mode - if (debugflag) { - return; - } + // return if debugflag is not zero, debug mode + if (debugflag) { + return; + } - //cant read versions - if (!fwversion || !sw_fw_apiversion) { - strcpy(initErrorMessage, "Cant read versions from FPGA. Please update firmware.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + // cant read versions + if (!fwversion || !sw_fw_apiversion) { + strcpy(initErrorMessage, + "Cant read versions from FPGA. Please update firmware.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for API compatibility - old server - if (sw_fw_apiversion > REQUIRED_FIRMWARE_VERSION) { - sprintf(initErrorMessage, "This detector software software version (%lld) is incompatible.\n" - "Please update detector software (min. %lld) to be compatible with this firmware.\n", - (long long int)sw_fw_apiversion, - (long long int)REQUIRED_FIRMWARE_VERSION); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + // check for API compatibility - old server + if (sw_fw_apiversion > REQUIRED_FIRMWARE_VERSION) { + sprintf( + initErrorMessage, + "This detector software software version (%lld) is incompatible.\n" + "Please update detector software (min. %lld) to be compatible with " + "this firmware.\n", + (long long int)sw_fw_apiversion, + (long long int)REQUIRED_FIRMWARE_VERSION); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for firmware compatibility - old firmware - if ( REQUIRED_FIRMWARE_VERSION > fwversion) { - sprintf(initErrorMessage, "This firmware version (%lld) is incompatible.\n" - "Please update firmware (min. %lld) to be compatible with this server.\n", - (long long int)fwversion, - (long long int)REQUIRED_FIRMWARE_VERSION); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } - LOG(logINFO, ("Compatibility - success\n")); + // check for firmware compatibility - old firmware + if (REQUIRED_FIRMWARE_VERSION > fwversion) { + sprintf(initErrorMessage, + "This firmware version (%lld) is incompatible.\n" + "Please update firmware (min. %lld) to be compatible with this " + "server.\n", + (long long int)fwversion, + (long long int)REQUIRED_FIRMWARE_VERSION); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } + LOG(logINFO, ("Compatibility - success\n")); } #ifdef VIRTUAL @@ -198,819 +201,779 @@ void setTestImageMode(int ival) { } } -int getTestImageMode() { - return eiger_virtual_test_mode; -} +int getTestImageMode() { return eiger_virtual_test_mode; } #endif - /* Ids */ -uint64_t getServerVersion() { - return APIEIGER; -} +uint64_t getServerVersion() { return APIEIGER; } -uint64_t getClientServerAPIVersion() { - return APIEIGER; -} +uint64_t getClientServerAPIVersion() { return APIEIGER; } u_int64_t getFirmwareVersion() { #ifdef VIRTUAL - return 0; + return 0; #else - return Beb_GetFirmwareRevision(); + return Beb_GetFirmwareRevision(); #endif } -u_int64_t getFirmwareAPIVersion() { +u_int64_t getFirmwareAPIVersion() { #ifdef VIRTUAL - return 0; + return 0; #else - return (u_int64_t)Beb_GetFirmwareSoftwareAPIVersion(); + return (u_int64_t)Beb_GetFirmwareSoftwareAPIVersion(); #endif } - - u_int32_t getDetectorNumber() { #ifdef VIRTUAL - return 0; + return 0; #else - return detid; + return detid; #endif } +u_int64_t getDetectorMAC() { + char mac[255] = ""; + u_int64_t res = 0; -u_int64_t getDetectorMAC() { - char mac[255]=""; - u_int64_t res=0; - - //execute and get address - char output[255]; + // execute and get address + char output[255]; #ifdef VIRTUAL - FILE* sysFile = popen("cat /sys/class/net/$(ip route show default | awk '/default/ {print $5}')/address", "r"); + FILE *sysFile = popen("cat /sys/class/net/$(ip route show default | awk " + "'/default/ {print $5}')/address", + "r"); #else - FILE* sysFile = popen("more /sys/class/net/eth0/address", "r"); + FILE *sysFile = popen("more /sys/class/net/eth0/address", "r"); #endif - //FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); + // FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", + // "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); - //getting rid of ":" - char * pch; - pch = strtok (output,":"); - while (pch != NULL) { - strcat(mac,pch); - pch = strtok (NULL, ":"); - } + // getting rid of ":" + char *pch; + pch = strtok(output, ":"); + while (pch != NULL) { + strcat(mac, pch); + pch = strtok(NULL, ":"); + } #ifdef VIRTUAL - sscanf(mac,"%lx",&res); + sscanf(mac, "%lx", &res); #else - sscanf(mac, "%llx", &res); + sscanf(mac, "%llx", &res); #endif - //increment by 1 for 10g - if (send_to_ten_gig) - res++; - //LOG(logINFO, ("mac:%llx\n",res)); + // increment by 1 for 10g + if (send_to_ten_gig) + res++; + // LOG(logINFO, ("mac:%llx\n",res)); - return res; + return res; } - -u_int32_t getDetectorIP() { - char temp[50]=""; - u_int32_t res=0; - //execute and get address - char output[255]; +u_int32_t getDetectorIP() { + char temp[50] = ""; + u_int32_t res = 0; + // execute and get address + char output[255]; #ifdef VIRTUAL - FILE* sysFile = popen("ifconfig $(ip route show default | awk '/default/ {print $5}') | grep 'inet ' | cut -d ' ' -f10", "r"); + FILE *sysFile = popen("ifconfig $(ip route show default | awk '/default/ " + "{print $5}') | grep 'inet ' | cut -d ' ' -f10", + "r"); #else - FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r"); + FILE *sysFile = popen( + "ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", + "r"); #endif - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - if (strlen(output) <= 1) { - return 0; - } + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + if (strlen(output) <= 1) { + return 0; + } - //converting IPaddress to hex. - char* pcword = strtok (output,"."); - while (pcword != NULL) { - sprintf(output,"%02x",atoi(pcword)); - strcat(temp,output); - pcword = strtok (NULL, "."); - } - strcpy(output,temp); - sscanf(output, "%x", &res); - //LOG(logINFO, ("ip:%x\n",res)); + // converting IPaddress to hex. + char *pcword = strtok(output, "."); + while (pcword != NULL) { + sprintf(output, "%02x", atoi(pcword)); + strcat(temp, output); + pcword = strtok(NULL, "."); + } + strcpy(output, temp); + sscanf(output, "%x", &res); + // LOG(logINFO, ("ip:%x\n",res)); - return res; + return res; } - - - - /* initialization */ void initControlServer() { #ifdef VIRTUAL - if (initError == OK) { - getModuleConfiguration(); - setupDetector(); - } - initCheckDone = 1; - return; -#else - if (initError == OK) { - //Feb and Beb Initializations - getModuleConfiguration(); - Feb_Interface_FebInterface(); - Feb_Control_FebControl(); - // different addresses for top and bottom - if (getFirmwareVersion() < FIRMWARE_VERSION_SAME_TOP_BOT_ADDR) { - Feb_Control_Init(master,top,normal, getDetectorNumber()); - } - // same addresses for top and bottom - else { - Feb_Control_Init(master,1, normal, getDetectorNumber()); - } - //master of 9M, check high voltage serial communication to blackfin - if (master && !normal) { - if (Feb_Control_OpenSerialCommunication()) - ;// Feb_Control_CloseSerialCommunication(); - } - LOG(logDEBUG1, ("Control server: FEB Initialization done\n")); - Beb_Beb(detid); - Beb_SetDetectorNumber(getDetectorNumber()); - LOG(logDEBUG1, ("Control server: BEB Initialization done\n")); + if (initError == OK) { + getModuleConfiguration(); + setupDetector(); + } + initCheckDone = 1; + return; +#else + if (initError == OK) { + // Feb and Beb Initializations + getModuleConfiguration(); + Feb_Interface_FebInterface(); + Feb_Control_FebControl(); + // different addresses for top and bottom + if (getFirmwareVersion() < FIRMWARE_VERSION_SAME_TOP_BOT_ADDR) { + Feb_Control_Init(master, top, normal, getDetectorNumber()); + } + // same addresses for top and bottom + else { + Feb_Control_Init(master, 1, normal, getDetectorNumber()); + } + // master of 9M, check high voltage serial communication to blackfin + if (master && !normal) { + if (Feb_Control_OpenSerialCommunication()) + ; // Feb_Control_CloseSerialCommunication(); + } + LOG(logDEBUG1, ("Control server: FEB Initialization done\n")); + Beb_Beb(detid); + Beb_SetDetectorNumber(getDetectorNumber()); + LOG(logDEBUG1, ("Control server: BEB Initialization done\n")); - setupDetector(); - // activate (if it gets ip) (later FW will deactivate at startup) - if (getDetectorIP() != 0) { - Beb_Activate(1); - Feb_Control_activate(1); - } else { - Beb_Activate(0); - Feb_Control_activate(0); - } - } - initCheckDone = 1; + setupDetector(); + // activate (if it gets ip) (later FW will deactivate at startup) + if (getDetectorIP() != 0) { + Beb_Activate(1); + Feb_Control_activate(1); + } else { + Beb_Activate(0); + Feb_Control_activate(0); + } + } + initCheckDone = 1; #endif } void initStopServer() { #ifdef VIRTUAL - getModuleConfiguration(); - virtual_stop = 0; - if (!isControlServer) { - ComVirtual_setStop(virtual_stop); - } - return; + getModuleConfiguration(); + virtual_stop = 0; + if (!isControlServer) { + ComVirtual_setStop(virtual_stop); + } + return; #else - getModuleConfiguration(); - Feb_Interface_FebInterface(); - Feb_Control_FebControl(); - // different addresses for top and bottom - if (getFirmwareVersion() < FIRMWARE_VERSION_SAME_TOP_BOT_ADDR) { - Feb_Control_Init(master,top,normal, getDetectorNumber()); - } - // same addresses for top and bottom - else { - Feb_Control_Init(master,1, normal, getDetectorNumber()); - } - LOG(logDEBUG1, ("Stop server: FEB Initialization done\n")); - // activate (if it gets ip) (later FW will deactivate at startup) - // also needed for stop server for status - if (getDetectorIP() != 0) { - Beb_Activate(1); - Feb_Control_activate(1); - } else { - Beb_Activate(0); - Feb_Control_activate(0); - } + getModuleConfiguration(); + Feb_Interface_FebInterface(); + Feb_Control_FebControl(); + // different addresses for top and bottom + if (getFirmwareVersion() < FIRMWARE_VERSION_SAME_TOP_BOT_ADDR) { + Feb_Control_Init(master, top, normal, getDetectorNumber()); + } + // same addresses for top and bottom + else { + Feb_Control_Init(master, 1, normal, getDetectorNumber()); + } + LOG(logDEBUG1, ("Stop server: FEB Initialization done\n")); + // activate (if it gets ip) (later FW will deactivate at startup) + // also needed for stop server for status + if (getDetectorIP() != 0) { + Beb_Activate(1); + Feb_Control_activate(1); + } else { + Beb_Activate(0); + Feb_Control_activate(0); + } #endif } - void getModuleConfiguration() { #ifdef VIRTUAL #ifdef VIRTUAL_MASTER - master = 1; - top = 1; + master = 1; + top = 1; #else - master = 0; + master = 0; #ifdef VIRTUAL_TOP - top = 1; + top = 1; #else - top = 0; + top = 0; #endif #endif #ifdef VIRTUAL_9M - normal = 0; + normal = 0; #else - normal = 1; + normal = 1; #endif - LOG(logINFOBLUE, ("Module: %s %s %s\n", - (top ? "TOP" : "BOTTOM"), - (master ? "MASTER" : "SLAVE"), - (normal ? "NORMAL" : "SPECIAL"))); - return; + LOG(logINFOBLUE, + ("Module: %s %s %s\n", (top ? "TOP" : "BOTTOM"), + (master ? "MASTER" : "SLAVE"), (normal ? "NORMAL" : "SPECIAL"))); + return; #else - int *m=&master; - int *t=⊤ - int *n=&normal; - Beb_GetModuleConfiguration(m,t,n); - if (isControlServer) { - LOG(logINFOBLUE, ("Module: %s %s %s\n", - (top ? "TOP" : "BOTTOM"), - (master ? "MASTER" : "SLAVE"), - (normal ? "NORMAL" : "SPECIAL"))); - } + int *m = &master; + int *t = ⊤ + int *n = &normal; + Beb_GetModuleConfiguration(m, t, n); + if (isControlServer) { + LOG(logINFOBLUE, + ("Module: %s %s %s\n", (top ? "TOP" : "BOTTOM"), + (master ? "MASTER" : "SLAVE"), (normal ? "NORMAL" : "SPECIAL"))); + } - // read detector id - char output[255]; - FILE* sysFile = popen(IDFILECOMMAND, "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - sscanf(output,"%u",&detid); - if (isControlServer) { - LOG(logINFOBLUE, ("Detector ID: %u\n\n", detid)); - } + // read detector id + char output[255]; + FILE *sysFile = popen(IDFILECOMMAND, "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + sscanf(output, "%u", &detid); + if (isControlServer) { + LOG(logINFOBLUE, ("Detector ID: %u\n\n", detid)); + } #endif } - - /* set up detector */ void allocateDetectorStructureMemory() { - LOG(logINFO, ("This Server is for 1 Eiger half module (250k)\n\n")); + LOG(logINFO, ("This Server is for 1 Eiger half module (250k)\n\n")); - //Allocation of memory - detectorModules = malloc(sizeof(sls_detector_module)); - detectorChans = malloc(NCHIP*NCHAN*sizeof(int)); - detectorDacs = malloc(NDAC*sizeof(int)); - LOG(logDEBUG1, ("modules from 0x%x to 0x%x\n",detectorModules, detectorModules)); - LOG(logDEBUG1, ("chans from 0x%x to 0x%x\n",detectorChans, detectorChans)); - LOG(logDEBUG1, ("dacs from 0x%x to 0x%x\n",detectorDacs, detectorDacs)); - (detectorModules)->dacs = detectorDacs; - (detectorModules)->chanregs = detectorChans; - (detectorModules)->ndac = NDAC; - (detectorModules)->nchip = NCHIP; - (detectorModules)->nchan = NCHIP * NCHAN; - (detectorModules)->reg = 0; - (detectorModules)->iodelay = 0; - (detectorModules)->tau = 0; - (detectorModules)->eV = 0; - thisSettings = UNINITIALIZED; + // Allocation of memory + detectorModules = malloc(sizeof(sls_detector_module)); + detectorChans = malloc(NCHIP * NCHAN * sizeof(int)); + detectorDacs = malloc(NDAC * sizeof(int)); + LOG(logDEBUG1, + ("modules from 0x%x to 0x%x\n", detectorModules, detectorModules)); + LOG(logDEBUG1, ("chans from 0x%x to 0x%x\n", detectorChans, detectorChans)); + LOG(logDEBUG1, ("dacs from 0x%x to 0x%x\n", detectorDacs, detectorDacs)); + (detectorModules)->dacs = detectorDacs; + (detectorModules)->chanregs = detectorChans; + (detectorModules)->ndac = NDAC; + (detectorModules)->nchip = NCHIP; + (detectorModules)->nchan = NCHIP * NCHAN; + (detectorModules)->reg = 0; + (detectorModules)->iodelay = 0; + (detectorModules)->tau = 0; + (detectorModules)->eV = 0; + thisSettings = UNINITIALIZED; - // if trimval requested, should return -1 to acknowledge unknown - int ichan=0; - for (ichan=0; ichan<(detectorModules->nchan); ichan++) { - *((detectorModules->chanregs)+ichan) = -1; - } + // if trimval requested, should return -1 to acknowledge unknown + int ichan = 0; + for (ichan = 0; ichan < (detectorModules->nchan); ichan++) { + *((detectorModules->chanregs) + ichan) = -1; + } } - - void setupDetector() { - allocateDetectorStructureMemory(); - //set dacs - LOG(logINFOBLUE, ("Setting Default Dac values\n")); - { - int i = 0; - const int defaultvals[NDAC] = DEFAULT_DAC_VALS; - for(i = 0; i < NDAC; ++i) { - setDAC((enum DACINDEX)i,defaultvals[i],0); - if ((detectorModules)->dacs[i] != defaultvals[i]) { - LOG(logERROR, ("Setting dac %d failed, wrote %d, read %d\n",i ,defaultvals[i], (detectorModules)->dacs[i])); - } - } - } + allocateDetectorStructureMemory(); + // set dacs + LOG(logINFOBLUE, ("Setting Default Dac values\n")); + { + int i = 0; + const int defaultvals[NDAC] = DEFAULT_DAC_VALS; + for (i = 0; i < NDAC; ++i) { + setDAC((enum DACINDEX)i, defaultvals[i], 0); + if ((detectorModules)->dacs[i] != defaultvals[i]) { + LOG(logERROR, ("Setting dac %d failed, wrote %d, read %d\n", i, + defaultvals[i], (detectorModules)->dacs[i])); + } + } + } #ifdef VIRTUAL - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } #endif - LOG(logINFOBLUE, ("Setting Default Parameters\n")); - //setting default measurement parameters - setNumFrames(DEFAULT_NUM_FRAMES); - setExpTime(DEFAULT_EXPTIME); - setSubExpTime(DEFAULT_SUBFRAME_EXPOSURE); - getSubExpTime(DEFAULT_SUBFRAME_DEADTIME); - setPeriod(DEFAULT_PERIOD); - setNumTriggers(DEFAULT_NUM_CYCLES); - eiger_dynamicrange = DEFAULT_DYNAMIC_RANGE; - setDynamicRange(DEFAULT_DYNAMIC_RANGE); - eiger_photonenergy = DEFAULT_PHOTON_ENERGY; - setParallelMode(DEFAULT_PARALLEL_MODE); - setOverFlowMode(DEFAULT_READOUT_STOREINRAM_MODE); - setStoreInRamMode(DEFAULT_READOUT_OVERFLOW32_MODE); - setClockDivider(RUN_CLK, DEFAULT_CLK_SPEED);//clk_devider,half speed - setIODelay(DEFAULT_IO_DELAY); - setTiming(DEFAULT_TIMING_MODE); - setStartingFrameNumber(DEFAULT_STARTING_FRAME_NUMBER); - setReadNLines(MAX_ROWS_PER_READOUT); - //SetPhotonEnergyCalibrationParameters(-5.8381e-5,1.838515,5.09948e-7,-4.32390e-11,1.32527e-15); - eiger_tau_ns = DEFAULT_RATE_CORRECTION; - setRateCorrection(DEFAULT_RATE_CORRECTION); - int enable[2] = {DEFAULT_EXT_GATING_ENABLE, DEFAULT_EXT_GATING_POLARITY}; - setExternalGating(enable);//disable external gating + LOG(logINFOBLUE, ("Setting Default Parameters\n")); + // setting default measurement parameters + setNumFrames(DEFAULT_NUM_FRAMES); + setExpTime(DEFAULT_EXPTIME); + setSubExpTime(DEFAULT_SUBFRAME_EXPOSURE); + getSubExpTime(DEFAULT_SUBFRAME_DEADTIME); + setPeriod(DEFAULT_PERIOD); + setNumTriggers(DEFAULT_NUM_CYCLES); + eiger_dynamicrange = DEFAULT_DYNAMIC_RANGE; + setDynamicRange(DEFAULT_DYNAMIC_RANGE); + eiger_photonenergy = DEFAULT_PHOTON_ENERGY; + setParallelMode(DEFAULT_PARALLEL_MODE); + setOverFlowMode(DEFAULT_READOUT_STOREINRAM_MODE); + setStoreInRamMode(DEFAULT_READOUT_OVERFLOW32_MODE); + setClockDivider(RUN_CLK, DEFAULT_CLK_SPEED); // clk_devider,half speed + setIODelay(DEFAULT_IO_DELAY); + setTiming(DEFAULT_TIMING_MODE); + setStartingFrameNumber(DEFAULT_STARTING_FRAME_NUMBER); + setReadNLines(MAX_ROWS_PER_READOUT); + // SetPhotonEnergyCalibrationParameters(-5.8381e-5,1.838515,5.09948e-7,-4.32390e-11,1.32527e-15); + eiger_tau_ns = DEFAULT_RATE_CORRECTION; + setRateCorrection(DEFAULT_RATE_CORRECTION); + int enable[2] = {DEFAULT_EXT_GATING_ENABLE, DEFAULT_EXT_GATING_POLARITY}; + setExternalGating(enable); // disable external gating #ifndef VIRTUAL - Feb_Control_SetInTestModeVariable(DEFAULT_TEST_MODE); + Feb_Control_SetInTestModeVariable(DEFAULT_TEST_MODE); #endif - setHighVoltage(DEFAULT_HIGH_VOLTAGE); + setHighVoltage(DEFAULT_HIGH_VOLTAGE); #ifndef VIRTUAL - Feb_Control_CheckSetup(); + Feb_Control_CheckSetup(); #endif - LOG(logDEBUG1, ("Setup detector done\n\n")); + LOG(logDEBUG1, ("Setup detector done\n\n")); } - - - /* advanced read/write reg */ int writeRegister(uint32_t offset, uint32_t data) { #ifdef VIRTUAL - return OK; + return OK; #else - if(!Feb_Control_WriteRegister(offset, data)) { - return FAIL; - } - return OK; + if (!Feb_Control_WriteRegister(offset, data)) { + return FAIL; + } + return OK; #endif } -int readRegister(uint32_t offset, uint32_t* retval) { +int readRegister(uint32_t offset, uint32_t *retval) { #ifdef VIRTUAL - return OK; + return OK; #else - if(!Feb_Control_ReadRegister(offset, retval)) { - return FAIL; - } - return OK; + if (!Feb_Control_ReadRegister(offset, retval)) { + return FAIL; + } + return OK; #endif } - /* set parameters - dr, roi */ - int setDynamicRange(int dr) { - // setting dr - if (dr > 0) { - LOG(logDEBUG1, ("Setting dynamic range: %d\n", dr)); + // setting dr + if (dr > 0) { + LOG(logDEBUG1, ("Setting dynamic range: %d\n", dr)); #ifndef VIRTUAL - if (Feb_Control_SetDynamicRange(dr)) { - on_dst = 0; - int i; - for(i=0;i<32;i++) dst_requested[i] = 0; //clear dst requested - if (!Beb_SetUpTransferParameters(dr)) { - LOG(logERROR, ("Could not set bit mode in the back end\n")); - return eiger_dynamicrange; - } - } + if (Feb_Control_SetDynamicRange(dr)) { + on_dst = 0; + int i; + for (i = 0; i < 32; i++) + dst_requested[i] = 0; // clear dst requested + if (!Beb_SetUpTransferParameters(dr)) { + LOG(logERROR, ("Could not set bit mode in the back end\n")); + return eiger_dynamicrange; + } + } #endif - eiger_dynamicrange = dr; - } - // getting dr + eiger_dynamicrange = dr; + } + // getting dr #ifndef VIRTUAL - eiger_dynamicrange = Feb_Control_GetDynamicRange(); + eiger_dynamicrange = Feb_Control_GetDynamicRange(); #endif - return eiger_dynamicrange; + return eiger_dynamicrange; } - - - /* parameters - readout */ -int setParallelMode(int mode) { - mode = (mode == 0 ? E_NON_PARALLEL : E_PARALLEL); +int setParallelMode(int mode) { + mode = (mode == 0 ? E_NON_PARALLEL : E_PARALLEL); #ifndef VIRTUAL - if (!Feb_Control_SetReadoutMode(mode)) { - return FAIL; - } + if (!Feb_Control_SetReadoutMode(mode)) { + return FAIL; + } #endif - eiger_parallelmode = mode; - return OK; + eiger_parallelmode = mode; + return OK; } -int getParallelMode() { - return (eiger_parallelmode == E_PARALLEL ? 1 : 0); -} +int getParallelMode() { return (eiger_parallelmode == E_PARALLEL ? 1 : 0); } -int setOverFlowMode(int mode) { - mode = (mode == 0 ? 0 : 1); +int setOverFlowMode(int mode) { + mode = (mode == 0 ? 0 : 1); #ifndef VIRTUAL - if (Beb_Set32bitOverflow(mode == 0 ? 0 : 1) == -1) { - return FAIL; - } + if (Beb_Set32bitOverflow(mode == 0 ? 0 : 1) == -1) { + return FAIL; + } #endif - eiger_overflow32 = mode; - return OK; + eiger_overflow32 = mode; + return OK; } -int getOverFlowMode() { - return eiger_overflow32; -} +int getOverFlowMode() { return eiger_overflow32; } void setStoreInRamMode(int mode) { - mode = (mode == 0 ? 0 : 1); - LOG(logINFO, ("Setting Store in Ram mode to %d\n", mode)); - eiger_storeinmem = mode; -} - -int getStoreInRamMode() { - return eiger_storeinmem; + mode = (mode == 0 ? 0 : 1); + LOG(logINFO, ("Setting Store in Ram mode to %d\n", mode)); + eiger_storeinmem = mode; } +int getStoreInRamMode() { return eiger_storeinmem; } /* parameters - timer */ int setStartingFrameNumber(uint64_t value) { #ifdef VIRTUAL - eiger_virtual_startingframenumber = value; - return OK; + eiger_virtual_startingframenumber = value; + return OK; #else - return Beb_SetStartingFrameNumber(value); + return Beb_SetStartingFrameNumber(value); #endif } -int getStartingFrameNumber(uint64_t* retval) { +int getStartingFrameNumber(uint64_t *retval) { #ifdef VIRTUAL - *retval = eiger_virtual_startingframenumber; - return OK; + *retval = eiger_virtual_startingframenumber; + return OK; #else - return Beb_GetStartingFrameNumber(retval, send_to_ten_gig); + return Beb_GetStartingFrameNumber(retval, send_to_ten_gig); #endif } - - - void setNumFrames(int64_t val) { if (val > 0) { - LOG(logINFO, ("Setting number of frames %lld\n", (long long int)val)); + LOG(logINFO, ("Setting number of frames %lld\n", (long long int)val)); #ifndef VIRTUAL - if (Feb_Control_SetNExposures((unsigned int)val * eiger_ntriggers)) { - eiger_nexposures = val; - on_dst = 0; - int i; - for(i=0;i<32;i++) dst_requested[i] = 0; //clear dst requested - ndsts_in_use = 1; - nimages_per_request = eiger_nexposures * eiger_ntriggers; - } + if (Feb_Control_SetNExposures((unsigned int)val * eiger_ntriggers)) { + eiger_nexposures = val; + on_dst = 0; + int i; + for (i = 0; i < 32; i++) + dst_requested[i] = 0; // clear dst requested + ndsts_in_use = 1; + nimages_per_request = eiger_nexposures * eiger_ntriggers; + } #else - eiger_nexposures = val; - nimages_per_request = eiger_nexposures * eiger_ntriggers; -#endif + eiger_nexposures = val; + nimages_per_request = eiger_nexposures * eiger_ntriggers; +#endif } } -int64_t getNumFrames() { - return eiger_nexposures; -} +int64_t getNumFrames() { return eiger_nexposures; } void setNumTriggers(int64_t val) { if (val > 0) { - LOG(logINFO, ("Setting number of triggers %lld\n", (long long int)val)); + LOG(logINFO, ("Setting number of triggers %lld\n", (long long int)val)); #ifndef VIRTUAL - if (Feb_Control_SetNExposures((unsigned int)val * eiger_nexposures)) { - eiger_ntriggers = val; - on_dst = 0; - int i; - for(i=0;i<32;i++) dst_requested[i] = 0; //clear dst requested - nimages_per_request = eiger_nexposures * eiger_ntriggers; - } + if (Feb_Control_SetNExposures((unsigned int)val * eiger_nexposures)) { + eiger_ntriggers = val; + on_dst = 0; + int i; + for (i = 0; i < 32; i++) + dst_requested[i] = 0; // clear dst requested + nimages_per_request = eiger_nexposures * eiger_ntriggers; + } #else - eiger_ntriggers = val; - nimages_per_request = eiger_nexposures * eiger_ntriggers; + eiger_ntriggers = val; + nimages_per_request = eiger_nexposures * eiger_ntriggers; #endif - } + } } -int64_t getNumTriggers() { - return eiger_ntriggers; -} +int64_t getNumTriggers() { return eiger_ntriggers; } int setExpTime(int64_t val) { - LOG(logINFO, ("Setting exptime %lld ns\n", (long long int)val)); + LOG(logINFO, ("Setting exptime %lld ns\n", (long long int)val)); #ifndef VIRTUAL - Feb_Control_SetExposureTime(val/(1E9)); + Feb_Control_SetExposureTime(val / (1E9)); #else - eiger_virtual_exptime = val; + eiger_virtual_exptime = val; #endif return OK; } int64_t getExpTime() { #ifndef VIRTUAL - return (Feb_Control_GetExposureTime()*(1E9)); + return (Feb_Control_GetExposureTime() * (1E9)); #else - return eiger_virtual_exptime; + return eiger_virtual_exptime; #endif } int setPeriod(int64_t val) { - LOG(logINFO, ("Setting period %lld ns\n", (long long int)val)); + LOG(logINFO, ("Setting period %lld ns\n", (long long int)val)); #ifndef VIRTUAL - Feb_Control_SetExposurePeriod(val/(1E9)); + Feb_Control_SetExposurePeriod(val / (1E9)); #else - eiger_virtual_period = val; + eiger_virtual_period = val; #endif return OK; } int64_t getPeriod() { #ifndef VIRTUAL - return (Feb_Control_GetExposurePeriod()*(1E9)); + return (Feb_Control_GetExposurePeriod() * (1E9)); #else - return eiger_virtual_period; + return eiger_virtual_period; #endif } int setSubExpTime(int64_t val) { - LOG(logINFO, ("Setting subexptime %lld ns\n", (long long int)val)); + LOG(logINFO, ("Setting subexptime %lld ns\n", (long long int)val)); #ifndef VIRTUAL - // calculate subdeadtime before settings subexptime - int64_t subdeadtime = Feb_Control_GetSubFramePeriod() - Feb_Control_GetSubFrameExposureTime(); - Feb_Control_SetSubFrameExposureTime(val / 10); - // set subperiod - Feb_Control_SetSubFramePeriod((val+subdeadtime) / 10); + // calculate subdeadtime before settings subexptime + int64_t subdeadtime = + Feb_Control_GetSubFramePeriod() - Feb_Control_GetSubFrameExposureTime(); + Feb_Control_SetSubFrameExposureTime(val / 10); + // set subperiod + Feb_Control_SetSubFramePeriod((val + subdeadtime) / 10); #else - int64_t subdeadtime = eiger_virtual_subperiod * 10 - - eiger_virtual_subexptime * 10; - eiger_virtual_subexptime = (val / (10)); - eiger_virtual_subperiod = (val + subdeadtime) /10; + int64_t subdeadtime = + eiger_virtual_subperiod * 10 - eiger_virtual_subexptime * 10; + eiger_virtual_subexptime = (val / (10)); + eiger_virtual_subperiod = (val + subdeadtime) / 10; #endif - return OK; + return OK; } int64_t getSubExpTime() { #ifndef VIRTUAL - return (Feb_Control_GetSubFrameExposureTime()); + return (Feb_Control_GetSubFrameExposureTime()); #else - return eiger_virtual_subexptime*10; + return eiger_virtual_subexptime * 10; #endif } int setSubDeadTime(int64_t val) { - LOG(logINFO, ("Setting subdeadtime %lld ns\n", (long long int)val)); + LOG(logINFO, ("Setting subdeadtime %lld ns\n", (long long int)val)); #ifndef VIRTUAL - // get subexptime - int64_t subexptime = Feb_Control_GetSubFrameExposureTime(); + // get subexptime + int64_t subexptime = Feb_Control_GetSubFrameExposureTime(); #else - int64_t subexptime = eiger_virtual_subexptime * 10; + int64_t subexptime = eiger_virtual_subexptime * 10; #endif - LOG(logINFO, ("Setting sub period (subdeadtime(%lld)): %lldns\n", - (long long int)subexptime, - (long long int)val), - (long long int)(val + subexptime)); - //calculate subperiod - val += subexptime; + LOG(logINFO, + ("Setting sub period (subdeadtime(%lld)): %lldns\n", + (long long int)subexptime, (long long int)val), + (long long int)(val + subexptime)); + // calculate subperiod + val += subexptime; #ifndef VIRTUAL - Feb_Control_SetSubFramePeriod(val/10); + Feb_Control_SetSubFramePeriod(val / 10); #else - eiger_virtual_subperiod = (val/10); + eiger_virtual_subperiod = (val / 10); #endif - return OK; + return OK; } int64_t getSubDeadTime() { #ifndef VIRTUAL - // get subexptime - int64_t subexptime = Feb_Control_GetSubFrameExposureTime(); + // get subexptime + int64_t subexptime = Feb_Control_GetSubFrameExposureTime(); #else - int64_t subexptime = eiger_virtual_subexptime * 10; + int64_t subexptime = eiger_virtual_subexptime * 10; #endif #ifndef VIRTUAL - return (Feb_Control_GetSubFramePeriod() - subexptime); + return (Feb_Control_GetSubFramePeriod() - subexptime); #else - return (eiger_virtual_subperiod*10 - subexptime); + return (eiger_virtual_subperiod * 10 - subexptime); #endif } int64_t getMeasuredPeriod() { #ifdef VIRTUAL - return 0; + return 0; #else - return Feb_Control_GetMeasuredPeriod(); + return Feb_Control_GetMeasuredPeriod(); #endif } int64_t getMeasuredSubPeriod() { #ifdef VIRTUAL - return 0; + return 0; #else - return Feb_Control_GetSubMeasuredPeriod(); -#endif + return Feb_Control_GetSubMeasuredPeriod(); +#endif } - /* parameters - channel, module, settings */ +int setModule(sls_detector_module myMod, char *mess) { -int setModule(sls_detector_module myMod, char* mess) { + LOG(logINFO, ("Setting module with settings %d\n", myMod.reg)); + // settings + setSettings((enum detectorSettings)myMod.reg); - LOG(logINFO, ("Setting module with settings %d\n",myMod.reg)); + // copy module locally (module number, serial number + // dacs (pointless), trimbit values(if needed) + if (detectorModules) { + if (copyModule(detectorModules, &myMod) == FAIL) { + sprintf(mess, "Could not copy module\n"); + LOG(logERROR, (mess)); + setSettings(UNDEFINED); + LOG(logERROR, ("Settings has been changed to undefined\n")); + return FAIL; + } + } - // settings - setSettings( (enum detectorSettings)myMod.reg); + // iodelay + if (setIODelay(myMod.iodelay) != myMod.iodelay) { + sprintf(mess, "Could not set module. Could not set iodelay %d\n", + myMod.iodelay); + LOG(logERROR, (mess)); + setSettings(UNDEFINED); + LOG(logERROR, ("Settings has been changed to undefined\n")); + return FAIL; + } - //copy module locally (module number, serial number - //dacs (pointless), trimbit values(if needed) - if (detectorModules) { - if (copyModule(detectorModules,&myMod) == FAIL) { - sprintf(mess, "Could not copy module\n"); - LOG(logERROR, (mess)); - setSettings(UNDEFINED); - LOG(logERROR, ("Settings has been changed to undefined\n")); - return FAIL; - } - } + // threshold + if (myMod.eV >= 0) + setThresholdEnergy(myMod.eV); + else { + // (loading a random trim file) (dont return fail) + setSettings(UNDEFINED); + LOG(logERROR, + ("Settings has been changed to undefined (random trim file)\n")); + } - // iodelay - if (setIODelay(myMod.iodelay)!= myMod.iodelay) { - sprintf(mess, "Could not set module. Could not set iodelay %d\n", myMod.iodelay); - LOG(logERROR, (mess)); - setSettings(UNDEFINED); - LOG(logERROR, ("Settings has been changed to undefined\n")); - return FAIL; - } - - // threshold - if (myMod.eV >= 0) - setThresholdEnergy(myMod.eV); - else { - // (loading a random trim file) (dont return fail) - setSettings(UNDEFINED); - LOG(logERROR, ("Settings has been changed to undefined (random trim file)\n")); - } - - // dacs - { - int i = 0; - for(i = 0; i < NDAC; ++i) { - setDAC((enum DACINDEX)i, myMod.dacs[i] , 0); - if (myMod.dacs[i] != (detectorModules)->dacs[i]) { - sprintf(mess, "Could not set module. Could not set dac %d\n", i); - LOG(logERROR, (mess)); - setSettings(UNDEFINED); - LOG(logERROR, ("Settings has been changed to undefined\n")); - return FAIL; - } - } - } + // dacs + { + int i = 0; + for (i = 0; i < NDAC; ++i) { + setDAC((enum DACINDEX)i, myMod.dacs[i], 0); + if (myMod.dacs[i] != (detectorModules)->dacs[i]) { + sprintf(mess, "Could not set module. Could not set dac %d\n", + i); + LOG(logERROR, (mess)); + setSettings(UNDEFINED); + LOG(logERROR, ("Settings has been changed to undefined\n")); + return FAIL; + } + } + } #ifndef VIRTUAL - // trimbits - if (myMod.nchan == 0) { - LOG(logINFO, ("Setting module without trimbits\n")); - } else { - LOG(logINFO, ("Setting module with trimbits\n")); - //includ gap pixels - unsigned int tt[263680]; - int iy, ichip, ix, ip = 0, ich = 0; - for (iy = 0; iy < 256; ++iy) { - for (ichip = 0; ichip < 4; ++ichip) { - for (ix = 0; ix < 256; ++ix) { - tt[ip++] = myMod.chanregs[ich++]; - } - if (ichip < 3) { - tt[ip++] = 0; - tt[ip++] = 0; - } - } - } + // trimbits + if (myMod.nchan == 0) { + LOG(logINFO, ("Setting module without trimbits\n")); + } else { + LOG(logINFO, ("Setting module with trimbits\n")); + // includ gap pixels + unsigned int tt[263680]; + int iy, ichip, ix, ip = 0, ich = 0; + for (iy = 0; iy < 256; ++iy) { + for (ichip = 0; ichip < 4; ++ichip) { + for (ix = 0; ix < 256; ++ix) { + tt[ip++] = myMod.chanregs[ich++]; + } + if (ichip < 3) { + tt[ip++] = 0; + tt[ip++] = 0; + } + } + } - //set trimbits - if (!Feb_Control_SetTrimbits(Feb_Control_GetModuleNumber(), tt,top)) { - sprintf(mess, "Could not set module. Could not set trimbits\n"); - LOG(logERROR, (mess)); - setSettings(UNDEFINED); - LOG(logERROR, ("Settings has been changed to undefined (random trim file)\n")); - return FAIL; - } - } + // set trimbits + if (!Feb_Control_SetTrimbits(Feb_Control_GetModuleNumber(), tt, top)) { + sprintf(mess, "Could not set module. Could not set trimbits\n"); + LOG(logERROR, (mess)); + setSettings(UNDEFINED); + LOG(logERROR, ("Settings has been changed to undefined (random " + "trim file)\n")); + return FAIL; + } + } #endif - - //rate correction - //switch off rate correction: no value read from load settings) - if (myMod.tau == -1) { - if (getRateCorrectionEnable()) { - setRateCorrection(0); - sprintf(mess,"Cannot set module. Cannot set Rate correction. " - "No default tau provided. Deactivating Rate Correction\n"); - LOG(logERROR, (mess)); - setSettings(UNDEFINED); - LOG(logERROR, ("Settings has been changed to undefined (random trim file)\n")); - return FAIL; - } - } - //normal tau value (only if enabled) - else { - setDefaultSettingsTau_in_nsec(myMod.tau); - if (getRateCorrectionEnable()) { - if (setRateCorrection(myMod.tau) == FAIL) { - sprintf(mess, "Cannot set module. Rate correction failed.\n"); - LOG(logERROR, (mess)); - setSettings(UNDEFINED); - LOG(logERROR, ("Settings has been changed to undefined (random trim file)\n")); - return FAIL; - } else { - int64_t retvalTau = getCurrentTau(); - if (myMod.tau != retvalTau) { - sprintf(mess, "Cannot set module. Could not set rate correction\n"); - LOG(logERROR, (mess)); - setSettings(UNDEFINED); - LOG(logERROR, ("Settings has been changed to undefined (random trim file)\n")); - return FAIL; - } - } - } - } - return OK; + // rate correction + // switch off rate correction: no value read from load settings) + if (myMod.tau == -1) { + if (getRateCorrectionEnable()) { + setRateCorrection(0); + sprintf(mess, + "Cannot set module. Cannot set Rate correction. " + "No default tau provided. Deactivating Rate Correction\n"); + LOG(logERROR, (mess)); + setSettings(UNDEFINED); + LOG(logERROR, ("Settings has been changed to undefined (random " + "trim file)\n")); + return FAIL; + } + } + // normal tau value (only if enabled) + else { + setDefaultSettingsTau_in_nsec(myMod.tau); + if (getRateCorrectionEnable()) { + if (setRateCorrection(myMod.tau) == FAIL) { + sprintf(mess, "Cannot set module. Rate correction failed.\n"); + LOG(logERROR, (mess)); + setSettings(UNDEFINED); + LOG(logERROR, ("Settings has been changed to undefined (random " + "trim file)\n")); + return FAIL; + } else { + int64_t retvalTau = getCurrentTau(); + if (myMod.tau != retvalTau) { + sprintf( + mess, + "Cannot set module. Could not set rate correction\n"); + LOG(logERROR, (mess)); + setSettings(UNDEFINED); + LOG(logERROR, ("Settings has been changed to undefined " + "(random trim file)\n")); + return FAIL; + } + } + } + } + return OK; } - int getModule(sls_detector_module *myMod) { #ifndef VIRTUAL - //trimbits - unsigned int* tt; - tt = Feb_Control_GetTrimbits(); + // trimbits + unsigned int *tt; + tt = Feb_Control_GetTrimbits(); - //exclude gap pixels - int iy, ichip, ix, ip = 0, ich = 0; - for (iy = 0; iy < 256; ++iy) { - for (ichip = 0; ichip < 4; ++ichip) { - for (ix = 0; ix < 256; ++iy) { - myMod->chanregs[ich++] = tt[ip++]; - } - if (ichip < 3) { - ip++; - ip++; - } - } - } + // exclude gap pixels + int iy, ichip, ix, ip = 0, ich = 0; + for (iy = 0; iy < 256; ++iy) { + for (ichip = 0; ichip < 4; ++ichip) { + for (ix = 0; ix < 256; ++iy) { + myMod->chanregs[ich++] = tt[ip++]; + } + if (ichip < 3) { + ip++; + ip++; + } + } + } #endif - //copy local module to myMod - if (detectorModules) { - if (copyModule(myMod, detectorModules) == FAIL) - return FAIL; - } - else - return FAIL; - return OK; + // copy local module to myMod + if (detectorModules) { + if (copyModule(myMod, detectorModules) == FAIL) + return FAIL; + } else + return FAIL; + return OK; } - - enum detectorSettings setSettings(enum detectorSettings sett) { - if (sett == UNINITIALIZED) { - return thisSettings; - }if (sett != GET_SETTINGS) - thisSettings = sett; - LOG(logINFO, ("Settings: %d\n", thisSettings)); - return thisSettings; + if (sett == UNINITIALIZED) { + return thisSettings; + } + if (sett != GET_SETTINGS) + thisSettings = sett; + LOG(logINFO, ("Settings: %d\n", thisSettings)); + return thisSettings; } -enum detectorSettings getSettings() { - return thisSettings; -} - - - - - +enum detectorSettings getSettings() { return thisSettings; } /* parameters - threshold */ int getThresholdEnergy() { - LOG(logDEBUG1, ("Getting Threshold energy\n")); - return eiger_photonenergy; + LOG(logDEBUG1, ("Getting Threshold energy\n")); + return eiger_photonenergy; } - int setThresholdEnergy(int ev) { - LOG(logINFO, ("Setting threshold energy:%d\n",ev)); - if (ev >= 0) - eiger_photonenergy = ev; - return getThresholdEnergy(); + LOG(logINFO, ("Setting threshold energy:%d\n", ev)); + if (ev >= 0) + eiger_photonenergy = ev; + return getThresholdEnergy(); } - - - - /* parameters - dac, adc, hv */ // uses LTC2620 with 2.048V (implementation different to others not bit banging) @@ -1018,20 +981,22 @@ void setDAC(enum DACINDEX ind, int val, int mV) { if (val < 0) return; - LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, (mV ? "mV" : "dac units"))); + LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, + (mV ? "mV" : "dac units"))); - if (ind == E_VTHRESHOLD) { - setDAC(E_VCMP_LL, val, mV); + if (ind == E_VTHRESHOLD) { + setDAC(E_VCMP_LL, val, mV); setDAC(E_VCMP_LR, val, mV); setDAC(E_VCMP_RL, val, mV); setDAC(E_VCMP_RR, val, mV); setDAC(E_VCP, val, mV); - return; - } + return; + } // validate index if (ind < 0 || ind >= NDAC) { - LOG(logERROR, ("\tDac index %d is out of bounds (0 to %d)\n", ind, NDAC - 1)); + LOG(logERROR, + ("\tDac index %d is out of bounds (0 to %d)\n", ind, NDAC - 1)); return; } @@ -1041,13 +1006,13 @@ void setDAC(enum DACINDEX ind, int val, int mV) { (detectorModules)->dacs[ind] = val; } // convert to dac units - else if (ConvertToDifferentRange(DAC_MIN_MV, DAC_MAX_MV, LTC2620_MIN_VAL, LTC2620_MAX_VAL, - val, &dacval) == OK) { + else if (ConvertToDifferentRange(DAC_MIN_MV, DAC_MAX_MV, LTC2620_MIN_VAL, + LTC2620_MAX_VAL, val, &dacval) == OK) { (detectorModules)->dacs[ind] = dacval; } #else char iname[10]; - strcpy(iname,dac_names[(int)ind]); + strcpy(iname, dac_names[(int)ind]); if (Feb_Control_SetDAC(iname, val, mV)) { int dacval = 0; Feb_Control_GetDAC(iname, &dacval, 0); @@ -1065,1224 +1030,1224 @@ int getDAC(enum DACINDEX ind, int mV) { ret[3] = getDAC(E_VCMP_RR, mV); ret[4] = getDAC(E_VCP, mV); - if ((ret[0]== ret[1])&& - (ret[1]==ret[2])&& - (ret[2]==ret[3]) && - (ret[3]==ret[4])) { + if ((ret[0] == ret[1]) && (ret[1] == ret[2]) && (ret[2] == ret[3]) && + (ret[3] == ret[4])) { LOG(logINFO, ("\tvthreshold match\n")); return ret[0]; } else { - LOG(logERROR, ("\tvthreshold mismatch vcmp_ll:%d vcmp_lr:%d vcmp_rl:%d vcmp_rr:%d vcp:%d\n", - ret[0],ret[1],ret[2],ret[3], ret[4])); + LOG(logERROR, ("\tvthreshold mismatch vcmp_ll:%d vcmp_lr:%d " + "vcmp_rl:%d vcmp_rr:%d vcp:%d\n", + ret[0], ret[1], ret[2], ret[3], ret[4])); return -1; } } if (!mV) { - LOG(logDEBUG1, ("Getting DAC %d : %d dac\n",ind, (detectorModules)->dacs[ind])); + LOG(logDEBUG1, + ("Getting DAC %d : %d dac\n", ind, (detectorModules)->dacs[ind])); return (detectorModules)->dacs[ind]; } int voltage = -1; // dac units to voltage - ConvertToDifferentRange(LTC2620_MIN_VAL, LTC2620_MAX_VAL, DAC_MIN_MV, DAC_MAX_MV, - (detectorModules)->dacs[ind], &voltage); - LOG(logDEBUG1, ("Getting DAC %d : %d dac (%d mV)\n",ind, (detectorModules)->dacs[ind], voltage)); + ConvertToDifferentRange(LTC2620_MIN_VAL, LTC2620_MAX_VAL, DAC_MIN_MV, + DAC_MAX_MV, (detectorModules)->dacs[ind], &voltage); + LOG(logDEBUG1, ("Getting DAC %d : %d dac (%d mV)\n", ind, + (detectorModules)->dacs[ind], voltage)); return voltage; } -int getMaxDacSteps() { - return DAC_MAX_STEPS; -} - +int getMaxDacSteps() { return DAC_MAX_STEPS; } int getADC(enum ADCINDEX ind) { #ifdef VIRTUAL - return 0; + return 0; #else - int retval = -1; - char tempnames[6][20]={"FPGA EXT", "10GE","DCDC", "SODL", "SODR", "FPGA"}; - char cstore[255]; + int retval = -1; + char tempnames[6][20] = {"FPGA EXT", "10GE", "DCDC", + "SODL", "SODR", "FPGA"}; + char cstore[255]; - switch(ind) { - case TEMP_FPGA: - retval=getBebFPGATemp(); - break; - case TEMP_FPGAFEBL: - retval=Feb_Control_GetLeftFPGATemp(); - break; - case TEMP_FPGAFEBR: - retval=Feb_Control_GetRightFPGATemp(); - break; - case TEMP_FPGAEXT: - case TEMP_10GE: - case TEMP_DCDC: - case TEMP_SODL: - case TEMP_SODR: - sprintf(cstore,"more /sys/class/hwmon/hwmon%d/device/temp1_input",ind); - FILE* sysFile = popen(cstore, "r"); - fgets(cstore, sizeof(cstore), sysFile); - pclose(sysFile); - sscanf(cstore,"%d",&retval); - break; - default: - return -1; - } + switch (ind) { + case TEMP_FPGA: + retval = getBebFPGATemp(); + break; + case TEMP_FPGAFEBL: + retval = Feb_Control_GetLeftFPGATemp(); + break; + case TEMP_FPGAFEBR: + retval = Feb_Control_GetRightFPGATemp(); + break; + case TEMP_FPGAEXT: + case TEMP_10GE: + case TEMP_DCDC: + case TEMP_SODL: + case TEMP_SODR: + sprintf(cstore, "more /sys/class/hwmon/hwmon%d/device/temp1_input", + ind); + FILE *sysFile = popen(cstore, "r"); + fgets(cstore, sizeof(cstore), sysFile); + pclose(sysFile); + sscanf(cstore, "%d", &retval); + break; + default: + return -1; + } - LOG(logINFO, ("Temperature %s: %f°C\n", tempnames[ind], (double)retval/1000.00)); + LOG(logINFO, + ("Temperature %s: %f°C\n", tempnames[ind], (double)retval / 1000.00)); - return retval; + return retval; #endif } - int setHighVoltage(int val) { #ifdef VIRTUAL - if (master) { - // set - if (val!=-1) { - eiger_theo_highvoltage = val; - } - return eiger_theo_highvoltage; - } + if (master) { + // set + if (val != -1) { + eiger_theo_highvoltage = val; + } + return eiger_theo_highvoltage; + } - return SLAVE_HIGH_VOLTAGE_READ_VAL; + return SLAVE_HIGH_VOLTAGE_READ_VAL; #else - if (master) { + if (master) { - // set - if (val!=-1) { - eiger_theo_highvoltage = val; - int ret = Feb_Control_SetHighVoltage(val); - if (!ret) //could not set - return -2; - else if (ret == -1) //outside range - return -1; - } + // set + if (val != -1) { + eiger_theo_highvoltage = val; + int ret = Feb_Control_SetHighVoltage(val); + if (!ret) // could not set + return -2; + else if (ret == -1) // outside range + return -1; + } - // get - if (!Feb_Control_GetHighVoltage(&eiger_highvoltage)) { - LOG(logERROR, ("Could not read high voltage\n")); - return -3; - } + // get + if (!Feb_Control_GetHighVoltage(&eiger_highvoltage)) { + LOG(logERROR, ("Could not read high voltage\n")); + return -3; + } - // tolerance of 5 - if (abs(eiger_theo_highvoltage-eiger_highvoltage) > HIGH_VOLTAGE_TOLERANCE) { - LOG(logINFO, ("High voltage still ramping: %d\n", eiger_highvoltage)); - return eiger_highvoltage; - } - return eiger_theo_highvoltage; - } + // tolerance of 5 + if (abs(eiger_theo_highvoltage - eiger_highvoltage) > + HIGH_VOLTAGE_TOLERANCE) { + LOG(logINFO, + ("High voltage still ramping: %d\n", eiger_highvoltage)); + return eiger_highvoltage; + } + return eiger_theo_highvoltage; + } - return SLAVE_HIGH_VOLTAGE_READ_VAL; + return SLAVE_HIGH_VOLTAGE_READ_VAL; #endif } - - - - - - /* parameters - timing, extsig */ -void setTiming( enum timingMode arg) { - int ret = 0; - switch(arg) { - case AUTO_TIMING: - ret = 0; - break; - case TRIGGER_EXPOSURE: - ret = 2; - break; - case BURST_TRIGGER: - ret = 1; - break; - case GATED: - ret = 3; - break; - default: - LOG(logERROR, ("Unknown timing mode %d\n", arg)); - return; - } - LOG(logDEBUG1, ("Setting Triggering Mode: %d\n", (int)ret)); +void setTiming(enum timingMode arg) { + int ret = 0; + switch (arg) { + case AUTO_TIMING: + ret = 0; + break; + case TRIGGER_EXPOSURE: + ret = 2; + break; + case BURST_TRIGGER: + ret = 1; + break; + case GATED: + ret = 3; + break; + default: + LOG(logERROR, ("Unknown timing mode %d\n", arg)); + return; + } + LOG(logDEBUG1, ("Setting Triggering Mode: %d\n", (int)ret)); #ifndef VIRTUAL - if (Feb_Control_SetTriggerMode(ret,1)) + if (Feb_Control_SetTriggerMode(ret, 1)) #endif - eiger_triggermode = ret; + eiger_triggermode = ret; } - enum timingMode getTiming() { - switch(eiger_triggermode) { - case 0: - return AUTO_TIMING; - case 2: - return TRIGGER_EXPOSURE; - case 1: - return BURST_TRIGGER; - case 3: - return GATED; - default: - LOG(logERROR, ("Unknown trigger mode found %d\n", eiger_triggermode)); - return GET_TIMING_MODE; - } + switch (eiger_triggermode) { + case 0: + return AUTO_TIMING; + case 2: + return TRIGGER_EXPOSURE; + case 1: + return BURST_TRIGGER; + case 3: + return GATED; + default: + LOG(logERROR, ("Unknown trigger mode found %d\n", eiger_triggermode)); + return GET_TIMING_MODE; + } } - - /* configure mac */ int configureMAC() { uint32_t srcip = udpDetails.srcip; - uint32_t dstip = udpDetails.dstip; - uint64_t srcmac = udpDetails.srcmac; - uint64_t dstmac = udpDetails.dstmac; - int srcport = udpDetails.srcport; - int dstport = udpDetails.dstport; - int dstport2 = udpDetails.dstport2; + uint32_t dstip = udpDetails.dstip; + uint64_t srcmac = udpDetails.srcmac; + uint64_t dstmac = udpDetails.dstmac; + int srcport = udpDetails.srcport; + int dstport = udpDetails.dstport; + int dstport2 = udpDetails.dstport2; - LOG(logINFOBLUE, ("Configuring MAC\n")); - char src_mac[50], src_ip[INET_ADDRSTRLEN],dst_mac[50], dst_ip[INET_ADDRSTRLEN]; - getMacAddressinString(src_mac, 50, srcmac); - getMacAddressinString(dst_mac, 50, dstmac); - getIpAddressinString(src_ip, srcip); - getIpAddressinString(dst_ip, dstip); + LOG(logINFOBLUE, ("Configuring MAC\n")); + char src_mac[50], src_ip[INET_ADDRSTRLEN], dst_mac[50], + dst_ip[INET_ADDRSTRLEN]; + getMacAddressinString(src_mac, 50, srcmac); + getMacAddressinString(dst_mac, 50, dstmac); + getIpAddressinString(src_ip, srcip); + getIpAddressinString(dst_ip, dstip); - LOG(logINFO, ( - "\tSource IP : %s\n" - "\tSource MAC : %s\n" - "\tSource Port : %d\n" - "\tDest IP : %s\n" - "\tDest MAC : %s\n" - "\tDest Port : %d\n" - "\tDest Port2 : %d\n", - src_ip, src_mac, srcport, - dst_ip, dst_mac, dstport, dstport2)); + LOG(logINFO, + ("\tSource IP : %s\n" + "\tSource MAC : %s\n" + "\tSource Port : %d\n" + "\tDest IP : %s\n" + "\tDest MAC : %s\n" + "\tDest Port : %d\n" + "\tDest Port2 : %d\n", + src_ip, src_mac, srcport, dst_ip, dst_mac, dstport, dstport2)); #ifdef VIRTUAL - if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { - LOG(logERROR, ("could not set udp destination IP and port\n")); - return FAIL; - } - if (setUDPDestinationDetails(1, dst_ip, dstport2) == FAIL) { - LOG(logERROR, ("could not set udp destination IP and port2\n")); - return FAIL; - } + if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { + LOG(logERROR, ("could not set udp destination IP and port\n")); + return FAIL; + } + if (setUDPDestinationDetails(1, dst_ip, dstport2) == FAIL) { + LOG(logERROR, ("could not set udp destination IP and port2\n")); + return FAIL; + } return OK; #else - int beb_num = detid; - int header_number = 0; - int dst_port = dstport; - if (!top) - dst_port = dstport2; + int beb_num = detid; + int header_number = 0; + int dst_port = dstport; + if (!top) + dst_port = dstport2; - int i=0; - /* for(i=0;i<32;i++) { modified for Aldo*/ - if (Beb_SetBebSrcHeaderInfos(beb_num,send_to_ten_gig,src_mac,src_ip,srcport) && - Beb_SetUpUDPHeader(beb_num,send_to_ten_gig,header_number+i,dst_mac,dst_ip, dst_port)) { - LOG(logDEBUG1, ("\tset up left ok\n")); - } else { - return FAIL; - } - /*}*/ + int i = 0; + /* for(i=0;i<32;i++) { modified for Aldo*/ + if (Beb_SetBebSrcHeaderInfos(beb_num, send_to_ten_gig, src_mac, src_ip, + srcport) && + Beb_SetUpUDPHeader(beb_num, send_to_ten_gig, header_number + i, dst_mac, + dst_ip, dst_port)) { + LOG(logDEBUG1, ("\tset up left ok\n")); + } else { + return FAIL; + } + /*}*/ - header_number = 32; - dst_port = dstport2; - if (!top) - dst_port = dstport; + header_number = 32; + dst_port = dstport2; + if (!top) + dst_port = dstport; - /*for(i=0;i<32;i++) {*//** modified for Aldo*/ - if (Beb_SetBebSrcHeaderInfos(beb_num,send_to_ten_gig,src_mac,src_ip,srcport) && - Beb_SetUpUDPHeader(beb_num,send_to_ten_gig,header_number+i,dst_mac,dst_ip, dst_port)) { - LOG(logDEBUG1, (" set up right ok\n")); - } else { - return FAIL; - } - /*}*/ + /*for(i=0;i<32;i++) {*/ /** modified for Aldo*/ + if (Beb_SetBebSrcHeaderInfos(beb_num, send_to_ten_gig, src_mac, src_ip, + srcport) && + Beb_SetUpUDPHeader(beb_num, send_to_ten_gig, header_number + i, dst_mac, + dst_ip, dst_port)) { + LOG(logDEBUG1, (" set up right ok\n")); + } else { + return FAIL; + } + /*}*/ - on_dst = 0; + on_dst = 0; - for(i=0;i<32;i++) dst_requested[i] = 0; //clear dst requested - nimages_per_request=eiger_nexposures * eiger_ntriggers; + for (i = 0; i < 32; i++) + dst_requested[i] = 0; // clear dst requested + nimages_per_request = eiger_nexposures * eiger_ntriggers; #endif - return OK; + return OK; } - -int setDetectorPosition(int pos[]) { +int setDetectorPosition(int pos[]) { #ifdef VIRTUAL - memcpy(eiger_virtual_detPos, pos, sizeof(eiger_virtual_detPos)); - return OK; + memcpy(eiger_virtual_detPos, pos, sizeof(eiger_virtual_detPos)); + return OK; #else - return Beb_SetDetectorPosition(pos); + return Beb_SetDetectorPosition(pos); #endif } -int* getDetectorPosition() { +int *getDetectorPosition() { #ifdef VIRTUAL - return eiger_virtual_detPos; + return eiger_virtual_detPos; #else - return Beb_GetDetectorPosition(); -#endif + return Beb_GetDetectorPosition(); +#endif } int setQuad(int value) { - if (value < 0) { - return OK; - } + if (value < 0) { + return OK; + } #ifndef VIRTUAL - if (Beb_SetQuad(value) == FAIL) { - return FAIL; - } - if (!Feb_Control_SetQuad(value)) { - return FAIL; - } + if (Beb_SetQuad(value) == FAIL) { + return FAIL; + } + if (!Feb_Control_SetQuad(value)) { + return FAIL; + } #else - eiger_virtual_quad_mode = value; + eiger_virtual_quad_mode = value; #endif - return OK; + return OK; } -int getQuad() { +int getQuad() { #ifdef VIRTUAL - return eiger_virtual_quad_mode; + return eiger_virtual_quad_mode; #else - return Beb_GetQuad(); + return Beb_GetQuad(); #endif } int setInterruptSubframe(int value) { - if(value < 0) - return FAIL; + if (value < 0) + return FAIL; #ifndef VIRTUAL - if(!Feb_Control_SetInterruptSubframe(value)) { - return FAIL; - } + if (!Feb_Control_SetInterruptSubframe(value)) { + return FAIL; + } #endif - return OK; + return OK; } -int getInterruptSubframe() { +int getInterruptSubframe() { #ifdef VIRTUAL - return 0; + return 0; #else - return Feb_Control_GetInterruptSubframe(); + return Feb_Control_GetInterruptSubframe(); #endif } int setReadNLines(int value) { - if(value < 0) - return FAIL; + if (value < 0) + return FAIL; #ifndef VIRTUAL - if(!Feb_Control_SetReadNLines(value)) { - return FAIL; - } - Beb_SetReadNLines(value); + if (!Feb_Control_SetReadNLines(value)) { + return FAIL; + } + Beb_SetReadNLines(value); #endif - return OK; + return OK; } -int getReadNLines() { +int getReadNLines() { #ifdef VIRTUAL - return 0; + return 0; #else - return Feb_Control_GetReadNLines(); + return Feb_Control_GetReadNLines(); #endif } int enableTenGigabitEthernet(int val) { - if (val!=-1) { - LOG(logINFO, ("Setting 10Gbe: %d\n", (val > 0) ? 1 : 0)); - if (val>0) - send_to_ten_gig = 1; - else - send_to_ten_gig = 0; - //configuremac called from client - } - return send_to_ten_gig; + if (val != -1) { + LOG(logINFO, ("Setting 10Gbe: %d\n", (val > 0) ? 1 : 0)); + if (val > 0) + send_to_ten_gig = 1; + else + send_to_ten_gig = 0; + // configuremac called from client + } + return send_to_ten_gig; } - - /* eiger specific - iodelay, pulse, rate, temp, activate, delay nw parameter */ int setClockDivider(enum CLKINDEX ind, int val) { if (ind != RUN_CLK) { - LOG(logERROR, ("Unknown clock index: %d\n", ind)); - return FAIL; - } - if (val >= 0) { - LOG(logINFO, ("Setting Read out Speed: %d\n", val)); + LOG(logERROR, ("Unknown clock index: %d\n", ind)); + return FAIL; + } + if (val >= 0) { + LOG(logINFO, ("Setting Read out Speed: %d\n", val)); #ifndef VIRTUAL - if (Feb_Control_SetReadoutSpeed(val)) + if (Feb_Control_SetReadoutSpeed(val)) #endif - eiger_readoutspeed = val; - } - return OK; + eiger_readoutspeed = val; + } + return OK; } int getClockDivider(enum CLKINDEX ind) { if (ind != RUN_CLK) { - LOG(logERROR, ("Unknown clock index: %d\n", ind)); - return FAIL; - } - return eiger_readoutspeed; + LOG(logERROR, ("Unknown clock index: %d\n", ind)); + return FAIL; + } + return eiger_readoutspeed; } int setIODelay(int val) { - if (val!=-1) { - LOG(logDEBUG1, ("Setting IO Delay: %d\n",val)); + if (val != -1) { + LOG(logDEBUG1, ("Setting IO Delay: %d\n", val)); #ifndef VIRTUAL - if (Feb_Control_SetIDelays(Feb_Control_GetModuleNumber(),val)) + if (Feb_Control_SetIDelays(Feb_Control_GetModuleNumber(), val)) #endif - eiger_iodelay = val; - } - return eiger_iodelay; + eiger_iodelay = val; + } + return eiger_iodelay; } - int setCounterBit(int val) { - if (val!=-1) { - LOG(logINFO, ("Setting Counter Bit: %d\n",val)); + if (val != -1) { + LOG(logINFO, ("Setting Counter Bit: %d\n", val)); #ifdef VIRTUAL - eiger_virtual_counter_bit = val; + eiger_virtual_counter_bit = val; #else - Feb_Control_Set_Counter_Bit(val); + Feb_Control_Set_Counter_Bit(val); #endif - } + } #ifdef VIRTUAL - return eiger_virtual_counter_bit; + return eiger_virtual_counter_bit; #else - return Feb_Control_Get_Counter_Bit(); + return Feb_Control_Get_Counter_Bit(); #endif } - int pulsePixel(int n, int x, int y) { #ifndef VIRTUAL - if (!Feb_Control_Pulse_Pixel(n,x,y)) - return FAIL; + if (!Feb_Control_Pulse_Pixel(n, x, y)) + return FAIL; #endif - return OK; + return OK; } int pulsePixelNMove(int n, int x, int y) { #ifndef VIRTUAL - if (!Feb_Control_PulsePixelNMove(n,x,y)) - return FAIL; + if (!Feb_Control_PulsePixelNMove(n, x, y)) + return FAIL; #endif - return OK; + return OK; } int pulseChip(int n) { #ifndef VIRTUAL - if (!Feb_Control_PulseChip(n)) - return FAIL; + if (!Feb_Control_PulseChip(n)) + return FAIL; #endif - return OK; + return OK; } -int updateRateCorrection(char* mess) { - int ret = OK; - // recalculates rate correction table, or switches off in wrong bit mode - if (eiger_tau_ns != 0) { - switch (eiger_dynamicrange) { - case 16: - case 32: - ret = setRateCorrection(eiger_tau_ns); - break; - default: - setRateCorrection(0); - strcpy(mess, "Rate correction Deactivated, must be in 32 or 16 bit mode"); - ret = FAIL; - break; - } - } - getCurrentTau(); // update eiger_tau_ns - return ret; +int updateRateCorrection(char *mess) { + int ret = OK; + // recalculates rate correction table, or switches off in wrong bit mode + if (eiger_tau_ns != 0) { + switch (eiger_dynamicrange) { + case 16: + case 32: + ret = setRateCorrection(eiger_tau_ns); + break; + default: + setRateCorrection(0); + strcpy(mess, + "Rate correction Deactivated, must be in 32 or 16 bit mode"); + ret = FAIL; + break; + } + } + getCurrentTau(); // update eiger_tau_ns + return ret; } -int validateAndSetRateCorrection(int64_t tau_ns, char* mess) { - // switching on in wrong bit mode - if ((tau_ns != 0) && - (eiger_dynamicrange != 32) && (eiger_dynamicrange != 16)) { - strcpy(mess,"Rate correction Deactivated, must be in 32 or 16 bit mode\n"); - LOG(logERROR,(mess)); - return FAIL; - } - // default tau (-1, get proper value) - if (tau_ns < 0) { - tau_ns = getDefaultSettingsTau_in_nsec(); - if (tau_ns < 0) { - strcpy(mess,"Default settings file not loaded. No default tau yet\n"); - LOG(logERROR,(mess)); - return FAIL; - } - eiger_tau_ns = -1; - } - // user defined value (settings become undefined) - else if (tau_ns > 0) { - setSettings(UNDEFINED); - LOG(logERROR, ("Settings has been changed to undefined (tau changed)\n")); - eiger_tau_ns = tau_ns; - } - return setRateCorrection(tau_ns); +int validateAndSetRateCorrection(int64_t tau_ns, char *mess) { + // switching on in wrong bit mode + if ((tau_ns != 0) && (eiger_dynamicrange != 32) && + (eiger_dynamicrange != 16)) { + strcpy(mess, + "Rate correction Deactivated, must be in 32 or 16 bit mode\n"); + LOG(logERROR, (mess)); + return FAIL; + } + // default tau (-1, get proper value) + if (tau_ns < 0) { + tau_ns = getDefaultSettingsTau_in_nsec(); + if (tau_ns < 0) { + strcpy(mess, + "Default settings file not loaded. No default tau yet\n"); + LOG(logERROR, (mess)); + return FAIL; + } + eiger_tau_ns = -1; + } + // user defined value (settings become undefined) + else if (tau_ns > 0) { + setSettings(UNDEFINED); + LOG(logERROR, + ("Settings has been changed to undefined (tau changed)\n")); + eiger_tau_ns = tau_ns; + } + return setRateCorrection(tau_ns); } -int setRateCorrection(int64_t custom_tau_in_nsec) {//in nanosec (will never be -1) +int setRateCorrection( + int64_t custom_tau_in_nsec) { // in nanosec (will never be -1) #ifdef VIRTUAL - //deactivating rate correction - if (custom_tau_in_nsec==0) { - eiger_virtual_ratecorrection_variable = 0; - return OK; - } + // deactivating rate correction + if (custom_tau_in_nsec == 0) { + eiger_virtual_ratecorrection_variable = 0; + return OK; + } - //when dynamic range changes, use old tau - else if (custom_tau_in_nsec == -1) - custom_tau_in_nsec = eiger_virtual_ratetable_tau_in_ns; + // when dynamic range changes, use old tau + else if (custom_tau_in_nsec == -1) + custom_tau_in_nsec = eiger_virtual_ratetable_tau_in_ns; - //get period = subexptime if 32bit , else period = exptime if 16 bit - int64_t actual_period = eiger_virtual_subexptime*10; //already in nsec - if (eiger_dynamicrange == 16) - actual_period = eiger_virtual_exptime; + // get period = subexptime if 32bit , else period = exptime if 16 bit + int64_t actual_period = eiger_virtual_subexptime * 10; // already in nsec + if (eiger_dynamicrange == 16) + actual_period = eiger_virtual_exptime; - int64_t ratetable_period_in_nsec = eiger_virtual_ratetable_period_in_ns; - int64_t tau_in_nsec = eiger_virtual_ratetable_tau_in_ns; + int64_t ratetable_period_in_nsec = eiger_virtual_ratetable_period_in_ns; + int64_t tau_in_nsec = eiger_virtual_ratetable_tau_in_ns; + // same setting + if ((tau_in_nsec == custom_tau_in_nsec) && + (ratetable_period_in_nsec == actual_period)) { + if (eiger_dynamicrange == 32) { + LOG(logINFO, ("Rate Table already created before: Same Tau %lldns, " + "Same subexptime %lldns\n", + (long long int)tau_in_nsec, + (long long int)ratetable_period_in_nsec)); + } else { + LOG(logINFO, ("Rate Table already created before: Same Tau %lldns, " + "Same exptime %lldns\n", + (long long int)tau_in_nsec, + (long long int)ratetable_period_in_nsec)); + } + } + // different setting, calculate table + else { + eiger_virtual_ratetable_tau_in_ns = custom_tau_in_nsec; + eiger_virtual_ratetable_period_in_ns = eiger_virtual_subexptime * 10; + if (eiger_dynamicrange == 16) + eiger_virtual_ratetable_period_in_ns = eiger_virtual_exptime; + } + // activating rate correction + eiger_virtual_ratecorrection_variable = 1; + LOG(logINFO, ("Rate Correction Value set to %lld ns\n", + (long long int)eiger_virtual_ratetable_tau_in_ns)); - - //same setting - if ((tau_in_nsec == custom_tau_in_nsec) && (ratetable_period_in_nsec == actual_period)) { - if (eiger_dynamicrange == 32) { - LOG(logINFO, ("Rate Table already created before: Same Tau %lldns, Same subexptime %lldns\n", - (long long int)tau_in_nsec,(long long int)ratetable_period_in_nsec)); - } else { - LOG(logINFO, ("Rate Table already created before: Same Tau %lldns, Same exptime %lldns\n", - (long long int)tau_in_nsec,(long long int)ratetable_period_in_nsec)); - } - } - //different setting, calculate table - else { - eiger_virtual_ratetable_tau_in_ns = custom_tau_in_nsec; - eiger_virtual_ratetable_period_in_ns = eiger_virtual_subexptime*10; - if (eiger_dynamicrange == 16) - eiger_virtual_ratetable_period_in_ns = eiger_virtual_exptime; - } - //activating rate correction - eiger_virtual_ratecorrection_variable = 1; - LOG(logINFO, ("Rate Correction Value set to %lld ns\n",(long long int)eiger_virtual_ratetable_tau_in_ns)); - - return OK; + return OK; #else - //deactivating rate correction - if (custom_tau_in_nsec==0) { - Feb_Control_SetRateCorrectionVariable(0); - return OK; - } + // deactivating rate correction + if (custom_tau_in_nsec == 0) { + Feb_Control_SetRateCorrectionVariable(0); + return OK; + } - //when dynamic range changes, use old tau - else if (custom_tau_in_nsec == -1) - custom_tau_in_nsec = Feb_Control_Get_RateTable_Tau_in_nsec(); + // when dynamic range changes, use old tau + else if (custom_tau_in_nsec == -1) + custom_tau_in_nsec = Feb_Control_Get_RateTable_Tau_in_nsec(); + int dr = Feb_Control_GetDynamicRange(); + // get period = subexptime if 32bit , else period = exptime if 16 bit + int64_t actual_period = + Feb_Control_GetSubFrameExposureTime(); // already in nsec + if (dr == 16) + actual_period = Feb_Control_GetExposureTime_in_nsec(); - int dr = Feb_Control_GetDynamicRange(); - //get period = subexptime if 32bit , else period = exptime if 16 bit - int64_t actual_period = Feb_Control_GetSubFrameExposureTime(); //already in nsec - if (dr == 16) - actual_period = Feb_Control_GetExposureTime_in_nsec(); + int64_t ratetable_period_in_nsec = + Feb_Control_Get_RateTable_Period_in_nsec(); + int64_t tau_in_nsec = Feb_Control_Get_RateTable_Tau_in_nsec(); - int64_t ratetable_period_in_nsec = Feb_Control_Get_RateTable_Period_in_nsec(); - int64_t tau_in_nsec = Feb_Control_Get_RateTable_Tau_in_nsec(); + // same setting + if ((tau_in_nsec == custom_tau_in_nsec) && + (ratetable_period_in_nsec == actual_period)) { + if (dr == 32) { + LOG(logINFO, ("Rate Table already created before: Same Tau %lldns, " + "Same subexptime %lldns\n", + tau_in_nsec, ratetable_period_in_nsec)); + } else { + LOG(logINFO, ("Rate Table already created before: Same Tau %lldns, " + "Same exptime %lldns\n", + tau_in_nsec, ratetable_period_in_nsec)); + } + } + // different setting, calculate table + else { + int ret = Feb_Control_SetRateCorrectionTau(custom_tau_in_nsec); + if (ret <= 0) { + LOG(logERROR, + ("Rate correction failed. Deactivating rate correction\n")); + Feb_Control_SetRateCorrectionVariable(0); + return FAIL; + } + } + // activating rate correction + Feb_Control_SetRateCorrectionVariable(1); + LOG(logINFO, ("Rate Correction Value set to %lld ns\n", + (long long int)Feb_Control_Get_RateTable_Tau_in_nsec())); + Feb_Control_PrintCorrectedValues(); - - //same setting - if ((tau_in_nsec == custom_tau_in_nsec) && (ratetable_period_in_nsec == actual_period)) { - if (dr == 32) { - LOG(logINFO, ("Rate Table already created before: Same Tau %lldns, Same subexptime %lldns\n", - tau_in_nsec,ratetable_period_in_nsec)); - } else { - LOG(logINFO, ("Rate Table already created before: Same Tau %lldns, Same exptime %lldns\n", - tau_in_nsec,ratetable_period_in_nsec)); - } - } - //different setting, calculate table - else { - int ret = Feb_Control_SetRateCorrectionTau(custom_tau_in_nsec); - if (ret<=0) { - LOG(logERROR, ("Rate correction failed. Deactivating rate correction\n")); - Feb_Control_SetRateCorrectionVariable(0); - return FAIL; - } - } - //activating rate correction - Feb_Control_SetRateCorrectionVariable(1); - LOG(logINFO, ("Rate Correction Value set to %lld ns\n", (long long int)Feb_Control_Get_RateTable_Tau_in_nsec())); - Feb_Control_PrintCorrectedValues(); - - return OK; + return OK; #endif } int getRateCorrectionEnable() { #ifdef VIRTUAL - return eiger_virtual_ratecorrection_variable; + return eiger_virtual_ratecorrection_variable; #else - return Feb_Control_GetRateCorrectionVariable(); + return Feb_Control_GetRateCorrectionVariable(); #endif } -int getDefaultSettingsTau_in_nsec() { - return default_tau_from_file; -} +int getDefaultSettingsTau_in_nsec() { return default_tau_from_file; } void setDefaultSettingsTau_in_nsec(int t) { - default_tau_from_file = t; - LOG(logINFOBLUE, ("Default tau set to %d\n", default_tau_from_file)); + default_tau_from_file = t; + LOG(logINFOBLUE, ("Default tau set to %d\n", default_tau_from_file)); } int64_t getCurrentTau() { - if (!getRateCorrectionEnable()) { - eiger_tau_ns = 0; - return 0; - } - else { + if (!getRateCorrectionEnable()) { + eiger_tau_ns = 0; + return 0; + } else { #ifndef VIRTUAL - eiger_tau_ns = Feb_Control_Get_RateTable_Tau_in_nsec(); + eiger_tau_ns = Feb_Control_Get_RateTable_Tau_in_nsec(); #else - eiger_tau_ns = eiger_virtual_ratetable_tau_in_ns; + eiger_tau_ns = eiger_virtual_ratetable_tau_in_ns; #endif - return eiger_tau_ns; - } + return eiger_tau_ns; + } } void setExternalGating(int enable[]) { - if (enable[0]>=0 && enable[1]>=0) { + if (enable[0] >= 0 && enable[1] >= 0) { #ifndef VIRTUAL - Feb_Control_SetExternalEnableMode(enable[0], enable[1]);//enable = 0 or 1, polarity = 0 or 1 , where 1 is positive + Feb_Control_SetExternalEnableMode( + enable[0], enable[1]); // enable = 0 or 1, polarity = 0 or 1 , where + // 1 is positive #endif - eiger_extgating = enable[0]; - eiger_extgatingpolarity = enable[1]; - } - enable[0] = eiger_extgating; - enable[1] = eiger_extgatingpolarity; + eiger_extgating = enable[0]; + eiger_extgatingpolarity = enable[1]; + } + enable[0] = eiger_extgating; + enable[1] = eiger_extgatingpolarity; } int setAllTrimbits(int val) { #ifndef VIRTUAL - if (!Feb_Control_SaveAllTrimbitsTo(val,top)) { - LOG(logERROR, ("Could not set all trimbits\n")); - return FAIL; - } + if (!Feb_Control_SaveAllTrimbitsTo(val, top)) { + LOG(logERROR, ("Could not set all trimbits\n")); + return FAIL; + } #endif - if (detectorModules) { - int ichan; - for (ichan=0; ichan<(detectorModules->nchan); ichan++) { - *((detectorModules->chanregs)+ichan)=val; - } - } + if (detectorModules) { + int ichan; + for (ichan = 0; ichan < (detectorModules->nchan); ichan++) { + *((detectorModules->chanregs) + ichan) = val; + } + } - LOG(logINFO, ("All trimbits have been set to %d\n", val)); - return OK; + LOG(logINFO, ("All trimbits have been set to %d\n", val)); + return OK; } int getAllTrimbits() { - int ichan=0; - int value = *((detectorModules->chanregs)); - if (detectorModules) { - for (ichan=0; ichan<(detectorModules->nchan); ichan++) { - if (*((detectorModules->chanregs)+ichan) != value) { - value= -1; - break; - } - - } - } - LOG(logINFO, ("Value of all Trimbits: %d\n", value)); - return value; + int ichan = 0; + int value = *((detectorModules->chanregs)); + if (detectorModules) { + for (ichan = 0; ichan < (detectorModules->nchan); ichan++) { + if (*((detectorModules->chanregs) + ichan) != value) { + value = -1; + break; + } + } + } + LOG(logINFO, ("Value of all Trimbits: %d\n", value)); + return value; } int getBebFPGATemp() { #ifdef VIRTUAL - return 0; + return 0; #else - return Beb_GetBebFPGATemp(); + return Beb_GetBebFPGATemp(); #endif } int activate(int enable) { #ifdef VIRTUAL - if (enable >=0) - eiger_virtual_activate = enable; - return eiger_virtual_activate; + if (enable >= 0) + eiger_virtual_activate = enable; + return eiger_virtual_activate; #else - int ret = Beb_Activate(enable); - Feb_Control_activate(ret); - return ret; + int ret = Beb_Activate(enable); + Feb_Control_activate(ret); + return ret; #endif } int getTenGigaFlowControl() { #ifdef VIRTUAL - return eiger_virtual_transmission_flowcontrol_10g; + return eiger_virtual_transmission_flowcontrol_10g; #else - return Beb_GetTenGigaFlowControl(); + return Beb_GetTenGigaFlowControl(); #endif } int setTenGigaFlowControl(int value) { #ifdef VIRTUAL - eiger_virtual_transmission_flowcontrol_10g = (value == 0? 0 : 1); + eiger_virtual_transmission_flowcontrol_10g = (value == 0 ? 0 : 1); #else - if (!Beb_SetTenGigaFlowControl(value)) { - return FAIL; - } + if (!Beb_SetTenGigaFlowControl(value)) { + return FAIL; + } #endif - return OK; + return OK; } int getTransmissionDelayFrame() { #ifdef VIRTUAL - return eiger_virtual_transmission_delay_frame; + return eiger_virtual_transmission_delay_frame; #else - return Beb_GetTransmissionDelayFrame(); + return Beb_GetTransmissionDelayFrame(); #endif } int setTransmissionDelayFrame(int value) { #ifdef VIRTUAL - eiger_virtual_transmission_delay_frame = value; + eiger_virtual_transmission_delay_frame = value; #else - if (!Beb_SetTransmissionDelayFrame(value)) { - return FAIL; - } + if (!Beb_SetTransmissionDelayFrame(value)) { + return FAIL; + } #endif - return OK; + return OK; } int getTransmissionDelayLeft() { #ifdef VIRTUAL - return eiger_virtual_transmission_delay_left; + return eiger_virtual_transmission_delay_left; #else - return Beb_GetTransmissionDelayLeft(); + return Beb_GetTransmissionDelayLeft(); #endif } int setTransmissionDelayLeft(int value) { #ifdef VIRTUAL - eiger_virtual_transmission_delay_left = value; + eiger_virtual_transmission_delay_left = value; #else - if (!Beb_SetTransmissionDelayLeft(value)) { - return FAIL; - } + if (!Beb_SetTransmissionDelayLeft(value)) { + return FAIL; + } #endif - return OK; + return OK; } int getTransmissionDelayRight() { #ifdef VIRTUAL - return eiger_virtual_transmission_delay_right; + return eiger_virtual_transmission_delay_right; #else - return Beb_GetTransmissionDelayRight(); + return Beb_GetTransmissionDelayRight(); #endif } int setTransmissionDelayRight(int value) { #ifdef VIRTUAL - eiger_virtual_transmission_delay_right = value; + eiger_virtual_transmission_delay_right = value; #else - if (!Beb_SetTransmissionDelayRight(value)) { - return FAIL; - } + if (!Beb_SetTransmissionDelayRight(value)) { + return FAIL; + } #endif - return OK; + return OK; } - - - - - - - /* aquisition */ - int prepareAcquisition() { #ifndef VIRTUAL - LOG(logINFO, ("Going to prepare for acquisition with counter_bit:%d\n",Feb_Control_Get_Counter_Bit())); - Feb_Control_PrepareForAcquisition(); + LOG(logINFO, ("Going to prepare for acquisition with counter_bit:%d\n", + Feb_Control_Get_Counter_Bit())); + Feb_Control_PrepareForAcquisition(); #endif - return OK; - + return OK; } - int startStateMachine() { #ifdef VIRTUAL - // create udp socket - if(createUDPSocket(0) != OK) { - return FAIL; - } - if(createUDPSocket(1) != OK) { - return FAIL; - } - LOG(logINFOBLUE, ("Starting State Machine\n")); - virtual_status = 1; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - virtual_stop = ComVirtual_getStop(); - if (virtual_stop != 0) { - LOG(logERROR, ("Cant start acquisition. " - "Stop server has not updated stop status to 0\n")); - return FAIL; - } - } - if (pthread_create(&virtual_tid, NULL, &start_timer, NULL)) { - LOG(logERROR, ("Could not start Virtual acquisition thread\n")); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - return FAIL; - } - LOG(logINFO ,("Virtual Acquisition started\n")); - return OK; + // create udp socket + if (createUDPSocket(0) != OK) { + return FAIL; + } + if (createUDPSocket(1) != OK) { + return FAIL; + } + LOG(logINFOBLUE, ("Starting State Machine\n")); + virtual_status = 1; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + virtual_stop = ComVirtual_getStop(); + if (virtual_stop != 0) { + LOG(logERROR, ("Cant start acquisition. " + "Stop server has not updated stop status to 0\n")); + return FAIL; + } + } + if (pthread_create(&virtual_tid, NULL, &start_timer, NULL)) { + LOG(logERROR, ("Could not start Virtual acquisition thread\n")); + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + return FAIL; + } + LOG(logINFO, ("Virtual Acquisition started\n")); + return OK; #else - LOG(logINFOBLUE, ("Starting State Machine\n")); - int ret = OK,prev_flag; - //get the DAQ toggle bit - prev_flag = Feb_Control_AcquisitionStartedBit(); + LOG(logINFOBLUE, ("Starting State Machine\n")); + int ret = OK, prev_flag; + // get the DAQ toggle bit + prev_flag = Feb_Control_AcquisitionStartedBit(); - LOG(logINFO, ("Going to start acquisition\n")); - Feb_Control_StartAcquisition(); + LOG(logINFO, ("Going to start acquisition\n")); + Feb_Control_StartAcquisition(); - if (!eiger_storeinmem) { - LOG(logINFO, ("requesting images right after start\n")); - ret = startReadOut(); - } + if (!eiger_storeinmem) { + LOG(logINFO, ("requesting images right after start\n")); + ret = startReadOut(); + } - //wait for acquisition start - if (ret == OK) { - if (!Feb_Control_WaitForStartedFlag(5000, prev_flag)) { - LOG(logERROR, ("Acquisition did not LOG(logERROR ouble reading register\n")); - return FAIL; - } - LOG(logINFOGREEN, ("Acquisition started\n")); - } + // wait for acquisition start + if (ret == OK) { + if (!Feb_Control_WaitForStartedFlag(5000, prev_flag)) { + LOG(logERROR, + ("Acquisition did not LOG(logERROR ouble reading register\n")); + return FAIL; + } + LOG(logINFOGREEN, ("Acquisition started\n")); + } - return ret; + return ret; #endif } #ifdef VIRTUAL -void* start_timer(void* arg) { - if (!isControlServer) { - return NULL; - } +void *start_timer(void *arg) { + if (!isControlServer) { + return NULL; + } - int64_t periodNs = eiger_virtual_period; - int numFrames = nimages_per_request; - int64_t expUs = eiger_virtual_exptime / 1000; + int64_t periodNs = eiger_virtual_period; + int numFrames = nimages_per_request; + int64_t expUs = eiger_virtual_exptime / 1000; - int dr = eiger_dynamicrange; - double bytesPerPixel = (double)dr/8.00; - int tgEnable = send_to_ten_gig; - int datasize = (tgEnable ? 4096 : 1024); - int packetsize = datasize + sizeof(sls_detector_header); - int numPacketsPerFrame = (tgEnable ? 4 : 16) * dr; - int npixelsx = 256 * 2 * bytesPerPixel; - int databytes = 256 * 256 * 2 * bytesPerPixel; - int row = eiger_virtual_detPos[0]; - int colLeft = top ? eiger_virtual_detPos[1] : eiger_virtual_detPos[1] + 1; - int colRight = top ? eiger_virtual_detPos[1] + 1 : eiger_virtual_detPos[1]; - int ntotpixels = 256 * 256 * 4; + int dr = eiger_dynamicrange; + double bytesPerPixel = (double)dr / 8.00; + int tgEnable = send_to_ten_gig; + int datasize = (tgEnable ? 4096 : 1024); + int packetsize = datasize + sizeof(sls_detector_header); + int numPacketsPerFrame = (tgEnable ? 4 : 16) * dr; + int npixelsx = 256 * 2 * bytesPerPixel; + int databytes = 256 * 256 * 2 * bytesPerPixel; + int row = eiger_virtual_detPos[0]; + int colLeft = top ? eiger_virtual_detPos[1] : eiger_virtual_detPos[1] + 1; + int colRight = top ? eiger_virtual_detPos[1] + 1 : eiger_virtual_detPos[1]; + int ntotpixels = 256 * 256 * 4; - LOG(logINFO, (" dr:%d\n bytesperpixel:%f\n tgenable:%d\n datasize:%d\n packetsize:%d\n numpackes:%d\n npixelsx:%d\n databytes:%d\n ntotpixels:%d\n", - dr, bytesPerPixel, tgEnable, datasize, packetsize, numPacketsPerFrame, npixelsx, databytes, ntotpixels)); + LOG(logINFO, (" dr:%d\n bytesperpixel:%f\n tgenable:%d\n datasize:%d\n " + "packetsize:%d\n numpackes:%d\n npixelsx:%d\n databytes:%d\n " + "ntotpixels:%d\n", + dr, bytesPerPixel, tgEnable, datasize, packetsize, + numPacketsPerFrame, npixelsx, databytes, ntotpixels)); - // Generate data - char imageData[databytes * 2]; - memset(imageData, 0, databytes * 2); - { - int i = 0; - switch (dr) { - case 4: - for (i = 0; i < ntotpixels/2; ++i) { - *((uint8_t*)(imageData + i)) = eiger_virtual_test_mode ? 0xEE : (uint8_t)(((2 * i & 0xF) << 4) | ((2 * i + 1) & 0xF)); - } - break; - case 8: - for (i = 0; i < ntotpixels; ++i) { - *((uint8_t*)(imageData + i)) = eiger_virtual_test_mode ? 0xFE : (uint8_t)i; - } - break; - case 16: - for (i = 0; i < ntotpixels; ++i) { - *((uint16_t*)(imageData + i * sizeof(uint16_t))) = eiger_virtual_test_mode ? 0xFFE : (uint16_t)i; - } - break; - case 32: - for (i = 0; i < ntotpixels; ++i) { - *((uint32_t*)(imageData + i * sizeof(uint32_t))) = eiger_virtual_test_mode ? 0xFFFFFE : (uint32_t)i; - } - break; - default: - break; - } - } - - // Send data - { - uint64_t frameNr = 0; - getStartingFrameNumber(&frameNr); + // Generate data + char imageData[databytes * 2]; + memset(imageData, 0, databytes * 2); + { + int i = 0; + switch (dr) { + case 4: + for (i = 0; i < ntotpixels / 2; ++i) { + *((uint8_t *)(imageData + i)) = + eiger_virtual_test_mode + ? 0xEE + : (uint8_t)(((2 * i & 0xF) << 4) | ((2 * i + 1) & 0xF)); + } + break; + case 8: + for (i = 0; i < ntotpixels; ++i) { + *((uint8_t *)(imageData + i)) = + eiger_virtual_test_mode ? 0xFE : (uint8_t)i; + } + break; + case 16: + for (i = 0; i < ntotpixels; ++i) { + *((uint16_t *)(imageData + i * sizeof(uint16_t))) = + eiger_virtual_test_mode ? 0xFFE : (uint16_t)i; + } + break; + case 32: + for (i = 0; i < ntotpixels; ++i) { + *((uint32_t *)(imageData + i * sizeof(uint32_t))) = + eiger_virtual_test_mode ? 0xFFFFFE : (uint32_t)i; + } + break; + default: + break; + } + } + + // Send data + { + uint64_t frameNr = 0; + getStartingFrameNumber(&frameNr); // loop over number of frames - int iframes = 0; - for(iframes = 0; iframes != numFrames; ++iframes ) { + int iframes = 0; + for (iframes = 0; iframes != numFrames; ++iframes) { - usleep(eiger_virtual_transmission_delay_frame); + usleep(eiger_virtual_transmission_delay_frame); - // update the virtual stop from stop server - virtual_stop = ComVirtual_getStop(); - //check if virtual_stop is high - if(virtual_stop == 1){ - setStartingFrameNumber(frameNr + iframes + 1); - break; - } + // update the virtual stop from stop server + virtual_stop = ComVirtual_getStop(); + // check if virtual_stop is high + if (virtual_stop == 1) { + setStartingFrameNumber(frameNr + iframes + 1); + break; + } // sleep for exposure time - struct timespec begin, end; - clock_gettime(CLOCK_REALTIME, &begin); - usleep(expUs); + struct timespec begin, end; + clock_gettime(CLOCK_REALTIME, &begin); + usleep(expUs); - int srcOffset = 0; - int srcOffset2 = npixelsx; - - // loop packet - { - int i = 0; - for(i = 0; i != numPacketsPerFrame; ++i) { - // set header - char packetData[packetsize]; - memset(packetData, 0, packetsize); - sls_detector_header* header = (sls_detector_header*)(packetData); - header->detType = 3;//(uint16_t)myDetectorType; updated when firmware updates - header->version = SLS_DETECTOR_HEADER_VERSION - 1; - header->frameNumber = frameNr + iframes; - header->packetNumber = i; - header->row = row; - header->column = colLeft; + int srcOffset = 0; + int srcOffset2 = npixelsx; - char packetData2[packetsize]; - memset(packetData2, 0, packetsize); - header = (sls_detector_header*)(packetData2); - header->detType = 3;//(uint16_t)myDetectorType; updated when firmware updates - header->version = SLS_DETECTOR_HEADER_VERSION - 1; - header->frameNumber = frameNr + iframes; - header->packetNumber = i; - header->row = row; - header->column = colRight; - if (eiger_virtual_quad_mode) { - header->row = 1; // right is next row - header->column = 0; // right same first column - } + // loop packet + { + int i = 0; + for (i = 0; i != numPacketsPerFrame; ++i) { + // set header + char packetData[packetsize]; + memset(packetData, 0, packetsize); + sls_detector_header *header = + (sls_detector_header *)(packetData); + header->detType = 3; //(uint16_t)myDetectorType; updated + //when firmware updates + header->version = SLS_DETECTOR_HEADER_VERSION - 1; + header->frameNumber = frameNr + iframes; + header->packetNumber = i; + header->row = row; + header->column = colLeft; - // fill data - int dstOffset = sizeof(sls_detector_header); - int dstOffset2 = sizeof(sls_detector_header); - { - int psize = 0; - for (psize = 0; psize < datasize; psize += npixelsx) { + char packetData2[packetsize]; + memset(packetData2, 0, packetsize); + header = (sls_detector_header *)(packetData2); + header->detType = 3; //(uint16_t)myDetectorType; updated + //when firmware updates + header->version = SLS_DETECTOR_HEADER_VERSION - 1; + header->frameNumber = frameNr + iframes; + header->packetNumber = i; + header->row = row; + header->column = colRight; + if (eiger_virtual_quad_mode) { + header->row = 1; // right is next row + header->column = 0; // right same first column + } - if (dr == 32 && tgEnable == 0) { - memcpy(packetData + dstOffset, imageData + srcOffset, npixelsx/2); - memcpy(packetData2 + dstOffset2, imageData + srcOffset2, npixelsx/2); - if (srcOffset % npixelsx == 0) { - srcOffset += npixelsx/2; - srcOffset2 += npixelsx/2; - } - // skip the other half (2 packets in 1 line for 32 bit) - else { - srcOffset += npixelsx; - srcOffset2 += npixelsx; - } - dstOffset += npixelsx/2; - dstOffset2 += npixelsx/2; - } else { - memcpy(packetData + dstOffset, imageData + srcOffset, npixelsx); - memcpy(packetData2 + dstOffset2, imageData + srcOffset2, npixelsx); - srcOffset += 2 * npixelsx; - srcOffset2 += 2 * npixelsx; - dstOffset += npixelsx; - dstOffset2 += npixelsx; - } - } - } - usleep(eiger_virtual_transmission_delay_left); - sendUDPPacket(0, packetData, packetsize); - usleep(eiger_virtual_transmission_delay_right); - sendUDPPacket(1, packetData2, packetsize); - } - } - LOG(logINFO, ("Sent frame: %d\n", iframes)); - clock_gettime(CLOCK_REALTIME, &end); - int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 + - (end.tv_nsec - begin.tv_nsec)); + // fill data + int dstOffset = sizeof(sls_detector_header); + int dstOffset2 = sizeof(sls_detector_header); + { + int psize = 0; + for (psize = 0; psize < datasize; psize += npixelsx) { - // sleep for (period - exptime) - if (iframes < numFrames) { // if there is a next frame - if (periodNs > timeNs) { - usleep((periodNs - timeNs)/ 1000); - } - } - } - setStartingFrameNumber(frameNr + numFrames); - } - - - closeUDPSocket(0); - closeUDPSocket(1); - - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - LOG(logINFOBLUE, ("Finished Acquiring\n")); - return NULL; + if (dr == 32 && tgEnable == 0) { + memcpy(packetData + dstOffset, + imageData + srcOffset, npixelsx / 2); + memcpy(packetData2 + dstOffset2, + imageData + srcOffset2, npixelsx / 2); + if (srcOffset % npixelsx == 0) { + srcOffset += npixelsx / 2; + srcOffset2 += npixelsx / 2; + } + // skip the other half (2 packets in 1 line for + // 32 bit) + else { + srcOffset += npixelsx; + srcOffset2 += npixelsx; + } + dstOffset += npixelsx / 2; + dstOffset2 += npixelsx / 2; + } else { + memcpy(packetData + dstOffset, + imageData + srcOffset, npixelsx); + memcpy(packetData2 + dstOffset2, + imageData + srcOffset2, npixelsx); + srcOffset += 2 * npixelsx; + srcOffset2 += 2 * npixelsx; + dstOffset += npixelsx; + dstOffset2 += npixelsx; + } + } + } + usleep(eiger_virtual_transmission_delay_left); + sendUDPPacket(0, packetData, packetsize); + usleep(eiger_virtual_transmission_delay_right); + sendUDPPacket(1, packetData2, packetsize); + } + } + LOG(logINFO, ("Sent frame: %d\n", iframes)); + clock_gettime(CLOCK_REALTIME, &end); + int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 + + (end.tv_nsec - begin.tv_nsec)); + + // sleep for (period - exptime) + if (iframes < numFrames) { // if there is a next frame + if (periodNs > timeNs) { + usleep((periodNs - timeNs) / 1000); + } + } + } + setStartingFrameNumber(frameNr + numFrames); + } + + closeUDPSocket(0); + closeUDPSocket(1); + + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + LOG(logINFOBLUE, ("Finished Acquiring\n")); + return NULL; } #endif - - - int stopStateMachine() { - LOG(logINFORED, ("Going to stop acquisition\n")); + LOG(logINFORED, ("Going to stop acquisition\n")); #ifdef VIRTUAL - if (!isControlServer) { - virtual_stop = 1; - ComVirtual_setStop(virtual_stop); - // read till status is idle - int tempStatus = 1; - while(tempStatus == 1) { - tempStatus = ComVirtual_getStatus(); - } - virtual_stop = 0; - ComVirtual_setStop(virtual_stop); - LOG(logINFO, ("Stopped State Machine\n")); - } - return OK; + if (!isControlServer) { + virtual_stop = 1; + ComVirtual_setStop(virtual_stop); + // read till status is idle + int tempStatus = 1; + while (tempStatus == 1) { + tempStatus = ComVirtual_getStatus(); + } + virtual_stop = 0; + ComVirtual_setStop(virtual_stop); + LOG(logINFO, ("Stopped State Machine\n")); + } + return OK; #else - if ((Feb_Control_StopAcquisition() != STATUS_IDLE) || (!Beb_StopAcquisition()) ) { - LOG(logERROR, ("failed to stop acquisition\n")); - return FAIL; - } + if ((Feb_Control_StopAcquisition() != STATUS_IDLE) || + (!Beb_StopAcquisition())) { + LOG(logERROR, ("failed to stop acquisition\n")); + return FAIL; + } - // ensure all have same starting frame numbers - uint64_t retval = 0; - if(Beb_GetStartingFrameNumber(&retval, send_to_ten_gig) == -2) { - Beb_SetStartingFrameNumber(retval + 1); - } - return OK; + // ensure all have same starting frame numbers + uint64_t retval = 0; + if (Beb_GetStartingFrameNumber(&retval, send_to_ten_gig) == -2) { + Beb_SetStartingFrameNumber(retval + 1); + } + return OK; #endif } -int softwareTrigger() { +int softwareTrigger() { #ifdef VIRTUAL - return OK; + return OK; #else - if (!Feb_Control_SoftwareTrigger()) - return FAIL; - return OK; + if (!Feb_Control_SoftwareTrigger()) + return FAIL; + return OK; #endif } - int startReadOut() { - LOG(logINFO, ("Requesting images...\n")); + LOG(logINFO, ("Requesting images...\n")); #ifdef VIRTUAL - return OK; + return OK; #else - //RequestImages(); - int ret_val = 0; - dst_requested[0] = 1; - while(dst_requested[on_dst]) { - //waits on data - int beb_num = detid; - if ((ret_val = (!Beb_RequestNImages(beb_num,send_to_ten_gig,on_dst,nimages_per_request,0)))) - break; - // for(i=0;iserialnumber>=0) { + if (srcMod->serialnumber >= 0) { - destMod->serialnumber=srcMod->serialnumber; - } - //no trimbit feature - if (destMod->nchan && ((srcMod->nchan)>(destMod->nchan))) { - LOG(logINFO, ("Number of channels of source is larger than number of channels of destination\n")); - return FAIL; - } - if ((srcMod->ndac)>(destMod->ndac)) { - LOG(logINFO, ("Number of dacs of source is larger than number of dacs of destination\n")); - return FAIL; - } + destMod->serialnumber = srcMod->serialnumber; + } + // no trimbit feature + if (destMod->nchan && ((srcMod->nchan) > (destMod->nchan))) { + LOG(logINFO, ("Number of channels of source is larger than number of " + "channels of destination\n")); + return FAIL; + } + if ((srcMod->ndac) > (destMod->ndac)) { + LOG(logINFO, ("Number of dacs of source is larger than number of dacs " + "of destination\n")); + return FAIL; + } - LOG(logDEBUG1, ("DACs: src %d, dest %d\n",srcMod->ndac,destMod->ndac)); - LOG(logDEBUG1, ("Chans: src %d, dest %d\n",srcMod->nchan,destMod->nchan)); - destMod->ndac=srcMod->ndac; - destMod->nchip=srcMod->nchip; - destMod->nchan=srcMod->nchan; - if (srcMod->reg>=0) - destMod->reg=srcMod->reg; - if (srcMod->iodelay>=0) - destMod->iodelay=srcMod->iodelay; - if (srcMod->tau>=0) - destMod->tau=srcMod->tau; - if (srcMod->eV>=0) - destMod->eV=srcMod->eV; - LOG(logDEBUG1, ("Copying register %x (%x)\n",destMod->reg,srcMod->reg )); + LOG(logDEBUG1, ("DACs: src %d, dest %d\n", srcMod->ndac, destMod->ndac)); + LOG(logDEBUG1, ("Chans: src %d, dest %d\n", srcMod->nchan, destMod->nchan)); + destMod->ndac = srcMod->ndac; + destMod->nchip = srcMod->nchip; + destMod->nchan = srcMod->nchan; + if (srcMod->reg >= 0) + destMod->reg = srcMod->reg; + if (srcMod->iodelay >= 0) + destMod->iodelay = srcMod->iodelay; + if (srcMod->tau >= 0) + destMod->tau = srcMod->tau; + if (srcMod->eV >= 0) + destMod->eV = srcMod->eV; + LOG(logDEBUG1, ("Copying register %x (%x)\n", destMod->reg, srcMod->reg)); - if (destMod->nchan!=0) { - for (ichan=0; ichan<(srcMod->nchan); ichan++) { - if (*((srcMod->chanregs)+ichan)>=0) - *((destMod->chanregs)+ichan)=*((srcMod->chanregs)+ichan); - } - } - else LOG(logINFO, ("Not Copying trimbits\n")); + if (destMod->nchan != 0) { + for (ichan = 0; ichan < (srcMod->nchan); ichan++) { + if (*((srcMod->chanregs) + ichan) >= 0) + *((destMod->chanregs) + ichan) = *((srcMod->chanregs) + ichan); + } + } else + LOG(logINFO, ("Not Copying trimbits\n")); - for (idac=0; idac<(srcMod->ndac); idac++) { - if (*((srcMod->dacs)+idac)>=0) { - *((destMod->dacs)+idac)=*((srcMod->dacs)+idac); - } - } - return ret; + for (idac = 0; idac < (srcMod->ndac); idac++) { + if (*((srcMod->dacs) + idac) >= 0) { + *((destMod->dacs) + idac) = *((srcMod->dacs) + idac); + } + } + return ret; } - int calculateDataBytes() { - if (send_to_ten_gig) - return setDynamicRange(-1) * ONE_GIGA_CONSTANT * TEN_GIGA_BUFFER_SIZE; - else - return setDynamicRange(-1) * TEN_GIGA_CONSTANT * ONE_GIGA_BUFFER_SIZE; + if (send_to_ten_gig) + return setDynamicRange(-1) * ONE_GIGA_CONSTANT * TEN_GIGA_BUFFER_SIZE; + else + return setDynamicRange(-1) * TEN_GIGA_CONSTANT * ONE_GIGA_BUFFER_SIZE; } - - - -int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());} -int getNumberOfChips() {return NCHIP;} -int getNumberOfDACs() {return NDAC;} -int getNumberOfChannelsPerChip() {return NCHAN;} +int getTotalNumberOfChannels() { + return (getNumberOfChannelsPerChip() * getNumberOfChips()); +} +int getNumberOfChips() { return NCHIP; } +int getNumberOfDACs() { return NDAC; } +int getNumberOfChannelsPerChip() { return NCHAN; } diff --git a/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c index abb502113..89d21c85e 100644 --- a/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c @@ -1,26 +1,25 @@ #include "slsDetectorFunctionList.h" -#include "RegisterDefs.h" -#include "versionAPI.h" -#include "clogger.h" +#include "ALTERA_PLL_CYCLONE10.h" +#include "ASIC_Driver.h" #include "DAC6571.h" #include "LTC2620_Driver.h" +#include "RegisterDefs.h" +#include "clogger.h" #include "common.h" -#include "ALTERA_PLL_CYCLONE10.h" -#include "ASIC_Driver.h" +#include "versionAPI.h" #ifdef VIRTUAL #include "communication_funcs_UDP.h" #include "communication_virtual.h" #endif -#include -#include // usleep #include +#include +#include // usleep #ifdef VIRTUAL #include #include #endif - // Global variable from slsDetectorServer_funcs extern int debugflag; extern int checkModuleFlag; @@ -29,8 +28,8 @@ extern const enum detectorType myDetectorType; // Global variable from communication_funcs.c extern int isControlServer; -extern void getMacAddressinString(char* cmac, int size, uint64_t mac); -extern void getIpAddressinString(char* cip, uint32_t ip); +extern void getMacAddressinString(char *cmac, int size, uint64_t mac); +extern void getIpAddressinString(char *cip, uint32_t ip); int initError = OK; int initCheckDone = 0; @@ -60,13 +59,11 @@ int64_t numBurstsReg = 1; int64_t burstPeriodReg = 0; int detPos[2] = {}; -int isInitCheckDone() { - return initCheckDone; -} +int isInitCheckDone() { return initCheckDone; } -int getInitResult(char** mess) { - *mess = initErrorMessage; - return initError; +int getInitResult(char **mess) { + *mess = initErrorMessage; + return initError; } void basictests() { @@ -76,101 +73,103 @@ void basictests() { #ifdef VIRTUAL LOG(logINFOBLUE, ("******** Gotthard2 Virtual Server *****************\n")); if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; } return; #else - LOG(logINFOBLUE, ("************ Gotthard2 Server *********************\n")); - if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; + LOG(logINFOBLUE, ("************ Gotthard2 Server *********************\n")); + if (mapCSP0() == FAIL) { + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; + } + // does check only if flag is 0 (by default), set by command line + if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL) || + (testBus() == FAIL))) { + sprintf(initErrorMessage, + "Could not pass basic tests of FPGA and bus. Dangerous to " + "continue. (Firmware version:0x%llx) \n", + getFirmwareVersion()); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; } - // does check only if flag is 0 (by default), set by command line - if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL) || (testBus() == FAIL))) { - sprintf(initErrorMessage, - "Could not pass basic tests of FPGA and bus. Dangerous to continue. (Firmware version:0x%llx) \n", getFirmwareVersion()); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; - } - uint16_t hversion = getHardwareVersionNumber(); - uint32_t ipadd = getDetectorIP(); - uint64_t macadd = getDetectorMAC(); - int64_t fwversion = getFirmwareVersion(); - int64_t swversion = getServerVersion(); - int64_t sw_fw_apiversion = getFirmwareAPIVersion(); - int64_t client_sw_apiversion = getClientServerAPIVersion(); - uint32_t requiredFirmwareVersion = REQRD_FRMWRE_VRSN; + uint16_t hversion = getHardwareVersionNumber(); + uint32_t ipadd = getDetectorIP(); + uint64_t macadd = getDetectorMAC(); + int64_t fwversion = getFirmwareVersion(); + int64_t swversion = getServerVersion(); + int64_t sw_fw_apiversion = getFirmwareAPIVersion(); + int64_t client_sw_apiversion = getClientServerAPIVersion(); + uint32_t requiredFirmwareVersion = REQRD_FRMWRE_VRSN; - LOG(logINFOBLUE, ("*************************************************\n" - "Hardware Version:\t\t 0x%x\n" - - "Detector IP Addr:\t\t 0x%x\n" - "Detector MAC Addr:\t\t 0x%llx\n\n" + LOG(logINFOBLUE, + ("*************************************************\n" + "Hardware Version:\t\t 0x%x\n" - "Firmware Version:\t\t 0x%llx\n" - "Software Version:\t\t 0x%llx\n" - "F/w-S/w API Version:\t\t 0x%llx\n" - "Required Firmware Version:\t 0x%x\n" - "Client-Software API Version:\t 0x%llx\n" - "********************************************************\n", - hversion, - ipadd, - (long long unsigned int)macadd, - (long long int)fwversion, - (long long int)swversion, - (long long int)sw_fw_apiversion, - requiredFirmwareVersion, - (long long int)client_sw_apiversion - )); + "Detector IP Addr:\t\t 0x%x\n" + "Detector MAC Addr:\t\t 0x%llx\n\n" - // return if flag is not zero, debug mode - if (debugflag) { - return; - } + "Firmware Version:\t\t 0x%llx\n" + "Software Version:\t\t 0x%llx\n" + "F/w-S/w API Version:\t\t 0x%llx\n" + "Required Firmware Version:\t 0x%x\n" + "Client-Software API Version:\t 0x%llx\n" + "********************************************************\n", + hversion, ipadd, (long long unsigned int)macadd, + (long long int)fwversion, (long long int)swversion, + (long long int)sw_fw_apiversion, requiredFirmwareVersion, + (long long int)client_sw_apiversion)); - //cant read versions + // return if flag is not zero, debug mode + if (debugflag) { + return; + } + + // cant read versions LOG(logINFO, ("Testing Firmware-software compatibility:\n")); - if(!fwversion || !sw_fw_apiversion){ - strcpy(initErrorMessage, - "Cant read versions from FPGA. Please update firmware.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + if (!fwversion || !sw_fw_apiversion) { + strcpy(initErrorMessage, + "Cant read versions from FPGA. Please update firmware.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for API compatibility - old server - if(sw_fw_apiversion > requiredFirmwareVersion){ - sprintf(initErrorMessage, - "This detector software software version (0x%llx) is incompatible.\n" - "Please update detector software (min. 0x%llx) to be compatible with this firmware.\n", - (long long int)sw_fw_apiversion, - (long long int)requiredFirmwareVersion); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + // check for API compatibility - old server + if (sw_fw_apiversion > requiredFirmwareVersion) { + sprintf(initErrorMessage, + "This detector software software version (0x%llx) is " + "incompatible.\n" + "Please update detector software (min. 0x%llx) to be " + "compatible with this firmware.\n", + (long long int)sw_fw_apiversion, + (long long int)requiredFirmwareVersion); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for firmware compatibility - old firmware - if( requiredFirmwareVersion > fwversion) { - sprintf(initErrorMessage, - "This firmware version (0x%llx) is incompatible.\n" - "Please update firmware (min. 0x%llx) to be compatible with this server.\n", - (long long int)fwversion, - (long long int)requiredFirmwareVersion); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } - LOG(logINFO, ("Compatibility - success\n")); + // check for firmware compatibility - old firmware + if (requiredFirmwareVersion > fwversion) { + sprintf(initErrorMessage, + "This firmware version (0x%llx) is incompatible.\n" + "Please update firmware (min. 0x%llx) to be compatible with " + "this server.\n", + (long long int)fwversion, + (long long int)requiredFirmwareVersion); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } + LOG(logINFO, ("Compatibility - success\n")); #endif } @@ -178,75 +177,77 @@ int checkType() { #ifdef VIRTUAL return OK; #endif - u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); - if (type != GOTTHARD2){ - LOG(logERROR, ("This is not a Gotthard2 firmware (read %d, expected %d)\n", type, GOTTHARD2)); - return FAIL; - } - return OK; + u_int32_t type = + ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); + if (type != GOTTHARD2) { + LOG(logERROR, + ("This is not a Gotthard2 firmware (read %d, expected %d)\n", type, + GOTTHARD2)); + return FAIL; + } + return OK; } int testFpga() { #ifdef VIRTUAL return OK; #endif - LOG(logINFO, ("Testing FPGA:\n")); + LOG(logINFO, ("Testing FPGA:\n")); - //fixed pattern - int ret = OK; - volatile u_int32_t val = bus_r(FIX_PATT_REG); - if (val == FIX_PATT_VAL) { - LOG(logINFO, ("Fixed pattern: successful match 0x%08x\n",val)); - } else { - LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL)); - ret = FAIL; - } - return ret; + // fixed pattern + int ret = OK; + volatile u_int32_t val = bus_r(FIX_PATT_REG); + if (val == FIX_PATT_VAL) { + LOG(logINFO, ("Fixed pattern: successful match 0x%08x\n", val)); + } else { + LOG(logERROR, + ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", + val, FIX_PATT_VAL)); + ret = FAIL; + } + return ret; } int testBus() { #ifdef VIRTUAL return OK; #endif - LOG(logINFO, ("Testing Bus:\n")); + LOG(logINFO, ("Testing Bus:\n")); - int ret = OK; - u_int32_t addr = DTA_OFFSET_REG; - u_int32_t times = 1000 * 1000; - u_int32_t i = 0; + int ret = OK; + u_int32_t addr = DTA_OFFSET_REG; + u_int32_t times = 1000 * 1000; + u_int32_t i = 0; - for (i = 0; i < times; ++i) { - bus_w(addr, i * 100); - if (i * 100 != bus_r(addr)) { - LOG(logERROR, ("Mismatch! Wrote 0x%x, read 0x%x\n", - i * 100, bus_r(addr))); - ret = FAIL; - } - } + for (i = 0; i < times; ++i) { + bus_w(addr, i * 100); + if (i * 100 != bus_r(addr)) { + LOG(logERROR, + ("Mismatch! Wrote 0x%x, read 0x%x\n", i * 100, bus_r(addr))); + ret = FAIL; + } + } - bus_w(addr, 0); + bus_w(addr, 0); - if (ret == OK) { - LOG(logINFO, ("Successfully tested bus %d times\n", times)); - } - return ret; + if (ret == OK) { + LOG(logINFO, ("Successfully tested bus %d times\n", times)); + } + return ret; } /* Ids */ -uint64_t getServerVersion() { - return APIGOTTHARD2; -} +uint64_t getServerVersion() { return APIGOTTHARD2; } -uint64_t getClientServerAPIVersion() { - return APIGOTTHARD2; -} +uint64_t getClientServerAPIVersion() { return APIGOTTHARD2; } u_int64_t getFirmwareVersion() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(FPGA_VERSION_REG) & FPGA_COMPILATION_DATE_MSK) >> FPGA_COMPILATION_DATE_OFST); + return ((bus_r(FPGA_VERSION_REG) & FPGA_COMPILATION_DATE_MSK) >> + FPGA_COMPILATION_DATE_OFST); } u_int64_t getFirmwareAPIVersion() { @@ -260,232 +261,243 @@ u_int16_t getHardwareVersionNumber() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(MCB_SERIAL_NO_REG) & MCB_SERIAL_NO_VRSN_MSK) >> MCB_SERIAL_NO_VRSN_OFST); + return ((bus_r(MCB_SERIAL_NO_REG) & MCB_SERIAL_NO_VRSN_MSK) >> + MCB_SERIAL_NO_VRSN_OFST); } -u_int32_t getDetectorNumber(){ +u_int32_t getDetectorNumber() { #ifdef VIRTUAL return 0; #endif - return bus_r(MCB_SERIAL_NO_REG); + return bus_r(MCB_SERIAL_NO_REG); } - -u_int64_t getDetectorMAC() { +u_int64_t getDetectorMAC() { #ifdef VIRTUAL return 0; #else - char output[255],mac[255]=""; - u_int64_t res=0; - FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - //getting rid of ":" - char * pch; - pch = strtok (output,":"); - while (pch != NULL){ - strcat(mac,pch); - pch = strtok (NULL, ":"); - } - sscanf(mac,"%llx",&res); - return res; + char output[255], mac[255] = ""; + u_int64_t res = 0; + FILE *sysFile = + popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + // getting rid of ":" + char *pch; + pch = strtok(output, ":"); + while (pch != NULL) { + strcat(mac, pch); + pch = strtok(NULL, ":"); + } + sscanf(mac, "%llx", &res); + return res; #endif } -u_int32_t getDetectorIP(){ +u_int32_t getDetectorIP() { #ifdef VIRTUAL return 0; #endif - char temp[50]=""; - u_int32_t res=0; - //execute and get address - char output[255]; - FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); + char temp[50] = ""; + u_int32_t res = 0; + // execute and get address + char output[255]; + FILE *sysFile = popen( + "ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", + "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); - //converting IPaddress to hex. - char* pcword = strtok (output,"."); - while (pcword != NULL) { - sprintf(output,"%02x",atoi(pcword)); - strcat(temp,output); - pcword = strtok (NULL, "."); - } - strcpy(output,temp); - sscanf(output, "%x", &res); - //LOG(logINFO, ("ip:%x\n",res); + // converting IPaddress to hex. + char *pcword = strtok(output, "."); + while (pcword != NULL) { + sprintf(output, "%02x", atoi(pcword)); + strcat(temp, output); + pcword = strtok(NULL, "."); + } + strcpy(output, temp); + sscanf(output, "%x", &res); + // LOG(logINFO, ("ip:%x\n",res); - return res; + return res; } - /* initialization */ -void initControlServer(){ - CreateNotificationForCriticalTasks(); - if (initError == OK) { - setupDetector(); - } - initCheckDone = 1; - if (initError == OK) { - NotifyServerStartSuccess(); - } +void initControlServer() { + CreateNotificationForCriticalTasks(); + if (initError == OK) { + setupDetector(); + } + initCheckDone = 1; + if (initError == OK) { + NotifyServerStartSuccess(); + } } void initStopServer() { - usleep(CTRL_SRVR_INIT_TIME_US); - if (mapCSP0() == FAIL) { - LOG(logERROR, ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); - exit(EXIT_FAILURE); - } + usleep(CTRL_SRVR_INIT_TIME_US); + if (mapCSP0() == FAIL) { + LOG(logERROR, + ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); + exit(EXIT_FAILURE); + } #ifdef VIRTUAL - virtual_stop = 0; - if (!isControlServer) { - ComVirtual_setStop(virtual_stop); - } + virtual_stop = 0; + if (!isControlServer) { + ComVirtual_setStop(virtual_stop); + } #endif } - /* set up detector */ void setupDetector() { - LOG(logINFO, ("This Server is for 1 Gotthard2 module \n")); + LOG(logINFO, ("This Server is for 1 Gotthard2 module \n")); - clkDivider[READOUT_C0] = DEFAULT_READOUT_C0; - clkDivider[READOUT_C1] = DEFAULT_READOUT_C1; - clkDivider[SYSTEM_C0] = DEFAULT_SYSTEM_C0; - clkDivider[SYSTEM_C1] = DEFAULT_SYSTEM_C1; - clkDivider[SYSTEM_C2] = DEFAULT_SYSTEM_C2; - clkDivider[SYSTEM_C3] = DEFAULT_SYSTEM_C3; - systemFrequency = INT_SYSTEM_C0_FREQUENCY; - detPos[0] = 0; - detPos[1] = 0; + clkDivider[READOUT_C0] = DEFAULT_READOUT_C0; + clkDivider[READOUT_C1] = DEFAULT_READOUT_C1; + clkDivider[SYSTEM_C0] = DEFAULT_SYSTEM_C0; + clkDivider[SYSTEM_C1] = DEFAULT_SYSTEM_C1; + clkDivider[SYSTEM_C2] = DEFAULT_SYSTEM_C2; + clkDivider[SYSTEM_C3] = DEFAULT_SYSTEM_C3; + systemFrequency = INT_SYSTEM_C0_FREQUENCY; + detPos[0] = 0; + detPos[1] = 0; - thisSettings = UNINITIALIZED; - highvoltage = 0; - injectedChannelsOffset = 0; - injectedChannelsIncrement = 0; - burstMode = BURST_INTERNAL; - numTriggersReg = 1; - delayReg = 0; - numBurstsReg = 1; - burstPeriodReg = 0; - { - int i, j; - for (i = 0; i < NUM_CLOCKS; ++i) { + thisSettings = UNINITIALIZED; + highvoltage = 0; + injectedChannelsOffset = 0; + injectedChannelsIncrement = 0; + burstMode = BURST_INTERNAL; + numTriggersReg = 1; + delayReg = 0; + numBurstsReg = 1; + burstPeriodReg = 0; + { + int i, j; + for (i = 0; i < NUM_CLOCKS; ++i) { clkPhase[i] = 0; } - for (i = 0; i < NDAC; ++i) { - dacValues[i] = 0; - } - for (i = 0; i < ONCHIP_NDAC; ++i) { - for (j = 0; j < NCHIP; ++j) { - onChipdacValues[i][j] = -1; - } - } - for (i = 0; i < NCHIP; ++i) { - for (j = 0; j < NCHAN; ++j) { - vetoReference[i][j] = 0; - } - for (j = 0; j < NADC; ++j) { - adcConfiguration[i][j] = 0; - } - } - } + for (i = 0; i < NDAC; ++i) { + dacValues[i] = 0; + } + for (i = 0; i < ONCHIP_NDAC; ++i) { + for (j = 0; j < NCHIP; ++j) { + onChipdacValues[i][j] = -1; + } + } + for (i = 0; i < NCHIP; ++i) { + for (j = 0; j < NCHAN; ++j) { + vetoReference[i][j] = 0; + } + for (j = 0; j < NADC; ++j) { + adcConfiguration[i][j] = 0; + } + } + } #ifdef VIRTUAL - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } #endif - // pll defines - ALTERA_PLL_C10_SetDefines(REG_OFFSET, BASE_READOUT_PLL, BASE_SYSTEM_PLL, PLL_RESET_REG, PLL_RESET_REG, PLL_RESET_READOUT_MSK, PLL_RESET_SYSTEM_MSK, READOUT_PLL_VCO_FREQ_HZ, SYSTEM_PLL_VCO_FREQ_HZ); - ALTERA_PLL_C10_ResetPLL(READOUT_PLL); - ALTERA_PLL_C10_ResetPLL(SYSTEM_PLL); - // hv + // pll defines + ALTERA_PLL_C10_SetDefines(REG_OFFSET, BASE_READOUT_PLL, BASE_SYSTEM_PLL, + PLL_RESET_REG, PLL_RESET_REG, + PLL_RESET_READOUT_MSK, PLL_RESET_SYSTEM_MSK, + READOUT_PLL_VCO_FREQ_HZ, SYSTEM_PLL_VCO_FREQ_HZ); + ALTERA_PLL_C10_ResetPLL(READOUT_PLL); + ALTERA_PLL_C10_ResetPLL(SYSTEM_PLL); + // hv DAC6571_SetDefines(HV_HARD_MAX_VOLTAGE, HV_DRIVER_FILE_NAME); - // dacs - LTC2620_D_SetDefines(DAC_MAX_MV, DAC_DRIVER_FILE_NAME, NDAC); - // on chip dacs - ASIC_Driver_SetDefines(ONCHIP_DAC_DRIVER_FILE_NAME); - setTimingSource(DEFAULT_TIMING_SOURCE); + // dacs + LTC2620_D_SetDefines(DAC_MAX_MV, DAC_DRIVER_FILE_NAME, NDAC); + // on chip dacs + ASIC_Driver_SetDefines(ONCHIP_DAC_DRIVER_FILE_NAME); + setTimingSource(DEFAULT_TIMING_SOURCE); - // Default values + // Default values setHighVoltage(DEFAULT_HIGH_VOLTAGE); - // check module type attached if not in debug mode - { - int ret = checkDetectorType(); - if (checkModuleFlag) { - switch (ret) { - case -1: - sprintf(initErrorMessage, "Could not get the module type attached.\n"); - initError = FAIL; - LOG(logERROR, ("Aborting startup!\n\n", initErrorMessage)); - return; - case -2: - sprintf(initErrorMessage, "No Module attached! Run server with -nomodule.\n"); - initError = FAIL; - LOG(logERROR, ("Aborting startup!\n\n", initErrorMessage)); - return; - case FAIL: - sprintf(initErrorMessage, "Wrong Module (Not Gotthard2) attached!\n"); - initError = FAIL; - LOG(logERROR, ("Aborting startup!\n\n", initErrorMessage)); - return; - default: - break; - } - } else { - LOG(logINFOBLUE, ("In No-Module mode: Ignoring module type. Continuing.\n")); - } - } + // check module type attached if not in debug mode + { + int ret = checkDetectorType(); + if (checkModuleFlag) { + switch (ret) { + case -1: + sprintf(initErrorMessage, + "Could not get the module type attached.\n"); + initError = FAIL; + LOG(logERROR, ("Aborting startup!\n\n", initErrorMessage)); + return; + case -2: + sprintf(initErrorMessage, + "No Module attached! Run server with -nomodule.\n"); + initError = FAIL; + LOG(logERROR, ("Aborting startup!\n\n", initErrorMessage)); + return; + case FAIL: + sprintf(initErrorMessage, + "Wrong Module (Not Gotthard2) attached!\n"); + initError = FAIL; + LOG(logERROR, ("Aborting startup!\n\n", initErrorMessage)); + return; + default: + break; + } + } else { + LOG(logINFOBLUE, + ("In No-Module mode: Ignoring module type. Continuing.\n")); + } + } - // power on chip - powerChip(1); + // power on chip + powerChip(1); - // also sets default dac and on chip dac values - if (readConfigFile() == FAIL) { - return; - } - setBurstMode(DEFAULT_BURST_MODE); - setSettings(DEFAULT_SETTINGS); + // also sets default dac and on chip dac values + if (readConfigFile() == FAIL) { + return; + } + setBurstMode(DEFAULT_BURST_MODE); + setSettings(DEFAULT_SETTINGS); - // Initialization of acquistion parameters - setNumFrames(DEFAULT_NUM_FRAMES); - setNumTriggers(DEFAULT_NUM_CYCLES); - setNumBursts(DEFAULT_NUM_BURSTS); - setExpTime(DEFAULT_EXPTIME); - setPeriod(DEFAULT_PERIOD); - setDelayAfterTrigger(DEFAULT_DELAY_AFTER_TRIGGER); - setBurstPeriod(DEFAULT_BURST_PERIOD); - setTiming(DEFAULT_TIMING_MODE); - setCurrentSource(DEFAULT_CURRENT_SOURCE); + // Initialization of acquistion parameters + setNumFrames(DEFAULT_NUM_FRAMES); + setNumTriggers(DEFAULT_NUM_CYCLES); + setNumBursts(DEFAULT_NUM_BURSTS); + setExpTime(DEFAULT_EXPTIME); + setPeriod(DEFAULT_PERIOD); + setDelayAfterTrigger(DEFAULT_DELAY_AFTER_TRIGGER); + setBurstPeriod(DEFAULT_BURST_PERIOD); + setTiming(DEFAULT_TIMING_MODE); + setCurrentSource(DEFAULT_CURRENT_SOURCE); } int readConfigFile() { - if (initError == FAIL) { - return initError; - } + if (initError == FAIL) { + return initError; + } - // require a sleep before and after the rst dac signal - usleep (INITIAL_STARTUP_WAIT); + // require a sleep before and after the rst dac signal + usleep(INITIAL_STARTUP_WAIT); - // inform FPGA that onchip dacs will be configured soon - LOG(logINFO, ("Setting configuration starting bit\n")); - bus_w(ASIC_CONFIG_REG, bus_r(ASIC_CONFIG_REG) | ASIC_CONFIG_RST_DAC_MSK); + // inform FPGA that onchip dacs will be configured soon + LOG(logINFO, ("Setting configuration starting bit\n")); + bus_w(ASIC_CONFIG_REG, bus_r(ASIC_CONFIG_REG) | ASIC_CONFIG_RST_DAC_MSK); - usleep (INITIAL_STARTUP_WAIT); + usleep(INITIAL_STARTUP_WAIT); - FILE* fd = fopen(CONFIG_FILE, "r"); - if(fd == NULL) { - sprintf(initErrorMessage, "Could not open on-board detector server config file [%s].\n", CONFIG_FILE); - initError = FAIL; - LOG(logERROR, ("%s\n\n", initErrorMessage)); + FILE *fd = fopen(CONFIG_FILE, "r"); + if (fd == NULL) { + sprintf(initErrorMessage, + "Could not open on-board detector server config file [%s].\n", + CONFIG_FILE); + initError = FAIL; + LOG(logERROR, ("%s\n\n", initErrorMessage)); return FAIL; } @@ -497,246 +509,293 @@ int readConfigFile() { memset(line, 0, LZ); char command[LZ]; - int nadcRead = 0; + int nadcRead = 0; // keep reading a line while (fgets(line, LZ, fd)) { - // ignore comments + // ignore comments if (line[0] == '#') { - LOG(logDEBUG1, ("Ignoring Comment\n")); + LOG(logDEBUG1, ("Ignoring Comment\n")); continue; - } + } - // ignore empty lines - if (strlen(line) <= 1) { - LOG(logDEBUG1, ("Ignoring Empty line\n")); - continue; - } + // ignore empty lines + if (strlen(line) <= 1) { + LOG(logDEBUG1, ("Ignoring Empty line\n")); + continue; + } - // removing leading spaces - if (line[0] == ' ' || line[0] == '\t') { - int len = strlen(line); - // find first valid character - int i = 0; - for (i = 0; i < len; ++i) { - if (line[i] != ' ' && line[i] != '\t') { - break; - } - } - // ignore the line full of spaces (last char \n) - if (i >= len - 1) { - LOG(logDEBUG1, ("Ignoring line full of spaces\n")); - continue; - } - // copying only valid char - char temp[LZ]; - memset(temp, 0, LZ); - memcpy(temp, line + i, strlen(line) - i); - memset(line, 0, LZ); - memcpy(line, temp, strlen(temp)); - LOG(logDEBUG1, ("Removing leading spaces.\n")); - } + // removing leading spaces + if (line[0] == ' ' || line[0] == '\t') { + int len = strlen(line); + // find first valid character + int i = 0; + for (i = 0; i < len; ++i) { + if (line[i] != ' ' && line[i] != '\t') { + break; + } + } + // ignore the line full of spaces (last char \n) + if (i >= len - 1) { + LOG(logDEBUG1, ("Ignoring line full of spaces\n")); + continue; + } + // copying only valid char + char temp[LZ]; + memset(temp, 0, LZ); + memcpy(temp, line + i, strlen(line) - i); + memset(line, 0, LZ); + memcpy(line, temp, strlen(temp)); + LOG(logDEBUG1, ("Removing leading spaces.\n")); + } - LOG(logDEBUG1, ("Command to process: (size:%d) %.*s\n", strlen(line), strlen(line) -1, line)); - memset(command, 0, LZ); + LOG(logDEBUG1, ("Command to process: (size:%d) %.*s\n", strlen(line), + strlen(line) - 1, line)); + memset(command, 0, LZ); - // vetoref command - if (!strncmp(line, "vetoref", strlen("vetoref"))) { - int igain = 0; - int value = 0; + // vetoref command + if (!strncmp(line, "vetoref", strlen("vetoref"))) { + int igain = 0; + int value = 0; - // cannot scan values - if (sscanf(line, "%s %d 0x%x", command, &igain, &value) != 3) { - sprintf(initErrorMessage, "Could not scan vetoref commands from on-board server config file. Line:[%s].\n", line); - break; - } - //validations - if (igain < 0 || igain > 2) { - sprintf(initErrorMessage, "Could not set veto reference from on-board server config file. Invalid gain index. Line:[%s].\n", line); - break; - } - //validations - if (value > ADU_MAX_VAL) { - sprintf(initErrorMessage, "Could not set veto reference from on-board server config file. Invalid value (max 0x%x). Line:[%s].\n", ADU_MAX_VAL, line); - break; - } - if (setVetoReference(igain, value) == FAIL) { - sprintf(initErrorMessage, "Could not set veto reference from on-board server config file. Line:[%s].\n", line); - break; - } - } + // cannot scan values + if (sscanf(line, "%s %d 0x%x", command, &igain, &value) != 3) { + sprintf(initErrorMessage, + "Could not scan vetoref commands from on-board server " + "config file. Line:[%s].\n", + line); + break; + } + // validations + if (igain < 0 || igain > 2) { + sprintf(initErrorMessage, + "Could not set veto reference from on-board server " + "config file. Invalid gain index. Line:[%s].\n", + line); + break; + } + // validations + if (value > ADU_MAX_VAL) { + sprintf(initErrorMessage, + "Could not set veto reference from on-board server " + "config file. Invalid value (max 0x%x). Line:[%s].\n", + ADU_MAX_VAL, line); + break; + } + if (setVetoReference(igain, value) == FAIL) { + sprintf(initErrorMessage, + "Could not set veto reference from on-board server " + "config file. Line:[%s].\n", + line); + break; + } + } - // confadc command - else if (!strncmp(line, "confadc", strlen("confadc"))) { - int ichip = -1; - int iadc = -1; - int value = 0; - - // cannot scan values - if (sscanf(line, "%s %d %d 0x%x", command, &ichip, &iadc, &value) != 4) { - sprintf(initErrorMessage, "Could not scan confadc commands from on-board server config file. Line:[%s].\n", line); - break; - } - //validations - if (ichip < -1 ||ichip >= NCHIP) { - sprintf(initErrorMessage, "Could not configure adc from on-board server config file. Invalid chip index. Line:[%s].\n", line); - break; - } - if (iadc < -1 || iadc >= NADC) { - sprintf(initErrorMessage, "Could not configure adc from on-board server config file. Invalid adc index. Line:[%s].\n", line); - break; - } - //validations - if (value > ASIC_ADC_MAX_VAL) { - sprintf(initErrorMessage, "Could not configure adc from on-board server config file. Invalid value (max 0x%x). Line:[%s].\n", ASIC_ADC_MAX_VAL, line); - break; - } + // confadc command + else if (!strncmp(line, "confadc", strlen("confadc"))) { + int ichip = -1; + int iadc = -1; + int value = 0; - int chipmin = 0; - int chipmax = NCHIP; - int adcmin = 0; - int adcmax = NADC; + // cannot scan values + if (sscanf(line, "%s %d %d 0x%x", command, &ichip, &iadc, &value) != + 4) { + sprintf(initErrorMessage, + "Could not scan confadc commands from on-board server " + "config file. Line:[%s].\n", + line); + break; + } + // validations + if (ichip < -1 || ichip >= NCHIP) { + sprintf(initErrorMessage, + "Could not configure adc from on-board server config " + "file. Invalid chip index. Line:[%s].\n", + line); + break; + } + if (iadc < -1 || iadc >= NADC) { + sprintf(initErrorMessage, + "Could not configure adc from on-board server config " + "file. Invalid adc index. Line:[%s].\n", + line); + break; + } + // validations + if (value > ASIC_ADC_MAX_VAL) { + sprintf(initErrorMessage, + "Could not configure adc from on-board server config " + "file. Invalid value (max 0x%x). Line:[%s].\n", + ASIC_ADC_MAX_VAL, line); + break; + } - // specific chip - if (ichip != -1) { - chipmin = ichip; - chipmax = ichip + 1; - } - // specific adc - if (iadc != -1) { - adcmin = iadc; - adcmax = iadc + 1; - } + int chipmin = 0; + int chipmax = NCHIP; + int adcmin = 0; + int adcmax = NADC; - int i, j; - for (i = chipmin; i < chipmax; ++i) { - for (j = adcmin; j < adcmax; ++j) { - adcConfiguration[i][j] = (uint8_t)value; - ++nadcRead; - } - } - } + // specific chip + if (ichip != -1) { + chipmin = ichip; + chipmax = ichip + 1; + } + // specific adc + if (iadc != -1) { + adcmin = iadc; + adcmax = iadc + 1; + } + int i, j; + for (i = chipmin; i < chipmax; ++i) { + for (j = adcmin; j < adcmax; ++j) { + adcConfiguration[i][j] = (uint8_t)value; + ++nadcRead; + } + } + } // vchip command else if (!strncmp(line, "vchip_", strlen("vchip_"))) { - enum ONCHIP_DACINDEX idac = 0; - int ichip = -1; - int value = 0; + enum ONCHIP_DACINDEX idac = 0; + int ichip = -1; + int value = 0; - // cannot scan values - if (sscanf(line, "%s %d 0x%x", command, &ichip, &value) != 3) { - sprintf(initErrorMessage, "Could not scan on-chip dac commands from on-board server config file. Line:[%s].\n", line); - break; - } - - if (!strcmp(command,"vchip_comp_fe")) { - idac = G2_VCHIP_COMP_FE; - } else if (!strcasecmp(command,"vchip_opa_1st")) { - idac = G2_VCHIP_OPA_1ST; - } else if (!strcasecmp(command,"vchip_opa_fd")) { - idac = G2_VCHIP_OPA_FD; - } else if (!strcasecmp(command,"vchip_comp_adc")) { - idac = G2_VCHIP_COMP_ADC; - } else if (!strcasecmp(command,"vchip_ref_comp_fe")) { - idac = G2_VCHIP_REF_COMP_FE; - } else if (!strcasecmp(command,"vchip_cs")) { - idac = G2_VCHIP_CS; - } else { - sprintf(initErrorMessage, "Unknown on-chip dac command in on-board server config file. Command:[%s].\n", command); + // cannot scan values + if (sscanf(line, "%s %d 0x%x", command, &ichip, &value) != 3) { + sprintf(initErrorMessage, + "Could not scan on-chip dac commands from on-board " + "server config file. Line:[%s].\n", + line); break; } - // set on chip dac - if (setOnChipDAC(idac, ichip, value) == FAIL) { - sprintf(initErrorMessage, "Set on-chip dac failed from on-board server config file. Command:[%s].\n", command); - break; - } + if (!strcmp(command, "vchip_comp_fe")) { + idac = G2_VCHIP_COMP_FE; + } else if (!strcasecmp(command, "vchip_opa_1st")) { + idac = G2_VCHIP_OPA_1ST; + } else if (!strcasecmp(command, "vchip_opa_fd")) { + idac = G2_VCHIP_OPA_FD; + } else if (!strcasecmp(command, "vchip_comp_adc")) { + idac = G2_VCHIP_COMP_ADC; + } else if (!strcasecmp(command, "vchip_ref_comp_fe")) { + idac = G2_VCHIP_REF_COMP_FE; + } else if (!strcasecmp(command, "vchip_cs")) { + idac = G2_VCHIP_CS; + } else { + sprintf(initErrorMessage, + "Unknown on-chip dac command in on-board server config " + "file. Command:[%s].\n", + command); + break; + } + + // set on chip dac + if (setOnChipDAC(idac, ichip, value) == FAIL) { + sprintf(initErrorMessage, + "Set on-chip dac failed from on-board server config " + "file. Command:[%s].\n", + command); + break; + } } // dac command else { - enum DACINDEX idac = 0; - int value = 0; + enum DACINDEX idac = 0; + int value = 0; - // cannot scan values - if (sscanf(line, "%s %d", command, &value) != 2) { - sprintf(initErrorMessage, "Could not scan dac commands from on-board server config file. Line:[%s].\n", line); - break; - } - - if (!strcmp(command,"vref_h_adc")) { - idac = G2_VREF_H_ADC; - } else if (!strcasecmp(command,"vb_comp_fe")) { - idac = G2_VB_COMP_FE; - } else if (!strcasecmp(command,"vb_comp_adc")) { - idac = G2_VB_COMP_ADC; - } else if (!strcasecmp(command,"vcom_cds")) { - idac = G2_VCOM_CDS; - } else if (!strcasecmp(command,"vref_rstore")) { - idac = G2_VREF_RSTORE; - } else if (!strcasecmp(command,"vb_opa_1st")) { - idac = G2_VB_OPA_1ST; - } else if (!strcasecmp(command,"vref_comp_fe")) { - idac = G2_VREF_COMP_FE; - } else if (!strcasecmp(command,"vcom_adc1")) { - idac = G2_VCOM_ADC1; - } else if (!strcasecmp(command,"vref_prech")) { - idac = G2_VREF_PRECH; - } else if (!strcasecmp(command,"vref_l_adc")) { - idac = G2_VREF_L_ADC; - } else if (!strcasecmp(command,"vref_cds")) { - idac = G2_VREF_CDS; - } else if (!strcasecmp(command,"vb_cs")) { - idac = G2_VB_CS; - } else if (!strcasecmp(command,"vb_opa_fd")) { - idac = G2_VB_OPA_FD; - } else if (!strcasecmp(command,"vcom_adc2")) { - idac = G2_VCOM_ADC2; - } else { - sprintf(initErrorMessage, "Unknown command in on-board server config file. Command:[%s].\n", command); + // cannot scan values + if (sscanf(line, "%s %d", command, &value) != 2) { + sprintf(initErrorMessage, + "Could not scan dac commands from on-board server " + "config file. Line:[%s].\n", + line); break; } - // set dac - setDAC(idac, value, 0); - int retval = getDAC(idac, 0); - if (retval != value) { - sprintf(initErrorMessage, "Set dac %s failed from on-board server config file. Set %d, got %d.\n", command, value, retval); - break; - } + if (!strcmp(command, "vref_h_adc")) { + idac = G2_VREF_H_ADC; + } else if (!strcasecmp(command, "vb_comp_fe")) { + idac = G2_VB_COMP_FE; + } else if (!strcasecmp(command, "vb_comp_adc")) { + idac = G2_VB_COMP_ADC; + } else if (!strcasecmp(command, "vcom_cds")) { + idac = G2_VCOM_CDS; + } else if (!strcasecmp(command, "vref_rstore")) { + idac = G2_VREF_RSTORE; + } else if (!strcasecmp(command, "vb_opa_1st")) { + idac = G2_VB_OPA_1ST; + } else if (!strcasecmp(command, "vref_comp_fe")) { + idac = G2_VREF_COMP_FE; + } else if (!strcasecmp(command, "vcom_adc1")) { + idac = G2_VCOM_ADC1; + } else if (!strcasecmp(command, "vref_prech")) { + idac = G2_VREF_PRECH; + } else if (!strcasecmp(command, "vref_l_adc")) { + idac = G2_VREF_L_ADC; + } else if (!strcasecmp(command, "vref_cds")) { + idac = G2_VREF_CDS; + } else if (!strcasecmp(command, "vb_cs")) { + idac = G2_VB_CS; + } else if (!strcasecmp(command, "vb_opa_fd")) { + idac = G2_VB_OPA_FD; + } else if (!strcasecmp(command, "vcom_adc2")) { + idac = G2_VCOM_ADC2; + } else { + sprintf(initErrorMessage, + "Unknown command in on-board server config file. " + "Command:[%s].\n", + command); + break; + } + + // set dac + setDAC(idac, value, 0); + int retval = getDAC(idac, 0); + if (retval != value) { + sprintf(initErrorMessage, + "Set dac %s failed from on-board server config file. " + "Set %d, got %d.\n", + command, value, retval); + break; + } } - memset(line, 0, LZ); + memset(line, 0, LZ); } fclose(fd); - if (!strlen(initErrorMessage)) { - if (nadcRead != NADC * NCHIP) { - sprintf(initErrorMessage, "Could not configure adc from on-board server config file. Insufficient adcconf commands. Read %d, expected %d\n", nadcRead, NADC * NCHIP); - } - } - { - int i = 0, j = 0; - for (i = 0; i < NCHIP; ++i) { - for (j = 0; j < NADC; ++j) { - LOG(logDEBUG2, ("adc read %d %d: 0x%02hhx\n", i, j, adcConfiguration[i][j])); - } - } - } + if (!strlen(initErrorMessage)) { + if (nadcRead != NADC * NCHIP) { + sprintf(initErrorMessage, + "Could not configure adc from on-board server config file. " + "Insufficient adcconf commands. Read %d, expected %d\n", + nadcRead, NADC * NCHIP); + } + } + { + int i = 0, j = 0; + for (i = 0; i < NCHIP; ++i) { + for (j = 0; j < NADC; ++j) { + LOG(logDEBUG2, ("adc read %d %d: 0x%02hhx\n", i, j, + adcConfiguration[i][j])); + } + } + } - if (strlen(initErrorMessage)) { - initError = FAIL; - LOG(logERROR, ("%s\n\n", initErrorMessage)); - } else { - LOG(logINFOBLUE, ("Successfully read config file\n")); + if (strlen(initErrorMessage)) { + initError = FAIL; + LOG(logERROR, ("%s\n\n", initErrorMessage)); + } else { + LOG(logINFOBLUE, ("Successfully read config file\n")); - // inform FPGA that onchip dacs will be configured soon - LOG(logINFO, ("Setting configuration done bit\n")); - bus_w(ASIC_CONFIG_REG, bus_r(ASIC_CONFIG_REG) | ASIC_CONFIG_DONE_MSK); - } + // inform FPGA that onchip dacs will be configured soon + LOG(logINFO, ("Setting configuration done bit\n")); + bus_w(ASIC_CONFIG_REG, bus_r(ASIC_CONFIG_REG) | ASIC_CONFIG_DONE_MSK); + } return initError; } @@ -746,91 +805,95 @@ void cleanFifos() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Clearing Acquisition Fifos\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CLR_ACQSTN_FIFO_MSK); + LOG(logINFO, ("Clearing Acquisition Fifos\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CLR_ACQSTN_FIFO_MSK); } void resetCore() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Resetting Core\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CRE_RST_MSK); + LOG(logINFO, ("Resetting Core\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CRE_RST_MSK); } void resetPeripheral() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Resetting Peripheral\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PRPHRL_RST_MSK); + LOG(logINFO, ("Resetting Peripheral\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PRPHRL_RST_MSK); } /* set parameters - dr, roi */ -int setDynamicRange(int dr){ - return DYNAMIC_RANGE; -} - +int setDynamicRange(int dr) { return DYNAMIC_RANGE; } /* parameters - timer */ void setNumFrames(int64_t val) { if (val > 0) { - if (burstMode == BURST_OFF) { - LOG(logINFO, ("Setting number of frames %lld [Continuous mode]\n", val)); - set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - } else { - LOG(logINFO, ("Setting number of frames %d [Burst mode]\n", (int)val)); - bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) &~ ASIC_INT_FRAMES_MSK); - bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) | (((int)val << ASIC_INT_FRAMES_OFST) & ASIC_INT_FRAMES_MSK)); - } + if (burstMode == BURST_OFF) { + LOG(logINFO, + ("Setting number of frames %lld [Continuous mode]\n", val)); + set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + } else { + LOG(logINFO, + ("Setting number of frames %d [Burst mode]\n", (int)val)); + bus_w(ASIC_INT_FRAMES_REG, + bus_r(ASIC_INT_FRAMES_REG) & ~ASIC_INT_FRAMES_MSK); + bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) | + (((int)val << ASIC_INT_FRAMES_OFST) & + ASIC_INT_FRAMES_MSK)); + } } } int64_t getNumFrames() { - if (burstMode == BURST_OFF) { - return get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - } else { - return ((bus_r(ASIC_INT_FRAMES_REG) & ASIC_INT_FRAMES_MSK) >> ASIC_INT_FRAMES_OFST); - } + if (burstMode == BURST_OFF) { + return get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + } else { + return ((bus_r(ASIC_INT_FRAMES_REG) & ASIC_INT_FRAMES_MSK) >> + ASIC_INT_FRAMES_OFST); + } } void setNumTriggers(int64_t val) { if (val > 0) { - LOG(logINFO, ("Setting number of triggers %lld\n", val)); - if (getTiming() == AUTO_TIMING) { - LOG(logINFO, ("\tNot trigger mode: not writing to register\n")); - numTriggersReg = val; - } else { - set64BitReg(val, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); - } - } + LOG(logINFO, ("Setting number of triggers %lld\n", val)); + if (getTiming() == AUTO_TIMING) { + LOG(logINFO, ("\tNot trigger mode: not writing to register\n")); + numTriggersReg = val; + } else { + set64BitReg(val, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); + } + } } int64_t getNumTriggers() { - if (getTiming() == AUTO_TIMING) { - return numTriggersReg; - } - return get64BitReg(SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); + if (getTiming() == AUTO_TIMING) { + return numTriggersReg; + } + return get64BitReg(SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); } void setNumBursts(int64_t val) { if (val > 0) { - LOG(logINFO, ("Setting number of bursts %lld\n", val)); - if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { - set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - } else { - LOG(logINFO, ("\tNot (Burst and Auto mode): not writing to register\n")); - numBurstsReg = val; - } - } + LOG(logINFO, ("Setting number of bursts %lld\n", val)); + if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { + set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + } else { + LOG(logINFO, + ("\tNot (Burst and Auto mode): not writing to register\n")); + numBurstsReg = val; + } + } } int64_t getNumBursts() { - if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { - return get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - } - return numBurstsReg; + if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { + return get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + } + return numBurstsReg; } int setExpTime(int64_t val) { @@ -838,12 +901,12 @@ int setExpTime(int64_t val) { LOG(logERROR, ("Invalid exptime: %lld ns\n", val)); return FAIL; } - LOG(logINFO, ("Setting exptime %lld ns\n", val)); - val *= (1E-9 * systemFrequency); + LOG(logINFO, ("Setting exptime %lld ns\n", val)); + val *= (1E-9 * systemFrequency); set64BitReg(val, ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG); // validate for tolerance - int64_t retval = getExpTime(); + int64_t retval = getExpTime(); val /= (1E-9 * systemFrequency); if (val != retval) { return FAIL; @@ -852,7 +915,8 @@ int setExpTime(int64_t val) { } int64_t getExpTime() { - return get64BitReg(ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG) / (1E-9 * systemFrequency); + return get64BitReg(ASIC_INT_EXPTIME_LSB_REG, ASIC_INT_EXPTIME_MSB_REG) / + (1E-9 * systemFrequency); } int setPeriod(int64_t val) { @@ -861,14 +925,14 @@ int setPeriod(int64_t val) { return FAIL; } val *= (1E-9 * systemFrequency); - if (burstMode == BURST_OFF) { - LOG(logINFO, ("Setting period %lld ns [Continuous mode]\n", val)); - set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); - } else { - LOG(logINFO, ("Setting period %lld ns [Burst mode]\n", val)); - set64BitReg(val, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG); - } - // validate for tolerance + if (burstMode == BURST_OFF) { + LOG(logINFO, ("Setting period %lld ns [Continuous mode]\n", val)); + set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); + } else { + LOG(logINFO, ("Setting period %lld ns [Burst mode]\n", val)); + set64BitReg(val, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG); + } + // validate for tolerance int64_t retval = getPeriod(); val /= (1E-9 * systemFrequency); if (val != retval) { @@ -878,26 +942,28 @@ int setPeriod(int64_t val) { } int64_t getPeriod() { - if (burstMode == BURST_OFF) { - return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-9 * systemFrequency); - } else { - return get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG)/ (1E-9 * systemFrequency); - } + if (burstMode == BURST_OFF) { + return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) / + (1E-9 * systemFrequency); + } else { + return get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG) / + (1E-9 * systemFrequency); + } } int setDelayAfterTrigger(int64_t val) { if (val < 0) { LOG(logERROR, ("Invalid delay after trigger: %lld ns\n", val)); return FAIL; - } - LOG(logINFO, ("Setting delay after trigger %lld ns\n", val)); - val *= (1E-9 * systemFrequency); - if (getTiming() == AUTO_TIMING) { - LOG(logINFO, ("\tNot trigger mode: not writing to register\n")); - delayReg = val; - } else { - set64BitReg(val, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG); - } + } + LOG(logINFO, ("Setting delay after trigger %lld ns\n", val)); + val *= (1E-9 * systemFrequency); + if (getTiming() == AUTO_TIMING) { + LOG(logINFO, ("\tNot trigger mode: not writing to register\n")); + delayReg = val; + } else { + set64BitReg(val, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG); + } // validate for tolerance int64_t retval = getDelayAfterTrigger(); val /= (1E-9 * systemFrequency); @@ -908,25 +974,27 @@ int setDelayAfterTrigger(int64_t val) { } int64_t getDelayAfterTrigger() { - if (getTiming() == AUTO_TIMING) { - return delayReg / (1E-9 * systemFrequency); - } - return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / (1E-9 * systemFrequency); + if (getTiming() == AUTO_TIMING) { + return delayReg / (1E-9 * systemFrequency); + } + return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / + (1E-9 * systemFrequency); } int setBurstPeriod(int64_t val) { if (val < 0) { LOG(logERROR, ("Invalid burst period: %lld ns\n", val)); return FAIL; - } - LOG(logINFO, ("Setting burst period %lld ns\n", val)); - val *= (1E-9 * systemFrequency); - if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { - set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); - } else { - LOG(logINFO, ("\tNot (Burst and Auto mode): not writing to register\n")); - burstPeriodReg = val; - } + } + LOG(logINFO, ("Setting burst period %lld ns\n", val)); + val *= (1E-9 * systemFrequency); + if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { + set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); + } else { + LOG(logINFO, + ("\tNot (Burst and Auto mode): not writing to register\n")); + burstPeriodReg = val; + } // validate for tolerance int64_t retval = getBurstPeriod(); @@ -938,10 +1006,11 @@ int setBurstPeriod(int64_t val) { } int64_t getBurstPeriod() { - if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { - return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) / (1E-9 * systemFrequency); - } - return burstPeriodReg / (1E-9 * systemFrequency); + if (burstMode != BURST_OFF && getTiming() == AUTO_TIMING) { + return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) / + (1E-9 * systemFrequency); + } + return burstPeriodReg / (1E-9 * systemFrequency); } int64_t getNumFramesLeft() { @@ -953,11 +1022,13 @@ int64_t getNumTriggersLeft() { } int64_t getDelayAfterTriggerLeft() { - return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-9 * systemFrequency); + return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / + (1E-9 * systemFrequency); } int64_t getPeriodLeft() { - return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / (1E-9 * systemFrequency); + return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / + (1E-9 * systemFrequency); } int64_t getFramesFromStart() { @@ -965,146 +1036,155 @@ int64_t getFramesFromStart() { } int64_t getActualTime() { - return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY * 2); + return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / + (1E-9 * FIXED_PLL_FREQUENCY * 2); } int64_t getMeasurementTime() { - return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY); + return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / + (1E-9 * FIXED_PLL_FREQUENCY); } - /* parameters - module, settings */ -enum detectorSettings setSettings(enum detectorSettings sett){ - if(sett == UNINITIALIZED) - return thisSettings; +enum detectorSettings setSettings(enum detectorSettings sett) { + if (sett == UNINITIALIZED) + return thisSettings; - // set settings - uint32_t addr = ASIC_CONFIG_REG; - uint32_t mask = ASIC_CONFIG_GAIN_MSK; - if(sett != GET_SETTINGS) { - switch (sett) { - case DYNAMICGAIN: - bus_w(addr, bus_r(addr) & ~mask); + // set settings + uint32_t addr = ASIC_CONFIG_REG; + uint32_t mask = ASIC_CONFIG_GAIN_MSK; + if (sett != GET_SETTINGS) { + switch (sett) { + case DYNAMICGAIN: + bus_w(addr, bus_r(addr) & ~mask); bus_w(addr, bus_r(addr) | ASIC_CONFIG_DYNAMIC_GAIN_VAL); - LOG(logINFO, ("Set settings - Dyanmic Gain, val: 0x%x\n", bus_r(addr) & mask)); - break; - case FIXGAIN1: - bus_w(addr, bus_r(addr) & ~mask); + LOG(logINFO, ("Set settings - Dyanmic Gain, val: 0x%x\n", + bus_r(addr) & mask)); + break; + case FIXGAIN1: + bus_w(addr, bus_r(addr) & ~mask); bus_w(addr, bus_r(addr) | ASIC_CONFIG_FIX_GAIN_1_VAL); - LOG(logINFO, ("Set settings - Fix Gain 1, val: 0x%x\n", bus_r(addr) & mask)); - break; - case FIXGAIN2: - bus_w(addr, bus_r(addr) & ~mask); + LOG(logINFO, + ("Set settings - Fix Gain 1, val: 0x%x\n", bus_r(addr) & mask)); + break; + case FIXGAIN2: + bus_w(addr, bus_r(addr) & ~mask); bus_w(addr, bus_r(addr) | ASIC_CONFIG_FIX_GAIN_2_VAL); - LOG(logINFO, ("Set settings - Fix Gain 2, val: 0x%x\n", bus_r(addr) & mask)); - break; - default: - LOG(logERROR, ("This settings is not defined for this detector %d\n", (int)sett)); - return -1; - } - thisSettings = sett; - } + LOG(logINFO, + ("Set settings - Fix Gain 2, val: 0x%x\n", bus_r(addr) & mask)); + break; + default: + LOG(logERROR, + ("This settings is not defined for this detector %d\n", + (int)sett)); + return -1; + } + thisSettings = sett; + } - return getSettings(); + return getSettings(); } +enum detectorSettings getSettings() { + uint32_t regval = bus_r(ASIC_CONFIG_REG); + uint32_t val = regval & ASIC_CONFIG_GAIN_MSK; + LOG(logDEBUG1, ("Getting Settings\n Reading val :0x%x\n", val)); -enum detectorSettings getSettings(){ - uint32_t regval = bus_r(ASIC_CONFIG_REG); - uint32_t val = regval & ASIC_CONFIG_GAIN_MSK; - LOG(logDEBUG1, ("Getting Settings\n Reading val :0x%x\n", val)); - - switch(val) { - case ASIC_CONFIG_RESERVED_VAL: - case ASIC_CONFIG_DYNAMIC_GAIN_VAL: + switch (val) { + case ASIC_CONFIG_RESERVED_VAL: + case ASIC_CONFIG_DYNAMIC_GAIN_VAL: thisSettings = DYNAMICGAIN; LOG(logDEBUG1, ("Settings read: Dynamic Gain. val: 0x%x\n", val)); break; - case ASIC_CONFIG_FIX_GAIN_1_VAL: + case ASIC_CONFIG_FIX_GAIN_1_VAL: thisSettings = FIXGAIN1; LOG(logDEBUG1, ("Settings read: Fix Gain 1. val: 0x%x\n", val)); break; - case ASIC_CONFIG_FIX_GAIN_2_VAL: + case ASIC_CONFIG_FIX_GAIN_2_VAL: thisSettings = FIXGAIN2; LOG(logDEBUG1, ("Settings read: Fix Gain 2. val: 0x%x\n", val)); break; default: thisSettings = UNDEFINED; LOG(logERROR, ("Settings read: Undefined. val: 0x%x\n", val)); - } - return thisSettings; + } + return thisSettings; } - /* parameters - dac, hv */ -int setOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex, int val) { - char* names[] = {ONCHIP_DAC_NAMES}; - LOG(logDEBUG1, ("Setting on chip dac[%d - %s]: 0x%x\n", (int)ind, names[ind], val)); +int setOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex, int val) { + char *names[] = {ONCHIP_DAC_NAMES}; + LOG(logDEBUG1, + ("Setting on chip dac[%d - %s]: 0x%x\n", (int)ind, names[ind], val)); - if (ind >= ONCHIP_NDAC) { - LOG(logERROR, ("Invalid dac index %d\n", (int)ind)); - return FAIL; - } - if (chipIndex >= NCHIP) { - LOG(logERROR, ("Invalid chip index %d\n", chipIndex)); - return FAIL; - } - if (val > ONCHIP_DAC_MAX_VAL) { - LOG(logERROR, ("Invalid val %d\n", val)); - return FAIL; - } - LOG(logINFO, ("Setting on chip dac[%d - %s]: 0x%x\n", (int)ind, names[ind], val)); + if (ind >= ONCHIP_NDAC) { + LOG(logERROR, ("Invalid dac index %d\n", (int)ind)); + return FAIL; + } + if (chipIndex >= NCHIP) { + LOG(logERROR, ("Invalid chip index %d\n", chipIndex)); + return FAIL; + } + if (val > ONCHIP_DAC_MAX_VAL) { + LOG(logERROR, ("Invalid val %d\n", val)); + return FAIL; + } + LOG(logINFO, + ("Setting on chip dac[%d - %s]: 0x%x\n", (int)ind, names[ind], val)); - char buffer[2]; - memset(buffer, 0, sizeof(buffer)); - buffer[1] = ((val & 0xF) << 4) | (((int)ind) & 0xF); // LSB (4 bits) + ADDR (4 bits) - buffer[0] = (val >> 4) & 0x3F; // MSB (6 bits) - - if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) { - return FAIL; - } - // all chips - if (chipIndex == -1) { - int ichip = 0; - for (ichip = 0; ichip < NCHIP; ++ichip) { - onChipdacValues[ind][ichip] = val; - } - } - - // specific chip - else { - onChipdacValues[ind][chipIndex] = val; - } - return OK; + char buffer[2]; + memset(buffer, 0, sizeof(buffer)); + buffer[1] = + ((val & 0xF) << 4) | (((int)ind) & 0xF); // LSB (4 bits) + ADDR (4 bits) + buffer[0] = (val >> 4) & 0x3F; // MSB (6 bits) + + if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) { + return FAIL; + } + // all chips + if (chipIndex == -1) { + int ichip = 0; + for (ichip = 0; ichip < NCHIP; ++ichip) { + onChipdacValues[ind][ichip] = val; + } + } + + // specific chip + else { + onChipdacValues[ind][chipIndex] = val; + } + return OK; } -int getOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex) { - // all chips - if (chipIndex == -1) { - int retval = onChipdacValues[ind][0]; - int ichip = 0; - // check if same value for remaining chips - for (ichip = 1; ichip < NCHIP; ++ichip) { - if (onChipdacValues[ind][ichip] != retval) { - return -1; - } - } - return retval; - } - // specific chip - return onChipdacValues[ind][chipIndex]; +int getOnChipDAC(enum ONCHIP_DACINDEX ind, int chipIndex) { + // all chips + if (chipIndex == -1) { + int retval = onChipdacValues[ind][0]; + int ichip = 0; + // check if same value for remaining chips + for (ichip = 1; ichip < NCHIP; ++ichip) { + if (onChipdacValues[ind][ichip] != retval) { + return -1; + } + } + return retval; + } + // specific chip + return onChipdacValues[ind][chipIndex]; } void setDAC(enum DACINDEX ind, int val, int mV) { if (val < 0) { return; - } + } - char* dac_names[] = {DAC_NAMES}; - LOG(logDEBUG1, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], val, (mV ? "mV" : "dac units"))); + char *dac_names[] = {DAC_NAMES}; + LOG(logDEBUG1, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], + val, (mV ? "mV" : "dac units"))); int dacval = val; #ifdef VIRTUAL - LOG(logINFO, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], val, (mV ? "mV" : "dac units"))); + LOG(logINFO, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], + val, (mV ? "mV" : "dac units"))); if (!mV) { dacValues[ind] = val; } @@ -1113,7 +1193,8 @@ void setDAC(enum DACINDEX ind, int val, int mV) { dacValues[ind] = dacval; } #else - if (LTC2620_D_SetDACValue((int)ind, val, mV, dac_names[ind], &dacval) == OK) { + if (LTC2620_D_SetDACValue((int)ind, val, mV, dac_names[ind], &dacval) == + OK) { dacValues[ind] = dacval; } #endif @@ -1121,54 +1202,54 @@ void setDAC(enum DACINDEX ind, int val, int mV) { int getDAC(enum DACINDEX ind, int mV) { if (!mV) { - LOG(logDEBUG1, ("Getting DAC %d : %d dac\n",ind, dacValues[ind])); + LOG(logDEBUG1, ("Getting DAC %d : %d dac\n", ind, dacValues[ind])); return dacValues[ind]; } int voltage = -1; LTC2620_D_DacToVoltage(dacValues[ind], &voltage); - LOG(logDEBUG1, ("Getting DAC %d : %d dac (%d mV)\n",ind, dacValues[ind], voltage)); + LOG(logDEBUG1, + ("Getting DAC %d : %d dac (%d mV)\n", ind, dacValues[ind], voltage)); return voltage; } -int getMaxDacSteps() { - return LTC2620_D_GetMaxNumSteps(); -} +int getMaxDacSteps() { return LTC2620_D_GetMaxNumSteps(); } + +int setHighVoltage(int val) { + if (val > HV_SOFT_MAX_VOLTAGE) { + val = HV_SOFT_MAX_VOLTAGE; + } -int setHighVoltage(int val){ - if (val > HV_SOFT_MAX_VOLTAGE) { - val = HV_SOFT_MAX_VOLTAGE; - } - #ifdef VIRTUAL if (val >= 0) highvoltage = val; return highvoltage; #endif - // setting hv - if (val >= 0) { - LOG(logINFO, ("Setting High voltage: %d V\n", val)); - DAC6571_Set(val); - highvoltage = val; - } - return highvoltage; + // setting hv + if (val >= 0) { + LOG(logINFO, ("Setting High voltage: %d V\n", val)); + DAC6571_Set(val); + highvoltage = val; + } + return highvoltage; } /* parameters - timing */ -void setTiming( enum timingMode arg){ - // update - // trigger - if (getTiming() == TRIGGER_EXPOSURE) { - numTriggersReg = get64BitReg(SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); - delayReg = get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG); - } - // auto and burst - else if (burstMode != BURST_OFF) { - numBurstsReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - burstPeriodReg = get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); - } +void setTiming(enum timingMode arg) { + // update + // trigger + if (getTiming() == TRIGGER_EXPOSURE) { + numTriggersReg = get64BitReg(SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); + delayReg = + get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG); + } + // auto and burst + else if (burstMode != BURST_OFF) { + numBurstsReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + burstPeriodReg = get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); + } - switch(arg){ + switch (arg) { case AUTO_TIMING: LOG(logINFO, ("Set Timing: Auto\n")); bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK); @@ -1181,32 +1262,36 @@ void setTiming( enum timingMode arg){ LOG(logERROR, ("Unknown timing mode %d\n", arg)); } - LOG(logINFO, ("\tUpdating registers\n")) - // trigger - if (getTiming() == TRIGGER_EXPOSURE) { - set64BitReg(numTriggersReg, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); - set64BitReg(delayReg, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG); - LOG(logINFO, ("\tTriggers reg: %lld, Delay reg: %lldns\n", getNumTriggers(), getDelayAfterTrigger())); - // burst - if (burstMode != BURST_OFF) { - LOG(logINFO, ("\tFrame reg: 1, Period reg: 0\n")) - set64BitReg(1, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - set64BitReg(0, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); - } - } - // auto - else { - LOG(logINFO, ("\tTrigger reg: 1, Delay reg: 0\n")) + LOG(logINFO, ("\tUpdating registers\n")) + // trigger + if (getTiming() == TRIGGER_EXPOSURE) { + set64BitReg(numTriggersReg, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); + set64BitReg(delayReg, SET_TRIGGER_DELAY_LSB_REG, + SET_TRIGGER_DELAY_MSB_REG); + LOG(logINFO, ("\tTriggers reg: %lld, Delay reg: %lldns\n", + getNumTriggers(), getDelayAfterTrigger())); + // burst + if (burstMode != BURST_OFF) { + LOG(logINFO, ("\tFrame reg: 1, Period reg: 0\n")) + set64BitReg(1, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + set64BitReg(0, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); + } + } + // auto + else { + LOG(logINFO, ("\tTrigger reg: 1, Delay reg: 0\n")) set64BitReg(1, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); - set64BitReg(0, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG); - // burst - if (burstMode != BURST_OFF) { - set64BitReg(numBurstsReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - set64BitReg(burstPeriodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); - LOG(logINFO, ("\tFrames reg (bursts): %lld, Period reg(burst period): %lldns\n", getNumBursts(), getBurstPeriod())); - } - } - LOG(logINFO, ("\tDone Updating registers\n")) + set64BitReg(0, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG); + // burst + if (burstMode != BURST_OFF) { + set64BitReg(numBurstsReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + set64BitReg(burstPeriodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); + LOG(logINFO, ("\tFrames reg (bursts): %lld, Period reg(burst " + "period): %lldns\n", + getNumBursts(), getBurstPeriod())); + } + } + LOG(logINFO, ("\tDone Updating registers\n")) } enum timingMode getTiming() { @@ -1215,1100 +1300,1151 @@ enum timingMode getTiming() { return AUTO_TIMING; } - int configureMAC() { - uint32_t srcip = udpDetails.srcip; - uint32_t dstip = udpDetails.dstip; - uint64_t srcmac = udpDetails.srcmac; - uint64_t dstmac = udpDetails.dstmac; - int srcport = udpDetails.srcport; - int dstport = udpDetails.dstport; + uint32_t srcip = udpDetails.srcip; + uint32_t dstip = udpDetails.dstip; + uint64_t srcmac = udpDetails.srcmac; + uint64_t dstmac = udpDetails.dstmac; + int srcport = udpDetails.srcport; + int dstport = udpDetails.dstport; - LOG(logINFOBLUE, ("Configuring MAC\n")); - char src_mac[50], src_ip[INET_ADDRSTRLEN],dst_mac[50], dst_ip[INET_ADDRSTRLEN]; - getMacAddressinString(src_mac, 50, srcmac); - getMacAddressinString(dst_mac, 50, dstmac); - getIpAddressinString(src_ip, srcip); - getIpAddressinString(dst_ip, dstip); + LOG(logINFOBLUE, ("Configuring MAC\n")); + char src_mac[50], src_ip[INET_ADDRSTRLEN], dst_mac[50], + dst_ip[INET_ADDRSTRLEN]; + getMacAddressinString(src_mac, 50, srcmac); + getMacAddressinString(dst_mac, 50, dstmac); + getIpAddressinString(src_ip, srcip); + getIpAddressinString(dst_ip, dstip); - LOG(logINFO, ( - "\tSource IP : %s\n" - "\tSource MAC : %s\n" - "\tSource Port : %d\n" - "\tDest IP : %s\n" - "\tDest MAC : %s\n" - "\tDest Port : %d\n", - src_ip, src_mac, srcport, - dst_ip, dst_mac, dstport)); + LOG(logINFO, ("\tSource IP : %s\n" + "\tSource MAC : %s\n" + "\tSource Port : %d\n" + "\tDest IP : %s\n" + "\tDest MAC : %s\n" + "\tDest Port : %d\n", + src_ip, src_mac, srcport, dst_ip, dst_mac, dstport)); #ifdef VIRTUAL - if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { - LOG(logERROR, ("could not set udp destination IP and port\n")); - return FAIL; - } + if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { + LOG(logERROR, ("could not set udp destination IP and port\n")); + return FAIL; + } return OK; #endif - // start addr - uint32_t addr = BASE_UDP_RAM; - // calculate rxr endpoint offset - //addr += (iRxEntry * RXR_ENDPOINT_OFST);//TODO: is there round robin already implemented? - // get struct memory - udp_header *udp = (udp_header*) (Nios_getBaseAddress() + addr/(sizeof(u_int32_t))); - memset(udp, 0, sizeof(udp_header)); + // start addr + uint32_t addr = BASE_UDP_RAM; + // calculate rxr endpoint offset + // addr += (iRxEntry * RXR_ENDPOINT_OFST);//TODO: is there round robin + // already implemented? + // get struct memory + udp_header *udp = + (udp_header *)(Nios_getBaseAddress() + addr / (sizeof(u_int32_t))); + memset(udp, 0, sizeof(udp_header)); - // mac addresses - // msb (32) + lsb (16) - udp->udp_destmac_msb = ((dstmac >> 16) & BIT32_MASK); - udp->udp_destmac_lsb = ((dstmac >> 0) & BIT16_MASK); - // msb (16) + lsb (32) - udp->udp_srcmac_msb = ((srcmac >> 32) & BIT16_MASK); - udp->udp_srcmac_lsb = ((srcmac >> 0) & BIT32_MASK); + // mac addresses + // msb (32) + lsb (16) + udp->udp_destmac_msb = ((dstmac >> 16) & BIT32_MASK); + udp->udp_destmac_lsb = ((dstmac >> 0) & BIT16_MASK); + // msb (16) + lsb (32) + udp->udp_srcmac_msb = ((srcmac >> 32) & BIT16_MASK); + udp->udp_srcmac_lsb = ((srcmac >> 0) & BIT32_MASK); - // ip addresses - udp->ip_srcip_msb = ((srcip >> 16) & BIT16_MASK); - udp->ip_srcip_lsb = ((srcip >> 0) & BIT16_MASK); - udp->ip_destip_msb = ((dstip >> 16) & BIT16_MASK); - udp->ip_destip_lsb = ((dstip >> 0) & BIT16_MASK); + // ip addresses + udp->ip_srcip_msb = ((srcip >> 16) & BIT16_MASK); + udp->ip_srcip_lsb = ((srcip >> 0) & BIT16_MASK); + udp->ip_destip_msb = ((dstip >> 16) & BIT16_MASK); + udp->ip_destip_lsb = ((dstip >> 0) & BIT16_MASK); - // source port - udp->udp_srcport = srcport; - udp->udp_destport = dstport; + // source port + udp->udp_srcport = srcport; + udp->udp_destport = dstport; - // other defines - udp->udp_ethertype = 0x800; - udp->ip_ver = 0x4; - udp->ip_ihl = 0x5; - udp->ip_flags = 0x2; //FIXME - udp->ip_ttl = 0x40; - udp->ip_protocol = 0x11; - // total length is redefined in firmware + // other defines + udp->udp_ethertype = 0x800; + udp->ip_ver = 0x4; + udp->ip_ihl = 0x5; + udp->ip_flags = 0x2; // FIXME + udp->ip_ttl = 0x40; + udp->ip_protocol = 0x11; + // total length is redefined in firmware - calcChecksum(udp); + calcChecksum(udp); - //TODO? - cleanFifos(); - resetCore(); - //alignDeserializer(); - return OK; + // TODO? + cleanFifos(); + resetCore(); + // alignDeserializer(); + return OK; } -void calcChecksum(udp_header* udp) { - int count = IP_HEADER_SIZE; - long int sum = 0; - - // start at ip_tos as the memory is not continous for ip header - uint16_t *addr = (uint16_t*) (&(udp->ip_tos)); +void calcChecksum(udp_header *udp) { + int count = IP_HEADER_SIZE; + long int sum = 0; - sum += *addr++; - count -= 2; + // start at ip_tos as the memory is not continous for ip header + uint16_t *addr = (uint16_t *)(&(udp->ip_tos)); - // ignore ethertype (from udp header) - addr++; + sum += *addr++; + count -= 2; - // from identification to srcip_lsb - while( count > 2 ) { - sum += *addr++; - count -= 2; - } + // ignore ethertype (from udp header) + addr++; - // ignore src udp port (from udp header) - addr++; - - if (count > 0) - sum += *addr; // Add left-over byte, if any - while (sum >> 16) - sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits - long int checksum = sum & 0xffff; - checksum += UDP_IP_HEADER_LENGTH_BYTES; - LOG(logINFO, ("\tIP checksum is 0x%lx\n",checksum)); - udp->ip_checksum = checksum; + // from identification to srcip_lsb + while (count > 2) { + sum += *addr++; + count -= 2; + } + + // ignore src udp port (from udp header) + addr++; + + if (count > 0) + sum += *addr; // Add left-over byte, if any + while (sum >> 16) + sum = (sum & 0xffff) + (sum >> 16); // Fold 32-bit sum to 16 bits + long int checksum = sum & 0xffff; + checksum += UDP_IP_HEADER_LENGTH_BYTES; + LOG(logINFO, ("\tIP checksum is 0x%lx\n", checksum)); + udp->ip_checksum = checksum; } int setDetectorPosition(int pos[]) { memcpy(detPos, pos, sizeof(detPos)); - uint32_t addr = COORD_0_REG; - int value = 0; - int valueRead = 0; - int ret = OK; + uint32_t addr = COORD_0_REG; + int value = 0; + int valueRead = 0; + int ret = OK; - // row - value = detPos[X]; - bus_w(addr, (bus_r(addr) &~COORD_ROW_MSK) | ((value << COORD_ROW_OFST) & COORD_ROW_MSK)); - valueRead = ((bus_r(addr) & COORD_ROW_MSK) >> COORD_ROW_OFST); - if (valueRead != value) { - LOG(logERROR, ("Could not set row. Set %d, read %d\n", value, valueRead)); - ret = FAIL; - } + // row + value = detPos[X]; + bus_w(addr, (bus_r(addr) & ~COORD_ROW_MSK) | + ((value << COORD_ROW_OFST) & COORD_ROW_MSK)); + valueRead = ((bus_r(addr) & COORD_ROW_MSK) >> COORD_ROW_OFST); + if (valueRead != value) { + LOG(logERROR, + ("Could not set row. Set %d, read %d\n", value, valueRead)); + ret = FAIL; + } - // col - value = detPos[Y]; - bus_w(addr, (bus_r(addr) &~COORD_COL_MSK) | ((value << COORD_COL_OFST) & COORD_COL_MSK)); - valueRead = ((bus_r(addr) & COORD_COL_MSK) >> COORD_COL_OFST); - if (valueRead != value) { - LOG(logERROR, ("Could not set column. Set %d, read %d\n", value, valueRead)); - ret = FAIL; - } + // col + value = detPos[Y]; + bus_w(addr, (bus_r(addr) & ~COORD_COL_MSK) | + ((value << COORD_COL_OFST) & COORD_COL_MSK)); + valueRead = ((bus_r(addr) & COORD_COL_MSK) >> COORD_COL_OFST); + if (valueRead != value) { + LOG(logERROR, + ("Could not set column. Set %d, read %d\n", value, valueRead)); + ret = FAIL; + } - if (ret == OK) { - LOG(logINFO, ("\tPosition set to [%d, %d]\n", detPos[X], detPos[Y])); - } - - return ret; + if (ret == OK) { + LOG(logINFO, ("\tPosition set to [%d, %d]\n", detPos[X], detPos[Y])); + } + + return ret; } -int* getDetectorPosition() { - return detPos; -} +int *getDetectorPosition() { return detPos; } // Detector Specific int checkDetectorType() { -#ifdef VIRTUAL - return OK; +#ifdef VIRTUAL + return OK; #endif - LOG(logINFO, ("Checking type of module\n")); - FILE* fd = fopen(TYPE_FILE_NAME, "r"); + LOG(logINFO, ("Checking type of module\n")); + FILE *fd = fopen(TYPE_FILE_NAME, "r"); if (fd == NULL) { - LOG(logERROR, ("Could not open file %s to get type of the module attached\n", TYPE_FILE_NAME)); + LOG(logERROR, + ("Could not open file %s to get type of the module attached\n", + TYPE_FILE_NAME)); return -1; - } - char buffer[MAX_STR_LENGTH]; - memset(buffer, 0, sizeof(buffer)); - fread (buffer, MAX_STR_LENGTH, sizeof(char), fd); - if (strlen(buffer) == 0) { - LOG(logERROR, ("Could not read file %s to get type of the module attached\n", TYPE_FILE_NAME)); - return -1; - } - int type = atoi(buffer); - if (type > TYPE_NO_MODULE_STARTING_VAL) { - LOG(logERROR, ("No Module attached! Expected %d for Gotthard2, got %d\n", TYPE_GOTTHARD2_MODULE_VAL, type)); - return -2; - } + } + char buffer[MAX_STR_LENGTH]; + memset(buffer, 0, sizeof(buffer)); + fread(buffer, MAX_STR_LENGTH, sizeof(char), fd); + if (strlen(buffer) == 0) { + LOG(logERROR, + ("Could not read file %s to get type of the module attached\n", + TYPE_FILE_NAME)); + return -1; + } + int type = atoi(buffer); + if (type > TYPE_NO_MODULE_STARTING_VAL) { + LOG(logERROR, + ("No Module attached! Expected %d for Gotthard2, got %d\n", + TYPE_GOTTHARD2_MODULE_VAL, type)); + return -2; + } - if (abs(type - TYPE_GOTTHARD2_MODULE_VAL) > TYPE_TOLERANCE) { - LOG(logERROR, ("Wrong Module attached! Expected %d for Gotthard2, got %d\n", TYPE_GOTTHARD2_MODULE_VAL, type)); - return FAIL; - } - return OK; + if (abs(type - TYPE_GOTTHARD2_MODULE_VAL) > TYPE_TOLERANCE) { + LOG(logERROR, + ("Wrong Module attached! Expected %d for Gotthard2, got %d\n", + TYPE_GOTTHARD2_MODULE_VAL, type)); + return FAIL; + } + return OK; } -int powerChip (int on){ - if(on != -1){ - if(on){ +int powerChip(int on) { + if (on != -1) { + if (on) { LOG(logINFO, ("Powering chip: on\n")); bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PWR_CHIP_MSK); - } - else{ + } else { LOG(logINFO, ("Powering chip: off\n")); bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PWR_CHIP_MSK); } } - return ((bus_r(CONTROL_REG) & CONTROL_PWR_CHIP_MSK) >> CONTROL_PWR_CHIP_OFST); + return ((bus_r(CONTROL_REG) & CONTROL_PWR_CHIP_MSK) >> + CONTROL_PWR_CHIP_OFST); } int setPhase(enum CLKINDEX ind, int val, int degrees) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to set phase\n", ind)); - return FAIL; - } - char* clock_names[] = {CLK_NAMES}; - LOG(logINFOBLUE, ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], ind, val, degrees == 0 ? "" : "degrees")); - int maxShift = getMaxPhase(ind); - // validation - if (degrees && (val < 0 || val > 359)) { - LOG(logERROR, ("\tPhase outside limits (0 - 359°C)\n")); - return FAIL; - } - if (!degrees && (val < 0 || val > maxShift - 1)) { - LOG(logERROR, ("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1)); - return FAIL; - } + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to set phase\n", ind)); + return FAIL; + } + char *clock_names[] = {CLK_NAMES}; + LOG(logINFOBLUE, + ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], ind, val, + degrees == 0 ? "" : "degrees")); + int maxShift = getMaxPhase(ind); + // validation + if (degrees && (val < 0 || val > 359)) { + LOG(logERROR, ("\tPhase outside limits (0 - 359°C)\n")); + return FAIL; + } + if (!degrees && (val < 0 || val > maxShift - 1)) { + LOG(logERROR, + ("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1)); + return FAIL; + } - int valShift = val; - // convert to phase shift - if (degrees) { - ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); - } - LOG(logDEBUG1, ("\tphase shift: %d (degrees/shift: %d)\n", valShift, val)); + int valShift = val; + // convert to phase shift + if (degrees) { + ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); + } + LOG(logDEBUG1, ("\tphase shift: %d (degrees/shift: %d)\n", valShift, val)); - int relativePhase = valShift - clkPhase[ind]; - LOG(logDEBUG1, ("\trelative phase shift: %d (Current phase: %d)\n", relativePhase, clkPhase[ind])); + int relativePhase = valShift - clkPhase[ind]; + LOG(logDEBUG1, ("\trelative phase shift: %d (Current phase: %d)\n", + relativePhase, clkPhase[ind])); // same phase if (!relativePhase) { - LOG(logINFO, ("\tNothing to do in Phase Shift\n")); - return OK; + LOG(logINFO, ("\tNothing to do in Phase Shift\n")); + return OK; } - int direction = 1; - if (relativePhase < 0) { - relativePhase *= -1; - direction = 0; - } - int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); - int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind); + int direction = 1; + if (relativePhase < 0) { + relativePhase *= -1; + direction = 0; + } + int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); + int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind); ALTERA_PLL_C10_SetPhaseShift(pllIndex, clkIndex, relativePhase, direction); clkPhase[ind] = valShift; - return OK; + return OK; } int getPhase(enum CLKINDEX ind, int degrees) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get phase\n", ind)); - return -1; - } - if (!degrees) - return clkPhase[ind]; - // convert back to degrees - int val = 0; - ConvertToDifferentRange(0, getMaxPhase(ind) - 1, 0, 359, clkPhase[ind], &val); - return val; + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get phase\n", ind)); + return -1; + } + if (!degrees) + return clkPhase[ind]; + // convert back to degrees + int val = 0; + ConvertToDifferentRange(0, getMaxPhase(ind) - 1, 0, 359, clkPhase[ind], + &val); + return val; } int getMaxPhase(enum CLKINDEX ind) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind)); - return -1; - } - int maxshiftstep = ALTERA_PLL_C10_GetMaxPhaseShiftStepsofVCO(); - int ret = clkDivider[ind] * maxshiftstep; + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind)); + return -1; + } + int maxshiftstep = ALTERA_PLL_C10_GetMaxPhaseShiftStepsofVCO(); + int ret = clkDivider[ind] * maxshiftstep; - char* clock_names[] = {CLK_NAMES}; - LOG(logDEBUG1, ("\tMax Phase Shift (%s): %d (Clock Div: %d)\n", - clock_names[ind], ret, clkDivider[ind])); + char *clock_names[] = {CLK_NAMES}; + LOG(logDEBUG1, ("\tMax Phase Shift (%s): %d (Clock Div: %d)\n", + clock_names[ind], ret, clkDivider[ind])); - return ret; + return ret; } int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to validate phase in degrees\n", ind)); - return FAIL; - } - if (val == -1) { - return OK; - } - LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", (int)ind)); - int maxShift = getMaxPhase(ind); - // convert degrees to shift - int valShift = 0; - ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); - // convert back to degrees - ConvertToDifferentRange(0, maxShift - 1, 0, 359, valShift, &val); + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, + ("Unknown clock index %d to validate phase in degrees\n", ind)); + return FAIL; + } + if (val == -1) { + return OK; + } + LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", (int)ind)); + int maxShift = getMaxPhase(ind); + // convert degrees to shift + int valShift = 0; + ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); + // convert back to degrees + ConvertToDifferentRange(0, maxShift - 1, 0, 359, valShift, &val); - if (val == retval) - return OK; - return FAIL; + if (val == retval) + return OK; + return FAIL; } - - int getFrequency(enum CLKINDEX ind) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind)); - return -1; - } + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind)); + return -1; + } return (((double)getVCOFrequency(ind) / (double)clkDivider[ind]) + 0.5); } int getVCOFrequency(enum CLKINDEX ind) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get vco frequency\n", ind)); - return -1; - } - int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); - return ALTERA_PLL_C10_GetVCOFrequency(pllIndex); + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get vco frequency\n", ind)); + return -1; + } + int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); + return ALTERA_PLL_C10_GetVCOFrequency(pllIndex); } -int getMaxClockDivider() { - return ALTERA_PLL_C10_GetMaxClockDivider(); -} +int getMaxClockDivider() { return ALTERA_PLL_C10_GetMaxClockDivider(); } int setClockDivider(enum CLKINDEX ind, int val) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to set clock divider\n", ind)); - return FAIL; - } - if (val < 2 || val > getMaxClockDivider()) { - return FAIL; - } - char* clock_names[] = {CLK_NAMES}; + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to set clock divider\n", ind)); + return FAIL; + } + if (val < 2 || val > getMaxClockDivider()) { + return FAIL; + } + char *clock_names[] = {CLK_NAMES}; - LOG(logINFO, ("\tSetting %s clock (%d) divider from %d to %d\n", - clock_names[ind], ind, clkDivider[ind], val)); + LOG(logINFO, ("\tSetting %s clock (%d) divider from %d to %d\n", + clock_names[ind], ind, clkDivider[ind], val)); // Remembering old phases in degrees int oldPhases[NUM_CLOCKS]; - { - int i = 0; - for (i = 0; i < NUM_CLOCKS; ++i) { - oldPhases[i] = getPhase(i, 1); - LOG(logDEBUG1, ("\tRemembering %s clock (%d) phase: %d degrees\n", - clock_names[ind], ind, oldPhases[i])); - } - } + { + int i = 0; + for (i = 0; i < NUM_CLOCKS; ++i) { + oldPhases[i] = getPhase(i, 1); + LOG(logDEBUG1, ("\tRemembering %s clock (%d) phase: %d degrees\n", + clock_names[ind], ind, oldPhases[i])); + } + } // Calculate and set output frequency - int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); - int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind); - ALTERA_PLL_C10_SetOuputClockDivider (pllIndex, clkIndex, val); - clkDivider[ind] = val; - LOG(logINFO, ("\t%s clock (%d) divider set to %d\n", - clock_names[ind], ind, clkDivider[ind])); - // update system frequency - if (ind == SYSTEM_C0) { - setTimingSource(getTimingSource()); - } - + int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); + int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind); + ALTERA_PLL_C10_SetOuputClockDivider(pllIndex, clkIndex, val); + clkDivider[ind] = val; + LOG(logINFO, ("\t%s clock (%d) divider set to %d\n", clock_names[ind], ind, + clkDivider[ind])); + // update system frequency + if (ind == SYSTEM_C0) { + setTimingSource(getTimingSource()); + } + // phase is reset by pll (when setting output frequency) - if (ind >= READOUT_C0) { - clkPhase[READOUT_C0] = 0; - clkPhase[READOUT_C1] = 0; - } else { - clkPhase[SYSTEM_C0] = 0; - clkPhase[SYSTEM_C1] = 0; - clkPhase[SYSTEM_C2] = 0; - clkPhase[SYSTEM_C3] = 0; - } + if (ind >= READOUT_C0) { + clkPhase[READOUT_C0] = 0; + clkPhase[READOUT_C1] = 0; + } else { + clkPhase[SYSTEM_C0] = 0; + clkPhase[SYSTEM_C1] = 0; + clkPhase[SYSTEM_C2] = 0; + clkPhase[SYSTEM_C3] = 0; + } // set the phase in degrees (reset by pll) - { - int i = 0; - for (i = 0; i < NUM_CLOCKS; ++i) { - int currPhaseDeg = getPhase(i, 1); - if (oldPhases[i] != currPhaseDeg) { - LOG(logINFO, ("\tCorrecting %s clock (%d) phase from %d to %d degrees\n", - clock_names[i], i, currPhaseDeg, oldPhases[i])); - setPhase(i, oldPhases[i], 1); - } - } - } - return OK; + { + int i = 0; + for (i = 0; i < NUM_CLOCKS; ++i) { + int currPhaseDeg = getPhase(i, 1); + if (oldPhases[i] != currPhaseDeg) { + LOG(logINFO, + ("\tCorrecting %s clock (%d) phase from %d to %d degrees\n", + clock_names[i], i, currPhaseDeg, oldPhases[i])); + setPhase(i, oldPhases[i], 1); + } + } + } + return OK; } int getClockDivider(enum CLKINDEX ind) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get clock divider\n", ind)); - return -1; - } - return clkDivider[ind]; + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get clock divider\n", ind)); + return -1; + } + return clkDivider[ind]; } int setInjectChannel(int offset, int increment) { - if (offset < 0 || increment < 1) { - LOG(logERROR, ("Cannot inject channel. Invalid offset %d or increment %d\n", offset, increment)); - return FAIL; - } + if (offset < 0 || increment < 1) { + LOG(logERROR, + ("Cannot inject channel. Invalid offset %d or increment %d\n", + offset, increment)); + return FAIL; + } - LOG(logINFO, ("Injecting channels [offset:%d, increment:%d]\n", offset, increment)); - - // 4 bits of padding + 128 bits + 4 bits for address = 136 bits - char buffer[17]; - memset(buffer, 0, sizeof(buffer)); - int startCh = 4; // 4 due to padding - int ich = 0; - for (ich = startCh + offset; ich < startCh + NCHAN; ich = ich + increment) { - int byteIndex = ich / 8; - int bitIndex = ich % 8; - buffer[byteIndex] |= (1 << (8 - 1 - bitIndex)); - } + LOG(logINFO, + ("Injecting channels [offset:%d, increment:%d]\n", offset, increment)); - // address at the end - buffer[16] |= (ASIC_CURRENT_INJECT_ADDR); + // 4 bits of padding + 128 bits + 4 bits for address = 136 bits + char buffer[17]; + memset(buffer, 0, sizeof(buffer)); + int startCh = 4; // 4 due to padding + int ich = 0; + for (ich = startCh + offset; ich < startCh + NCHAN; ich = ich + increment) { + int byteIndex = ich / 8; + int bitIndex = ich % 8; + buffer[byteIndex] |= (1 << (8 - 1 - bitIndex)); + } - int chipIndex = -1; // for all chips - if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) { - return FAIL; - } + // address at the end + buffer[16] |= (ASIC_CURRENT_INJECT_ADDR); - injectedChannelsOffset = offset; - injectedChannelsIncrement = increment; - return OK; + int chipIndex = -1; // for all chips + if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) { + return FAIL; + } + + injectedChannelsOffset = offset; + injectedChannelsIncrement = increment; + return OK; } -void getInjectedChannels(int* offset, int* increment) { - *offset = injectedChannelsOffset; - *increment = injectedChannelsIncrement; +void getInjectedChannels(int *offset, int *increment) { + *offset = injectedChannelsOffset; + *increment = injectedChannelsIncrement; } -int setVetoReference(int gainIndex, int value) { - LOG(logINFO, ("Setting veto reference [chip:-1, G%d, value:0x%x]\n", gainIndex, value)); - int vals[NCHAN]; - memset(vals, 0, sizeof(vals)); - int ich = 0; - for (ich = 0; ich < NCHAN; ++ich) { - vals[ich] = value; - } - return setVetoPhoton(-1, gainIndex, vals); +int setVetoReference(int gainIndex, int value) { + LOG(logINFO, ("Setting veto reference [chip:-1, G%d, value:0x%x]\n", + gainIndex, value)); + int vals[NCHAN]; + memset(vals, 0, sizeof(vals)); + int ich = 0; + for (ich = 0; ich < NCHAN; ++ich) { + vals[ich] = value; + } + return setVetoPhoton(-1, gainIndex, vals); } -int setVetoPhoton(int chipIndex, int gainIndex, int* values) { - LOG(logINFO, ("Setting veto photon [chip:%d, G%d]\n", chipIndex, gainIndex)); +int setVetoPhoton(int chipIndex, int gainIndex, int *values) { + LOG(logINFO, + ("Setting veto photon [chip:%d, G%d]\n", chipIndex, gainIndex)); - // add gain bits - { - int gainValue = 0; - switch (gainIndex) { - case 0: - gainValue = ASIC_G0_VAL; - break; - case 1: - gainValue = ASIC_G1_VAL; - break; - case 2: - gainValue = ASIC_G2_VAL; - break; - default: - LOG(logERROR, ("Unknown gain index %d\n", gainIndex)); - return FAIL; - } - LOG(logDEBUG2, ("Adding gain bits\n")); - int i = 0; - for (i = 0; i < NCHAN; ++i) { - values[i] |= gainValue; - LOG(logDEBUG2, ("Value %d: 0x%x\n", i, values[i])); - } - } + // add gain bits + { + int gainValue = 0; + switch (gainIndex) { + case 0: + gainValue = ASIC_G0_VAL; + break; + case 1: + gainValue = ASIC_G1_VAL; + break; + case 2: + gainValue = ASIC_G2_VAL; + break; + default: + LOG(logERROR, ("Unknown gain index %d\n", gainIndex)); + return FAIL; + } + LOG(logDEBUG2, ("Adding gain bits\n")); + int i = 0; + for (i = 0; i < NCHAN; ++i) { + values[i] |= gainValue; + LOG(logDEBUG2, ("Value %d: 0x%x\n", i, values[i])); + } + } - const int lenDataBitsPerchannel = ASIC_GAIN_MAX_BITS + ADU_MAX_BITS; // 14 - const int lenBits = lenDataBitsPerchannel * NCHAN; // 1792 - const int padding = 4; // due to address (4) to make it byte aligned - const int lenTotalBits = padding + lenBits + ASIC_ADDR_MAX_BITS; // 1800 - const int len = lenTotalBits / 8; // 225 + const int lenDataBitsPerchannel = ASIC_GAIN_MAX_BITS + ADU_MAX_BITS; // 14 + const int lenBits = lenDataBitsPerchannel * NCHAN; // 1792 + const int padding = 4; // due to address (4) to make it byte aligned + const int lenTotalBits = padding + lenBits + ASIC_ADDR_MAX_BITS; // 1800 + const int len = lenTotalBits / 8; // 225 - // assign each bit into 4 + 1792 into byte array - uint8_t commandBytes[lenTotalBits]; - memset(commandBytes, 0, sizeof(commandBytes)); - int offset = padding; // bit offset for commandbytes - int ich = 0; - for (ich = 0; ich < NCHAN; ++ich) { - // loop through all bits in a value - int iBit = 0; - for (iBit = 0; iBit < lenDataBitsPerchannel; ++iBit) { - commandBytes[offset++] = ((values[ich] >> (lenDataBitsPerchannel - 1 - iBit)) & 0x1); - } - } + // assign each bit into 4 + 1792 into byte array + uint8_t commandBytes[lenTotalBits]; + memset(commandBytes, 0, sizeof(commandBytes)); + int offset = padding; // bit offset for commandbytes + int ich = 0; + for (ich = 0; ich < NCHAN; ++ich) { + // loop through all bits in a value + int iBit = 0; + for (iBit = 0; iBit < lenDataBitsPerchannel; ++iBit) { + commandBytes[offset++] = + ((values[ich] >> (lenDataBitsPerchannel - 1 - iBit)) & 0x1); + } + } - // create command for 4 padding + 1792 bits + 4 bits address = 1800 bits = 225 bytes - char buffer[len]; - memset(buffer, 0, len); - offset = 0; - // loop through buffer elements - for (ich = 0; ich < len; ++ich) { - // loop through each bit in buffer element - int iBit = 0; - for (iBit = 0; iBit < 8; ++iBit) { - buffer[ich] |= (commandBytes[offset++] << (8 - 1 - iBit)); - } - } + // create command for 4 padding + 1792 bits + 4 bits address = 1800 bits = + // 225 bytes + char buffer[len]; + memset(buffer, 0, len); + offset = 0; + // loop through buffer elements + for (ich = 0; ich < len; ++ich) { + // loop through each bit in buffer element + int iBit = 0; + for (iBit = 0; iBit < 8; ++iBit) { + buffer[ich] |= (commandBytes[offset++] << (8 - 1 - iBit)); + } + } - // address at the end - buffer[len - 1] |= (ASIC_VETO_REF_ADDR); + // address at the end + buffer[len - 1] |= (ASIC_VETO_REF_ADDR); - if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) { - return FAIL; - } + if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) { + return FAIL; + } - // all chips - if (chipIndex == -1) { - int ichip = 0; - int ichan = 0; - for (ichan = 0; ichan < NCHAN; ++ichan) { - for (ichip = 0; ichip < NCHIP; ++ichip) { - vetoReference[ichip][ichan] = values[ichan]; - } - } - } - - // specific chip - else { - int ichan = 0; - for (ichan = 0; ichan < NCHAN; ++ichan) { - vetoReference[chipIndex][chipIndex] = values[ichan];; - } - } - return OK; -} + // all chips + if (chipIndex == -1) { + int ichip = 0; + int ichan = 0; + for (ichan = 0; ichan < NCHAN; ++ichan) { + for (ichip = 0; ichip < NCHIP; ++ichip) { + vetoReference[ichip][ichan] = values[ichan]; + } + } + } -int getVetoPhoton(int chipIndex, int* retvals) { - if (chipIndex == -1) { - int i = 0, j = 0; - for (i = 0; i < NCHAN; ++i) { - int val = vetoReference[0][i]; - for (j = 1; j < NCHIP; ++j) { - if (vetoReference[j][i] != val) { - LOG(logERROR, ("Get vet photon fail for chipIndex:%d. Different values between [nchip:%d, nchan:%d, value:%d] and [nchip:0, nchan:%d, value:%d]\n", chipIndex, j, i, vetoReference[j][i], i, val)); - return FAIL; - } - } - } - chipIndex = 0; - } - memcpy((char*)retvals, ((char*)vetoReference) + NCHAN * chipIndex * sizeof(int), sizeof(int) * NCHAN); - return OK; + // specific chip + else { + int ichan = 0; + for (ichan = 0; ichan < NCHAN; ++ichan) { + vetoReference[chipIndex][chipIndex] = values[ichan]; + ; + } + } + return OK; +} + +int getVetoPhoton(int chipIndex, int *retvals) { + if (chipIndex == -1) { + int i = 0, j = 0; + for (i = 0; i < NCHAN; ++i) { + int val = vetoReference[0][i]; + for (j = 1; j < NCHIP; ++j) { + if (vetoReference[j][i] != val) { + LOG(logERROR, + ("Get vet photon fail for chipIndex:%d. Different " + "values between [nchip:%d, nchan:%d, value:%d] and " + "[nchip:0, nchan:%d, value:%d]\n", + chipIndex, j, i, vetoReference[j][i], i, val)); + return FAIL; + } + } + } + chipIndex = 0; + } + memcpy((char *)retvals, + ((char *)vetoReference) + NCHAN * chipIndex * sizeof(int), + sizeof(int) * NCHAN); + return OK; } int configureSingleADCDriver(int chipIndex) { - LOG(logINFO, ("Configuring ADC for %s chips [chipIndex:%d Burst Mode:%d]\n", chipIndex == -1 ? "All" : "Single", chipIndex, burstMode)); + LOG(logINFO, ("Configuring ADC for %s chips [chipIndex:%d Burst Mode:%d]\n", + chipIndex == -1 ? "All" : "Single", chipIndex, burstMode)); - int ind = chipIndex; - if (ind == -1) { - ind = 0; - } - uint8_t values[NADC]; - memcpy(values, adcConfiguration + ind * NADC, NADC); + int ind = chipIndex; + if (ind == -1) { + ind = 0; + } + uint8_t values[NADC]; + memcpy(values, adcConfiguration + ind * NADC, NADC); - // change adc values if continuous mode - { - int i = 0; - for (i = 0; i < NADC; ++i) { - if (burstMode == BURST_OFF) { - values[i] |= ASIC_CONTINUOUS_MODE_MSK; - } - LOG(logDEBUG2, ("Value %d: 0x%02hhx\n", i, values[i])); - } - } + // change adc values if continuous mode + { + int i = 0; + for (i = 0; i < NADC; ++i) { + if (burstMode == BURST_OFF) { + values[i] |= ASIC_CONTINUOUS_MODE_MSK; + } + LOG(logDEBUG2, ("Value %d: 0x%02hhx\n", i, values[i])); + } + } + const int lenDataBitsPerADC = ASIC_ADC_MAX_BITS; // 7 + const int lenBits = lenDataBitsPerADC * NADC; // 224 + const int padding = 4; // due to address (4) to make it byte aligned + const int lenTotalBits = padding + lenBits + ASIC_ADDR_MAX_BITS; // 232 + const int len = lenTotalBits / 8; // 29 - const int lenDataBitsPerADC = ASIC_ADC_MAX_BITS; // 7 - const int lenBits = lenDataBitsPerADC * NADC; // 224 - const int padding = 4; // due to address (4) to make it byte aligned - const int lenTotalBits = padding + lenBits + ASIC_ADDR_MAX_BITS; // 232 - const int len = lenTotalBits / 8; // 29 + // assign each bit into 4 + 224 into byte array + uint8_t commandBytes[lenTotalBits]; + memset(commandBytes, 0, sizeof(commandBytes)); + int offset = padding; // bit offset for commandbytes + int ich = 0; + for (ich = 0; ich < NADC; ++ich) { + // loop through all bits in a value + int iBit = 0; + for (iBit = 0; iBit < lenDataBitsPerADC; ++iBit) { + commandBytes[offset++] = + ((values[ich] >> (lenDataBitsPerADC - 1 - iBit)) & 0x1); + } + } - // assign each bit into 4 + 224 into byte array - uint8_t commandBytes[lenTotalBits]; - memset(commandBytes, 0, sizeof(commandBytes)); - int offset = padding; // bit offset for commandbytes - int ich = 0; - for (ich = 0; ich < NADC; ++ich) { - // loop through all bits in a value - int iBit = 0; - for (iBit = 0; iBit < lenDataBitsPerADC; ++iBit) { - commandBytes[offset++] = ((values[ich] >> (lenDataBitsPerADC - 1 - iBit)) & 0x1); - } - } + // create command for 4 padding + 224 bits + 4 bits address = 232 bits = 29 + // bytes + char buffer[len]; + memset(buffer, 0, len); + offset = 0; + // loop through buffer elements + for (ich = 0; ich < len; ++ich) { + // loop through each bit in buffer element + int iBit = 0; + for (iBit = 0; iBit < 8; ++iBit) { + buffer[ich] |= (commandBytes[offset++] << (8 - 1 - iBit)); + } + } - // create command for 4 padding + 224 bits + 4 bits address = 232 bits = 29 bytes - char buffer[len]; - memset(buffer, 0, len); - offset = 0; - // loop through buffer elements - for (ich = 0; ich < len; ++ich) { - // loop through each bit in buffer element - int iBit = 0; - for (iBit = 0; iBit < 8; ++iBit) { - buffer[ich] |= (commandBytes[offset++] << (8 - 1 - iBit)); - } - } + // address at the end + buffer[len - 1] |= (ASIC_CONF_ADC_ADDR); - // address at the end - buffer[len - 1] |= (ASIC_CONF_ADC_ADDR); + if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) { + return FAIL; + } - if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) { - return FAIL; - } - - return OK; + return OK; } int configureADC() { - LOG(logINFO, ("Configuring ADC \n")); + LOG(logINFO, ("Configuring ADC \n")); - int equal = 1; - { - int i = 0, j = 0; - for (i = 0; i < NADC; ++i) { - int val = adcConfiguration[0][i]; - for (j = 1; j < NCHIP; ++j) { - if (adcConfiguration[j][i] != val) { - equal = 0; - break; - } - } - } - } - if (equal) { - return configureSingleADCDriver(-1); - } else { - int i = 0; - for (i = 0; i < NCHIP; ++i) { - if (configureSingleADCDriver(i) == FAIL) { - return FAIL; - } - } - } - return OK; + int equal = 1; + { + int i = 0, j = 0; + for (i = 0; i < NADC; ++i) { + int val = adcConfiguration[0][i]; + for (j = 1; j < NCHIP; ++j) { + if (adcConfiguration[j][i] != val) { + equal = 0; + break; + } + } + } + } + if (equal) { + return configureSingleADCDriver(-1); + } else { + int i = 0; + for (i = 0; i < NCHIP; ++i) { + if (configureSingleADCDriver(i) == FAIL) { + return FAIL; + } + } + } + return OK; } -int setBurstModeinFPGA(enum burstMode value) { - uint32_t addr = ASIC_CONFIG_REG; - uint32_t runmode = 0; - switch (value) { - case BURST_OFF: - runmode = ASIC_CONFIG_RUN_MODE_CONT_VAL; - break; - case BURST_INTERNAL: - runmode = ASIC_CONFIG_RUN_MODE_INT_BURST_VAL; - break; - case BURST_EXTERNAL: - runmode = ASIC_CONFIG_RUN_MODE_EXT_BURST_VAL; - break; - default: - LOG(logERROR, ("Unknown burst mode %d\n", value)); - return FAIL; - } - LOG(logDEBUG1, ("Run mode (FPGA val): %d\n", runmode)); - bus_w(addr, bus_r(addr) &~ ASIC_CONFIG_RUN_MODE_MSK); - bus_w(addr, bus_r(addr) | ((runmode << ASIC_CONFIG_RUN_MODE_OFST) & ASIC_CONFIG_RUN_MODE_MSK)); - burstMode = value; - return OK; +int setBurstModeinFPGA(enum burstMode value) { + uint32_t addr = ASIC_CONFIG_REG; + uint32_t runmode = 0; + switch (value) { + case BURST_OFF: + runmode = ASIC_CONFIG_RUN_MODE_CONT_VAL; + break; + case BURST_INTERNAL: + runmode = ASIC_CONFIG_RUN_MODE_INT_BURST_VAL; + break; + case BURST_EXTERNAL: + runmode = ASIC_CONFIG_RUN_MODE_EXT_BURST_VAL; + break; + default: + LOG(logERROR, ("Unknown burst mode %d\n", value)); + return FAIL; + } + LOG(logDEBUG1, ("Run mode (FPGA val): %d\n", runmode)); + bus_w(addr, bus_r(addr) & ~ASIC_CONFIG_RUN_MODE_MSK); + bus_w(addr, bus_r(addr) | ((runmode << ASIC_CONFIG_RUN_MODE_OFST) & + ASIC_CONFIG_RUN_MODE_MSK)); + burstMode = value; + return OK; } -int setBurstMode(enum burstMode burst) { - LOG(logINFO, ("Setting burst mode to %s\n", burst == BURST_OFF ? "off" : (burst == BURST_INTERNAL ? "internal" : "external"))); +int setBurstMode(enum burstMode burst) { + LOG(logINFO, ("Setting burst mode to %s\n", + burst == BURST_OFF + ? "off" + : (burst == BURST_INTERNAL ? "internal" : "external"))); - // update - int64_t framesReg = 0; - int64_t periodReg = 0; - // burst - if (burstMode != BURST_OFF) { - framesReg = ((bus_r(ASIC_INT_FRAMES_REG) & ASIC_INT_FRAMES_MSK) >> ASIC_INT_FRAMES_OFST); - periodReg = get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG); - // auto - if (getTiming() == AUTO_TIMING) { - numBurstsReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - burstPeriodReg = get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); - } - } - // continuous - else { - framesReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - periodReg = get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); - } + // update + int64_t framesReg = 0; + int64_t periodReg = 0; + // burst + if (burstMode != BURST_OFF) { + framesReg = ((bus_r(ASIC_INT_FRAMES_REG) & ASIC_INT_FRAMES_MSK) >> + ASIC_INT_FRAMES_OFST); + periodReg = + get64BitReg(ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG); + // auto + if (getTiming() == AUTO_TIMING) { + numBurstsReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + burstPeriodReg = + get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); + } + } + // continuous + else { + framesReg = get64BitReg(SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + periodReg = get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); + } - if (setBurstModeinFPGA(burst) == FAIL) { - return FAIL; - } + if (setBurstModeinFPGA(burst) == FAIL) { + return FAIL; + } - LOG(logINFO, ("\tUpdating registers\n")); - // continuous - if (burstMode == BURST_OFF) { - set64BitReg(framesReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - set64BitReg(periodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); - LOG(logINFO, ("\tFrames reg: %lld, Period reg: %lldns\n", getNumFrames(), getPeriod())); + LOG(logINFO, ("\tUpdating registers\n")); + // continuous + if (burstMode == BURST_OFF) { + set64BitReg(framesReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + set64BitReg(periodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); + LOG(logINFO, ("\tFrames reg: %lld, Period reg: %lldns\n", + getNumFrames(), getPeriod())); - LOG(logINFO, ("\tInt. Frame reg: 1, Int. Period reg: 0\n")) - bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) &~ ASIC_INT_FRAMES_MSK); - bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) | ((1 << ASIC_INT_FRAMES_OFST) & ASIC_INT_FRAMES_MSK)); - set64BitReg(0, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG); - } - // burst - else { - bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) &~ ASIC_INT_FRAMES_MSK); - bus_w(ASIC_INT_FRAMES_REG, bus_r(ASIC_INT_FRAMES_REG) | (((int)framesReg << ASIC_INT_FRAMES_OFST) & ASIC_INT_FRAMES_MSK)); - set64BitReg(periodReg, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG); - LOG(logINFO, ("\tInt. Frames reg: %lld, Int. Period reg: %lldns\n", getNumFrames(), getPeriod())); + LOG(logINFO, ("\tInt. Frame reg: 1, Int. Period reg: 0\n")) + bus_w(ASIC_INT_FRAMES_REG, + bus_r(ASIC_INT_FRAMES_REG) & ~ASIC_INT_FRAMES_MSK); + bus_w(ASIC_INT_FRAMES_REG, + bus_r(ASIC_INT_FRAMES_REG) | + ((1 << ASIC_INT_FRAMES_OFST) & ASIC_INT_FRAMES_MSK)); + set64BitReg(0, ASIC_INT_PERIOD_LSB_REG, ASIC_INT_PERIOD_MSB_REG); + } + // burst + else { + bus_w(ASIC_INT_FRAMES_REG, + bus_r(ASIC_INT_FRAMES_REG) & ~ASIC_INT_FRAMES_MSK); + bus_w(ASIC_INT_FRAMES_REG, + bus_r(ASIC_INT_FRAMES_REG) | + (((int)framesReg << ASIC_INT_FRAMES_OFST) & + ASIC_INT_FRAMES_MSK)); + set64BitReg(periodReg, ASIC_INT_PERIOD_LSB_REG, + ASIC_INT_PERIOD_MSB_REG); + LOG(logINFO, ("\tInt. Frames reg: %lld, Int. Period reg: %lldns\n", + getNumFrames(), getPeriod())); - // trigger - if (getTiming() == TRIGGER_EXPOSURE) { - LOG(logINFO, ("\tFrame reg: 1, Period reg: 0\n")) - set64BitReg(1, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - set64BitReg(0, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); - } - //auto - else { - set64BitReg(numBurstsReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); - set64BitReg(burstPeriodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); - LOG(logINFO, ("\tFrames reg (bursts): %lld, Period reg(burst period): %lldns\n", getNumBursts(), getBurstPeriod())); - } - } - LOG(logINFO, ("\tDone Updating registers\n")) + // trigger + if (getTiming() == TRIGGER_EXPOSURE) { + LOG(logINFO, ("\tFrame reg: 1, Period reg: 0\n")) + set64BitReg(1, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + set64BitReg(0, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); + } + // auto + else { + set64BitReg(numBurstsReg, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + set64BitReg(burstPeriodReg, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); + LOG(logINFO, ("\tFrames reg (bursts): %lld, Period reg(burst " + "period): %lldns\n", + getNumBursts(), getBurstPeriod())); + } + } + LOG(logINFO, ("\tDone Updating registers\n")) - LOG(logINFO, ("\tSetting %s Mode in Chip\n", burstMode == BURST_OFF ? "Continuous" : "Burst")); - int value = burstMode ? ASIC_GLOBAL_BURST_VALUE : ASIC_GLOBAL_CONT_VALUE; + LOG(logINFO, ("\tSetting %s Mode in Chip\n", + burstMode == BURST_OFF ? "Continuous" : "Burst")); + int value = burstMode ? ASIC_GLOBAL_BURST_VALUE : ASIC_GLOBAL_CONT_VALUE; - const int padding = 6; // due to address (4) to make it byte aligned - const int lenTotalBits = padding + ASIC_GLOBAL_SETT_MAX_BITS + ASIC_ADDR_MAX_BITS; // 4 + 6 + 4 = 16 - const int len = lenTotalBits / 8; // 2 + const int padding = 6; // due to address (4) to make it byte aligned + const int lenTotalBits = padding + ASIC_GLOBAL_SETT_MAX_BITS + + ASIC_ADDR_MAX_BITS; // 4 + 6 + 4 = 16 + const int len = lenTotalBits / 8; // 2 - // assign each bit into 4 + 224 into byte array - uint8_t commandBytes[lenTotalBits]; - memset(commandBytes, 0, sizeof(commandBytes)); - int offset = padding; // bit offset for commandbytes - int ich = 0; - // loop through all bits in a value - int iBit = 0; - for (iBit = 0; iBit < ASIC_GLOBAL_SETT_MAX_BITS; ++iBit) { - commandBytes[offset++] = ((value >> (ASIC_GLOBAL_SETT_MAX_BITS - 1 - iBit)) & 0x1); - } + // assign each bit into 4 + 224 into byte array + uint8_t commandBytes[lenTotalBits]; + memset(commandBytes, 0, sizeof(commandBytes)); + int offset = padding; // bit offset for commandbytes + int ich = 0; + // loop through all bits in a value + int iBit = 0; + for (iBit = 0; iBit < ASIC_GLOBAL_SETT_MAX_BITS; ++iBit) { + commandBytes[offset++] = + ((value >> (ASIC_GLOBAL_SETT_MAX_BITS - 1 - iBit)) & 0x1); + } - // create command for 4 padding + 224 bits + 4 bits address = 232 bits = 29 bytes - char buffer[len]; - memset(buffer, 0, len); - offset = 0; - // loop through buffer elements - for (ich = 0; ich < len; ++ich) { - // loop through each bit in buffer element - int iBit = 0; - for (iBit = 0; iBit < 8; ++iBit) { - buffer[ich] |= (commandBytes[offset++] << (8 - 1 - iBit)); - } - } + // create command for 4 padding + 224 bits + 4 bits address = 232 bits = 29 + // bytes + char buffer[len]; + memset(buffer, 0, len); + offset = 0; + // loop through buffer elements + for (ich = 0; ich < len; ++ich) { + // loop through each bit in buffer element + int iBit = 0; + for (iBit = 0; iBit < 8; ++iBit) { + buffer[ich] |= (commandBytes[offset++] << (8 - 1 - iBit)); + } + } - // address at the end - buffer[len - 1] |= (ASIC_CONF_GLOBAL_SETT); + // address at the end + buffer[len - 1] |= (ASIC_CONF_GLOBAL_SETT); - int chipIndex = -1; - if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) { - return FAIL; - } + int chipIndex = -1; + if (ASIC_Driver_Set(chipIndex, sizeof(buffer), buffer) == FAIL) { + return FAIL; + } - return configureADC(); + return configureADC(); } enum burstMode getBurstMode() { - uint32_t addr = ASIC_CONFIG_REG; - int runmode = bus_r (addr) & ASIC_CONFIG_RUN_MODE_MSK; - switch (runmode) { - case ASIC_CONFIG_RUN_MODE_CONT_VAL: - burstMode = BURST_OFF; - break; - case ASIC_CONFIG_RUN_MODE_INT_BURST_VAL: - burstMode = BURST_INTERNAL; - break; - case ASIC_CONFIG_RUN_MODE_EXT_BURST_VAL: - burstMode = BURST_EXTERNAL; - break; - default: - LOG(logERROR, ("Unknown run mode read from FPGA %d\n", runmode)); - return -1; - } - return burstMode; + uint32_t addr = ASIC_CONFIG_REG; + int runmode = bus_r(addr) & ASIC_CONFIG_RUN_MODE_MSK; + switch (runmode) { + case ASIC_CONFIG_RUN_MODE_CONT_VAL: + burstMode = BURST_OFF; + break; + case ASIC_CONFIG_RUN_MODE_INT_BURST_VAL: + burstMode = BURST_INTERNAL; + break; + case ASIC_CONFIG_RUN_MODE_EXT_BURST_VAL: + burstMode = BURST_EXTERNAL; + break; + default: + LOG(logERROR, ("Unknown run mode read from FPGA %d\n", runmode)); + return -1; + } + return burstMode; } void setCurrentSource(int value) { - uint32_t addr = ASIC_CONFIG_REG; - if (value > 0) { - bus_w(addr, (bus_r(addr) | ASIC_CONFIG_CURRENT_SRC_EN_MSK)); - } else if (value == 0) { - bus_w(addr, (bus_r(addr) &~ ASIC_CONFIG_CURRENT_SRC_EN_MSK)); - } + uint32_t addr = ASIC_CONFIG_REG; + if (value > 0) { + bus_w(addr, (bus_r(addr) | ASIC_CONFIG_CURRENT_SRC_EN_MSK)); + } else if (value == 0) { + bus_w(addr, (bus_r(addr) & ~ASIC_CONFIG_CURRENT_SRC_EN_MSK)); + } } -int getCurrentSource() { - return ((bus_r(ASIC_CONFIG_REG) & ASIC_CONFIG_CURRENT_SRC_EN_MSK) >> ASIC_CONFIG_CURRENT_SRC_EN_OFST); +int getCurrentSource() { + return ((bus_r(ASIC_CONFIG_REG) & ASIC_CONFIG_CURRENT_SRC_EN_MSK) >> + ASIC_CONFIG_CURRENT_SRC_EN_OFST); } void setTimingSource(enum timingSourceType value) { - uint32_t addr = CONTROL_REG; - switch (value) { - case TIMING_INTERNAL: - LOG(logINFO, ("Setting timing source to internal\n")); - bus_w(addr, (bus_r(addr) &~ CONTROL_TIMING_SOURCE_EXT_MSK)); - systemFrequency = INT_SYSTEM_C0_FREQUENCY; - break; - case TIMING_EXTERNAL: - LOG(logINFO, ("Setting timing source to exernal\n")); - bus_w(addr, (bus_r(addr) | CONTROL_TIMING_SOURCE_EXT_MSK)); - systemFrequency = ((double)getVCOFrequency(SYSTEM_C0) / (double)clkDivider[SYSTEM_C0]); - break; - default: - LOG(logERROR, ("Unknown timing source %d\n", value)); - break; - } + uint32_t addr = CONTROL_REG; + switch (value) { + case TIMING_INTERNAL: + LOG(logINFO, ("Setting timing source to internal\n")); + bus_w(addr, (bus_r(addr) & ~CONTROL_TIMING_SOURCE_EXT_MSK)); + systemFrequency = INT_SYSTEM_C0_FREQUENCY; + break; + case TIMING_EXTERNAL: + LOG(logINFO, ("Setting timing source to exernal\n")); + bus_w(addr, (bus_r(addr) | CONTROL_TIMING_SOURCE_EXT_MSK)); + systemFrequency = ((double)getVCOFrequency(SYSTEM_C0) / + (double)clkDivider[SYSTEM_C0]); + break; + default: + LOG(logERROR, ("Unknown timing source %d\n", value)); + break; + } } enum timingSourceType getTimingSource() { - if (bus_r(CONTROL_REG) & CONTROL_TIMING_SOURCE_EXT_MSK) { - return TIMING_EXTERNAL; - } - return TIMING_INTERNAL; + if (bus_r(CONTROL_REG) & CONTROL_TIMING_SOURCE_EXT_MSK) { + return TIMING_EXTERNAL; + } + return TIMING_INTERNAL; } - - /* aquisition */ -int startStateMachine(){ +int startStateMachine() { #ifdef VIRTUAL - // create udp socket - if(createUDPSocket(0) != OK) { - return FAIL; - } - LOG(logINFOBLUE, ("Starting State Machine\n")); - // set status to running - virtual_status = 1; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - virtual_stop = ComVirtual_getStop(); - if (virtual_stop != 0) { - LOG(logERROR, ("Cant start acquisition. " - "Stop server has not updated stop status to 0\n")); - return FAIL; - } - } - if(pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { - LOG(logERROR, ("Could not start Virtual acquisition thread\n")); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - return FAIL; - } - LOG(logINFOGREEN, ("Virtual Acquisition started\n")); - return OK; + // create udp socket + if (createUDPSocket(0) != OK) { + return FAIL; + } + LOG(logINFOBLUE, ("Starting State Machine\n")); + // set status to running + virtual_status = 1; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + virtual_stop = ComVirtual_getStop(); + if (virtual_stop != 0) { + LOG(logERROR, ("Cant start acquisition. " + "Stop server has not updated stop status to 0\n")); + return FAIL; + } + } + if (pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { + LOG(logERROR, ("Could not start Virtual acquisition thread\n")); + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + return FAIL; + } + LOG(logINFOGREEN, ("Virtual Acquisition started\n")); + return OK; #endif - LOG(logINFOBLUE, ("Starting State Machine\n")); - cleanFifos(); - - //start state machine - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK); + LOG(logINFOBLUE, ("Starting State Machine\n")); + cleanFifos(); - LOG(logINFO, ("Status Register: %08x\n",bus_r(STATUS_REG))); + // start state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK); + + LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); return OK; } - #ifdef VIRTUAL -void* start_timer(void* arg) { - if (!isControlServer) { - return NULL; - } +void *start_timer(void *arg) { + if (!isControlServer) { + return NULL; + } - int numRepeats = getNumTriggers(); - if (getTiming() == AUTO_TIMING) { - if (burstMode == BURST_OFF) { - numRepeats = 1; - } else { - numRepeats = getNumBursts(); - } - } - int repeatPeriodNs = getBurstPeriod(); - int numFrames = getNumFrames(); - int64_t periodNs = getPeriod(); - int64_t expUs = getExpTime() / 1000; - int imagesize = NCHAN * NCHIP * 2; - int datasize = imagesize; - int packetsize = datasize + sizeof(sls_detector_header); + int numRepeats = getNumTriggers(); + if (getTiming() == AUTO_TIMING) { + if (burstMode == BURST_OFF) { + numRepeats = 1; + } else { + numRepeats = getNumBursts(); + } + } + int repeatPeriodNs = getBurstPeriod(); + int numFrames = getNumFrames(); + int64_t periodNs = getPeriod(); + int64_t expUs = getExpTime() / 1000; + int imagesize = NCHAN * NCHIP * 2; + int datasize = imagesize; + int packetsize = datasize + sizeof(sls_detector_header); - // Generate data - char imageData[imagesize]; - memset(imageData, 0, imagesize); - { - int i = 0; - for (i = 0; i < imagesize; i += sizeof(uint16_t)) { - *((uint16_t*)(imageData + i)) = i; - } - } + // Generate data + char imageData[imagesize]; + memset(imageData, 0, imagesize); + { + int i = 0; + for (i = 0; i < imagesize; i += sizeof(uint16_t)) { + *((uint16_t *)(imageData + i)) = i; + } + } - { - int repeatNr = 0; - int frameHeaderNr = 0; - // loop over number of repeats - for(repeatNr=0; repeatNr!= numRepeats; ++repeatNr ) { + { + int repeatNr = 0; + int frameHeaderNr = 0; + // loop over number of repeats + for (repeatNr = 0; repeatNr != numRepeats; ++repeatNr) { - struct timespec rbegin, rend; - clock_gettime(CLOCK_REALTIME, &rbegin); + struct timespec rbegin, rend; + clock_gettime(CLOCK_REALTIME, &rbegin); - int frameNr = 0; - // loop over number of frames - for(frameNr = 0; frameNr != numFrames; ++frameNr ) { - - // update the virtual stop from stop server - virtual_stop = ComVirtual_getStop(); - //check if virtual_stop is high - if(virtual_stop == 1){ - break; - } + int frameNr = 0; + // loop over number of frames + for (frameNr = 0; frameNr != numFrames; ++frameNr) { - // sleep for exposure time - struct timespec begin, end; - clock_gettime(CLOCK_REALTIME, &begin); - usleep(expUs); + // update the virtual stop from stop server + virtual_stop = ComVirtual_getStop(); + // check if virtual_stop is high + if (virtual_stop == 1) { + break; + } - char packetData[packetsize]; - memset(packetData, 0, packetsize); - // set header - sls_detector_header* header = (sls_detector_header*)(packetData); - header->detType = (uint16_t)myDetectorType; - header->version = SLS_DETECTOR_HEADER_VERSION - 1; - header->frameNumber = frameHeaderNr; - ++frameHeaderNr; - header->packetNumber = 0; - header->modId = 0; - header->row = detPos[X]; - header->column = detPos[Y]; + // sleep for exposure time + struct timespec begin, end; + clock_gettime(CLOCK_REALTIME, &begin); + usleep(expUs); - // fill data - memcpy(packetData + sizeof(sls_detector_header), imageData, datasize) ; + char packetData[packetsize]; + memset(packetData, 0, packetsize); + // set header + sls_detector_header *header = + (sls_detector_header *)(packetData); + header->detType = (uint16_t)myDetectorType; + header->version = SLS_DETECTOR_HEADER_VERSION - 1; + header->frameNumber = frameHeaderNr; + ++frameHeaderNr; + header->packetNumber = 0; + header->modId = 0; + header->row = detPos[X]; + header->column = detPos[Y]; - // send 1 packet = 1 frame - sendUDPPacket(0, packetData, packetsize); + // fill data + memcpy(packetData + sizeof(sls_detector_header), imageData, + datasize); - clock_gettime(CLOCK_REALTIME, &end); - LOG(logINFO, ("Sent frame: %d (bursts: %d)\n", frameNr, repeatNr)); - int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 + - (end.tv_nsec - begin.tv_nsec)); + // send 1 packet = 1 frame + sendUDPPacket(0, packetData, packetsize); - // sleep for (period - exptime) - if (frameNr < numFrames) { // if there is a next frame - if (periodNs > timeNs) { - usleep((periodNs - timeNs)/ 1000); - } - } - } - clock_gettime(CLOCK_REALTIME, &rend); - int64_t timeNs = ((rend.tv_sec - rbegin.tv_sec) * 1E9 + - (rend.tv_nsec - rbegin.tv_nsec)); + clock_gettime(CLOCK_REALTIME, &end); + LOG(logINFO, + ("Sent frame: %d (bursts: %d)\n", frameNr, repeatNr)); + int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 + + (end.tv_nsec - begin.tv_nsec)); - // sleep for (repeatPeriodNs - time remaining) - if (repeatNr < numRepeats) { // if there is a next repeat - if (repeatPeriodNs > timeNs) { - usleep((repeatPeriodNs - timeNs)/ 1000); - } - } + // sleep for (period - exptime) + if (frameNr < numFrames) { // if there is a next frame + if (periodNs > timeNs) { + usleep((periodNs - timeNs) / 1000); + } + } + } + clock_gettime(CLOCK_REALTIME, &rend); + int64_t timeNs = ((rend.tv_sec - rbegin.tv_sec) * 1E9 + + (rend.tv_nsec - rbegin.tv_nsec)); - } - } + // sleep for (repeatPeriodNs - time remaining) + if (repeatNr < numRepeats) { // if there is a next repeat + if (repeatPeriodNs > timeNs) { + usleep((repeatPeriodNs - timeNs) / 1000); + } + } + } + } - closeUDPSocket(0); + closeUDPSocket(0); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - LOG(logINFOBLUE, ("Finished Acquiring\n")); - return NULL; + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + LOG(logINFOBLUE, ("Finished Acquiring\n")); + return NULL; } #endif - -int stopStateMachine(){ - LOG(logINFORED, ("Stopping State Machine\n")); +int stopStateMachine() { + LOG(logINFORED, ("Stopping State Machine\n")); #ifdef VIRTUAL - if (!isControlServer) { - virtual_stop = 1; - ComVirtual_setStop(virtual_stop); - // read till status is idle - int tempStatus = 1; - while(tempStatus == 1) { - tempStatus = ComVirtual_getStatus(); - } - virtual_stop = 0; - ComVirtual_setStop(virtual_stop); - LOG(logINFO, ("Stopped State Machine\n")); - } - return OK; + if (!isControlServer) { + virtual_stop = 1; + ComVirtual_setStop(virtual_stop); + // read till status is idle + int tempStatus = 1; + while (tempStatus == 1) { + tempStatus = ComVirtual_getStatus(); + } + virtual_stop = 0; + ComVirtual_setStop(virtual_stop); + LOG(logINFO, ("Stopped State Machine\n")); + } + return OK; #endif - //stop state machine - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STP_ACQSTN_MSK); - LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); + // stop state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STP_ACQSTN_MSK); + LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); return OK; } -enum runStatus getRunStatus(){ +enum runStatus getRunStatus() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } - if(virtual_status == 0) { - LOG(logINFOBLUE, ("Status: IDLE\n")); - return IDLE; - }else{ - LOG(logINFOBLUE, ("Status: RUNNING\n")); - return RUNNING; - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } + if (virtual_status == 0) { + LOG(logINFOBLUE, ("Status: IDLE\n")); + return IDLE; + } else { + LOG(logINFOBLUE, ("Status: RUNNING\n")); + return RUNNING; + } #endif - LOG(logDEBUG1, ("Getting status\n")); - uint32_t retval = bus_r(FLOW_STATUS_REG); - LOG(logINFO, ("Status Register: %08x\n",retval)); + LOG(logDEBUG1, ("Getting status\n")); + uint32_t retval = bus_r(FLOW_STATUS_REG); + LOG(logINFO, ("Status Register: %08x\n", retval)); - enum runStatus s; + enum runStatus s; - //running - if (retval & FLOW_STATUS_RUN_BUSY_MSK) { - if (retval & FLOW_STATUS_WAIT_FOR_TRGGR_MSK) { - LOG(logINFOBLUE, ("Status: WAITING\n")); - s = WAITING; - } else { - if (retval & FLOW_STATUS_DLY_BFRE_TRGGR_MSK) { - LOG(logINFO, ("Status: Delay before Trigger\n")); - } else if (retval & FLOW_STATUS_DLY_AFTR_TRGGR_MSK) { - LOG(logINFO, ("Status: Delay after Trigger\n")); - } - LOG(logINFOBLUE, ("Status: RUNNING\n")); - s = RUNNING; - } - } + // running + if (retval & FLOW_STATUS_RUN_BUSY_MSK) { + if (retval & FLOW_STATUS_WAIT_FOR_TRGGR_MSK) { + LOG(logINFOBLUE, ("Status: WAITING\n")); + s = WAITING; + } else { + if (retval & FLOW_STATUS_DLY_BFRE_TRGGR_MSK) { + LOG(logINFO, ("Status: Delay before Trigger\n")); + } else if (retval & FLOW_STATUS_DLY_AFTR_TRGGR_MSK) { + LOG(logINFO, ("Status: Delay after Trigger\n")); + } + LOG(logINFOBLUE, ("Status: RUNNING\n")); + s = RUNNING; + } + } - //not running - else { - // stopped or error - if (retval & FLOW_STATUS_FIFO_FULL_MSK) { - LOG(logINFOBLUE, ("Status: STOPPED\n")); //FIFO FULL?? - s = STOPPED; - } else if (retval & FLOW_STATUS_CSM_BUSY_MSK) { - LOG(logINFOBLUE, ("Status: READ MACHINE BUSY\n")); - s = TRANSMITTING; - } else if (!retval) { - LOG(logINFOBLUE, ("Status: IDLE\n")); - s = IDLE; - } else { - LOG(logERROR, ("Status: Unknown status %08x\n", retval)); - s = ERROR; - } - } + // not running + else { + // stopped or error + if (retval & FLOW_STATUS_FIFO_FULL_MSK) { + LOG(logINFOBLUE, ("Status: STOPPED\n")); // FIFO FULL?? + s = STOPPED; + } else if (retval & FLOW_STATUS_CSM_BUSY_MSK) { + LOG(logINFOBLUE, ("Status: READ MACHINE BUSY\n")); + s = TRANSMITTING; + } else if (!retval) { + LOG(logINFOBLUE, ("Status: IDLE\n")); + s = IDLE; + } else { + LOG(logERROR, ("Status: Unknown status %08x\n", retval)); + s = ERROR; + } + } - return s; + return s; } void readFrame(int *ret, char *mess) { - // wait for status to be done - while(runBusy()){ - usleep(500); - } + // wait for status to be done + while (runBusy()) { + usleep(500); + } #ifdef VIRTUAL - LOG(logINFOGREEN, ("acquisition successfully finished\n")); - return; + LOG(logINFOGREEN, ("acquisition successfully finished\n")); + return; #endif - *ret = (int)OK; - // frames left to give status - int64_t retval = getNumFramesLeft() + 1; + *ret = (int)OK; + // frames left to give status + int64_t retval = getNumFramesLeft() + 1; - if ( retval > 0) { - LOG(logERROR, ("No data and run stopped: %lld frames left\n",(long long int)retval)); - } else { - LOG(logINFOGREEN, ("Acquisition successfully finished\n")); - } + if (retval > 0) { + LOG(logERROR, ("No data and run stopped: %lld frames left\n", + (long long int)retval)); + } else { + LOG(logINFOGREEN, ("Acquisition successfully finished\n")); + } } u_int32_t runBusy() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } return virtual_status; #endif - u_int32_t s = (bus_r(FLOW_STATUS_REG) & FLOW_STATUS_RUN_BUSY_MSK); - //LOG(logDEBUG1, ("Status Register: %08x\n", s)); - return s; + u_int32_t s = (bus_r(FLOW_STATUS_REG) & FLOW_STATUS_RUN_BUSY_MSK); + // LOG(logDEBUG1, ("Status Register: %08x\n", s)); + return s; } - - /* common */ -int calculateDataBytes() { - return getTotalNumberOfChannels() * DYNAMIC_RANGE; -} +int calculateDataBytes() { return getTotalNumberOfChannels() * DYNAMIC_RANGE; } -int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());} -int getNumberOfChips() {return NCHIP;} -int getNumberOfDACs() {return NDAC;} -int getNumberOfChannelsPerChip() {return NCHAN;} \ No newline at end of file +int getTotalNumberOfChannels() { + return (getNumberOfChannelsPerChip() * getNumberOfChips()); +} +int getNumberOfChips() { return NCHIP; } +int getNumberOfDACs() { return NDAC; } +int getNumberOfChannelsPerChip() { return NCHAN; } \ No newline at end of file diff --git a/slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c old mode 100755 new mode 100644 index 9f5349b4b..c03ace696 --- a/slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c @@ -1,17 +1,17 @@ #include "slsDetectorFunctionList.h" -#include "versionAPI.h" -#include "clogger.h" #include "RegisterDefs.h" +#include "clogger.h" +#include "versionAPI.h" -#include "LTC2620.h" // dacs +#include "LTC2620.h" // dacs #ifdef VIRTUAL #include "communication_funcs_UDP.h" #include "communication_virtual.h" #endif #include "string.h" -#include // usleep #include +#include // usleep #ifdef VIRTUAL #include #include @@ -25,8 +25,8 @@ int phaseShift = DEFAULT_PHASE_SHIFT; // Global variable from communication_funcs.c extern int isControlServer; -extern void getMacAddressinString(char* cmac, int size, uint64_t mac); -extern void getIpAddressinString(char* cip, uint32_t ip); +extern void getMacAddressinString(char *cmac, int size, uint64_t mac); +extern void getIpAddressinString(char *cip, uint32_t ip); int initError = OK; int initCheckDone = 0; @@ -61,13 +61,11 @@ int slaveadcphase = 0; int rsttosw1delay = 2; int startacqdelay = 1; -int isInitCheckDone() { - return initCheckDone; -} +int isInitCheckDone() { return initCheckDone; } -int getInitResult(char** mess) { - *mess = initErrorMessage; - return initError; +int getInitResult(char **mess) { + *mess = initErrorMessage; + return initError; } void basictests() { @@ -77,58 +75,57 @@ void basictests() { #ifdef VIRTUAL LOG(logINFOBLUE, ("******** Gotthard Virtual Server *****************\n")); if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; } return; #else if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; } // does check only if flag is 0 (by default), set by command line - if (((checkType() == FAIL) || (testFpga() == FAIL) || (testBus() == FAIL))) { - strcpy(initErrorMessage, - "Could not pass basic tests of FPGA and bus. Dangerous to continue.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; - } + if (((checkType() == FAIL) || (testFpga() == FAIL) || + (testBus() == FAIL))) { + strcpy(initErrorMessage, "Could not pass basic tests of FPGA and bus. " + "Dangerous to continue.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; + } - uint32_t boardrev = getBoardRevision(); - uint32_t ipadd = getDetectorIP(); - uint64_t macadd = getDetectorMAC(); - int64_t fwversion = getFirmwareVersion(); - int64_t swversion = getServerVersion(); - int64_t client_sw_apiversion = getClientServerAPIVersion(); + uint32_t boardrev = getBoardRevision(); + uint32_t ipadd = getDetectorIP(); + uint64_t macadd = getDetectorMAC(); + int64_t fwversion = getFirmwareVersion(); + int64_t swversion = getServerVersion(); + int64_t client_sw_apiversion = getClientServerAPIVersion(); - LOG(logINFOBLUE, ("************ Gotthard Server *********************\n" - "Board Revision : 0x%x\n" + LOG(logINFOBLUE, + ("************ Gotthard Server *********************\n" + "Board Revision : 0x%x\n" - "Detector IP Addr : 0x%x\n" - "Detector MAC Addr : 0x%llx\n\n" + "Detector IP Addr : 0x%x\n" + "Detector MAC Addr : 0x%llx\n\n" - "Firmware Version : 0x%llx\n" - "Software Version : 0x%llx\n" - "Client-S/w API Version : 0x%llx\n" - "********************************************************\n", - boardrev, + "Firmware Version : 0x%llx\n" + "Software Version : 0x%llx\n" + "Client-S/w API Version : 0x%llx\n" + "********************************************************\n", + boardrev, - ipadd, - (long long unsigned int)macadd, + ipadd, (long long unsigned int)macadd, - (long long int)fwversion, - (long long int)swversion, - (long long int)client_sw_apiversion - )); + (long long int)fwversion, (long long int)swversion, + (long long int)client_sw_apiversion)); - LOG(logINFO, ("Basic Tests - success\n")); + LOG(logINFO, ("Basic Tests - success\n")); #endif } @@ -136,125 +133,129 @@ int checkType() { #ifdef VIRTUAL return OK; #endif - u_int32_t type = ((bus_r(BOARD_REVISION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); - if (type == DETECTOR_TYPE_MOENCH_VAL){ - LOG(logERROR, ("This is not a Gotthard firmware (read %d, expected ?)\n", type)); - return FAIL; - } - return OK; + u_int32_t type = + ((bus_r(BOARD_REVISION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); + if (type == DETECTOR_TYPE_MOENCH_VAL) { + LOG(logERROR, + ("This is not a Gotthard firmware (read %d, expected ?)\n", type)); + return FAIL; + } + return OK; } int testFpga() { #ifdef VIRTUAL return OK; #endif - LOG(logINFO, ("Testing FPGA:\n")); + LOG(logINFO, ("Testing FPGA:\n")); - //fixed pattern - int ret = OK; - u_int32_t val = bus_r(FIX_PATT_REG); - if (val == FIX_PATT_VAL) { - LOG(logINFO, ("Fixed pattern: successful match (0x%08x)\n",val)); - } else { - LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL)); - ret = FAIL; - } + // fixed pattern + int ret = OK; + u_int32_t val = bus_r(FIX_PATT_REG); + if (val == FIX_PATT_VAL) { + LOG(logINFO, ("Fixed pattern: successful match (0x%08x)\n", val)); + } else { + LOG(logERROR, + ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", + val, FIX_PATT_VAL)); + ret = FAIL; + } - if (ret == OK) { - // dummy reg - LOG(logINFO, ("\tTesting Dummy Register:\n")); - u_int32_t addr = DUMMY_REG; - volatile u_int32_t val = 0, readval = 0; - int times = 1000 * 1000; - int i = 0; - for (i = 0; i < times; ++i) { - val = 0x5A5A5A5A - i; - bus_w(addr, val); - readval = bus_r(addr); - if (readval != val) { - LOG(logERROR, ("1:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); - ret = FAIL; - break; - } - val = (i + (i << 10) + (i << 20)); - bus_w(addr, val); - readval = bus_r(addr); - if (readval != val) { - LOG(logERROR, ("2:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); - ret = FAIL; - break; - } - val = 0x0F0F0F0F; - bus_w(addr, val); - readval = bus_r(addr); - if (readval != val) { - LOG(logERROR, ("3:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); - ret = FAIL; - break; - } - val = 0xF0F0F0F0; - bus_w(addr, val); - readval = bus_r(addr); - if (readval != val) { - LOG(logERROR, ("4:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); - ret = FAIL; - break; - } - } - bus_w(addr, 0); - if (ret == OK) { - LOG(logINFO, ("Successfully tested FPGA Dummy Register %d times\n", times)); - } - } + if (ret == OK) { + // dummy reg + LOG(logINFO, ("\tTesting Dummy Register:\n")); + u_int32_t addr = DUMMY_REG; + volatile u_int32_t val = 0, readval = 0; + int times = 1000 * 1000; + int i = 0; + for (i = 0; i < times; ++i) { + val = 0x5A5A5A5A - i; + bus_w(addr, val); + readval = bus_r(addr); + if (readval != val) { + LOG(logERROR, ("1:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", + i, val, readval)); + ret = FAIL; + break; + } + val = (i + (i << 10) + (i << 20)); + bus_w(addr, val); + readval = bus_r(addr); + if (readval != val) { + LOG(logERROR, ("2:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", + i, val, readval)); + ret = FAIL; + break; + } + val = 0x0F0F0F0F; + bus_w(addr, val); + readval = bus_r(addr); + if (readval != val) { + LOG(logERROR, ("3:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", + i, val, readval)); + ret = FAIL; + break; + } + val = 0xF0F0F0F0; + bus_w(addr, val); + readval = bus_r(addr); + if (readval != val) { + LOG(logERROR, ("4:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", + i, val, readval)); + ret = FAIL; + break; + } + } + bus_w(addr, 0); + if (ret == OK) { + LOG(logINFO, + ("Successfully tested FPGA Dummy Register %d times\n", times)); + } + } - return ret; + return ret; } int testBus() { #ifdef VIRTUAL return OK; #endif - LOG(logINFO, ("Testing Bus:\n")); + LOG(logINFO, ("Testing Bus:\n")); - int ret = OK; - u_int32_t addr = DUMMY_REG; - volatile u_int32_t val = 0, readval = 0; - int times = 1000 * 1000; - int i = 0; + int ret = OK; + u_int32_t addr = DUMMY_REG; + volatile u_int32_t val = 0, readval = 0; + int times = 1000 * 1000; + int i = 0; - for (i = 0; i < times; ++i) { - val += 0xbbbbb; - bus_w(addr, val); - readval = bus_r(addr); - if (readval != val) { - LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); - ret = FAIL; - } - } + for (i = 0; i < times; ++i) { + val += 0xbbbbb; + bus_w(addr, val); + readval = bus_r(addr); + if (readval != val) { + LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", i, + val, readval)); + ret = FAIL; + } + } - bus_w(addr, 0); + bus_w(addr, 0); - if (ret == OK) { - LOG(logINFO, ("Successfully tested bus %d times\n", times)); - } - return ret; + if (ret == OK) { + LOG(logINFO, ("Successfully tested bus %d times\n", times)); + } + return ret; } - void setTestImageMode(int ival) { uint32_t addr = MULTI_PURPOSE_REG; if (ival >= 0) { if (ival == 0) { LOG(logINFO, ("Switching off Image Test Mode\n")); - bus_w (addr, bus_r(addr) & ~DGTL_TST_MSK); + bus_w(addr, bus_r(addr) & ~DGTL_TST_MSK); } else { LOG(logINFO, ("Switching on Image Test Mode\n")); - bus_w (addr, bus_r(addr) | DGTL_TST_MSK); + bus_w(addr, bus_r(addr) | DGTL_TST_MSK); } } } @@ -265,13 +266,9 @@ int getTestImageMode() { /* Ids */ -uint64_t getServerVersion() { - return APIGOTTHARD; -} +uint64_t getServerVersion() { return APIGOTTHARD; } -uint64_t getClientServerAPIVersion() { - return APIGOTTHARD; -} +uint64_t getClientServerAPIVersion() { return APIGOTTHARD; } u_int64_t getFirmwareVersion() { #ifdef VIRTUAL @@ -280,101 +277,104 @@ u_int64_t getFirmwareVersion() { return ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_MSK) >> FPGA_VERSION_OFST); } -u_int32_t getDetectorNumber(){ +u_int32_t getDetectorNumber() { #ifdef VIRTUAL return 0; #endif - return 0; + return 0; } -u_int64_t getDetectorMAC() { +u_int64_t getDetectorMAC() { #ifdef VIRTUAL return 0; #else - char output[255],mac[255]=""; - u_int64_t res=0; - FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - //getting rid of ":" - char * pch; - pch = strtok (output,":"); - while (pch != NULL){ - strcat(mac,pch); - pch = strtok (NULL, ":"); - } - sscanf(mac,"%llx",&res); - return res; + char output[255], mac[255] = ""; + u_int64_t res = 0; + FILE *sysFile = + popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + // getting rid of ":" + char *pch; + pch = strtok(output, ":"); + while (pch != NULL) { + strcat(mac, pch); + pch = strtok(NULL, ":"); + } + sscanf(mac, "%llx", &res); + return res; #endif } -u_int32_t getDetectorIP(){ +u_int32_t getDetectorIP() { #ifdef VIRTUAL return 0; #endif - char temp[50]=""; - u_int32_t res=0; - //execute and get address - char output[255]; - FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); + char temp[50] = ""; + u_int32_t res = 0; + // execute and get address + char output[255]; + FILE *sysFile = popen( + "ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", + "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); - //converting IPaddress to hex. - char* pcword = strtok (output,"."); - while (pcword != NULL) { - sprintf(output,"%02x",atoi(pcword)); - strcat(temp,output); - pcword = strtok (NULL, "."); - } - strcpy(output,temp); - sscanf(output, "%x", &res); - //LOG(logINFO, ("ip:%x\n",res); + // converting IPaddress to hex. + char *pcword = strtok(output, "."); + while (pcword != NULL) { + sprintf(output, "%02x", atoi(pcword)); + strcat(temp, output); + pcword = strtok(NULL, "."); + } + strcpy(output, temp); + sscanf(output, "%x", &res); + // LOG(logINFO, ("ip:%x\n",res); - return res; + return res; } u_int32_t getBoardRevision() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(BOARD_REVISION_REG) & BOARD_REVISION_MSK) >> BOARD_REVISION_OFST); + return ((bus_r(BOARD_REVISION_REG) & BOARD_REVISION_MSK) >> + BOARD_REVISION_OFST); } - /* initialization */ -void initControlServer(){ - if (initError == OK) { - setupDetector(); - } - initCheckDone = 1; +void initControlServer() { + if (initError == OK) { + setupDetector(); + } + initCheckDone = 1; } void initStopServer() { - if (mapCSP0() == FAIL) { - LOG(logERROR, ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); - exit(EXIT_FAILURE); - } + if (mapCSP0() == FAIL) { + LOG(logERROR, + ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); + exit(EXIT_FAILURE); + } #ifdef VIRTUAL - virtual_stop = 0; - if (!isControlServer) { - ComVirtual_setStop(virtual_stop); - } + virtual_stop = 0; + if (!isControlServer) { + ComVirtual_setStop(virtual_stop); + } #endif } - /* set up detector */ void setupDetector() { LOG(logINFO, ("This Server is for 1 Gotthard module (1280 channels)\n")); #ifdef VIRTUAL - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } #endif // Initialization @@ -385,17 +385,24 @@ void setupDetector() { // adc if (getBoardRevision() == 1) { - AD9252_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST); + AD9252_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, + ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, + ADC_SPI_SRL_DT_OTPT_OFST); AD9252_Disable(); AD9252_Configure(); } else { - AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST); + AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, + ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, + ADC_SPI_SRL_DT_OTPT_OFST); AD9257_Disable(); AD9257_Configure(); } // dac - LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, DAC_MAX_MV); + LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, + SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, + SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, + DAC_MAX_MV); LTC2620_Disable(); LTC2620_Configure(); setDefaultDacs(); @@ -405,9 +412,9 @@ void setupDetector() { bus_w(TEMP_SPI_OUT_REG, 0x0); // roi, gbit readout - rois.xmin = -1; + rois.xmin = -1; rois.xmax = -1; - setROI(rois);// set adcsyncreg, daqreg, chipofinterestreg, cleanfifos, + setROI(rois); // set adcsyncreg, daqreg, chipofinterestreg, cleanfifos, setGbitReadout(); // master, slave (25um) @@ -419,12 +426,11 @@ void setupDetector() { setSettings(DEFAULT_SETTINGS); setExtSignal(DEFAULT_TRIGGER_MODE); setTiming(DEFAULT_TIMING_MODE); - setNumFrames(DEFAULT_NUM_FRAMES); - setNumTriggers(DEFAULT_NUM_CYCLES); - setExpTime(DEFAULT_EXPTIME); - setPeriod(DEFAULT_PERIOD); - setDelayAfterTrigger(DEFAULT_DELAY); - + setNumFrames(DEFAULT_NUM_FRAMES); + setNumTriggers(DEFAULT_NUM_CYCLES); + setExpTime(DEFAULT_EXPTIME); + setPeriod(DEFAULT_PERIOD); + setDelayAfterTrigger(DEFAULT_DELAY); } int setDefaultDacs() { @@ -433,7 +439,7 @@ int setDefaultDacs() { { int i = 0; const int defaultvals[NDAC] = DEFAULT_DAC_VALS; - for(i = 0; i < NDAC; ++i) { + for (i = 0; i < NDAC; ++i) { // if not already default, set it to default if (dacValues[i] != defaultvals[i]) { setDAC((enum DACINDEX)i, defaultvals[i], 0); @@ -444,17 +450,16 @@ int setDefaultDacs() { } uint32_t writeRegister16And32(uint32_t offset, uint32_t data) { - if (((offset << MEM_MAP_SHIFT) == CONTROL_REG) || - ((offset << MEM_MAP_SHIFT) == FIFO_DATA_REG)) { - return writeRegister16(offset, data); - } else - return writeRegister(offset, data); - + if (((offset << MEM_MAP_SHIFT) == CONTROL_REG) || + ((offset << MEM_MAP_SHIFT) == FIFO_DATA_REG)) { + return writeRegister16(offset, data); + } else + return writeRegister(offset, data); } uint32_t readRegister16And32(uint32_t offset) { if (((offset << MEM_MAP_SHIFT) == CONTROL_REG) || - ((offset << MEM_MAP_SHIFT) == FIFO_DATA_REG)) { + ((offset << MEM_MAP_SHIFT) == FIFO_DATA_REG)) { return readRegister16(offset); } else return readRegister(offset); @@ -470,11 +475,14 @@ void setPhaseShiftOnce() { // first time detector has switched on if (!val) { detectorFirstServer = 1; - LOG(logINFO, ("Implementing the first phase shift of %d\n", phaseShift)); + LOG(logINFO, + ("Implementing the first phase shift of %d\n", phaseShift)); int times = 0; for (times = 1; times < phaseShift; ++times) { - bus_w(addr,(INT_RSTN_MSK | ENT_RSTN_MSK | SW1_MSK | PHS_STP_MSK)); //0x1821 - bus_w(addr,(INT_RSTN_MSK | ENT_RSTN_MSK | (SW1_MSK &~ PHS_STP_MSK))); //0x1820 + bus_w(addr, (INT_RSTN_MSK | ENT_RSTN_MSK | SW1_MSK | + PHS_STP_MSK)); // 0x1821 + bus_w(addr, (INT_RSTN_MSK | ENT_RSTN_MSK | + (SW1_MSK & ~PHS_STP_MSK))); // 0x1820 } LOG(logDEBUG1, ("Multipurpose reg: 0x%x\n", val)); } else @@ -506,8 +514,9 @@ void setADCSyncRegister() { u_int32_t addr = ADC_SYNC_REG; // 0x88(no roi), 0x1b(roi) (MSB) - u_int32_t tokenDelay = ((adcConfigured == -1) ? - ADC_SYNC_ENET_DELAY_NO_ROI_VAL : ADC_SYNC_ENET_DELAY_ROI_VAL); + u_int32_t tokenDelay = + ((adcConfigured == -1) ? ADC_SYNC_ENET_DELAY_NO_ROI_VAL + : ADC_SYNC_ENET_DELAY_ROI_VAL); // 0x88032214(no roi), 0x1b032214(with roi) u_int32_t val = (ADC_SYNC_TKN_VAL | tokenDelay); @@ -521,15 +530,16 @@ void setDAQRegister() { u_int32_t addr = DAQ_REG; // 0x1f16(board rev 1) 0x1f0f(board rev 2) - u_int32_t tokenTiming = ((getBoardRevision() == 1) ? - DAQ_TKN_TMNG_BRD_RVSN_1_VAL : DAQ_TKN_TMNG_BRD_RVSN_2_VAL); + u_int32_t tokenTiming = + ((getBoardRevision() == 1) ? DAQ_TKN_TMNG_BRD_RVSN_1_VAL + : DAQ_TKN_TMNG_BRD_RVSN_2_VAL); // 0x13f(no roi), 0x7f(roi) - u_int32_t packetLength = ((adcConfigured == -1) ? - DAQ_PCKT_LNGTH_NO_ROI_VAL : DAQ_PCKT_LNGTH_ROI_VAL); + u_int32_t packetLength = ((adcConfigured == -1) ? DAQ_PCKT_LNGTH_NO_ROI_VAL + : DAQ_PCKT_LNGTH_ROI_VAL); // MSB: packetLength LSB: tokenTiming - u_int32_t val = (tokenTiming | packetLength); + u_int32_t val = (tokenTiming | packetLength); bus_w(addr, val); LOG(logINFO, ("\tDAQ Reg: 0x%x\n", bus_r(addr))); @@ -540,16 +550,19 @@ void setChipOfInterestRegister(int adc) { u_int32_t addr = CHIP_OF_INTRST_REG; // 0x1f(no roi), 0xXX(roi) - u_int32_t adcSelect = ((adcConfigured == -1) ? - CHIP_OF_INTRST_ADC_SEL_MSK : - (((1 << adc) << CHIP_OF_INTRST_ADC_SEL_OFST) & CHIP_OF_INTRST_ADC_SEL_MSK)); + u_int32_t adcSelect = + ((adcConfigured == -1) ? CHIP_OF_INTRST_ADC_SEL_MSK + : (((1 << adc) << CHIP_OF_INTRST_ADC_SEL_OFST) & + CHIP_OF_INTRST_ADC_SEL_MSK)); // 0x0500(no roi), 0x0100(roi) - u_int32_t numChannels = (adcConfigured == -1) ? (NCHIP * NCHAN) : (NCHIPS_PER_ADC * NCHAN); - numChannels = ((numChannels << CHIP_OF_INTRST_NUM_CHNNLS_OFST) & CHIP_OF_INTRST_NUM_CHNNLS_MSK); + u_int32_t numChannels = + (adcConfigured == -1) ? (NCHIP * NCHAN) : (NCHIPS_PER_ADC * NCHAN); + numChannels = ((numChannels << CHIP_OF_INTRST_NUM_CHNNLS_OFST) & + CHIP_OF_INTRST_NUM_CHNNLS_MSK); // 0x500001f(no roi), 0x10000xx(roi) MSB:num channels, LSB: selected ADC - u_int32_t val = (numChannels | adcSelect); + u_int32_t val = (numChannels | adcSelect); bus_w(addr, val); LOG(logINFO, ("\tChip Of Interest Reg: 0x%x\n", bus_r(addr))); @@ -564,8 +577,10 @@ void setROIADC(int adc) { cleanFifos(); // clean fifos setChipOfInterestRegister(adc); // num channels & select adc - ipPacketSize = ((adcConfigured == -1) ? IP_PACKET_SIZE_NO_ROI : IP_PACKET_SIZE_ROI); - udpPacketSize = ((adcConfigured == -1) ? UDP_PACKETSIZE_NO_ROI : UDP_PACKETSIZE_ROI); + ipPacketSize = + ((adcConfigured == -1) ? IP_PACKET_SIZE_NO_ROI : IP_PACKET_SIZE_ROI); + udpPacketSize = + ((adcConfigured == -1) ? UDP_PACKETSIZE_NO_ROI : UDP_PACKETSIZE_ROI); } void setGbitReadout() { @@ -577,8 +592,8 @@ void setGbitReadout() { int readConfigFile() { // open config file - FILE* fd = fopen(CONFIG_FILE, "r"); - if(fd == NULL) { + FILE *fd = fopen(CONFIG_FILE, "r"); + if (fd == NULL) { LOG(logWARNING, ("\tCould not find config file %s\n", CONFIG_FILE)); return FAIL; } @@ -604,25 +619,28 @@ int readConfigFile() { sscanf(line, "%s %s\n", key, value); // key is master/ slave flag - if (!strcasecmp(key,"masterflags")) { - if (!strcasecmp(value,"is_master")) { + if (!strcasecmp(key, "masterflags")) { + if (!strcasecmp(value, "is_master")) { masterflags = IS_MASTER; LOG(logINFOBLUE, ("\tMaster\n")); - } else if (!strcasecmp(value,"is_slave")) { + } else if (!strcasecmp(value, "is_slave")) { masterflags = IS_SLAVE; LOG(logINFOBLUE, ("\tSlave\n")); - } else if (!strcasecmp(value,"no_master")){ + } else if (!strcasecmp(value, "no_master")) { masterflags = NO_MASTER; LOG(logINFOBLUE, ("\tNo Master\n")); } else { - LOG(logERROR, ("\tCould not scan masterflags %s value from config file\n", value)); + LOG(logERROR, + ("\tCould not scan masterflags %s value from config file\n", + value)); scan = FAIL; break; } // not first server since detector power on if (!detectorFirstServer) { - LOG(logINFOBLUE, ("\tServer has been started up before. Ignoring rest of config file\n")); + LOG(logINFOBLUE, ("\tServer has been started up before. " + "Ignoring rest of config file\n")); fclose(fd); return FAIL; } @@ -632,8 +650,10 @@ int readConfigFile() { else { // convert value to int int ival = 0; - if(sscanf(value, "%d", &ival) <= 0) { - LOG(logERROR, ("\tCould not scan parameter %s value %s from config file\n", key, value)); + if (sscanf(value, "%d", &ival) <= 0) { + LOG(logERROR, ("\tCould not scan parameter %s value %s from " + "config file\n", + key, value)); scan = FAIL; break; } @@ -653,7 +673,8 @@ int readConfigFile() { else if (!strcasecmp(key, "startacqdelay")) startacqdelay = ival; else { - LOG(logERROR, ("\tCould not scan parameter %s from config file\n", key)); + LOG(logERROR, + ("\tCould not scan parameter %s from config file\n", key)); scan = FAIL; break; } @@ -663,21 +684,16 @@ int readConfigFile() { if (scan == FAIL) exit(EXIT_FAILURE); - LOG(logINFOBLUE, ( - "\tmasterdefaultdelay:%d\n" - "\tpatternphase:%d\n" - "\tadcphase:%d\n" - "\tslavepatternphase:%d\n" - "\tslaveadcphase:%d\n" - "\trsttosw1delay:%d\n" - "\tstartacqdelay:%d\n", - masterdefaultdelay, - patternphase, - adcphase, - slavepatternphase, - slaveadcphase, - rsttosw1delay, - startacqdelay)); + LOG(logINFOBLUE, + ("\tmasterdefaultdelay:%d\n" + "\tpatternphase:%d\n" + "\tadcphase:%d\n" + "\tslavepatternphase:%d\n" + "\tslaveadcphase:%d\n" + "\trsttosw1delay:%d\n" + "\tstartacqdelay:%d\n", + masterdefaultdelay, patternphase, adcphase, slavepatternphase, + slaveadcphase, rsttosw1delay, startacqdelay)); return OK; } @@ -694,7 +710,8 @@ void setMasterSlaveConfiguration() { setDelayAfterTrigger(0); // Set pattern phase for the master module - u_int32_t val = (bus_r(MULTI_PURPOSE_REG) & (~(PLL_CLK_SL_MSK))); // unset mask + u_int32_t val = + (bus_r(MULTI_PURPOSE_REG) & (~(PLL_CLK_SL_MSK))); // unset mask bus_w(MULTI_PURPOSE_REG, val | PLL_CLK_SL_MSTR_VAL); setPhaseShift(patternphase); @@ -715,26 +732,26 @@ void setMasterSlaveConfiguration() { // Set start acq delay val = (bus_r(MULTI_PURPOSE_REG) & (~(STRT_ACQ_DLY_MSK))); // unset mask - val = val | ((startacqdelay << STRT_ACQ_DLY_OFST) & STRT_ACQ_DLY_MSK); // set val + val = val | ((startacqdelay << STRT_ACQ_DLY_OFST) & + STRT_ACQ_DLY_MSK); // set val bus_w(MULTI_PURPOSE_REG, val); LOG(logDEBUG1, ("\tMultipurpose reg: 0x%x\n", val)); } // all configuration - Set RST to SW1 delay - u_int32_t val = (bus_r(MULTI_PURPOSE_REG) & (~(RST_TO_SW1_DLY_MSK))); // unset mask - val = val | ((rsttosw1delay << RST_TO_SW1_DLY_OFST) & RST_TO_SW1_DLY_MSK); // set val + u_int32_t val = + (bus_r(MULTI_PURPOSE_REG) & (~(RST_TO_SW1_DLY_MSK))); // unset mask + val = val | ((rsttosw1delay << RST_TO_SW1_DLY_OFST) & + RST_TO_SW1_DLY_MSK); // set val bus_w(MULTI_PURPOSE_REG, val); LOG(logDEBUG1, ("\tMultipurpose reg: 0x%x\n", val)); LOG(logINFO, ("\tMaster Slave Configuration has been set up\n")); } - /* set parameters - dr, roi */ -int setDynamicRange(int dr){ - return DYNAMIC_RANGE; -} +int setDynamicRange(int dr) { return DYNAMIC_RANGE; } int setROI(ROI arg) { @@ -747,30 +764,31 @@ int setROI(ROI arg) { LOG(logINFO, ("Setting ROI:(%d, %d)\n", arg.xmin, arg.xmax)); // validation // xmin divisible by 256 and less than 1280 - if (((arg.xmin % NCHAN_PER_ADC) != 0) || (arg.xmin >= (NCHAN * NCHIP))) { + if (((arg.xmin % NCHAN_PER_ADC) != 0) || + (arg.xmin >= (NCHAN * NCHIP))) { LOG(logERROR, ("Could not set roi. xmin is invalid\n")); return FAIL; } // xmax must be 255 more than xmin if (arg.xmax != (arg.xmin + NCHAN_PER_ADC - 1)) { - LOG(logERROR, ("Could not set roi. xmax is invalid\n")); - return FAIL; + LOG(logERROR, ("Could not set roi. xmax is invalid\n")); + return FAIL; } rois.xmin = arg.xmin; rois.xmax = arg.xmax; adc = arg.xmin / NCHAN_PER_ADC; } LOG(logINFO, ("\tAdc to be configured: %d\n", adc)); - LOG(logINFO, ("\tROI to be configured: (%d, %d)\n", - (adc == -1) ? 0 : (rois.xmin), - (adc == -1) ? (NCHIP * NCHAN - 1) : (rois.xmax))); + LOG(logINFO, + ("\tROI to be configured: (%d, %d)\n", (adc == -1) ? 0 : (rois.xmin), + (adc == -1) ? (NCHIP * NCHAN - 1) : (rois.xmax))); - //set adc of interest + // set adc of interest setROIADC(adc); return OK; } -ROI getROI() { +ROI getROI() { LOG(logINFO, ("Getting ROI:\n")); // print @@ -782,7 +800,6 @@ ROI getROI() { return rois; } - /* parameters - timer */ void setNumFrames(int64_t val) { if (val > 0) { @@ -799,7 +816,7 @@ void setNumTriggers(int64_t val) { if (val > 0) { LOG(logINFO, ("Setting number of triggers %lld\n", (long long int)val)); set64BitReg(val, SET_TRAINS_LSB_REG, SET_TRAINS_MSB_REG); - } + } } int64_t getNumTriggers() { @@ -825,7 +842,8 @@ int setExpTime(int64_t val) { } int64_t getExpTime() { - return get64BitReg(SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG) / (1E-9 * CLK_FREQ); + return get64BitReg(SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG) / + (1E-9 * CLK_FREQ); } int setPeriod(int64_t val) { @@ -847,20 +865,25 @@ int setPeriod(int64_t val) { } int64_t getPeriod() { - return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-9 * CLK_FREQ); + return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) / + (1E-9 * CLK_FREQ); } int setDelayAfterTrigger(int64_t val) { if (val < 0) { - LOG(logERROR, ("Invalid delay after trigger: %lld ns\n", (long long int)val)); + LOG(logERROR, + ("Invalid delay after trigger: %lld ns\n", (long long int)val)); return FAIL; } LOG(logINFO, ("Setting delay after trigger %lld ns\n", (long long int)val)); if (masterflags == IS_MASTER) { val += masterdefaultdelay; - LOG(logINFO, ("\tActual Delay (master): %lld\n", (long long int) val)); - } - val = (val * 1E-9 * CLK_FREQ) + 0.5; //because of the master delay of 62 ns (not really double of clkfreq), losing precision and 0 delay becomes -31ns, so adding +0.5. Also adding +0.5 for more tolerance for gotthard1. + LOG(logINFO, ("\tActual Delay (master): %lld\n", (long long int)val)); + } + val = (val * 1E-9 * CLK_FREQ) + + 0.5; // because of the master delay of 62 ns (not really double of + // clkfreq), losing precision and 0 delay becomes -31ns, so adding + // +0.5. Also adding +0.5 for more tolerance for gotthard1. set64BitReg(val, SET_DELAY_LSB_REG, SET_DELAY_MSB_REG); // validate for tolerance @@ -874,12 +897,14 @@ int setDelayAfterTrigger(int64_t val) { } int64_t getDelayAfterTrigger() { - int64_t retval = get64BitReg(SET_DELAY_LSB_REG, SET_DELAY_MSB_REG) / (1E-9 * CLK_FREQ); + int64_t retval = + get64BitReg(SET_DELAY_LSB_REG, SET_DELAY_MSB_REG) / (1E-9 * CLK_FREQ); if (masterflags == IS_MASTER) { - LOG(logDEBUG1, ("\tActual Delay read (master): %lld\n", (long long int) retval)); + LOG(logDEBUG1, + ("\tActual Delay read (master): %lld\n", (long long int)retval)); retval -= masterdefaultdelay; } - return retval; + return retval; } int64_t getNumFramesLeft() { @@ -891,43 +916,45 @@ int64_t getNumTriggersLeft() { } int64_t getPeriodLeft() { - return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / (1E-9 * CLK_FREQ); + return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / + (1E-9 * CLK_FREQ); } int64_t getDelayAfterTriggerLeft() { - int64_t retval = get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-9 * CLK_FREQ); + int64_t retval = + get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-9 * CLK_FREQ); if (masterflags == IS_MASTER) { - LOG(logDEBUG1, ("\tGetting Actual delay (master): %lld\n", (long long int) retval)); + LOG(logDEBUG1, + ("\tGetting Actual delay (master): %lld\n", (long long int)retval)); retval -= masterdefaultdelay; - } - return retval; + } + return retval; } int64_t getExpTimeLeft() { - return get64BitReg(GET_EXPTIME_LSB_REG, GET_EXPTIME_MSB_REG) / (1E-9 * CLK_FREQ); + return get64BitReg(GET_EXPTIME_LSB_REG, GET_EXPTIME_MSB_REG) / + (1E-9 * CLK_FREQ); } - - /* parameters - channel, chip, module, settings */ -int setModule(sls_detector_module myMod, char* mess){ +int setModule(sls_detector_module myMod, char *mess) { - LOG(logINFO, ("Setting module with settings %d\n",myMod.reg)); + LOG(logINFO, ("Setting module with settings %d\n", myMod.reg)); // settings - setSettings( (enum detectorSettings)myMod.reg); + setSettings((enum detectorSettings)myMod.reg); - //set dac values - { - int i = 0; - for(i = 0; i < NDAC; ++i) - setDAC((enum DACINDEX)i, myMod.dacs[i], 0); - } - return OK; + // set dac values + { + int i = 0; + for (i = 0; i < NDAC; ++i) + setDAC((enum DACINDEX)i, myMod.dacs[i], 0); + } + return OK; } -int getModule(sls_detector_module *myMod){ +int getModule(sls_detector_module *myMod) { int idac = 0; for (idac = 0; idac < NDAC; ++idac) { if (dacValues[idac] >= 0) @@ -942,20 +969,20 @@ int getModule(sls_detector_module *myMod){ if (initialized) { return OK; } - return FAIL; + return FAIL; } -enum detectorSettings setSettings(enum detectorSettings sett){ - if(sett == UNINITIALIZED) - return thisSettings; +enum detectorSettings setSettings(enum detectorSettings sett) { + if (sett == UNINITIALIZED) + return thisSettings; - // set settings - if(sett != GET_SETTINGS) { - u_int32_t addr = GAIN_REG; + // set settings + if (sett != GET_SETTINGS) { + u_int32_t addr = GAIN_REG; - // find conf gain value - uint32_t confgain = 0x0; - switch (sett) { + // find conf gain value + uint32_t confgain = 0x0; + switch (sett) { case DYNAMICGAIN: LOG(logINFO, ("Set settings - Dyanmic Gain\n")); confgain = GAIN_CONFGAIN_DYNMC_GAIN_VAL; @@ -977,25 +1004,28 @@ enum detectorSettings setSettings(enum detectorSettings sett){ confgain = GAIN_CONFGAIN_VRY_HGH_GAIN_VAL; break; default: - LOG(logERROR, ("This settings is not defined for this detector %d\n", (int)sett)); + LOG(logERROR, + ("This settings is not defined for this detector %d\n", + (int)sett)); return -1; - } - // set conf gain + } + // set conf gain bus_w(addr, bus_r(addr) & ~GAIN_CONFGAIN_MSK); bus_w(addr, bus_r(addr) | confgain); LOG(logINFO, ("\tGain Reg: 0x%x\n", bus_r(addr))); - thisSettings = sett; - } + thisSettings = sett; + } - return getSettings(); + return getSettings(); } -enum detectorSettings getSettings(){ - uint32_t regval = bus_r(GAIN_REG); - uint32_t val = regval & GAIN_CONFGAIN_MSK; - switch(val) { +enum detectorSettings getSettings() { + uint32_t regval = bus_r(GAIN_REG); + uint32_t val = regval & GAIN_CONFGAIN_MSK; + switch (val) { case GAIN_CONFGAIN_DYNMC_GAIN_VAL: - LOG(logDEBUG1, ("Settings read: Dynamic Gain. Gain Reg: 0x%x\n", regval)); + LOG(logDEBUG1, + ("Settings read: Dynamic Gain. Gain Reg: 0x%x\n", regval)); thisSettings = DYNAMICGAIN; break; case GAIN_CONFGAIN_HGH_GAIN_VAL: @@ -1007,29 +1037,31 @@ enum detectorSettings getSettings(){ thisSettings = LOWGAIN; break; case GAIN_CONFGAIN_MDM_GAIN_VAL: - LOG(logDEBUG1, ("Settings read: Medium Gain. Gain Reg: 0x%x\n", regval)); + LOG(logDEBUG1, + ("Settings read: Medium Gain. Gain Reg: 0x%x\n", regval)); thisSettings = MEDIUMGAIN; break; case GAIN_CONFGAIN_VRY_HGH_GAIN_VAL: - LOG(logDEBUG1, ("Settings read: Very High Gain. Gain Reg: 0x%x\n", regval)); + LOG(logDEBUG1, + ("Settings read: Very High Gain. Gain Reg: 0x%x\n", regval)); thisSettings = VERYHIGHGAIN; break; default: thisSettings = UNDEFINED; LOG(logERROR, ("Settings read: Undefined. Gain Reg: 0x%x\n", regval)); - } + } - return thisSettings; + return thisSettings; } - /* parameters - dac, adc, hv */ void setDAC(enum DACINDEX ind, int val, int mV) { if (val < 0) return; - LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, (mV ? "mV" : "dac units"))); + LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, + (mV ? "mV" : "dac units"))); int dacval = val; #ifdef VIRTUAL if (!mV) { @@ -1047,37 +1079,36 @@ void setDAC(enum DACINDEX ind, int val, int mV) { int getDAC(enum DACINDEX ind, int mV) { if (!mV) { - LOG(logDEBUG1, ("Getting DAC %d : %d dac\n",ind, dacValues[ind])); + LOG(logDEBUG1, ("Getting DAC %d : %d dac\n", ind, dacValues[ind])); return dacValues[ind]; } int voltage = -1; LTC2620_DacToVoltage(dacValues[ind], &voltage); - LOG(logDEBUG1, ("Getting DAC %d : %d dac (%d mV)\n",ind, dacValues[ind], voltage)); + LOG(logDEBUG1, + ("Getting DAC %d : %d dac (%d mV)\n", ind, dacValues[ind], voltage)); return voltage; } -int getMaxDacSteps() { - return LTC2620_GetMaxNumSteps(); -} +int getMaxDacSteps() { return LTC2620_GetMaxNumSteps(); } - -int getADC(enum ADCINDEX ind){ +int getADC(enum ADCINDEX ind) { #ifdef VIRTUAL return 0; #endif - char tempnames[2][40]={"VRs/FPGAs Temperature", "ADCs/ASICs Temperature"}; - LOG(logDEBUG1, ("Getting Temperature for %s\n", tempnames[ind])); + char tempnames[2][40] = {"VRs/FPGAs Temperature", "ADCs/ASICs Temperature"}; + LOG(logDEBUG1, ("Getting Temperature for %s\n", tempnames[ind])); - u_int32_t addr = TEMP_SPI_IN_REG; - uint32_t addrout = TEMP_SPI_OUT_REG; - const int repeats = 6; // number of register writes for delay - const int reads = 20; - u_int32_t value = 0; + u_int32_t addr = TEMP_SPI_IN_REG; + uint32_t addrout = TEMP_SPI_OUT_REG; + const int repeats = 6; // number of register writes for delay + const int reads = 20; + u_int32_t value = 0; - // standby, high clk, high cs - bus_w(addr, (TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T1_CS_MSK | TEMP_SPI_IN_T2_CLK_MSK | TEMP_SPI_IN_T2_CS_MSK)); + // standby, high clk, high cs + bus_w(addr, (TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T1_CS_MSK | + TEMP_SPI_IN_T2_CLK_MSK | TEMP_SPI_IN_T2_CS_MSK)); - // high clk low cs + // high clk low cs bus_w(addr, (TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T2_CLK_MSK)); { @@ -1088,31 +1119,34 @@ int getADC(enum ADCINDEX ind){ // low clk low cs for (j = 0; j < repeats; ++j) bus_w(addr, 0x0); - //high clk low cs + // high clk low cs for (j = 0; j < repeats; ++j) bus_w(addr, (TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T2_CLK_MSK)); // only the first time if (i <= 10) { if (ind == TEMP_ADC) - value = (value << 1) + (bus_r(addrout) & TEMP_SPI_OUT_T1_DT_MSK); + value = (value << 1) + + (bus_r(addrout) & TEMP_SPI_OUT_T1_DT_MSK); else - value = (value << 1) + (bus_r(addrout) & TEMP_SPI_OUT_T2_DT_MSK); + value = (value << 1) + + (bus_r(addrout) & TEMP_SPI_OUT_T2_DT_MSK); } } } // standby high clk, high cs - bus_w(addr, (TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T1_CS_MSK | TEMP_SPI_IN_T2_CLK_MSK | TEMP_SPI_IN_T2_CS_MSK)); + bus_w(addr, (TEMP_SPI_IN_T1_CLK_MSK | TEMP_SPI_IN_T1_CS_MSK | + TEMP_SPI_IN_T2_CLK_MSK | TEMP_SPI_IN_T2_CS_MSK)); LOG(logDEBUG1, ("\tInitial Temperature value: %u\n", value)); // conversion - value = value/4.0; - LOG(logINFO, ("\tTemperature %s: %f °C\n",tempnames[ind], value)); - return value; + value = value / 4.0; + LOG(logINFO, ("\tTemperature %s: %f °C\n", tempnames[ind], value)); + return value; } -int setHighVoltage(int val){ +int setHighVoltage(int val) { u_int32_t addr = HV_REG; u_int32_t sel = 0x0; @@ -1141,7 +1175,8 @@ int setHighVoltage(int val){ sel = HV_SEL_200_VAL; break; default: - LOG(logERROR, ("%d high voltage is not defined for this detector\n", val)); + LOG(logERROR, + ("%d high voltage is not defined for this detector\n", val)); return setHighVoltage(-1); } LOG(logDEBUG1, ("\tHigh voltage value to be sent: 0x%x\n", sel)); @@ -1189,13 +1224,11 @@ int setHighVoltage(int val){ return retval; } - /* parameters - timing, extsig */ - -void setTiming( enum timingMode arg){ +void setTiming(enum timingMode arg) { u_int32_t addr = EXT_SIGNAL_REG; - switch(arg) { + switch (arg) { case AUTO_TIMING: LOG(logINFO, ("Set Timing: Auto\n")); bus_w(addr, EXT_SIGNAL_OFF_VAL); @@ -1221,90 +1254,90 @@ enum timingMode getTiming() { case EXT_SIGNAL_TRGGR_IN_FLLNG_VAL: return TRIGGER_EXPOSURE; default: - return AUTO_TIMING; + return AUTO_TIMING; } } -void setExtSignal(enum externalSignalFlag mode) { +void setExtSignal(enum externalSignalFlag mode) { switch (mode) { case TRIGGER_IN_RISING_EDGE: - LOG(logINFO, ("Setting External Signal flag: Trigger in Rising Edge\n")); + LOG(logINFO, + ("Setting External Signal flag: Trigger in Rising Edge\n")); break; case TRIGGER_IN_FALLING_EDGE: - LOG(logINFO, ("Setting External Signal flag: Trigger in Falling Edge\n")); + LOG(logINFO, + ("Setting External Signal flag: Trigger in Falling Edge\n")); break; default: - LOG(logERROR, ("Extsig (signal mode) %d not defined for this detector\n", mode)); + LOG(logERROR, + ("Extsig (signal mode) %d not defined for this detector\n", mode)); return; } signalMode = mode; setTiming(getTiming()); } -int getExtSignal() { - return signalMode; -} - +int getExtSignal() { return signalMode; } /* configure mac */ -void calcChecksum(mac_conf* mac, int sourceip, int destip) { - mac->ip.ip_ver = 0x4; - mac->ip.ip_ihl = 0x5; - mac->ip.ip_tos = 0x0; - mac->ip.ip_len = ipPacketSize; - mac->ip.ip_ident = 0x0000; - mac->ip.ip_flag = 0x2; //not nibble aligned (flag& offset - mac->ip.ip_offset = 0x00; - mac->ip.ip_ttl = 0x70; - mac->ip.ip_protocol = 0x11; - mac->ip.ip_chksum = 0x0000 ; // pseudo - mac->ip.ip_sourceip = sourceip; - mac->ip.ip_destip = destip; +void calcChecksum(mac_conf *mac, int sourceip, int destip) { + mac->ip.ip_ver = 0x4; + mac->ip.ip_ihl = 0x5; + mac->ip.ip_tos = 0x0; + mac->ip.ip_len = ipPacketSize; + mac->ip.ip_ident = 0x0000; + mac->ip.ip_flag = 0x2; // not nibble aligned (flag& offset + mac->ip.ip_offset = 0x00; + mac->ip.ip_ttl = 0x70; + mac->ip.ip_protocol = 0x11; + mac->ip.ip_chksum = 0x0000; // pseudo + mac->ip.ip_sourceip = sourceip; + mac->ip.ip_destip = destip; LOG(logDEBUG1, ("\tIP TTL: 0x%x\n", mac->ip.ip_ttl)); - int count = sizeof(mac->ip); - unsigned short *addr; - addr = (unsigned short*)(&(mac->ip)); /* warning: assignment from incompatible pointer type */ + int count = sizeof(mac->ip); + unsigned short *addr; + addr = (unsigned short *)(&( + mac->ip)); /* warning: assignment from incompatible pointer type */ - long int sum = 0; - while( count > 1 ) { - sum += *addr++; - count -= 2; - } - if (count > 0) - sum += *addr; // Add left-over byte, if any - while (sum>>16) - sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits - long int checksum = (~sum) & 0xffff; - LOG(logINFO, ("\tIP checksum : 0x%lx\n", checksum)); - mac->ip.ip_chksum = checksum; + long int sum = 0; + while (count > 1) { + sum += *addr++; + count -= 2; + } + if (count > 0) + sum += *addr; // Add left-over byte, if any + while (sum >> 16) + sum = (sum & 0xffff) + (sum >> 16); // Fold 32-bit sum to 16 bits + long int checksum = (~sum) & 0xffff; + LOG(logINFO, ("\tIP checksum : 0x%lx\n", checksum)); + mac->ip.ip_chksum = checksum; } int configureMAC() { uint32_t srcip = udpDetails.srcip; - uint32_t dstip = udpDetails.dstip; - uint64_t srcmac = udpDetails.srcmac; - uint64_t dstmac = udpDetails.dstmac; - int srcport = udpDetails.srcport; - int dstport = udpDetails.dstport; + uint32_t dstip = udpDetails.dstip; + uint64_t srcmac = udpDetails.srcmac; + uint64_t dstmac = udpDetails.dstmac; + int srcport = udpDetails.srcport; + int dstport = udpDetails.dstport; - LOG(logINFOBLUE, ("Configuring MAC\n")); - char src_mac[50], src_ip[INET_ADDRSTRLEN],dst_mac[50], dst_ip[INET_ADDRSTRLEN]; - getMacAddressinString(src_mac, 50, srcmac); - getMacAddressinString(dst_mac, 50, dstmac); - getIpAddressinString(src_ip, srcip); - getIpAddressinString(dst_ip, dstip); + LOG(logINFOBLUE, ("Configuring MAC\n")); + char src_mac[50], src_ip[INET_ADDRSTRLEN], dst_mac[50], + dst_ip[INET_ADDRSTRLEN]; + getMacAddressinString(src_mac, 50, srcmac); + getMacAddressinString(dst_mac, 50, dstmac); + getIpAddressinString(src_ip, srcip); + getIpAddressinString(dst_ip, dstip); - LOG(logINFO, ( - "\tSource IP : %s\n" - "\tSource MAC : %s\n" - "\tSource Port : %d\n" - "\tDest IP : %s\n" - "\tDest MAC : %s\n" - "\tDest Port : %d\n", - src_ip, src_mac, srcport, - dst_ip, dst_mac, dstport)); + LOG(logINFO, ("\tSource IP : %s\n" + "\tSource MAC : %s\n" + "\tSource Port : %d\n" + "\tDest IP : %s\n" + "\tDest MAC : %s\n" + "\tDest Port : %d\n", + src_ip, src_mac, srcport, dst_ip, dst_mac, dstport)); #ifdef VIRTUAL if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { @@ -1315,94 +1348,96 @@ int configureMAC() { #endif u_int32_t addr = MULTI_PURPOSE_REG; - LOG(logDEBUG1, ("\tRoi: %d, Ip Packet size: %d UDP Packet size: %d\n", - adcConfigured, ipPacketSize, udpPacketSize)); + LOG(logDEBUG1, ("\tRoi: %d, Ip Packet size: %d UDP Packet size: %d\n", + adcConfigured, ipPacketSize, udpPacketSize)); - //reset mac - bus_w (addr, bus_r(addr) | RST_MSK); - LOG(logDEBUG1, ("\tReset Mac. MultiPurpose reg: 0x%x\n", bus_r(addr))); + // reset mac + bus_w(addr, bus_r(addr) | RST_MSK); + LOG(logDEBUG1, ("\tReset Mac. MultiPurpose reg: 0x%x\n", bus_r(addr))); - usleep(500000); + usleep(500000); - // release reset - bus_w(addr, bus_r(addr) &(~ RST_MSK)); - LOG(logDEBUG1, ("\tReset released. MultiPurpose reg: 0x%x\n", bus_r(addr))); + // release reset + bus_w(addr, bus_r(addr) & (~RST_MSK)); + LOG(logDEBUG1, ("\tReset released. MultiPurpose reg: 0x%x\n", bus_r(addr))); - // write shadow regs + // write shadow regs bus_w(addr, bus_r(addr) | (ENT_RSTN_MSK | WRT_BCK_MSK)); - LOG(logDEBUG1, ("\tWrite shadow regs. MultiPurpose reg: 0x%x\n", bus_r(addr))); + LOG(logDEBUG1, + ("\tWrite shadow regs. MultiPurpose reg: 0x%x\n", bus_r(addr))); // release write back - bus_w(addr, bus_r(addr) &(~WRT_BCK_MSK)); - LOG(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr))); + bus_w(addr, bus_r(addr) & (~WRT_BCK_MSK)); + LOG(logDEBUG1, + ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr))); LOG(logDEBUG1, ("\tConfiguring MAC CONF\n")); - mac_conf *mac_conf_regs = (mac_conf*)(Blackfin_getBaseAddress() + ENET_CONF_REG / 2); // direct write - mac_conf_regs->mac.mac_dest_mac1 = ((dstmac >> (8 * 5)) & 0xFF); - mac_conf_regs->mac.mac_dest_mac2 = ((dstmac >> (8 * 4)) & 0xFF); - mac_conf_regs->mac.mac_dest_mac3 = ((dstmac >> (8 * 3)) & 0xFF); - mac_conf_regs->mac.mac_dest_mac4 = ((dstmac >> (8 * 2)) & 0xFF); - mac_conf_regs->mac.mac_dest_mac5 = ((dstmac >> (8 * 1)) & 0xFF); - mac_conf_regs->mac.mac_dest_mac6 = ((dstmac >> (8 * 0)) & 0xFF); - LOG(logDEBUG1, ("\tDestination Mac: %llx %x:%x:%x:%x:%x:%x\n", - dstmac, - mac_conf_regs->mac.mac_dest_mac1, - mac_conf_regs->mac.mac_dest_mac2, - mac_conf_regs->mac.mac_dest_mac3, - mac_conf_regs->mac.mac_dest_mac4, - mac_conf_regs->mac.mac_dest_mac5, - mac_conf_regs->mac.mac_dest_mac6)); - mac_conf_regs->mac.mac_src_mac1 = ((srcmac >> (8 * 5)) & 0xFF); - mac_conf_regs->mac.mac_src_mac2 = ((srcmac >> (8 * 4)) & 0xFF); - mac_conf_regs->mac.mac_src_mac3 = ((srcmac >> (8 * 3)) & 0xFF); - mac_conf_regs->mac.mac_src_mac4 = ((srcmac >> (8 * 2)) & 0xFF); - mac_conf_regs->mac.mac_src_mac5 = ((srcmac >> (8 * 1)) & 0xFF); - mac_conf_regs->mac.mac_src_mac6 = ((srcmac >> (8 * 0)) & 0xFF); - LOG(logDEBUG1, ("\tSource Mac: %llx %x:%x:%x:%x:%x:%x\n", - srcmac, - mac_conf_regs->mac.mac_src_mac1, - mac_conf_regs->mac.mac_src_mac2, - mac_conf_regs->mac.mac_src_mac3, - mac_conf_regs->mac.mac_src_mac4, - mac_conf_regs->mac.mac_src_mac5, - mac_conf_regs->mac.mac_src_mac6)); - mac_conf_regs->mac.mac_ether_type = 0x0800; //ipv4 + mac_conf *mac_conf_regs = (mac_conf *)(Blackfin_getBaseAddress() + + ENET_CONF_REG / 2); // direct write + mac_conf_regs->mac.mac_dest_mac1 = ((dstmac >> (8 * 5)) & 0xFF); + mac_conf_regs->mac.mac_dest_mac2 = ((dstmac >> (8 * 4)) & 0xFF); + mac_conf_regs->mac.mac_dest_mac3 = ((dstmac >> (8 * 3)) & 0xFF); + mac_conf_regs->mac.mac_dest_mac4 = ((dstmac >> (8 * 2)) & 0xFF); + mac_conf_regs->mac.mac_dest_mac5 = ((dstmac >> (8 * 1)) & 0xFF); + mac_conf_regs->mac.mac_dest_mac6 = ((dstmac >> (8 * 0)) & 0xFF); + LOG(logDEBUG1, + ("\tDestination Mac: %llx %x:%x:%x:%x:%x:%x\n", dstmac, + mac_conf_regs->mac.mac_dest_mac1, mac_conf_regs->mac.mac_dest_mac2, + mac_conf_regs->mac.mac_dest_mac3, mac_conf_regs->mac.mac_dest_mac4, + mac_conf_regs->mac.mac_dest_mac5, mac_conf_regs->mac.mac_dest_mac6)); + mac_conf_regs->mac.mac_src_mac1 = ((srcmac >> (8 * 5)) & 0xFF); + mac_conf_regs->mac.mac_src_mac2 = ((srcmac >> (8 * 4)) & 0xFF); + mac_conf_regs->mac.mac_src_mac3 = ((srcmac >> (8 * 3)) & 0xFF); + mac_conf_regs->mac.mac_src_mac4 = ((srcmac >> (8 * 2)) & 0xFF); + mac_conf_regs->mac.mac_src_mac5 = ((srcmac >> (8 * 1)) & 0xFF); + mac_conf_regs->mac.mac_src_mac6 = ((srcmac >> (8 * 0)) & 0xFF); + LOG(logDEBUG1, + ("\tSource Mac: %llx %x:%x:%x:%x:%x:%x\n", srcmac, + mac_conf_regs->mac.mac_src_mac1, mac_conf_regs->mac.mac_src_mac2, + mac_conf_regs->mac.mac_src_mac3, mac_conf_regs->mac.mac_src_mac4, + mac_conf_regs->mac.mac_src_mac5, mac_conf_regs->mac.mac_src_mac6)); + mac_conf_regs->mac.mac_ether_type = 0x0800; // ipv4 calcChecksum(mac_conf_regs, srcip, dstip); - mac_conf_regs->udp.udp_srcport = srcport; - mac_conf_regs->udp.udp_destport = dstport; - mac_conf_regs->udp.udp_len = udpPacketSize; - mac_conf_regs->udp.udp_chksum = 0x0000; + mac_conf_regs->udp.udp_srcport = srcport; + mac_conf_regs->udp.udp_destport = dstport; + mac_conf_regs->udp.udp_len = udpPacketSize; + mac_conf_regs->udp.udp_chksum = 0x0000; LOG(logDEBUG1, ("\tConfiguring TSE\n")); - tse_conf *tse_conf_regs = (tse_conf*)(Blackfin_getBaseAddress() + TSE_CONF_REG / 2); // direct write - tse_conf_regs->rev = 0xA00; - tse_conf_regs->scratch = 0xCCCCCCCC; - tse_conf_regs->command_config = 0xB; - tse_conf_regs->mac_0 = 0x17231C00; - tse_conf_regs->mac_1 = 0xCB4A; - tse_conf_regs->frm_length = 0x5DC; //max frame length (1500 bytes) (was 0x41C) - tse_conf_regs->pause_quant = 0x0; - tse_conf_regs->rx_section_empty = 0x7F0; - tse_conf_regs->rx_section_full = 0x10; - tse_conf_regs->tx_section_empty = 0x3F8; //was 0x7F0; - tse_conf_regs->tx_section_full = 0x16; - tse_conf_regs->rx_almost_empty = 0x8; - tse_conf_regs->rx_almost_full = 0x8; - tse_conf_regs->tx_almost_empty = 0x8; - tse_conf_regs->tx_almost_full = 0x3; - tse_conf_regs->mdio_addr0 = 0x12; - tse_conf_regs->mdio_addr1 = 0x0; - mac_conf_regs->cdone = 0xFFFFFFFF; + tse_conf *tse_conf_regs = (tse_conf *)(Blackfin_getBaseAddress() + + TSE_CONF_REG / 2); // direct write + tse_conf_regs->rev = 0xA00; + tse_conf_regs->scratch = 0xCCCCCCCC; + tse_conf_regs->command_config = 0xB; + tse_conf_regs->mac_0 = 0x17231C00; + tse_conf_regs->mac_1 = 0xCB4A; + tse_conf_regs->frm_length = + 0x5DC; // max frame length (1500 bytes) (was 0x41C) + tse_conf_regs->pause_quant = 0x0; + tse_conf_regs->rx_section_empty = 0x7F0; + tse_conf_regs->rx_section_full = 0x10; + tse_conf_regs->tx_section_empty = 0x3F8; // was 0x7F0; + tse_conf_regs->tx_section_full = 0x16; + tse_conf_regs->rx_almost_empty = 0x8; + tse_conf_regs->rx_almost_full = 0x8; + tse_conf_regs->tx_almost_empty = 0x8; + tse_conf_regs->tx_almost_full = 0x3; + tse_conf_regs->mdio_addr0 = 0x12; + tse_conf_regs->mdio_addr1 = 0x0; + mac_conf_regs->cdone = 0xFFFFFFFF; bus_w(addr, bus_r(addr) | (INT_RSTN_MSK | WRT_BCK_MSK)); - LOG(logDEBUG1, ("\tWrite shadow regs with int reset. MultiPurpose reg: 0x%x\n", bus_r(addr))); + LOG(logDEBUG1, + ("\tWrite shadow regs with int reset. MultiPurpose reg: 0x%x\n", + bus_r(addr))); usleep(100000); // release write back - bus_w(addr, bus_r(addr) &(~WRT_BCK_MSK)); - LOG(logDEBUG1, ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr))); + bus_w(addr, bus_r(addr) & (~WRT_BCK_MSK)); + LOG(logDEBUG1, + ("\tWrite back released. MultiPurpose reg: 0x%x\n", bus_r(addr))); bus_w(addr, bus_r(addr) | SW1_MSK); LOG(logDEBUG1, ("\tSw1. MultiPurpose reg: 0x%x\n", bus_r(addr))); @@ -1410,8 +1445,9 @@ int configureMAC() { usleep(1000 * 1000); LOG(logDEBUG1, ("\tConfigure Mac Done\n")); { - /** send out first image as first packet does not give 0xcacacaca (needed to know if first image - * when switching back and forth between roi and no roi + /** send out first image as first packet does not give 0xcacacaca + * (needed to know if first image when switching back and forth between + * roi and no roi */ LOG(logINFOBLUE, ("Sending an image to counter the packet numbers\n")); // remember old parameters @@ -1423,46 +1459,51 @@ int configureMAC() { // set to basic parameters LOG(logINFO, ("\tSetting basic parameters\n" - "\tTiming: auto\n" - "\tframes: 1\n" - "\ttriggers: 1\n" - "\tperiod: 1s\n" - "\texptime: 900ms\n")); + "\tTiming: auto\n" + "\tframes: 1\n" + "\ttriggers: 1\n" + "\tperiod: 1s\n" + "\texptime: 900ms\n")); setTiming(AUTO_TIMING); setNumFrames(1); setNumTriggers(1); - setPeriod(1e9); // important to keep this until we have to wait for acquisition to start + setPeriod(1e9); // important to keep this until we have to wait for + // acquisition to start setExpTime(900 * 1000); // take an image if (masterflags == IS_MASTER) - usleep(1 * 1000 * 1000); // required to ensure master starts acquisition only after slave has changed to basic parameters and is waiting + usleep(1 * 1000 * 1000); // required to ensure master starts + // acquisition only after slave has changed + // to basic parameters and is waiting int loop = 0; startStateMachine(); // wait for acquisition to start (trigger from master) LOG(logINFO, ("\tWaiting for acquisition to start\n")); - while(!runBusy()) { + while (!runBusy()) { usleep(0); ++loop; } LOG(logINFO, ("\twaited %d loops to start\n", loop)); - LOG(logINFO, ("\tWaiting for acquisition to end (frames left: %lld)\n", (long long int)getNumFramesLeft())); - // wait for status to be done - while(runBusy()){ - usleep(500); - } + LOG(logINFO, ("\tWaiting for acquisition to end (frames left: %lld)\n", + (long long int)getNumFramesLeft())); + // wait for status to be done + while (runBusy()) { + usleep(500); + } // set to previous parameters LOG(logINFO, ("\tSetting previous parameters:\n" - "\tTiming: %d\n" - "\tframes: %lld\n" - "\ttriggers: %lld\n" - "\tperiod: %lld ns\n" - "\texptime:%lld ns\n", - (int)oldtiming, (long long int)oldframes, (long long int)oldtriggers, - (long long int)oldPeriod, (long long int)oldExptime)); + "\tTiming: %d\n" + "\tframes: %lld\n" + "\ttriggers: %lld\n" + "\tperiod: %lld ns\n" + "\texptime:%lld ns\n", + (int)oldtiming, (long long int)oldframes, + (long long int)oldtriggers, (long long int)oldPeriod, + (long long int)oldExptime)); setTiming(oldtiming); setNumFrames(oldframes); setNumTriggers(oldtriggers); @@ -1473,29 +1514,24 @@ int configureMAC() { return OK; } - -int getAdcConfigured(){ - return adcConfigured; -} +int getAdcConfigured() { return adcConfigured; } int setDetectorPosition(int pos[]) { memcpy(detPos, pos, sizeof(detPos)); return OK; } -int* getDetectorPosition() { - return detPos; -} +int *getDetectorPosition() { return detPos; } /* gotthard specific - adc phase */ int setPhase(enum CLKINDEX ind, int val, int degrees) { if (ind != ADC_CLK) { - LOG(logERROR, ("Unknown clock index: %d\n", ind)); - return FAIL; - } + LOG(logERROR, ("Unknown clock index: %d\n", ind)); + return FAIL; + } if (degrees != 0) { - LOG(logERROR, ("Cannot set phase in degrees\n")); - return FAIL; + LOG(logERROR, ("Cannot set phase in degrees\n")); + return FAIL; } setPhaseShift(val); return OK; @@ -1503,58 +1539,58 @@ int setPhase(enum CLKINDEX ind, int val, int degrees) { /* aquisition */ -int startStateMachine(){ +int startStateMachine() { #ifdef VIRTUAL - // create udp socket - if(createUDPSocket(0) != OK) { - return FAIL; - } - LOG(logINFOBLUE, ("Starting State Machine\n")); + // create udp socket + if (createUDPSocket(0) != OK) { + return FAIL; + } + LOG(logINFOBLUE, ("Starting State Machine\n")); virtual_status = 1; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - virtual_stop = ComVirtual_getStop(); - if (virtual_stop != 0) { - LOG(logERROR, ("Cant start acquisition. " - "Stop server has not updated stop status to 0\n")); - return FAIL; - } - } - if(pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { - LOG(logERROR, ("Could not start Virtual acquisition thread\n")); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - return FAIL; - } - LOG(logINFOGREEN, ("Virtual Acquisition started\n")); - return OK; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + virtual_stop = ComVirtual_getStop(); + if (virtual_stop != 0) { + LOG(logERROR, ("Cant start acquisition. " + "Stop server has not updated stop status to 0\n")); + return FAIL; + } + } + if (pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { + LOG(logERROR, ("Could not start Virtual acquisition thread\n")); + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + return FAIL; + } + LOG(logINFOGREEN, ("Virtual Acquisition started\n")); + return OK; #endif - LOG(logINFOBLUE, ("Starting State Machine\n")); - LOG(logINFO, ("#frames to acquire:%lld\n", (long long int)getNumFrames())); + LOG(logINFOBLUE, ("Starting State Machine\n")); + LOG(logINFO, ("#frames to acquire:%lld\n", (long long int)getNumFrames())); - cleanFifos(); + cleanFifos(); - //start state machine - bus_w16(CONTROL_REG, CONTROL_STRT_ACQ_MSK | CONTROL_STRT_EXPSR_MSK); - bus_w16(CONTROL_REG, 0x0); - runState(logINFO); - return OK; + // start state machine + bus_w16(CONTROL_REG, CONTROL_STRT_ACQ_MSK | CONTROL_STRT_EXPSR_MSK); + bus_w16(CONTROL_REG, 0x0); + runState(logINFO); + return OK; } #ifdef VIRTUAL -void* start_timer(void* arg) { - if (!isControlServer) { - return NULL; - } +void *start_timer(void *arg) { + if (!isControlServer) { + return NULL; + } - int64_t periodNs = getPeriod(); - int numFrames = (getNumFrames() * - getNumTriggers() ); - int64_t expUs = getExpTime() / 1000; + int64_t periodNs = getPeriod(); + int numFrames = (getNumFrames() * getNumTriggers()); + int64_t expUs = getExpTime() / 1000; - int imageSize = adcConfigured == -1 ? DATA_BYTES : NCHAN_PER_ADC * NUM_BITS_PER_PIXEL; + int imageSize = + adcConfigured == -1 ? DATA_BYTES : NCHAN_PER_ADC * NUM_BITS_PER_PIXEL; int dataSize = adcConfigured == -1 ? 1280 : 512; int packetSize = adcConfigured == -1 ? 1286 : 518; int packetsPerFrame = adcConfigured == -1 ? 2 : 1; @@ -1565,24 +1601,24 @@ void* start_timer(void* arg) { { int i = 0; if (adcConfigured == -1) { - *((uint32_t*)(imageData)) = 0xCACACACA; + *((uint32_t *)(imageData)) = 0xCACACACA; } for (i = sizeof(uint32_t); i < imageSize; i += sizeof(uint16_t)) { - *((uint16_t*)(imageData + i)) = (uint16_t)i; - } + *((uint16_t *)(imageData + i)) = (uint16_t)i; + } } - // Send data + // Send data { int frameNr = 0; uint16_t frameHeaderNr = 2; // loop over number of frames - for(frameNr = 0; frameNr != numFrames; ++frameNr ) { + for (frameNr = 0; frameNr != numFrames; ++frameNr) { - // update the virtual stop from stop server - virtual_stop = ComVirtual_getStop(); - //check if virtual_stop is high - if(virtual_stop == 1){ + // update the virtual stop from stop server + virtual_stop = ComVirtual_getStop(); + // check if virtual_stop is high + if (virtual_stop == 1) { break; } @@ -1595,70 +1631,70 @@ void* start_timer(void* arg) { // loop packet { int i = 0; - for(i = 0; i != packetsPerFrame; ++i) { - + for (i = 0; i != packetsPerFrame; ++i) { + char packetData[packetSize]; memset(packetData, 0, packetSize); // set header - *((uint16_t*)(packetData)) = frameHeaderNr; + *((uint16_t *)(packetData)) = frameHeaderNr; ++frameHeaderNr; // fill data memcpy(packetData + 4, imageData + srcOffset, dataSize); srcOffset += dataSize; - + sendUDPPacket(0, packetData, packetSize); } } LOG(logINFO, ("Sent frame: %d\n", frameNr)); clock_gettime(CLOCK_REALTIME, &end); int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 + - (end.tv_nsec - begin.tv_nsec)); + (end.tv_nsec - begin.tv_nsec)); // sleep for (period - exptime) if (frameNr < numFrames) { // if there is a next frame if (periodNs > timeNs) { - usleep((periodNs - timeNs)/ 1000); + usleep((periodNs - timeNs) / 1000); } } } } - closeUDPSocket(0); + closeUDPSocket(0); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - LOG(logINFOBLUE, ("Finished Acquiring\n")); - return NULL; + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + LOG(logINFOBLUE, ("Finished Acquiring\n")); + return NULL; } #endif -int stopStateMachine(){ - LOG(logINFORED, ("Stopping State Machine\n")); +int stopStateMachine() { + LOG(logINFORED, ("Stopping State Machine\n")); #ifdef VIRTUAL - if (!isControlServer) { - virtual_stop = 1; - ComVirtual_setStop(virtual_stop); - // read till status is idle - int tempStatus = 1; - while(tempStatus == 1) { - tempStatus = ComVirtual_getStatus(); - } - virtual_stop = 0; - ComVirtual_setStop(virtual_stop); - LOG(logINFO, ("Stopped State Machine\n")); - } - return OK; + if (!isControlServer) { + virtual_stop = 1; + ComVirtual_setStop(virtual_stop); + // read till status is idle + int tempStatus = 1; + while (tempStatus == 1) { + tempStatus = ComVirtual_getStatus(); + } + virtual_stop = 0; + ComVirtual_setStop(virtual_stop); + LOG(logINFO, ("Stopped State Machine\n")); + } + return OK; #endif - //stop state machine - bus_w16(CONTROL_REG, CONTROL_STP_ACQ_MSK); - usleep(100); - bus_w16(CONTROL_REG, 0x0); + // stop state machine + bus_w16(CONTROL_REG, CONTROL_STP_ACQ_MSK); + usleep(100); + bus_w16(CONTROL_REG, 0x0); - // check - usleep(500); + // check + usleep(500); if ((runState(logDEBUG1) & STATUS_RN_MSHN_BSY_MSK)) { LOG(logERROR, ("\tFailed to stop state machine.\n")); runState(logINFORED); @@ -1666,33 +1702,33 @@ int stopStateMachine(){ } runState(logINFO); - return OK; + return OK; } -enum runStatus getRunStatus(){ +enum runStatus getRunStatus() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } - if(virtual_status == 0) { - LOG(logINFOBLUE, ("Status: IDLE\n")); - return IDLE; - }else{ - LOG(logINFOBLUE, ("Status: RUNNING\n")); - return RUNNING; - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } + if (virtual_status == 0) { + LOG(logINFOBLUE, ("Status: IDLE\n")); + return IDLE; + } else { + LOG(logINFOBLUE, ("Status: RUNNING\n")); + return RUNNING; + } #endif - LOG(logDEBUG1, ("Getting status\n")); + LOG(logDEBUG1, ("Getting status\n")); - enum runStatus s = IDLE; - u_int32_t retval = runState(logINFO); + enum runStatus s = IDLE; + u_int32_t retval = runState(logINFO); - // finished (external stop or fifo full) - if (retval & STATUS_RN_FNSHD_MSK) { - LOG(logINFORED, ("Status: Stopped\n")); - s = STOPPED; + // finished (external stop or fifo full) + if (retval & STATUS_RN_FNSHD_MSK) { + LOG(logINFORED, ("Status: Stopped\n")); + s = STOPPED; - LOG(logINFO, ("\t Reading status reg again\n")); + LOG(logINFO, ("\t Reading status reg again\n")); retval = runState(logINFO); // fifo full if (runState(logDEBUG1) & STATUS_RN_FNSHD_MSK) { @@ -1700,88 +1736,89 @@ enum runStatus getRunStatus(){ runState(logINFORED); s = ERROR; } - } + } - // error (fifo full) - else if (retval & STATUS_SM_FF_FLL_MSK) { + // error (fifo full) + else if (retval & STATUS_SM_FF_FLL_MSK) { LOG(logINFORED, ("Status: Error\n")); s = ERROR; - } + } - // not running - else if (!(retval & STATUS_RN_BSY_MSK)) { - // read last frames - if (retval & STATUS_RD_MSHN_BSY_MSK) { - LOG(logINFOBLUE, ("Status: Read Machine Busy\n")); - s = TRANSMITTING; - } - // ??? - else if (retval & STATUS_ALL_FF_EMPTY_MSK) { + // not running + else if (!(retval & STATUS_RN_BSY_MSK)) { + // read last frames + if (retval & STATUS_RD_MSHN_BSY_MSK) { + LOG(logINFOBLUE, ("Status: Read Machine Busy\n")); + s = TRANSMITTING; + } + // ??? + else if (retval & STATUS_ALL_FF_EMPTY_MSK) { LOG(logINFOBLUE, ("Status: Data in Fifo\n")); s = TRANSMITTING; - } - // idle, unknown - else if (!(retval & STATUS_IDLE_MSK)) { + } + // idle, unknown + else if (!(retval & STATUS_IDLE_MSK)) { LOG(logINFOBLUE, ("Status: IDLE\n")); s = IDLE; - } else { - LOG(logINFORED, ("Status: Unknown Status: 0x%x. Trying again.\n", retval)); + } else { + LOG(logINFORED, + ("Status: Unknown Status: 0x%x. Trying again.\n", retval)); int iloop = 0; for (iloop = 0; iloop < 10; ++iloop) { usleep(1000 * 1000); if (runState(logDEBUG1) != retval) return getRunStatus(); } - s = ERROR; - } - } + s = ERROR; + } + } - // running - else { - if (retval & STATUS_WTNG_FR_TRGGR_MSK){ - LOG(logINFOBLUE, ("Status: Waiting\n")); - s = WAITING; - } - else{ - LOG(logINFOBLUE, ("Status: Running\n")); - s = RUNNING; - } - } + // running + else { + if (retval & STATUS_WTNG_FR_TRGGR_MSK) { + LOG(logINFOBLUE, ("Status: Waiting\n")); + s = WAITING; + } else { + LOG(logINFOBLUE, ("Status: Running\n")); + s = RUNNING; + } + } - return s; + return s; } -void readFrame(int *ret, char *mess){ +void readFrame(int *ret, char *mess) { #ifdef VIRTUAL - while(virtual_status) { - //LOG(logERROR, ("Waiting for finished flag\n"); - usleep(5000); - } - return; + while (virtual_status) { + // LOG(logERROR, ("Waiting for finished flag\n"); + usleep(5000); + } + return; #endif - // wait for status to be done - while(runBusy()){ - usleep(500); - } + // wait for status to be done + while (runBusy()) { + usleep(500); + } - // frames left to give status + // frames left to give status *ret = (int)OK; - int64_t retval = getNumFramesLeft() + 1; - if ( retval > -1) { - LOG(logERROR, ("No data and run stopped: %lld frames left\n",(long long int)retval)); - } else { - LOG(logINFOGREEN, ("Acquisition successfully finished\n")); - } + int64_t retval = getNumFramesLeft() + 1; + if (retval > -1) { + LOG(logERROR, ("No data and run stopped: %lld frames left\n", + (long long int)retval)); + } else { + LOG(logINFOGREEN, ("Acquisition successfully finished\n")); + } } u_int32_t runBusy() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } return virtual_status; #endif - return runState(logDEBUG1) & STATUS_RN_BSY_MSK; + return runState(logDEBUG1) & STATUS_RN_BSY_MSK; } u_int32_t runState(enum TLogLevel lev) { @@ -1795,13 +1832,11 @@ u_int32_t runState(enum TLogLevel lev) { /* common */ -int calculateDataBytes(){ - return DATA_BYTES; +int calculateDataBytes() { return DATA_BYTES; } + +int getTotalNumberOfChannels() { + return (getNumberOfChannelsPerChip() * getNumberOfChips()); } - -int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());} -int getNumberOfChips(){return NCHIP;} -int getNumberOfDACs(){return NDAC;} -int getNumberOfChannelsPerChip(){return NCHAN;} - - +int getNumberOfChips() { return NCHIP; } +int getNumberOfDACs() { return NDAC; } +int getNumberOfChannelsPerChip() { return NCHAN; } diff --git a/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c old mode 100755 new mode 100644 index d20e4f8b1..fce3c6507 --- a/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c @@ -1,20 +1,20 @@ #include "slsDetectorFunctionList.h" -#include "versionAPI.h" #include "clogger.h" +#include "versionAPI.h" +#include "ALTERA_PLL.h" // pll #include "LTC2620.h" // dacs #include "MAX1932.h" // hv -#include "ALTERA_PLL.h" // pll #include "common.h" #ifdef VIRTUAL #include "communication_funcs_UDP.h" #include "communication_virtual.h" #endif -#include -#include // usleep -#include #include +#include +#include +#include // usleep #ifdef VIRTUAL #include #include @@ -27,8 +27,8 @@ extern const enum detectorType myDetectorType; // Global variable from communication_funcs.c extern int isControlServer; -extern void getMacAddressinString(char* cmac, int size, uint64_t mac); -extern void getIpAddressinString(char* cip, uint32_t ip); +extern void getMacAddressinString(char *cmac, int size, uint64_t mac); +extern void getIpAddressinString(char *cip, uint32_t ip); int initError = OK; int initCheckDone = 0; @@ -48,15 +48,11 @@ int32_t clkPhase[NUM_CLOCKS] = {}; int detPos[4] = {}; int numUDPInterfaces = 1; +int isInitCheckDone() { return initCheckDone; } - -int isInitCheckDone() { - return initCheckDone; -} - -int getInitResult(char** mess) { - *mess = initErrorMessage; - return initError; +int getInitResult(char **mess) { + *mess = initErrorMessage; + return initError; } void basictests() { @@ -66,175 +62,174 @@ void basictests() { #ifdef VIRTUAL LOG(logINFOBLUE, ("******** Jungfrau Virtual Server *****************\n")); if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; } return; #else - defineGPIOpins(); - resetFPGA(); + defineGPIOpins(); + resetFPGA(); if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; } // does check only if flag is 0 (by default), set by command line - if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL) || (testBus() == FAIL))) { - strcpy(initErrorMessage, - "Could not pass basic tests of FPGA and bus. Dangerous to continue.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; - } + if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL) || + (testBus() == FAIL))) { + strcpy(initErrorMessage, "Could not pass basic tests of FPGA and bus. " + "Dangerous to continue.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; + } - uint16_t hversion = getHardwareVersionNumber(); - uint16_t hsnumber = getHardwareSerialNumber(); - uint32_t ipadd = getDetectorIP(); - uint64_t macadd = getDetectorMAC(); - int64_t fwversion = getFirmwareVersion(); - int64_t swversion = getServerVersion(); - int64_t sw_fw_apiversion = 0; - int64_t client_sw_apiversion = getClientServerAPIVersion(); - uint32_t requiredFirmwareVersion = (isHardwareVersion2() ? REQRD_FRMWRE_VRSN_BOARD2 : REQRD_FRMWRE_VRSN); + uint16_t hversion = getHardwareVersionNumber(); + uint16_t hsnumber = getHardwareSerialNumber(); + uint32_t ipadd = getDetectorIP(); + uint64_t macadd = getDetectorMAC(); + int64_t fwversion = getFirmwareVersion(); + int64_t swversion = getServerVersion(); + int64_t sw_fw_apiversion = 0; + int64_t client_sw_apiversion = getClientServerAPIVersion(); + uint32_t requiredFirmwareVersion = + (isHardwareVersion2() ? REQRD_FRMWRE_VRSN_BOARD2 : REQRD_FRMWRE_VRSN); + if (fwversion >= MIN_REQRD_VRSN_T_RD_API) + sw_fw_apiversion = getFirmwareAPIVersion(); + LOG(logINFOBLUE, + ("************ Jungfrau Server *********************\n" + "Hardware Version:\t\t 0x%x\n" + "Hardware Serial Nr:\t\t 0x%x\n" - if (fwversion >= MIN_REQRD_VRSN_T_RD_API) - sw_fw_apiversion = getFirmwareAPIVersion(); - LOG(logINFOBLUE, ("************ Jungfrau Server *********************\n" - "Hardware Version:\t\t 0x%x\n" - "Hardware Serial Nr:\t\t 0x%x\n" + "Detector IP Addr:\t\t 0x%x\n" + "Detector MAC Addr:\t\t 0x%llx\n\n" - "Detector IP Addr:\t\t 0x%x\n" - "Detector MAC Addr:\t\t 0x%llx\n\n" + "Firmware Version:\t\t 0x%llx\n" + "Software Version:\t\t 0x%llx\n" + "F/w-S/w API Version:\t\t 0x%llx\n" + "Required Firmware Version:\t 0x%x\n" + "Client-Software API Version:\t 0x%llx\n" + "********************************************************\n", + hversion, hsnumber, ipadd, (long long unsigned int)macadd, + (long long int)fwversion, (long long int)swversion, + (long long int)sw_fw_apiversion, requiredFirmwareVersion, + (long long int)client_sw_apiversion)); - "Firmware Version:\t\t 0x%llx\n" - "Software Version:\t\t 0x%llx\n" - "F/w-S/w API Version:\t\t 0x%llx\n" - "Required Firmware Version:\t 0x%x\n" - "Client-Software API Version:\t 0x%llx\n" - "********************************************************\n", - hversion, hsnumber, - ipadd, - (long long unsigned int)macadd, - (long long int)fwversion, - (long long int)swversion, - (long long int)sw_fw_apiversion, - requiredFirmwareVersion, - (long long int)client_sw_apiversion - )); + // return if flag is not zero, debug mode + if (debugflag) { + return; + } - // return if flag is not zero, debug mode - if (debugflag) { - return; - } - - - //cant read versions + // cant read versions LOG(logINFO, ("Testing Firmware-software compatibility:\n")); - if(!fwversion || !sw_fw_apiversion){ - strcpy(initErrorMessage, - "Cant read versions from FPGA. Please update firmware.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + if (!fwversion || !sw_fw_apiversion) { + strcpy(initErrorMessage, + "Cant read versions from FPGA. Please update firmware.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for API compatibility - old server - if(sw_fw_apiversion > requiredFirmwareVersion){ - sprintf(initErrorMessage, - "This detector software software version (0x%llx) is incompatible.\n" - "Please update detector software (min. 0x%llx) to be compatible with this firmware.\n", - (long long int)sw_fw_apiversion, - (long long int)requiredFirmwareVersion); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + // check for API compatibility - old server + if (sw_fw_apiversion > requiredFirmwareVersion) { + sprintf(initErrorMessage, + "This detector software software version (0x%llx) is " + "incompatible.\n" + "Please update detector software (min. 0x%llx) to be " + "compatible with this firmware.\n", + (long long int)sw_fw_apiversion, + (long long int)requiredFirmwareVersion); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for firmware compatibility - old firmware - if( requiredFirmwareVersion > fwversion) { - sprintf(initErrorMessage, - "This firmware version (0x%llx) is incompatible.\n" - "Please update firmware (min. 0x%llx) to be compatible with this server.\n", - (long long int)fwversion, - (long long int)requiredFirmwareVersion); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } - LOG(logINFO, ("Compatibility - success\n")); + // check for firmware compatibility - old firmware + if (requiredFirmwareVersion > fwversion) { + sprintf(initErrorMessage, + "This firmware version (0x%llx) is incompatible.\n" + "Please update firmware (min. 0x%llx) to be compatible with " + "this server.\n", + (long long int)fwversion, + (long long int)requiredFirmwareVersion); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } + LOG(logINFO, ("Compatibility - success\n")); #endif } - int checkType() { #ifdef VIRTUAL return OK; #endif - u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); - if (type != JUNGFRAU){ - LOG(logERROR, ("This is not a Jungfrau firmware (read %d, expected %d)\n", type, JUNGFRAU)); - return FAIL; - } + u_int32_t type = + ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); + if (type != JUNGFRAU) { + LOG(logERROR, + ("This is not a Jungfrau firmware (read %d, expected %d)\n", type, + JUNGFRAU)); + return FAIL; + } - return OK; + return OK; } - - int testFpga() { #ifdef VIRTUAL return OK; #endif - LOG(logINFO, ("Testing FPGA:\n")); + LOG(logINFO, ("Testing FPGA:\n")); - //fixed pattern - int ret = OK; - volatile u_int32_t val = bus_r(FIX_PATT_REG); - if (val == FIX_PATT_VAL) { - LOG(logINFO, ("Fixed pattern: successful match 0x%08x\n",val)); - } else { - LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL)); - ret = FAIL; - } - return ret; + // fixed pattern + int ret = OK; + volatile u_int32_t val = bus_r(FIX_PATT_REG); + if (val == FIX_PATT_VAL) { + LOG(logINFO, ("Fixed pattern: successful match 0x%08x\n", val)); + } else { + LOG(logERROR, + ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", + val, FIX_PATT_VAL)); + ret = FAIL; + } + return ret; } - int testBus() { #ifdef VIRTUAL return OK; #endif - LOG(logINFO, ("Testing Bus:\n")); + LOG(logINFO, ("Testing Bus:\n")); - int ret = OK; - u_int32_t addr = SET_TRIGGER_DELAY_LSB_REG; - u_int32_t times = 1000 * 1000; - u_int32_t i = 0; + int ret = OK; + u_int32_t addr = SET_TRIGGER_DELAY_LSB_REG; + u_int32_t times = 1000 * 1000; + u_int32_t i = 0; - for (i = 0; i < times; ++i) { - bus_w(addr, i * 100); - if (i * 100 != bus_r(addr)) { - LOG(logERROR, ("Mismatch! Wrote 0x%x, read 0x%x\n", - i * 100, bus_r(addr))); - ret = FAIL; - } - } + for (i = 0; i < times; ++i) { + bus_w(addr, i * 100); + if (i * 100 != bus_r(addr)) { + LOG(logERROR, + ("Mismatch! Wrote 0x%x, read 0x%x\n", i * 100, bus_r(addr))); + ret = FAIL; + } + } - bus_w(addr, 0); + bus_w(addr, 0); - if (ret == OK) { - LOG(logINFO, ("Successfully tested bus %d times\n", times)); - } - return ret; + if (ret == OK) { + LOG(logINFO, ("Successfully tested bus %d times\n", times)); + } + return ret; } - #ifdef VIRTUAL void setTestImageMode(int ival) { if (ival >= 0) { @@ -248,27 +243,21 @@ void setTestImageMode(int ival) { } } -int getTestImageMode() { - return virtual_image_test_mode; -} +int getTestImageMode() { return virtual_image_test_mode; } #endif - /* Ids */ -uint64_t getServerVersion() { - return APIJUNGFRAU; -} +uint64_t getServerVersion() { return APIJUNGFRAU; } -uint64_t getClientServerAPIVersion() { - return APIJUNGFRAU; -} +uint64_t getClientServerAPIVersion() { return APIJUNGFRAU; } u_int64_t getFirmwareVersion() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(FPGA_VERSION_REG) & FPGA_COMPILATION_DATE_MSK) >> FPGA_COMPILATION_DATE_OFST); + return ((bus_r(FPGA_VERSION_REG) & FPGA_COMPILATION_DATE_MSK) >> + FPGA_COMPILATION_DATE_OFST); } u_int64_t getFirmwareAPIVersion() { @@ -282,117 +271,109 @@ u_int16_t getHardwareVersionNumber() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(MOD_SERIAL_NUM_REG) & HARDWARE_VERSION_NUM_MSK) >> HARDWARE_VERSION_NUM_OFST); + return ((bus_r(MOD_SERIAL_NUM_REG) & HARDWARE_VERSION_NUM_MSK) >> + HARDWARE_VERSION_NUM_OFST); } u_int16_t getHardwareSerialNumber() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(MOD_SERIAL_NUM_REG) & HARDWARE_SERIAL_NUM_MSK) >> HARDWARE_SERIAL_NUM_OFST); + return ((bus_r(MOD_SERIAL_NUM_REG) & HARDWARE_SERIAL_NUM_MSK) >> + HARDWARE_SERIAL_NUM_OFST); } -int isHardwareVersion2() { - return (((bus_r(MOD_SERIAL_NUM_REG) & HARDWARE_VERSION_NUM_MSK) == HARDWARE_VERSION_2_VAL) ? 1 : 0 ); +int isHardwareVersion2() { + return (((bus_r(MOD_SERIAL_NUM_REG) & HARDWARE_VERSION_NUM_MSK) == + HARDWARE_VERSION_2_VAL) + ? 1 + : 0); } -u_int32_t getDetectorNumber(){ +u_int32_t getDetectorNumber() { #ifdef VIRTUAL return 0; #endif - return bus_r(MOD_SERIAL_NUM_REG); + return bus_r(MOD_SERIAL_NUM_REG); } -u_int64_t getDetectorMAC() { +u_int64_t getDetectorMAC() { #ifdef VIRTUAL return 0; #else - char output[255],mac[255]=""; - u_int64_t res=0; - FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - //getting rid of ":" - char * pch; - pch = strtok (output,":"); - while (pch != NULL){ - strcat(mac,pch); - pch = strtok (NULL, ":"); - } - sscanf(mac,"%llx",&res); - return res; + char output[255], mac[255] = ""; + u_int64_t res = 0; + FILE *sysFile = + popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + // getting rid of ":" + char *pch; + pch = strtok(output, ":"); + while (pch != NULL) { + strcat(mac, pch); + pch = strtok(NULL, ":"); + } + sscanf(mac, "%llx", &res); + return res; #endif } -u_int32_t getDetectorIP(){ +u_int32_t getDetectorIP() { #ifdef VIRTUAL return 0; #endif - char temp[50]=""; - u_int32_t res=0; - //execute and get address - char output[255]; - FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); + char temp[50] = ""; + u_int32_t res = 0; + // execute and get address + char output[255]; + FILE *sysFile = popen( + "ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", + "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); - //converting IPaddress to hex. - char* pcword = strtok (output,"."); - while (pcword != NULL) { - sprintf(output,"%02x",atoi(pcword)); - strcat(temp,output); - pcword = strtok (NULL, "."); - } - strcpy(output,temp); - sscanf(output, "%x", &res); - //LOG(logINFO, ("ip:%x\n",res); + // converting IPaddress to hex. + char *pcword = strtok(output, "."); + while (pcword != NULL) { + sprintf(output, "%02x", atoi(pcword)); + strcat(temp, output); + pcword = strtok(NULL, "."); + } + strcpy(output, temp); + sscanf(output, "%x", &res); + // LOG(logINFO, ("ip:%x\n",res); - return res; + return res; } - - - - - - - /* initialization */ -void initControlServer(){ - if (initError == OK) { - setupDetector(); - } - initCheckDone = 1; +void initControlServer() { + if (initError == OK) { + setupDetector(); + } + initCheckDone = 1; } - - void initStopServer() { - usleep(CTRL_SRVR_INIT_TIME_US); - if (mapCSP0() == FAIL) { - LOG(logERROR, ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); - exit(EXIT_FAILURE); - } + usleep(CTRL_SRVR_INIT_TIME_US); + if (mapCSP0() == FAIL) { + LOG(logERROR, + ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); + exit(EXIT_FAILURE); + } #ifdef VIRTUAL - virtual_stop = 0; - if (!isControlServer) { - ComVirtual_setStop(virtual_stop); - } + virtual_stop = 0; + if (!isControlServer) { + ComVirtual_setStop(virtual_stop); + } #endif } - - - - - /* set up detector */ - - - void setupDetector() { LOG(logINFO, ("This Server is for 1 Jungfrau module (500k)\n")); @@ -401,190 +382,194 @@ void setupDetector() { for (i = 0; i < NUM_CLOCKS; ++i) { clkPhase[i] = 0; } - } + } #ifdef VIRTUAL - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } #endif ALTERA_PLL_ResetPLL(); - resetCore(); - resetPeripheral(); - cleanFifos(); + resetCore(); + resetPeripheral(); + cleanFifos(); - // hv - MAX1932_SetDefines(SPI_REG, SPI_HV_SRL_CS_OTPT_MSK, SPI_HV_SRL_CLK_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_OFST, HIGHVOLTAGE_MIN, HIGHVOLTAGE_MAX); + // hv + MAX1932_SetDefines(SPI_REG, SPI_HV_SRL_CS_OTPT_MSK, SPI_HV_SRL_CLK_OTPT_MSK, + SPI_HV_SRL_DGTL_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_OFST, + HIGHVOLTAGE_MIN, HIGHVOLTAGE_MAX); MAX1932_Disable(); setHighVoltage(DEFAULT_HIGH_VOLTAGE); - // adc - AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST); + // adc + AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, + ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, + ADC_SPI_SRL_DT_OTPT_OFST); AD9257_Disable(); AD9257_Configure(); - //dac - LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, DAC_MAX_MV); + // dac + LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, + SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, + SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, + DAC_MAX_MV); LTC2620_Disable(); LTC2620_Configure(); - setDefaultDacs(); + setDefaultDacs(); // altera pll - ALTERA_PLL_SetDefines(PLL_CNTRL_REG, PLL_PARAM_REG, PLL_CNTRL_RCNFG_PRMTR_RST_MSK, PLL_CNTRL_WR_PRMTR_MSK, PLL_CNTRL_PLL_RST_MSK, PLL_CNTRL_ADDR_MSK, PLL_CNTRL_ADDR_OFST, PLL_CNTRL_DBIT_WR_PRMTR_MSK, DBIT_CLK_INDEX); + ALTERA_PLL_SetDefines( + PLL_CNTRL_REG, PLL_PARAM_REG, PLL_CNTRL_RCNFG_PRMTR_RST_MSK, + PLL_CNTRL_WR_PRMTR_MSK, PLL_CNTRL_PLL_RST_MSK, PLL_CNTRL_ADDR_MSK, + PLL_CNTRL_ADDR_OFST, PLL_CNTRL_DBIT_WR_PRMTR_MSK, DBIT_CLK_INDEX); - bus_w(DAQ_REG, 0x0); /* Only once at server startup */ + bus_w(DAQ_REG, 0x0); /* Only once at server startup */ - LOG(logINFOBLUE, ("Setting Default parameters\n")); - setClockDivider(RUN_CLK, HALF_SPEED); - cleanFifos(); - resetCore(); + LOG(logINFOBLUE, ("Setting Default parameters\n")); + setClockDivider(RUN_CLK, HALF_SPEED); + cleanFifos(); + resetCore(); - alignDeserializer(); - configureASICTimer(); - bus_w(ADC_PORT_INVERT_REG, (isHardwareVersion2() ? ADC_PORT_INVERT_BOARD2_VAL : ADC_PORT_INVERT_VAL)); + alignDeserializer(); + configureASICTimer(); + bus_w(ADC_PORT_INVERT_REG, + (isHardwareVersion2() ? ADC_PORT_INVERT_BOARD2_VAL + : ADC_PORT_INVERT_VAL)); - initReadoutConfiguration(); + initReadoutConfiguration(); - //Initialization of acquistion parameters - setSettings(DEFAULT_SETTINGS); + // Initialization of acquistion parameters + setSettings(DEFAULT_SETTINGS); - setNumFrames(DEFAULT_NUM_FRAMES); - setNumTriggers(DEFAULT_NUM_CYCLES); - setExpTime(DEFAULT_EXPTIME); - setPeriod(DEFAULT_PERIOD); - setDelayAfterTrigger(DEFAULT_DELAY); - setNumAdditionalStorageCells(DEFAULT_NUM_STRG_CLLS); - setStorageCellDelay(DEFAULT_STRG_CLL_DLY); - selectStoragecellStart(DEFAULT_STRG_CLL_STRT); - /*setClockDivider(RUN_CLK, HALF_SPEED); depends if all the previous stuff works*/ - setTiming(DEFAULT_TIMING_MODE); - setStartingFrameNumber(DEFAULT_STARTING_FRAME_NUMBER); + setNumFrames(DEFAULT_NUM_FRAMES); + setNumTriggers(DEFAULT_NUM_CYCLES); + setExpTime(DEFAULT_EXPTIME); + setPeriod(DEFAULT_PERIOD); + setDelayAfterTrigger(DEFAULT_DELAY); + setNumAdditionalStorageCells(DEFAULT_NUM_STRG_CLLS); + setStorageCellDelay(DEFAULT_STRG_CLL_DLY); + selectStoragecellStart(DEFAULT_STRG_CLL_STRT); + /*setClockDivider(RUN_CLK, HALF_SPEED); depends if all the previous stuff + * works*/ + setTiming(DEFAULT_TIMING_MODE); + setStartingFrameNumber(DEFAULT_STARTING_FRAME_NUMBER); - - // temp threshold and reset event - setThresholdTemperature(DEFAULT_TMP_THRSHLD); - setTemperatureEvent(0); + // temp threshold and reset event + setThresholdTemperature(DEFAULT_TMP_THRSHLD); + setTemperatureEvent(0); } - int setDefaultDacs() { - int ret = OK; - LOG(logINFOBLUE, ("Setting Default Dac values\n")); - { - int i = 0; - const int defaultvals[NDAC] = DEFAULT_DAC_VALS; - for(i = 0; i < NDAC; ++i) { - // if not already default, set it to default - if (dacValues[i] != defaultvals[i]) { - setDAC((enum DACINDEX)i,defaultvals[i],0); - } - } - } - return ret; + int ret = OK; + LOG(logINFOBLUE, ("Setting Default Dac values\n")); + { + int i = 0; + const int defaultvals[NDAC] = DEFAULT_DAC_VALS; + for (i = 0; i < NDAC; ++i) { + // if not already default, set it to default + if (dacValues[i] != defaultvals[i]) { + setDAC((enum DACINDEX)i, defaultvals[i], 0); + } + } + } + return ret; } - - - /* firmware functions (resets) */ - void cleanFifos() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Clearing Acquisition Fifos\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_ACQ_FIFO_CLR_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_ACQ_FIFO_CLR_MSK); + LOG(logINFO, ("Clearing Acquisition Fifos\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_ACQ_FIFO_CLR_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_ACQ_FIFO_CLR_MSK); } void resetCore() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Resetting Core\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CORE_RST_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CORE_RST_MSK); - usleep(1000 * 1000); + LOG(logINFO, ("Resetting Core\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CORE_RST_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CORE_RST_MSK); + usleep(1000 * 1000); } void resetPeripheral() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Resetting Peripheral\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PERIPHERAL_RST_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PERIPHERAL_RST_MSK); + LOG(logINFO, ("Resetting Peripheral\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PERIPHERAL_RST_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PERIPHERAL_RST_MSK); } - - - - /* set parameters - dr, roi */ - - -int setDynamicRange(int dr){ - return DYNAMIC_RANGE; -} +int setDynamicRange(int dr) { return DYNAMIC_RANGE; } void setADCInvertRegister(uint32_t val) { LOG(logINFO, ("Setting ADC Port Invert Reg to 0x%x\n", val)); - uint32_t defaultValue = (isHardwareVersion2() ? ADC_PORT_INVERT_BOARD2_VAL : ADC_PORT_INVERT_VAL); - uint32_t changeValue = defaultValue ^ val; - LOG(logINFO, ("\t default: 0x%x, final:0x%x\n", defaultValue, changeValue)); + uint32_t defaultValue = (isHardwareVersion2() ? ADC_PORT_INVERT_BOARD2_VAL + : ADC_PORT_INVERT_VAL); + uint32_t changeValue = defaultValue ^ val; + LOG(logINFO, ("\t default: 0x%x, final:0x%x\n", defaultValue, changeValue)); bus_w(ADC_PORT_INVERT_REG, changeValue); } uint32_t getADCInvertRegister() { uint32_t readValue = bus_r(ADC_PORT_INVERT_REG); - int32_t defaultValue = (isHardwareVersion2() ? ADC_PORT_INVERT_BOARD2_VAL : ADC_PORT_INVERT_VAL); - uint32_t val = defaultValue ^ readValue; - LOG(logDEBUG1, ("\tread:0x%x, default:0x%x returned:0x%x\n", readValue, defaultValue, val)); - return val; + int32_t defaultValue = (isHardwareVersion2() ? ADC_PORT_INVERT_BOARD2_VAL + : ADC_PORT_INVERT_VAL); + uint32_t val = defaultValue ^ readValue; + LOG(logDEBUG1, ("\tread:0x%x, default:0x%x returned:0x%x\n", readValue, + defaultValue, val)); + return val; } - - /* parameters - timer */ int selectStoragecellStart(int pos) { if (pos >= 0) { LOG(logINFO, ("Setting storage cell start: %d\n", pos)); bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_STRG_CELL_SLCT_MSK); - bus_w(DAQ_REG, bus_r(DAQ_REG) | ((pos << DAQ_STRG_CELL_SLCT_OFST) & DAQ_STRG_CELL_SLCT_MSK)); + bus_w(DAQ_REG, bus_r(DAQ_REG) | ((pos << DAQ_STRG_CELL_SLCT_OFST) & + DAQ_STRG_CELL_SLCT_MSK)); } - return ((bus_r(DAQ_REG) & DAQ_STRG_CELL_SLCT_MSK) >> DAQ_STRG_CELL_SLCT_OFST); + return ((bus_r(DAQ_REG) & DAQ_STRG_CELL_SLCT_MSK) >> + DAQ_STRG_CELL_SLCT_OFST); } int setStartingFrameNumber(uint64_t value) { - LOG(logINFO, ("Setting starting frame number: %llu\n",(long long unsigned int)value)); + LOG(logINFO, ("Setting starting frame number: %llu\n", + (long long unsigned int)value)); #ifdef VIRTUAL - setU64BitReg(value, FRAME_NUMBER_LSB_REG, FRAME_NUMBER_MSB_REG); + setU64BitReg(value, FRAME_NUMBER_LSB_REG, FRAME_NUMBER_MSB_REG); #else - // decrement is for firmware - setU64BitReg(value - 1, FRAME_NUMBER_LSB_REG, FRAME_NUMBER_MSB_REG); - // need to set it twice for the firmware to catch - setU64BitReg(value - 1, FRAME_NUMBER_LSB_REG, FRAME_NUMBER_MSB_REG); + // decrement is for firmware + setU64BitReg(value - 1, FRAME_NUMBER_LSB_REG, FRAME_NUMBER_MSB_REG); + // need to set it twice for the firmware to catch + setU64BitReg(value - 1, FRAME_NUMBER_LSB_REG, FRAME_NUMBER_MSB_REG); #endif - return OK; + return OK; } -int getStartingFrameNumber(uint64_t* retval) { +int getStartingFrameNumber(uint64_t *retval) { #ifdef VIRTUAL - *retval = getU64BitReg(FRAME_NUMBER_LSB_REG, FRAME_NUMBER_MSB_REG); + *retval = getU64BitReg(FRAME_NUMBER_LSB_REG, FRAME_NUMBER_MSB_REG); #else - // increment is for firmware - *retval = (getU64BitReg(GET_FRAME_NUMBER_LSB_REG, GET_FRAME_NUMBER_MSB_REG) + 1); + // increment is for firmware + *retval = + (getU64BitReg(GET_FRAME_NUMBER_LSB_REG, GET_FRAME_NUMBER_MSB_REG) + 1); #endif - return OK; + return OK; } void setNumFrames(int64_t val) { if (val > 0) { LOG(logINFO, ("Setting number of frames %lld\n", (long long int)val)); - set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); + set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); } } @@ -594,9 +579,9 @@ int64_t getNumFrames() { void setNumTriggers(int64_t val) { if (val > 0) { - LOG(logINFO, ("Setting number of triggers %lld\n", (long long int)val)); + LOG(logINFO, ("Setting number of triggers %lld\n", (long long int)val)); set64BitReg(val, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); - } + } } int64_t getNumTriggers() { @@ -608,16 +593,16 @@ int setExpTime(int64_t val) { LOG(logERROR, ("Invalid exptime: %lld ns\n", (long long int)val)); return FAIL; } - LOG(logINFO, ("Setting exptime %lld ns\n", (long long int)val)); + LOG(logINFO, ("Setting exptime %lld ns\n", (long long int)val)); val *= (1E-3 * CLK_RUN); - val -= ACQ_TIME_MIN_CLOCK; - if (val < 0) { - val = 0; - } + val -= ACQ_TIME_MIN_CLOCK; + if (val < 0) { + val = 0; + } set64BitReg(val, SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG); // validate for tolerance - val += ACQ_TIME_MIN_CLOCK; + val += ACQ_TIME_MIN_CLOCK; int64_t retval = getExpTime(); val /= (1E-3 * CLK_RUN); if (val != retval) { @@ -627,7 +612,9 @@ int setExpTime(int64_t val) { } int64_t getExpTime() { - return (get64BitReg(SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG) + ACQ_TIME_MIN_CLOCK) / (1E-3 * CLK_RUN); + return (get64BitReg(SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG) + + ACQ_TIME_MIN_CLOCK) / + (1E-3 * CLK_RUN); } int setPeriod(int64_t val) { @@ -635,7 +622,7 @@ int setPeriod(int64_t val) { LOG(logERROR, ("Invalid period: %lld ns\n", (long long int)val)); return FAIL; } - LOG(logINFO, ("Setting period %lld ns\n", (long long int)val)); + LOG(logINFO, ("Setting period %lld ns\n", (long long int)val)); val *= (1E-3 * CLK_SYNC); set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); @@ -649,15 +636,17 @@ int setPeriod(int64_t val) { } int64_t getPeriod() { - return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-3 * CLK_SYNC); + return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) / + (1E-3 * CLK_SYNC); } int setDelayAfterTrigger(int64_t val) { if (val < 0) { - LOG(logERROR, ("Invalid delay after trigger: %lld ns\n", (long long int)val)); + LOG(logERROR, + ("Invalid delay after trigger: %lld ns\n", (long long int)val)); return FAIL; - } - LOG(logINFO, ("Setting delay after trigger %lld ns\n", (long long int)val)); + } + LOG(logINFO, ("Setting delay after trigger %lld ns\n", (long long int)val)); val *= (1E-3 * CLK_SYNC); set64BitReg(val, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG); @@ -671,31 +660,36 @@ int setDelayAfterTrigger(int64_t val) { } int64_t getDelayAfterTrigger() { - return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / (1E-3 * CLK_SYNC); - + return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / + (1E-3 * CLK_SYNC); } void setNumAdditionalStorageCells(int val) { if (val >= 0) { - LOG(logINFO, ("Setting number of addl. storage cells %d\n", val)); - bus_w(CONTROL_REG, (bus_r(CONTROL_REG) & ~CONTROL_STORAGE_CELL_NUM_MSK) | - ((val << CONTROL_STORAGE_CELL_NUM_OFST) & CONTROL_STORAGE_CELL_NUM_MSK)); - } + LOG(logINFO, ("Setting number of addl. storage cells %d\n", val)); + bus_w(CONTROL_REG, + (bus_r(CONTROL_REG) & ~CONTROL_STORAGE_CELL_NUM_MSK) | + ((val << CONTROL_STORAGE_CELL_NUM_OFST) & + CONTROL_STORAGE_CELL_NUM_MSK)); + } } int getNumAdditionalStorageCells() { - return ((bus_r(CONTROL_REG) & CONTROL_STORAGE_CELL_NUM_MSK) >> CONTROL_STORAGE_CELL_NUM_OFST); + return ((bus_r(CONTROL_REG) & CONTROL_STORAGE_CELL_NUM_MSK) >> + CONTROL_STORAGE_CELL_NUM_OFST); } int setStorageCellDelay(int64_t val) { if (val < 0) { - LOG(logERROR, ("Invalid delay after trigger: %lld ns\n", (long long int)val)); + LOG(logERROR, + ("Invalid delay after trigger: %lld ns\n", (long long int)val)); return FAIL; } - LOG(logINFO, ("Setting storage cell delay %lld ns\n", (long long int)val)); + LOG(logINFO, ("Setting storage cell delay %lld ns\n", (long long int)val)); val *= (1E-3 * CLK_RUN); - bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_EXPSRE_TMR_MSK) | - ((val << ASIC_CTRL_EXPSRE_TMR_OFST) & ASIC_CTRL_EXPSRE_TMR_MSK)); + bus_w(ASIC_CTRL_REG, + (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_EXPSRE_TMR_MSK) | + ((val << ASIC_CTRL_EXPSRE_TMR_OFST) & ASIC_CTRL_EXPSRE_TMR_MSK)); // validate for tolerance int64_t retval = getStorageCellDelay(); @@ -707,8 +701,9 @@ int setStorageCellDelay(int64_t val) { } int64_t getStorageCellDelay() { - return (((int64_t)((bus_r(ASIC_CTRL_REG) & ASIC_CTRL_EXPSRE_TMR_MSK) >> ASIC_CTRL_EXPSRE_TMR_OFST))/ (1E-3 * CLK_RUN)); - + return (((int64_t)((bus_r(ASIC_CTRL_REG) & ASIC_CTRL_EXPSRE_TMR_MSK) >> + ASIC_CTRL_EXPSRE_TMR_OFST)) / + (1E-3 * CLK_RUN)); } int64_t getNumFramesLeft() { @@ -720,11 +715,13 @@ int64_t getNumTriggersLeft() { } int64_t getPeriodLeft() { - return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / (1E-3 * CLK_SYNC); + return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / + (1E-3 * CLK_SYNC); } int64_t getDelayAfterTriggerLeft() { - return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-3 * CLK_SYNC); + return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / + (1E-3 * CLK_SYNC); } int64_t getFramesFromStart() { @@ -732,37 +729,34 @@ int64_t getFramesFromStart() { } int64_t getActualTime() { - return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / (1E-3 * CLK_SYNC); + return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / + (1E-3 * CLK_SYNC); } int64_t getMeasurementTime() { - return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / (1E-3 * CLK_SYNC); + return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / + (1E-3 * CLK_SYNC); } - - - /* parameters - channel, chip, module, settings */ +int setModule(sls_detector_module myMod, char *mess) { -int setModule(sls_detector_module myMod, char* mess){ - - LOG(logINFO, ("Setting module with settings %d\n",myMod.reg)); + LOG(logINFO, ("Setting module with settings %d\n", myMod.reg)); // settings - setSettings( (enum detectorSettings)myMod.reg); + setSettings((enum detectorSettings)myMod.reg); - //set dac values - { - int i = 0; - for(i = 0; i < NDAC; ++i) - setDAC((enum DACINDEX)i, myMod.dacs[i], 0); - } - return OK; + // set dac values + { + int i = 0; + for (i = 0; i < NDAC; ++i) + setDAC((enum DACINDEX)i, myMod.dacs[i], 0); + } + return OK; } - -int getModule(sls_detector_module *myMod){ +int getModule(sls_detector_module *myMod) { int idac = 0; for (idac = 0; idac < NDAC; ++idac) { if (dacValues[idac] >= 0) @@ -776,75 +770,81 @@ int getModule(sls_detector_module *myMod){ } if (initialized) { return OK; - } - return FAIL; + } + return FAIL; } +enum detectorSettings setSettings(enum detectorSettings sett) { + if (sett == UNINITIALIZED) + return thisSettings; - -enum detectorSettings setSettings(enum detectorSettings sett){ - if(sett == UNINITIALIZED) - return thisSettings; - - // set settings - if(sett != GET_SETTINGS) { - switch (sett) { - case DYNAMICGAIN: - bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_SETTINGS_MSK); - LOG(logINFO, ("Set settings - Dyanmic Gain, DAQ Reg: 0x%x\n", bus_r(DAQ_REG))); - break; - case DYNAMICHG0: + // set settings + if (sett != GET_SETTINGS) { + switch (sett) { + case DYNAMICGAIN: + bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_SETTINGS_MSK); + LOG(logINFO, ("Set settings - Dyanmic Gain, DAQ Reg: 0x%x\n", + bus_r(DAQ_REG))); + break; + case DYNAMICHG0: bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_SETTINGS_MSK); bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_FIX_GAIN_HIGHGAIN_VAL); - LOG(logINFO, ("Set settings - Dyanmic High Gain 0, DAQ Reg: 0x%x\n", bus_r(DAQ_REG))); + LOG(logINFO, ("Set settings - Dyanmic High Gain 0, DAQ Reg: 0x%x\n", + bus_r(DAQ_REG))); break; - case FIXGAIN1: + case FIXGAIN1: bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_SETTINGS_MSK); bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_FIX_GAIN_STG_1_VAL); - LOG(logINFO, ("Set settings - Fix Gain 1, DAQ Reg: 0x%x\n", bus_r(DAQ_REG))); + LOG(logINFO, + ("Set settings - Fix Gain 1, DAQ Reg: 0x%x\n", bus_r(DAQ_REG))); break; - case FIXGAIN2: + case FIXGAIN2: bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_SETTINGS_MSK); bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_FIX_GAIN_STG_2_VAL); - LOG(logINFO, ("Set settings - Fix Gain 2, DAQ Reg: 0x%x\n", bus_r(DAQ_REG))); + LOG(logINFO, + ("Set settings - Fix Gain 2, DAQ Reg: 0x%x\n", bus_r(DAQ_REG))); break; - case FORCESWITCHG1: + case FORCESWITCHG1: bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_SETTINGS_MSK); bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_FRCE_GAIN_STG_1_VAL); - LOG(logINFO, ("Set settings - Force Switch Gain 1, DAQ Reg: 0x%x\n", bus_r(DAQ_REG))); + LOG(logINFO, ("Set settings - Force Switch Gain 1, DAQ Reg: 0x%x\n", + bus_r(DAQ_REG))); break; - case FORCESWITCHG2: + case FORCESWITCHG2: bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_SETTINGS_MSK); bus_w(DAQ_REG, bus_r(DAQ_REG) | DAQ_FRCE_GAIN_STG_2_VAL); - LOG(logINFO, ("Set settings - Force Switch Gain 2, DAQ Reg: 0x%x\n", bus_r(DAQ_REG))); + LOG(logINFO, ("Set settings - Force Switch Gain 2, DAQ Reg: 0x%x\n", + bus_r(DAQ_REG))); break; - default: - LOG(logERROR, ("This settings is not defined for this detector %d\n", (int)sett)); - return -1; - } + default: + LOG(logERROR, + ("This settings is not defined for this detector %d\n", + (int)sett)); + return -1; + } - thisSettings = sett; - } - - return getSettings(); + thisSettings = sett; + } + return getSettings(); } +enum detectorSettings getSettings() { -enum detectorSettings getSettings(){ + uint32_t regval = bus_r(DAQ_REG); + uint32_t val = regval & DAQ_SETTINGS_MSK; + LOG(logDEBUG1, ("Getting Settings\n Reading DAQ Register :0x%x\n", val)); - uint32_t regval = bus_r(DAQ_REG); - uint32_t val = regval & DAQ_SETTINGS_MSK; - LOG(logDEBUG1, ("Getting Settings\n Reading DAQ Register :0x%x\n", val)); - - switch(val) { - case DAQ_FIX_GAIN_DYNMC_VAL: + switch (val) { + case DAQ_FIX_GAIN_DYNMC_VAL: thisSettings = DYNAMICGAIN; - LOG(logDEBUG1, ("Settings read: Dynamic Gain. DAQ Reg: 0x%x\n", regval)); + LOG(logDEBUG1, + ("Settings read: Dynamic Gain. DAQ Reg: 0x%x\n", regval)); break; case DAQ_FIX_GAIN_HIGHGAIN_VAL: thisSettings = DYNAMICHG0; - LOG(logDEBUG1, ("Settings read: Dynamig High Gain. DAQ Reg: 0x%x\n", regval)); + LOG(logDEBUG1, + ("Settings read: Dynamig High Gain. DAQ Reg: 0x%x\n", regval)); break; case DAQ_FIX_GAIN_STG_1_VAL: thisSettings = FIXGAIN1; @@ -856,30 +856,29 @@ enum detectorSettings getSettings(){ break; case DAQ_FRCE_GAIN_STG_1_VAL: thisSettings = FORCESWITCHG1; - LOG(logDEBUG1, ("Settings read: Force Switch Gain 1. DAQ Reg: 0x%x\n", regval)); + LOG(logDEBUG1, + ("Settings read: Force Switch Gain 1. DAQ Reg: 0x%x\n", regval)); break; case DAQ_FRCE_GAIN_STG_2_VAL: thisSettings = FORCESWITCHG2; - LOG(logDEBUG1, ("Settings read: Force Switch Gain 2. DAQ Reg: 0x%x\n", regval)); + LOG(logDEBUG1, + ("Settings read: Force Switch Gain 2. DAQ Reg: 0x%x\n", regval)); break; default: thisSettings = UNDEFINED; LOG(logERROR, ("Settings read: Undefined. DAQ Reg: 0x%x\n", regval)); - } + } - return thisSettings; + return thisSettings; } - - - - /* parameters - dac, adc, hv */ void setDAC(enum DACINDEX ind, int val, int mV) { if (val < 0) return; - LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, (mV ? "mV" : "dac units"))); + LOG(logDEBUG1, ("Setting dac[%d]: %d %s \n", (int)ind, val, + (mV ? "mV" : "dac units"))); int dacval = val; #ifdef VIRTUAL if (!mV) { @@ -892,9 +891,13 @@ void setDAC(enum DACINDEX ind, int val, int mV) { #else if (LTC2620_SetDACValue((int)ind, val, mV, &dacval) == OK) { dacValues[ind] = dacval; - if (ind == J_VREF_COMP && (val >= 0)) {//FIXME: if val == pwr down value, write 0? - bus_w (EXT_DAQ_CTRL_REG, (bus_r(EXT_DAQ_CTRL_REG) &~ (EXT_DAQ_CTRL_VREF_COMP_MSK)) // reset - | ((val << EXT_DAQ_CTRL_VREF_COMP_OFST) & EXT_DAQ_CTRL_VREF_COMP_MSK)); // or it with value + if (ind == J_VREF_COMP && + (val >= 0)) { // FIXME: if val == pwr down value, write 0? + bus_w(EXT_DAQ_CTRL_REG, + (bus_r(EXT_DAQ_CTRL_REG) & + ~(EXT_DAQ_CTRL_VREF_COMP_MSK)) // reset + | ((val << EXT_DAQ_CTRL_VREF_COMP_OFST) & + EXT_DAQ_CTRL_VREF_COMP_MSK)); // or it with value } } #endif @@ -902,67 +905,58 @@ void setDAC(enum DACINDEX ind, int val, int mV) { int getDAC(enum DACINDEX ind, int mV) { if (!mV) { - LOG(logDEBUG1, ("Getting DAC %d : %d dac\n",ind, dacValues[ind])); + LOG(logDEBUG1, ("Getting DAC %d : %d dac\n", ind, dacValues[ind])); return dacValues[ind]; } int voltage = -1; LTC2620_DacToVoltage(dacValues[ind], &voltage); - LOG(logDEBUG1, ("Getting DAC %d : %d dac (%d mV)\n",ind, dacValues[ind], voltage)); + LOG(logDEBUG1, + ("Getting DAC %d : %d dac (%d mV)\n", ind, dacValues[ind], voltage)); return voltage; } -int getMaxDacSteps() { - return LTC2620_GetMaxNumSteps(); -} +int getMaxDacSteps() { return LTC2620_GetMaxNumSteps(); } -int getADC(enum ADCINDEX ind){ +int getADC(enum ADCINDEX ind) { #ifdef VIRTUAL return 0; #endif - char tempnames[2][40]={"VRs/FPGAs Temperature", "ADCs/ASICs Temperature"}; - LOG(logDEBUG1, ("Getting Temperature for %s\n", tempnames[ind])); - u_int32_t addr = GET_TEMPERATURE_TMP112_REG; - uint32_t regvalue = bus_r(addr); - uint32_t value = regvalue & TEMPERATURE_VALUE_MSK; - double retval = value; + char tempnames[2][40] = {"VRs/FPGAs Temperature", "ADCs/ASICs Temperature"}; + LOG(logDEBUG1, ("Getting Temperature for %s\n", tempnames[ind])); + u_int32_t addr = GET_TEMPERATURE_TMP112_REG; + uint32_t regvalue = bus_r(addr); + uint32_t value = regvalue & TEMPERATURE_VALUE_MSK; + double retval = value; - // negative - if (regvalue & TEMPERATURE_POLARITY_MSK) { - // 2s complement - int ret = (~value) + 1; - // attach negative sign - ret = 0 - value; - retval = ret; - } + // negative + if (regvalue & TEMPERATURE_POLARITY_MSK) { + // 2s complement + int ret = (~value) + 1; + // attach negative sign + ret = 0 - value; + retval = ret; + } - // conversion - retval *= 625.0/10.0; - LOG(logINFO, ("Temperature %s: %f °C\n",tempnames[ind],retval/1000.00)); - return retval; + // conversion + retval *= 625.0 / 10.0; + LOG(logINFO, ("Temperature %s: %f °C\n", tempnames[ind], retval / 1000.00)); + return retval; } - - -int setHighVoltage(int val){ - // setting hv - if (val >= 0) { - LOG(logINFO, ("Setting High voltage: %d V", val)); - MAX1932_Set(&val); - highvoltage = val; - } - return highvoltage; +int setHighVoltage(int val) { + // setting hv + if (val >= 0) { + LOG(logINFO, ("Setting High voltage: %d V", val)); + MAX1932_Set(&val); + highvoltage = val; + } + return highvoltage; } - - - - - /* parameters - timing, extsig */ - -void setTiming( enum timingMode arg){ - switch(arg){ +void setTiming(enum timingMode arg) { + switch (arg) { case AUTO_TIMING: LOG(logINFO, ("Set Timing: Auto\n")); bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK); @@ -976,448 +970,478 @@ void setTiming( enum timingMode arg){ } } - enum timingMode getTiming() { if (bus_r(EXT_SIGNAL_REG) == EXT_SIGNAL_MSK) return TRIGGER_EXPOSURE; return AUTO_TIMING; } - - /* configure mac */ void setNumberofUDPInterfaces(int val) { - uint32_t addr = CONFIG_REG; + uint32_t addr = CONFIG_REG; - // enable 2 interfaces - if (val > 1) { - LOG(logINFOBLUE, ("Setting #Interfaces: 2\n")); - bus_w(addr, bus_r(addr) | CONFIG_OPRTN_MDE_2_X_10GbE_MSK); - } - // enable only 1 interface - else { - LOG(logINFOBLUE, ("Setting #Interfaces: 1\n")); - bus_w(addr, bus_r(addr) &~ CONFIG_OPRTN_MDE_2_X_10GbE_MSK); - } - LOG(logDEBUG, ("config reg:0x%x\n", bus_r(addr))); + // enable 2 interfaces + if (val > 1) { + LOG(logINFOBLUE, ("Setting #Interfaces: 2\n")); + bus_w(addr, bus_r(addr) | CONFIG_OPRTN_MDE_2_X_10GbE_MSK); + } + // enable only 1 interface + else { + LOG(logINFOBLUE, ("Setting #Interfaces: 1\n")); + bus_w(addr, bus_r(addr) & ~CONFIG_OPRTN_MDE_2_X_10GbE_MSK); + } + LOG(logDEBUG, ("config reg:0x%x\n", bus_r(addr))); } int getNumberofUDPInterfaces() { - LOG(logDEBUG, ("config reg:0x%x\n", bus_r(CONFIG_REG))); - // return 2 if enabled, else 1 - return ((bus_r(CONFIG_REG) & CONFIG_OPRTN_MDE_2_X_10GbE_MSK) ? 2 : 1); + LOG(logDEBUG, ("config reg:0x%x\n", bus_r(CONFIG_REG))); + // return 2 if enabled, else 1 + return ((bus_r(CONFIG_REG) & CONFIG_OPRTN_MDE_2_X_10GbE_MSK) ? 2 : 1); } void selectPrimaryInterface(int val) { - uint32_t addr = CONFIG_REG; + uint32_t addr = CONFIG_REG; - // outer (user input: 0) - if (val == 0) { - LOG(logINFOBLUE, ("Setting Primary Interface: 0 (Outer)\n")); - bus_w(addr, bus_r(addr) &~ CONFIG_INNR_PRIMRY_INTRFCE_MSK); - } - // inner (user input: 1) - else { - LOG(logINFOBLUE, ("Setting Secondary Interface: 1 (Inner)\n")); - bus_w(addr, bus_r(addr) | CONFIG_INNR_PRIMRY_INTRFCE_MSK); - } + // outer (user input: 0) + if (val == 0) { + LOG(logINFOBLUE, ("Setting Primary Interface: 0 (Outer)\n")); + bus_w(addr, bus_r(addr) & ~CONFIG_INNR_PRIMRY_INTRFCE_MSK); + } + // inner (user input: 1) + else { + LOG(logINFOBLUE, ("Setting Secondary Interface: 1 (Inner)\n")); + bus_w(addr, bus_r(addr) | CONFIG_INNR_PRIMRY_INTRFCE_MSK); + } } int getPrimaryInterface() { - return ((bus_r(CONFIG_REG) & CONFIG_INNR_PRIMRY_INTRFCE_MSK) ? 1 : 0); + return ((bus_r(CONFIG_REG) & CONFIG_INNR_PRIMRY_INTRFCE_MSK) ? 1 : 0); } -void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip, uint64_t destmac, uint32_t destport, uint64_t sourcemac, uint32_t sourceip, uint32_t sourceport) { - - // start addr - uint32_t addr = (type == INNER ? RXR_ENDPOINT_INNER_START_REG : RXR_ENDPOINT_OUTER_START_REG); - // calculate rxr endpoint offset - addr += (iRxEntry * RXR_ENDPOINT_OFST); - // get struct memory - udp_header *udp = (udp_header*) (Blackfin_getBaseAddress() + addr / 2); - memset(udp, 0, sizeof(udp_header)); +void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip, + uint64_t destmac, uint32_t destport, uint64_t sourcemac, + uint32_t sourceip, uint32_t sourceport) { - // mac addresses - // msb (32) + lsb (16) - udp->udp_destmac_msb = ((destmac >> 16) & BIT32_MASK); - udp->udp_destmac_lsb = ((destmac >> 0) & BIT16_MASK); - // msb (16) + lsb (32) - udp->udp_srcmac_msb = ((sourcemac >> 32) & BIT16_MASK); - udp->udp_srcmac_lsb = ((sourcemac >> 0) & BIT32_MASK); + // start addr + uint32_t addr = (type == INNER ? RXR_ENDPOINT_INNER_START_REG + : RXR_ENDPOINT_OUTER_START_REG); + // calculate rxr endpoint offset + addr += (iRxEntry * RXR_ENDPOINT_OFST); + // get struct memory + udp_header *udp = (udp_header *)(Blackfin_getBaseAddress() + addr / 2); + memset(udp, 0, sizeof(udp_header)); - // ip addresses - udp->ip_srcip_msb = ((sourceip >> 16) & BIT16_MASK); - udp->ip_srcip_lsb = ((sourceip >> 0) & BIT16_MASK); - udp->ip_destip_msb = ((destip >> 16) & BIT16_MASK); - udp->ip_destip_lsb = ((destip >> 0) & BIT16_MASK); + // mac addresses + // msb (32) + lsb (16) + udp->udp_destmac_msb = ((destmac >> 16) & BIT32_MASK); + udp->udp_destmac_lsb = ((destmac >> 0) & BIT16_MASK); + // msb (16) + lsb (32) + udp->udp_srcmac_msb = ((sourcemac >> 32) & BIT16_MASK); + udp->udp_srcmac_lsb = ((sourcemac >> 0) & BIT32_MASK); - // source port - udp->udp_srcport = sourceport; - udp->udp_destport = destport; + // ip addresses + udp->ip_srcip_msb = ((sourceip >> 16) & BIT16_MASK); + udp->ip_srcip_lsb = ((sourceip >> 0) & BIT16_MASK); + udp->ip_destip_msb = ((destip >> 16) & BIT16_MASK); + udp->ip_destip_lsb = ((destip >> 0) & BIT16_MASK); - // other defines - udp->udp_ethertype = 0x800; - udp->ip_ver = 0x4; - udp->ip_ihl = 0x5; - udp->ip_flags = 0x2; //FIXME - udp->ip_ttl = 0x40; - udp->ip_protocol = 0x11; - // total length is redefined in firmware + // source port + udp->udp_srcport = sourceport; + udp->udp_destport = destport; - calcChecksum(udp); + // other defines + udp->udp_ethertype = 0x800; + udp->ip_ver = 0x4; + udp->ip_ihl = 0x5; + udp->ip_flags = 0x2; // FIXME + udp->ip_ttl = 0x40; + udp->ip_protocol = 0x11; + // total length is redefined in firmware + + calcChecksum(udp); } -void calcChecksum(udp_header* udp) { - int count = IP_HEADER_SIZE; - long int sum = 0; - - // start at ip_tos as the memory is not continous for ip header - uint16_t *addr = (uint16_t*) (&(udp->ip_tos)); +void calcChecksum(udp_header *udp) { + int count = IP_HEADER_SIZE; + long int sum = 0; - sum += *addr++; - count -= 2; + // start at ip_tos as the memory is not continous for ip header + uint16_t *addr = (uint16_t *)(&(udp->ip_tos)); - // ignore ethertype (from udp header) - addr++; + sum += *addr++; + count -= 2; - // from identification to srcip_lsb - while( count > 2 ) { - sum += *addr++; - count -= 2; - } + // ignore ethertype (from udp header) + addr++; - // ignore src udp port (from udp header) - addr++; - - if (count > 0) - sum += *addr; // Add left-over byte, if any - while (sum >> 16) - sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits - long int checksum = sum & 0xffff; - checksum += UDP_IP_HEADER_LENGTH_BYTES; - LOG(logINFO, ("\tIP checksum is 0x%lx\n",checksum)); - udp->ip_checksum = checksum; + // from identification to srcip_lsb + while (count > 2) { + sum += *addr++; + count -= 2; + } + + // ignore src udp port (from udp header) + addr++; + + if (count > 0) + sum += *addr; // Add left-over byte, if any + while (sum >> 16) + sum = (sum & 0xffff) + (sum >> 16); // Fold 32-bit sum to 16 bits + long int checksum = sum & 0xffff; + checksum += UDP_IP_HEADER_LENGTH_BYTES; + LOG(logINFO, ("\tIP checksum is 0x%lx\n", checksum)); + udp->ip_checksum = checksum; } - - int configureMAC() { - uint32_t srcip = udpDetails.srcip; - uint32_t srcip2 = udpDetails.srcip2; - uint32_t dstip = udpDetails.dstip; - uint32_t dstip2 = udpDetails.dstip2; - uint64_t srcmac = udpDetails.srcmac; - uint64_t srcmac2 = udpDetails.srcmac2; - uint64_t dstmac = udpDetails.dstmac; - uint64_t dstmac2 = udpDetails.dstmac2; - int srcport = udpDetails.srcport; - int srcport2 = udpDetails.srcport2; - int dstport = udpDetails.dstport; - int dstport2 = udpDetails.dstport2; + uint32_t srcip = udpDetails.srcip; + uint32_t srcip2 = udpDetails.srcip2; + uint32_t dstip = udpDetails.dstip; + uint32_t dstip2 = udpDetails.dstip2; + uint64_t srcmac = udpDetails.srcmac; + uint64_t srcmac2 = udpDetails.srcmac2; + uint64_t dstmac = udpDetails.dstmac; + uint64_t dstmac2 = udpDetails.dstmac2; + int srcport = udpDetails.srcport; + int srcport2 = udpDetails.srcport2; + int dstport = udpDetails.dstport; + int dstport2 = udpDetails.dstport2; - LOG(logINFOBLUE, ("Configuring MAC\n")); - char src_mac[50], src_ip[INET_ADDRSTRLEN],dst_mac[50], dst_ip[INET_ADDRSTRLEN]; - getMacAddressinString(src_mac, 50, srcmac); - getMacAddressinString(dst_mac, 50, dstmac); - getIpAddressinString(src_ip, srcip); - getIpAddressinString(dst_ip, dstip); - char src_mac2[50], src_ip2[INET_ADDRSTRLEN],dst_mac2[50], dst_ip2[INET_ADDRSTRLEN]; - getMacAddressinString(src_mac2, 50, srcmac2); - getMacAddressinString(dst_mac2, 50, dstmac2); - getIpAddressinString(src_ip2, srcip2); - getIpAddressinString(dst_ip2, dstip2); + LOG(logINFOBLUE, ("Configuring MAC\n")); + char src_mac[50], src_ip[INET_ADDRSTRLEN], dst_mac[50], + dst_ip[INET_ADDRSTRLEN]; + getMacAddressinString(src_mac, 50, srcmac); + getMacAddressinString(dst_mac, 50, dstmac); + getIpAddressinString(src_ip, srcip); + getIpAddressinString(dst_ip, dstip); + char src_mac2[50], src_ip2[INET_ADDRSTRLEN], dst_mac2[50], + dst_ip2[INET_ADDRSTRLEN]; + getMacAddressinString(src_mac2, 50, srcmac2); + getMacAddressinString(dst_mac2, 50, dstmac2); + getIpAddressinString(src_ip2, srcip2); + getIpAddressinString(dst_ip2, dstip2); - int numInterfaces = getNumberofUDPInterfaces(); - int selInterface = getPrimaryInterface(); - LOG(logINFO, ("\t#Interfaces : %d\n", numInterfaces)); - LOG(logINFO, ("\tInterface : %d %s\n\n", selInterface, (selInterface ? "Inner" : "Outer"))); + int numInterfaces = getNumberofUDPInterfaces(); + int selInterface = getPrimaryInterface(); + LOG(logINFO, ("\t#Interfaces : %d\n", numInterfaces)); + LOG(logINFO, ("\tInterface : %d %s\n\n", selInterface, + (selInterface ? "Inner" : "Outer"))); - LOG(logINFO, ("\tOuter %s\n", (numInterfaces == 2) ? "(Bottom)": (selInterface ? "Not Used" : "Used"))); - LOG(logINFO, ( - "\tSource IP : %s\n" - "\tSource MAC : %s\n" - "\tSource Port : %d\n" - "\tDest IP : %s\n" - "\tDest MAC : %s\n" - "\tDest Port : %d\n", - src_ip, src_mac, srcport, - dst_ip, dst_mac, dstport)); - - LOG(logINFO, ("\tInner %s\n", (numInterfaces == 2) ? "(Top)": (selInterface ? "Used" : "Not Used"))); - LOG(logINFO, ( - "\tSource IP2 : %s\n" - "\tSource MAC2 : %s\n" - "\tSource Port2: %d\n" - "\tDest IP2 : %s\n" - "\tDest MAC2 : %s\n" - "\tDest Port2 : %d\n", - src_ip2, src_mac2, srcport2, - dst_ip2, dst_mac2, dstport2)); + LOG(logINFO, ("\tOuter %s\n", (numInterfaces == 2) + ? "(Bottom)" + : (selInterface ? "Not Used" : "Used"))); + LOG(logINFO, ("\tSource IP : %s\n" + "\tSource MAC : %s\n" + "\tSource Port : %d\n" + "\tDest IP : %s\n" + "\tDest MAC : %s\n" + "\tDest Port : %d\n", + src_ip, src_mac, srcport, dst_ip, dst_mac, dstport)); + LOG(logINFO, ("\tInner %s\n", (numInterfaces == 2) + ? "(Top)" + : (selInterface ? "Used" : "Not Used"))); + LOG(logINFO, ("\tSource IP2 : %s\n" + "\tSource MAC2 : %s\n" + "\tSource Port2: %d\n" + "\tDest IP2 : %s\n" + "\tDest MAC2 : %s\n" + "\tDest Port2 : %d\n", + src_ip2, src_mac2, srcport2, dst_ip2, dst_mac2, dstport2)); #ifdef VIRTUAL - if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { - LOG(logERROR, ("could not set udp destination IP and port for interface 1\n")); - return FAIL; - } - if (numInterfaces == 2 && setUDPDestinationDetails(1, dst_ip2, dstport2) == FAIL) { - LOG(logERROR, ("could not set udp destination IP and port for interface 2\n")); - return FAIL; - } + if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { + LOG(logERROR, + ("could not set udp destination IP and port for interface 1\n")); + return FAIL; + } + if (numInterfaces == 2 && + setUDPDestinationDetails(1, dst_ip2, dstport2) == FAIL) { + LOG(logERROR, + ("could not set udp destination IP and port for interface 2\n")); + return FAIL; + } return OK; #endif - // default one rxr entry (others not yet implemented in client yet) - int iRxEntry = 0; + // default one rxr entry (others not yet implemented in client yet) + int iRxEntry = 0; - if (numInterfaces == 2) { - // bottom - setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac, srcip, srcport); - // top - setupHeader(iRxEntry, INNER, dstip2, dstmac2, dstport2, srcmac2, srcip2, srcport2); - } - // single interface - else { - // default - if (selInterface == 0) { - setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac, srcip, srcport); - } else { - setupHeader(iRxEntry, INNER, dstip, dstmac, dstport, srcmac, srcip, srcport2); - } - } + if (numInterfaces == 2) { + // bottom + setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac, srcip, + srcport); + // top + setupHeader(iRxEntry, INNER, dstip2, dstmac2, dstport2, srcmac2, srcip2, + srcport2); + } + // single interface + else { + // default + if (selInterface == 0) { + setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac, srcip, + srcport); + } else { + setupHeader(iRxEntry, INNER, dstip, dstmac, dstport, srcmac, srcip, + srcport2); + } + } - setNumberofUDPInterfaces(numInterfaces); - selectPrimaryInterface(selInterface); + setNumberofUDPInterfaces(numInterfaces); + selectPrimaryInterface(selInterface); - cleanFifos(); - resetCore(); - alignDeserializer(); - return OK; + cleanFifos(); + resetCore(); + alignDeserializer(); + return OK; } int setDetectorPosition(int pos[]) { - int ret = OK; - uint32_t innerPos[2] = {pos[X], pos[Y]}; - uint32_t outerPos[2] = {pos[X], pos[Y]}; - int selInterface = getPrimaryInterface(); + int ret = OK; + uint32_t innerPos[2] = {pos[X], pos[Y]}; + uint32_t outerPos[2] = {pos[X], pos[Y]}; + int selInterface = getPrimaryInterface(); - if (getNumberofUDPInterfaces() == 1) { - LOG(logDEBUG, ("Setting detector position: 1 Interface %s \n(%d, %d)\n", - (selInterface ? "Inner" : "Outer"), innerPos[X], innerPos[Y])); - } - else { - ++outerPos[X]; - LOG(logDEBUG, ("Setting detector position: 2 Interfaces \n" - " inner top(%d, %d), outer bottom(%d, %d)\n" - , innerPos[X], innerPos[Y], outerPos[X], outerPos[Y])); - } - detPos[0] = innerPos[0]; - detPos[1] = innerPos[1]; - detPos[2] = outerPos[0]; - detPos[3] = outerPos[1]; + if (getNumberofUDPInterfaces() == 1) { + LOG(logDEBUG, + ("Setting detector position: 1 Interface %s \n(%d, %d)\n", + (selInterface ? "Inner" : "Outer"), innerPos[X], innerPos[Y])); + } else { + ++outerPos[X]; + LOG(logDEBUG, ("Setting detector position: 2 Interfaces \n" + " inner top(%d, %d), outer bottom(%d, %d)\n", + innerPos[X], innerPos[Y], outerPos[X], outerPos[Y])); + } + detPos[0] = innerPos[0]; + detPos[1] = innerPos[1]; + detPos[2] = outerPos[0]; + detPos[3] = outerPos[1]; - // row - //outer - uint32_t addr = COORD_ROW_REG; - bus_w(addr, (bus_r(addr) &~COORD_ROW_OUTER_MSK) | ((outerPos[X] << COORD_ROW_OUTER_OFST) & COORD_ROW_OUTER_MSK)); - if (((bus_r(addr) & COORD_ROW_OUTER_MSK) >> COORD_ROW_OUTER_OFST) != outerPos[X]) - ret = FAIL; - // inner - bus_w(addr, (bus_r(addr) &~COORD_ROW_INNER_MSK) | ((innerPos[X] << COORD_ROW_INNER_OFST) & COORD_ROW_INNER_MSK)); - if (((bus_r(addr) & COORD_ROW_INNER_MSK) >> COORD_ROW_INNER_OFST) != innerPos[X]) - ret = FAIL; + // row + // outer + uint32_t addr = COORD_ROW_REG; + bus_w(addr, + (bus_r(addr) & ~COORD_ROW_OUTER_MSK) | + ((outerPos[X] << COORD_ROW_OUTER_OFST) & COORD_ROW_OUTER_MSK)); + if (((bus_r(addr) & COORD_ROW_OUTER_MSK) >> COORD_ROW_OUTER_OFST) != + outerPos[X]) + ret = FAIL; + // inner + bus_w(addr, + (bus_r(addr) & ~COORD_ROW_INNER_MSK) | + ((innerPos[X] << COORD_ROW_INNER_OFST) & COORD_ROW_INNER_MSK)); + if (((bus_r(addr) & COORD_ROW_INNER_MSK) >> COORD_ROW_INNER_OFST) != + innerPos[X]) + ret = FAIL; - // col - //outer - addr = COORD_COL_REG; - bus_w(addr, (bus_r(addr) &~COORD_COL_OUTER_MSK) | ((outerPos[Y] << COORD_COL_OUTER_OFST) & COORD_COL_OUTER_MSK)); - if (((bus_r(addr) & COORD_COL_OUTER_MSK) >> COORD_COL_OUTER_OFST) != outerPos[Y]) - ret = FAIL; - // inner - bus_w(addr, (bus_r(addr) &~COORD_COL_INNER_MSK) | ((innerPos[Y] << COORD_COL_INNER_OFST) & COORD_COL_INNER_MSK)); - if (((bus_r(addr) & COORD_COL_INNER_MSK) >> COORD_COL_INNER_OFST) != innerPos[Y]) - ret = FAIL; + // col + // outer + addr = COORD_COL_REG; + bus_w(addr, + (bus_r(addr) & ~COORD_COL_OUTER_MSK) | + ((outerPos[Y] << COORD_COL_OUTER_OFST) & COORD_COL_OUTER_MSK)); + if (((bus_r(addr) & COORD_COL_OUTER_MSK) >> COORD_COL_OUTER_OFST) != + outerPos[Y]) + ret = FAIL; + // inner + bus_w(addr, + (bus_r(addr) & ~COORD_COL_INNER_MSK) | + ((innerPos[Y] << COORD_COL_INNER_OFST) & COORD_COL_INNER_MSK)); + if (((bus_r(addr) & COORD_COL_INNER_MSK) >> COORD_COL_INNER_OFST) != + innerPos[Y]) + ret = FAIL; - if (ret == OK) { - if (getNumberofUDPInterfaces() == 1) { - LOG(logINFOBLUE, ("Position set to [%d, %d]\n", innerPos[X], innerPos[Y])); - } - else { - LOG(logINFOBLUE, (" Inner (top) position set to [%d, %d]\n", innerPos[X], innerPos[Y])); - LOG(logINFOBLUE, (" Outer (bottom) position set to [%d, %d]\n", outerPos[X], outerPos[Y])); - } - } - return ret; + if (ret == OK) { + if (getNumberofUDPInterfaces() == 1) { + LOG(logINFOBLUE, + ("Position set to [%d, %d]\n", innerPos[X], innerPos[Y])); + } else { + LOG(logINFOBLUE, (" Inner (top) position set to [%d, %d]\n", + innerPos[X], innerPos[Y])); + LOG(logINFOBLUE, (" Outer (bottom) position set to [%d, %d]\n", + outerPos[X], outerPos[Y])); + } + } + return ret; } +int *getDetectorPosition() { return detPos; } -int* getDetectorPosition() { - return detPos; -} - - -/* jungfrau specific - powerchip, autocompdisable, asictimer, clockdiv, pll, flashing fpga */ +/* jungfrau specific - powerchip, autocompdisable, asictimer, clockdiv, pll, + * flashing fpga */ void initReadoutConfiguration() { - LOG(logINFO, ("Initializing Readout Configuration:\n" - "\t Reset readout Timer\n" - "\t 1 x 10G mode\n" - "\t outer interface is primary\n" - "\t half speed\n" - "\t TDMA disabled, 0 as TDMA slot\n" - "\t Ethernet overflow disabled\n" - "\t Reset Round robin entries\n")); - - uint32_t val = 0; - // reset readouttimer - val &= ~CONFIG_RDT_TMR_MSK; - // 1 x 10G mode - val &= ~CONFIG_OPRTN_MDE_2_X_10GbE_MSK; - // outer interface - val &= ~CONFIG_INNR_PRIMRY_INTRFCE_MSK; - // half speed - val &= ~CONFIG_READOUT_SPEED_MSK; - val |= CONFIG_HALF_SPEED_20MHZ_VAL; - // tdma disable - val &= ~CONFIG_TDMA_ENABLE_MSK; - // tdma slot 0 - val &= ~CONFIG_TDMA_TIMESLOT_MSK; - // no ethernet overflow - val &= ~CONFIG_ETHRNT_FLW_CNTRL_MSK; - bus_w(CONFIG_REG, val); + LOG(logINFO, ("Initializing Readout Configuration:\n" + "\t Reset readout Timer\n" + "\t 1 x 10G mode\n" + "\t outer interface is primary\n" + "\t half speed\n" + "\t TDMA disabled, 0 as TDMA slot\n" + "\t Ethernet overflow disabled\n" + "\t Reset Round robin entries\n")); - val = bus_r(CONTROL_REG); - // reset (addtional round robin entry) rx endpoints num - val &= CONTROL_RX_ADDTNL_ENDPTS_NUM_MSK; - // reset start of round robin entry to 0 - val &= CONTROL_RX_ENDPTS_START_MSK; - bus_w(CONTROL_REG, val); + uint32_t val = 0; + // reset readouttimer + val &= ~CONFIG_RDT_TMR_MSK; + // 1 x 10G mode + val &= ~CONFIG_OPRTN_MDE_2_X_10GbE_MSK; + // outer interface + val &= ~CONFIG_INNR_PRIMRY_INTRFCE_MSK; + // half speed + val &= ~CONFIG_READOUT_SPEED_MSK; + val |= CONFIG_HALF_SPEED_20MHZ_VAL; + // tdma disable + val &= ~CONFIG_TDMA_ENABLE_MSK; + // tdma slot 0 + val &= ~CONFIG_TDMA_TIMESLOT_MSK; + // no ethernet overflow + val &= ~CONFIG_ETHRNT_FLW_CNTRL_MSK; + bus_w(CONFIG_REG, val); + + val = bus_r(CONTROL_REG); + // reset (addtional round robin entry) rx endpoints num + val &= CONTROL_RX_ADDTNL_ENDPTS_NUM_MSK; + // reset start of round robin entry to 0 + val &= CONTROL_RX_ENDPTS_START_MSK; + bus_w(CONTROL_REG, val); } - -int powerChip (int on){ - if(on != -1){ - if(on){ +int powerChip(int on) { + if (on != -1) { + if (on) { LOG(logINFO, ("Powering chip: on\n")); - bus_w(CHIP_POWER_REG, bus_r(CHIP_POWER_REG) | CHIP_POWER_ENABLE_MSK); - } - else{ + bus_w(CHIP_POWER_REG, + bus_r(CHIP_POWER_REG) | CHIP_POWER_ENABLE_MSK); + } else { LOG(logINFO, ("Powering chip: off\n")); - bus_w(CHIP_POWER_REG, bus_r(CHIP_POWER_REG) & ~CHIP_POWER_ENABLE_MSK); + bus_w(CHIP_POWER_REG, + bus_r(CHIP_POWER_REG) & ~CHIP_POWER_ENABLE_MSK); } } #ifdef VIRTUAL - return ((bus_r(CHIP_POWER_REG) & CHIP_POWER_ENABLE_MSK) >> CHIP_POWER_ENABLE_OFST); + return ((bus_r(CHIP_POWER_REG) & CHIP_POWER_ENABLE_MSK) >> + CHIP_POWER_ENABLE_OFST); #endif - return ((bus_r(CHIP_POWER_REG) & CHIP_POWER_STATUS_MSK) >> CHIP_POWER_STATUS_OFST); + return ((bus_r(CHIP_POWER_REG) & CHIP_POWER_STATUS_MSK) >> + CHIP_POWER_STATUS_OFST); } - - int autoCompDisable(int on) { - if(on != -1){ - if(on){ + if (on != -1) { + if (on) { LOG(logINFO, ("Auto comp disable mode: on\n")); - bus_w(EXT_DAQ_CTRL_REG, bus_r(EXT_DAQ_CTRL_REG) | EXT_DAQ_CTRL_CMP_LGC_ENBL_MSK); - } - else{ + bus_w(EXT_DAQ_CTRL_REG, + bus_r(EXT_DAQ_CTRL_REG) | EXT_DAQ_CTRL_CMP_LGC_ENBL_MSK); + } else { LOG(logINFO, ("Auto comp disable mode: off\n")); - bus_w(EXT_DAQ_CTRL_REG, bus_r(EXT_DAQ_CTRL_REG) & ~EXT_DAQ_CTRL_CMP_LGC_ENBL_MSK); + bus_w(EXT_DAQ_CTRL_REG, + bus_r(EXT_DAQ_CTRL_REG) & ~EXT_DAQ_CTRL_CMP_LGC_ENBL_MSK); } } - return ((bus_r(EXT_DAQ_CTRL_REG) & EXT_DAQ_CTRL_CMP_LGC_ENBL_MSK) >> EXT_DAQ_CTRL_CMP_LGC_ENBL_OFST); + return ((bus_r(EXT_DAQ_CTRL_REG) & EXT_DAQ_CTRL_CMP_LGC_ENBL_MSK) >> + EXT_DAQ_CTRL_CMP_LGC_ENBL_OFST); } void configureASICTimer() { LOG(logINFO, ("Configuring ASIC Timer\n")); - bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_PRCHRG_TMR_MSK) | ASIC_CTRL_PRCHRG_TMR_VAL); - bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_DS_TMR_MSK) | ASIC_CTRL_DS_TMR_VAL); + bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_PRCHRG_TMR_MSK) | + ASIC_CTRL_PRCHRG_TMR_VAL); + bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_DS_TMR_MSK) | + ASIC_CTRL_DS_TMR_VAL); } int setClockDivider(enum CLKINDEX ind, int val) { if (ind != RUN_CLK) { - LOG(logERROR, ("Unknown clock index %d to set speed\n", ind)); - return FAIL; - } - // stop state machine if running - if(runBusy()) { - stopStateMachine(); - } + LOG(logERROR, ("Unknown clock index %d to set speed\n", ind)); + return FAIL; + } + // stop state machine if running + if (runBusy()) { + stopStateMachine(); + } - uint32_t adcOfst = 0; - uint32_t sampleAdcSpeed = 0; - uint32_t adcPhase = 0; - uint32_t dbitPhase = 0; - uint32_t config = CONFIG_FULL_SPEED_40MHZ_VAL; + uint32_t adcOfst = 0; + uint32_t sampleAdcSpeed = 0; + uint32_t adcPhase = 0; + uint32_t dbitPhase = 0; + uint32_t config = CONFIG_FULL_SPEED_40MHZ_VAL; - switch(val) { + switch (val) { - case FULL_SPEED: - if(isHardwareVersion2()) { - LOG(logERROR, ("Cannot set full speed. Should not be here\n")); - return FAIL; - } - LOG(logINFO, ("Setting Full Speed (40 MHz):\n")); - adcOfst = ADC_OFST_FULL_SPEED_VAL; - sampleAdcSpeed = SAMPLE_ADC_FULL_SPEED; - adcPhase = ADC_PHASE_FULL_SPEED; - dbitPhase = DBIT_PHASE_FULL_SPEED; - config = CONFIG_FULL_SPEED_40MHZ_VAL; - break; - - case HALF_SPEED: - LOG(logINFO, ("Setting Half Speed (20 MHz):\n")); - adcOfst = isHardwareVersion2() ? ADC_OFST_HALF_SPEED_BOARD2_VAL : ADC_OFST_HALF_SPEED_VAL; - sampleAdcSpeed = isHardwareVersion2() ? SAMPLE_ADC_HALF_SPEED_BOARD2 : SAMPLE_ADC_HALF_SPEED; - adcPhase = isHardwareVersion2() ? ADC_PHASE_HALF_SPEED_BOARD2 : ADC_PHASE_HALF_SPEED; - dbitPhase = isHardwareVersion2() ? DBIT_PHASE_HALF_SPEED_BOARD2 : DBIT_PHASE_HALF_SPEED; - config = CONFIG_HALF_SPEED_20MHZ_VAL; - break; - - case QUARTER_SPEED: - LOG(logINFO, ("Setting Half Speed (10 MHz):\n")); - adcOfst = isHardwareVersion2() ? ADC_OFST_QUARTER_SPEED_BOARD2_VAL : ADC_OFST_QUARTER_SPEED_VAL; - sampleAdcSpeed = isHardwareVersion2() ? SAMPLE_ADC_QUARTER_SPEED_BOARD2 : SAMPLE_ADC_QUARTER_SPEED; - adcPhase = isHardwareVersion2() ? ADC_PHASE_QUARTER_SPEED_BOARD2 : ADC_PHASE_QUARTER_SPEED; - dbitPhase = isHardwareVersion2() ? DBIT_PHASE_QUARTER_SPEED_BOARD2 : DBIT_PHASE_QUARTER_SPEED; - config = CONFIG_QUARTER_SPEED_10MHZ_VAL; - break; - - default: - LOG(logERROR, ("Unknown speed val %d\n", val)); - return FAIL; - } + case FULL_SPEED: + if (isHardwareVersion2()) { + LOG(logERROR, ("Cannot set full speed. Should not be here\n")); + return FAIL; + } + LOG(logINFO, ("Setting Full Speed (40 MHz):\n")); + adcOfst = ADC_OFST_FULL_SPEED_VAL; + sampleAdcSpeed = SAMPLE_ADC_FULL_SPEED; + adcPhase = ADC_PHASE_FULL_SPEED; + dbitPhase = DBIT_PHASE_FULL_SPEED; + config = CONFIG_FULL_SPEED_40MHZ_VAL; + break; - bus_w(CONFIG_REG, (bus_r(CONFIG_REG) & ~CONFIG_READOUT_SPEED_MSK) | config); - LOG(logINFO, ("\tSet Config Reg to 0x%x\n", bus_r(CONFIG_REG))); + case HALF_SPEED: + LOG(logINFO, ("Setting Half Speed (20 MHz):\n")); + adcOfst = isHardwareVersion2() ? ADC_OFST_HALF_SPEED_BOARD2_VAL + : ADC_OFST_HALF_SPEED_VAL; + sampleAdcSpeed = isHardwareVersion2() ? SAMPLE_ADC_HALF_SPEED_BOARD2 + : SAMPLE_ADC_HALF_SPEED; + adcPhase = isHardwareVersion2() ? ADC_PHASE_HALF_SPEED_BOARD2 + : ADC_PHASE_HALF_SPEED; + dbitPhase = isHardwareVersion2() ? DBIT_PHASE_HALF_SPEED_BOARD2 + : DBIT_PHASE_HALF_SPEED; + config = CONFIG_HALF_SPEED_20MHZ_VAL; + break; - bus_w(ADC_OFST_REG, adcOfst); - LOG(logINFO, ("\tSet ADC Ofst Reg to 0x%x\n", bus_r(ADC_OFST_REG))); + case QUARTER_SPEED: + LOG(logINFO, ("Setting Half Speed (10 MHz):\n")); + adcOfst = isHardwareVersion2() ? ADC_OFST_QUARTER_SPEED_BOARD2_VAL + : ADC_OFST_QUARTER_SPEED_VAL; + sampleAdcSpeed = isHardwareVersion2() ? SAMPLE_ADC_QUARTER_SPEED_BOARD2 + : SAMPLE_ADC_QUARTER_SPEED; + adcPhase = isHardwareVersion2() ? ADC_PHASE_QUARTER_SPEED_BOARD2 + : ADC_PHASE_QUARTER_SPEED; + dbitPhase = isHardwareVersion2() ? DBIT_PHASE_QUARTER_SPEED_BOARD2 + : DBIT_PHASE_QUARTER_SPEED; + config = CONFIG_QUARTER_SPEED_10MHZ_VAL; + break; - bus_w(SAMPLE_REG, sampleAdcSpeed); - LOG(logINFO, ("\tSet Sample Reg to 0x%x\n", bus_r(SAMPLE_REG))); + default: + LOG(logERROR, ("Unknown speed val %d\n", val)); + return FAIL; + } - setPhase(ADC_CLK, adcPhase, 0); - LOG(logINFO, ("\tSet ADC Phase Reg to %d\n", adcPhase)); + bus_w(CONFIG_REG, (bus_r(CONFIG_REG) & ~CONFIG_READOUT_SPEED_MSK) | config); + LOG(logINFO, ("\tSet Config Reg to 0x%x\n", bus_r(CONFIG_REG))); - // only implemented in the new boards now - if (!isHardwareVersion2()) { - setPhase(DBIT_CLK, dbitPhase, 0); - LOG(logINFO, ("\tSet DBIT Phase Reg to %d\n", dbitPhase)); - } - - return OK; + bus_w(ADC_OFST_REG, adcOfst); + LOG(logINFO, ("\tSet ADC Ofst Reg to 0x%x\n", bus_r(ADC_OFST_REG))); + + bus_w(SAMPLE_REG, sampleAdcSpeed); + LOG(logINFO, ("\tSet Sample Reg to 0x%x\n", bus_r(SAMPLE_REG))); + + setPhase(ADC_CLK, adcPhase, 0); + LOG(logINFO, ("\tSet ADC Phase Reg to %d\n", adcPhase)); + + // only implemented in the new boards now + if (!isHardwareVersion2()) { + setPhase(DBIT_CLK, dbitPhase, 0); + LOG(logINFO, ("\tSet DBIT Phase Reg to %d\n", dbitPhase)); + } + + return OK; } int getClockDivider(enum CLKINDEX ind) { if (ind != RUN_CLK) { - LOG(logERROR, ("Unknown clock index %d to get speed\n", ind)); - return -1; - } + LOG(logERROR, ("Unknown clock index %d to get speed\n", ind)); + return -1; + } u_int32_t speed = bus_r(CONFIG_REG) & CONFIG_READOUT_SPEED_MSK; - switch(speed){ + switch (speed) { case CONFIG_FULL_SPEED_40MHZ_VAL: return FULL_SPEED; case CONFIG_HALF_SPEED_20MHZ_VAL: @@ -1425,143 +1449,159 @@ int getClockDivider(enum CLKINDEX ind) { case CONFIG_QUARTER_SPEED_10MHZ_VAL: return QUARTER_SPEED; default: - LOG(logERROR, ("Unknown speed val: %d\n", speed)); + LOG(logERROR, ("Unknown speed val: %d\n", speed)); return -1; } } -int setPhase(enum CLKINDEX ind, int val, int degrees){ +int setPhase(enum CLKINDEX ind, int val, int degrees) { if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to set phase\n", ind)); - return FAIL; - } - char* clock_names[] = {CLK_NAMES}; - LOG(logINFO, ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], ind, val, degrees == 0 ? "" : "degrees")); - int maxShift = MAX_PHASE_SHIFTS; - // validation - if (degrees && (val < 0 || val > 359)) { - LOG(logERROR, ("\tPhase provided outside limits (0 - 359°C)\n")); - return FAIL; - } - if (!degrees && (val < 0 || val > MAX_PHASE_SHIFTS - 1)) { - LOG(logERROR, ("\tPhase provided outside limits (0 - %d phase shifts)\n", maxShift - 1)); - return FAIL; - } + LOG(logERROR, ("Unknown clock index %d to set phase\n", ind)); + return FAIL; + } + char *clock_names[] = {CLK_NAMES}; + LOG(logINFO, ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], + ind, val, degrees == 0 ? "" : "degrees")); + int maxShift = MAX_PHASE_SHIFTS; + // validation + if (degrees && (val < 0 || val > 359)) { + LOG(logERROR, ("\tPhase provided outside limits (0 - 359°C)\n")); + return FAIL; + } + if (!degrees && (val < 0 || val > MAX_PHASE_SHIFTS - 1)) { + LOG(logERROR, + ("\tPhase provided outside limits (0 - %d phase shifts)\n", + maxShift - 1)); + return FAIL; + } - int valShift = val; - // convert to phase shift - if (degrees) { - ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); - } - LOG(logDEBUG1, ("phase shift: %d (degrees/shift: %d)\n", valShift, val)); + int valShift = val; + // convert to phase shift + if (degrees) { + ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); + } + LOG(logDEBUG1, ("phase shift: %d (degrees/shift: %d)\n", valShift, val)); - int relativePhase = valShift - clkPhase[ind]; - LOG(logDEBUG1, ("relative phase shift: %d (Current phase: %d)\n", relativePhase, clkPhase[ind])); + int relativePhase = valShift - clkPhase[ind]; + LOG(logDEBUG1, ("relative phase shift: %d (Current phase: %d)\n", + relativePhase, clkPhase[ind])); // same phase if (!relativePhase) { - LOG(logINFO, ("Nothing to do in Phase Shift\n")); - return OK; + LOG(logINFO, ("Nothing to do in Phase Shift\n")); + return OK; } - LOG(logINFOBLUE, ("Configuring Phase\n")); + LOG(logINFOBLUE, ("Configuring Phase\n")); int phase = 0; if (relativePhase > 0) { phase = (maxShift - relativePhase); } else { - phase = (-1) * relativePhase; + phase = (-1) * relativePhase; } - LOG(logDEBUG1, ("[Single Direction] Phase:%d (0x%x). Max Phase shifts:%d\n", phase, phase, maxShift)); + LOG(logDEBUG1, ("[Single Direction] Phase:%d (0x%x). Max Phase shifts:%d\n", + phase, phase, maxShift)); - ALTERA_PLL_SetPhaseShift(phase, (ind == ADC_CLK ? ADC_CLK_INDEX : DBIT_CLK_INDEX), 0); + ALTERA_PLL_SetPhaseShift( + phase, (ind == ADC_CLK ? ADC_CLK_INDEX : DBIT_CLK_INDEX), 0); clkPhase[ind] = valShift; - alignDeserializer(); - return OK; + alignDeserializer(); + return OK; } int getPhase(enum CLKINDEX ind, int degrees) { if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to get phase\n", ind)); - return -1; - } - if (!degrees) - return clkPhase[ind]; - // convert back to degrees - int val = 0; - ConvertToDifferentRange(0, MAX_PHASE_SHIFTS - 1, 0, 359, clkPhase[ind], &val); - return val; + LOG(logERROR, ("Unknown clock index %d to get phase\n", ind)); + return -1; + } + if (!degrees) + return clkPhase[ind]; + // convert back to degrees + int val = 0; + ConvertToDifferentRange(0, MAX_PHASE_SHIFTS - 1, 0, 359, clkPhase[ind], + &val); + return val; } int getMaxPhase(enum CLKINDEX ind) { if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind)); - return -1; - } - return MAX_PHASE_SHIFTS; + LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind)); + return -1; + } + return MAX_PHASE_SHIFTS; } int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) { if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to validate phase in degrees\n", ind)); - return FAIL; - } - if (val == -1) { - return OK; - } - LOG(logDEBUG1, ("validating phase in degrees\n")); - int maxShift = MAX_PHASE_SHIFTS; - // convert degrees to shift - int valShift = 0; - ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); - // convert back to degrees - ConvertToDifferentRange(0, maxShift - 1, 0, 359, valShift, &val); + LOG(logERROR, + ("Unknown clock index %d to validate phase in degrees\n", ind)); + return FAIL; + } + if (val == -1) { + return OK; + } + LOG(logDEBUG1, ("validating phase in degrees\n")); + int maxShift = MAX_PHASE_SHIFTS; + // convert degrees to shift + int valShift = 0; + ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); + // convert back to degrees + ConvertToDifferentRange(0, maxShift - 1, 0, 359, valShift, &val); - if (val == retval) - return OK; - return FAIL; + if (val == retval) + return OK; + return FAIL; } - int setThresholdTemperature(int val) { if (val >= 0) { - LOG(logINFO, ("Setting Threshold Temperature: %f °C\n", val/1000.00)); - val *= (10.0/625.0); + LOG(logINFO, ("Setting Threshold Temperature: %f °C\n", val / 1000.00)); + val *= (10.0 / 625.0); LOG(logDEBUG1, ("Converted Threshold Temperature: %d\n", val)); - bus_w(TEMP_CTRL_REG, (bus_r(TEMP_CTRL_REG) &~(TEMP_CTRL_PROTCT_THRSHLD_MSK) &~(TEMP_CTRL_OVR_TMP_EVNT_MSK)) - | (((val << TEMP_CTRL_PROTCT_THRSHLD_OFST) & TEMP_CTRL_PROTCT_THRSHLD_MSK))); - LOG(logDEBUG1, ("Converted Threshold Temperature set to %d\n", - ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_PROTCT_THRSHLD_MSK) >> TEMP_CTRL_PROTCT_THRSHLD_OFST))); + bus_w(TEMP_CTRL_REG, + (bus_r(TEMP_CTRL_REG) & ~(TEMP_CTRL_PROTCT_THRSHLD_MSK) & + ~(TEMP_CTRL_OVR_TMP_EVNT_MSK)) | + (((val << TEMP_CTRL_PROTCT_THRSHLD_OFST) & + TEMP_CTRL_PROTCT_THRSHLD_MSK))); + LOG(logDEBUG1, + ("Converted Threshold Temperature set to %d\n", + ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_PROTCT_THRSHLD_MSK) >> + TEMP_CTRL_PROTCT_THRSHLD_OFST))); } - uint32_t temp = ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_PROTCT_THRSHLD_MSK) >> TEMP_CTRL_PROTCT_THRSHLD_OFST); + uint32_t temp = ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_PROTCT_THRSHLD_MSK) >> + TEMP_CTRL_PROTCT_THRSHLD_OFST); // conversion - temp = (temp * (625.0/10.0)); + temp = (temp * (625.0 / 10.0)); - double ftemp = (double)temp/1000.00; - LOG(logDEBUG1, ("Threshold Temperature read %f °C\n",ftemp)); + double ftemp = (double)temp / 1000.00; + LOG(logDEBUG1, ("Threshold Temperature read %f °C\n", ftemp)); return temp; - } - int setTemperatureControl(int val) { if (val >= 0) { // binary value - if (val > 0 ) val = 1; + if (val > 0) + val = 1; LOG(logINFO, ("Setting Temperature control: %d\n", val)); - bus_w(TEMP_CTRL_REG, (bus_r(TEMP_CTRL_REG) &~(TEMP_CTRL_PROTCT_ENABLE_MSK) &~(TEMP_CTRL_OVR_TMP_EVNT_MSK)) - | (((val << TEMP_CTRL_PROTCT_ENABLE_OFST) & TEMP_CTRL_PROTCT_ENABLE_MSK))); + bus_w(TEMP_CTRL_REG, + (bus_r(TEMP_CTRL_REG) & ~(TEMP_CTRL_PROTCT_ENABLE_MSK) & + ~(TEMP_CTRL_OVR_TMP_EVNT_MSK)) | + (((val << TEMP_CTRL_PROTCT_ENABLE_OFST) & + TEMP_CTRL_PROTCT_ENABLE_MSK))); LOG(logDEBUG1, ("Temperature control read: %d\n", - ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_PROTCT_ENABLE_MSK) >> TEMP_CTRL_PROTCT_ENABLE_OFST))); + ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_PROTCT_ENABLE_MSK) >> + TEMP_CTRL_PROTCT_ENABLE_OFST))); } - return ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_PROTCT_ENABLE_MSK) >> TEMP_CTRL_PROTCT_ENABLE_OFST); + return ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_PROTCT_ENABLE_MSK) >> + TEMP_CTRL_PROTCT_ENABLE_OFST); } - int setTemperatureEvent(int val) { #ifdef VIRTUAL return 0; @@ -1570,378 +1610,377 @@ int setTemperatureEvent(int val) { // set bit to clear it val = 1; LOG(logINFO, ("Setting Temperature Event (clearing): %d\n", val)); - bus_w(TEMP_CTRL_REG, (bus_r(TEMP_CTRL_REG) &~TEMP_CTRL_OVR_TMP_EVNT_MSK) - | (((val << TEMP_CTRL_OVR_TMP_EVNT_OFST) & TEMP_CTRL_OVR_TMP_EVNT_MSK))); + bus_w(TEMP_CTRL_REG, + (bus_r(TEMP_CTRL_REG) & ~TEMP_CTRL_OVR_TMP_EVNT_MSK) | + (((val << TEMP_CTRL_OVR_TMP_EVNT_OFST) & + TEMP_CTRL_OVR_TMP_EVNT_MSK))); LOG(logDEBUG1, ("Temperature Event read %d\n", - ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_OVR_TMP_EVNT_MSK) >> TEMP_CTRL_OVR_TMP_EVNT_OFST))); + ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_OVR_TMP_EVNT_MSK) >> + TEMP_CTRL_OVR_TMP_EVNT_OFST))); } - return ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_OVR_TMP_EVNT_MSK) >> TEMP_CTRL_OVR_TMP_EVNT_OFST); + return ((bus_r(TEMP_CTRL_REG) & TEMP_CTRL_OVR_TMP_EVNT_MSK) >> + TEMP_CTRL_OVR_TMP_EVNT_OFST); } void alignDeserializer() { - // refresh alignment - bus_w(ADC_DSRLZR_0_REG, bus_r(ADC_DSRLZR_0_REG) | ADC_DSRLZR_0_RFRSH_ALGNMNT_MSK); - bus_w(ADC_DSRLZR_1_REG, bus_r(ADC_DSRLZR_1_REG) | ADC_DSRLZR_1_RFRSH_ALGNMNT_MSK); - bus_w(ADC_DSRLZR_2_REG, bus_r(ADC_DSRLZR_2_REG) | ADC_DSRLZR_2_RFRSH_ALGNMNT_MSK); - bus_w(ADC_DSRLZR_3_REG, bus_r(ADC_DSRLZR_3_REG) | ADC_DSRLZR_3_RFRSH_ALGNMNT_MSK); + // refresh alignment + bus_w(ADC_DSRLZR_0_REG, + bus_r(ADC_DSRLZR_0_REG) | ADC_DSRLZR_0_RFRSH_ALGNMNT_MSK); + bus_w(ADC_DSRLZR_1_REG, + bus_r(ADC_DSRLZR_1_REG) | ADC_DSRLZR_1_RFRSH_ALGNMNT_MSK); + bus_w(ADC_DSRLZR_2_REG, + bus_r(ADC_DSRLZR_2_REG) | ADC_DSRLZR_2_RFRSH_ALGNMNT_MSK); + bus_w(ADC_DSRLZR_3_REG, + bus_r(ADC_DSRLZR_3_REG) | ADC_DSRLZR_3_RFRSH_ALGNMNT_MSK); - usleep(1 * 1000 * 1000); + usleep(1 * 1000 * 1000); - // disable the refresh - bus_w(ADC_DSRLZR_0_REG, bus_r(ADC_DSRLZR_0_REG) & (~(ADC_DSRLZR_0_RFRSH_ALGNMNT_MSK))); - bus_w(ADC_DSRLZR_1_REG, bus_r(ADC_DSRLZR_1_REG) & (~(ADC_DSRLZR_1_RFRSH_ALGNMNT_MSK))); - bus_w(ADC_DSRLZR_2_REG, bus_r(ADC_DSRLZR_2_REG) & (~(ADC_DSRLZR_2_RFRSH_ALGNMNT_MSK))); - bus_w(ADC_DSRLZR_3_REG, bus_r(ADC_DSRLZR_3_REG) & (~(ADC_DSRLZR_3_RFRSH_ALGNMNT_MSK))); + // disable the refresh + bus_w(ADC_DSRLZR_0_REG, + bus_r(ADC_DSRLZR_0_REG) & (~(ADC_DSRLZR_0_RFRSH_ALGNMNT_MSK))); + bus_w(ADC_DSRLZR_1_REG, + bus_r(ADC_DSRLZR_1_REG) & (~(ADC_DSRLZR_1_RFRSH_ALGNMNT_MSK))); + bus_w(ADC_DSRLZR_2_REG, + bus_r(ADC_DSRLZR_2_REG) & (~(ADC_DSRLZR_2_RFRSH_ALGNMNT_MSK))); + bus_w(ADC_DSRLZR_3_REG, + bus_r(ADC_DSRLZR_3_REG) & (~(ADC_DSRLZR_3_RFRSH_ALGNMNT_MSK))); } int getTenGigaFlowControl() { - return ((bus_r(CONFIG_REG) & CONFIG_ETHRNT_FLW_CNTRL_MSK) >> CONFIG_ETHRNT_FLW_CNTRL_OFST); + return ((bus_r(CONFIG_REG) & CONFIG_ETHRNT_FLW_CNTRL_MSK) >> + CONFIG_ETHRNT_FLW_CNTRL_OFST); } int setTenGigaFlowControl(int value) { - if (value >= 0) { - if (value == 0) { - LOG(logINFO, ("Switching off 10G flow control\n")); - bus_w(CONFIG_REG, bus_r(CONFIG_REG) &~ CONFIG_ETHRNT_FLW_CNTRL_MSK); - } else { - LOG(logINFO, ("Switching on 10G flow control\n")); - bus_w(CONFIG_REG, bus_r(CONFIG_REG) | CONFIG_ETHRNT_FLW_CNTRL_MSK); - } - } - return OK; + if (value >= 0) { + if (value == 0) { + LOG(logINFO, ("Switching off 10G flow control\n")); + bus_w(CONFIG_REG, bus_r(CONFIG_REG) & ~CONFIG_ETHRNT_FLW_CNTRL_MSK); + } else { + LOG(logINFO, ("Switching on 10G flow control\n")); + bus_w(CONFIG_REG, bus_r(CONFIG_REG) | CONFIG_ETHRNT_FLW_CNTRL_MSK); + } + } + return OK; } int getTransmissionDelayFrame() { - return ((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> CONFIG_TDMA_TIMESLOT_OFST); + return ((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> + CONFIG_TDMA_TIMESLOT_OFST); } int setTransmissionDelayFrame(int value) { - if (value >= 0) { - LOG(logINFO, ("Setting transmission delay: %d\n", value)); - bus_w(CONFIG_REG, (bus_r(CONFIG_REG) &~CONFIG_TDMA_TIMESLOT_MSK) - | (((value << CONFIG_TDMA_TIMESLOT_OFST) & CONFIG_TDMA_TIMESLOT_MSK))); - if (value == 0) { - LOG(logINFO, ("Switching off transmission delay\n")); - bus_w(CONFIG_REG, bus_r(CONFIG_REG) &~ CONFIG_TDMA_ENABLE_MSK); - } else { - LOG(logINFO, ("Switching on transmission delay\n")); - bus_w(CONFIG_REG, bus_r(CONFIG_REG) | CONFIG_TDMA_ENABLE_MSK); - } - LOG(logDEBUG1, ("Transmission delay read %d\n", - ((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> CONFIG_TDMA_TIMESLOT_OFST))); - } - return OK; + if (value >= 0) { + LOG(logINFO, ("Setting transmission delay: %d\n", value)); + bus_w(CONFIG_REG, (bus_r(CONFIG_REG) & ~CONFIG_TDMA_TIMESLOT_MSK) | + (((value << CONFIG_TDMA_TIMESLOT_OFST) & + CONFIG_TDMA_TIMESLOT_MSK))); + if (value == 0) { + LOG(logINFO, ("Switching off transmission delay\n")); + bus_w(CONFIG_REG, bus_r(CONFIG_REG) & ~CONFIG_TDMA_ENABLE_MSK); + } else { + LOG(logINFO, ("Switching on transmission delay\n")); + bus_w(CONFIG_REG, bus_r(CONFIG_REG) | CONFIG_TDMA_ENABLE_MSK); + } + LOG(logDEBUG1, ("Transmission delay read %d\n", + ((bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK) >> + CONFIG_TDMA_TIMESLOT_OFST))); + } + return OK; } - - /* aquisition */ -int startStateMachine(){ +int startStateMachine() { #ifdef VIRTUAL - // create udp socket - if(createUDPSocket(0) != OK) { - return FAIL; - } - if (getNumberofUDPInterfaces() == 2 && createUDPSocket(1) != OK) { - return FAIL; - } - LOG(logINFOBLUE, ("starting state machine\n")); - virtual_status = 1; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - virtual_stop = ComVirtual_getStop(); - if (virtual_stop != 0) { - LOG(logERROR, ("Cant start acquisition. " - "Stop server has not updated stop status to 0\n")); - return FAIL; - } - } - if(pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { - LOG(logERROR, ("Could not start Virtual acquisition thread\n")); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - return FAIL; - } - LOG(logINFOGREEN, ("Virtual Acquisition started\n")); - return OK; + // create udp socket + if (createUDPSocket(0) != OK) { + return FAIL; + } + if (getNumberofUDPInterfaces() == 2 && createUDPSocket(1) != OK) { + return FAIL; + } + LOG(logINFOBLUE, ("starting state machine\n")); + virtual_status = 1; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + virtual_stop = ComVirtual_getStop(); + if (virtual_stop != 0) { + LOG(logERROR, ("Cant start acquisition. " + "Stop server has not updated stop status to 0\n")); + return FAIL; + } + } + if (pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { + LOG(logERROR, ("Could not start Virtual acquisition thread\n")); + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + return FAIL; + } + LOG(logINFOGREEN, ("Virtual Acquisition started\n")); + return OK; #endif - LOG(logINFOBLUE, ("Starting State Machine\n")); + LOG(logINFOBLUE, ("Starting State Machine\n")); - cleanFifos(); + cleanFifos(); - //start state machine - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_START_ACQ_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_START_ACQ_MSK); + // start state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_START_ACQ_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_START_ACQ_MSK); - LOG(logINFO, ("Status Register: %08x\n",bus_r(STATUS_REG))); - return OK; + LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); + return OK; } - #ifdef VIRTUAL -void* start_timer(void* arg) { - if (!isControlServer) { - return NULL; - } +void *start_timer(void *arg) { + if (!isControlServer) { + return NULL; + } - int numInterfaces = getNumberofUDPInterfaces(); - int64_t periodNs = getPeriod(); - int numFrames = (getNumFrames() * - getNumTriggers() * - (getNumAdditionalStorageCells() + 1)); - int64_t expUs = getExpTime() / 1000; - const int npixels = 256 * 256 * 8; - const int dataSize = 8192; - const int packetsize = dataSize + sizeof(sls_detector_header); - const int packetsPerFrame = numInterfaces == 1 ? 128 : 64; - int transmissionDelayUs = getTransmissionDelayFrame() * 1000; + int numInterfaces = getNumberofUDPInterfaces(); + int64_t periodNs = getPeriod(); + int numFrames = (getNumFrames() * getNumTriggers() * + (getNumAdditionalStorageCells() + 1)); + int64_t expUs = getExpTime() / 1000; + const int npixels = 256 * 256 * 8; + const int dataSize = 8192; + const int packetsize = dataSize + sizeof(sls_detector_header); + const int packetsPerFrame = numInterfaces == 1 ? 128 : 64; + int transmissionDelayUs = getTransmissionDelayFrame() * 1000; - // Generate data - char imageData[DATA_BYTES]; - memset(imageData, 0, DATA_BYTES); - { - int i = 0; - for (i = 0; i < npixels; ++i) { - // avoiding gain also being divided when gappixels enabled in call back - *((uint16_t*)(imageData + i * sizeof(uint16_t))) = virtual_image_test_mode ? 0x0FFE : (uint16_t)i; - } - } - - - // Send data - { - uint64_t frameNr = 0; - getStartingFrameNumber(&frameNr); - int iframes = 0; - for(iframes = 0; iframes != numFrames; ++iframes ) { + // Generate data + char imageData[DATA_BYTES]; + memset(imageData, 0, DATA_BYTES); + { + int i = 0; + for (i = 0; i < npixels; ++i) { + // avoiding gain also being divided when gappixels enabled in call + // back + *((uint16_t *)(imageData + i * sizeof(uint16_t))) = + virtual_image_test_mode ? 0x0FFE : (uint16_t)i; + } + } - usleep(transmissionDelayUs); + // Send data + { + uint64_t frameNr = 0; + getStartingFrameNumber(&frameNr); + int iframes = 0; + for (iframes = 0; iframes != numFrames; ++iframes) { - // update the virtual stop from stop server - virtual_stop = ComVirtual_getStop(); - //check if virtual_stop is high - if(virtual_stop == 1){ - setStartingFrameNumber(frameNr + iframes + 1); - break; - } + usleep(transmissionDelayUs); - // sleep for exposure time - struct timespec begin, end; - clock_gettime(CLOCK_REALTIME, &begin); - usleep(expUs); + // update the virtual stop from stop server + virtual_stop = ComVirtual_getStop(); + // check if virtual_stop is high + if (virtual_stop == 1) { + setStartingFrameNumber(frameNr + iframes + 1); + break; + } - int srcOffset = 0; - int srcOffset2 = DATA_BYTES / 2; - // loop packet - { - int i = 0; - for(i = 0; i != packetsPerFrame; ++i) { - // set header - char packetData[packetsize]; - memset(packetData, 0, packetsize); - sls_detector_header* header = (sls_detector_header*)(packetData); - header->detType = (uint16_t)myDetectorType; - header->version = SLS_DETECTOR_HEADER_VERSION - 1; - header->frameNumber = frameNr + iframes; - header->packetNumber = i; - header->modId = 0; - header->row = detPos[2]; - header->column = detPos[3]; + // sleep for exposure time + struct timespec begin, end; + clock_gettime(CLOCK_REALTIME, &begin); + usleep(expUs); - // fill data - memcpy(packetData + sizeof(sls_detector_header), - imageData + srcOffset, dataSize); - srcOffset += dataSize; - - sendUDPPacket(0, packetData, packetsize); + int srcOffset = 0; + int srcOffset2 = DATA_BYTES / 2; + // loop packet + { + int i = 0; + for (i = 0; i != packetsPerFrame; ++i) { + // set header + char packetData[packetsize]; + memset(packetData, 0, packetsize); + sls_detector_header *header = + (sls_detector_header *)(packetData); + header->detType = (uint16_t)myDetectorType; + header->version = SLS_DETECTOR_HEADER_VERSION - 1; + header->frameNumber = frameNr + iframes; + header->packetNumber = i; + header->modId = 0; + header->row = detPos[2]; + header->column = detPos[3]; - // second interface - char packetData2[packetsize]; - memset(packetData2, 0, packetsize); - if (numInterfaces == 2) { - header = (sls_detector_header*)(packetData2); - header->detType = (uint16_t)myDetectorType; - header->version = SLS_DETECTOR_HEADER_VERSION - 1; - header->frameNumber = frameNr + iframes; - header->packetNumber = i; - header->modId = 0; - header->row = detPos[0]; - header->column = detPos[1]; + // fill data + memcpy(packetData + sizeof(sls_detector_header), + imageData + srcOffset, dataSize); + srcOffset += dataSize; - // fill data - memcpy(packetData2 + sizeof(sls_detector_header), - imageData + srcOffset2, dataSize); - srcOffset2 += dataSize; - - sendUDPPacket(1, packetData2, packetsize); - } - } - } - LOG(logINFO, ("Sent frame: %d\n", iframes)); - clock_gettime(CLOCK_REALTIME, &end); - int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 + - (end.tv_nsec - begin.tv_nsec)); - - // sleep for (period - exptime) - if (iframes < numFrames) { // if there is a next frame - if (periodNs > timeNs) { - usleep((periodNs - timeNs)/ 1000); - } - } - } - setStartingFrameNumber(frameNr + numFrames); - } - - closeUDPSocket(0); - if (numInterfaces == 2) { - closeUDPSocket(1); - } + sendUDPPacket(0, packetData, packetsize); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - LOG(logINFOBLUE, ("Finished Acquiring\n")); - return NULL; + // second interface + char packetData2[packetsize]; + memset(packetData2, 0, packetsize); + if (numInterfaces == 2) { + header = (sls_detector_header *)(packetData2); + header->detType = (uint16_t)myDetectorType; + header->version = SLS_DETECTOR_HEADER_VERSION - 1; + header->frameNumber = frameNr + iframes; + header->packetNumber = i; + header->modId = 0; + header->row = detPos[0]; + header->column = detPos[1]; + + // fill data + memcpy(packetData2 + sizeof(sls_detector_header), + imageData + srcOffset2, dataSize); + srcOffset2 += dataSize; + + sendUDPPacket(1, packetData2, packetsize); + } + } + } + LOG(logINFO, ("Sent frame: %d\n", iframes)); + clock_gettime(CLOCK_REALTIME, &end); + int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 + + (end.tv_nsec - begin.tv_nsec)); + + // sleep for (period - exptime) + if (iframes < numFrames) { // if there is a next frame + if (periodNs > timeNs) { + usleep((periodNs - timeNs) / 1000); + } + } + } + setStartingFrameNumber(frameNr + numFrames); + } + + closeUDPSocket(0); + if (numInterfaces == 2) { + closeUDPSocket(1); + } + + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + LOG(logINFOBLUE, ("Finished Acquiring\n")); + return NULL; } #endif -int stopStateMachine(){ - LOG(logINFORED, ("Stopping State Machine\n")); +int stopStateMachine() { + LOG(logINFORED, ("Stopping State Machine\n")); #ifdef VIRTUAL - if (!isControlServer) { - virtual_stop = 1; - ComVirtual_setStop(virtual_stop); - // read till status is idle - int tempStatus = 1; - while(tempStatus == 1) { - tempStatus = ComVirtual_getStatus(); - } - virtual_stop = 0; - ComVirtual_setStop(virtual_stop); - LOG(logINFO, ("Stopped State Machine\n")); - } - return OK; + if (!isControlServer) { + virtual_stop = 1; + ComVirtual_setStop(virtual_stop); + // read till status is idle + int tempStatus = 1; + while (tempStatus == 1) { + tempStatus = ComVirtual_getStatus(); + } + virtual_stop = 0; + ComVirtual_setStop(virtual_stop); + LOG(logINFO, ("Stopped State Machine\n")); + } + return OK; #endif - //stop state machine - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STOP_ACQ_MSK); - usleep(100); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STOP_ACQ_MSK); + // stop state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STOP_ACQ_MSK); + usleep(100); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STOP_ACQ_MSK); - LOG(logINFO, ("Status Register: %08x\n",bus_r(STATUS_REG))); - return OK; + LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); + return OK; } - - - - -enum runStatus getRunStatus(){ +enum runStatus getRunStatus() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } - if(virtual_status == 0) { - LOG(logINFOBLUE, ("Status: IDLE\n")); - return IDLE; - }else{ - LOG(logINFOBLUE, ("Status: RUNNING\n")); - return RUNNING; - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } + if (virtual_status == 0) { + LOG(logINFOBLUE, ("Status: IDLE\n")); + return IDLE; + } else { + LOG(logINFOBLUE, ("Status: RUNNING\n")); + return RUNNING; + } #endif - LOG(logDEBUG1, ("Getting status\n")); + LOG(logDEBUG1, ("Getting status\n")); - enum runStatus s; - u_int32_t retval = bus_r(STATUS_REG); - LOG(logINFO, ("Status Register: %08x\n",retval)); + enum runStatus s; + u_int32_t retval = bus_r(STATUS_REG); + LOG(logINFO, ("Status Register: %08x\n", retval)); - //running - if (retval & RUN_BUSY_MSK) { - if (retval & WAITING_FOR_TRIGGER_MSK) { - LOG(logINFOBLUE, ("Status: WAITING\n")); - s = WAITING; - } - else{ - LOG(logINFOBLUE, ("Status: RUNNING\n")); - s = RUNNING; - } - } + // running + if (retval & RUN_BUSY_MSK) { + if (retval & WAITING_FOR_TRIGGER_MSK) { + LOG(logINFOBLUE, ("Status: WAITING\n")); + s = WAITING; + } else { + LOG(logINFOBLUE, ("Status: RUNNING\n")); + s = RUNNING; + } + } - //not running - else { - // stopped or error - if (retval & STOPPED_MSK) { - LOG(logINFOBLUE, ("Status: STOPPED\n")); - s = STOPPED; - } else if (retval & RUNMACHINE_BUSY_MSK) { - LOG(logINFOBLUE, ("Status: READ MACHINE BUSY\n")); - s = TRANSMITTING; - } else if (!retval) { - LOG(logINFOBLUE, ("Status: IDLE\n")); - s = IDLE; - } else { - LOG(logERROR, ("Status: Unknown status %08x\n", retval)); - s = ERROR; - } - } + // not running + else { + // stopped or error + if (retval & STOPPED_MSK) { + LOG(logINFOBLUE, ("Status: STOPPED\n")); + s = STOPPED; + } else if (retval & RUNMACHINE_BUSY_MSK) { + LOG(logINFOBLUE, ("Status: READ MACHINE BUSY\n")); + s = TRANSMITTING; + } else if (!retval) { + LOG(logINFOBLUE, ("Status: IDLE\n")); + s = IDLE; + } else { + LOG(logERROR, ("Status: Unknown status %08x\n", retval)); + s = ERROR; + } + } - return s; + return s; } - - -void readFrame(int *ret, char *mess){ - // wait for status to be done - while(runBusy()){ - usleep(500); - } +void readFrame(int *ret, char *mess) { + // wait for status to be done + while (runBusy()) { + usleep(500); + } #ifdef VIRTUAL - LOG(logINFOGREEN, ("acquisition successfully finished\n")); - return; + LOG(logINFOGREEN, ("acquisition successfully finished\n")); + return; #endif - *ret = (int)OK; - // frames left to give status - int64_t retval = getNumFramesLeft() + 1; + *ret = (int)OK; + // frames left to give status + int64_t retval = getNumFramesLeft() + 1; - if ( retval > 0) { - LOG(logERROR, ("No data and run stopped: %lld frames left\n",(long long int)retval)); - } else { - LOG(logINFOGREEN, ("Acquisition successfully finished\n")); - } + if (retval > 0) { + LOG(logERROR, ("No data and run stopped: %lld frames left\n", + (long long int)retval)); + } else { + LOG(logINFOGREEN, ("Acquisition successfully finished\n")); + } } - - u_int32_t runBusy() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } return virtual_status; #endif - u_int32_t s = (bus_r(STATUS_REG) & RUN_BUSY_MSK); - LOG(logDEBUG1, ("Status Register: %08x\n", s)); - return s; + u_int32_t s = (bus_r(STATUS_REG) & RUN_BUSY_MSK); + LOG(logDEBUG1, ("Status Register: %08x\n", s)); + return s; } - - - - - - - /* common */ -int calculateDataBytes(){ - return DATA_BYTES; -} +int calculateDataBytes() { return DATA_BYTES; } -int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());} -int getNumberOfChips(){return NCHIP;} -int getNumberOfDACs(){return NDAC;} -int getNumberOfChannelsPerChip(){return NCHAN;} +int getTotalNumberOfChannels() { + return (getNumberOfChannelsPerChip() * getNumberOfChips()); +} +int getNumberOfChips() { return NCHIP; } +int getNumberOfDACs() { return NDAC; } +int getNumberOfChannelsPerChip() { return NCHAN; } diff --git a/slsDetectorServers/moenchDetectorServer/RegisterDefs.h b/slsDetectorServers/moenchDetectorServer/RegisterDefs.h index 8dc4ea18a..faf82eb9e 100644 --- a/slsDetectorServers/moenchDetectorServer/RegisterDefs.h +++ b/slsDetectorServers/moenchDetectorServer/RegisterDefs.h @@ -145,12 +145,14 @@ /* Exposure Time Left 64 bit RO register */ //#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not -//used in FW #define EXPTIME_LEFT_MSB_REG (0x1B << MEM_MAP_SHIFT) +// used in FW #define EXPTIME_LEFT_MSB_REG (0x1B << +// MEM_MAP_SHIFT) //// Not used in FW /* Gates Left 64 bit RO register */ //#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not -//used in FW #define GATES_LEFT_MSB_REG (0x1D << MEM_MAP_SHIFT) +// used in FW #define GATES_LEFT_MSB_REG (0x1D << +// MEM_MAP_SHIFT) //// Not used in FW /* Data In 64 bit RO register TODO */ @@ -163,7 +165,8 @@ /* Frames From Start 64 bit RO register TODO */ //#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not -//used in FW #define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT) +// used in FW #define FRAMES_FROM_START_MSB_REG (0x23 << +// MEM_MAP_SHIFT) //// Not used in FW /* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */ @@ -331,21 +334,22 @@ #define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) //#define CONTROL_STRT_FF_TST_OFST (2) //#define CONTROL_STRT_FF_TST_MSK (0x00000001 << -//CONTROL_STRT_FF_TST_OFST) #define CONTROL_STP_FF_TST_OFST (3) +// CONTROL_STRT_FF_TST_OFST) #define CONTROL_STP_FF_TST_OFST (3) //#define CONTROL_STP_FF_TST_MSK (0x00000001 << -//CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4) +// CONTROL_STP_FF_TST_OFST) #define CONTROL_STRT_RDT_OFST (4) //#define CONTROL_STRT_RDT_MSK (0x00000001 << -//CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5) #define -//CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST) +// CONTROL_STRT_RDT_OFST) #define CONTROL_STP_RDT_OFST (5) +// #define CONTROL_STP_RDT_MSK (0x00000001 << +// CONTROL_STP_RDT_OFST) #define CONTROL_STRT_EXPSR_OFST (6) #define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_EXPSR_OFST) //#define CONTROL_STP_EXPSR_OFST (7) //#define CONTROL_STP_EXPSR_MSK (0x00000001 << -//CONTROL_STP_RDT_OFST) #define CONTROL_STRT_TRN_OFST (8) #define -//CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) +// CONTROL_STP_RDT_OFST) #define CONTROL_STRT_TRN_OFST (8) #define +// CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) //#define CONTROL_STP_TRN_OFST (9) //#define CONTROL_STP_TRN_MSK (0x00000001 << -//CONTROL_STP_RDT_OFST) +// CONTROL_STP_RDT_OFST) #define CONTROL_CRE_RST_OFST (10) #define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) #define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? @@ -354,7 +358,7 @@ #define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST) //#define CONTROL_PLL_RCNFG_WR_OFST (13) //#define CONTROL_PLL_RCNFG_WR_MSK (0x00000001 << -//CONTROL_PLL_RCNFG_WR_OFST) +// CONTROL_PLL_RCNFG_WR_OFST) #define CONTROL_SND_10GB_PCKT_OFST (14) #define CONTROL_SND_10GB_PCKT_MSK (0x00000001 << CONTROL_SND_10GB_PCKT_OFST) #define CONTROL_CLR_ACQSTN_FIFO_OFST (15) @@ -486,13 +490,13 @@ /* Period 64 bit RW register */ //#define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) // -//Not used in FW #define EXPTIME_MSB_REG (0x69 << -//MEM_MAP_SHIFT) // Not used in FW +// Not used in FW #define EXPTIME_MSB_REG (0x69 << +// MEM_MAP_SHIFT) // Not used in FW /* Gates 64 bit RW register */ //#define GATES_LSB_REG (0x6A << MEM_MAP_SHIFT) // Not used -//in FW #define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) // -//Not used in FW +// in FW #define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) // +// Not used in FW /* Pattern IO Control 64 bit RW regiser * Each bit configured as output(1)/ input(0) */ diff --git a/slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c old mode 100755 new mode 100644 index 9562adec2..aff1f21b7 --- a/slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c @@ -1,24 +1,24 @@ #include "slsDetectorFunctionList.h" -#include "versionAPI.h" #include "clogger.h" +#include "versionAPI.h" -#include "communication_funcs_UDP.h" -#include "UDPPacketHeaderGenerator.h" +#include "ALTERA_PLL.h" // pll #include "LTC2620.h" // dacs #include "MAX1932.h" // hv -#include "ALTERA_PLL.h" // pll +#include "UDPPacketHeaderGenerator.h" #include "common.h" +#include "communication_funcs_UDP.h" #ifdef VIRTUAL #include "communication_virtual.h" #endif -#include -#include // usleep #include +#include +#include // usleep #ifdef VIRTUAL +#include //ceil #include #include -#include //ceil #endif // Global variable from slsDetectorServer_funcs @@ -32,8 +32,8 @@ extern uint32_t udpPacketNumber; // Global variable from communication_funcs.c extern int isControlServer; -extern void getMacAddressinString(char* cmac, int size, uint64_t mac); -extern void getIpAddressinString(char* cip, uint32_t ip); +extern void getMacAddressinString(char *cmac, int size, uint64_t mac); +extern void getIpAddressinString(char *cip, uint32_t ip); int initError = OK; int initCheckDone = 0; @@ -49,8 +49,8 @@ int virtual_stop = 0; int dataBytes = 0; int analogDataBytes = 0; int digitalDataBytes = 0; -char* analogData = 0; -char* digitalData = 0; +char *analogData = 0; +char *digitalData = 0; char volatile *analogDataPtr = 0; char volatile *digitalDataPtr = 0; char udpPacketData[UDP_PACKET_DATA_BYTES + sizeof(sls_detector_header)]; @@ -69,13 +69,11 @@ int highvoltage = 0; int nSamples = 1; int detPos[2] = {0, 0}; -int isInitCheckDone() { - return initCheckDone; -} +int isInitCheckDone() { return initCheckDone; } -int getInitResult(char** mess) { - *mess = initErrorMessage; - return initError; +int getInitResult(char **mess) { + *mess = initErrorMessage; + return initError; } void basictests() { @@ -83,110 +81,108 @@ void basictests() { initCheckDone = 0; memset(initErrorMessage, 0, MAX_STR_LENGTH); #ifdef VIRTUAL - LOG(logINFOBLUE, ("******** Moench Detector Virtual Server *****************\n")); + LOG(logINFOBLUE, + ("******** Moench Detector Virtual Server *****************\n")); if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; } return; #else - defineGPIOpins(); - resetFPGA(); + defineGPIOpins(); + resetFPGA(); if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; } // does check only if flag is 0 (by default), set by command line - if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL) || (testBus() == FAIL))) { - strcpy(initErrorMessage, - "Could not pass basic tests of FPGA and bus. Dangerous to continue.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; - } + if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL) || + (testBus() == FAIL))) { + strcpy(initErrorMessage, "Could not pass basic tests of FPGA and bus. " + "Dangerous to continue.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; + } - uint16_t hversion = getHardwareVersionNumber(); - uint16_t hsnumber = getHardwareSerialNumber(); - uint32_t ipadd = getDetectorIP(); - uint64_t macadd = getDetectorMAC(); - int64_t fwversion = getFirmwareVersion(); - int64_t swversion = getServerVersion(); - int64_t sw_fw_apiversion = 0; - int64_t client_sw_apiversion = getClientServerAPIVersion(); + uint16_t hversion = getHardwareVersionNumber(); + uint16_t hsnumber = getHardwareSerialNumber(); + uint32_t ipadd = getDetectorIP(); + uint64_t macadd = getDetectorMAC(); + int64_t fwversion = getFirmwareVersion(); + int64_t swversion = getServerVersion(); + int64_t sw_fw_apiversion = 0; + int64_t client_sw_apiversion = getClientServerAPIVersion(); + if (fwversion >= MIN_REQRD_VRSN_T_RD_API) + sw_fw_apiversion = getFirmwareAPIVersion(); + LOG(logINFOBLUE, + ("************ Moench Detector Server *********************\n" + "Hardware Version:\t\t 0x%x\n" + "Hardware Serial Nr:\t\t 0x%x\n" - if (fwversion >= MIN_REQRD_VRSN_T_RD_API) - sw_fw_apiversion = getFirmwareAPIVersion(); - LOG(logINFOBLUE, ("************ Moench Detector Server *********************\n" - "Hardware Version:\t\t 0x%x\n" - "Hardware Serial Nr:\t\t 0x%x\n" + "Detector IP Addr:\t\t 0x%x\n" + "Detector MAC Addr:\t\t 0x%llx\n\n" - "Detector IP Addr:\t\t 0x%x\n" - "Detector MAC Addr:\t\t 0x%llx\n\n" + "Firmware Version:\t\t 0x%llx\n" + "Software Version:\t\t 0x%llx\n" + "F/w-S/w API Version:\t\t 0x%llx\n" + "Required Firmware Version:\t 0x%x\n" + "Client-Software API Version:\t 0x%llx\n" + "********************************************************\n", + hversion, hsnumber, ipadd, (long long unsigned int)macadd, + (long long int)fwversion, (long long int)swversion, + (long long int)sw_fw_apiversion, REQRD_FRMWR_VRSN, + (long long int)client_sw_apiversion)); - "Firmware Version:\t\t 0x%llx\n" - "Software Version:\t\t 0x%llx\n" - "F/w-S/w API Version:\t\t 0x%llx\n" - "Required Firmware Version:\t 0x%x\n" - "Client-Software API Version:\t 0x%llx\n" - "********************************************************\n", - hversion, hsnumber, - ipadd, - (long long unsigned int)macadd, - (long long int)fwversion, - (long long int)swversion, - (long long int)sw_fw_apiversion, - REQRD_FRMWR_VRSN, - (long long int)client_sw_apiversion - )); + // return if flag is not zero, debug mode + if (debugflag) { + return; + } - // return if flag is not zero, debug mode - if (debugflag) { - return; - } - - - //cant read versions + // cant read versions LOG(logINFO, ("Testing Firmware-software compatibility:\n")); - if(!fwversion || !sw_fw_apiversion){ - strcpy(initErrorMessage, - "Cant read versions from FPGA. Please update firmware.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + if (!fwversion || !sw_fw_apiversion) { + strcpy(initErrorMessage, + "Cant read versions from FPGA. Please update firmware.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for API compatibility - old server - if(sw_fw_apiversion > REQRD_FRMWR_VRSN){ - sprintf(initErrorMessage, - "This detector software software version (0x%llx) is incompatible.\n" - "Please update detector software (min. 0x%llx) to be compatible with this firmware.\n", - (long long int)sw_fw_apiversion, - (long long int)REQRD_FRMWR_VRSN); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + // check for API compatibility - old server + if (sw_fw_apiversion > REQRD_FRMWR_VRSN) { + sprintf(initErrorMessage, + "This detector software software version (0x%llx) is " + "incompatible.\n" + "Please update detector software (min. 0x%llx) to be " + "compatible with this firmware.\n", + (long long int)sw_fw_apiversion, + (long long int)REQRD_FRMWR_VRSN); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for firmware compatibility - old firmware - if( REQRD_FRMWR_VRSN > fwversion) { - sprintf(initErrorMessage, - "This firmware version (0x%llx) is incompatible.\n" - "Please update firmware (min. 0x%llx) to be compatible with this server.\n", - (long long int)fwversion, - (long long int)REQRD_FRMWR_VRSN); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } - LOG(logINFO, ("\tCompatibility - success\n")); + // check for firmware compatibility - old firmware + if (REQRD_FRMWR_VRSN > fwversion) { + sprintf(initErrorMessage, + "This firmware version (0x%llx) is incompatible.\n" + "Please update firmware (min. 0x%llx) to be compatible with " + "this server.\n", + (long long int)fwversion, (long long int)REQRD_FRMWR_VRSN); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } + LOG(logINFO, ("\tCompatibility - success\n")); #endif } @@ -194,15 +190,19 @@ int checkType() { #ifdef VIRTUAL return OK; #endif - uint32_t type = ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_DTCTR_TYP_MSK) >> FPGA_VERSION_DTCTR_TYP_OFST); - uint32_t expectedType = (((FPGA_VERSION_DTCTR_TYP_MOENCH_VAL) & FPGA_VERSION_DTCTR_TYP_MSK) >> FPGA_VERSION_DTCTR_TYP_OFST); + uint32_t type = ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_DTCTR_TYP_MSK) >> + FPGA_VERSION_DTCTR_TYP_OFST); + uint32_t expectedType = + (((FPGA_VERSION_DTCTR_TYP_MOENCH_VAL)&FPGA_VERSION_DTCTR_TYP_MSK) >> + FPGA_VERSION_DTCTR_TYP_OFST); - if (type != expectedType) { - LOG(logERROR, ("(Type Fail) - This is not a Moench Detector firmware (read %d, expected %d)\n", - type, expectedType)); + if (type != expectedType) { + LOG(logERROR, ("(Type Fail) - This is not a Moench Detector firmware " + "(read %d, expected %d)\n", + type, expectedType)); return FAIL; - } - return OK; + } + return OK; } int testFpga() { @@ -211,13 +211,15 @@ int testFpga() { #endif LOG(logINFO, ("Testing FPGA:\n")); - //fixed pattern + // fixed pattern int ret = OK; uint32_t val = bus_r(FIX_PATT_REG); if (val == FIX_PATT_VAL) { - LOG(logINFO, ("\tFixed pattern: successful match (0x%08x)\n",val)); + LOG(logINFO, ("\tFixed pattern: successful match (0x%08x)\n", val)); } else { - LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL)); + LOG(logERROR, + ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", + val, FIX_PATT_VAL)); ret = FAIL; } @@ -238,7 +240,7 @@ int testFpga() { readval = bus_r(addr); if (readval != val) { LOG(logERROR, ("1:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); + i, val, readval)); ret = FAIL; break; } @@ -247,7 +249,7 @@ int testFpga() { readval = bus_r(addr); if (readval != val) { LOG(logERROR, ("2:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); + i, val, readval)); ret = FAIL; break; } @@ -256,7 +258,7 @@ int testFpga() { readval = bus_r(addr); if (readval != val) { LOG(logERROR, ("3:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); + i, val, readval)); ret = FAIL; break; } @@ -265,7 +267,7 @@ int testFpga() { readval = bus_r(addr); if (readval != val) { LOG(logERROR, ("4:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); + i, val, readval)); ret = FAIL; break; } @@ -273,7 +275,9 @@ int testFpga() { // write back previous value bus_w(addr, previousValue); if (ret == OK) { - LOG(logINFO, ("\tSuccessfully tested FPGA Delay LSB Register %d times\n", times)); + LOG(logINFO, + ("\tSuccessfully tested FPGA Delay LSB Register %d times\n", + times)); } } @@ -299,10 +303,10 @@ int testBus() { for (i = 0; i < times; ++i) { val += 0xbbbbb; bus_w(addr, val); - readval = bus_r(addr); + readval = bus_r(addr); if (readval != val) { - LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", - i, val, readval)); + LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", i, + val, readval)); ret = FAIL; } } @@ -316,22 +320,18 @@ int testBus() { return ret; } - /* Ids */ -uint64_t getServerVersion() { - return APIMOENCH; -} +uint64_t getServerVersion() { return APIMOENCH; } -uint64_t getClientServerAPIVersion() { - return APIMOENCH; -} +uint64_t getClientServerAPIVersion() { return APIMOENCH; } uint64_t getFirmwareVersion() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_BRD_RVSN_MSK) >> FPGA_VERSION_BRD_RVSN_OFST); + return ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_BRD_RVSN_MSK) >> + FPGA_VERSION_BRD_RVSN_OFST); } uint64_t getFirmwareAPIVersion() { @@ -345,96 +345,100 @@ uint16_t getHardwareVersionNumber() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(MOD_SERIAL_NUMBER_REG) & MOD_SERIAL_NUMBER_VRSN_MSK) >> MOD_SERIAL_NUMBER_VRSN_OFST); + return ((bus_r(MOD_SERIAL_NUMBER_REG) & MOD_SERIAL_NUMBER_VRSN_MSK) >> + MOD_SERIAL_NUMBER_VRSN_OFST); } uint16_t getHardwareSerialNumber() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(MOD_SERIAL_NUMBER_REG) & MOD_SERIAL_NUMBER_MSK) >> MOD_SERIAL_NUMBER_OFST); + return ((bus_r(MOD_SERIAL_NUMBER_REG) & MOD_SERIAL_NUMBER_MSK) >> + MOD_SERIAL_NUMBER_OFST); } -uint32_t getDetectorNumber(){ +uint32_t getDetectorNumber() { #ifdef VIRTUAL return 0; #endif - return bus_r(MOD_SERIAL_NUMBER_REG); + return bus_r(MOD_SERIAL_NUMBER_REG); } -uint64_t getDetectorMAC() { +uint64_t getDetectorMAC() { #ifdef VIRTUAL return 0; #else - char output[255],mac[255]=""; - uint64_t res=0; - FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - //getting rid of ":" - char * pch; - pch = strtok (output,":"); - while (pch != NULL){ - strcat(mac,pch); - pch = strtok (NULL, ":"); - } - sscanf(mac,"%llx",&res); - return res; + char output[255], mac[255] = ""; + uint64_t res = 0; + FILE *sysFile = + popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + // getting rid of ":" + char *pch; + pch = strtok(output, ":"); + while (pch != NULL) { + strcat(mac, pch); + pch = strtok(NULL, ":"); + } + sscanf(mac, "%llx", &res); + return res; #endif } -uint32_t getDetectorIP(){ +uint32_t getDetectorIP() { #ifdef VIRTUAL return 0; #endif - char temp[50]=""; - uint32_t res=0; - //execute and get address - char output[255]; - FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); + char temp[50] = ""; + uint32_t res = 0; + // execute and get address + char output[255]; + FILE *sysFile = popen( + "ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", + "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); - //converting IPaddress to hex. - char* pcword = strtok (output,"."); - while (pcword != NULL) { - sprintf(output,"%02x",atoi(pcword)); - strcat(temp,output); - pcword = strtok (NULL, "."); - } - strcpy(output,temp); - sscanf(output, "%x", &res); - //LOG(logINFO, ("ip:%x\n",res); + // converting IPaddress to hex. + char *pcword = strtok(output, "."); + while (pcword != NULL) { + sprintf(output, "%02x", atoi(pcword)); + strcat(temp, output); + pcword = strtok(NULL, "."); + } + strcpy(output, temp); + sscanf(output, "%x", &res); + // LOG(logINFO, ("ip:%x\n",res); - return res; + return res; } - /* initialization */ -void initControlServer(){ - if (initError == OK) { - setupDetector(); - } - initCheckDone = 1; +void initControlServer() { + if (initError == OK) { + setupDetector(); + } + initCheckDone = 1; } void initStopServer() { - usleep(CTRL_SRVR_INIT_TIME_US); - if (mapCSP0() == FAIL) { - LOG(logERROR, ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); - exit(EXIT_FAILURE); - } + usleep(CTRL_SRVR_INIT_TIME_US); + if (mapCSP0() == FAIL) { + LOG(logERROR, + ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); + exit(EXIT_FAILURE); + } #ifdef VIRTUAL - virtual_stop = 0; - if (!isControlServer) { - ComVirtual_setStop(virtual_stop); - } + virtual_stop = 0; + if (!isControlServer) { + ComVirtual_setStop(virtual_stop); + } #endif } - /* set up detector */ void setupDetector() { @@ -451,7 +455,7 @@ void setupDetector() { if (digitalData) { free(digitalData); digitalData = 0; - } + } analogDataPtr = 0; digitalDataPtr = 0; { @@ -464,18 +468,20 @@ void setupDetector() { clkFrequency[SYNC_CLK] = DEFAULT_SYNC_CLK_AT_STARTUP; clkFrequency[DBIT_CLK] = DEFAULT_DBIT_CLK_AT_STARTUP; // default adc phase in deg -/* - { - int phase_shifts = 0; - ConvertToDifferentRange(0, 359, 0, getMaxPhase(ADC_CLK) - 1, DEFAULT_ADC_PHASE_DEG, &phase_shifts); - clkPhase[ADC_CLK] = phase_shifts; - } - LOG(logINFO, ("Default Run clk: %d MHz\n", clkFrequency[RUN_CLK])); - LOG(logINFO, ("Default Adc clk: %d MHz\n", clkFrequency[ADC_CLK])); - LOG(logINFO, ("Default Sync clk: %d MHz\n", clkFrequency[SYNC_CLK])); - LOG(logINFO, ("Default Dbit clk: %d MHz\n", clkFrequency[DBIT_CLK])); - LOG(logINFO, ("Default Adc Phase: %d (%d deg)\n", clkPhase[ADC_CLK], getPhase(ADC_CLK, 1))); -*/ + /* + { + int phase_shifts = 0; + ConvertToDifferentRange(0, 359, 0, getMaxPhase(ADC_CLK) - 1, + DEFAULT_ADC_PHASE_DEG, &phase_shifts); clkPhase[ADC_CLK] = + phase_shifts; + } + LOG(logINFO, ("Default Run clk: %d MHz\n", + clkFrequency[RUN_CLK])); LOG(logINFO, ("Default Adc clk: %d MHz\n", + clkFrequency[ADC_CLK])); LOG(logINFO, ("Default Sync clk: %d MHz\n", + clkFrequency[SYNC_CLK])); LOG(logINFO, ("Default Dbit clk: %d MHz\n", + clkFrequency[DBIT_CLK])); LOG(logINFO, ("Default Adc Phase: %d (%d + deg)\n", clkPhase[ADC_CLK], getPhase(ADC_CLK, 1))); + */ for (i = 0; i < NDAC; ++i) dacValues[i] = -1; } @@ -485,10 +491,10 @@ void setupDetector() { adcEnableMask_10g = 0; nSamples = 1; #ifdef VIRTUAL - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } #endif ALTERA_PLL_ResetPLLAndReconfiguration(); @@ -497,7 +503,9 @@ void setupDetector() { cleanFifos(); // hv - MAX1932_SetDefines(SPI_REG, SPI_HV_SRL_CS_OTPT_MSK, SPI_HV_SRL_CLK_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_OFST, HIGHVOLTAGE_MIN, HIGHVOLTAGE_MAX); + MAX1932_SetDefines(SPI_REG, SPI_HV_SRL_CS_OTPT_MSK, SPI_HV_SRL_CLK_OTPT_MSK, + SPI_HV_SRL_DGTL_OTPT_MSK, SPI_HV_SRL_DGTL_OTPT_OFST, + HIGHVOLTAGE_MIN, HIGHVOLTAGE_MAX); MAX1932_Disable(); setHighVoltage(DEFAULT_HIGH_VOLTAGE); @@ -505,49 +513,56 @@ void setupDetector() { powerChip(0); // adcs - AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_OFST); + AD9257_SetDefines(ADC_SPI_REG, ADC_SPI_SRL_CS_OTPT_MSK, + ADC_SPI_SRL_CLK_OTPT_MSK, ADC_SPI_SRL_DT_OTPT_MSK, + ADC_SPI_SRL_DT_OTPT_OFST); AD9257_Disable(); AD9257_Configure(); // dacs - LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, DAC_MAX_MV); //has to be before setvchip + LTC2620_SetDefines(SPI_REG, SPI_DAC_SRL_CS_OTPT_MSK, + SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, + SPI_DAC_SRL_DGTL_OTPT_OFST, NDAC, DAC_MIN_MV, + DAC_MAX_MV); // has to be before setvchip LTC2620_Disable(); LTC2620_Configure(); - setDefaultDacs(); + setDefaultDacs(); - // altera pll - ALTERA_PLL_SetDefines(PLL_CNTRL_REG, PLL_PARAM_REG, PLL_CNTRL_RCNFG_PRMTR_RST_MSK, PLL_CNTRL_WR_PRMTR_MSK, PLL_CNTRL_PLL_RST_MSK, PLL_CNTRL_ADDR_MSK, PLL_CNTRL_ADDR_OFST); + // altera pll + ALTERA_PLL_SetDefines(PLL_CNTRL_REG, PLL_PARAM_REG, + PLL_CNTRL_RCNFG_PRMTR_RST_MSK, PLL_CNTRL_WR_PRMTR_MSK, + PLL_CNTRL_PLL_RST_MSK, PLL_CNTRL_ADDR_MSK, + PLL_CNTRL_ADDR_OFST); // not using setADCInvertRegister command (as it xors the default) bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL); - LOG(logINFOBLUE, ("Setting Default parameters\n")); - cleanFifos(); // FIXME: why twice? - resetCore(); + LOG(logINFOBLUE, ("Setting Default parameters\n")); + cleanFifos(); // FIXME: why twice? + resetCore(); - // 1G UDP - enableTenGigabitEthernet(0); + // 1G UDP + enableTenGigabitEthernet(0); - //Initialization of acquistion parameters - setNumAnalogSamples(DEFAULT_NUM_SAMPLES); - setNumFrames(DEFAULT_NUM_FRAMES); - setExpTime(DEFAULT_EXPTIME); - setNumTriggers(DEFAULT_NUM_CYCLES); - setPeriod(DEFAULT_PERIOD); - setDelayAfterTrigger(DEFAULT_DELAY); - setTiming(DEFAULT_TIMING_MODE); + // Initialization of acquistion parameters + setNumAnalogSamples(DEFAULT_NUM_SAMPLES); + setNumFrames(DEFAULT_NUM_FRAMES); + setExpTime(DEFAULT_EXPTIME); + setNumTriggers(DEFAULT_NUM_CYCLES); + setPeriod(DEFAULT_PERIOD); + setDelayAfterTrigger(DEFAULT_DELAY); + setTiming(DEFAULT_TIMING_MODE); setADCEnableMask(BIT32_MSK); - setADCEnableMask_10G(BIT32_MSK); - if (setAnalogOnlyReadout() == FAIL) { + setADCEnableMask_10G(BIT32_MSK); + if (setAnalogOnlyReadout() == FAIL) { strcpy(initErrorMessage, - "Could not set readout mode to analog only.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; + "Could not set readout mode to analog only.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; } setPipeline(ADC_CLK, DEFAULT_PIPELINE); loadDefaultPattern(DEFAULT_PATTERN_FILE); setSettings(DEFAULT_SETTINGS); - setFrequency(RUN_CLK, DEFAULT_RUN_CLK); setFrequency(ADC_CLK, DEFAULT_ADC_CLK); setFrequency(DBIT_CLK, DEFAULT_DBIT_CLK); @@ -556,34 +571,36 @@ void setupDetector() { int updateDatabytesandAllocateRAM() { - int oldDataBytes = analogDataBytes; - updateDataBytes(); + int oldDataBytes = analogDataBytes; + updateDataBytes(); - // update only if change in databytes - if (analogDataBytes == oldDataBytes) { - LOG(logDEBUG1, ("RAM size (Databytes:%d) already allocated. Nothing to be done.\n", dataBytes)); - return OK; - } - // Zero databytes - if (analogDataBytes == 0) { - LOG(logERROR, ("Can not allocate RAM for 0 bytes.\n")); - return FAIL; - } - // clear RAM + // update only if change in databytes + if (analogDataBytes == oldDataBytes) { + LOG(logDEBUG1, + ("RAM size (Databytes:%d) already allocated. Nothing to be done.\n", + dataBytes)); + return OK; + } + // Zero databytes + if (analogDataBytes == 0) { + LOG(logERROR, ("Can not allocate RAM for 0 bytes.\n")); + return FAIL; + } + // clear RAM if (analogData) { free(analogData); analogData = 0; } - // allocate RAM + // allocate RAM analogData = malloc(analogDataBytes); // cannot malloc if (analogData == NULL) { LOG(logERROR, ("Can not allocate data RAM for even 1 frame. " - "Probable cause: Memory Leak.\n")); + "Probable cause: Memory Leak.\n")); return FAIL; } LOG(logINFO, ("\tRAM allocated to %d bytes\n", analogDataBytes)); - return OK; + return OK; } void updateDataBytes() { @@ -605,21 +622,20 @@ void updateDataBytes() { dataBytes = analogDataBytes; } - int setDefaultDacs() { - int ret = OK; - LOG(logINFOBLUE, ("Setting Default Dac values\n")); - { - int i = 0; - const int defaultvals[NDAC] = DEFAULT_DAC_VALS; - for(i = 0; i < NDAC; ++i) { - // if not already default, set it to default - if (dacValues[i] != defaultvals[i]) { - setDAC((enum DACINDEX)i,defaultvals[i],0); - } - } - } - return ret; + int ret = OK; + LOG(logINFOBLUE, ("Setting Default Dac values\n")); + { + int i = 0; + const int defaultvals[NDAC] = DEFAULT_DAC_VALS; + for (i = 0; i < NDAC; ++i) { + // if not already default, set it to default + if (dacValues[i] != defaultvals[i]) { + setDAC((enum DACINDEX)i, defaultvals[i], 0); + } + } + } + return ret; } /* firmware functions (resets) */ @@ -628,45 +644,43 @@ void cleanFifos() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Clearing Acquisition Fifos\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CLR_ACQSTN_FIFO_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CLR_ACQSTN_FIFO_MSK); + LOG(logINFO, ("Clearing Acquisition Fifos\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CLR_ACQSTN_FIFO_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CLR_ACQSTN_FIFO_MSK); } void resetCore() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Resetting Core\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CRE_RST_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CRE_RST_MSK); + LOG(logINFO, ("Resetting Core\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CRE_RST_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CRE_RST_MSK); } void resetPeripheral() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Resetting Peripheral\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PRPHRL_RST_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PRPHRL_RST_MSK); + LOG(logINFO, ("Resetting Peripheral\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PRPHRL_RST_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PRPHRL_RST_MSK); } - /* set parameters - dr, adcenablemask */ -int setDynamicRange(int dr){ - return DYNAMIC_RANGE; -} +int setDynamicRange(int dr) { return DYNAMIC_RANGE; } int setADCEnableMask(uint32_t mask) { if (mask == 0u) { LOG(logERROR, ("Cannot set 1gb adc mask to 0\n")); return FAIL; } - int topAdcs = __builtin_popcount(mask & 0xF0F0F0F0); + int topAdcs = __builtin_popcount(mask & 0xF0F0F0F0); int bottomAdcs = __builtin_popcount(mask & 0x0F0F0F0F); if (topAdcs > 0 && bottomAdcs > 0 && topAdcs != bottomAdcs) { - LOG(logERROR, ("Invalid mask. Top and bottom number of adcs do not match\n")); + LOG(logERROR, + ("Invalid mask. Top and bottom number of adcs do not match\n")); return FAIL; } LOG(logINFO, ("Setting adcEnableMask 1G to 0x%08x\n", mask)); @@ -680,19 +694,18 @@ int setADCEnableMask(uint32_t mask) { return OK; } -uint32_t getADCEnableMask() { - return adcEnableMask_1g; -} +uint32_t getADCEnableMask() { return adcEnableMask_1g; } void setADCEnableMask_10G(uint32_t mask) { if (mask == 0u) { LOG(logERROR, ("Cannot set 10gb adc mask to 0\n")); return; - } - int topAdcs = __builtin_popcount(mask & 0xF0F0F0F0); + } + int topAdcs = __builtin_popcount(mask & 0xF0F0F0F0); int bottomAdcs = __builtin_popcount(mask & 0x0F0F0F0F); if (topAdcs > 0 && bottomAdcs > 0 && topAdcs != bottomAdcs) { - LOG(logERROR, ("Invalid mask. Top and bottom number of adcs do not match\n")); + LOG(logERROR, + ("Invalid mask. Top and bottom number of adcs do not match\n")); return; } // convert 32 bit mask to 8 bit mask @@ -706,18 +719,23 @@ void setADCEnableMask_10G(uint32_t mask) { } ++ival; } - } + } - LOG(logINFO, ("Setting adcEnableMask 10G to 0x%x (from 0x%08x)\n", actualMask, mask)); + LOG(logINFO, ("Setting adcEnableMask 10G to 0x%x (from 0x%08x)\n", + actualMask, mask)); adcEnableMask_10g = actualMask; uint32_t addr = READOUT_10G_ENABLE_REG; bus_w(addr, bus_r(addr) & (~READOUT_10G_ENABLE_ANLG_MSK)); - bus_w(addr, bus_r(addr) | ((adcEnableMask_10g << READOUT_10G_ENABLE_ANLG_OFST) & READOUT_10G_ENABLE_ANLG_MSK)); + bus_w(addr, + bus_r(addr) | ((adcEnableMask_10g << READOUT_10G_ENABLE_ANLG_OFST) & + READOUT_10G_ENABLE_ANLG_MSK)); } uint32_t getADCEnableMask_10G() { - adcEnableMask_10g = ((bus_r(READOUT_10G_ENABLE_REG) & READOUT_10G_ENABLE_ANLG_MSK) >> READOUT_10G_ENABLE_ANLG_OFST); - + adcEnableMask_10g = + ((bus_r(READOUT_10G_ENABLE_REG) & READOUT_10G_ENABLE_ANLG_MSK) >> + READOUT_10G_ENABLE_ANLG_OFST); + // convert 8 bit mask to 32 bit mask uint32_t retval = 0; if (adcEnableMask_10g) { @@ -739,17 +757,18 @@ uint32_t getADCEnableMask_10G() { void setADCInvertRegister(uint32_t val) { LOG(logINFO, ("Setting ADC Port Invert Reg to 0x%x\n", val)); uint32_t defaultValue = ADC_PORT_INVERT_VAL; - uint32_t changeValue = defaultValue ^ val; - LOG(logINFO, ("\t default: 0x%x, final:0x%x\n", defaultValue, changeValue)); + uint32_t changeValue = defaultValue ^ val; + LOG(logINFO, ("\t default: 0x%x, final:0x%x\n", defaultValue, changeValue)); bus_w(ADC_PORT_INVERT_REG, changeValue); } uint32_t getADCInvertRegister() { uint32_t readValue = bus_r(ADC_PORT_INVERT_REG); - int32_t defaultValue = ADC_PORT_INVERT_VAL; - uint32_t val = defaultValue ^ readValue; - LOG(logDEBUG1, ("\tread:0x%x, default:0x%x returned:0x%x\n", readValue, defaultValue, val)); - return val; + int32_t defaultValue = ADC_PORT_INVERT_VAL; + uint32_t val = defaultValue ^ readValue; + LOG(logDEBUG1, ("\tread:0x%x, default:0x%x returned:0x%x\n", readValue, + defaultValue, val)); + return val; } /* parameters - timer */ @@ -760,20 +779,16 @@ void setNumFrames(int64_t val) { } } -int64_t getNumFrames() { - return get64BitReg(FRAMES_LSB_REG, FRAMES_MSB_REG); -} +int64_t getNumFrames() { return get64BitReg(FRAMES_LSB_REG, FRAMES_MSB_REG); } void setNumTriggers(int64_t val) { if (val > 0) { LOG(logINFO, ("Setting number of triggers %lld\n", (long long int)val)); set64BitReg(val, CYCLES_LSB_REG, CYCLES_MSB_REG); - } + } } -int64_t getNumTriggers() { - return get64BitReg(CYCLES_LSB_REG, CYCLES_MSB_REG); -} +int64_t getNumTriggers() { return get64BitReg(CYCLES_LSB_REG, CYCLES_MSB_REG); } int setNumAnalogSamples(int val) { if (val < 0) { @@ -782,8 +797,9 @@ int setNumAnalogSamples(int val) { } LOG(logINFO, ("Setting number of analog samples %d\n", val)); nSamples = val; - bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) &~ SAMPLES_ANALOG_MSK); - bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) | ((val << SAMPLES_ANALOG_OFST) & SAMPLES_ANALOG_MSK)); + bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) & ~SAMPLES_ANALOG_MSK); + bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) | + ((val << SAMPLES_ANALOG_OFST) & SAMPLES_ANALOG_MSK)); // 1Gb if (!enableTenGigabitEthernet(-1)) { @@ -794,9 +810,7 @@ int setNumAnalogSamples(int val) { return OK; } -int getNumAnalogSamples() { - return nSamples; -} +int getNumAnalogSamples() { return nSamples; } int setExpTime(int64_t val) { if (val < 0) { @@ -839,12 +853,14 @@ int setPeriod(int64_t val) { } int64_t getPeriod() { - return get64BitReg(PERIOD_LSB_REG, PERIOD_MSB_REG)/ (1E-3 * clkFrequency[SYNC_CLK]); + return get64BitReg(PERIOD_LSB_REG, PERIOD_MSB_REG) / + (1E-3 * clkFrequency[SYNC_CLK]); } int setDelayAfterTrigger(int64_t val) { if (val < 0) { - LOG(logERROR, ("Invalid delay after trigger: %lld ns\n", (long long int)val)); + LOG(logERROR, + ("Invalid delay after trigger: %lld ns\n", (long long int)val)); return FAIL; } LOG(logINFO, ("Setting delay after trigger %lld ns\n", (long long int)val)); @@ -861,7 +877,8 @@ int setDelayAfterTrigger(int64_t val) { } int64_t getDelayAfterTrigger() { - return get64BitReg(DELAY_LSB_REG, DELAY_MSB_REG) / (1E-3 * clkFrequency[SYNC_CLK]); + return get64BitReg(DELAY_LSB_REG, DELAY_MSB_REG) / + (1E-3 * clkFrequency[SYNC_CLK]); } int64_t getNumFramesLeft() { @@ -873,135 +890,145 @@ int64_t getNumTriggersLeft() { } int64_t getDelayAfterTriggerLeft() { - return get64BitReg(DELAY_LEFT_LSB_REG, DELAY_LEFT_MSB_REG) / (1E-3 * clkFrequency[SYNC_CLK]); + return get64BitReg(DELAY_LEFT_LSB_REG, DELAY_LEFT_MSB_REG) / + (1E-3 * clkFrequency[SYNC_CLK]); } int64_t getPeriodLeft() { - return get64BitReg(PERIOD_LEFT_LSB_REG, PERIOD_LEFT_MSB_REG) / (1E-3 * clkFrequency[SYNC_CLK]); + return get64BitReg(PERIOD_LEFT_LSB_REG, PERIOD_LEFT_MSB_REG) / + (1E-3 * clkFrequency[SYNC_CLK]); } int64_t getFramesFromStart() { - return get64BitReg(FRAMES_FROM_START_PG_LSB_REG, FRAMES_FROM_START_PG_MSB_REG); + return get64BitReg(FRAMES_FROM_START_PG_LSB_REG, + FRAMES_FROM_START_PG_MSB_REG); } int64_t getActualTime() { - return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / (1E-3 * CLK_FREQ); + return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / + (1E-3 * CLK_FREQ); } int64_t getMeasurementTime() { - return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / (1E-3 * CLK_FREQ); + return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / + (1E-3 * CLK_FREQ); } - /* parameters - settings */ -enum detectorSettings setSettings(enum detectorSettings sett){ - if (sett == UNINITIALIZED) - return thisSettings; +enum detectorSettings setSettings(enum detectorSettings sett) { + if (sett == UNINITIALIZED) + return thisSettings; - // set settings - if(sett != GET_SETTINGS) { - switch (sett) { - case G1_HIGHGAIN: + // set settings + if (sett != GET_SETTINGS) { + switch (sett) { + case G1_HIGHGAIN: LOG(logINFO, ("Set settings - G1_HIGHGAIN\n")); setPatternMask(G1_HIGHGAIN_PATMASK); - break; - case G1_LOWGAIN: + break; + case G1_LOWGAIN: LOG(logINFO, ("Set settings - G1_LOWGAIN\n")); setPatternMask(G1_LOWGAIN_PATMASK); - break; - case G2_HIGHCAP_HIGHGAIN: + break; + case G2_HIGHCAP_HIGHGAIN: LOG(logINFO, ("Set settings - G2_HIGHCAP_HIGHGAIN\n")); setPatternMask(G2_HIGHCAP_HIGHGAIN_PATMASK); - break; - case G2_HIGHCAP_LOWGAIN: + break; + case G2_HIGHCAP_LOWGAIN: LOG(logINFO, ("Set settings - G2_HIGHCAP_LOWGAIN\n")); setPatternMask(G2_HIGHCAP_LOWGAIN_PATMASK); - break; - case G2_LOWCAP_HIGHGAIN: + break; + case G2_LOWCAP_HIGHGAIN: LOG(logINFO, ("Set settings - G2_LOWCAP_HIGHGAIN\n")); setPatternMask(G2_LOWCAP_HIGHGAIN_PATMASK); - break; - case G2_LOWCAP_LOWGAIN: + break; + case G2_LOWCAP_LOWGAIN: LOG(logINFO, ("Set settings - G2_LOWCAP_LOWGAIN\n")); setPatternMask(G2_LOWCAP_LOWGAIN_PATMASK); - break; - case G4_HIGHGAIN: + break; + case G4_HIGHGAIN: LOG(logINFO, ("Set settings - G4_HIGHGAIN\n")); setPatternMask(G4_HIGHGAIN_PATMASK); - break; - case G4_LOWGAIN: + break; + case G4_LOWGAIN: LOG(logINFO, ("Set settings - G4_LOWGAIN\n")); setPatternMask(G4_LOWGAIN_PATMASK); - break; - default: - LOG(logERROR, ("This settings is not defined for this detector %d\n", (int)sett)); - return -1; - } + break; + default: + LOG(logERROR, + ("This settings is not defined for this detector %d\n", + (int)sett)); + return -1; + } setPatternBitMask(DEFAULT_PATSETBIT); thisSettings = sett; - } + } - return getSettings(); + return getSettings(); } enum detectorSettings getSettings() { uint64_t patsetbit = getPatternBitMask(); if (patsetbit != DEFAULT_PATSETBIT) { - LOG(logERROR, ("Patsetbit is 0x%llx, and not 0x%llx. Undefined Settings!\n", patsetbit, DEFAULT_PATSETBIT)); + LOG(logERROR, + ("Patsetbit is 0x%llx, and not 0x%llx. Undefined Settings!\n", + patsetbit, DEFAULT_PATSETBIT)); thisSettings = UNDEFINED; return thisSettings; } uint64_t patsetmask = getPatternMask(); switch (patsetmask) { - case G1_HIGHGAIN_PATMASK: - thisSettings = G1_HIGHGAIN; - break; - case G1_LOWGAIN_PATMASK: - thisSettings = G1_LOWGAIN; - break; - case G2_HIGHCAP_HIGHGAIN_PATMASK: - thisSettings = G2_HIGHCAP_HIGHGAIN; - break; - case G2_HIGHCAP_LOWGAIN_PATMASK: - thisSettings = G2_HIGHCAP_LOWGAIN; - break; - case G2_LOWCAP_HIGHGAIN_PATMASK: - thisSettings = G2_LOWCAP_HIGHGAIN; - break; - case G2_LOWCAP_LOWGAIN_PATMASK: - thisSettings = G2_LOWCAP_LOWGAIN; - break; - case G4_HIGHGAIN_PATMASK: - thisSettings = G4_HIGHGAIN; - break; - case G4_LOWGAIN_PATMASK: - thisSettings = G4_LOWGAIN; - break; - default: - LOG(logERROR, ("Patsetmask is 0x%llx. Undefined Settings!\n", patsetmask)); - thisSettings = UNDEFINED; - break; + case G1_HIGHGAIN_PATMASK: + thisSettings = G1_HIGHGAIN; + break; + case G1_LOWGAIN_PATMASK: + thisSettings = G1_LOWGAIN; + break; + case G2_HIGHCAP_HIGHGAIN_PATMASK: + thisSettings = G2_HIGHCAP_HIGHGAIN; + break; + case G2_HIGHCAP_LOWGAIN_PATMASK: + thisSettings = G2_HIGHCAP_LOWGAIN; + break; + case G2_LOWCAP_HIGHGAIN_PATMASK: + thisSettings = G2_LOWCAP_HIGHGAIN; + break; + case G2_LOWCAP_LOWGAIN_PATMASK: + thisSettings = G2_LOWCAP_LOWGAIN; + break; + case G4_HIGHGAIN_PATMASK: + thisSettings = G4_HIGHGAIN; + break; + case G4_LOWGAIN_PATMASK: + thisSettings = G4_LOWGAIN; + break; + default: + LOG(logERROR, + ("Patsetmask is 0x%llx. Undefined Settings!\n", patsetmask)); + thisSettings = UNDEFINED; + break; } return thisSettings; } /* parameters - dac, adc, hv */ - void setDAC(enum DACINDEX ind, int val, int mV) { if (val < 0 && val != LTC2620_GetPowerDownValue()) { return; } - char* dac_names[] = {DAC_NAMES}; + char *dac_names[] = {DAC_NAMES}; LOG(logINFO, ("Setting DAC %s\n", dac_names[ind])); - LOG(logDEBUG, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], val, (mV ? "mV" : "dac units"))); + LOG(logDEBUG, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], + val, (mV ? "mV" : "dac units"))); int dacval = val; #ifdef VIRTUAL - LOG(logINFO, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], val, (mV ? "mV" : "dac units"))); + LOG(logINFO, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], + val, (mV ? "mV" : "dac units"))); if (!mV) { dacValues[ind] = val; } @@ -1017,18 +1044,17 @@ void setDAC(enum DACINDEX ind, int val, int mV) { int getDAC(enum DACINDEX ind, int mV) { if (!mV) { - LOG(logDEBUG1, ("Getting DAC %d : %d dac\n",ind, dacValues[ind])); + LOG(logDEBUG1, ("Getting DAC %d : %d dac\n", ind, dacValues[ind])); return dacValues[ind]; } int voltage = -1; - LTC2620_DacToVoltage(dacValues[ind], &voltage); - LOG(logDEBUG1, ("Getting DAC %d : %d dac (%d mV)\n",ind, dacValues[ind], voltage)); - return voltage; + LTC2620_DacToVoltage(dacValues[ind], &voltage); + LOG(logDEBUG1, + ("Getting DAC %d : %d dac (%d mV)\n", ind, dacValues[ind], voltage)); + return voltage; } -int getMaxDacSteps() { - return LTC2620_GetMaxNumSteps(); -} +int getMaxDacSteps() { return LTC2620_GetMaxNumSteps(); } int dacToVoltage(int dac) { int val; @@ -1054,46 +1080,37 @@ int checkVLimitDacCompliant(int dac) { return OK; } -int getVLimit() { - return vLimit; -} +int getVLimit() { return vLimit; } void setVLimit(int l) { if (l >= 0) vLimit = l; } +int setHighVoltage(int val) { + // setting hv + if (val >= 0) { + LOG(logINFO, ("Setting High voltage: %d V\n", val)); + uint32_t addr = POWER_REG; -int setHighVoltage(int val){ - // setting hv - if (val >= 0) { - LOG(logINFO, ("Setting High voltage: %d V\n", val)); - uint32_t addr = POWER_REG; + // switch to external high voltage + bus_w(addr, bus_r(addr) & (~POWER_HV_INTERNAL_SLCT_MSK)); - // switch to external high voltage - bus_w(addr, bus_r(addr) & (~POWER_HV_INTERNAL_SLCT_MSK)); + MAX1932_Set(&val); - MAX1932_Set(&val); + // switch on internal high voltage, if set + if (val > 0) + bus_w(addr, bus_r(addr) | POWER_HV_INTERNAL_SLCT_MSK); - // switch on internal high voltage, if set - if (val > 0) - bus_w(addr, bus_r(addr) | POWER_HV_INTERNAL_SLCT_MSK); - - highvoltage = val; - } - return highvoltage; + highvoltage = val; + } + return highvoltage; } - - - - - /* parameters - timing, extsig */ - -void setTiming( enum timingMode arg){ - switch(arg){ +void setTiming(enum timingMode arg) { + switch (arg) { case AUTO_TIMING: LOG(logINFO, ("Set Timing: Auto\n")); bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK); @@ -1107,132 +1124,127 @@ void setTiming( enum timingMode arg){ } } - enum timingMode getTiming() { if (bus_r(EXT_SIGNAL_REG) == EXT_SIGNAL_MSK) return TRIGGER_EXPOSURE; return AUTO_TIMING; } - - /* configure mac */ +void calcChecksum(udp_header *udp) { + int count = IP_HEADER_SIZE; + long int sum = 0; -void calcChecksum(udp_header* udp) { - int count = IP_HEADER_SIZE; - long int sum = 0; - - // start at ip_tos as the memory is not continous for ip header - uint16_t *addr = (uint16_t*) (&(udp->ip_tos)); + // start at ip_tos as the memory is not continous for ip header + uint16_t *addr = (uint16_t *)(&(udp->ip_tos)); - sum += *addr++; - count -= 2; + sum += *addr++; + count -= 2; - // ignore ethertype (from udp header) - addr++; + // ignore ethertype (from udp header) + addr++; - // from identification to srcip_lsb - while( count > 2 ) { - sum += *addr++; - count -= 2; - } + // from identification to srcip_lsb + while (count > 2) { + sum += *addr++; + count -= 2; + } - // ignore src udp port (from udp header) - addr++; - - if (count > 0) - sum += *addr; // Add left-over byte, if any - while (sum >> 16) - sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits - long int checksum = sum & 0xffff; - checksum += UDP_IP_HEADER_LENGTH_BYTES; - LOG(logINFO, ("\tIP checksum is 0x%lx\n",checksum)); - udp->ip_checksum = checksum; + // ignore src udp port (from udp header) + addr++; + + if (count > 0) + sum += *addr; // Add left-over byte, if any + while (sum >> 16) + sum = (sum & 0xffff) + (sum >> 16); // Fold 32-bit sum to 16 bits + long int checksum = sum & 0xffff; + checksum += UDP_IP_HEADER_LENGTH_BYTES; + LOG(logINFO, ("\tIP checksum is 0x%lx\n", checksum)); + udp->ip_checksum = checksum; } - -int configureMAC(){ +int configureMAC() { uint32_t srcip = udpDetails.srcip; - uint32_t dstip = udpDetails.dstip; - uint64_t srcmac = udpDetails.srcmac; - uint64_t dstmac = udpDetails.dstmac; - int srcport = udpDetails.srcport; - int dstport = udpDetails.dstport; + uint32_t dstip = udpDetails.dstip; + uint64_t srcmac = udpDetails.srcmac; + uint64_t dstmac = udpDetails.dstmac; + int srcport = udpDetails.srcport; + int dstport = udpDetails.dstport; - LOG(logINFOBLUE, ("Configuring MAC\n")); - char src_mac[50], src_ip[INET_ADDRSTRLEN],dst_mac[50], dst_ip[INET_ADDRSTRLEN]; - getMacAddressinString(src_mac, 50, srcmac); - getMacAddressinString(dst_mac, 50, dstmac); - getIpAddressinString(src_ip, srcip); - getIpAddressinString(dst_ip, dstip); + LOG(logINFOBLUE, ("Configuring MAC\n")); + char src_mac[50], src_ip[INET_ADDRSTRLEN], dst_mac[50], + dst_ip[INET_ADDRSTRLEN]; + getMacAddressinString(src_mac, 50, srcmac); + getMacAddressinString(dst_mac, 50, dstmac); + getIpAddressinString(src_ip, srcip); + getIpAddressinString(dst_ip, dstip); - LOG(logINFO, ( - "\tSource IP : %s\n" - "\tSource MAC : %s\n" - "\tSource Port : %d\n" - "\tDest IP : %s\n" - "\tDest MAC : %s\n" - "\tDest Port : %d\n", - src_ip, src_mac, srcport, - dst_ip, dst_mac, dstport)); + LOG(logINFO, ("\tSource IP : %s\n" + "\tSource MAC : %s\n" + "\tSource Port : %d\n" + "\tDest IP : %s\n" + "\tDest MAC : %s\n" + "\tDest Port : %d\n", + src_ip, src_mac, srcport, dst_ip, dst_mac, dstport)); - // 1 giga udp - if (!enableTenGigabitEthernet(-1)) { + // 1 giga udp + if (!enableTenGigabitEthernet(-1)) { LOG(logINFOBLUE, ("\t1G MAC\n")); - if (updateDatabytesandAllocateRAM() == FAIL) - return -1; - if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { - LOG(logERROR, ("could not set udp 1G destination IP and port\n")); - return FAIL; - } - return OK; - } + if (updateDatabytesandAllocateRAM() == FAIL) + return -1; + if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { + LOG(logERROR, ("could not set udp 1G destination IP and port\n")); + return FAIL; + } + return OK; + } - // 10 G + // 10 G LOG(logINFOBLUE, ("\t10G MAC\n")); - // start addr - uint32_t addr = RXR_ENDPOINT_START_REG; - // get struct memory - udp_header *udp = (udp_header*) (Blackfin_getBaseAddress() + addr / 2); - memset(udp, 0, sizeof(udp_header)); + // start addr + uint32_t addr = RXR_ENDPOINT_START_REG; + // get struct memory + udp_header *udp = (udp_header *)(Blackfin_getBaseAddress() + addr / 2); + memset(udp, 0, sizeof(udp_header)); - // mac addresses - // msb (32) + lsb (16) - udp->udp_destmac_msb = ((dstmac >> 16) & BIT32_MASK); - udp->udp_destmac_lsb = ((dstmac >> 0) & BIT16_MASK); - // msb (16) + lsb (32) - udp->udp_srcmac_msb = ((srcmac >> 32) & BIT16_MASK); - udp->udp_srcmac_lsb = ((srcmac >> 0) & BIT32_MASK); + // mac addresses + // msb (32) + lsb (16) + udp->udp_destmac_msb = ((dstmac >> 16) & BIT32_MASK); + udp->udp_destmac_lsb = ((dstmac >> 0) & BIT16_MASK); + // msb (16) + lsb (32) + udp->udp_srcmac_msb = ((srcmac >> 32) & BIT16_MASK); + udp->udp_srcmac_lsb = ((srcmac >> 0) & BIT32_MASK); - // ip addresses - udp->ip_srcip_msb = ((srcip >> 16) & BIT16_MASK); - udp->ip_srcip_lsb = ((srcip >> 0) & BIT16_MASK); - udp->ip_destip_msb = ((dstip >> 16) & BIT16_MASK); - udp->ip_destip_lsb = ((dstip >> 0) & BIT16_MASK); + // ip addresses + udp->ip_srcip_msb = ((srcip >> 16) & BIT16_MASK); + udp->ip_srcip_lsb = ((srcip >> 0) & BIT16_MASK); + udp->ip_destip_msb = ((dstip >> 16) & BIT16_MASK); + udp->ip_destip_lsb = ((dstip >> 0) & BIT16_MASK); - // source port - udp->udp_srcport = srcport; - udp->udp_destport = dstport; + // source port + udp->udp_srcport = srcport; + udp->udp_destport = dstport; - // other defines - udp->udp_ethertype = 0x800; - udp->ip_ver = 0x4; - udp->ip_ihl = 0x5; - udp->ip_flags = 0x2; //FIXME - udp->ip_ttl = 0x40; - udp->ip_protocol = 0x11; - // total length is redefined in firmware + // other defines + udp->udp_ethertype = 0x800; + udp->ip_ver = 0x4; + udp->ip_ihl = 0x5; + udp->ip_flags = 0x2; // FIXME + udp->ip_ttl = 0x40; + udp->ip_protocol = 0x11; + // total length is redefined in firmware - calcChecksum(udp); + calcChecksum(udp); - cleanFifos();//FIXME: resetPerpheral() for ctb? + cleanFifos(); // FIXME: resetPerpheral() for ctb? resetPeripheral(); - LOG(logINFO, ("Waiting for %d s for mac to be up\n", WAIT_TIME_CONFIGURE_MAC / (1000 * 1000))); + LOG(logINFO, ("Waiting for %d s for mac to be up\n", + WAIT_TIME_CONFIGURE_MAC / (1000 * 1000))); usleep(WAIT_TIME_CONFIGURE_MAC); // todo maybe without - return OK; + return OK; } int setDetectorPosition(int pos[]) { @@ -1240,39 +1252,37 @@ int setDetectorPosition(int pos[]) { return OK; } -int* getDetectorPosition() { - return detPos; -} +int *getDetectorPosition() { return detPos; } int enableTenGigabitEthernet(int val) { #ifdef VIRTUAL return 0; #endif - uint32_t addr = CONFIG_REG; + uint32_t addr = CONFIG_REG; - // set - if (val != -1) { - LOG(logINFO, ("Setting 10Gbe: %d\n", (val > 0) ? 1 : 0)); - if (val > 0) { - bus_w(addr, bus_r(addr) | CONFIG_GB10_SND_UDP_MSK); - } else { - bus_w(addr, bus_r(addr) & (~CONFIG_GB10_SND_UDP_MSK)); - } - //configuremac called from client - } - return ((bus_r(addr) & CONFIG_GB10_SND_UDP_MSK) >> CONFIG_GB10_SND_UDP_OFST); + // set + if (val != -1) { + LOG(logINFO, ("Setting 10Gbe: %d\n", (val > 0) ? 1 : 0)); + if (val > 0) { + bus_w(addr, bus_r(addr) | CONFIG_GB10_SND_UDP_MSK); + } else { + bus_w(addr, bus_r(addr) & (~CONFIG_GB10_SND_UDP_MSK)); + } + // configuremac called from client + } + return ((bus_r(addr) & CONFIG_GB10_SND_UDP_MSK) >> + CONFIG_GB10_SND_UDP_OFST); } - /* moench specific - powerchip, configure frequency, phase, pll*/ -int powerChip (int on) { +int powerChip(int on) { uint32_t addr = POWER_REG; if (on > 0) { LOG(logINFOBLUE, ("Powering on chip\n")); bus_w(addr, bus_r(addr) | POWER_CHIP_MSK); } else if (on == 0) { LOG(logINFOBLUE, ("Powering off chip\n")); - bus_w(addr, bus_r(addr) &~ POWER_CHIP_MSK); + bus_w(addr, bus_r(addr) & ~POWER_CHIP_MSK); } return ((bus_r(addr) & POWER_CHIP_MSK) >> POWER_CHIP_OFST); } @@ -1283,16 +1293,22 @@ int setAnalogOnlyReadout() { LOG(logINFOBLUE, ("Setting Number of Digital samples to 0\n")); // digital num samples = 0 - bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) &~ SAMPLES_DIGITAL_MSK); + bus_w(SAMPLES_REG, bus_r(SAMPLES_REG) & ~SAMPLES_DIGITAL_MSK); LOG(logINFOBLUE, ("Setting Analog Only Readout\n")); // analog only readout uint32_t addr = CONFIG_REG; uint32_t addr_readout_10g = READOUT_10G_ENABLE_REG; // default: analog only - bus_w(addr, bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) & (~CONFIG_ENBLE_DGTL_OTPT_MSK)); - bus_w(addr_readout_10g, bus_r(addr_readout_10g) & (~READOUT_10G_ENABLE_ANLG_MSK) & ~(READOUT_10G_ENABLE_DGTL_MSK)); - bus_w(addr_readout_10g, bus_r(addr_readout_10g) | ((adcEnableMask_10g << READOUT_10G_ENABLE_ANLG_OFST) & READOUT_10G_ENABLE_ANLG_MSK)); + bus_w(addr, bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) & + (~CONFIG_ENBLE_DGTL_OTPT_MSK)); + bus_w(addr_readout_10g, bus_r(addr_readout_10g) & + (~READOUT_10G_ENABLE_ANLG_MSK) & + ~(READOUT_10G_ENABLE_DGTL_MSK)); + bus_w(addr_readout_10g, + bus_r(addr_readout_10g) | + ((adcEnableMask_10g << READOUT_10G_ENABLE_ANLG_OFST) & + READOUT_10G_ENABLE_ANLG_MSK)); // 1Gb if (!enableTenGigabitEthernet(-1)) { @@ -1304,48 +1320,53 @@ int setAnalogOnlyReadout() { // 10Gb else { // validate adcenablemask for 10g - if (adcEnableMask_10g != ((bus_r(READOUT_10G_ENABLE_REG) & READOUT_10G_ENABLE_ANLG_MSK) >> READOUT_10G_ENABLE_ANLG_OFST)) { - LOG(logERROR, ("Setting readout mode failed. Could not set 10g adc enable mask to 0x%x\n.", adcEnableMask_10g)); + if (adcEnableMask_10g != + ((bus_r(READOUT_10G_ENABLE_REG) & READOUT_10G_ENABLE_ANLG_MSK) >> + READOUT_10G_ENABLE_ANLG_OFST)) { + LOG(logERROR, ("Setting readout mode failed. Could not set 10g adc " + "enable mask to 0x%x\n.", + adcEnableMask_10g)); return FAIL; } } return OK; } - - int setPhase(enum CLKINDEX ind, int val, int degrees) { - if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to set phase\n", ind)); - return FAIL; - } - char* clock_names[] = {CLK_NAMES}; - LOG(logINFO, ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], ind, val, degrees == 0 ? "" : "degrees")); - int maxShift = getMaxPhase(ind); - // validation - if (degrees && (val < 0 || val > 359)) { - LOG(logERROR, ("\tPhase outside limits (0 - 359°C)\n")); - return FAIL; - } - if (!degrees && (val < 0 || val > maxShift - 1)) { - LOG(logERROR, ("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1)); - return FAIL; - } + if (ind != ADC_CLK && ind != DBIT_CLK) { + LOG(logERROR, ("Unknown clock index %d to set phase\n", ind)); + return FAIL; + } + char *clock_names[] = {CLK_NAMES}; + LOG(logINFO, ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], + ind, val, degrees == 0 ? "" : "degrees")); + int maxShift = getMaxPhase(ind); + // validation + if (degrees && (val < 0 || val > 359)) { + LOG(logERROR, ("\tPhase outside limits (0 - 359°C)\n")); + return FAIL; + } + if (!degrees && (val < 0 || val > maxShift - 1)) { + LOG(logERROR, + ("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1)); + return FAIL; + } - int valShift = val; - // convert to phase shift - if (degrees) { - ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); - } - LOG(logDEBUG1, ("phase shift: %d (degrees/shift: %d)\n", valShift, val)); + int valShift = val; + // convert to phase shift + if (degrees) { + ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); + } + LOG(logDEBUG1, ("phase shift: %d (degrees/shift: %d)\n", valShift, val)); - int relativePhase = valShift - clkPhase[ind]; - LOG(logDEBUG1, ("relative phase shift: %d (Current phase: %d)\n", relativePhase, clkPhase[ind])); + int relativePhase = valShift - clkPhase[ind]; + LOG(logDEBUG1, ("relative phase shift: %d (Current phase: %d)\n", + relativePhase, clkPhase[ind])); // same phase if (!relativePhase) { - LOG(logINFO, ("\tNothing to do in Phase Shift\n")); - return OK; + LOG(logINFO, ("\tNothing to do in Phase Shift\n")); + return OK; } LOG(logINFOBLUE, ("Configuring Phase\n")); @@ -1353,9 +1374,10 @@ int setPhase(enum CLKINDEX ind, int val, int degrees) { if (relativePhase > 0) { phase = (maxShift - relativePhase); } else { - phase = (-1) * relativePhase; + phase = (-1) * relativePhase; } - LOG(logDEBUG1, ("[Single Direction] Phase:%d (0x%x). Max Phase shifts:%d\n", phase, phase, maxShift)); + LOG(logDEBUG1, ("[Single Direction] Phase:%d (0x%x). Max Phase shifts:%d\n", + phase, phase, maxShift)); ALTERA_PLL_SetPhaseShift(phase, (int)ind, 0); @@ -1364,63 +1386,68 @@ int setPhase(enum CLKINDEX ind, int val, int degrees) { } int getPhase(enum CLKINDEX ind, int degrees) { - if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to get phase\n", ind)); - return -1; - } - if (!degrees) - return clkPhase[ind]; - // convert back to degrees - int val = 0; - ConvertToDifferentRange(0, getMaxPhase(ind) - 1, 0, 359, clkPhase[ind], &val); - return val; + if (ind != ADC_CLK && ind != DBIT_CLK) { + LOG(logERROR, ("Unknown clock index %d to get phase\n", ind)); + return -1; + } + if (!degrees) + return clkPhase[ind]; + // convert back to degrees + int val = 0; + ConvertToDifferentRange(0, getMaxPhase(ind) - 1, 0, 359, clkPhase[ind], + &val); + return val; } int getMaxPhase(enum CLKINDEX ind) { - if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind)); - return -1; - } - int ret = ((double)PLL_VCO_FREQ_MHZ / (double)clkFrequency[ind]) * MAX_PHASE_SHIFTS_STEPS; + if (ind != ADC_CLK && ind != DBIT_CLK) { + LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind)); + return -1; + } + int ret = ((double)PLL_VCO_FREQ_MHZ / (double)clkFrequency[ind]) * + MAX_PHASE_SHIFTS_STEPS; - char* clock_names[] = {CLK_NAMES}; - LOG(logDEBUG1, ("Max Phase Shift (%s): %d (Clock: %d MHz, VCO:%d MHz)\n", - clock_names[ind], ret, clkFrequency[ind], PLL_VCO_FREQ_MHZ)); + char *clock_names[] = {CLK_NAMES}; + LOG(logDEBUG1, + ("Max Phase Shift (%s): %d (Clock: %d MHz, VCO:%d MHz)\n", + clock_names[ind], ret, clkFrequency[ind], PLL_VCO_FREQ_MHZ)); - return ret; + return ret; } int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) { - if (ind != ADC_CLK && ind != DBIT_CLK) { - LOG(logERROR, ("Unknown clock index %d to validate phase in degrees\n", ind)); - return FAIL; - } - if (val == -1) { - return OK; + if (ind != ADC_CLK && ind != DBIT_CLK) { + LOG(logERROR, + ("Unknown clock index %d to validate phase in degrees\n", ind)); + return FAIL; } - LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", ind)); - int maxShift = getMaxPhase(ind); - // convert degrees to shift - int valShift = 0; - ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); - // convert back to degrees - ConvertToDifferentRange(0, maxShift - 1, 0, 359, valShift, &val); + if (val == -1) { + return OK; + } + LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", ind)); + int maxShift = getMaxPhase(ind); + // convert degrees to shift + int valShift = 0; + ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); + // convert back to degrees + ConvertToDifferentRange(0, maxShift - 1, 0, 359, valShift, &val); - if (val == retval) - return OK; - return FAIL; + if (val == retval) + return OK; + return FAIL; } int setFrequency(enum CLKINDEX ind, int val) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to set frequency\n", ind)); - return FAIL; - } + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to set frequency\n", ind)); + return FAIL; + } if (val <= 0) { return FAIL; } - char* clock_names[] = {CLK_NAMES}; - LOG(logINFOBLUE, ("Setting %s clock (%d) frequency to %d MHz\n", clock_names[ind], ind, val)); + char *clock_names[] = {CLK_NAMES}; + LOG(logINFOBLUE, ("Setting %s clock (%d) frequency to %d MHz\n", + clock_names[ind], ind, val)); // check adc clk too high if (ind == ADC_CLK && val > MAXIMUM_ADC_CLK) { @@ -1435,9 +1462,11 @@ int setFrequency(enum CLKINDEX ind, int val) { LOG(logDEBUG1, ("\tRemembering DBIT phase: %d degrees\n", dbitPhase)); // Calculate and set output frequency - clkFrequency[ind] = ALTERA_PLL_SetOuputFrequency (ind, PLL_VCO_FREQ_MHZ, val); - LOG(logINFO, ("\t%s clock (%d) frequency set to %d MHz\n", clock_names[ind], ind, clkFrequency[ind])); - + clkFrequency[ind] = + ALTERA_PLL_SetOuputFrequency(ind, PLL_VCO_FREQ_MHZ, val); + LOG(logINFO, ("\t%s clock (%d) frequency set to %d MHz\n", clock_names[ind], + ind, clkFrequency[ind])); + // phase reset by pll (when setting output frequency) clkPhase[ADC_CLK] = 0; clkPhase[DBIT_CLK] = 0; @@ -1446,9 +1475,10 @@ int setFrequency(enum CLKINDEX ind, int val) { LOG(logINFO, ("\tCorrecting ADC phase to %d degrees\n", adcPhase)); setPhase(ADC_CLK, adcPhase, 1); LOG(logINFO, ("\tCorrecting DBIT phase to %d degrees\n", dbitPhase)); - setPhase(DBIT_CLK, dbitPhase, 1); + setPhase(DBIT_CLK, dbitPhase, 1); - // required to reconfigure as adc clock is stopped temporarily when resetting pll (in changing output frequency) + // required to reconfigure as adc clock is stopped temporarily when + // resetting pll (in changing output frequency) AD9257_Configure(); if (ind != SYNC_CLK) { @@ -1458,17 +1488,17 @@ int setFrequency(enum CLKINDEX ind, int val) { } int getFrequency(enum CLKINDEX ind) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind)); - return -1; - } + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind)); + return -1; + } return clkFrequency[ind]; } void configureSyncFrequency(enum CLKINDEX ind) { - char* clock_names[] = {CLK_NAMES}; + char *clock_names[] = {CLK_NAMES}; int clka = 0, clkb = 0; - switch(ind) { + switch (ind) { case ADC_CLK: clka = DBIT_CLK; clkb = RUN_CLK; @@ -1482,7 +1512,8 @@ void configureSyncFrequency(enum CLKINDEX ind) { clkb = ADC_CLK; break; default: - LOG(logERROR, ("Unknown clock index %d to configure sync frequcny\n", ind)); + LOG(logERROR, + ("Unknown clock index %d to configure sync frequcny\n", ind)); return; } @@ -1490,8 +1521,10 @@ void configureSyncFrequency(enum CLKINDEX ind) { int retval = getFrequency(ind); int aFreq = getFrequency(clka); int bFreq = getFrequency(clkb); - LOG(logDEBUG1, ("Sync Frequncy:%d, RetvalFreq(%s):%d, aFreq(%s):%d, bFreq(%s):%d\n", - syncFreq, clock_names[ind], retval, clock_names[clka], aFreq, clock_names[clkb], bFreq)); + LOG(logDEBUG1, + ("Sync Frequncy:%d, RetvalFreq(%s):%d, aFreq(%s):%d, bFreq(%s):%d\n", + syncFreq, clock_names[ind], retval, clock_names[clka], aFreq, + clock_names[clkb], bFreq)); int configure = 0; @@ -1500,7 +1533,7 @@ void configureSyncFrequency(enum CLKINDEX ind) { min = (retval < min) ? retval : min; // sync is greater than min - if (syncFreq > retval) { + if (syncFreq > retval) { LOG(logINFO, ("\t--Configuring Sync Clock\n")); configure = 1; } @@ -1518,10 +1551,10 @@ void configureSyncFrequency(enum CLKINDEX ind) { // adc pipeline only void setPipeline(enum CLKINDEX ind, int val) { - if (ind != ADC_CLK) { - LOG(logERROR, ("Unknown clock index %d to set pipeline\n", ind)); - return; - } + if (ind != ADC_CLK) { + LOG(logERROR, ("Unknown clock index %d to set pipeline\n", ind)); + return; + } if (val < 0) { return; } @@ -1530,7 +1563,7 @@ void setPipeline(enum CLKINDEX ind, int val) { uint32_t mask = ADC_OFFSET_ADC_PPLN_MSK; uint32_t addr = ADC_OFFSET_REG; // reset value - bus_w(addr, bus_r(addr) & ~ mask); + bus_w(addr, bus_r(addr) & ~mask); // set value bus_w(addr, bus_r(addr) | ((val << offset) & mask)); LOG(logDEBUG1, (" adc clock (%d) Offset: 0x%8x\n", ADC_CLK, bus_r(addr))); @@ -1538,32 +1571,37 @@ void setPipeline(enum CLKINDEX ind, int val) { int getPipeline(enum CLKINDEX ind) { if (ind != ADC_CLK) { - LOG(logERROR, ("Unknown clock index %d to get pipeline\n", ind)); - return -1; - } - return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >> ADC_OFFSET_ADC_PPLN_OFST); + LOG(logERROR, ("Unknown clock index %d to get pipeline\n", ind)); + return -1; + } + return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >> + ADC_OFFSET_ADC_PPLN_OFST); } - // patterns uint64_t writePatternIOControl(uint64_t word) { if ((int64_t)word != -1) { - LOG(logINFO, ("Setting Pattern I/O Control: 0x%llx\n", (long long int) word)); + LOG(logINFO, + ("Setting Pattern I/O Control: 0x%llx\n", (long long int)word)); set64BitReg(word, PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG); } - uint64_t retval = get64BitReg(PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG); - LOG(logDEBUG1, (" I/O Control retval: 0x%llx\n", (long long int) retval)); + uint64_t retval = + get64BitReg(PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG); + LOG(logDEBUG1, (" I/O Control retval: 0x%llx\n", (long long int)retval)); return retval; } uint64_t writePatternClkControl(uint64_t word) { if ((int64_t)word != -1) { - LOG(logINFO, ("Setting Pattern Clock Control: 0x%llx\n", (long long int) word)); - set64BitReg(word, PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG); + LOG(logINFO, + ("Setting Pattern Clock Control: 0x%llx\n", (long long int)word)); + set64BitReg(word, PATTERN_IO_CLK_CNTRL_LSB_REG, + PATTERN_IO_CLK_CNTRL_MSB_REG); } - uint64_t retval = get64BitReg(PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG); - LOG(logDEBUG1, (" Clock Control retval: 0x%llx\n", (long long int) retval)); + uint64_t retval = + get64BitReg(PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG); + LOG(logDEBUG1, (" Clock Control retval: 0x%llx\n", (long long int)retval)); return retval; } @@ -1571,7 +1609,8 @@ uint64_t readPatternWord(int addr) { // error (handled in tcp) if (addr < 0 || addr >= MAX_PATTERN_LENGTH) { LOG(logERROR, ("Cannot get Pattern - Word. Invalid addr 0x%x. " - "Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH)); + "Should be between 0 and 0x%x\n", + addr, MAX_PATTERN_LENGTH)); return -1; } @@ -1590,7 +1629,8 @@ uint64_t readPatternWord(int addr) { // read value uint64_t retval = get64BitReg(PATTERN_OUT_LSB_REG, PATTERN_OUT_MSB_REG); - LOG(logDEBUG1, (" Word(addr:0x%x) retval: 0x%llx\n", addr, (long long int) retval)); + LOG(logDEBUG1, + (" Word(addr:0x%x) retval: 0x%llx\n", addr, (long long int)retval)); return retval; } @@ -1603,16 +1643,19 @@ uint64_t writePatternWord(int addr, uint64_t word) { // error (handled in tcp) if (addr < 0 || addr >= MAX_PATTERN_LENGTH) { LOG(logERROR, ("Cannot set Pattern - Word. Invalid addr 0x%x. " - "Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH)); + "Should be between 0 and 0x%x\n", + addr, MAX_PATTERN_LENGTH)); return -1; } - LOG(logINFO, ("Setting Pattern Word (addr:0x%x, word:0x%llx)\n", addr, (long long int) word)); + LOG(logINFO, ("Setting Pattern Word (addr:0x%x, word:0x%llx)\n", addr, + (long long int)word)); uint32_t reg = PATTERN_CNTRL_REG; // write word set64BitReg(word, PATTERN_IN_LSB_REG, PATTERN_IN_MSB_REG); - LOG(logDEBUG1, (" Wrote word. PatternIn Reg: 0x%llx\n", get64BitReg(PATTERN_IN_LSB_REG, PATTERN_IN_MSB_REG))); + LOG(logDEBUG1, (" Wrote word. PatternIn Reg: 0x%llx\n", + get64BitReg(PATTERN_IN_LSB_REG, PATTERN_IN_MSB_REG))); // overwrite with only addr bus_w(reg, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK)); @@ -1624,7 +1667,7 @@ uint64_t writePatternWord(int addr, uint64_t word) { bus_w(reg, bus_r(reg) & (~PATTERN_CNTRL_WR_MSK)); return word; - //return readPatternWord(addr); // will start executing the pattern + // return readPatternWord(addr); // will start executing the pattern } int setPatternWaitAddress(int level, int addr) { @@ -1632,7 +1675,8 @@ int setPatternWaitAddress(int level, int addr) { // error (handled in tcp) if (addr >= MAX_PATTERN_LENGTH) { LOG(logERROR, ("Cannot set Pattern Wait Address. Invalid addr 0x%x. " - "Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH)); + "Should be between 0 and 0x%x\n", + addr, MAX_PATTERN_LENGTH)); return -1; } @@ -1658,19 +1702,22 @@ int setPatternWaitAddress(int level, int addr) { break; default: LOG(logERROR, ("Cannot set Pattern Wait Address. Invalid level 0x%x. " - "Should be between 0 and 2.\n", level)); + "Should be between 0 and 2.\n", + level)); return -1; } // set if (addr >= 0) { - LOG(logINFO, ("Setting Pattern Wait Address (level:%d, addr:0x%x)\n", level, addr)); + LOG(logINFO, ("Setting Pattern Wait Address (level:%d, addr:0x%x)\n", + level, addr)); bus_w(reg, ((addr << offset) & mask)); } // get uint32_t regval = ((bus_r(reg) & mask) >> offset); - LOG(logDEBUG1, (" Wait Address retval (level:%d, addr:0x%x)\n", level, regval)); + LOG(logDEBUG1, + (" Wait Address retval (level:%d, addr:0x%x)\n", level, regval)); return regval; } @@ -1693,29 +1740,33 @@ uint64_t setPatternWaitTime(int level, uint64_t t) { break; default: LOG(logERROR, ("Cannot set Pattern Wait Time. Invalid level %d. " - "Should be between 0 and 2.\n", level)); + "Should be between 0 and 2.\n", + level)); return -1; } // set if ((int64_t)t >= 0) { - LOG(logINFO, ("Setting Pattern Wait Time (level:%d, t:%lld)\n", level, (long long int)t)); + LOG(logINFO, ("Setting Pattern Wait Time (level:%d, t:%lld)\n", level, + (long long int)t)); set64BitReg(t, regl, regm); } // get uint64_t regval = get64BitReg(regl, regm); - LOG(logDEBUG1, (" Wait Time retval (level:%d, t:%lld)\n", level, (long long int)regval)); + LOG(logDEBUG1, (" Wait Time retval (level:%d, t:%lld)\n", level, + (long long int)regval)); return regval; } void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { // (checked at tcp) - if (*startAddr >= MAX_PATTERN_LENGTH || *stopAddr >= MAX_PATTERN_LENGTH) { - LOG(logERROR, ("Cannot set Pattern Loop, Address (startaddr:0x%x, stopaddr:0x%x) must be " - "less than 0x%x\n", - *startAddr, *stopAddr, MAX_PATTERN_LENGTH)); + if (*startAddr >= MAX_PATTERN_LENGTH || *stopAddr >= MAX_PATTERN_LENGTH) { + LOG(logERROR, ("Cannot set Pattern Loop, Address (startaddr:0x%x, " + "stopaddr:0x%x) must be " + "less than 0x%x\n", + *startAddr, *stopAddr, MAX_PATTERN_LENGTH)); } uint32_t addr = 0; @@ -1762,7 +1813,8 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { default: // already checked at tcp interface LOG(logERROR, ("Cannot set Pattern loop. Invalid level %d. " - "Should be between -1 and 2.\n", level)); + "Should be between -1 and 2.\n", + level)); *startAddr = 0; *stopAddr = 0; *nLoop = 0; @@ -1772,8 +1824,8 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { if (level >= 0) { // set iteration if (*nLoop >= 0) { - LOG(logINFO, ("Setting Pattern Loop (level:%d, nLoop:%d)\n", - level, *nLoop)); + LOG(logINFO, + ("Setting Pattern Loop (level:%d, nLoop:%d)\n", level, *nLoop)); bus_w(nLoopReg, *nLoop); } *nLoop = bus_r(nLoopReg); @@ -1781,112 +1833,115 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { // set if (*startAddr >= 0 && *stopAddr >= 0) { - // writing start and stop addr - LOG(logINFO, ("Setting Pattern Loop (level:%d, startaddr:0x%x, stopaddr:0x%x)\n", - level, *startAddr, *stopAddr)); - bus_w(addr, ((*startAddr << startOffset) & startMask) | ((*stopAddr << stopOffset) & stopMask)); - LOG(logDEBUG1, ("Addr:0x%x, val:0x%x\n", addr, bus_r(addr))); + // writing start and stop addr + LOG(logINFO, + ("Setting Pattern Loop (level:%d, startaddr:0x%x, stopaddr:0x%x)\n", + level, *startAddr, *stopAddr)); + bus_w(addr, ((*startAddr << startOffset) & startMask) | + ((*stopAddr << stopOffset) & stopMask)); + LOG(logDEBUG1, ("Addr:0x%x, val:0x%x\n", addr, bus_r(addr))); } // get else { - *startAddr = ((bus_r(addr) & startMask) >> startOffset); - LOG(logDEBUG1, ("Getting Pattern Loop Start Address (level:%d, Read startAddr:0x%x)\n", - level, *startAddr)); + *startAddr = ((bus_r(addr) & startMask) >> startOffset); + LOG(logDEBUG1, ("Getting Pattern Loop Start Address (level:%d, Read " + "startAddr:0x%x)\n", + level, *startAddr)); - *stopAddr = ((bus_r(addr) & stopMask) >> stopOffset); - LOG(logDEBUG1, ("Getting Pattern Loop Stop Address (level:%d, Read stopAddr:0x%x)\n", - level, *stopAddr)); + *stopAddr = ((bus_r(addr) & stopMask) >> stopOffset); + LOG(logDEBUG1, ("Getting Pattern Loop Stop Address (level:%d, Read " + "stopAddr:0x%x)\n", + level, *stopAddr)); } } - void setPatternMask(uint64_t mask) { LOG(logINFO, ("Setting pattern mask to 0x%llx\n", mask)); - set64BitReg(mask, PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); + set64BitReg(mask, PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); } uint64_t getPatternMask() { - return get64BitReg(PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); + return get64BitReg(PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); } void setPatternBitMask(uint64_t mask) { LOG(logINFO, ("Setting pattern bit mask to 0x%llx\n", mask)); - set64BitReg(mask, PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); + set64BitReg(mask, PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); } uint64_t getPatternBitMask() { - return get64BitReg(PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); + return get64BitReg(PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); } - - /* aquisition */ -int startStateMachine(){ +int startStateMachine() { #ifdef VIRTUAL - // create udp socket - if(createUDPSocket(0) != OK) { - return FAIL; - } - LOG(logINFOBLUE, ("Starting State Machine\n")); + // create udp socket + if (createUDPSocket(0) != OK) { + return FAIL; + } + LOG(logINFOBLUE, ("Starting State Machine\n")); virtual_status = 1; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - virtual_stop = ComVirtual_getStop(); - if (virtual_stop != 0) { - LOG(logERROR, ("Cant start acquisition. " - "Stop server has not updated stop status to 0\n")); - return FAIL; - } - } - if(pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { - LOG(logERROR, ("Could not start Virtual acquisition thread\n")); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - return FAIL; - } - LOG(logINFOGREEN, ("Virtual Acquisition started\n")); - return OK; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + virtual_stop = ComVirtual_getStop(); + if (virtual_stop != 0) { + LOG(logERROR, ("Cant start acquisition. " + "Stop server has not updated stop status to 0\n")); + return FAIL; + } + } + if (pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { + LOG(logERROR, ("Could not start Virtual acquisition thread\n")); + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + return FAIL; + } + LOG(logINFOGREEN, ("Virtual Acquisition started\n")); + return OK; #endif int send_to_10g = enableTenGigabitEthernet(-1); - // 1 giga udp - if (send_to_10g == 0) { - // create udp socket - if(createUDPSocket(0) != OK) { - return FAIL; - } - // update header with modId, detType and version. Reset offset and fnum - createUDPPacketHeader(udpPacketData, getHardwareSerialNumber()); - } - - LOG(logINFOBLUE, ("Starting State Machine\n")); - cleanFifos(); - if (send_to_10g == 0) { - unsetFifoReadStrobes(); // FIXME: unnecessary to write bus_w(dumm, 0) as it is 0 in the beginnig and the strobes are always unset if set + // 1 giga udp + if (send_to_10g == 0) { + // create udp socket + if (createUDPSocket(0) != OK) { + return FAIL; + } + // update header with modId, detType and version. Reset offset and fnum + createUDPPacketHeader(udpPacketData, getHardwareSerialNumber()); } - //start state machine - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK | CONTROL_STRT_EXPSR_MSK); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STRT_ACQSTN_MSK & ~CONTROL_STRT_EXPSR_MSK); + LOG(logINFOBLUE, ("Starting State Machine\n")); + cleanFifos(); + if (send_to_10g == 0) { + unsetFifoReadStrobes(); // FIXME: unnecessary to write bus_w(dumm, 0) as + // it is 0 in the beginnig and the strobes are + // always unset if set + } - LOG(logINFO, ("Status Register: %08x\n",bus_r(STATUS_REG))); - return OK; + // start state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK | + CONTROL_STRT_EXPSR_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STRT_ACQSTN_MSK & + ~CONTROL_STRT_EXPSR_MSK); + + LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); + return OK; } - #ifdef VIRTUAL -void* start_timer(void* arg) { - if (!isControlServer) { - return NULL; - } +void *start_timer(void *arg) { + if (!isControlServer) { + return NULL; + } - int64_t periodNs = getPeriod(); - int numFrames = (getNumFrames() * - getNumTriggers() ); - int64_t expNs = getExpTime(); + int64_t periodNs = getPeriod(); + int numFrames = (getNumFrames() * getNumTriggers()); + int64_t expNs = getExpTime(); int imageSize = dataBytes; int dataSize = UDP_PACKET_DATA_BYTES; @@ -1899,20 +1954,20 @@ void* start_timer(void* arg) { { int i = 0; for (i = 0; i < imageSize; i += sizeof(uint16_t)) { - *((uint16_t*)(imageData + i)) = i; - } + *((uint16_t *)(imageData + i)) = i; + } } - // Send data + // Send data { int frameNr = 0; // loop over number of frames - for(frameNr = 0; frameNr != numFrames; ++frameNr ) { + for (frameNr = 0; frameNr != numFrames; ++frameNr) { - // update the virtual stop from stop server - virtual_stop = ComVirtual_getStop(); - //check if virtual_stop is high - if(virtual_stop == 1){ + // update the virtual stop from stop server + virtual_stop = ComVirtual_getStop(); + // check if virtual_stop is high + if (virtual_stop == 1) { break; } @@ -1925,13 +1980,14 @@ void* start_timer(void* arg) { // loop packet { int i = 0; - for(i = 0; i != packetsPerFrame; ++i) { + for (i = 0; i != packetsPerFrame; ++i) { // set header char packetData[packetSize]; memset(packetData, 0, packetSize); - sls_detector_header* header = (sls_detector_header*)(packetData); + sls_detector_header *header = + (sls_detector_header *)(packetData); header->detType = (uint16_t)myDetectorType; - header->version = SLS_DETECTOR_HEADER_VERSION - 1; + header->version = SLS_DETECTOR_HEADER_VERSION - 1; header->frameNumber = frameNr; header->packetNumber = i; header->modId = 0; @@ -1939,192 +1995,191 @@ void* start_timer(void* arg) { header->column = detPos[Y]; // fill data - memcpy(packetData + sizeof(sls_detector_header), imageData + srcOffset, dataSize); + memcpy(packetData + sizeof(sls_detector_header), + imageData + srcOffset, dataSize); srcOffset += dataSize; - + sendUDPPacket(0, packetData, packetSize); } } LOG(logINFO, ("Sent frame: %d\n", frameNr)); clock_gettime(CLOCK_REALTIME, &end); int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 + - (end.tv_nsec - begin.tv_nsec)); + (end.tv_nsec - begin.tv_nsec)); // sleep for (period - exptime) if (frameNr < numFrames) { // if there is a next frame if (periodNs > timeNs) { - usleep((periodNs - timeNs)/ 1000); + usleep((periodNs - timeNs) / 1000); } } } } - closeUDPSocket(0); + closeUDPSocket(0); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - LOG(logINFOBLUE, ("Finished Acquiring\n")); - return NULL; + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + LOG(logINFOBLUE, ("Finished Acquiring\n")); + return NULL; } #endif -int stopStateMachine(){ - LOG(logINFORED, ("Stopping State Machine\n")); +int stopStateMachine() { + LOG(logINFORED, ("Stopping State Machine\n")); #ifdef VIRTUAL - if (!isControlServer) { - virtual_stop = 1; - ComVirtual_setStop(virtual_stop); - // read till status is idle - int tempStatus = 1; - while(tempStatus == 1) { - tempStatus = ComVirtual_getStatus(); - } - virtual_stop = 0; - ComVirtual_setStop(virtual_stop); - LOG(logINFO, ("Stopped State Machine\n")); - } - return OK; + if (!isControlServer) { + virtual_stop = 1; + ComVirtual_setStop(virtual_stop); + // read till status is idle + int tempStatus = 1; + while (tempStatus == 1) { + tempStatus = ComVirtual_getStatus(); + } + virtual_stop = 0; + ComVirtual_setStop(virtual_stop); + LOG(logINFO, ("Stopped State Machine\n")); + } + return OK; #endif - //stop state machine - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STP_ACQSTN_MSK); - usleep(WAIT_TIME_US_STP_ACQ); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STP_ACQSTN_MSK); + // stop state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STP_ACQSTN_MSK); + usleep(WAIT_TIME_US_STP_ACQ); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STP_ACQSTN_MSK); - LOG(logINFO, ("Status Register: %08x\n",bus_r(STATUS_REG))); + LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); - return OK; + return OK; } - - - - -enum runStatus getRunStatus(){ +enum runStatus getRunStatus() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } - if(virtual_status == 0) { - LOG(logINFOBLUE, ("Status: IDLE\n")); - return IDLE; - }else{ - LOG(logINFOBLUE, ("Status: RUNNING\n")); - return RUNNING; - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } + if (virtual_status == 0) { + LOG(logINFOBLUE, ("Status: IDLE\n")); + return IDLE; + } else { + LOG(logINFOBLUE, ("Status: RUNNING\n")); + return RUNNING; + } #endif - LOG(logDEBUG1, ("Getting status\n")); + LOG(logDEBUG1, ("Getting status\n")); - uint32_t retval = bus_r(STATUS_REG); - LOG(logINFO, ("Status Register: %08x\n",retval)); + uint32_t retval = bus_r(STATUS_REG); + LOG(logINFO, ("Status Register: %08x\n", retval)); - // error - //if (retval & STATUS_SM_FF_FLL_MSK) { This bit is high when a analog fifo is full Or when external stop - if (retval & STATUS_ANY_FF_FLL_MSK) { // if adc or digital fifo is full - LOG(logINFORED, ("Status: Error (Any fifo full)\n")); - return ERROR; - } + // error + // if (retval & STATUS_SM_FF_FLL_MSK) { This bit is high when a analog fifo + // is full Or when external stop + if (retval & STATUS_ANY_FF_FLL_MSK) { // if adc or digital fifo is full + LOG(logINFORED, ("Status: Error (Any fifo full)\n")); + return ERROR; + } - // running - if(retval & STATUS_RN_BSY_MSK) { - if (retval & STATUS_WTNG_FR_TRGGR_MSK) { - LOG(logINFOBLUE, ("Status: Waiting for Trigger\n")); - return WAITING; - } + // running + if (retval & STATUS_RN_BSY_MSK) { + if (retval & STATUS_WTNG_FR_TRGGR_MSK) { + LOG(logINFOBLUE, ("Status: Waiting for Trigger\n")); + return WAITING; + } - LOG(logINFOBLUE, ("Status: Running\n")); - return RUNNING; + LOG(logINFOBLUE, ("Status: Running\n")); + return RUNNING; - } + } - // not running - else { - if (retval & STATUS_STPPD_MSK) { - LOG(logINFOBLUE, ("Status: Stopped\n")); - return STOPPED; - } + // not running + else { + if (retval & STATUS_STPPD_MSK) { + LOG(logINFOBLUE, ("Status: Stopped\n")); + return STOPPED; + } - if (retval & STATUS_FRM_RN_BSY_MSK) { - LOG(logINFOBLUE, ("Status: Transmitting (Read machine busy)\n")); - return TRANSMITTING; - } + if (retval & STATUS_FRM_RN_BSY_MSK) { + LOG(logINFOBLUE, ("Status: Transmitting (Read machine busy)\n")); + return TRANSMITTING; + } + if (!(retval & STATUS_IDLE_MSK)) { + LOG(logINFOBLUE, ("Status: Idle\n")); + return IDLE; + } - if (! (retval & STATUS_IDLE_MSK)) { - LOG(logINFOBLUE, ("Status: Idle\n")); - return IDLE; - } - - LOG(logERROR, ("Status: Unknown status %08x\n", retval)); - return ERROR; - } + LOG(logERROR, ("Status: Unknown status %08x\n", retval)); + return ERROR; + } } - void readandSendUDPFrames(int *ret, char *mess) { - LOG(logDEBUG1, ("Reading from 1G UDP\n")); + LOG(logDEBUG1, ("Reading from 1G UDP\n")); - // validate udp socket - if (getUdPSocketDescriptor(0) <= 0) { - *ret = FAIL; - sprintf(mess,"UDP Socket not created. sockfd:%d\n", getUdPSocketDescriptor(0)); - LOG(logERROR, (mess)); - return; - } + // validate udp socket + if (getUdPSocketDescriptor(0) <= 0) { + *ret = FAIL; + sprintf(mess, "UDP Socket not created. sockfd:%d\n", + getUdPSocketDescriptor(0)); + LOG(logERROR, (mess)); + return; + } - // every frame read - while(readFrameFromFifo() == OK) { - int bytesToSend = 0, n = 0; - while((bytesToSend = fillUDPPacket(udpPacketData))) { - n += sendUDPPacket(0, udpPacketData, bytesToSend); - } - if (n >= dataBytes) { - LOG(logINFO, (" Frame %lld sent (%d packets, %d databytes, n:%d bytes sent)\n", - udpFrameNumber, udpPacketNumber + 1, dataBytes, n)); - } - } - closeUDPSocket(0); + // every frame read + while (readFrameFromFifo() == OK) { + int bytesToSend = 0, n = 0; + while ((bytesToSend = fillUDPPacket(udpPacketData))) { + n += sendUDPPacket(0, udpPacketData, bytesToSend); + } + if (n >= dataBytes) { + LOG(logINFO, (" Frame %lld sent (%d packets, %d databytes, n:%d " + "bytes sent)\n", + udpFrameNumber, udpPacketNumber + 1, dataBytes, n)); + } + } + closeUDPSocket(0); } - void readFrame(int *ret, char *mess) { #ifdef VIRTUAL // wait for acquisition to be done - while(runBusy()){ + while (runBusy()) { usleep(500); // random } LOG(logINFOGREEN, ("acquisition successfully finished\n")); - return; + return; #endif - // 1G - if (!enableTenGigabitEthernet(-1)) { - readandSendUDPFrames(ret, mess); - } - // 10G - else { - // wait for acquisition to be done - while(runBusy()){ - usleep(500); // random - } - } + // 1G + if (!enableTenGigabitEthernet(-1)) { + readandSendUDPFrames(ret, mess); + } + // 10G + else { + // wait for acquisition to be done + while (runBusy()) { + usleep(500); // random + } + } - // ret could be fail in 1gudp for not creating udp sockets - if (*ret != FAIL) { - // frames left to give status - int64_t retval = getNumFramesLeft() + 2; - if ( retval > 1) { - sprintf(mess,"No data and run stopped: %lld frames left\n",(long long int)retval); - LOG(logERROR, (mess)); - } else { - LOG(logINFOGREEN, ("Acquisition successfully finished\n")); - } - } + // ret could be fail in 1gudp for not creating udp sockets + if (*ret != FAIL) { + // frames left to give status + int64_t retval = getNumFramesLeft() + 2; + if (retval > 1) { + sprintf(mess, "No data and run stopped: %lld frames left\n", + (long long int)retval); + LOG(logERROR, (mess)); + } else { + LOG(logINFOGREEN, ("Acquisition successfully finished\n")); + } + } *ret = (int)OK; } void unsetFifoReadStrobes() { - bus_w(DUMMY_REG, bus_r(DUMMY_REG) & (~DUMMY_ANLG_FIFO_RD_STRBE_MSK) & (~DUMMY_DGTL_FIFO_RD_STRBE_MSK)); + bus_w(DUMMY_REG, bus_r(DUMMY_REG) & (~DUMMY_ANLG_FIFO_RD_STRBE_MSK) & + (~DUMMY_DGTL_FIFO_RD_STRBE_MSK)); } void readSample(int ns) { @@ -2146,9 +2201,11 @@ void readSample(int ns) { ; } - if (!(ns%1000)) { - LOG(logDEBUG1, ("Reading sample ns:%d of %d AEmtpy:0x%x AFull:0x%x Status:0x%x\n", - ns, nSamples, bus_r(FIFO_EMPTY_REG), bus_r(FIFO_FULL_REG), bus_r(STATUS_REG))); + if (!(ns % 1000)) { + LOG(logDEBUG1, ("Reading sample ns:%d of %d AEmtpy:0x%x AFull:0x%x " + "Status:0x%x\n", + ns, nSamples, bus_r(FIFO_EMPTY_REG), + bus_r(FIFO_FULL_REG), bus_r(STATUS_REG))); } // loop through all channels @@ -2162,16 +2219,17 @@ void readSample(int ns) { bus_w(addr, bus_r(addr) & ~(DUMMY_FIFO_CHNNL_SLCT_MSK)); // select channel - bus_w(addr, bus_r(addr) | ((ich << DUMMY_FIFO_CHNNL_SLCT_OFST) & DUMMY_FIFO_CHNNL_SLCT_MSK)); + bus_w(addr, bus_r(addr) | ((ich << DUMMY_FIFO_CHNNL_SLCT_OFST) & + DUMMY_FIFO_CHNNL_SLCT_MSK)); // read fifo and write it to current position of data pointer - *((uint16_t*)analogDataPtr) = bus_r16(fifoAddr); + *((uint16_t *)analogDataPtr) = bus_r16(fifoAddr); // keep reading till the value is the same - /* while (*((uint16_t*)analogDataPtr) != bus_r16(fifoAddr)) { - LOG(logDEBUG1, ("%d ", ich)); - *((uint16_t*)analogDataPtr) = bus_r16(fifoAddr); - }*/ + /* while (*((uint16_t*)analogDataPtr) != bus_r16(fifoAddr)) { + LOG(logDEBUG1, ("%d ", ich)); + *((uint16_t*)analogDataPtr) = bus_r16(fifoAddr); + }*/ // increment pointer to data out destination analogDataPtr += 2; @@ -2181,34 +2239,35 @@ void readSample(int ns) { } uint32_t checkDataInFifo() { - uint32_t dataPresent = 0; + uint32_t dataPresent = 0; uint32_t fifoEmpty = bus_r(FIFO_EMPTY_REG); LOG(logINFO, ("Analog Fifo Empty (32 channels): 0x%08x\n", fifoEmpty)); dataPresent = (~fifoEmpty); LOG(logDEBUG2, ("Data in Fifo :0x%x\n", dataPresent)); - return dataPresent; + return dataPresent; } // only called for starting of a new frame int checkFifoForEndOfAcquisition() { - uint32_t dataPresent = checkDataInFifo(); + uint32_t dataPresent = checkDataInFifo(); LOG(logDEBUG2, ("status:0x%x\n", bus_r(STATUS_REG))); // as long as no data while (!dataPresent) { // acquisition done if (!runBusy()) { - // wait to be sure there is no data in fifo + // wait to be sure there is no data in fifo usleep(WAIT_TME_US_FR_ACQDONE_REG); // still no data if (!checkDataInFifo()) { LOG(logINFO, ("Acquisition Finished (State: 0x%08x), " - "no frame found .\n", bus_r(STATUS_REG))); + "no frame found .\n", + bus_r(STATUS_REG))); return FAIL; } // got data, exit - else { + else { break; } } @@ -2220,8 +2279,8 @@ int checkFifoForEndOfAcquisition() { } int readFrameFromFifo() { - int ns = 0; - // point the data pointer to the starting position of data + int ns = 0; + // point the data pointer to the starting position of data analogDataPtr = analogData; // no data for this frame @@ -2230,7 +2289,7 @@ int readFrameFromFifo() { } // read Sample - while(ns < nSamples) { + while (ns < nSamples) { readSample(ns); ns++; } @@ -2241,28 +2300,19 @@ int readFrameFromFifo() { uint32_t runBusy() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } return virtual_status; #endif - uint32_t s = (bus_r(STATUS_REG) & STATUS_RN_BSY_MSK); - //LOG(logDEBUG1, ("Status Register: %08x\n", s)); - return s; + uint32_t s = (bus_r(STATUS_REG) & STATUS_RN_BSY_MSK); + // LOG(logDEBUG1, ("Status Register: %08x\n", s)); + return s; } - - - - - - - /* common */ -int calculateDataBytes(){ - return dataBytes; -} +int calculateDataBytes() { return dataBytes; } int getTotalNumberOfChannels() { int nchanx = 0, nchany = 0; @@ -2270,20 +2320,21 @@ int getTotalNumberOfChannels() { return nchanx * nchany; } -void getNumberOfChannels(int* nchanx, int* nchany) { - uint32_t mask = enableTenGigabitEthernet(-1) ? adcEnableMask_10g : adcEnableMask_1g; +void getNumberOfChannels(int *nchanx, int *nchany) { + uint32_t mask = + enableTenGigabitEthernet(-1) ? adcEnableMask_10g : adcEnableMask_1g; // count number of channels in x, each adc has 25 channels each - int nchanTop = __builtin_popcount(mask & 0xF0F0F0F0) * NCHANS_PER_ADC; - int nchanBot = __builtin_popcount(mask & 0x0F0F0F0F) * NCHANS_PER_ADC; - *nchanx = nchanTop > 0 ? nchanTop : nchanBot; + int nchanTop = __builtin_popcount(mask & 0xF0F0F0F0) * NCHANS_PER_ADC; + int nchanBot = __builtin_popcount(mask & 0x0F0F0F0F) * NCHANS_PER_ADC; + *nchanx = nchanTop > 0 ? nchanTop : nchanBot; // if both top and bottom adcs enabled, rows = 2 int nrows = 1; if (nchanTop > 0 && nchanBot > 0) { nrows = 2; - } + } *nchany = nSamples / NSAMPLES_PER_ROW * nrows; } -int getNumberOfChips(){return NCHIP;} -int getNumberOfDACs(){return NDAC;} -int getNumberOfChannelsPerChip(){return NCHAN;} +int getNumberOfChips() { return NCHIP; } +int getNumberOfDACs() { return NDAC; } +int getNumberOfChannelsPerChip() { return NCHAN; } diff --git a/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c index f5f16d533..06fbb3d5c 100644 --- a/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c @@ -1,19 +1,19 @@ #include "slsDetectorFunctionList.h" -#include "versionAPI.h" -#include "clogger.h" +#include "ALTERA_PLL_CYCLONE10.h" #include "DAC6571.h" #include "LTC2620_Driver.h" -#include "common.h" #include "RegisterDefs.h" -#include "ALTERA_PLL_CYCLONE10.h" +#include "clogger.h" +#include "common.h" +#include "versionAPI.h" #ifdef VIRTUAL #include "communication_funcs_UDP.h" #include "communication_virtual.h" #endif -#include -#include // usleep #include +#include +#include // usleep #ifdef VIRTUAL #include #include @@ -26,8 +26,8 @@ extern const enum detectorType myDetectorType; // Global variable from communication_funcs.c extern int isControlServer; -extern void getMacAddressinString(char* cmac, int size, uint64_t mac); -extern void getIpAddressinString(char* cip, uint32_t ip); +extern void getMacAddressinString(char *cmac, int size, uint64_t mac); +extern void getIpAddressinString(char *cip, uint32_t ip); int initError = OK; int initCheckDone = 0; @@ -45,15 +45,14 @@ uint32_t clkDivider[NUM_CLOCKS] = {}; int highvoltage = 0; int dacValues[NDAC] = {}; int detPos[2] = {}; -uint32_t countermask = 0; // will be removed later when in firmware converted to mask +uint32_t countermask = + 0; // will be removed later when in firmware converted to mask -int isInitCheckDone() { - return initCheckDone; -} +int isInitCheckDone() { return initCheckDone; } -int getInitResult(char** mess) { - *mess = initErrorMessage; - return initError; +int getInitResult(char **mess) { + *mess = initErrorMessage; + return initError; } void basictests() { @@ -63,178 +62,179 @@ void basictests() { #ifdef VIRTUAL LOG(logINFOBLUE, ("******** Mythen3 Virtual Server *****************\n")); if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; } return; #else - LOG(logINFOBLUE, ("************ Mythen3 Server *********************\n")); - if (mapCSP0() == FAIL) { - strcpy(initErrorMessage, - "Could not map to memory. Dangerous to continue.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; + LOG(logINFOBLUE, ("************ Mythen3 Server *********************\n")); + if (mapCSP0() == FAIL) { + strcpy(initErrorMessage, + "Could not map to memory. Dangerous to continue.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; } - // does check only if flag is 0 (by default), set by command line - if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL)|| (testBus() == FAIL))) { - strcpy(initErrorMessage, - "Could not pass basic tests of FPGA and bus. Dangerous to continue.\n"); - LOG(logERROR, ("%s\n\n", initErrorMessage)); - initError = FAIL; - return; - } - uint16_t hversion = getHardwareVersionNumber(); - uint32_t ipadd = getDetectorIP(); - uint64_t macadd = getDetectorMAC(); - int64_t fwversion = getFirmwareVersion(); - int64_t swversion = getServerVersion(); - int64_t sw_fw_apiversion = getFirmwareAPIVersion();; - int64_t client_sw_apiversion = getClientServerAPIVersion(); - uint32_t requiredFirmwareVersion = REQRD_FRMWRE_VRSN; + // does check only if flag is 0 (by default), set by command line + if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL) || + (testBus() == FAIL))) { + strcpy(initErrorMessage, "Could not pass basic tests of FPGA and bus. " + "Dangerous to continue.\n"); + LOG(logERROR, ("%s\n\n", initErrorMessage)); + initError = FAIL; + return; + } + uint16_t hversion = getHardwareVersionNumber(); + uint32_t ipadd = getDetectorIP(); + uint64_t macadd = getDetectorMAC(); + int64_t fwversion = getFirmwareVersion(); + int64_t swversion = getServerVersion(); + int64_t sw_fw_apiversion = getFirmwareAPIVersion(); + ; + int64_t client_sw_apiversion = getClientServerAPIVersion(); + uint32_t requiredFirmwareVersion = REQRD_FRMWRE_VRSN; - LOG(logINFOBLUE, ("*************************************************\n" - "Hardware Version:\t\t 0x%x\n" + LOG(logINFOBLUE, + ("*************************************************\n" + "Hardware Version:\t\t 0x%x\n" - "Detector IP Addr:\t\t 0x%x\n" - "Detector MAC Addr:\t\t 0x%llx\n\n" + "Detector IP Addr:\t\t 0x%x\n" + "Detector MAC Addr:\t\t 0x%llx\n\n" - "Firmware Version:\t\t 0x%llx\n" - "Software Version:\t\t 0x%llx\n" - "F/w-S/w API Version:\t\t 0x%llx\n" - "Required Firmware Version:\t 0x%x\n" - "Client-Software API Version:\t 0x%llx\n" - "********************************************************\n", - hversion, - ipadd, - (long long unsigned int)macadd, - (long long int)fwversion, - (long long int)swversion, - (long long int)sw_fw_apiversion, - requiredFirmwareVersion, - (long long int)client_sw_apiversion - )); + "Firmware Version:\t\t 0x%llx\n" + "Software Version:\t\t 0x%llx\n" + "F/w-S/w API Version:\t\t 0x%llx\n" + "Required Firmware Version:\t 0x%x\n" + "Client-Software API Version:\t 0x%llx\n" + "********************************************************\n", + hversion, ipadd, (long long unsigned int)macadd, + (long long int)fwversion, (long long int)swversion, + (long long int)sw_fw_apiversion, requiredFirmwareVersion, + (long long int)client_sw_apiversion)); - // return if flag is not zero, debug mode - if (debugflag) { - return; - } + // return if flag is not zero, debug mode + if (debugflag) { + return; + } - - //cant read versions + // cant read versions LOG(logINFO, ("Testing Firmware-software compatibility:\n")); - if(!fwversion || !sw_fw_apiversion){ - strcpy(initErrorMessage, - "Cant read versions from FPGA. Please update firmware.\n"); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + if (!fwversion || !sw_fw_apiversion) { + strcpy(initErrorMessage, + "Cant read versions from FPGA. Please update firmware.\n"); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for API compatibility - old server - if(sw_fw_apiversion > requiredFirmwareVersion){ - sprintf(initErrorMessage, - "This detector software software version (0x%llx) is incompatible.\n" - "Please update detector software (min. 0x%llx) to be compatible with this firmware.\n", - (long long int)sw_fw_apiversion, - (long long int)requiredFirmwareVersion); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } + // check for API compatibility - old server + if (sw_fw_apiversion > requiredFirmwareVersion) { + sprintf(initErrorMessage, + "This detector software software version (0x%llx) is " + "incompatible.\n" + "Please update detector software (min. 0x%llx) to be " + "compatible with this firmware.\n", + (long long int)sw_fw_apiversion, + (long long int)requiredFirmwareVersion); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } - //check for firmware compatibility - old firmware - if( requiredFirmwareVersion > fwversion) { - sprintf(initErrorMessage, - "This firmware version (0x%llx) is incompatible.\n" - "Please update firmware (min. 0x%llx) to be compatible with this server.\n", - (long long int)fwversion, - (long long int)requiredFirmwareVersion); - LOG(logERROR, (initErrorMessage)); - initError = FAIL; - return; - } - LOG(logINFO, ("Compatibility - success\n")); + // check for firmware compatibility - old firmware + if (requiredFirmwareVersion > fwversion) { + sprintf(initErrorMessage, + "This firmware version (0x%llx) is incompatible.\n" + "Please update firmware (min. 0x%llx) to be compatible with " + "this server.\n", + (long long int)fwversion, + (long long int)requiredFirmwareVersion); + LOG(logERROR, (initErrorMessage)); + initError = FAIL; + return; + } + LOG(logINFO, ("Compatibility - success\n")); #endif } - int checkType() { #ifdef VIRTUAL return OK; #endif - u_int32_t type = ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); - if (type != MYTHEN3){ - LOG(logERROR, ("This is not a Mythen3 firmware (read %d, expected %d)\n", type, MYTHEN3)); - return FAIL; - } + u_int32_t type = + ((bus_r(FPGA_VERSION_REG) & DETECTOR_TYPE_MSK) >> DETECTOR_TYPE_OFST); + if (type != MYTHEN3) { + LOG(logERROR, + ("This is not a Mythen3 firmware (read %d, expected %d)\n", type, + MYTHEN3)); + return FAIL; + } - return OK; + return OK; } int testFpga() { #ifdef VIRTUAL return OK; #endif - LOG(logINFO, ("Testing FPGA:\n")); + LOG(logINFO, ("Testing FPGA:\n")); - //fixed pattern - int ret = OK; - volatile u_int32_t val = bus_r(FIX_PATT_REG); - if (val == FIX_PATT_VAL) { - LOG(logINFO, ("Fixed pattern: successful match 0x%08x\n",val)); - } else { - LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL)); - ret = FAIL; - } - return ret; + // fixed pattern + int ret = OK; + volatile u_int32_t val = bus_r(FIX_PATT_REG); + if (val == FIX_PATT_VAL) { + LOG(logINFO, ("Fixed pattern: successful match 0x%08x\n", val)); + } else { + LOG(logERROR, + ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", + val, FIX_PATT_VAL)); + ret = FAIL; + } + return ret; } int testBus() { #ifdef VIRTUAL return OK; #endif - LOG(logINFO, ("Testing Bus:\n")); + LOG(logINFO, ("Testing Bus:\n")); - int ret = OK; - u_int32_t addr = DTA_OFFSET_REG; - u_int32_t times = 1000 * 1000; - u_int32_t i = 0; + int ret = OK; + u_int32_t addr = DTA_OFFSET_REG; + u_int32_t times = 1000 * 1000; + u_int32_t i = 0; - for (i = 0; i < times; ++i) { - bus_w(addr, i * 100); - if (i * 100 != bus_r(addr)) { - LOG(logERROR, ("Mismatch! Wrote 0x%x, read 0x%x\n", - i * 100, bus_r(addr))); - ret = FAIL; - } - } + for (i = 0; i < times; ++i) { + bus_w(addr, i * 100); + if (i * 100 != bus_r(addr)) { + LOG(logERROR, + ("Mismatch! Wrote 0x%x, read 0x%x\n", i * 100, bus_r(addr))); + ret = FAIL; + } + } - bus_w(addr, 0); + bus_w(addr, 0); - if (ret == OK) { - LOG(logINFO, ("Successfully tested bus %d times\n", times)); - } - return ret; + if (ret == OK) { + LOG(logINFO, ("Successfully tested bus %d times\n", times)); + } + return ret; } /* Ids */ -uint64_t getServerVersion() { - return APIMYTHEN3; -} +uint64_t getServerVersion() { return APIMYTHEN3; } -uint64_t getClientServerAPIVersion() { - return APIMYTHEN3; -} +uint64_t getClientServerAPIVersion() { return APIMYTHEN3; } u_int64_t getFirmwareVersion() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(FPGA_VERSION_REG) & FPGA_COMPILATION_DATE_MSK) >> FPGA_COMPILATION_DATE_OFST); + return ((bus_r(FPGA_VERSION_REG) & FPGA_COMPILATION_DATE_MSK) >> + FPGA_COMPILATION_DATE_OFST); } u_int64_t getFirmwareAPIVersion() { @@ -248,164 +248,169 @@ u_int16_t getHardwareVersionNumber() { #ifdef VIRTUAL return 0; #endif - return bus_r(MCB_SERIAL_NO_REG); + return bus_r(MCB_SERIAL_NO_REG); } -u_int32_t getDetectorNumber(){ +u_int32_t getDetectorNumber() { #ifdef VIRTUAL return 0; #endif - return ((bus_r(MCB_SERIAL_NO_REG) & MCB_SERIAL_NO_VRSN_MSK) >> MCB_SERIAL_NO_VRSN_OFST); + return ((bus_r(MCB_SERIAL_NO_REG) & MCB_SERIAL_NO_VRSN_MSK) >> + MCB_SERIAL_NO_VRSN_OFST); } - -u_int64_t getDetectorMAC() { +u_int64_t getDetectorMAC() { #ifdef VIRTUAL return 0; #else - char output[255],mac[255]=""; - u_int64_t res=0; - FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - //getting rid of ":" - char * pch; - pch = strtok (output,":"); - while (pch != NULL){ - strcat(mac,pch); - pch = strtok (NULL, ":"); - } - sscanf(mac,"%llx",&res); - return res; + char output[255], mac[255] = ""; + u_int64_t res = 0; + FILE *sysFile = + popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + // getting rid of ":" + char *pch; + pch = strtok(output, ":"); + while (pch != NULL) { + strcat(mac, pch); + pch = strtok(NULL, ":"); + } + sscanf(mac, "%llx", &res); + return res; #endif } -u_int32_t getDetectorIP(){ +u_int32_t getDetectorIP() { #ifdef VIRTUAL return 0; #endif - char temp[50]=""; - u_int32_t res=0; - //execute and get address - char output[255]; - FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); + char temp[50] = ""; + u_int32_t res = 0; + // execute and get address + char output[255]; + FILE *sysFile = popen( + "ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", + "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); - //converting IPaddress to hex. - char* pcword = strtok (output,"."); - while (pcword != NULL) { - sprintf(output,"%02x",atoi(pcword)); - strcat(temp,output); - pcword = strtok (NULL, "."); - } - strcpy(output,temp); - sscanf(output, "%x", &res); - //LOG(logINFO, ("ip:%x\n",res); + // converting IPaddress to hex. + char *pcword = strtok(output, "."); + while (pcword != NULL) { + sprintf(output, "%02x", atoi(pcword)); + strcat(temp, output); + pcword = strtok(NULL, "."); + } + strcpy(output, temp); + sscanf(output, "%x", &res); + // LOG(logINFO, ("ip:%x\n",res); - return res; + return res; } /* initialization */ -void initControlServer(){ - CreateNotificationForCriticalTasks(); - if (initError == OK) { - setupDetector(); - } - initCheckDone = 1; - if (initError == OK) { - NotifyServerStartSuccess(); - } +void initControlServer() { + CreateNotificationForCriticalTasks(); + if (initError == OK) { + setupDetector(); + } + initCheckDone = 1; + if (initError == OK) { + NotifyServerStartSuccess(); + } } void initStopServer() { - usleep(CTRL_SRVR_INIT_TIME_US); - if (mapCSP0() == FAIL) { - LOG(logERROR, ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); - exit(EXIT_FAILURE); - } + usleep(CTRL_SRVR_INIT_TIME_US); + if (mapCSP0() == FAIL) { + LOG(logERROR, + ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); + exit(EXIT_FAILURE); + } #ifdef VIRTUAL - virtual_stop = 0; - if (!isControlServer) { - ComVirtual_setStop(virtual_stop); - } + virtual_stop = 0; + if (!isControlServer) { + ComVirtual_setStop(virtual_stop); + } #endif } - /* set up detector */ void setupDetector() { - LOG(logINFO, ("This Server is for 1 Mythen3 module \n")); + LOG(logINFO, ("This Server is for 1 Mythen3 module \n")); - clkDivider[READOUT_C0] = DEFAULT_READOUT_C0; - clkDivider[READOUT_C1] = DEFAULT_READOUT_C1; - clkDivider[SYSTEM_C0] = DEFAULT_SYSTEM_C0; - clkDivider[SYSTEM_C1] = DEFAULT_SYSTEM_C1; - clkDivider[SYSTEM_C2] = DEFAULT_SYSTEM_C2; + clkDivider[READOUT_C0] = DEFAULT_READOUT_C0; + clkDivider[READOUT_C1] = DEFAULT_READOUT_C1; + clkDivider[SYSTEM_C0] = DEFAULT_SYSTEM_C0; + clkDivider[SYSTEM_C1] = DEFAULT_SYSTEM_C1; + clkDivider[SYSTEM_C2] = DEFAULT_SYSTEM_C2; - highvoltage = 0; - { - int i; - for (i = 0; i < NUM_CLOCKS; ++i) { + highvoltage = 0; + { + int i; + for (i = 0; i < NUM_CLOCKS; ++i) { clkPhase[i] = 0; } - for (i = 0; i < NDAC; ++i) { - dacValues[i] = 0; - } - } + for (i = 0; i < NDAC; ++i) { + dacValues[i] = 0; + } + } #ifdef VIRTUAL - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } #endif - // pll defines - ALTERA_PLL_C10_SetDefines(REG_OFFSET, BASE_READOUT_PLL, BASE_SYSTEM_PLL, PLL_RESET_REG, PLL_RESET_REG, PLL_RESET_READOUT_MSK, PLL_RESET_SYSTEM_MSK, READOUT_PLL_VCO_FREQ_HZ, SYSTEM_PLL_VCO_FREQ_HZ); - ALTERA_PLL_C10_ResetPLL(READOUT_PLL); - ALTERA_PLL_C10_ResetPLL(SYSTEM_PLL); - // hv - DAC6571_SetDefines(HV_HARD_MAX_VOLTAGE, HV_DRIVER_FILE_NAME); - //dac - LTC2620_D_SetDefines(DAC_MAX_MV, DAC_DRIVER_FILE_NAME, NDAC); + // pll defines + ALTERA_PLL_C10_SetDefines(REG_OFFSET, BASE_READOUT_PLL, BASE_SYSTEM_PLL, + PLL_RESET_REG, PLL_RESET_REG, + PLL_RESET_READOUT_MSK, PLL_RESET_SYSTEM_MSK, + READOUT_PLL_VCO_FREQ_HZ, SYSTEM_PLL_VCO_FREQ_HZ); + ALTERA_PLL_C10_ResetPLL(READOUT_PLL); + ALTERA_PLL_C10_ResetPLL(SYSTEM_PLL); + // hv + DAC6571_SetDefines(HV_HARD_MAX_VOLTAGE, HV_DRIVER_FILE_NAME); + // dac + LTC2620_D_SetDefines(DAC_MAX_MV, DAC_DRIVER_FILE_NAME, NDAC); - resetCore(); - resetPeripheral(); - cleanFifos(); + resetCore(); + resetPeripheral(); + cleanFifos(); - // defaults + // defaults setHighVoltage(DEFAULT_HIGH_VOLTAGE); - setDefaultDacs(); + setDefaultDacs(); - // dynamic range - setDynamicRange(DEFAULT_DYNAMIC_RANGE); - // enable all counters - setCounterMask(MAX_COUNTER_MSK); + // dynamic range + setDynamicRange(DEFAULT_DYNAMIC_RANGE); + // enable all counters + setCounterMask(MAX_COUNTER_MSK); - - // Initialization of acquistion parameters - setNumFrames(DEFAULT_NUM_FRAMES); - setNumTriggers(DEFAULT_NUM_CYCLES); - setExpTime(DEFAULT_EXPTIME); - setPeriod(DEFAULT_PERIOD); - setDelayAfterTrigger(DEFAULT_DELAY_AFTER_TRIGGER); - setTiming(DEFAULT_TIMING_MODE); + // Initialization of acquistion parameters + setNumFrames(DEFAULT_NUM_FRAMES); + setNumTriggers(DEFAULT_NUM_CYCLES); + setExpTime(DEFAULT_EXPTIME); + setPeriod(DEFAULT_PERIOD); + setDelayAfterTrigger(DEFAULT_DELAY_AFTER_TRIGGER); + setTiming(DEFAULT_TIMING_MODE); } int setDefaultDacs() { - int ret = OK; - LOG(logINFOBLUE, ("Setting Default Dac values\n")); - { - int i = 0; - const int defaultvals[NDAC] = DEFAULT_DAC_VALS; - for(i = 0; i < NDAC; ++i) { - setDAC((enum DACINDEX)i,defaultvals[i],0); - } - } - return ret; + int ret = OK; + LOG(logINFOBLUE, ("Setting Default Dac values\n")); + { + int i = 0; + const int defaultvals[NDAC] = DEFAULT_DAC_VALS; + for (i = 0; i < NDAC; ++i) { + setDAC((enum DACINDEX)i, defaultvals[i], 0); + } + } + return ret; } /* firmware functions (resets) */ @@ -414,76 +419,76 @@ void cleanFifos() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Clearing Acquisition Fifos\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CLR_ACQSTN_FIFO_MSK); + LOG(logINFO, ("Clearing Acquisition Fifos\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CLR_ACQSTN_FIFO_MSK); } void resetCore() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Resetting Core\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CRE_RST_MSK); + LOG(logINFO, ("Resetting Core\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CRE_RST_MSK); } void resetPeripheral() { #ifdef VIRTUAL return; #endif - LOG(logINFO, ("Resetting Peripheral\n")); - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PRPHRL_RST_MSK); + LOG(logINFO, ("Resetting Peripheral\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PRPHRL_RST_MSK); } /* set parameters - dr, roi */ -int setDynamicRange(int dr){ - if (dr > 0) { - uint32_t regval = 0; - switch(dr) { - case 1: - regval = CONFIG_DYNAMIC_RANGE_1_VAL; - break; - case 4: - regval = CONFIG_DYNAMIC_RANGE_4_VAL; - break; - case 16: - regval = CONFIG_DYNAMIC_RANGE_16_VAL; - break; - case 24: - case 32: - regval = CONFIG_DYNAMIC_RANGE_24_VAL; - break; - default: - LOG(logERROR, ("Invalid dynamic range %d\n", dr)); - return -1; - } - // set it - bus_w(CONFIG_REG, bus_r(CONFIG_REG) & ~CONFIG_DYNAMIC_RANGE_MSK); - bus_w(CONFIG_REG, bus_r(CONFIG_REG) | regval); - } +int setDynamicRange(int dr) { + if (dr > 0) { + uint32_t regval = 0; + switch (dr) { + case 1: + regval = CONFIG_DYNAMIC_RANGE_1_VAL; + break; + case 4: + regval = CONFIG_DYNAMIC_RANGE_4_VAL; + break; + case 16: + regval = CONFIG_DYNAMIC_RANGE_16_VAL; + break; + case 24: + case 32: + regval = CONFIG_DYNAMIC_RANGE_24_VAL; + break; + default: + LOG(logERROR, ("Invalid dynamic range %d\n", dr)); + return -1; + } + // set it + bus_w(CONFIG_REG, bus_r(CONFIG_REG) & ~CONFIG_DYNAMIC_RANGE_MSK); + bus_w(CONFIG_REG, bus_r(CONFIG_REG) | regval); + } - uint32_t regval = bus_r(CONFIG_REG) & CONFIG_DYNAMIC_RANGE_MSK; - switch(regval) { - case CONFIG_DYNAMIC_RANGE_1_VAL: - return 1; - case CONFIG_DYNAMIC_RANGE_4_VAL: - return 4; - case CONFIG_DYNAMIC_RANGE_16_VAL: - return 16; - case CONFIG_DYNAMIC_RANGE_24_VAL: - return 32; - default: - LOG(logERROR, ("Invalid dynamic range %d read back\n", regval >> CONFIG_DYNAMIC_RANGE_OFST)); - return -1; - } + uint32_t regval = bus_r(CONFIG_REG) & CONFIG_DYNAMIC_RANGE_MSK; + switch (regval) { + case CONFIG_DYNAMIC_RANGE_1_VAL: + return 1; + case CONFIG_DYNAMIC_RANGE_4_VAL: + return 4; + case CONFIG_DYNAMIC_RANGE_16_VAL: + return 16; + case CONFIG_DYNAMIC_RANGE_24_VAL: + return 32; + default: + LOG(logERROR, ("Invalid dynamic range %d read back\n", + regval >> CONFIG_DYNAMIC_RANGE_OFST)); + return -1; + } } - /* parameters - speed, readout */ void setNumFrames(int64_t val) { if (val > 0) { - LOG(logINFO, ("Setting number of frames %lld\n", (long long int)val)); + LOG(logINFO, ("Setting number of frames %lld\n", (long long int)val)); set64BitReg(val, SET_FRAMES_LSB_REG, SET_FRAMES_MSB_REG); } } @@ -494,9 +499,9 @@ int64_t getNumFrames() { void setNumTriggers(int64_t val) { if (val > 0) { - LOG(logINFO, ("Setting number of triggers %lld\n", (long long int)val)); + LOG(logINFO, ("Setting number of triggers %lld\n", (long long int)val)); set64BitReg(val, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); - } + } } int64_t getNumTriggers() { @@ -508,7 +513,7 @@ int setExpTime(int64_t val) { LOG(logERROR, ("Invalid exptime: %lld ns\n", (long long int)val)); return FAIL; } - LOG(logINFO, ("Setting exptime %lld ns\n", (long long int)val)); + LOG(logINFO, ("Setting exptime %lld ns\n", (long long int)val)); val *= (1E-9 * getFrequency(SYSTEM_C0)); setPatternWaitTime(0, val); @@ -530,7 +535,7 @@ int setPeriod(int64_t val) { LOG(logERROR, ("Invalid period: %lld ns\n", (long long int)val)); return FAIL; } - LOG(logINFO, ("Setting period %lld ns\n", (long long int)val)); + LOG(logINFO, ("Setting period %lld ns\n", (long long int)val)); val *= (1E-9 * FIXED_PLL_FREQUENCY); set64BitReg(val, SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG); @@ -544,75 +549,79 @@ int setPeriod(int64_t val) { } int64_t getPeriod() { - return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG)/ (1E-9 * FIXED_PLL_FREQUENCY); + return get64BitReg(SET_PERIOD_LSB_REG, SET_PERIOD_MSB_REG) / + (1E-9 * FIXED_PLL_FREQUENCY); } void setCounterMask(uint32_t arg) { - if (arg == 0 || arg > MAX_COUNTER_MSK) { - return; - } - countermask = arg; - // convert mask into number of counters (until firmware converts to mask) - int ncounters = __builtin_popcount(countermask); - LOG(logINFO, ("Setting number of counters to %d\n", ncounters)); - uint32_t val = 0; - switch (ncounters) { - case 1: - val = CONFIG_COUNTER_ENA_1_VAL; - break; - case 2: - val = CONFIG_COUNTER_ENA_2_VAL; - break; - default: - val = CONFIG_COUNTER_ENA_ALL_VAL; - break; - } - uint32_t addr = CONFIG_REG; - bus_w(addr, bus_r(addr) &~ CONFIG_COUNTER_ENA_MSK); - bus_w(addr, bus_r(addr) | val); - LOG(logDEBUG, ("Config Reg: 0x%x\n", bus_r(addr))); + if (arg == 0 || arg > MAX_COUNTER_MSK) { + return; + } + countermask = arg; + // convert mask into number of counters (until firmware converts to mask) + int ncounters = __builtin_popcount(countermask); + LOG(logINFO, ("Setting number of counters to %d\n", ncounters)); + uint32_t val = 0; + switch (ncounters) { + case 1: + val = CONFIG_COUNTER_ENA_1_VAL; + break; + case 2: + val = CONFIG_COUNTER_ENA_2_VAL; + break; + default: + val = CONFIG_COUNTER_ENA_ALL_VAL; + break; + } + uint32_t addr = CONFIG_REG; + bus_w(addr, bus_r(addr) & ~CONFIG_COUNTER_ENA_MSK); + bus_w(addr, bus_r(addr) | val); + LOG(logDEBUG, ("Config Reg: 0x%x\n", bus_r(addr))); } uint32_t getCounterMask() { - uint32_t addr = CONFIG_REG; - uint32_t regval = (bus_r(addr) & CONFIG_COUNTER_ENA_MSK); - int ncounters = 0; - switch (regval) { - case CONFIG_COUNTER_ENA_1_VAL: - ncounters = 1; - break; - case CONFIG_COUNTER_ENA_2_VAL: - ncounters = 2; - break; - default: - ncounters = 3; - break; - } - // confirm ncounters work with mask saved in server (until firmware converts to mask) - int nc = __builtin_popcount(countermask); - // if not equal, make a mask of what is in register (will change once firmware changes) - if (nc != ncounters) { - switch (ncounters) { - case 1: - countermask = 0x1; - break; - case 2: - countermask = 0x3; - break; - default: - countermask = 0x7; - break; - } - } - return countermask; + uint32_t addr = CONFIG_REG; + uint32_t regval = (bus_r(addr) & CONFIG_COUNTER_ENA_MSK); + int ncounters = 0; + switch (regval) { + case CONFIG_COUNTER_ENA_1_VAL: + ncounters = 1; + break; + case CONFIG_COUNTER_ENA_2_VAL: + ncounters = 2; + break; + default: + ncounters = 3; + break; + } + // confirm ncounters work with mask saved in server (until firmware converts + // to mask) + int nc = __builtin_popcount(countermask); + // if not equal, make a mask of what is in register (will change once + // firmware changes) + if (nc != ncounters) { + switch (ncounters) { + case 1: + countermask = 0x1; + break; + case 2: + countermask = 0x3; + break; + default: + countermask = 0x7; + break; + } + } + return countermask; } int setDelayAfterTrigger(int64_t val) { if (val < 0) { - LOG(logERROR, ("Invalid delay after trigger: %lld ns\n", (long long int)val)); + LOG(logERROR, + ("Invalid delay after trigger: %lld ns\n", (long long int)val)); return FAIL; - } - LOG(logINFO, ("Setting delay after trigger %lld ns\n", (long long int)val)); + } + LOG(logINFO, ("Setting delay after trigger %lld ns\n", (long long int)val)); val *= (1E-9 * FIXED_PLL_FREQUENCY); set64BitReg(val, SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG); @@ -626,7 +635,8 @@ int setDelayAfterTrigger(int64_t val) { } int64_t getDelayAfterTrigger() { - return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY); + return get64BitReg(SET_TRIGGER_DELAY_LSB_REG, SET_TRIGGER_DELAY_MSB_REG) / + (1E-9 * FIXED_PLL_FREQUENCY); } int64_t getNumFramesLeft() { @@ -638,11 +648,13 @@ int64_t getNumTriggersLeft() { } int64_t getDelayAfterTriggerLeft() { - return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY); + return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG) / + (1E-9 * FIXED_PLL_FREQUENCY); } int64_t getPeriodLeft() { - return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY); + return get64BitReg(GET_PERIOD_LSB_REG, GET_PERIOD_MSB_REG) / + (1E-9 * FIXED_PLL_FREQUENCY); } int64_t getFramesFromStart() { @@ -650,27 +662,29 @@ int64_t getFramesFromStart() { } int64_t getActualTime() { - return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY * 2); + return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / + (1E-9 * FIXED_PLL_FREQUENCY * 2); } int64_t getMeasurementTime() { - return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / (1E-9 * FIXED_PLL_FREQUENCY); + return get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / + (1E-9 * FIXED_PLL_FREQUENCY); } - - /* parameters - dac, hv */ void setDAC(enum DACINDEX ind, int val, int mV) { if (val < 0) { return; - } + } - char* dac_names[] = {DAC_NAMES}; - LOG(logDEBUG1, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], val, (mV ? "mV" : "dac units"))); + char *dac_names[] = {DAC_NAMES}; + LOG(logDEBUG1, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], + val, (mV ? "mV" : "dac units"))); int dacval = val; #ifdef VIRTUAL - LOG(logINFO, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], val, (mV ? "mV" : "dac units"))); + LOG(logINFO, ("Setting dac[%d - %s]: %d %s \n", (int)ind, dac_names[ind], + val, (mV ? "mV" : "dac units"))); if (!mV) { dacValues[ind] = val; } @@ -679,7 +693,8 @@ void setDAC(enum DACINDEX ind, int val, int mV) { dacValues[ind] = dacval; } #else - if (LTC2620_D_SetDACValue((int)ind, val, mV, dac_names[ind], &dacval) == OK) { + if (LTC2620_D_SetDACValue((int)ind, val, mV, dac_names[ind], &dacval) == + OK) { dacValues[ind] = dacval; } #endif @@ -687,23 +702,22 @@ void setDAC(enum DACINDEX ind, int val, int mV) { int getDAC(enum DACINDEX ind, int mV) { if (!mV) { - LOG(logDEBUG1, ("Getting DAC %d : %d dac\n",ind, dacValues[ind])); + LOG(logDEBUG1, ("Getting DAC %d : %d dac\n", ind, dacValues[ind])); return dacValues[ind]; } int voltage = -1; LTC2620_D_DacToVoltage(dacValues[ind], &voltage); - LOG(logDEBUG1, ("Getting DAC %d : %d dac (%d mV)\n",ind, dacValues[ind], voltage)); + LOG(logDEBUG1, + ("Getting DAC %d : %d dac (%d mV)\n", ind, dacValues[ind], voltage)); return voltage; } -int getMaxDacSteps() { - return LTC2620_D_GetMaxNumSteps(); -} +int getMaxDacSteps() { return LTC2620_D_GetMaxNumSteps(); } -int setHighVoltage(int val){ - // limit values - if (val > HV_SOFT_MAX_VOLTAGE ) { - val = HV_SOFT_MAX_VOLTAGE ; +int setHighVoltage(int val) { + // limit values + if (val > HV_SOFT_MAX_VOLTAGE) { + val = HV_SOFT_MAX_VOLTAGE; } #ifdef VIRTUAL if (val >= 0) @@ -711,32 +725,31 @@ int setHighVoltage(int val){ return highvoltage; #endif - // setting hv - if (val >= 0) { - LOG(logINFO, ("Setting High voltage: %d V\n", val)); - DAC6571_Set(val); - highvoltage = val; - } - return highvoltage; + // setting hv + if (val >= 0) { + LOG(logINFO, ("Setting High voltage: %d V\n", val)); + DAC6571_Set(val); + highvoltage = val; + } + return highvoltage; } - /* parameters - timing */ -void setTiming( enum timingMode arg){ - if(arg != GET_TIMING_MODE){ - switch (arg) { - case AUTO_TIMING: - LOG(logINFO, ("Set Timing: Auto\n")); - bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK); - break; - case TRIGGER_EXPOSURE: - LOG(logINFO, ("Set Timing: Trigger\n")); - bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) | EXT_SIGNAL_MSK); - break; - default: - LOG(logERROR, ("Unknown timing mode %d\n", arg)); - } - } +void setTiming(enum timingMode arg) { + if (arg != GET_TIMING_MODE) { + switch (arg) { + case AUTO_TIMING: + LOG(logINFO, ("Set Timing: Auto\n")); + bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK); + break; + case TRIGGER_EXPOSURE: + LOG(logINFO, ("Set Timing: Trigger\n")); + bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) | EXT_SIGNAL_MSK); + break; + default: + LOG(logERROR, ("Unknown timing mode %d\n", arg)); + } + } } enum timingMode getTiming() { @@ -745,152 +758,154 @@ enum timingMode getTiming() { return AUTO_TIMING; } - int configureMAC() { - uint32_t srcip = udpDetails.srcip; - uint32_t dstip = udpDetails.dstip; - uint64_t srcmac = udpDetails.srcmac; - uint64_t dstmac = udpDetails.dstmac; - int srcport = udpDetails.srcport; - int dstport = udpDetails.dstport; + uint32_t srcip = udpDetails.srcip; + uint32_t dstip = udpDetails.dstip; + uint64_t srcmac = udpDetails.srcmac; + uint64_t dstmac = udpDetails.dstmac; + int srcport = udpDetails.srcport; + int dstport = udpDetails.dstport; - LOG(logINFOBLUE, ("Configuring MAC\n")); - char src_mac[50], src_ip[INET_ADDRSTRLEN],dst_mac[50], dst_ip[INET_ADDRSTRLEN]; - getMacAddressinString(src_mac, 50, srcmac); - getMacAddressinString(dst_mac, 50, dstmac); - getIpAddressinString(src_ip, srcip); - getIpAddressinString(dst_ip, dstip); + LOG(logINFOBLUE, ("Configuring MAC\n")); + char src_mac[50], src_ip[INET_ADDRSTRLEN], dst_mac[50], + dst_ip[INET_ADDRSTRLEN]; + getMacAddressinString(src_mac, 50, srcmac); + getMacAddressinString(dst_mac, 50, dstmac); + getIpAddressinString(src_ip, srcip); + getIpAddressinString(dst_ip, dstip); - LOG(logINFO, ( - "\tSource IP : %s\n" - "\tSource MAC : %s\n" - "\tSource Port : %d\n" - "\tDest IP : %s\n" - "\tDest MAC : %s\n" - "\tDest Port : %d\n", - src_ip, src_mac, srcport, - dst_ip, dst_mac, dstport)); + LOG(logINFO, ("\tSource IP : %s\n" + "\tSource MAC : %s\n" + "\tSource Port : %d\n" + "\tDest IP : %s\n" + "\tDest MAC : %s\n" + "\tDest Port : %d\n", + src_ip, src_mac, srcport, dst_ip, dst_mac, dstport)); #ifdef VIRTUAL - if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { - LOG(logERROR, ("could not set udp destination IP and port\n")); - return FAIL; - } + if (setUDPDestinationDetails(0, dst_ip, dstport) == FAIL) { + LOG(logERROR, ("could not set udp destination IP and port\n")); + return FAIL; + } #endif - // start addr - uint32_t addr = BASE_UDP_RAM; - // calculate rxr endpoint offset - //addr += (iRxEntry * RXR_ENDPOINT_OFST);//TODO: is there round robin already implemented? - // get struct memory - udp_header *udp = (udp_header*) (Nios_getBaseAddress() + addr/(sizeof(u_int32_t))); - memset(udp, 0, sizeof(udp_header)); + // start addr + uint32_t addr = BASE_UDP_RAM; + // calculate rxr endpoint offset + // addr += (iRxEntry * RXR_ENDPOINT_OFST);//TODO: is there round robin + // already implemented? + // get struct memory + udp_header *udp = + (udp_header *)(Nios_getBaseAddress() + addr / (sizeof(u_int32_t))); + memset(udp, 0, sizeof(udp_header)); - // mac addresses - // msb (32) + lsb (16) - udp->udp_destmac_msb = ((dstmac >> 16) & BIT32_MASK); - udp->udp_destmac_lsb = ((dstmac >> 0) & BIT16_MASK); - // msb (16) + lsb (32) - udp->udp_srcmac_msb = ((srcmac >> 32) & BIT16_MASK); - udp->udp_srcmac_lsb = ((srcmac >> 0) & BIT32_MASK); + // mac addresses + // msb (32) + lsb (16) + udp->udp_destmac_msb = ((dstmac >> 16) & BIT32_MASK); + udp->udp_destmac_lsb = ((dstmac >> 0) & BIT16_MASK); + // msb (16) + lsb (32) + udp->udp_srcmac_msb = ((srcmac >> 32) & BIT16_MASK); + udp->udp_srcmac_lsb = ((srcmac >> 0) & BIT32_MASK); - // ip addresses - udp->ip_srcip_msb = ((srcip >> 16) & BIT16_MASK); - udp->ip_srcip_lsb = ((srcip >> 0) & BIT16_MASK); - udp->ip_destip_msb = ((dstip >> 16) & BIT16_MASK); - udp->ip_destip_lsb = ((dstip >> 0) & BIT16_MASK); + // ip addresses + udp->ip_srcip_msb = ((srcip >> 16) & BIT16_MASK); + udp->ip_srcip_lsb = ((srcip >> 0) & BIT16_MASK); + udp->ip_destip_msb = ((dstip >> 16) & BIT16_MASK); + udp->ip_destip_lsb = ((dstip >> 0) & BIT16_MASK); - // source port - udp->udp_srcport = srcport; - udp->udp_destport = dstport; + // source port + udp->udp_srcport = srcport; + udp->udp_destport = dstport; - // other defines - udp->udp_ethertype = 0x800; - udp->ip_ver = 0x4; - udp->ip_ihl = 0x5; - udp->ip_flags = 0x2; //FIXME - udp->ip_ttl = 0x40; - udp->ip_protocol = 0x11; - // total length is redefined in firmware + // other defines + udp->udp_ethertype = 0x800; + udp->ip_ver = 0x4; + udp->ip_ihl = 0x5; + udp->ip_flags = 0x2; // FIXME + udp->ip_ttl = 0x40; + udp->ip_protocol = 0x11; + // total length is redefined in firmware - calcChecksum(udp); + calcChecksum(udp); - //TODO? - cleanFifos(); - resetCore(); - //alignDeserializer(); - return OK; + // TODO? + cleanFifos(); + resetCore(); + // alignDeserializer(); + return OK; } -void calcChecksum(udp_header* udp) { - int count = IP_HEADER_SIZE; - long int sum = 0; - - // start at ip_tos as the memory is not continous for ip header - uint16_t *addr = (uint16_t*) (&(udp->ip_tos)); +void calcChecksum(udp_header *udp) { + int count = IP_HEADER_SIZE; + long int sum = 0; - sum += *addr++; - count -= 2; + // start at ip_tos as the memory is not continous for ip header + uint16_t *addr = (uint16_t *)(&(udp->ip_tos)); - // ignore ethertype (from udp header) - addr++; + sum += *addr++; + count -= 2; - // from identification to srcip_lsb - while( count > 2 ) { - sum += *addr++; - count -= 2; - } + // ignore ethertype (from udp header) + addr++; - // ignore src udp port (from udp header) - addr++; - - if (count > 0) - sum += *addr; // Add left-over byte, if any - while (sum >> 16) - sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits - long int checksum = sum & 0xffff; - checksum += UDP_IP_HEADER_LENGTH_BYTES; - LOG(logINFO, ("\tIP checksum is 0x%lx\n",checksum)); - udp->ip_checksum = checksum; + // from identification to srcip_lsb + while (count > 2) { + sum += *addr++; + count -= 2; + } + + // ignore src udp port (from udp header) + addr++; + + if (count > 0) + sum += *addr; // Add left-over byte, if any + while (sum >> 16) + sum = (sum & 0xffff) + (sum >> 16); // Fold 32-bit sum to 16 bits + long int checksum = sum & 0xffff; + checksum += UDP_IP_HEADER_LENGTH_BYTES; + LOG(logINFO, ("\tIP checksum is 0x%lx\n", checksum)); + udp->ip_checksum = checksum; } int setDetectorPosition(int pos[]) { memcpy(detPos, pos, sizeof(detPos)); - uint32_t addr = COORD_0_REG; - int value = 0; - int valueRead = 0; - int ret = OK; + uint32_t addr = COORD_0_REG; + int value = 0; + int valueRead = 0; + int ret = OK; - // row - value = detPos[X]; - bus_w(addr, (bus_r(addr) &~COORD_ROW_MSK) | ((value << COORD_ROW_OFST) & COORD_ROW_MSK)); - valueRead = ((bus_r(addr) & COORD_ROW_MSK) >> COORD_ROW_OFST); - if (valueRead != value) { - LOG(logERROR, ("Could not set row. Set %d, read %d\n", value, valueRead)); - ret = FAIL; - } + // row + value = detPos[X]; + bus_w(addr, (bus_r(addr) & ~COORD_ROW_MSK) | + ((value << COORD_ROW_OFST) & COORD_ROW_MSK)); + valueRead = ((bus_r(addr) & COORD_ROW_MSK) >> COORD_ROW_OFST); + if (valueRead != value) { + LOG(logERROR, + ("Could not set row. Set %d, read %d\n", value, valueRead)); + ret = FAIL; + } - // col - value = detPos[Y]; - bus_w(addr, (bus_r(addr) &~COORD_COL_MSK) | ((value << COORD_COL_OFST) & COORD_COL_MSK)); - valueRead = ((bus_r(addr) & COORD_COL_MSK) >> COORD_COL_OFST); - if (valueRead != value) { - LOG(logERROR, ("Could not set column. Set %d, read %d\n", value, valueRead)); - ret = FAIL; - } + // col + value = detPos[Y]; + bus_w(addr, (bus_r(addr) & ~COORD_COL_MSK) | + ((value << COORD_COL_OFST) & COORD_COL_MSK)); + valueRead = ((bus_r(addr) & COORD_COL_MSK) >> COORD_COL_OFST); + if (valueRead != value) { + LOG(logERROR, + ("Could not set column. Set %d, read %d\n", value, valueRead)); + ret = FAIL; + } - if (ret == OK) { - LOG(logINFO, ("\tPosition set to [%d, %d]\n", detPos[X], detPos[Y])); - } - - return ret; + if (ret == OK) { + LOG(logINFO, ("\tPosition set to [%d, %d]\n", detPos[X], detPos[Y])); + } + + return ret; } -int* getDetectorPosition() { - return detPos; -} +int *getDetectorPosition() { return detPos; } /* pattern */ @@ -898,17 +913,22 @@ uint64_t readPatternWord(int addr) { // error (handled in tcp) if (addr < 0 || addr >= MAX_PATTERN_LENGTH) { LOG(logERROR, ("Cannot get Pattern - Word. Invalid addr 0x%x. " - "Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH)); + "Should be between 0 and 0x%x\n", + addr, MAX_PATTERN_LENGTH)); return -1; } LOG(logINFO, (" Reading Pattern Word (addr:0x%x)\n", addr)); - uint32_t reg_lsb = PATTERN_STEP0_LSB_REG + addr * REG_OFFSET * 2; // the first word in RAM as base plus the offset of the word to write (addr) - uint32_t reg_msb = PATTERN_STEP0_MSB_REG + addr * REG_OFFSET * 2; + uint32_t reg_lsb = + PATTERN_STEP0_LSB_REG + + addr * REG_OFFSET * 2; // the first word in RAM as base plus the offset + // of the word to write (addr) + uint32_t reg_msb = PATTERN_STEP0_MSB_REG + addr * REG_OFFSET * 2; // read value uint64_t retval = get64BitReg(reg_lsb, reg_msb); - LOG(logDEBUG1, (" Word(addr:0x%x) retval: 0x%llx\n", addr, (long long int) retval)); + LOG(logDEBUG1, + (" Word(addr:0x%x) retval: 0x%llx\n", addr, (long long int)retval)); return retval; } @@ -921,17 +941,23 @@ uint64_t writePatternWord(int addr, uint64_t word) { // error (handled in tcp) if (addr < 0 || addr >= MAX_PATTERN_LENGTH) { LOG(logERROR, ("Cannot set Pattern - Word. Invalid addr 0x%x. " - "Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH)); + "Should be between 0 and 0x%x\n", + addr, MAX_PATTERN_LENGTH)); return -1; } - LOG(logINFO, ("Setting Pattern Word (addr:0x%x, word:0x%llx)\n", addr, (long long int) word)); - uint32_t reg_lsb = PATTERN_STEP0_LSB_REG + addr * REG_OFFSET * 2; // the first word in RAM as base plus the offset of the word to write (addr) - uint32_t reg_msb = PATTERN_STEP0_MSB_REG + addr * REG_OFFSET * 2; + LOG(logINFO, ("Setting Pattern Word (addr:0x%x, word:0x%llx)\n", addr, + (long long int)word)); + uint32_t reg_lsb = + PATTERN_STEP0_LSB_REG + + addr * REG_OFFSET * 2; // the first word in RAM as base plus the offset + // of the word to write (addr) + uint32_t reg_msb = PATTERN_STEP0_MSB_REG + addr * REG_OFFSET * 2; // write word set64BitReg(word, reg_lsb, reg_msb); - LOG(logDEBUG1, (" Wrote word. PatternIn Reg: 0x%llx\n", get64BitReg(reg_lsb, reg_msb))); + LOG(logDEBUG1, (" Wrote word. PatternIn Reg: 0x%llx\n", + get64BitReg(reg_lsb, reg_msb))); return readPatternWord(addr); } @@ -941,7 +967,8 @@ int setPatternWaitAddress(int level, int addr) { // error (handled in tcp) if (addr >= MAX_PATTERN_LENGTH) { LOG(logERROR, ("Cannot set Pattern Wait Address. Invalid addr 0x%x. " - "Should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH)); + "Should be between 0 and 0x%x\n", + addr, MAX_PATTERN_LENGTH)); return -1; } @@ -955,7 +982,7 @@ int setPatternWaitAddress(int level, int addr) { offset = PATTERN_WAIT_0_ADDR_OFST; mask = PATTERN_WAIT_0_ADDR_MSK; break; - case 1: + case 1: reg = PATTERN_WAIT_1_ADDR_REG; offset = PATTERN_WAIT_1_ADDR_OFST; mask = PATTERN_WAIT_1_ADDR_MSK; @@ -967,19 +994,22 @@ int setPatternWaitAddress(int level, int addr) { break; default: LOG(logERROR, ("Cannot set Pattern Wait Address. Invalid level 0x%x. " - "Should be between 0 and 2.\n", level)); + "Should be between 0 and 2.\n", + level)); return -1; } // set if (addr >= 0) { - LOG(logINFO, ("Setting Pattern Wait Address (level:%d, addr:0x%x)\n", level, addr)); + LOG(logINFO, ("Setting Pattern Wait Address (level:%d, addr:0x%x)\n", + level, addr)); bus_w(reg, ((addr << offset) & mask)); } // get uint32_t regval = ((bus_r(reg) & mask) >> offset); - LOG(logDEBUG1, (" Wait Address retval (level:%d, addr:0x%x)\n", level, regval)); + LOG(logDEBUG1, + (" Wait Address retval (level:%d, addr:0x%x)\n", level, regval)); return regval; } @@ -992,7 +1022,7 @@ uint64_t setPatternWaitTime(int level, uint64_t t) { regl = PATTERN_WAIT_TIMER_0_LSB_REG; regm = PATTERN_WAIT_TIMER_0_MSB_REG; break; - case 1: + case 1: regl = PATTERN_WAIT_TIMER_1_LSB_REG; regm = PATTERN_WAIT_TIMER_1_MSB_REG; break; @@ -1002,29 +1032,33 @@ uint64_t setPatternWaitTime(int level, uint64_t t) { break; default: LOG(logERROR, ("Cannot set Pattern Wait Time. Invalid level %d. " - "Should be between 0 and 2.\n", level)); + "Should be between 0 and 2.\n", + level)); return -1; } // set if ((int64_t)t >= 0) { - LOG(logINFO, ("Setting Pattern Wait Time (level:%d, t:%lld)\n", level, (long long int)t)); + LOG(logINFO, ("Setting Pattern Wait Time (level:%d, t:%lld)\n", level, + (long long int)t)); set64BitReg(t, regl, regm); } // get uint64_t regval = get64BitReg(regl, regm); - LOG(logDEBUG1, (" Wait Time retval (level:%d, t:%lld)\n", level, (long long int)regval)); + LOG(logDEBUG1, (" Wait Time retval (level:%d, t:%lld)\n", level, + (long long int)regval)); return regval; } void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { // (checked at tcp) - if (*startAddr >= MAX_PATTERN_LENGTH || *stopAddr >= MAX_PATTERN_LENGTH) { - LOG(logERROR, ("Cannot set Pattern Loop, Address (startaddr:0x%x, stopaddr:0x%x) must be " - "less than 0x%x\n", - *startAddr, *stopAddr, MAX_PATTERN_LENGTH)); + if (*startAddr >= MAX_PATTERN_LENGTH || *stopAddr >= MAX_PATTERN_LENGTH) { + LOG(logERROR, ("Cannot set Pattern Loop, Address (startaddr:0x%x, " + "stopaddr:0x%x) must be " + "less than 0x%x\n", + *startAddr, *stopAddr, MAX_PATTERN_LENGTH)); } uint32_t addr = 0; @@ -1071,7 +1105,8 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { default: // already checked at tcp interface LOG(logERROR, ("Cannot set Pattern loop. Invalid level %d. " - "Should be between -1 and 2.\n", level)); + "Should be between -1 and 2.\n", + level)); *startAddr = 0; *stopAddr = 0; *nLoop = 0; @@ -1081,8 +1116,8 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { if (level >= 0) { // set iteration if (*nLoop >= 0) { - LOG(logINFO, ("Setting Pattern Loop (level:%d, nLoop:%d)\n", - level, *nLoop)); + LOG(logINFO, + ("Setting Pattern Loop (level:%d, nLoop:%d)\n", level, *nLoop)); bus_w(nLoopReg, *nLoop); } *nLoop = bus_r(nLoopReg); @@ -1090,540 +1125,551 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { // set if (*startAddr >= 0 && *stopAddr >= 0) { - // writing start and stop addr - LOG(logINFO, ("Setting Pattern Loop (level:%d, startaddr:0x%x, stopaddr:0x%x)\n", - level, *startAddr, *stopAddr)); - bus_w(addr, ((*startAddr << startOffset) & startMask) | ((*stopAddr << stopOffset) & stopMask)); - LOG(logDEBUG1, ("Addr:0x%x, val:0x%x\n", addr, bus_r(addr))); + // writing start and stop addr + LOG(logINFO, + ("Setting Pattern Loop (level:%d, startaddr:0x%x, stopaddr:0x%x)\n", + level, *startAddr, *stopAddr)); + bus_w(addr, ((*startAddr << startOffset) & startMask) | + ((*stopAddr << stopOffset) & stopMask)); + LOG(logDEBUG1, ("Addr:0x%x, val:0x%x\n", addr, bus_r(addr))); } // get else { - *startAddr = ((bus_r(addr) & startMask) >> startOffset); - LOG(logDEBUG1, ("Getting Pattern Loop Start Address (level:%d, Read startAddr:0x%x)\n", - level, *startAddr)); + *startAddr = ((bus_r(addr) & startMask) >> startOffset); + LOG(logDEBUG1, ("Getting Pattern Loop Start Address (level:%d, Read " + "startAddr:0x%x)\n", + level, *startAddr)); - *stopAddr = ((bus_r(addr) & stopMask) >> stopOffset); - LOG(logDEBUG1, ("Getting Pattern Loop Stop Address (level:%d, Read stopAddr:0x%x)\n", - level, *stopAddr)); + *stopAddr = ((bus_r(addr) & stopMask) >> stopOffset); + LOG(logDEBUG1, ("Getting Pattern Loop Stop Address (level:%d, Read " + "stopAddr:0x%x)\n", + level, *stopAddr)); } } void setPatternMask(uint64_t mask) { - set64BitReg(mask, PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); + set64BitReg(mask, PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); } uint64_t getPatternMask() { - return get64BitReg(PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); + return get64BitReg(PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG); } void setPatternBitMask(uint64_t mask) { - set64BitReg(mask, PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); + set64BitReg(mask, PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); } uint64_t getPatternBitMask() { - return get64BitReg(PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); + return get64BitReg(PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG); } int checkDetectorType() { #ifdef VIRTUAL - return OK; + return OK; #endif - LOG(logINFO, ("Checking type of module\n")); - FILE* fd = fopen(TYPE_FILE_NAME, "r"); + LOG(logINFO, ("Checking type of module\n")); + FILE *fd = fopen(TYPE_FILE_NAME, "r"); if (fd == NULL) { - LOG(logERROR, ("Could not open file %s to get type of the module attached\n", TYPE_FILE_NAME)); + LOG(logERROR, + ("Could not open file %s to get type of the module attached\n", + TYPE_FILE_NAME)); return -1; - } - char buffer[MAX_STR_LENGTH]; - memset(buffer, 0, sizeof(buffer)); - fread (buffer, MAX_STR_LENGTH, sizeof(char), fd); - if (strlen(buffer) == 0) { - LOG(logERROR, ("Could not read file %s to get type of the module attached\n", TYPE_FILE_NAME)); - return -1; - } - int type = atoi(buffer); - if (type > TYPE_NO_MODULE_STARTING_VAL) { - LOG(logERROR, ("No Module attached! Expected %d for Mythen, got %d\n", TYPE_MYTHEN3_MODULE_VAL, type)); - return -2; - } + } + char buffer[MAX_STR_LENGTH]; + memset(buffer, 0, sizeof(buffer)); + fread(buffer, MAX_STR_LENGTH, sizeof(char), fd); + if (strlen(buffer) == 0) { + LOG(logERROR, + ("Could not read file %s to get type of the module attached\n", + TYPE_FILE_NAME)); + return -1; + } + int type = atoi(buffer); + if (type > TYPE_NO_MODULE_STARTING_VAL) { + LOG(logERROR, ("No Module attached! Expected %d for Mythen, got %d\n", + TYPE_MYTHEN3_MODULE_VAL, type)); + return -2; + } - if (abs(type - TYPE_MYTHEN3_MODULE_VAL) > TYPE_TOLERANCE) { - LOG(logERROR, ("Wrong Module attached! Expected %d for Mythen3, got %d\n", TYPE_MYTHEN3_MODULE_VAL, type)); - return FAIL; - } - return OK; + if (abs(type - TYPE_MYTHEN3_MODULE_VAL) > TYPE_TOLERANCE) { + LOG(logERROR, + ("Wrong Module attached! Expected %d for Mythen3, got %d\n", + TYPE_MYTHEN3_MODULE_VAL, type)); + return FAIL; + } + return OK; } -int powerChip (int on){ - if(on != -1){ - if(on){ +int powerChip(int on) { + if (on != -1) { + if (on) { LOG(logINFO, ("Powering chip: on\n")); bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PWR_CHIP_MSK); - } - else{ + } else { LOG(logINFO, ("Powering chip: off\n")); bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PWR_CHIP_MSK); } } - return ((bus_r(CONTROL_REG) & CONTROL_PWR_CHIP_MSK) >> CONTROL_PWR_CHIP_OFST); + return ((bus_r(CONTROL_REG) & CONTROL_PWR_CHIP_MSK) >> + CONTROL_PWR_CHIP_OFST); } - int setPhase(enum CLKINDEX ind, int val, int degrees) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to set phase\n", ind)); - return FAIL; - } - char* clock_names[] = {CLK_NAMES}; - LOG(logINFOBLUE, ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], ind, val, degrees == 0 ? "" : "degrees")); - int maxShift = getMaxPhase(ind); - // validation - if (degrees && (val < 0 || val > 359)) { - LOG(logERROR, ("\tPhase outside limits (0 - 359°C)\n")); - return FAIL; - } - if (!degrees && (val < 0 || val > maxShift - 1)) { - LOG(logERROR, ("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1)); - return FAIL; - } + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to set phase\n", ind)); + return FAIL; + } + char *clock_names[] = {CLK_NAMES}; + LOG(logINFOBLUE, + ("Setting %s clock (%d) phase to %d %s\n", clock_names[ind], ind, val, + degrees == 0 ? "" : "degrees")); + int maxShift = getMaxPhase(ind); + // validation + if (degrees && (val < 0 || val > 359)) { + LOG(logERROR, ("\tPhase outside limits (0 - 359°C)\n")); + return FAIL; + } + if (!degrees && (val < 0 || val > maxShift - 1)) { + LOG(logERROR, + ("\tPhase outside limits (0 - %d phase shifts)\n", maxShift - 1)); + return FAIL; + } - int valShift = val; - // convert to phase shift - if (degrees) { - ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); - } - LOG(logDEBUG1, ("\tphase shift: %d (degrees/shift: %d)\n", valShift, val)); + int valShift = val; + // convert to phase shift + if (degrees) { + ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); + } + LOG(logDEBUG1, ("\tphase shift: %d (degrees/shift: %d)\n", valShift, val)); - int relativePhase = valShift - clkPhase[ind]; - LOG(logDEBUG1, ("\trelative phase shift: %d (Current phase: %d)\n", relativePhase, clkPhase[ind])); + int relativePhase = valShift - clkPhase[ind]; + LOG(logDEBUG1, ("\trelative phase shift: %d (Current phase: %d)\n", + relativePhase, clkPhase[ind])); // same phase if (!relativePhase) { - LOG(logINFO, ("\tNothing to do in Phase Shift\n")); - return OK; + LOG(logINFO, ("\tNothing to do in Phase Shift\n")); + return OK; } - int direction = 1; - if (relativePhase < 0) { - relativePhase *= -1; - direction = 0; - } - int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); - int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind); + int direction = 1; + if (relativePhase < 0) { + relativePhase *= -1; + direction = 0; + } + int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); + int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind); ALTERA_PLL_C10_SetPhaseShift(pllIndex, clkIndex, relativePhase, direction); clkPhase[ind] = valShift; - return OK; + return OK; } int getPhase(enum CLKINDEX ind, int degrees) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get phase\n", ind)); - return -1; - } - if (!degrees) - return clkPhase[ind]; - // convert back to degrees - int val = 0; - ConvertToDifferentRange(0, getMaxPhase(ind) - 1, 0, 359, clkPhase[ind], &val); - return val; + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get phase\n", ind)); + return -1; + } + if (!degrees) + return clkPhase[ind]; + // convert back to degrees + int val = 0; + ConvertToDifferentRange(0, getMaxPhase(ind) - 1, 0, 359, clkPhase[ind], + &val); + return val; } int getMaxPhase(enum CLKINDEX ind) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind)); - return -1; - } - int maxshiftstep = ALTERA_PLL_C10_GetMaxPhaseShiftStepsofVCO(); - int ret = clkDivider[ind] * maxshiftstep; + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get max phase\n", ind)); + return -1; + } + int maxshiftstep = ALTERA_PLL_C10_GetMaxPhaseShiftStepsofVCO(); + int ret = clkDivider[ind] * maxshiftstep; - char* clock_names[] = {CLK_NAMES}; - LOG(logDEBUG1, ("\tMax Phase Shift (%s): %d (Clock Div: %d)\n", - clock_names[ind], ret, clkDivider[ind])); + char *clock_names[] = {CLK_NAMES}; + LOG(logDEBUG1, ("\tMax Phase Shift (%s): %d (Clock Div: %d)\n", + clock_names[ind], ret, clkDivider[ind])); - return ret; + return ret; } int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to validate phase in degrees\n", ind)); - return FAIL; - } - if (val == -1) { - return OK; - } - LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", (int)ind)); - int maxShift = getMaxPhase(ind); - // convert degrees to shift - int valShift = 0; - ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); - // convert back to degrees - ConvertToDifferentRange(0, maxShift - 1, 0, 359, valShift, &val); + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, + ("Unknown clock index %d to validate phase in degrees\n", ind)); + return FAIL; + } + if (val == -1) { + return OK; + } + LOG(logDEBUG1, ("validating phase in degrees for clk %d\n", (int)ind)); + int maxShift = getMaxPhase(ind); + // convert degrees to shift + int valShift = 0; + ConvertToDifferentRange(0, 359, 0, maxShift - 1, val, &valShift); + // convert back to degrees + ConvertToDifferentRange(0, maxShift - 1, 0, 359, valShift, &val); - if (val == retval) - return OK; - return FAIL; + if (val == retval) + return OK; + return FAIL; } - - int getFrequency(enum CLKINDEX ind) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind)); - return -1; - } + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get frequency\n", ind)); + return -1; + } return (getVCOFrequency(ind) / clkDivider[ind]); } int getVCOFrequency(enum CLKINDEX ind) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get vco frequency\n", ind)); - return -1; - } - int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); - return ALTERA_PLL_C10_GetVCOFrequency(pllIndex); + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get vco frequency\n", ind)); + return -1; + } + int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); + return ALTERA_PLL_C10_GetVCOFrequency(pllIndex); } -int getMaxClockDivider() { - return ALTERA_PLL_C10_GetMaxClockDivider(); -} +int getMaxClockDivider() { return ALTERA_PLL_C10_GetMaxClockDivider(); } int setClockDivider(enum CLKINDEX ind, int val) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to set clock divider\n", ind)); - return FAIL; - } - if (val < 2 || val > getMaxClockDivider()) { - return FAIL; - } - char* clock_names[] = {CLK_NAMES}; + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to set clock divider\n", ind)); + return FAIL; + } + if (val < 2 || val > getMaxClockDivider()) { + return FAIL; + } + char *clock_names[] = {CLK_NAMES}; - LOG(logINFO, ("\tSetting %s clock (%d) divider from %d to %d\n", - clock_names[ind], ind, clkDivider[ind], val)); + LOG(logINFO, ("\tSetting %s clock (%d) divider from %d to %d\n", + clock_names[ind], ind, clkDivider[ind], val)); // Remembering old phases in degrees int oldPhases[NUM_CLOCKS]; - { - int i = 0; - for (i = 0; i < NUM_CLOCKS; ++i) { - oldPhases[i] = getPhase(i, 1); - LOG(logDEBUG1, ("\tRemembering %s clock (%d) phase: %d degrees\n", - clock_names[ind], ind, oldPhases[i])); - } - } + { + int i = 0; + for (i = 0; i < NUM_CLOCKS; ++i) { + oldPhases[i] = getPhase(i, 1); + LOG(logDEBUG1, ("\tRemembering %s clock (%d) phase: %d degrees\n", + clock_names[ind], ind, oldPhases[i])); + } + } // Calculate and set output frequency - int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); - int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind); - ALTERA_PLL_C10_SetOuputClockDivider (pllIndex, clkIndex, val); - clkDivider[ind] = val; - LOG(logINFO, ("\t%s clock (%d) divider set to %d\n", - clock_names[ind], ind, clkDivider[ind])); - + int pllIndex = (int)(ind >= SYSTEM_C0 ? SYSTEM_PLL : READOUT_PLL); + int clkIndex = (int)(ind >= SYSTEM_C0 ? ind - SYSTEM_C0 : ind); + ALTERA_PLL_C10_SetOuputClockDivider(pllIndex, clkIndex, val); + clkDivider[ind] = val; + LOG(logINFO, ("\t%s clock (%d) divider set to %d\n", clock_names[ind], ind, + clkDivider[ind])); + // phase is reset by pll (when setting output frequency) - if (ind >= READOUT_C0) { - clkPhase[READOUT_C0] = 0; - clkPhase[READOUT_C1] = 0; - } else { - clkPhase[SYSTEM_C0] = 0; - clkPhase[SYSTEM_C1] = 0; - clkPhase[SYSTEM_C2] = 0; - } + if (ind >= READOUT_C0) { + clkPhase[READOUT_C0] = 0; + clkPhase[READOUT_C1] = 0; + } else { + clkPhase[SYSTEM_C0] = 0; + clkPhase[SYSTEM_C1] = 0; + clkPhase[SYSTEM_C2] = 0; + } // set the phase in degrees (reset by pll) - { - int i = 0; - for (i = 0; i < NUM_CLOCKS; ++i) { - int currPhaseDeg = getPhase(i, 1); - if (oldPhases[i] != currPhaseDeg) { - LOG(logINFO, ("\tCorrecting %s clock (%d) phase from %d to %d degrees\n", - clock_names[i], i, currPhaseDeg, oldPhases[i])); - setPhase(i, oldPhases[i], 1); - } - } - } - return OK; + { + int i = 0; + for (i = 0; i < NUM_CLOCKS; ++i) { + int currPhaseDeg = getPhase(i, 1); + if (oldPhases[i] != currPhaseDeg) { + LOG(logINFO, + ("\tCorrecting %s clock (%d) phase from %d to %d degrees\n", + clock_names[i], i, currPhaseDeg, oldPhases[i])); + setPhase(i, oldPhases[i], 1); + } + } + } + return OK; } int getClockDivider(enum CLKINDEX ind) { - if (ind < 0 || ind >= NUM_CLOCKS) { - LOG(logERROR, ("Unknown clock index %d to get clock divider\n", ind)); - return -1; - } - return clkDivider[ind]; + if (ind < 0 || ind >= NUM_CLOCKS) { + LOG(logERROR, ("Unknown clock index %d to get clock divider\n", ind)); + return -1; + } + return clkDivider[ind]; } /* aquisition */ -int startStateMachine(){ +int startStateMachine() { #ifdef VIRTUAL - // create udp socket - if(createUDPSocket(0) != OK) { - return FAIL; - } - LOG(logINFOBLUE, ("Starting State Machine\n")); - // set status to running - virtual_status = 1; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - virtual_stop = ComVirtual_getStop(); - if (virtual_stop != 0) { - LOG(logERROR, ("Cant start acquisition. " - "Stop server has not updated stop status to 0\n")); - return FAIL; - } - } - if(pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { - LOG(logERROR, ("Could not start Virtual acquisition thread\n")); - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - return FAIL; - } - LOG(logINFOGREEN, ("Virtual Acquisition started\n")); - return OK; + // create udp socket + if (createUDPSocket(0) != OK) { + return FAIL; + } + LOG(logINFOBLUE, ("Starting State Machine\n")); + // set status to running + virtual_status = 1; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + virtual_stop = ComVirtual_getStop(); + if (virtual_stop != 0) { + LOG(logERROR, ("Cant start acquisition. " + "Stop server has not updated stop status to 0\n")); + return FAIL; + } + } + if (pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { + LOG(logERROR, ("Could not start Virtual acquisition thread\n")); + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + return FAIL; + } + LOG(logINFOGREEN, ("Virtual Acquisition started\n")); + return OK; #endif - LOG(logINFOBLUE, ("Starting State Machine\n")); - cleanFifos(); - - //start state machine - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK); + LOG(logINFOBLUE, ("Starting State Machine\n")); + cleanFifos(); - LOG(logINFO, ("Status Register: %08x\n",bus_r(STATUS_REG))); + // start state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK); + + LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); return OK; } - - - #ifdef VIRTUAL -void* start_timer(void* arg) { - if (!isControlServer) { - return NULL; - } +void *start_timer(void *arg) { + if (!isControlServer) { + return NULL; + } - int64_t periodNs = getPeriod(); - int numFrames = (getNumFrames() * - getNumTriggers() ); - int64_t expUs = getExpTime() / 1000; + int64_t periodNs = getPeriod(); + int numFrames = (getNumFrames() * getNumTriggers()); + int64_t expUs = getExpTime() / 1000; - //int dr = setDynamicRange(-1); - int imagesize = calculateDataBytes(); - int dataSize = imagesize / PACKETS_PER_FRAME; - int packetSize = dataSize + sizeof(sls_detector_header); + // int dr = setDynamicRange(-1); + int imagesize = calculateDataBytes(); + int dataSize = imagesize / PACKETS_PER_FRAME; + int packetSize = dataSize + sizeof(sls_detector_header); - // Generate data - char imageData[imagesize]; - memset(imageData, 0, imagesize); - { - int i = 0; - for (i = 0; i < imagesize; i += sizeof(uint8_t)) { - *((uint8_t*)(imageData + i)) = i; - } - } + // Generate data + char imageData[imagesize]; + memset(imageData, 0, imagesize); + { + int i = 0; + for (i = 0; i < imagesize; i += sizeof(uint8_t)) { + *((uint8_t *)(imageData + i)) = i; + } + } - // Send data - { - int frameNr = 1; - // loop over number of frames - for (frameNr = 0; frameNr != numFrames; ++frameNr) { + // Send data + { + int frameNr = 1; + // loop over number of frames + for (frameNr = 0; frameNr != numFrames; ++frameNr) { - // update the virtual stop from stop server - virtual_stop = ComVirtual_getStop(); - //check if virtual_stop is high - if(virtual_stop == 1){ - break; - } + // update the virtual stop from stop server + virtual_stop = ComVirtual_getStop(); + // check if virtual_stop is high + if (virtual_stop == 1) { + break; + } + // sleep for exposure time + struct timespec begin, end; + clock_gettime(CLOCK_REALTIME, &begin); + usleep(expUs); - // sleep for exposure time - struct timespec begin, end; - clock_gettime(CLOCK_REALTIME, &begin); - usleep(expUs); + int srcOffset = 0; + // loop packet + { + int i = 0; + for (i = 0; i != PACKETS_PER_FRAME; ++i) { + char packetData[packetSize]; + memset(packetData, 0, packetSize); - int srcOffset = 0; - // loop packet - { - int i = 0; - for(i = 0; i != PACKETS_PER_FRAME; ++i) { - char packetData[packetSize]; - memset(packetData, 0, packetSize); + // set header + sls_detector_header *header = + (sls_detector_header *)(packetData); + header->detType = (uint16_t)myDetectorType; + header->version = SLS_DETECTOR_HEADER_VERSION - 1; + header->frameNumber = frameNr + 1; + header->packetNumber = i; + header->modId = 0; + header->row = detPos[X]; + header->column = detPos[Y]; - // set header - sls_detector_header* header = (sls_detector_header*) (packetData); - header->detType = (uint16_t)myDetectorType; - header->version = SLS_DETECTOR_HEADER_VERSION - 1; - header->frameNumber = frameNr + 1; - header->packetNumber = i; - header->modId = 0; - header->row = detPos[X]; - header->column = detPos[Y]; + // fill data + memcpy(packetData + sizeof(sls_detector_header), + imageData + srcOffset, dataSize); + srcOffset += dataSize; - // fill data - memcpy(packetData + sizeof(sls_detector_header), - imageData + srcOffset, dataSize); - srcOffset += dataSize; + sendUDPPacket(0, packetData, packetSize); + } + } + LOG(logINFO, ("Sent frame: %d\n", frameNr)); + clock_gettime(CLOCK_REALTIME, &end); + int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 + + (end.tv_nsec - begin.tv_nsec)); - sendUDPPacket(0, packetData, packetSize); - } - } - LOG(logINFO, ("Sent frame: %d\n", frameNr)); - clock_gettime(CLOCK_REALTIME, &end); - int64_t timeNs = ((end.tv_sec - begin.tv_sec) * 1E9 + - (end.tv_nsec - begin.tv_nsec)); + // sleep for (period - exptime) + if (frameNr < numFrames) { // if there is a next frame + if (periodNs > timeNs) { + usleep((periodNs - timeNs) / 1000); + } + } + } + } - // sleep for (period - exptime) - if (frameNr < numFrames) { // if there is a next frame - if (periodNs > timeNs) { - usleep((periodNs - timeNs)/ 1000); - } - } - } - } + closeUDPSocket(0); - closeUDPSocket(0); - - virtual_status = 0; - if (isControlServer) { - ComVirtual_setStatus(virtual_status); - } - LOG(logINFOBLUE, ("Finished Acquiring\n")); - return NULL; + virtual_status = 0; + if (isControlServer) { + ComVirtual_setStatus(virtual_status); + } + LOG(logINFOBLUE, ("Finished Acquiring\n")); + return NULL; } #endif - -int stopStateMachine(){ - LOG(logINFORED, ("Stopping State Machine\n")); +int stopStateMachine() { + LOG(logINFORED, ("Stopping State Machine\n")); #ifdef VIRTUAL - if (!isControlServer) { - virtual_stop = 1; - ComVirtual_setStop(virtual_stop); - // read till status is idle - int tempStatus = 1; - while(tempStatus == 1) { - tempStatus = ComVirtual_getStatus(); - } - virtual_stop = 0; - ComVirtual_setStop(virtual_stop); - LOG(logINFO, ("Stopped State Machine\n")); - } - return OK; + if (!isControlServer) { + virtual_stop = 1; + ComVirtual_setStop(virtual_stop); + // read till status is idle + int tempStatus = 1; + while (tempStatus == 1) { + tempStatus = ComVirtual_getStatus(); + } + virtual_stop = 0; + ComVirtual_setStop(virtual_stop); + LOG(logINFO, ("Stopped State Machine\n")); + } + return OK; #endif - //stop state machine - bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STP_ACQSTN_MSK); - LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); + // stop state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STP_ACQSTN_MSK); + LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); return OK; } -enum runStatus getRunStatus(){ +enum runStatus getRunStatus() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } - if(virtual_status == 0) { - LOG(logINFOBLUE, ("Status: IDLE\n")); - return IDLE; - } else{ - LOG(logINFOBLUE, ("Status: RUNNING\n")); - return RUNNING; - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } + if (virtual_status == 0) { + LOG(logINFOBLUE, ("Status: IDLE\n")); + return IDLE; + } else { + LOG(logINFOBLUE, ("Status: RUNNING\n")); + return RUNNING; + } #endif - LOG(logDEBUG1, ("Getting status\n")); - uint32_t retval = bus_r(PAT_STATUS_REG); - LOG(logINFO, ("Status Register: %08x\n",retval)); + LOG(logDEBUG1, ("Getting status\n")); + uint32_t retval = bus_r(PAT_STATUS_REG); + LOG(logINFO, ("Status Register: %08x\n", retval)); - enum runStatus s; + enum runStatus s; - //running - if (retval & PAT_STATUS_RUN_BUSY_MSK) { - if (retval & PAT_STATUS_WAIT_FOR_TRGGR_MSK) { - LOG(logINFOBLUE, ("Status: WAITING\n")); - s = WAITING; - } else { - if (retval & PAT_STATUS_DLY_BFRE_TRGGR_MSK) { - LOG(logINFO, ("Status: Delay before Trigger\n")); - } else if (retval & PAT_STATUS_DLY_AFTR_TRGGR_MSK) { - LOG(logINFO, ("Status: Delay after Trigger\n")); - } - LOG(logINFOBLUE, ("Status: RUNNING\n")); - s = RUNNING; - } - } + // running + if (retval & PAT_STATUS_RUN_BUSY_MSK) { + if (retval & PAT_STATUS_WAIT_FOR_TRGGR_MSK) { + LOG(logINFOBLUE, ("Status: WAITING\n")); + s = WAITING; + } else { + if (retval & PAT_STATUS_DLY_BFRE_TRGGR_MSK) { + LOG(logINFO, ("Status: Delay before Trigger\n")); + } else if (retval & PAT_STATUS_DLY_AFTR_TRGGR_MSK) { + LOG(logINFO, ("Status: Delay after Trigger\n")); + } + LOG(logINFOBLUE, ("Status: RUNNING\n")); + s = RUNNING; + } + } - //not running - else { - // stopped or error - if (retval & PAT_STATUS_FIFO_FULL_MSK) { - LOG(logINFOBLUE, ("Status: STOPPED\n")); //FIFO FULL?? - s = STOPPED; - } else if (retval & PAT_STATUS_CSM_BUSY_MSK) { - LOG(logINFOBLUE, ("Status: READ MACHINE BUSY\n")); - s = TRANSMITTING; - } else if (!retval) { - LOG(logINFOBLUE, ("Status: IDLE\n")); - s = IDLE; - } else { - LOG(logERROR, ("Status: Unknown status %08x\n", retval)); - s = ERROR; - } - } + // not running + else { + // stopped or error + if (retval & PAT_STATUS_FIFO_FULL_MSK) { + LOG(logINFOBLUE, ("Status: STOPPED\n")); // FIFO FULL?? + s = STOPPED; + } else if (retval & PAT_STATUS_CSM_BUSY_MSK) { + LOG(logINFOBLUE, ("Status: READ MACHINE BUSY\n")); + s = TRANSMITTING; + } else if (!retval) { + LOG(logINFOBLUE, ("Status: IDLE\n")); + s = IDLE; + } else { + LOG(logERROR, ("Status: Unknown status %08x\n", retval)); + s = ERROR; + } + } - return s; + return s; } void readFrame(int *ret, char *mess) { - // wait for status to be done - while(runBusy()){ - usleep(500); - } + // wait for status to be done + while (runBusy()) { + usleep(500); + } #ifdef VIRTUAL - LOG(logINFOGREEN, ("acquisition successfully finished\n")); - return; + LOG(logINFOGREEN, ("acquisition successfully finished\n")); + return; #endif - *ret = (int)OK; - // frames left to give status - int64_t retval = getNumFramesLeft() + 1; + *ret = (int)OK; + // frames left to give status + int64_t retval = getNumFramesLeft() + 1; - if ( retval > 0) { - LOG(logERROR, ("No data and run stopped: %lld frames left\n",(long long int)retval)); - } else { - LOG(logINFOGREEN, ("Acquisition successfully finished\n")); - } + if (retval > 0) { + LOG(logERROR, ("No data and run stopped: %lld frames left\n", + (long long int)retval)); + } else { + LOG(logINFOGREEN, ("Acquisition successfully finished\n")); + } } u_int32_t runBusy() { #ifdef VIRTUAL - if (!isControlServer) { - virtual_status = ComVirtual_getStatus(); - } + if (!isControlServer) { + virtual_status = ComVirtual_getStatus(); + } return virtual_status; #endif - u_int32_t s = (bus_r(PAT_STATUS_REG) & PAT_STATUS_RUN_BUSY_MSK); - //LOG(logDEBUG1, ("Status Register: %08x\n", s)); - return s; + u_int32_t s = (bus_r(PAT_STATUS_REG) & PAT_STATUS_RUN_BUSY_MSK); + // LOG(logDEBUG1, ("Status Register: %08x\n", s)); + return s; } /* common */ int calculateDataBytes() { - int numCounters = __builtin_popcount(getCounterMask()); - int dr = setDynamicRange(-1); - int databytes = NCHAN_1_COUNTER * NCHIP * numCounters * - ((dr > 16) ? 4 : // 32 bit - ((dr > 8) ? 2 : // 16 bit - ((dr > 4) ? 0.5 : // 4 bit - 0.125))); // 1 bit + int numCounters = __builtin_popcount(getCounterMask()); + int dr = setDynamicRange(-1); + int databytes = NCHAN_1_COUNTER * NCHIP * numCounters * + ((dr > 16) ? 4 : // 32 bit + ((dr > 8) ? 2 : // 16 bit + ((dr > 4) ? 0.5 : // 4 bit + 0.125))); // 1 bit - return databytes; + return databytes; } -int getTotalNumberOfChannels() {return (getNumberOfChannelsPerChip() * getNumberOfChips());} -int getNumberOfChips() {return NCHIP;} -int getNumberOfDACs() {return NDAC;} -int getNumberOfChannelsPerChip() {return NCHAN;} +int getTotalNumberOfChannels() { + return (getNumberOfChannelsPerChip() * getNumberOfChips()); +} +int getNumberOfChips() { return NCHIP; } +int getNumberOfDACs() { return NDAC; } +int getNumberOfChannelsPerChip() { return NCHAN; } diff --git a/slsDetectorServers/slsDetectorServer/src/AD7689.c b/slsDetectorServers/slsDetectorServer/src/AD7689.c old mode 100755 new mode 100644 index 337499a81..ad65d476a --- a/slsDetectorServers/slsDetectorServer/src/AD7689.c +++ b/slsDetectorServers/slsDetectorServer/src/AD7689.c @@ -1,77 +1,99 @@ #include "AD7689.h" -#include "commonServerFunctions.h" // blackfin.h, ansi.h -#include "common.h" #include "blackfin.h" #include "clogger.h" - +#include "common.h" +#include "commonServerFunctions.h" // blackfin.h, ansi.h /* AD7689 ADC DEFINES */ /** Read back CFG Register */ -#define AD7689_CFG_RB_OFST (0) -#define AD7689_CFG_RB_MSK (0x00000001 << AD7689_CFG_RB_OFST) +#define AD7689_CFG_RB_OFST (0) +#define AD7689_CFG_RB_MSK (0x00000001 << AD7689_CFG_RB_OFST) /** Channel sequencer */ -#define AD7689_CFG_SEQ_OFST (1) -#define AD7689_CFG_SEQ_MSK (0x00000003 << AD7689_CFG_SEQ_OFST) -#define AD7689_CFG_SEQ_DSBLE_VAL ((0x0 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) -#define AD7689_CFG_SEQ_UPDTE_DRNG_SQNCE_VAL ((0x1 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) -#define AD7689_CFG_SEQ_SCN_WTH_TMP_VAL ((0x2 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) -#define AD7689_CFG_SEQ_SCN_WTHT_TMP_VAL ((0x3 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) +#define AD7689_CFG_SEQ_OFST (1) +#define AD7689_CFG_SEQ_MSK (0x00000003 << AD7689_CFG_SEQ_OFST) +#define AD7689_CFG_SEQ_DSBLE_VAL \ + ((0x0 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) +#define AD7689_CFG_SEQ_UPDTE_DRNG_SQNCE_VAL \ + ((0x1 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) +#define AD7689_CFG_SEQ_SCN_WTH_TMP_VAL \ + ((0x2 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) +#define AD7689_CFG_SEQ_SCN_WTHT_TMP_VAL \ + ((0x3 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) /** Reference/ buffer selection */ -#define AD7689_CFG_REF_OFST (3) -#define AD7689_CFG_REF_MSK (0x00000007 << AD7689_CFG_REF_OFST) -/** Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. */ -#define AD7689_CFG_REF_INT_2500MV_VAL ((0x0 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_OFST) -/** Internal reference. REF = 4.096V buffered output. Temperature sensor enabled. */ -#define AD7689_CFG_REF_INT_4096MV_VAL ((0x1 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) +#define AD7689_CFG_REF_OFST (3) +#define AD7689_CFG_REF_MSK (0x00000007 << AD7689_CFG_REF_OFST) +/** Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. + */ +#define AD7689_CFG_REF_INT_2500MV_VAL \ + ((0x0 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_OFST) +/** Internal reference. REF = 4.096V buffered output. Temperature sensor + * enabled. */ +#define AD7689_CFG_REF_INT_4096MV_VAL \ + ((0x1 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) /** External reference. Temperature sensor enabled. Internal buffer disabled. */ -#define AD7689_CFG_REF_EXT_TMP_VAL ((0x2 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) +#define AD7689_CFG_REF_EXT_TMP_VAL \ + ((0x2 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) /** External reference. Temperature sensor enabled. Internal buffer enabled. */ -#define AD7689_CFG_REF_EXT_TMP_INTBUF_VAL ((0x3 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) -/** External reference. Temperature sensor disabled. Internal buffer disabled. */ -#define AD7689_CFG_REF_EXT_VAL ((0x6 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) +#define AD7689_CFG_REF_EXT_TMP_INTBUF_VAL \ + ((0x3 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) +/** External reference. Temperature sensor disabled. Internal buffer disabled. + */ +#define AD7689_CFG_REF_EXT_VAL \ + ((0x6 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) /** External reference. Temperature sensor disabled. Internal buffer enabled. */ -#define AD7689_CFG_REF_EXT_INTBUF_VAL ((0x7 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) +#define AD7689_CFG_REF_EXT_INTBUF_VAL \ + ((0x7 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) /** bandwidth of low pass filter */ -#define AD7689_CFG_BW_OFST (6) -#define AD7689_CFG_BW_MSK (0x00000001 << AD7689_CFG_REF_OFST) -#define AD7689_CFG_BW_ONE_FOURTH_VAL ((0x0 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK) -#define AD7689_CFG_BW_FULL_VAL ((0x1 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK) +#define AD7689_CFG_BW_OFST (6) +#define AD7689_CFG_BW_MSK (0x00000001 << AD7689_CFG_REF_OFST) +#define AD7689_CFG_BW_ONE_FOURTH_VAL \ + ((0x0 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK) +#define AD7689_CFG_BW_FULL_VAL ((0x1 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK) /** input channel selection IN0 - IN7 */ -#define AD7689_CFG_IN_OFST (7) -#define AD7689_CFG_IN_MSK (0x00000007 << AD7689_CFG_IN_OFST) +#define AD7689_CFG_IN_OFST (7) +#define AD7689_CFG_IN_MSK (0x00000007 << AD7689_CFG_IN_OFST) /** input channel configuration */ -#define AD7689_CFG_INCC_OFST (10) -#define AD7689_CFG_INCC_MSK (0x00000007 << AD7689_CFG_INCC_OFST) -#define AD7689_CFG_INCC_BPLR_DFFRNTL_PRS_VAL ((0x0 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) -#define AD7689_CFG_INCC_BPLR_IN_COM_VAL ((0x2 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) -#define AD7689_CFG_INCC_TMP_VAL ((0x3 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) -#define AD7689_CFG_INCC_UNPLR_DFFRNTL_PRS_VAL ((0x4 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) -#define AD7689_CFG_INCC_UNPLR_IN_COM_VAL ((0x6 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) -#define AD7689_CFG_INCC_UNPLR_IN_GND_VAL ((0x7 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) +#define AD7689_CFG_INCC_OFST (10) +#define AD7689_CFG_INCC_MSK (0x00000007 << AD7689_CFG_INCC_OFST) +#define AD7689_CFG_INCC_BPLR_DFFRNTL_PRS_VAL \ + ((0x0 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) +#define AD7689_CFG_INCC_BPLR_IN_COM_VAL \ + ((0x2 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) +#define AD7689_CFG_INCC_TMP_VAL \ + ((0x3 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) +#define AD7689_CFG_INCC_UNPLR_DFFRNTL_PRS_VAL \ + ((0x4 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) +#define AD7689_CFG_INCC_UNPLR_IN_COM_VAL \ + ((0x6 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) +#define AD7689_CFG_INCC_UNPLR_IN_GND_VAL \ + ((0x7 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) /** configuration update */ -#define AD7689_CFG_CFG_OFST (13) -#define AD7689_CFG_CFG_MSK (0x00000001 << AD7689_CFG_CFG_OFST) -#define AD7689_CFG_CFG_NO_UPDATE_VAL ((0x0 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK) -#define AD7689_CFG_CFG_OVRWRTE_VAL ((0x1 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK) +#define AD7689_CFG_CFG_OFST (13) +#define AD7689_CFG_CFG_MSK (0x00000001 << AD7689_CFG_CFG_OFST) +#define AD7689_CFG_CFG_NO_UPDATE_VAL \ + ((0x0 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK) +#define AD7689_CFG_CFG_OVRWRTE_VAL \ + ((0x1 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK) -#define AD7689_ADC_CFG_NUMBITS (14) -#define AD7689_ADC_DATA_NUMBITS (16) -#define AD7689_NUM_CHANNELS (8) -#define AD7689_NUM_INVALID_CONVERSIONS (3) +#define AD7689_ADC_CFG_NUMBITS (14) +#define AD7689_ADC_DATA_NUMBITS (16) +#define AD7689_NUM_CHANNELS (8) +#define AD7689_NUM_INVALID_CONVERSIONS (3) -#define AD7689_INT_REF_MAX_MV (2500) // chosen using reference buffer selection in config reg -#define AD7689_INT_REF_MIN_MV (0) -#define AD7689_INT_REF_MAX_UV (2500 * 1000) -#define AD7689_INT_REF_MIN_UV (0) -#define AD7689_INT_MAX_STEPS (0xFFFF + 1) -#define AD7689_TMP_C_FOR_1_MV (25.00 / 283.00) +#define AD7689_INT_REF_MAX_MV \ + (2500) // chosen using reference buffer selection in config reg +#define AD7689_INT_REF_MIN_MV (0) +#define AD7689_INT_REF_MAX_UV (2500 * 1000) +#define AD7689_INT_REF_MIN_UV (0) +#define AD7689_INT_MAX_STEPS (0xFFFF + 1) +#define AD7689_TMP_C_FOR_1_MV (25.00 / 283.00) // Definitions from the fpga uint32_t AD7689_Reg = 0x0; @@ -81,9 +103,11 @@ uint32_t AD7689_ClkMask = 0x0; uint32_t AD7689_DigMask = 0x0; int AD7689_DigOffset = 0x0; -void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst) { - LOG(logDEBUG, ("AD7689: reg:0x%x roreg:0x%x cmsk:0x%x clkmsk:0x%x dmsk:0x%x dofst:%d\n", - reg, roreg, cmsk, clkmsk, dmsk, dofst)); +void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk, + uint32_t clkmsk, uint32_t dmsk, int dofst) { + LOG(logDEBUG, ("AD7689: reg:0x%x roreg:0x%x cmsk:0x%x clkmsk:0x%x " + "dmsk:0x%x dofst:%d\n", + reg, roreg, cmsk, clkmsk, dmsk, dofst)); AD7689_Reg = reg; AD7689_ROReg = roreg; AD7689_CnvMask = cmsk; @@ -93,48 +117,49 @@ void AD7689_SetDefines(uint32_t reg, uint32_t roreg, uint32_t cmsk, uint32_t clk } void AD7689_Disable() { - bus_w(AD7689_Reg, (bus_r(AD7689_Reg) - &~(AD7689_CnvMask) - &~AD7689_ClkMask - &~(AD7689_DigMask))); + bus_w(AD7689_Reg, (bus_r(AD7689_Reg) & ~(AD7689_CnvMask) & ~AD7689_ClkMask & + ~(AD7689_DigMask))); } void AD7689_Set(uint32_t codata) { - LOG(logINFO, ("\tSetting ADC SPI Register. Writing 0x%08x to Config Reg\n", codata)); + LOG(logINFO, + ("\tSetting ADC SPI Register. Writing 0x%08x to Config Reg\n", codata)); serializeToSPI(AD7689_Reg, codata, AD7689_CnvMask, AD7689_ADC_CFG_NUMBITS, - AD7689_ClkMask, AD7689_DigMask, AD7689_DigOffset, 1); + AD7689_ClkMask, AD7689_DigMask, AD7689_DigOffset, 1); } uint16_t AD7689_Get() { LOG(logINFO, ("\tGetting ADC SPI Register.\n")); - return (uint16_t)serializeFromSPI(AD7689_Reg, AD7689_CnvMask, AD7689_ADC_DATA_NUMBITS, - AD7689_ClkMask, AD7689_DigMask, AD7689_ROReg, 1); + return (uint16_t)serializeFromSPI(AD7689_Reg, AD7689_CnvMask, + AD7689_ADC_DATA_NUMBITS, AD7689_ClkMask, + AD7689_DigMask, AD7689_ROReg, 1); } int AD7689_GetTemperature() { AD7689_Set( - // read back - AD7689_CFG_RB_MSK | - // disable sequencer (different from config) - AD7689_CFG_SEQ_DSBLE_VAL | - // Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. - AD7689_CFG_REF_INT_2500MV_VAL | - // full bandwidth of low pass filter - AD7689_CFG_BW_FULL_VAL | - // all channel (different from config) - AD7689_CFG_IN_MSK | - // temperature sensor (different from config) - AD7689_CFG_INCC_TMP_VAL | - // overwrite configuration - AD7689_CFG_CFG_OVRWRTE_VAL); + // read back + AD7689_CFG_RB_MSK | + // disable sequencer (different from config) + AD7689_CFG_SEQ_DSBLE_VAL | + // Internal reference. REF = 2.5V buffered output. Temperature sensor + // enabled. + AD7689_CFG_REF_INT_2500MV_VAL | + // full bandwidth of low pass filter + AD7689_CFG_BW_FULL_VAL | + // all channel (different from config) + AD7689_CFG_IN_MSK | + // temperature sensor (different from config) + AD7689_CFG_INCC_TMP_VAL | + // overwrite configuration + AD7689_CFG_CFG_OVRWRTE_VAL); int regval = AD7689_Get(); - // value in mV FIXME: page 17? reference voltage temperature coefficient or t do with -40 to 85 °C + // value in mV FIXME: page 17? reference voltage temperature coefficient or + // t do with -40 to 85 °C int retval = 0; - ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS, - AD7689_INT_REF_MIN_MV, AD7689_INT_REF_MAX_MV, - regval, &retval); + ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS, AD7689_INT_REF_MIN_MV, + AD7689_INT_REF_MAX_MV, regval, &retval); LOG(logDEBUG1, ("voltage read for temp: %d mV\n", retval)); // value in °C @@ -142,52 +167,58 @@ int AD7689_GetTemperature() { LOG(logINFO, ("\ttemp read : %f °C (%d unit)\n", tempValue, regval)); return tempValue; - } int AD7689_GetChannel(int ichan) { // filter channels val if (ichan < 0 || ichan >= AD7689_NUM_CHANNELS) { - LOG(logERROR, ("Cannot get slow adc channel. " - "%d out of bounds (0 to %d)\n", ichan, AD7689_NUM_CHANNELS - 1)); - return -1; + LOG(logERROR, ("Cannot get slow adc channel. " + "%d out of bounds (0 to %d)\n", + ichan, AD7689_NUM_CHANNELS - 1)); + return -1; } AD7689_Set( - // read back - AD7689_CFG_RB_MSK | - // disable sequencer (different from config) - AD7689_CFG_SEQ_DSBLE_VAL | - // Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. - AD7689_CFG_REF_INT_2500MV_VAL | - // full bandwidth of low pass filter - AD7689_CFG_BW_FULL_VAL | - // specific channel (different from config) - ((ichan << AD7689_CFG_IN_OFST) & AD7689_CFG_IN_MSK) | - // input channel configuration (unipolar. inx to gnd) - AD7689_CFG_INCC_UNPLR_IN_GND_VAL | - // overwrite configuration - AD7689_CFG_CFG_OVRWRTE_VAL); + // read back + AD7689_CFG_RB_MSK | + // disable sequencer (different from config) + AD7689_CFG_SEQ_DSBLE_VAL | + // Internal reference. REF = 2.5V buffered output. Temperature sensor + // enabled. + AD7689_CFG_REF_INT_2500MV_VAL | + // full bandwidth of low pass filter + AD7689_CFG_BW_FULL_VAL | + // specific channel (different from config) + ((ichan << AD7689_CFG_IN_OFST) & AD7689_CFG_IN_MSK) | + // input channel configuration (unipolar. inx to gnd) + AD7689_CFG_INCC_UNPLR_IN_GND_VAL | + // overwrite configuration + AD7689_CFG_CFG_OVRWRTE_VAL); int regval = AD7689_Get(); // value in uV - int retval = ((double)(regval - 0) * (double)(AD7689_INT_REF_MAX_UV - AD7689_INT_REF_MIN_UV)) - / (double)(AD7689_INT_MAX_STEPS - 0) + AD7689_INT_REF_MIN_UV; + int retval = ((double)(regval - 0) * + (double)(AD7689_INT_REF_MAX_UV - AD7689_INT_REF_MIN_UV)) / + (double)(AD7689_INT_MAX_STEPS - 0) + + AD7689_INT_REF_MIN_UV; /*ConvertToDifferentRange(0, AD7689_INT_MAX_STEPS, AD7689_INT_REF_MIN_MV, AD7689_INT_REF_MAX_MV, regval, &retval);*/ - LOG(logINFO, ("\tvoltage read for chan %d: %d uV (regVal: %d)\n", ichan, retval, regval)); - return retval; + LOG(logINFO, ("\tvoltage read for chan %d: %d uV (regVal: %d)\n", ichan, + retval, regval)); + return retval; } -void AD7689_Configure(){ +void AD7689_Configure() { LOG(logINFOBLUE, ("Configuring AD7689 (Slow ADCs): \n")); // from power up, 3 invalid conversions - LOG(logINFO, ("\tConfiguring %d x due to invalid conversions from power up\n", AD7689_NUM_INVALID_CONVERSIONS)); + LOG(logINFO, + ("\tConfiguring %d x due to invalid conversions from power up\n", + AD7689_NUM_INVALID_CONVERSIONS)); int i = 0; for (i = 0; i < AD7689_NUM_INVALID_CONVERSIONS; ++i) { AD7689_Set( @@ -195,7 +226,8 @@ void AD7689_Configure(){ AD7689_CFG_RB_MSK | // scan sequence IN0-IN7 then temperature sensor AD7689_CFG_SEQ_SCN_WTH_TMP_VAL | - // Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. + // Internal reference. REF = 2.5V buffered output. Temperature + // sensor enabled. AD7689_CFG_REF_INT_2500MV_VAL | // full bandwidth of low pass filter AD7689_CFG_BW_FULL_VAL | diff --git a/slsDetectorServers/slsDetectorServer/src/AD9252.c b/slsDetectorServers/slsDetectorServer/src/AD9252.c old mode 100755 new mode 100644 index 9ac259742..9f0ed3bcf --- a/slsDetectorServers/slsDetectorServer/src/AD9252.c +++ b/slsDetectorServers/slsDetectorServer/src/AD9252.c @@ -1,102 +1,134 @@ #include "AD9252.h" -#include "commonServerFunctions.h" // blackfin.h, ansi.h #include "blackfin.h" #include "clogger.h" +#include "commonServerFunctions.h" // blackfin.h, ansi.h /* AD9252 ADC DEFINES */ -#define AD9252_ADC_NUMBITS (24) +#define AD9252_ADC_NUMBITS (24) // default value is 0xF -#define AD9252_DEV_IND_2_REG (0x04) -#define AD9252_CHAN_H_OFST (0) -#define AD9252_CHAN_H_MSK (0x00000001 << AD9252_CHAN_H_OFST) -#define AD9252_CHAN_G_OFST (1) -#define AD9252_CHAN_G_MSK (0x00000001 << AD9252_CHAN_G_OFST) -#define AD9252_CHAN_F_OFST (2) -#define AD9252_CHAN_F_MSK (0x00000001 << AD9252_CHAN_F_OFST) -#define AD9252_CHAN_E_OFST (3) -#define AD9252_CHAN_E_MSK (0x00000001 << AD9252_CHAN_E_OFST) +#define AD9252_DEV_IND_2_REG (0x04) +#define AD9252_CHAN_H_OFST (0) +#define AD9252_CHAN_H_MSK (0x00000001 << AD9252_CHAN_H_OFST) +#define AD9252_CHAN_G_OFST (1) +#define AD9252_CHAN_G_MSK (0x00000001 << AD9252_CHAN_G_OFST) +#define AD9252_CHAN_F_OFST (2) +#define AD9252_CHAN_F_MSK (0x00000001 << AD9252_CHAN_F_OFST) +#define AD9252_CHAN_E_OFST (3) +#define AD9252_CHAN_E_MSK (0x00000001 << AD9252_CHAN_E_OFST) // default value is 0x0F -#define AD9252_DEV_IND_1_REG (0x05) -#define AD9252_CHAN_D_OFST (0) -#define AD9252_CHAN_D_MSK (0x00000001 << AD9252_CHAN_D_OFST) -#define AD9252_CHAN_C_OFST (1) -#define AD9252_CHAN_C_MSK (0x00000001 << AD9252_CHAN_C_OFST) -#define AD9252_CHAN_B_OFST (2) -#define AD9252_CHAN_B_MSK (0x00000001 << AD9252_CHAN_B_OFST) -#define AD9252_CHAN_A_OFST (3) -#define AD9252_CHAN_A_MSK (0x00000001 << AD9252_CHAN_A_OFST) -#define AD9252_CLK_CH_DCO_OFST (4) -#define AD9252_CLK_CH_DCO_MSK (0x00000001 << AD9252_CLK_CH_DCO_OFST) -#define AD9252_CLK_CH_IFCO_OFST (5) -#define AD9252_CLK_CH_IFCO_MSK (0x00000001 << AD9252_CLK_CH_IFCO_OFST) +#define AD9252_DEV_IND_1_REG (0x05) +#define AD9252_CHAN_D_OFST (0) +#define AD9252_CHAN_D_MSK (0x00000001 << AD9252_CHAN_D_OFST) +#define AD9252_CHAN_C_OFST (1) +#define AD9252_CHAN_C_MSK (0x00000001 << AD9252_CHAN_C_OFST) +#define AD9252_CHAN_B_OFST (2) +#define AD9252_CHAN_B_MSK (0x00000001 << AD9252_CHAN_B_OFST) +#define AD9252_CHAN_A_OFST (3) +#define AD9252_CHAN_A_MSK (0x00000001 << AD9252_CHAN_A_OFST) +#define AD9252_CLK_CH_DCO_OFST (4) +#define AD9252_CLK_CH_DCO_MSK (0x00000001 << AD9252_CLK_CH_DCO_OFST) +#define AD9252_CLK_CH_IFCO_OFST (5) +#define AD9252_CLK_CH_IFCO_MSK (0x00000001 << AD9252_CLK_CH_IFCO_OFST) // default value is 0x00 -#define AD9252_POWER_MODE_REG (0x08) -#define AD9252_POWER_INTERNAL_OFST (0) -#define AD9252_POWER_INTERNAL_MSK (0x00000007 << AD9252_POWER_INTERNAL_OFST) -#define AD9252_INT_CHIP_RUN_VAL ((0x0 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) -#define AD9252_INT_FULL_PWR_DWN_VAL ((0x1 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) -#define AD9252_INT_STANDBY_VAL ((0x2 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) -#define AD9252_INT_RESET_VAL ((0x3 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) - +#define AD9252_POWER_MODE_REG (0x08) +#define AD9252_POWER_INTERNAL_OFST (0) +#define AD9252_POWER_INTERNAL_MSK (0x00000007 << AD9252_POWER_INTERNAL_OFST) +#define AD9252_INT_CHIP_RUN_VAL \ + ((0x0 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) +#define AD9252_INT_FULL_PWR_DWN_VAL \ + ((0x1 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) +#define AD9252_INT_STANDBY_VAL \ + ((0x2 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) +#define AD9252_INT_RESET_VAL \ + ((0x3 << AD9252_POWER_INTERNAL_OFST) & AD9252_POWER_INTERNAL_MSK) // default value is 0x0 -#define AD9252_TEST_MODE_REG (0x0D) -#define AD9252_OUT_TEST_OFST (0) -#define AD9252_OUT_TEST_MSK (0x0000000F << AD9252_OUT_TEST_OFST) -#define AD9252_TST_OFF_VAL ((0x0 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_MDSCL_SHRT_VAL ((0x1 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_PSTV_FS_VAL ((0x2 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_NGTV_FS_VAL ((0x3 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_ALTRNTNG_CHKRBRD_VAL ((0x4 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_PN_23_SQNC_VAL ((0x5 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_PN_9_SQNC__VAL ((0x6 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_1_0_WRD_TGGL_VAL ((0x7 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_USR_INPT_VAL ((0x8 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_1_0_BT_TGGL_VAL ((0x9 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_1_x_SYNC_VAL ((0xa << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_1_BIT_HGH_VAL ((0xb << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) -#define AD9252_TST_MXD_BT_FRQ_VAL ((0xc << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TEST_MODE_REG (0x0D) +#define AD9252_OUT_TEST_OFST (0) +#define AD9252_OUT_TEST_MSK (0x0000000F << AD9252_OUT_TEST_OFST) +#define AD9252_TST_OFF_VAL ((0x0 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_MDSCL_SHRT_VAL \ + ((0x1 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_PSTV_FS_VAL \ + ((0x2 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_NGTV_FS_VAL \ + ((0x3 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_ALTRNTNG_CHKRBRD_VAL \ + ((0x4 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_PN_23_SQNC_VAL \ + ((0x5 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_PN_9_SQNC__VAL \ + ((0x6 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_1_0_WRD_TGGL_VAL \ + ((0x7 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_USR_INPT_VAL \ + ((0x8 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_1_0_BT_TGGL_VAL \ + ((0x9 << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_1_x_SYNC_VAL \ + ((0xa << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_1_BIT_HGH_VAL \ + ((0xb << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) +#define AD9252_TST_MXD_BT_FRQ_VAL \ + ((0xc << AD9252_OUT_TEST_OFST) & AD9252_OUT_TEST_MSK) #define AD9252_TST_RST_SHRT_GN_OFST (4) #define AD9252_TST_RST_SHRT_GN_MSK (0x00000001 << AD9252_TST_RST_SHRT_GN_OFST) #define AD9252_TST_RST_LNG_GN_OFST (5) #define AD9252_TST_RST_LNG_GN_MSK (0x00000001 << AD9252_TST_RST_LNG_GN_OFST) #define AD9252_USER_IN_MODE_OFST (6) #define AD9252_USER_IN_MODE_MSK (0x00000003 << AD9252_USER_IN_MODE_OFST) -#define AD9252_USR_IN_SNGL_VAL ((0x0 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) -#define AD9252_USR_IN_ALTRNT_VAL ((0x1 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) -#define AD9252_USR_IN_SNGL_ONC_VAL ((0x2 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) -#define AD9252_USR_IN_ALTRNT_ONC_VAL ((0x3 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) +#define AD9252_USR_IN_SNGL_VAL \ + ((0x0 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) +#define AD9252_USR_IN_ALTRNT_VAL \ + ((0x1 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) +#define AD9252_USR_IN_SNGL_ONC_VAL \ + ((0x2 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) +#define AD9252_USR_IN_ALTRNT_ONC_VAL \ + ((0x3 << AD9252_USER_IN_MODE_OFST) & AD9252_USER_IN_MODE_MSK) // default value is 0x00 -#define AD9252_OUT_MODE_REG (0x14) -#define AD9252_OUT_FORMAT_OFST (0) -#define AD9252_OUT_FORMAT_MSK (0x00000003 << AD9252_OUT_FORMAT_OFST) -#define AD9252_OUT_BINARY_OFST_VAL ((0x0 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK) -#define AD9252_OUT_TWOS_COMPL_VAL ((0x1 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK) -#define AD9252_OUT_OTPT_INVRT_OFST (2) -#define AD9252_OUT_OTPT_INVRT_MSK (0x00000001 << AD9252_OUT_OTPT_INVRT_OFST) -#define AD9252_OUT_LVDS_OPT_OFST (6) -#define AD9252_OUT_LVDS_OPT_MSK (0x00000001 << AD9252_OUT_LVDS_OPT_OFST) -#define AD9252_OUT_LVDS_ANSI_VAL ((0x0 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK) -#define AD9252_OUT_LVDS_IEEE_VAL ((0x1 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK) +#define AD9252_OUT_MODE_REG (0x14) +#define AD9252_OUT_FORMAT_OFST (0) +#define AD9252_OUT_FORMAT_MSK (0x00000003 << AD9252_OUT_FORMAT_OFST) +#define AD9252_OUT_BINARY_OFST_VAL \ + ((0x0 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK) +#define AD9252_OUT_TWOS_COMPL_VAL \ + ((0x1 << AD9252_OUT_FORMAT_OFST) & AD9252_OUT_FORMAT_MSK) +#define AD9252_OUT_OTPT_INVRT_OFST (2) +#define AD9252_OUT_OTPT_INVRT_MSK (0x00000001 << AD9252_OUT_OTPT_INVRT_OFST) +#define AD9252_OUT_LVDS_OPT_OFST (6) +#define AD9252_OUT_LVDS_OPT_MSK (0x00000001 << AD9252_OUT_LVDS_OPT_OFST) +#define AD9252_OUT_LVDS_ANSI_VAL \ + ((0x0 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK) +#define AD9252_OUT_LVDS_IEEE_VAL \ + ((0x1 << AD9252_OUT_LVDS_OPT_OFST) & AD9252_OUT_LVDS_OPT_MSK) // default value is 0x3 -#define AD9252_OUT_PHASE_REG (0x16) -#define AD9252_OUT_CLK_OFST (0) -#define AD9252_OUT_CLK_MSK (0x0000000F << AD9252_OUT_CLK_OFST) -#define AD9252_OUT_CLK_0_VAL ((0x0 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) -#define AD9252_OUT_CLK_60_VAL ((0x1 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) -#define AD9252_OUT_CLK_120_VAL ((0x2 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) -#define AD9252_OUT_CLK_180_VAL ((0x3 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) -#define AD9252_OUT_CLK_300_VAL ((0x5 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) -#define AD9252_OUT_CLK_360_VAL ((0x6 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) -#define AD9252_OUT_CLK_480_VAL ((0x8 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) -#define AD9252_OUT_CLK_540_VAL ((0x9 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) -#define AD9252_OUT_CLK_600_VAL ((0xa << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) -#define AD9252_OUT_CLK_660_VAL ((0xb << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) // 0xb - 0xf is 660 +#define AD9252_OUT_PHASE_REG (0x16) +#define AD9252_OUT_CLK_OFST (0) +#define AD9252_OUT_CLK_MSK (0x0000000F << AD9252_OUT_CLK_OFST) +#define AD9252_OUT_CLK_0_VAL ((0x0 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) +#define AD9252_OUT_CLK_60_VAL \ + ((0x1 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) +#define AD9252_OUT_CLK_120_VAL \ + ((0x2 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) +#define AD9252_OUT_CLK_180_VAL \ + ((0x3 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) +#define AD9252_OUT_CLK_300_VAL \ + ((0x5 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) +#define AD9252_OUT_CLK_360_VAL \ + ((0x6 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) +#define AD9252_OUT_CLK_480_VAL \ + ((0x8 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) +#define AD9252_OUT_CLK_540_VAL \ + ((0x9 << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) +#define AD9252_OUT_CLK_600_VAL \ + ((0xa << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) +#define AD9252_OUT_CLK_660_VAL \ + ((0xb << AD9252_OUT_CLK_OFST) & AD9252_OUT_CLK_MSK) // 0xb - 0xf is 660 // defines from the fpga uint32_t AD9252_Reg = 0x0; @@ -105,7 +137,8 @@ uint32_t AD9252_ClkMask = 0x0; uint32_t AD9252_DigMask = 0x0; int AD9252_DigOffset = 0x0; -void AD9252_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst) { +void AD9252_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, + uint32_t dmsk, int dofst) { AD9252_Reg = reg; AD9252_CsMask = cmsk; AD9252_ClkMask = clkmsk; @@ -114,29 +147,28 @@ void AD9252_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dm } void AD9252_Disable() { - bus_w(AD9252_Reg, (bus_r(AD9252_Reg) - | AD9252_CsMask - | AD9252_ClkMask) - &~(AD9252_DigMask)); + bus_w(AD9252_Reg, (bus_r(AD9252_Reg) | AD9252_CsMask | AD9252_ClkMask) & + ~(AD9252_DigMask)); } void AD9252_Set(int addr, int val) { u_int32_t codata; codata = val + (addr << 8); - LOG(logINFO, ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr)); + LOG(logINFO, + ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr)); serializeToSPI(AD9252_Reg, codata, AD9252_CsMask, AD9252_ADC_NUMBITS, - AD9252_ClkMask, AD9252_DigMask, AD9252_DigOffset, 0); + AD9252_ClkMask, AD9252_DigMask, AD9252_DigOffset, 0); } -void AD9252_Configure(){ +void AD9252_Configure() { LOG(logINFOBLUE, ("Configuring ADC9252:\n")); - //power mode reset + // power mode reset LOG(logINFO, ("\tPower mode reset\n")); AD9252_Set(AD9252_POWER_MODE_REG, AD9252_INT_RESET_VAL); - //power mode chip run + // power mode chip run LOG(logINFO, ("\tPower mode chip run\n")); AD9252_Set(AD9252_POWER_MODE_REG, AD9252_INT_CHIP_RUN_VAL); @@ -144,7 +176,7 @@ void AD9252_Configure(){ LOG(logINFO, ("\tBinary offset\n")); AD9252_Set(AD9252_OUT_MODE_REG, AD9252_OUT_BINARY_OFST_VAL); - //output clock phase + // output clock phase #ifdef GOTTHARDD LOG(logINFO, ("\tOutput clock phase is at default: 180\n")); #else @@ -158,11 +190,12 @@ void AD9252_Configure(){ // all devices on chip to receive next command LOG(logINFO, ("\tAll devices on chip to receive next command\n")); - AD9252_Set(AD9252_DEV_IND_2_REG, - AD9252_CHAN_H_MSK | AD9252_CHAN_G_MSK | AD9252_CHAN_F_MSK | AD9252_CHAN_E_MSK); - AD9252_Set(AD9252_DEV_IND_1_REG, - AD9252_CHAN_D_MSK | AD9252_CHAN_C_MSK | AD9252_CHAN_B_MSK | AD9252_CHAN_A_MSK | - AD9252_CLK_CH_DCO_MSK | AD9252_CLK_CH_IFCO_MSK); + AD9252_Set(AD9252_DEV_IND_2_REG, AD9252_CHAN_H_MSK | AD9252_CHAN_G_MSK | + AD9252_CHAN_F_MSK | AD9252_CHAN_E_MSK); + AD9252_Set(AD9252_DEV_IND_1_REG, AD9252_CHAN_D_MSK | AD9252_CHAN_C_MSK | + AD9252_CHAN_B_MSK | AD9252_CHAN_A_MSK | + AD9252_CLK_CH_DCO_MSK | + AD9252_CLK_CH_IFCO_MSK); // no test mode LOG(logINFO, ("\tNo test mode\n")); @@ -175,4 +208,3 @@ void AD9252_Configure(){ AD9252_Set(AD9252_TEST_MODE_REG, AD9252_TST_MXD_BT_FRQ_VAL); #endif } - diff --git a/slsDetectorServers/slsDetectorServer/src/AD9257.c b/slsDetectorServers/slsDetectorServer/src/AD9257.c old mode 100755 new mode 100644 index 57e5d879f..bbe3bea1d --- a/slsDetectorServers/slsDetectorServer/src/AD9257.c +++ b/slsDetectorServers/slsDetectorServer/src/AD9257.c @@ -1,129 +1,166 @@ #include "AD9257.h" -#include "commonServerFunctions.h" // blackfin.h, ansi.h #include "blackfin.h" #include "clogger.h" +#include "commonServerFunctions.h" // blackfin.h, ansi.h #include "sls_detector_defs.h" /* AD9257 ADC DEFINES */ -#define AD9257_ADC_NUMBITS (24) +#define AD9257_ADC_NUMBITS (24) // default value is 0xF -#define AD9257_DEV_IND_2_REG (0x04) -#define AD9257_CHAN_H_OFST (0) -#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST) -#define AD9257_CHAN_G_OFST (1) -#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST) -#define AD9257_CHAN_F_OFST (2) -#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST) -#define AD9257_CHAN_E_OFST (3) -#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST) +#define AD9257_DEV_IND_2_REG (0x04) +#define AD9257_CHAN_H_OFST (0) +#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST) +#define AD9257_CHAN_G_OFST (1) +#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST) +#define AD9257_CHAN_F_OFST (2) +#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST) +#define AD9257_CHAN_E_OFST (3) +#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST) // default value is 0x3F -#define AD9257_DEV_IND_1_REG (0x05) -#define AD9257_CHAN_D_OFST (0) -#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST) -#define AD9257_CHAN_C_OFST (1) -#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST) -#define AD9257_CHAN_B_OFST (2) -#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST) -#define AD9257_CHAN_A_OFST (3) -#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST) -#define AD9257_CLK_CH_DCO_OFST (4) -#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST) -#define AD9257_CLK_CH_IFCO_OFST (5) -#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST) +#define AD9257_DEV_IND_1_REG (0x05) +#define AD9257_CHAN_D_OFST (0) +#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST) +#define AD9257_CHAN_C_OFST (1) +#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST) +#define AD9257_CHAN_B_OFST (2) +#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST) +#define AD9257_CHAN_A_OFST (3) +#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST) +#define AD9257_CLK_CH_DCO_OFST (4) +#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST) +#define AD9257_CLK_CH_IFCO_OFST (5) +#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST) // default value is 0x00 -#define AD9257_POWER_MODE_REG (0x08) -#define AD9257_POWER_INTERNAL_OFST (0) -#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST) -#define AD9257_INT_CHIP_RUN_VAL ((0x0 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) -#define AD9257_INT_FULL_PWR_DWN_VAL ((0x1 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) -#define AD9257_INT_STANDBY_VAL ((0x2 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) -#define AD9257_INT_RESET_VAL ((0x3 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) -#define AD9257_POWER_EXTERNAL_OFST (5) -#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST) -#define AD9257_EXT_FULL_POWER_VAL ((0x0 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK) -#define AD9257_EXT_STANDBY_VAL ((0x1 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK) +#define AD9257_POWER_MODE_REG (0x08) +#define AD9257_POWER_INTERNAL_OFST (0) +#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST) +#define AD9257_INT_CHIP_RUN_VAL \ + ((0x0 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) +#define AD9257_INT_FULL_PWR_DWN_VAL \ + ((0x1 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) +#define AD9257_INT_STANDBY_VAL \ + ((0x2 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) +#define AD9257_INT_RESET_VAL \ + ((0x3 << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK) +#define AD9257_POWER_EXTERNAL_OFST (5) +#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST) +#define AD9257_EXT_FULL_POWER_VAL \ + ((0x0 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK) +#define AD9257_EXT_STANDBY_VAL \ + ((0x1 << AD9257_POWER_EXTERNAL_OFST) & AD9257_POWER_EXTERNAL_MSK) // default value is 0x0 -#define AD9257_TEST_MODE_REG (0x0D) -#define AD9257_OUT_TEST_OFST (0) -#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST) -#define AD9257_TST_OFF_VAL ((0x0 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_MDSCL_SHRT_VAL ((0x1 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_PSTV_FS_VAL ((0x2 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_NGTV_FS_VAL ((0x3 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_ALTRNTNG_CHKRBRD_VAL ((0x4 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_PN_23_SQNC_VAL ((0x5 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_PN_9_SQNC__VAL ((0x6 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_1_0_WRD_TGGL_VAL ((0x7 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_USR_INPT_VAL ((0x8 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_1_0_BT_TGGL_VAL ((0x9 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_1_x_SYNC_VAL ((0xa << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_1_BIT_HGH_VAL ((0xb << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) -#define AD9257_TST_MXD_BT_FRQ_VAL ((0xc << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TEST_MODE_REG (0x0D) +#define AD9257_OUT_TEST_OFST (0) +#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST) +#define AD9257_TST_OFF_VAL ((0x0 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_MDSCL_SHRT_VAL \ + ((0x1 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_PSTV_FS_VAL \ + ((0x2 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_NGTV_FS_VAL \ + ((0x3 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_ALTRNTNG_CHKRBRD_VAL \ + ((0x4 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_PN_23_SQNC_VAL \ + ((0x5 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_PN_9_SQNC__VAL \ + ((0x6 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_1_0_WRD_TGGL_VAL \ + ((0x7 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_USR_INPT_VAL \ + ((0x8 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_1_0_BT_TGGL_VAL \ + ((0x9 << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_1_x_SYNC_VAL \ + ((0xa << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_1_BIT_HGH_VAL \ + ((0xb << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) +#define AD9257_TST_MXD_BT_FRQ_VAL \ + ((0xc << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK) #define AD9257_TST_RST_SHRT_GN_OFST (4) #define AD9257_TST_RST_SHRT_GN_MSK (0x00000001 << AD9257_TST_RST_SHRT_GN_OFST) #define AD9257_TST_RST_LNG_GN_OFST (5) #define AD9257_TST_RST_LNG_GN_MSK (0x00000001 << AD9257_TST_RST_LNG_GN_OFST) #define AD9257_USER_IN_MODE_OFST (6) #define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST) -#define AD9257_USR_IN_SNGL_VAL ((0x0 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) -#define AD9257_USR_IN_ALTRNT_VAL ((0x1 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) -#define AD9257_USR_IN_SNGL_ONC_VAL ((0x2 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) -#define AD9257_USR_IN_ALTRNT_ONC_VAL ((0x3 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) +#define AD9257_USR_IN_SNGL_VAL \ + ((0x0 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) +#define AD9257_USR_IN_ALTRNT_VAL \ + ((0x1 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) +#define AD9257_USR_IN_SNGL_ONC_VAL \ + ((0x2 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) +#define AD9257_USR_IN_ALTRNT_ONC_VAL \ + ((0x3 << AD9257_USER_IN_MODE_OFST) & AD9257_USER_IN_MODE_MSK) // default value is 0x01 -#define AD9257_OUT_MODE_REG (0x14) -#define AD9257_OUT_FORMAT_OFST (0) -#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST) -#define AD9257_OUT_BINARY_OFST_VAL ((0x0 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK) -#define AD9257_OUT_TWOS_COMPL_VAL ((0x1 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK) -#define AD9257_OUT_OTPT_INVRT_OFST (2) -#define AD9257_OUT_OTPT_INVRT_MSK (0x00000001 << AD9257_OUT_OTPT_INVRT_OFST) -#define AD9257_OUT_LVDS_OPT_OFST (6) -#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST) -#define AD9257_OUT_LVDS_ANSI_VAL ((0x0 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK) -#define AD9257_OUT_LVDS_IEEE_VAL ((0x1 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK) +#define AD9257_OUT_MODE_REG (0x14) +#define AD9257_OUT_FORMAT_OFST (0) +#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST) +#define AD9257_OUT_BINARY_OFST_VAL \ + ((0x0 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK) +#define AD9257_OUT_TWOS_COMPL_VAL \ + ((0x1 << AD9257_OUT_FORMAT_OFST) & AD9257_OUT_FORMAT_MSK) +#define AD9257_OUT_OTPT_INVRT_OFST (2) +#define AD9257_OUT_OTPT_INVRT_MSK (0x00000001 << AD9257_OUT_OTPT_INVRT_OFST) +#define AD9257_OUT_LVDS_OPT_OFST (6) +#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST) +#define AD9257_OUT_LVDS_ANSI_VAL \ + ((0x0 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK) +#define AD9257_OUT_LVDS_IEEE_VAL \ + ((0x1 << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK) // default value is 0x3 -#define AD9257_OUT_PHASE_REG (0x16) -#define AD9257_OUT_CLK_OFST (0) -#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST) -#define AD9257_OUT_CLK_0_VAL ((0x0 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_OUT_CLK_60_VAL ((0x1 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_OUT_CLK_120_VAL ((0x2 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_OUT_CLK_180_VAL ((0x3 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_OUT_CLK_240_VAL ((0x4 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_OUT_CLK_300_VAL ((0x5 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_OUT_CLK_360_VAL ((0x6 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_OUT_CLK_420_VAL ((0x7 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_OUT_CLK_480_VAL ((0x8 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_OUT_CLK_540_VAL ((0x9 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_OUT_CLK_600_VAL ((0xa << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_OUT_CLK_660_VAL ((0xb << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) -#define AD9257_IN_CLK_OFST (4) -#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST) -#define AD9257_IN_CLK_0_VAL ((0x0 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) -#define AD9257_IN_CLK_1_VAL ((0x1 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) -#define AD9257_IN_CLK_2_VAL ((0x2 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) -#define AD9257_IN_CLK_3_VAL ((0x3 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) -#define AD9257_IN_CLK_4_VAL ((0x4 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) -#define AD9257_IN_CLK_5_VAL ((0x5 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) -#define AD9257_IN_CLK_6_VAL ((0x6 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) -#define AD9257_IN_CLK_7_VAL ((0x7 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) +#define AD9257_OUT_PHASE_REG (0x16) +#define AD9257_OUT_CLK_OFST (0) +#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST) +#define AD9257_OUT_CLK_0_VAL ((0x0 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_OUT_CLK_60_VAL \ + ((0x1 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_OUT_CLK_120_VAL \ + ((0x2 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_OUT_CLK_180_VAL \ + ((0x3 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_OUT_CLK_240_VAL \ + ((0x4 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_OUT_CLK_300_VAL \ + ((0x5 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_OUT_CLK_360_VAL \ + ((0x6 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_OUT_CLK_420_VAL \ + ((0x7 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_OUT_CLK_480_VAL \ + ((0x8 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_OUT_CLK_540_VAL \ + ((0x9 << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_OUT_CLK_600_VAL \ + ((0xa << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_OUT_CLK_660_VAL \ + ((0xb << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK) +#define AD9257_IN_CLK_OFST (4) +#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST) +#define AD9257_IN_CLK_0_VAL ((0x0 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) +#define AD9257_IN_CLK_1_VAL ((0x1 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) +#define AD9257_IN_CLK_2_VAL ((0x2 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) +#define AD9257_IN_CLK_3_VAL ((0x3 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) +#define AD9257_IN_CLK_4_VAL ((0x4 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) +#define AD9257_IN_CLK_5_VAL ((0x5 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) +#define AD9257_IN_CLK_6_VAL ((0x6 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) +#define AD9257_IN_CLK_7_VAL ((0x7 << AD9257_IN_CLK_OFST) & AD9257_IN_CLK_MSK) // default value is 0x4 -#define AD9257_VREF_REG (0x18) -#define AD9257_VREF_OFST (0) -#define AD9257_VREF_MSK (0x00000007 << AD9257_VREF_OFST) -#define AD9257_VREF_DEFAULT_VAL (AD9257_VREF_2_0_VAL) -#define AD9257_VREF_1_0_VAL ((0x0 << AD9257_VREF_OFST) & AD9257_VREF_MSK) -#define AD9257_VREF_1_14_VAL ((0x1 << AD9257_VREF_OFST) & AD9257_VREF_MSK) -#define AD9257_VREF_1_33_VAL ((0x2 << AD9257_VREF_OFST) & AD9257_VREF_MSK) -#define AD9257_VREF_1_6_VAL ((0x3 << AD9257_VREF_OFST) & AD9257_VREF_MSK) -#define AD9257_VREF_2_0_VAL ((0x4 << AD9257_VREF_OFST) & AD9257_VREF_MSK) +#define AD9257_VREF_REG (0x18) +#define AD9257_VREF_OFST (0) +#define AD9257_VREF_MSK (0x00000007 << AD9257_VREF_OFST) +#define AD9257_VREF_DEFAULT_VAL (AD9257_VREF_2_0_VAL) +#define AD9257_VREF_1_0_VAL ((0x0 << AD9257_VREF_OFST) & AD9257_VREF_MSK) +#define AD9257_VREF_1_14_VAL ((0x1 << AD9257_VREF_OFST) & AD9257_VREF_MSK) +#define AD9257_VREF_1_33_VAL ((0x2 << AD9257_VREF_OFST) & AD9257_VREF_MSK) +#define AD9257_VREF_1_6_VAL ((0x3 << AD9257_VREF_OFST) & AD9257_VREF_MSK) +#define AD9257_VREF_2_0_VAL ((0x4 << AD9257_VREF_OFST) & AD9257_VREF_MSK) // defines from the fpga uint32_t AD9257_Reg = 0x0; @@ -133,7 +170,8 @@ uint32_t AD9257_DigMask = 0x0; int AD9257_DigOffset = 0x0; int AD9257_VrefVoltage = 0; -void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst) { +void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, + uint32_t dmsk, int dofst) { AD9257_Reg = reg; AD9257_CsMask = cmsk; AD9257_ClkMask = clkmsk; @@ -142,137 +180,138 @@ void AD9257_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dm } void AD9257_Disable() { - bus_w(AD9257_Reg, (bus_r(AD9257_Reg) - | AD9257_CsMask - | AD9257_ClkMask) - & ~(AD9257_DigMask)); + bus_w(AD9257_Reg, (bus_r(AD9257_Reg) | AD9257_CsMask | AD9257_ClkMask) & + ~(AD9257_DigMask)); } int AD9257_GetVrefVoltage(int mV) { - if (mV == 0) - return AD9257_VrefVoltage; - switch(AD9257_VrefVoltage) { - case 0: - return 1000; - case 1: - return 1140; - case 2: - return 1330; - case 3: - return 1600; - case 4: - return 2000; - default: - LOG(logERROR, ("Could not convert Adc Vpp from mode to mV\n")); - return -1; - } + if (mV == 0) + return AD9257_VrefVoltage; + switch (AD9257_VrefVoltage) { + case 0: + return 1000; + case 1: + return 1140; + case 2: + return 1330; + case 3: + return 1600; + case 4: + return 2000; + default: + LOG(logERROR, ("Could not convert Adc Vpp from mode to mV\n")); + return -1; + } } int AD9257_SetVrefVoltage(int val, int mV) { - int mode = val; - // convert to mode - if (mV) { - switch(val) { - case 1000: - mode = 0; - break; - case 1140: - mode = 1; - break; - case 1330: - mode = 2; - break; - case 1600: - mode = 3; - break; - case 2000: - mode = 4; - break; - // validation for mV - default: - LOG(logERROR, ("mv:%d doesnt exist\n", val)); - return FAIL; - } - } + int mode = val; + // convert to mode + if (mV) { + switch (val) { + case 1000: + mode = 0; + break; + case 1140: + mode = 1; + break; + case 1330: + mode = 2; + break; + case 1600: + mode = 3; + break; + case 2000: + mode = 4; + break; + // validation for mV + default: + LOG(logERROR, ("mv:%d doesnt exist\n", val)); + return FAIL; + } + } - // validation for mode - switch(mode) { - case 0: - LOG(logINFO, ("Setting ADC Vref to 1.0 V (Mode:%d)\n", mode)); - break; - case 1: - LOG(logINFO, ("Setting ADC Vref to 1.14 V (Mode:%d)\n", mode)); - break; - case 2: - LOG(logINFO, ("Setting ADC Vref to 1.33 V (Mode:%d)\n", mode)); - break; - case 3: - LOG(logINFO, ("Setting ADC Vref to 1.6 V (Mode:%d)\n", mode)); - break; - case 4: - LOG(logINFO, ("Setting ADC Vref to 2.0 V (Mode:%d)\n", mode)); - break; - default: - return FAIL; - } - // set vref voltage + // validation for mode + switch (mode) { + case 0: + LOG(logINFO, ("Setting ADC Vref to 1.0 V (Mode:%d)\n", mode)); + break; + case 1: + LOG(logINFO, ("Setting ADC Vref to 1.14 V (Mode:%d)\n", mode)); + break; + case 2: + LOG(logINFO, ("Setting ADC Vref to 1.33 V (Mode:%d)\n", mode)); + break; + case 3: + LOG(logINFO, ("Setting ADC Vref to 1.6 V (Mode:%d)\n", mode)); + break; + case 4: + LOG(logINFO, ("Setting ADC Vref to 2.0 V (Mode:%d)\n", mode)); + break; + default: + return FAIL; + } + // set vref voltage AD9257_Set(AD9257_VREF_REG, mode); - AD9257_VrefVoltage = mode; - return OK; + AD9257_VrefVoltage = mode; + return OK; } void AD9257_Set(int addr, int val) { - u_int32_t codata; - codata = val + (addr << 8); - LOG(logINFO, ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr)); - serializeToSPI(AD9257_Reg, codata, AD9257_CsMask, AD9257_ADC_NUMBITS, - AD9257_ClkMask, AD9257_DigMask, AD9257_DigOffset, 0); + u_int32_t codata; + codata = val + (addr << 8); + LOG(logINFO, + ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr)); + serializeToSPI(AD9257_Reg, codata, AD9257_CsMask, AD9257_ADC_NUMBITS, + AD9257_ClkMask, AD9257_DigMask, AD9257_DigOffset, 0); } -void AD9257_Configure(){ +void AD9257_Configure() { LOG(logINFOBLUE, ("Configuring ADC9257:\n")); - //power mode reset + // power mode reset LOG(logINFO, ("\tPower mode reset\n")); AD9257_Set(AD9257_POWER_MODE_REG, AD9257_INT_RESET_VAL); - //power mode chip run - LOG(logINFO, ("\tPower mode chip run\n")); - AD9257_Set(AD9257_POWER_MODE_REG, AD9257_INT_CHIP_RUN_VAL); + // power mode chip run + LOG(logINFO, ("\tPower mode chip run\n")); + AD9257_Set(AD9257_POWER_MODE_REG, AD9257_INT_CHIP_RUN_VAL); - // binary offset, lvds-iee reduced + // binary offset, lvds-iee reduced LOG(logINFO, ("\tBinary offset, Lvds-ieee reduced\n")); - AD9257_Set(AD9257_OUT_MODE_REG, AD9257_OUT_BINARY_OFST_VAL | AD9257_OUT_LVDS_IEEE_VAL); + AD9257_Set(AD9257_OUT_MODE_REG, + AD9257_OUT_BINARY_OFST_VAL | AD9257_OUT_LVDS_IEEE_VAL); - //output clock phase + // output clock phase LOG(logINFO, ("\tOutput clock phase: 180\n")); - AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_180_VAL); + AD9257_Set(AD9257_OUT_PHASE_REG, AD9257_OUT_CLK_180_VAL); - // all devices on chip to receive next command - LOG(logINFO, ("\tAll devices on chip to receive next command\n")); - AD9257_Set(AD9257_DEV_IND_2_REG, - AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK); + // all devices on chip to receive next command + LOG(logINFO, ("\tAll devices on chip to receive next command\n")); + AD9257_Set(AD9257_DEV_IND_2_REG, AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | + AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK); - AD9257_Set(AD9257_DEV_IND_1_REG, - AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK | - AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK); + AD9257_Set(AD9257_DEV_IND_1_REG, AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | + AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK | + AD9257_CLK_CH_DCO_MSK | + AD9257_CLK_CH_IFCO_MSK); - // vref + // vref #ifdef GOTTHARDD - LOG(logINFO, ("\tVref default at 2.0\n")); - AD9257_SetVrefVoltage(AD9257_VREF_DEFAULT_VAL, 0); + LOG(logINFO, ("\tVref default at 2.0\n")); + AD9257_SetVrefVoltage(AD9257_VREF_DEFAULT_VAL, 0); #else - LOG(logINFO, ("\tVref 1.33\n")); - AD9257_SetVrefVoltage(AD9257_VREF_1_33_VAL, 0); + LOG(logINFO, ("\tVref 1.33\n")); + AD9257_SetVrefVoltage(AD9257_VREF_1_33_VAL, 0); #endif - // no test mode - LOG(logINFO, ("\tNo test mode\n")); - AD9257_Set(AD9257_TEST_MODE_REG, AD9257_TST_OFF_VAL); + // no test mode + LOG(logINFO, ("\tNo test mode\n")); + AD9257_Set(AD9257_TEST_MODE_REG, AD9257_TST_OFF_VAL); #ifdef TESTADC - LOG(logINFOBLUE, ("Putting ADC in Test Mode!\n"); + LOG(logINFOBLUE, ("Putting ADC in Test Mode!\n"); // mixed bit frequency test mode LOG(logINFO, ("\tMixed bit frequency test mode\n")); AD9257_Set(AD9257_TEST_MODE_REG, AD9257_TST_MXD_BT_FRQ_VAL); diff --git a/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL.c b/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL.c old mode 100755 new mode 100644 index acb192442..dab4a66cc --- a/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL.c +++ b/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL.c @@ -1,78 +1,124 @@ #include "ALTERA_PLL.h" -#include "clogger.h" #include "blackfin.h" +#include "clogger.h" -#include // usleep +#include // usleep /* Altera PLL DEFINES */ /** PLL Reconfiguration Registers */ -//https://www.altera.com/documentation/mcn1424769382940.html -#define ALTERA_PLL_MODE_REG (0x00) +// https://www.altera.com/documentation/mcn1424769382940.html +#define ALTERA_PLL_MODE_REG (0x00) -#define ALTERA_PLL_MODE_WT_RQUST_VAL (0) -#define ALTERA_PLL_MODE_PLLNG_MD_VAL (1) +#define ALTERA_PLL_MODE_WT_RQUST_VAL (0) +#define ALTERA_PLL_MODE_PLLNG_MD_VAL (1) -#define ALTERA_PLL_STATUS_REG (0x01) -#define ALTERA_PLL_START_REG (0x02) -#define ALTERA_PLL_N_COUNTER_REG (0x03) -#define ALTERA_PLL_M_COUNTER_REG (0x04) -#define ALTERA_PLL_C_COUNTER_REG (0x05) +#define ALTERA_PLL_STATUS_REG (0x01) +#define ALTERA_PLL_START_REG (0x02) +#define ALTERA_PLL_N_COUNTER_REG (0x03) +#define ALTERA_PLL_M_COUNTER_REG (0x04) +#define ALTERA_PLL_C_COUNTER_REG (0x05) -#define ALTERA_PLL_C_COUNTER_LW_CNT_OFST (0) -#define ALTERA_PLL_C_COUNTER_LW_CNT_MSK (0x000000FF << ALTERA_PLL_C_COUNTER_LW_CNT_OFST) -#define ALTERA_PLL_C_COUNTER_HGH_CNT_OFST (8) -#define ALTERA_PLL_C_COUNTER_HGH_CNT_MSK (0x000000FF << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST) +#define ALTERA_PLL_C_COUNTER_LW_CNT_OFST (0) +#define ALTERA_PLL_C_COUNTER_LW_CNT_MSK \ + (0x000000FF << ALTERA_PLL_C_COUNTER_LW_CNT_OFST) +#define ALTERA_PLL_C_COUNTER_HGH_CNT_OFST (8) +#define ALTERA_PLL_C_COUNTER_HGH_CNT_MSK \ + (0x000000FF << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST) /* total_div = lw_cnt + hgh_cnt */ -#define ALTERA_PLL_C_COUNTER_BYPSS_ENBL_OFST (16) -#define ALTERA_PLL_C_COUNTER_BYPSS_ENBL_MSK (0x00000001 << ALTERA_PLL_C_COUNTER_BYPSS_ENBL_OFST) -/* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is bypassed) */ -#define ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST (17) -#define ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK (0x00000001 << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST) -/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle = (hgh_cnt - 0.5) / total_div */ -#define ALTERA_PLL_C_COUNTER_SLCT_OFST (18) -#define ALTERA_PLL_C_COUNTER_SLCT_MSK (0x0000001F << ALTERA_PLL_C_COUNTER_SLCT_OFST) +#define ALTERA_PLL_C_COUNTER_BYPSS_ENBL_OFST (16) +#define ALTERA_PLL_C_COUNTER_BYPSS_ENBL_MSK \ + (0x00000001 << ALTERA_PLL_C_COUNTER_BYPSS_ENBL_OFST) +/* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is + * bypassed) */ +#define ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST (17) +#define ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK \ + (0x00000001 << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST) +/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle = + * (hgh_cnt - 0.5) / total_div */ +#define ALTERA_PLL_C_COUNTER_SLCT_OFST (18) +#define ALTERA_PLL_C_COUNTER_SLCT_MSK \ + (0x0000001F << ALTERA_PLL_C_COUNTER_SLCT_OFST) -#define ALTERA_PLL_PHASE_SHIFT_REG (0x06) +#define ALTERA_PLL_PHASE_SHIFT_REG (0x06) -#define ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST (0) -#define ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK (0x0000FFFF << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST) +#define ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST (0) +#define ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK \ + (0x0000FFFF << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST) -#define ALTERA_PLL_SHIFT_CNT_SELECT_OFST (16) -#define ALTERA_PLL_SHIFT_CNT_SELECT_MSK (0x0000001F << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C0_VAL ((0x0 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C1_VAL ((0x1 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C2_VAL ((0x2 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C3_VAL ((0x3 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C4_VAL ((0x4 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C5_VAL ((0x5 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C6_VAL ((0x6 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C7_VAL ((0x7 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C8_VAL ((0x8 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C9_VAL ((0x9 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C10_VAL ((0x10 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C11_VAL ((0x11 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C12_VAL ((0x12 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C13_VAL ((0x13 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C14_VAL ((0x14 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C15_VAL ((0x15 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C16_VAL ((0x16 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_CNT_SLCT_C17_VAL ((0x17 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SELECT_OFST (16) +#define ALTERA_PLL_SHIFT_CNT_SELECT_MSK \ + (0x0000001F << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C0_VAL \ + ((0x0 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C1_VAL \ + ((0x1 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C2_VAL \ + ((0x2 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C3_VAL \ + ((0x3 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C4_VAL \ + ((0x4 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C5_VAL \ + ((0x5 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C6_VAL \ + ((0x6 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C7_VAL \ + ((0x7 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C8_VAL \ + ((0x8 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C9_VAL \ + ((0x9 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C10_VAL \ + ((0x10 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C11_VAL \ + ((0x11 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C12_VAL \ + ((0x12 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C13_VAL \ + ((0x13 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C14_VAL \ + ((0x14 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C15_VAL \ + ((0x15 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C16_VAL \ + ((0x16 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) +#define ALTERA_PLL_SHIFT_CNT_SLCT_C17_VAL \ + ((0x17 << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & \ + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) -#define ALTERA_PLL_SHIFT_UP_DOWN_OFST (21) -#define ALTERA_PLL_SHIFT_UP_DOWN_MSK (0x00000001 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) -#define ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL ((0x0 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK) -#define ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL ((0x1 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK) +#define ALTERA_PLL_SHIFT_UP_DOWN_OFST (21) +#define ALTERA_PLL_SHIFT_UP_DOWN_MSK \ + (0x00000001 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) +#define ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL \ + ((0x0 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK) +#define ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL \ + ((0x1 << ALTERA_PLL_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_SHIFT_UP_DOWN_MSK) -#define ALTERA_PLL_K_COUNTER_REG (0x07) -#define ALTERA_PLL_BANDWIDTH_REG (0x08) -#define ALTERA_PLL_CHARGEPUMP_REG (0x09) -#define ALTERA_PLL_VCO_DIV_REG (0x1c) -#define ALTERA_PLL_MIF_REG (0x1f) - - -#define ALTERA_PLL_WAIT_TIME_US (10 * 1000) +#define ALTERA_PLL_K_COUNTER_REG (0x07) +#define ALTERA_PLL_BANDWIDTH_REG (0x08) +#define ALTERA_PLL_CHARGEPUMP_REG (0x09) +#define ALTERA_PLL_VCO_DIV_REG (0x1c) +#define ALTERA_PLL_MIF_REG (0x1f) +#define ALTERA_PLL_WAIT_TIME_US (10 * 1000) // defines from the fpga uint32_t ALTERA_PLL_Cntrl_Reg = 0x0; @@ -89,7 +135,9 @@ uint32_t ALTERA_PLL_Cntrl_AddrMask = 0x0; int ALTERA_PLL_Cntrl_AddrOfst = 0; #ifdef JUNGFRAUD -void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, int aofst, uint32_t wd2msk, int clk2Index) { +void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, + uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, + int aofst, uint32_t wd2msk, int clk2Index) { ALTERA_PLL_Cntrl_Reg = creg; ALTERA_PLL_Param_Reg = preg; ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask = rprmsk; @@ -101,7 +149,9 @@ void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32 ALTERA_PLL_Cntrl_DBIT_ClkIndex = clk2Index; } #else -void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, int aofst) { +void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, + uint32_t wpmsk, uint32_t prmsk, uint32_t amsk, + int aofst) { ALTERA_PLL_Cntrl_Reg = creg; ALTERA_PLL_Param_Reg = preg; ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask = rprmsk; @@ -112,31 +162,41 @@ void ALTERA_PLL_SetDefines(uint32_t creg, uint32_t preg, uint32_t rprmsk, uint32 } #endif -void ALTERA_PLL_ResetPLL () { +void ALTERA_PLL_ResetPLL() { LOG(logINFO, ("Resetting only PLL\n")); LOG(logDEBUG2, ("pllrstmsk:0x%x\n", ALTERA_PLL_Cntrl_PLLRstMask)); - bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | ALTERA_PLL_Cntrl_PLLRstMask); - LOG(logDEBUG2, ("Set PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg))); + bus_w(ALTERA_PLL_Cntrl_Reg, + bus_r(ALTERA_PLL_Cntrl_Reg) | ALTERA_PLL_Cntrl_PLLRstMask); + LOG(logDEBUG2, ("Set PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n", + bus_r(ALTERA_PLL_Cntrl_Reg))); usleep(ALTERA_PLL_WAIT_TIME_US); - bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & ~ALTERA_PLL_Cntrl_PLLRstMask); - LOG(logDEBUG2, ("UnSet PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg))); - + bus_w(ALTERA_PLL_Cntrl_Reg, + bus_r(ALTERA_PLL_Cntrl_Reg) & ~ALTERA_PLL_Cntrl_PLLRstMask); + LOG(logDEBUG2, ("UnSet PLL Reset mSk: ALTERA_PLL_Cntrl_Reg:0x%x\n", + bus_r(ALTERA_PLL_Cntrl_Reg))); } -void ALTERA_PLL_ResetPLLAndReconfiguration () { +void ALTERA_PLL_ResetPLLAndReconfiguration() { LOG(logINFO, ("Resetting PLL and Reconfiguration\n")); - bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask | ALTERA_PLL_Cntrl_PLLRstMask); + bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | + ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask | + ALTERA_PLL_Cntrl_PLLRstMask); usleep(ALTERA_PLL_WAIT_TIME_US); - bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & ~ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask & ~ALTERA_PLL_Cntrl_PLLRstMask); + bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & + ~ALTERA_PLL_Cntrl_RcnfgPrmtrRstMask & + ~ALTERA_PLL_Cntrl_PLLRstMask); } -void ALTERA_PLL_SetPllReconfigReg(uint32_t reg, uint32_t val, int useSecondWRMask) { - LOG(logDEBUG1, ("Setting PLL Reconfig Reg, reg:0x%x, val:0x%x, useSecondWRMask:%d)\n", reg, val, useSecondWRMask)); +void ALTERA_PLL_SetPllReconfigReg(uint32_t reg, uint32_t val, + int useSecondWRMask) { + LOG(logDEBUG1, + ("Setting PLL Reconfig Reg, reg:0x%x, val:0x%x, useSecondWRMask:%d)\n", + reg, val, useSecondWRMask)); uint32_t wrmask = ALTERA_PLL_Cntrl_WrPrmtrMask; #ifdef JUNGFRAUD @@ -145,36 +205,47 @@ void ALTERA_PLL_SetPllReconfigReg(uint32_t reg, uint32_t val, int useSecondWRMas } #endif - LOG(logDEBUG2, ("pllparamreg:0x%x pllcontrolreg:0x%x addrofst:%d addrmsk:0x%x wrmask:0x%x\n", - ALTERA_PLL_Param_Reg, ALTERA_PLL_Cntrl_Reg, ALTERA_PLL_Cntrl_AddrOfst, ALTERA_PLL_Cntrl_AddrMask, wrmask)); + LOG(logDEBUG2, + ("pllparamreg:0x%x pllcontrolreg:0x%x addrofst:%d addrmsk:0x%x " + "wrmask:0x%x\n", + ALTERA_PLL_Param_Reg, ALTERA_PLL_Cntrl_Reg, ALTERA_PLL_Cntrl_AddrOfst, + ALTERA_PLL_Cntrl_AddrMask, wrmask)); // set parameter bus_w(ALTERA_PLL_Param_Reg, val); - LOG(logDEBUG2, ("Set Parameter: ALTERA_PLL_Param_Reg:0x%x\n", bus_r(ALTERA_PLL_Param_Reg))); + LOG(logDEBUG2, ("Set Parameter: ALTERA_PLL_Param_Reg:0x%x\n", + bus_r(ALTERA_PLL_Param_Reg))); usleep(ALTERA_PLL_WAIT_TIME_US); // set address - bus_w(ALTERA_PLL_Cntrl_Reg, (reg << ALTERA_PLL_Cntrl_AddrOfst) & ALTERA_PLL_Cntrl_AddrMask); - LOG(logDEBUG2, ("Set Address: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg))); + bus_w(ALTERA_PLL_Cntrl_Reg, + (reg << ALTERA_PLL_Cntrl_AddrOfst) & ALTERA_PLL_Cntrl_AddrMask); + LOG(logDEBUG2, ("Set Address: ALTERA_PLL_Cntrl_Reg:0x%x\n", + bus_r(ALTERA_PLL_Cntrl_Reg))); usleep(ALTERA_PLL_WAIT_TIME_US); - //write parameter + // write parameter bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) | wrmask); - LOG(logDEBUG2, ("Set WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg))); + LOG(logDEBUG2, ("Set WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n", + bus_r(ALTERA_PLL_Cntrl_Reg))); usleep(ALTERA_PLL_WAIT_TIME_US); bus_w(ALTERA_PLL_Cntrl_Reg, bus_r(ALTERA_PLL_Cntrl_Reg) & ~wrmask); - LOG(logDEBUG2, ("Unset WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n", bus_r(ALTERA_PLL_Cntrl_Reg))); + LOG(logDEBUG2, ("Unset WR bit: ALTERA_PLL_Cntrl_Reg:0x%x\n", + bus_r(ALTERA_PLL_Cntrl_Reg))); usleep(ALTERA_PLL_WAIT_TIME_US); } void ALTERA_PLL_SetPhaseShift(int32_t phase, int clkIndex, int pos) { LOG(logINFO, ("\tWriting PLL Phase Shift\n")); - uint32_t value = (((phase << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST) & ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK) | - ((clkIndex << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & ALTERA_PLL_SHIFT_CNT_SELECT_MSK) | - (pos ? ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL : ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL)); + uint32_t value = (((phase << ALTERA_PLL_SHIFT_NUM_SHIFTS_OFST) & + ALTERA_PLL_SHIFT_NUM_SHIFTS_MSK) | + ((clkIndex << ALTERA_PLL_SHIFT_CNT_SELECT_OFST) & + ALTERA_PLL_SHIFT_CNT_SELECT_MSK) | + (pos ? ALTERA_PLL_SHIFT_UP_DOWN_POS_VAL + : ALTERA_PLL_SHIFT_UP_DOWN_NEG_VAL)); LOG(logDEBUG1, ("C%d phase word:0x%08x\n", clkIndex, value)); @@ -186,19 +257,22 @@ void ALTERA_PLL_SetPhaseShift(int32_t phase, int clkIndex, int pos) { #endif // write phase shift - ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_PHASE_SHIFT_REG, value, useSecondWR); + ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_PHASE_SHIFT_REG, value, + useSecondWR); } void ALTERA_PLL_SetModePolling() { LOG(logINFO, ("\tSetting Polling Mode\n")); - ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_MODE_REG, ALTERA_PLL_MODE_PLLNG_MD_VAL, 0); + ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_MODE_REG, + ALTERA_PLL_MODE_PLLNG_MD_VAL, 0); } -int ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value) { - LOG(logDEBUG1, ("C%d: Setting output frequency to %d (pllvcofreq: %dMhz)\n", clkIndex, value, pllVCOFreqMhz)); +int ALTERA_PLL_SetOuputFrequency(int clkIndex, int pllVCOFreqMhz, int value) { + LOG(logDEBUG1, ("C%d: Setting output frequency to %d (pllvcofreq: %dMhz)\n", + clkIndex, value, pllVCOFreqMhz)); // calculate output frequency - float total_div = (float)pllVCOFreqMhz / (float)value; + float total_div = (float)pllVCOFreqMhz / (float)value; // assume 50% duty cycle uint32_t low_count = total_div / 2; @@ -210,28 +284,32 @@ int ALTERA_PLL_SetOuputFrequency (int clkIndex, int pllVCOFreqMhz, int value) { ++high_count; odd_division = 1; } - LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count, high_count, odd_division)); + LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count, + high_count, odd_division)); // command to set output frequency - uint32_t val = (((low_count << ALTERA_PLL_C_COUNTER_LW_CNT_OFST) & ALTERA_PLL_C_COUNTER_LW_CNT_MSK) | - ((high_count << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST) & ALTERA_PLL_C_COUNTER_HGH_CNT_MSK) | - ((odd_division << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST) & ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK) | - ((clkIndex << ALTERA_PLL_C_COUNTER_SLCT_OFST) & ALTERA_PLL_C_COUNTER_SLCT_MSK)); + uint32_t val = (((low_count << ALTERA_PLL_C_COUNTER_LW_CNT_OFST) & + ALTERA_PLL_C_COUNTER_LW_CNT_MSK) | + ((high_count << ALTERA_PLL_C_COUNTER_HGH_CNT_OFST) & + ALTERA_PLL_C_COUNTER_HGH_CNT_MSK) | + ((odd_division << ALTERA_PLL_C_COUNTER_ODD_DVSN_OFST) & + ALTERA_PLL_C_COUNTER_ODD_DVSN_MSK) | + ((clkIndex << ALTERA_PLL_C_COUNTER_SLCT_OFST) & + ALTERA_PLL_C_COUNTER_SLCT_MSK)); LOG(logDEBUG1, ("C%d word:0x%08x\n", clkIndex, val)); // write frequency (post-scale output counter C) ALTERA_PLL_SetPllReconfigReg(ALTERA_PLL_C_COUNTER_REG, val, 0); - // reset required to keep the phase (must reconfigure adcs again after this as adc clock is stopped temporarily when resetting pll) - ALTERA_PLL_ResetPLL (); + // reset required to keep the phase (must reconfigure adcs again after this + // as adc clock is stopped temporarily when resetting pll) + ALTERA_PLL_ResetPLL(); /*double temp = ((double)pllVCOFreqMhz / (double)(low_count + high_count)); - if ((temp - (int)temp) > 0.0001) { - temp += 0.5; - } - return (int)temp; - */ - return value; + if ((temp - (int)temp) > 0.0001) { + temp += 0.5; + } + return (int)temp; + */ + return value; } - - diff --git a/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c b/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c old mode 100755 new mode 100644 index 518bc9924..13ddf9fa3 --- a/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c +++ b/slsDetectorServers/slsDetectorServer/src/ALTERA_PLL_CYCLONE10.c @@ -3,46 +3,55 @@ #include "nios.h" #include "sls_detector_defs.h" -#include // usleep +#include // usleep /* Altera PLL CYCLONE 10 DEFINES */ /** PLL Reconfiguration Registers */ // https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an728.pdf - // c counter (C0-C8 (+1 to base address)) -#define ALTERA_PLL_C10_C_COUNTER_BASE_REG (0x0C0) +#define ALTERA_PLL_C10_C_COUNTER_BASE_REG (0x0C0) -#define ALTERA_PLL_C10_C_COUNTER_MAX_DIVIDER_VAL (512) -#define ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST (0) -#define ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK (0x000000FF << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST) -#define ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST (8) -#define ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK (0x000000FF << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST) +#define ALTERA_PLL_C10_C_COUNTER_MAX_DIVIDER_VAL (512) +#define ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST (0) +#define ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK \ + (0x000000FF << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST) +#define ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST (8) +#define ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK \ + (0x000000FF << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST) /* total_div = lw_cnt + hgh_cnt */ -#define ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_OFST (16) -#define ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_MSK (0x00000001 << ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_OFST) -/* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is bypassed) */ -#define ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST (17) -#define ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK (0x00000001 << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST) -/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle = (hgh_cnt - 0.5) / total_div */ - +#define ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_OFST (16) +#define ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_MSK \ + (0x00000001 << ALTERA_PLL_C10_C_COUNTER_BYPSS_ENBL_OFST) +/* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is + * bypassed) */ +#define ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST (17) +#define ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK \ + (0x00000001 << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST) +/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle = + * (hgh_cnt - 0.5) / total_div */ // dynamic phase shift (C0-C8 (+1 to base address), 0xF for all counters) -#define ALTERA_PLL_C10_PHASE_SHIFT_BASE_REG (0x100) +#define ALTERA_PLL_C10_PHASE_SHIFT_BASE_REG (0x100) -#define ALTERA_PLL_C10_MAX_SHIFTS_PER_OPERATION (7) -#define ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST (0) -#define ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK (0x00000007 << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST) +#define ALTERA_PLL_C10_MAX_SHIFTS_PER_OPERATION (7) +#define ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST (0) +#define ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK \ + (0x00000007 << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST) -#define ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST (3) -#define ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK (0x00000001 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) -#define ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL ((0x0 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK) -#define ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL ((0x1 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK) - -#define ALTERA_PLL_C10_PHASE_SHIFT_STEP_OF_VCO (8) -#define ALTERA_PLL_C10_WAIT_TIME_US (1 * 1000) // 1 ms +#define ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST (3) +#define ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK \ + (0x00000001 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) +#define ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL \ + ((0x0 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & \ + ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK) +#define ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL \ + ((0x1 << ALTERA_PLL_C10_SHIFT_UP_DOWN_OFST) & \ + ALTERA_PLL_C10_SHIFT_UP_DOWN_MSK) +#define ALTERA_PLL_C10_PHASE_SHIFT_STEP_OF_VCO (8) +#define ALTERA_PLL_C10_WAIT_TIME_US (1 * 1000) // 1 ms int ALTERA_PLL_C10_Reg_offset = 0x0; const int ALTERA_PLL_C10_NUM = 2; @@ -51,7 +60,10 @@ uint32_t ALTERA_PLL_C10_Reset_Reg[2] = {0x0, 0x0}; uint32_t ALTERA_PLL_C10_Reset_Msk[2] = {0x0, 0x0}; int ALTERA_PLL_C10_VCO_FREQ[2] = {0, 0}; -void ALTERA_PLL_C10_SetDefines(int regofst, uint32_t baseaddr0, uint32_t baseaddr1, uint32_t resetreg0, uint32_t resetreg1, uint32_t resetmsk0, uint32_t resetmsk1, int vcofreq0, int vcofreq1) { +void ALTERA_PLL_C10_SetDefines(int regofst, uint32_t baseaddr0, + uint32_t baseaddr1, uint32_t resetreg0, + uint32_t resetreg1, uint32_t resetmsk0, + uint32_t resetmsk1, int vcofreq0, int vcofreq1) { ALTERA_PLL_C10_Reg_offset = regofst; ALTERA_PLL_C10_BaseAddress[0] = baseaddr0; ALTERA_PLL_C10_BaseAddress[1] = baseaddr1; @@ -68,7 +80,7 @@ int ALTERA_PLL_C10_GetMaxClockDivider() { } int ALTERA_PLL_C10_GetVCOFrequency(int pllIndex) { - return ALTERA_PLL_C10_VCO_FREQ[pllIndex]; + return ALTERA_PLL_C10_VCO_FREQ[pllIndex]; } int ALTERA_PLL_C10_GetMaxPhaseShiftStepsofVCO() { @@ -79,42 +91,52 @@ void ALTERA_PLL_C10_Reconfigure(int pllIndex) { LOG(logINFO, ("\tReconfiguring PLL %d\n", pllIndex)); // write anything to base address to start reconfiguring - LOG(logDEBUG1, ("\tWriting 1 to base address 0x%x to start reconfiguring\n", ALTERA_PLL_C10_BaseAddress[pllIndex])); + LOG(logDEBUG1, ("\tWriting 1 to base address 0x%x to start reconfiguring\n", + ALTERA_PLL_C10_BaseAddress[pllIndex])); bus_w_csp1(ALTERA_PLL_C10_BaseAddress[pllIndex], 0x1); usleep(ALTERA_PLL_C10_WAIT_TIME_US); } -void ALTERA_PLL_C10_ResetPLL (int pllIndex) { +void ALTERA_PLL_C10_ResetPLL(int pllIndex) { uint32_t resetreg = ALTERA_PLL_C10_Reset_Reg[pllIndex]; uint32_t resetmsk = ALTERA_PLL_C10_Reset_Msk[pllIndex]; LOG(logINFO, ("Resetting PLL %d\n", pllIndex)); bus_w_csp1(resetreg, bus_r_csp1(resetreg) | resetmsk); - usleep(ALTERA_PLL_C10_WAIT_TIME_US); + usleep(ALTERA_PLL_C10_WAIT_TIME_US); } +void ALTERA_PLL_C10_SetPhaseShift(int pllIndex, int clkIndex, int phase, + int pos) { + LOG(logINFO, ("\tC%d: Writing PLL %d Phase Shift [phase:%d, pos dir:%d]\n", + clkIndex, pllIndex, phase, pos)); -void ALTERA_PLL_C10_SetPhaseShift(int pllIndex, int clkIndex, int phase, int pos) { - LOG(logINFO, ("\tC%d: Writing PLL %d Phase Shift [phase:%d, pos dir:%d]\n", clkIndex, pllIndex, phase, pos)); - - uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] + (ALTERA_PLL_C10_PHASE_SHIFT_BASE_REG + (int)clkIndex) * ALTERA_PLL_C10_Reg_offset; + uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] + + (ALTERA_PLL_C10_PHASE_SHIFT_BASE_REG + (int)clkIndex) * + ALTERA_PLL_C10_Reg_offset; int maxshifts = ALTERA_PLL_C10_MAX_SHIFTS_PER_OPERATION; // only 7 shifts at a time while (phase > 0) { int phaseToDo = (phase > maxshifts) ? maxshifts : phase; - uint32_t value = (((phaseToDo << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST) & ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK) | - (pos ? ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL : ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL)); - LOG(logDEBUG1, ("\t[addr:0x%x, phaseTodo:%d phaseleft:%d phase word:0x%08x]\n", addr, phaseToDo, phase, value)); + uint32_t value = (((phaseToDo << ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_OFST) & + ALTERA_PLL_C10_SHIFT_NUM_SHIFTS_MSK) | + (pos ? ALTERA_PLL_C10_SHIFT_UP_DOWN_POS_VAL + : ALTERA_PLL_C10_SHIFT_UP_DOWN_NEG_VAL)); + LOG(logDEBUG1, + ("\t[addr:0x%x, phaseTodo:%d phaseleft:%d phase word:0x%08x]\n", + addr, phaseToDo, phase, value)); bus_w_csp1(addr, value); - + ALTERA_PLL_C10_Reconfigure(pllIndex); phase -= phaseToDo; } } -void ALTERA_PLL_C10_SetOuputClockDivider (int pllIndex, int clkIndex, int value) { - LOG(logDEBUG1, ("\tC%d: Setting output clock divider for pll%d to %d\n", clkIndex, pllIndex, value)); +void ALTERA_PLL_C10_SetOuputClockDivider(int pllIndex, int clkIndex, + int value) { + LOG(logDEBUG1, ("\tC%d: Setting output clock divider for pll%d to %d\n", + clkIndex, pllIndex, value)); // assume 50% duty cycle uint32_t low_count = value / 2; @@ -126,20 +148,26 @@ void ALTERA_PLL_C10_SetOuputClockDivider (int pllIndex, int clkIndex, int value) ++high_count; odd_division = 1; } - LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count, high_count, odd_division)); + LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", clkIndex, low_count, + high_count, odd_division)); // command to set output frequency - uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] + (ALTERA_PLL_C10_C_COUNTER_BASE_REG + (int)clkIndex) * ALTERA_PLL_C10_Reg_offset; - uint32_t val = (((low_count << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST) & ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK) | - ((high_count << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST) & ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK) | - ((odd_division << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST) & ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK)); + uint32_t addr = ALTERA_PLL_C10_BaseAddress[pllIndex] + + (ALTERA_PLL_C10_C_COUNTER_BASE_REG + (int)clkIndex) * + ALTERA_PLL_C10_Reg_offset; + uint32_t val = (((low_count << ALTERA_PLL_C10_C_COUNTER_LW_CNT_OFST) & + ALTERA_PLL_C10_C_COUNTER_LW_CNT_MSK) | + ((high_count << ALTERA_PLL_C10_C_COUNTER_HGH_CNT_OFST) & + ALTERA_PLL_C10_C_COUNTER_HGH_CNT_MSK) | + ((odd_division << ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_OFST) & + ALTERA_PLL_C10_C_COUNTER_ODD_DVSN_MSK)); LOG(logDEBUG1, ("\t[addr:0x%x, word:0x%08x]\n", addr, val)); - // write frequency + // write frequency bus_w_csp1(addr, val); ALTERA_PLL_C10_Reconfigure(pllIndex); - // reset required to keep the phase relationships - ALTERA_PLL_C10_ResetPLL (pllIndex); + // reset required to keep the phase relationships + ALTERA_PLL_C10_ResetPLL(pllIndex); } diff --git a/slsDetectorServers/slsDetectorServer/src/ASIC_Driver.c b/slsDetectorServers/slsDetectorServer/src/ASIC_Driver.c old mode 100755 new mode 100644 index af5da114a..a92084cd6 --- a/slsDetectorServers/slsDetectorServer/src/ASIC_Driver.c +++ b/slsDetectorServers/slsDetectorServer/src/ASIC_Driver.c @@ -3,36 +3,36 @@ #include "common.h" #include "sls_detector_defs.h" +#include #include #include #include -#include -#include -#include #include -#include -#include #include +#include +#include +#include +#include // defines from the fpga char ASIC_Driver_DriverFileName[MAX_STR_LENGTH]; - -void ASIC_Driver_SetDefines(char* driverfname) { +void ASIC_Driver_SetDefines(char *driverfname) { LOG(logINFOBLUE, ("Configuring ASIC Driver to %s\n", driverfname)); memset(ASIC_Driver_DriverFileName, 0, MAX_STR_LENGTH); strcpy(ASIC_Driver_DriverFileName, driverfname); } -int ASIC_Driver_Set (int index, int length, char* buffer) { +int ASIC_Driver_Set(int index, int length, char *buffer) { char temp[20]; memset(temp, 0, sizeof(temp)); sprintf(temp, "%d", index + 1); char fname[MAX_STR_LENGTH]; strcpy(fname, ASIC_Driver_DriverFileName); strcat(fname, temp); - LOG(logDEBUG2, ("\t[chip index: %d, length: %d, fname: %s]\n", index, length, fname)); + LOG(logDEBUG2, + ("\t[chip index: %d, length: %d, fname: %s]\n", index, length, fname)); { LOG(logDEBUG2, ("\t[values: \n")); int i; @@ -41,19 +41,21 @@ int ASIC_Driver_Set (int index, int length, char* buffer) { } LOG(logDEBUG2, ("\t]\n")); } - + #ifndef VIRTUAL - int fd=open(fname, O_RDWR); + int fd = open(fname, O_RDWR); if (fd == -1) { - LOG(logERROR, ("Could not open file %s for writing to control ASIC (%d)\n", fname, index)); + LOG(logERROR, + ("Could not open file %s for writing to control ASIC (%d)\n", fname, + index)); return FAIL; } struct spi_ioc_transfer transfer; memset(&transfer, 0, sizeof(transfer)); - transfer.tx_buf = (unsigned long) buffer; + transfer.tx_buf = (unsigned long)buffer; transfer.len = length; - transfer.cs_change = 0; + transfer.cs_change = 0; // transfer command int status = ioctl(fd, SPI_IOC_MESSAGE(1), &transfer); @@ -65,6 +67,6 @@ int ASIC_Driver_Set (int index, int length, char* buffer) { } close(fd); #endif - + return OK; } diff --git a/slsDetectorServers/slsDetectorServer/src/DAC6571.c b/slsDetectorServers/slsDetectorServer/src/DAC6571.c old mode 100755 new mode 100644 index ba18cb865..8bd7de559 --- a/slsDetectorServers/slsDetectorServer/src/DAC6571.c +++ b/slsDetectorServers/slsDetectorServer/src/DAC6571.c @@ -6,51 +6,47 @@ #include "string.h" /* DAC6571 HV DEFINES */ -#define DAC6571_MIN_DAC_VAL (0x0) -#define DAC6571_MAX_DAC_VAL (0x3FF) - +#define DAC6571_MIN_DAC_VAL (0x0) +#define DAC6571_MAX_DAC_VAL (0x3FF) // defines from the hardware int DAC6571_HardMaxVoltage = 0; char DAC6571_DriverFileName[MAX_STR_LENGTH]; -void DAC6571_SetDefines(int hardMaxV, char* driverfname) { - LOG(logINFOBLUE, ("Configuring High Voltage to %s (hard max: %dV)\n", driverfname, hardMaxV)); +void DAC6571_SetDefines(int hardMaxV, char *driverfname) { + LOG(logINFOBLUE, ("Configuring High Voltage to %s (hard max: %dV)\n", + driverfname, hardMaxV)); DAC6571_HardMaxVoltage = hardMaxV; memset(DAC6571_DriverFileName, 0, MAX_STR_LENGTH); strcpy(DAC6571_DriverFileName, driverfname); } -int DAC6571_Set (int val) { +int DAC6571_Set(int val) { LOG(logDEBUG1, ("Setting high voltage to %d\n", val)); if (val < 0) return FAIL; int dacvalue = 0; - // convert value - ConvertToDifferentRange(0, DAC6571_HardMaxVoltage, - DAC6571_MIN_DAC_VAL, DAC6571_MAX_DAC_VAL, - val, &dacvalue); + ConvertToDifferentRange(0, DAC6571_HardMaxVoltage, DAC6571_MIN_DAC_VAL, + DAC6571_MAX_DAC_VAL, val, &dacvalue); LOG(logINFO, ("\t%dV (dacval %d)\n", val, dacvalue)); #ifndef VIRTUAL - //open file - FILE* fd=fopen(DAC6571_DriverFileName,"w"); - if (fd==NULL) { - LOG(logERROR, ("Could not open file %s for writing to set high voltage\n", DAC6571_DriverFileName)); + // open file + FILE *fd = fopen(DAC6571_DriverFileName, "w"); + if (fd == NULL) { + LOG(logERROR, + ("Could not open file %s for writing to set high voltage\n", + DAC6571_DriverFileName)); return FAIL; } - //convert to string, add 0 and write to file + // convert to string, add 0 and write to file fprintf(fd, "%d\n", dacvalue); fclose(fd); #endif return OK; } - - - - diff --git a/slsDetectorServers/slsDetectorServer/src/I2C.c b/slsDetectorServers/slsDetectorServer/src/I2C.c old mode 100755 new mode 100644 index d4a3392dd..f2f5f3929 --- a/slsDetectorServers/slsDetectorServer/src/I2C.c +++ b/slsDetectorServers/slsDetectorServer/src/I2C.c @@ -2,7 +2,7 @@ #include "blackfin.h" #include "clogger.h" -#include // usleep +#include // usleep /** * Intel: Embedded Peripherals IP User Guide @@ -23,69 +23,90 @@ * I2C_RX_DATA_FIFO_REG */ - -#define I2C_DATA_RATE_KBPS (200) +#define I2C_DATA_RATE_KBPS (200) /** Control Register */ -#define I2C_CTRL_ENBLE_CORE_OFST (0) -#define I2C_CTRL_ENBLE_CORE_MSK (0x00000001 << I2C_CTRL_ENBLE_CORE_OFST) -#define I2C_CTRL_BUS_SPEED_OFST (1) -#define I2C_CTRL_BUS_SPEED_MSK (0x00000001 << I2C_CTRL_BUS_SPEED_OFST) -#define I2C_CTRL_BUS_SPEED_STNDRD_100_VAL ((0x0 << I2C_CTRL_BUS_SPEED_OFST) & I2C_CTRL_BUS_SPEED_MSK) // standard mode (up to 100 kbps) -#define I2C_CTRL_BUS_SPEED_FAST_400_VAL ((0x1 << I2C_CTRL_BUS_SPEED_OFST) & I2C_CTRL_BUS_SPEED_MSK) // fast mode (up to 400 kbps) -/** if actual level of transfer command fifo <= thd level, TX_READY interrupt asserted */ -#define I2C_CTRL_TFR_CMD_FIFO_THD_OFST (2) -#define I2C_CTRL_TFR_CMD_FIFO_THD_MSK (0x00000003 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) -#define I2C_CTRL_TFR_CMD_EMPTY_VAL ((0x0 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) -#define I2C_CTRL_TFR_CMD_ONE_FOURTH_VAL ((0x1 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) -#define I2C_CTRL_TFR_CMD_ONE_HALF_VAL ((0x2 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) -#define I2C_CTRL_TFR_CMD_NOT_FULL_VAL ((0x3 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) -/** if actual level of receive data fifo <= thd level, RX_READY interrupt asserted */ -#define I2C_CTRL_RX_DATA_FIFO_THD_OFST (4) -#define I2C_CTRL_RX_DATA_FIFO_THD_MSK (0x00000003 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) -#define I2C_CTRL_RX_DATA_1_VALID_ENTRY_VAL ((0x0 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) -#define I2C_CTRL_RX_DATA_ONE_FOURTH_VAL ((0x1 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) -#define I2C_CTRL_RX_DATA_ONE_HALF_VAL ((0x2 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) -#define I2C_CTRL_RX_DATA_FULL_VAL ((0x3 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) +#define I2C_CTRL_ENBLE_CORE_OFST (0) +#define I2C_CTRL_ENBLE_CORE_MSK (0x00000001 << I2C_CTRL_ENBLE_CORE_OFST) +#define I2C_CTRL_BUS_SPEED_OFST (1) +#define I2C_CTRL_BUS_SPEED_MSK (0x00000001 << I2C_CTRL_BUS_SPEED_OFST) +#define I2C_CTRL_BUS_SPEED_STNDRD_100_VAL \ + ((0x0 << I2C_CTRL_BUS_SPEED_OFST) & \ + I2C_CTRL_BUS_SPEED_MSK) // standard mode (up to 100 kbps) +#define I2C_CTRL_BUS_SPEED_FAST_400_VAL \ + ((0x1 << I2C_CTRL_BUS_SPEED_OFST) & \ + I2C_CTRL_BUS_SPEED_MSK) // fast mode (up to 400 kbps) +/** if actual level of transfer command fifo <= thd level, TX_READY interrupt + * asserted */ +#define I2C_CTRL_TFR_CMD_FIFO_THD_OFST (2) +#define I2C_CTRL_TFR_CMD_FIFO_THD_MSK \ + (0x00000003 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) +#define I2C_CTRL_TFR_CMD_EMPTY_VAL \ + ((0x0 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) +#define I2C_CTRL_TFR_CMD_ONE_FOURTH_VAL \ + ((0x1 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) +#define I2C_CTRL_TFR_CMD_ONE_HALF_VAL \ + ((0x2 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) +#define I2C_CTRL_TFR_CMD_NOT_FULL_VAL \ + ((0x3 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) +/** if actual level of receive data fifo <= thd level, RX_READY interrupt + * asserted */ +#define I2C_CTRL_RX_DATA_FIFO_THD_OFST (4) +#define I2C_CTRL_RX_DATA_FIFO_THD_MSK \ + (0x00000003 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) +#define I2C_CTRL_RX_DATA_1_VALID_ENTRY_VAL \ + ((0x0 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) +#define I2C_CTRL_RX_DATA_ONE_FOURTH_VAL \ + ((0x1 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) +#define I2C_CTRL_RX_DATA_ONE_HALF_VAL \ + ((0x2 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) +#define I2C_CTRL_RX_DATA_FULL_VAL \ + ((0x3 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) /** Transfer Command Fifo register */ -#define I2C_TFR_CMD_RW_OFST (0) -#define I2C_TFR_CMD_RW_MSK (0x00000001 << I2C_TFR_CMD_RW_OFST) -#define I2C_TFR_CMD_RW_WRITE_VAL ((0x0 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK) -#define I2C_TFR_CMD_RW_READ_VAL ((0x1 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK) -#define I2C_TFR_CMD_ADDR_OFST (1) -#define I2C_TFR_CMD_ADDR_MSK (0x0000007F << I2C_TFR_CMD_ADDR_OFST) +#define I2C_TFR_CMD_RW_OFST (0) +#define I2C_TFR_CMD_RW_MSK (0x00000001 << I2C_TFR_CMD_RW_OFST) +#define I2C_TFR_CMD_RW_WRITE_VAL \ + ((0x0 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK) +#define I2C_TFR_CMD_RW_READ_VAL \ + ((0x1 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK) +#define I2C_TFR_CMD_ADDR_OFST (1) +#define I2C_TFR_CMD_ADDR_MSK (0x0000007F << I2C_TFR_CMD_ADDR_OFST) /** when writing, rw and addr converts to data to be written mask */ -#define I2C_TFR_CMD_DATA_FR_WR_OFST (0) -#define I2C_TFR_CMD_DATA_FR_WR_MSK (0x000000FF << I2C_TFR_CMD_DATA_FR_WR_OFST) -#define I2C_TFR_CMD_STOP_OFST (8) -#define I2C_TFR_CMD_STOP_MSK (0x00000001 << I2C_TFR_CMD_STOP_OFST) -#define I2C_TFR_CMD_RPTD_STRT_OFST (9) -#define I2C_TFR_CMD_RPTD_STRT_MSK (0x00000001 << I2C_TFR_CMD_RPTD_STRT_OFST) +#define I2C_TFR_CMD_DATA_FR_WR_OFST (0) +#define I2C_TFR_CMD_DATA_FR_WR_MSK (0x000000FF << I2C_TFR_CMD_DATA_FR_WR_OFST) +#define I2C_TFR_CMD_STOP_OFST (8) +#define I2C_TFR_CMD_STOP_MSK (0x00000001 << I2C_TFR_CMD_STOP_OFST) +#define I2C_TFR_CMD_RPTD_STRT_OFST (9) +#define I2C_TFR_CMD_RPTD_STRT_MSK (0x00000001 << I2C_TFR_CMD_RPTD_STRT_OFST) /** Receive DataFifo register */ -#define I2C_RX_DATA_FIFO_RXDATA_OFST (0) -#define I2C_RX_DATA_FIFO_RXDATA_MSK (0x000000FF << I2C_RX_DATA_FIFO_RXDATA_OFST) +#define I2C_RX_DATA_FIFO_RXDATA_OFST (0) +#define I2C_RX_DATA_FIFO_RXDATA_MSK (0x000000FF << I2C_RX_DATA_FIFO_RXDATA_OFST) /** Status register */ -#define I2C_STATUS_BUSY_OFST (0) -#define I2C_STATUS_BUSY_MSK (0x00000001 << I2C_STATUS_BUSY_OFST) +#define I2C_STATUS_BUSY_OFST (0) +#define I2C_STATUS_BUSY_MSK (0x00000001 << I2C_STATUS_BUSY_OFST) /** SCL Low Count register */ -#define I2C_SCL_LOW_COUNT_PERIOD_OFST (0) -#define I2C_SCL_LOW_COUNT_PERIOD_MSK (0x0000FFFF << I2C_SCL_LOW_COUNT_PERIOD_OFST) +#define I2C_SCL_LOW_COUNT_PERIOD_OFST (0) +#define I2C_SCL_LOW_COUNT_PERIOD_MSK \ + (0x0000FFFF << I2C_SCL_LOW_COUNT_PERIOD_OFST) /** SCL High Count register */ -#define I2C_SCL_HIGH_COUNT_PERIOD_OFST (0) -#define I2C_SCL_HIGH_COUNT_PERIOD_MSK (0x0000FFFF << I2C_SCL_HIGH_COUNT_PERIOD_OFST) +#define I2C_SCL_HIGH_COUNT_PERIOD_OFST (0) +#define I2C_SCL_HIGH_COUNT_PERIOD_MSK \ + (0x0000FFFF << I2C_SCL_HIGH_COUNT_PERIOD_OFST) /** SDA Hold Count register */ -#define I2C_SDA_HOLD_COUNT_PERIOD_OFST (0) -#define I2C_SDA_HOLD_COUNT_PERIOD_MSK (0x0000FFFF << I2C_SDA_HOLD_COUNT_PERIOD_OFST) +#define I2C_SDA_HOLD_COUNT_PERIOD_OFST (0) +#define I2C_SDA_HOLD_COUNT_PERIOD_MSK \ + (0x0000FFFF << I2C_SDA_HOLD_COUNT_PERIOD_OFST) /** Receive Data Fifo Level register */ //#define I2C_RX_DATA_FIFO_LVL_OFST (0) -//#define I2C_RX_DATA_FIFO_LVL_MSK (0x000000FF << I2C_RX_DATA_FIFO_LVL_OFST) +//#define I2C_RX_DATA_FIFO_LVL_MSK (0x000000FF << +//I2C_RX_DATA_FIFO_LVL_OFST) // defines in the fpga uint32_t I2C_Control_Reg = 0x0; @@ -97,15 +118,15 @@ uint32_t I2C_Scl_High_Count_Reg = 0x0; uint32_t I2C_Sda_Hold_Reg = 0x0; uint32_t I2C_Transfer_Command_Fifo_Reg = 0x0; - -void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg, - uint32_t rreg, uint32_t rlvlreg, - uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) { +void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg, uint32_t rreg, + uint32_t rlvlreg, uint32_t slreg, uint32_t shreg, + uint32_t sdreg, uint32_t treg) { LOG(logINFO, ("\tConfiguring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS)); - LOG(logDEBUG1,("controlreg,:0x%x, statusreg,:0x%x, " - "rxrdatafiforeg: 0x%x, rxdatafifocountreg,:0x%x, " - "scllow,:0x%x, sclhighreg,:0x%x, sdaholdreg,:0x%x, transfercmdreg,:0x%x\n", - creg, sreg, rreg, rlvlreg, slreg, shreg, sdreg, treg)); + LOG(logDEBUG1, ("controlreg,:0x%x, statusreg,:0x%x, " + "rxrdatafiforeg: 0x%x, rxdatafifocountreg,:0x%x, " + "scllow,:0x%x, sclhighreg,:0x%x, sdaholdreg,:0x%x, " + "transfercmdreg,:0x%x\n", + creg, sreg, rreg, rlvlreg, slreg, shreg, sdreg, treg)); I2C_Control_Reg = creg; I2C_Status_Reg = sreg; @@ -117,57 +138,77 @@ void I2C_ConfigureI2CCore(uint32_t creg, uint32_t sreg, I2C_Transfer_Command_Fifo_Reg = treg; // calculate scl low and high period count - uint32_t sclPeriodNs = ((1000.00 * 1000.00 * 1000.00) / ((double)I2C_DATA_RATE_KBPS * 1000.00)); + uint32_t sclPeriodNs = ((1000.00 * 1000.00 * 1000.00) / + ((double)I2C_DATA_RATE_KBPS * 1000.00)); // scl low period same as high period uint32_t sclLowPeriodNs = sclPeriodNs / 2; // convert to us, then to clock (defined in blackfin.h) uint32_t sclLowPeriodCount = (sclLowPeriodNs / 1000.00) * I2C_CLOCK_MHZ; // calculate sda hold data count - uint32_t sdaDataHoldTimeNs = (sclLowPeriodNs / 2); // scl low period same as high period + uint32_t sdaDataHoldTimeNs = + (sclLowPeriodNs / 2); // scl low period same as high period // convert to us, then to clock (defined in blackfin.h) uint32_t sdaDataHoldCount = ((sdaDataHoldTimeNs / 1000.00) * I2C_CLOCK_MHZ); - LOG(logINFO, ("\tSetting SCL Low Period: %d ns (%d clocks)\n", sclLowPeriodNs, sclLowPeriodCount)); - bus_w(I2C_Scl_Low_Count_Reg, bus_r(I2C_Scl_Low_Count_Reg) | - ((sclLowPeriodCount << I2C_SCL_LOW_COUNT_PERIOD_OFST) & I2C_SCL_LOW_COUNT_PERIOD_MSK)); + LOG(logINFO, ("\tSetting SCL Low Period: %d ns (%d clocks)\n", + sclLowPeriodNs, sclLowPeriodCount)); + bus_w(I2C_Scl_Low_Count_Reg, + bus_r(I2C_Scl_Low_Count_Reg) | + ((sclLowPeriodCount << I2C_SCL_LOW_COUNT_PERIOD_OFST) & + I2C_SCL_LOW_COUNT_PERIOD_MSK)); LOG(logDEBUG1, ("SCL Low reg:0x%x\n", bus_r(I2C_Scl_Low_Count_Reg))); - LOG(logINFO, ("\tSetting SCL High Period: %d ns (%d clocks)\n", sclLowPeriodNs, sclLowPeriodCount)); - bus_w(I2C_Scl_High_Count_Reg, bus_r(I2C_Scl_High_Count_Reg) | - ((sclLowPeriodCount << I2C_SCL_HIGH_COUNT_PERIOD_OFST) & I2C_SCL_HIGH_COUNT_PERIOD_MSK)); + LOG(logINFO, ("\tSetting SCL High Period: %d ns (%d clocks)\n", + sclLowPeriodNs, sclLowPeriodCount)); + bus_w(I2C_Scl_High_Count_Reg, + bus_r(I2C_Scl_High_Count_Reg) | + ((sclLowPeriodCount << I2C_SCL_HIGH_COUNT_PERIOD_OFST) & + I2C_SCL_HIGH_COUNT_PERIOD_MSK)); LOG(logDEBUG1, ("SCL High reg:0x%x\n", bus_r(I2C_Scl_High_Count_Reg))); - LOG(logINFO, ("\tSetting SDA Hold Time: %d ns (%d clocks)\n", sdaDataHoldTimeNs, sdaDataHoldCount)); - bus_w(I2C_Sda_Hold_Reg, bus_r(I2C_Sda_Hold_Reg) | - ((sdaDataHoldCount << I2C_SDA_HOLD_COUNT_PERIOD_OFST) & I2C_SDA_HOLD_COUNT_PERIOD_MSK)); + LOG(logINFO, ("\tSetting SDA Hold Time: %d ns (%d clocks)\n", + sdaDataHoldTimeNs, sdaDataHoldCount)); + bus_w(I2C_Sda_Hold_Reg, + bus_r(I2C_Sda_Hold_Reg) | + ((sdaDataHoldCount << I2C_SDA_HOLD_COUNT_PERIOD_OFST) & + I2C_SDA_HOLD_COUNT_PERIOD_MSK)); LOG(logDEBUG1, ("SDA Hold reg:0x%x\n", bus_r(I2C_Sda_Hold_Reg))); LOG(logINFO, ("\tEnabling core and bus speed to fast (up to 400 kbps)\n")); - bus_w(I2C_Control_Reg, bus_r(I2C_Control_Reg) | - I2C_CTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?) + bus_w(I2C_Control_Reg, + bus_r(I2C_Control_Reg) | I2C_CTRL_ENBLE_CORE_MSK | + I2C_CTRL_BUS_SPEED_FAST_400_VAL); // fixme: (works?) LOG(logDEBUG1, ("Control reg:0x%x\n", bus_r(I2C_Control_Reg))); - //The INA226 supports the transmission protocol for fast mode (1 kHz to 400 kHz) and high-speed mode (1 kHz to 2.94 MHz). + // The INA226 supports the transmission protocol for fast mode (1 kHz to 400 + // kHz) and high-speed mode (1 kHz to 2.94 MHz). } uint32_t I2C_Read(uint32_t devId, uint32_t addr) { LOG(logDEBUG2, (" ================================================\n")); - LOG(logDEBUG2, (" Reading from I2C device 0x%x and reg 0x%x\n", devId, addr)); + LOG(logDEBUG2, + (" Reading from I2C device 0x%x and reg 0x%x\n", devId, addr)); // device Id mask - uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK); + uint32_t devIdMask = + ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK); LOG(logDEBUG2, (" devId:0x%x\n", devIdMask)); // write I2C ID bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK))); - LOG(logDEBUG2, (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK)))); + LOG(logDEBUG2, + (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK)))); // write register addr bus_w(I2C_Transfer_Command_Fifo_Reg, addr); LOG(logDEBUG2, (" write addr:0x%x\n", addr)); - // repeated start with read (repeated start needed here because it was in write operation mode earlier, for the device ID) - bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL)); - LOG(logDEBUG2, (" repeated start:0x%x\n", (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL))); + // repeated start with read (repeated start needed here because it was in + // write operation mode earlier, for the device ID) + bus_w(I2C_Transfer_Command_Fifo_Reg, + (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL)); + LOG(logDEBUG2, + (" repeated start:0x%x\n", + (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL))); // continue reading bus_w(I2C_Transfer_Command_Fifo_Reg, 0x0); @@ -180,10 +221,11 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) { // read value uint32_t retval = 0; - //In case one wants to do something more general (INA226 receives only 2 bytes) + // In case one wants to do something more general (INA226 receives only 2 + // bytes) // wait till status is idle int status = 1; - while(status) { + while (status) { status = bus_r(I2C_Status_Reg) & I2C_STATUS_BUSY_MSK; LOG(logDEBUG2, (" status:%d\n", status)); usleep(0); @@ -196,7 +238,8 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) { // level bytes to read, read 1 byte at a time for (iloop = level - 1; iloop >= 0; --iloop) { - u_int16_t byte = bus_r(I2C_Rx_Data_Fifo_Reg) & I2C_RX_DATA_FIFO_RXDATA_MSK; + u_int16_t byte = + bus_r(I2C_Rx_Data_Fifo_Reg) & I2C_RX_DATA_FIFO_RXDATA_MSK; LOG(logDEBUG2, (" byte nr %d:0x%x\n", iloop, byte)); // push by 1 byte at a time retval |= (byte << (8 * iloop)); @@ -208,33 +251,43 @@ uint32_t I2C_Read(uint32_t devId, uint32_t addr) { void I2C_Write(uint32_t devId, uint32_t addr, uint16_t data) { LOG(logDEBUG2, (" ================================================\n")); - LOG(logDEBUG2, (" Writing to I2C (Device:0x%x, reg:0x%x, data:%d)\n", devId, addr, data)); + LOG(logDEBUG2, (" Writing to I2C (Device:0x%x, reg:0x%x, data:%d)\n", devId, + addr, data)); // device Id mask - uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK); + uint32_t devIdMask = + ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK); LOG(logDEBUG2, (" devId:0x%x\n", devId)); // write I2C ID bus_w(I2C_Transfer_Command_Fifo_Reg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK))); - LOG(logDEBUG2, (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK)))); + LOG(logDEBUG2, + (" write devID and R/-W:0x%x\n", (devIdMask & ~(I2C_TFR_CMD_RW_MSK)))); // write register addr bus_w(I2C_Transfer_Command_Fifo_Reg, addr); LOG(logDEBUG2, (" write addr:0x%x\n", addr)); - // do not do the repeated start as it is already in write operation mode (else it wont work) + // do not do the repeated start as it is already in write operation mode + // (else it wont work) uint8_t msb = (uint8_t)((data & 0xFF00) >> 8); uint8_t lsb = (uint8_t)(data & 0x00FF); LOG(logDEBUG2, (" msb:0x%02x, lsb:0x%02x\n", msb, lsb)); // writing data MSB - bus_w(I2C_Transfer_Command_Fifo_Reg, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK)); - LOG(logDEBUG2, (" write msb:0x%02x\n", ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK))); + bus_w(I2C_Transfer_Command_Fifo_Reg, + ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK)); + LOG(logDEBUG2, + (" write msb:0x%02x\n", + ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK))); // writing data LSB and stop writing bit - bus_w(I2C_Transfer_Command_Fifo_Reg, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK); - LOG(logDEBUG2, (" write lsb and stop writing:0x%x\n", ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK)); + bus_w(I2C_Transfer_Command_Fifo_Reg, + ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | + I2C_TFR_CMD_STOP_MSK); + LOG(logDEBUG2, + (" write lsb and stop writing:0x%x\n", + ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | + I2C_TFR_CMD_STOP_MSK)); LOG(logDEBUG2, (" ================================================\n")); } - - diff --git a/slsDetectorServers/slsDetectorServer/src/INA226.c b/slsDetectorServers/slsDetectorServer/src/INA226.c old mode 100755 new mode 100644 index 006bea349..cf2c792dd --- a/slsDetectorServers/slsDetectorServer/src/INA226.c +++ b/slsDetectorServers/slsDetectorServer/src/INA226.c @@ -16,43 +16,46 @@ /** INA226 defines */ /** Register set */ -#define INA226_CONFIGURATION_REG (0x00) //R/W -#define INA226_SHUNT_VOLTAGE_REG (0x01) //R -#define INA226_BUS_VOLTAGE_REG (0x02) //R -#define INA226_POWER_REG (0x03) //R -#define INA226_CURRENT_REG (0x04) //R -#define INA226_CALIBRATION_REG (0x05) //R/W -#define INA226_MASK_ENABLE_REG (0x06) //R/W -#define INA226_ALERT_LIMIT_REG (0x07) //R/W -#define INA226_MANUFACTURER_ID_REG (0xFE) //R -#define INA226_DIE_ID_REG (0xFF) //R +#define INA226_CONFIGURATION_REG (0x00) // R/W +#define INA226_SHUNT_VOLTAGE_REG (0x01) // R +#define INA226_BUS_VOLTAGE_REG (0x02) // R +#define INA226_POWER_REG (0x03) // R +#define INA226_CURRENT_REG (0x04) // R +#define INA226_CALIBRATION_REG (0x05) // R/W +#define INA226_MASK_ENABLE_REG (0x06) // R/W +#define INA226_ALERT_LIMIT_REG (0x07) // R/W +#define INA226_MANUFACTURER_ID_REG (0xFE) // R +#define INA226_DIE_ID_REG (0xFF) // R /** bus voltage register */ -#define INA226_BUS_VOLTAGE_VMIN_UV (1250) // 1.25mV -#define INA226_BUS_VOLTAGE_MX_STPS (0x7FFF + 1) -#define INA226_BUS_VOLTAGE_VMAX_UV (INA226_BUS_VOLTAGE_VMIN_UV * INA226_BUS_VOLTAGE_MX_STPS) // 40960000uV, 40.96V - +#define INA226_BUS_VOLTAGE_VMIN_UV (1250) // 1.25mV +#define INA226_BUS_VOLTAGE_MX_STPS (0x7FFF + 1) +#define INA226_BUS_VOLTAGE_VMAX_UV \ + (INA226_BUS_VOLTAGE_VMIN_UV * \ + INA226_BUS_VOLTAGE_MX_STPS) // 40960000uV, 40.96V /** shunt voltage register */ -#define INA226_SHUNT_VOLTAGE_VMIN_NV (2500) // 2.5uV -#define INA226_SHUNT_VOLTAGE_MX_STPS (0x7FFF + 1) -#define INA226_SHUNT_VOLTAGE_VMAX_NV (INA226_SHUNT_VOLTAGE_VMIN_NV * INA226_SHUNT_VOLTAGE_MX_STPS) // 81920000nV, 81.92mV -#define INA226_SHUNT_NEGATIVE_MSK (1 << 15) -#define INA226_SHUNT_ABS_VALUE_MSK (0x7FFF) - - +#define INA226_SHUNT_VOLTAGE_VMIN_NV (2500) // 2.5uV +#define INA226_SHUNT_VOLTAGE_MX_STPS (0x7FFF + 1) +#define INA226_SHUNT_VOLTAGE_VMAX_NV \ + (INA226_SHUNT_VOLTAGE_VMIN_NV * \ + INA226_SHUNT_VOLTAGE_MX_STPS) // 81920000nV, 81.92mV +#define INA226_SHUNT_NEGATIVE_MSK (1 << 15) +#define INA226_SHUNT_ABS_VALUE_MSK (0x7FFF) /** current precision for calibration register */ -#define INA226_CURRENT_IMIN_UA (100) //100uA can be changed +#define INA226_CURRENT_IMIN_UA (100) // 100uA can be changed /** calibration register */ -#define INA226_CALIBRATION_MSK (0x7FFF) +#define INA226_CALIBRATION_MSK (0x7FFF) /** get calibration register value to be set */ -#define INA226_getCalibrationValue(rOhm) (0.00512 /(INA226_CURRENT_IMIN_UA * 1e-6 * rOhm)) +#define INA226_getCalibrationValue(rOhm) \ + (0.00512 / (INA226_CURRENT_IMIN_UA * 1e-6 * rOhm)) /** get current unit */ -#define INA226_getConvertedCurrentUnits(shuntV, calibReg) ((double)shuntV * (double)calibReg / (double)2048) +#define INA226_getConvertedCurrentUnits(shuntV, calibReg) \ + ((double)shuntV * (double)calibReg / (double)2048) // defines from the fpga double INA226_Shunt_Resistor_Ohm = 0.0; @@ -61,8 +64,8 @@ int INA226_Calibration_Register_Value = 0; #define INA226_CALIBRATION_CURRENT_TOLERANCE (1.2268) void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t sreg, - uint32_t rreg, uint32_t rlvlreg, - uint32_t slreg, uint32_t shreg, uint32_t sdreg, uint32_t treg) { + uint32_t rreg, uint32_t rlvlreg, uint32_t slreg, + uint32_t shreg, uint32_t sdreg, uint32_t treg) { LOG(logINFOBLUE, ("Configuring INA226\n")); LOG(logDEBUG1, ("Shunt ohm resistor: %f\n", rOhm)); INA226_Shunt_Resistor_Ohm = rOhm; @@ -71,13 +74,19 @@ void INA226_ConfigureI2CCore(double rOhm, uint32_t creg, uint32_t sreg, } void INA226_CalibrateCurrentRegister(uint32_t deviceId) { - LOG(logINFO, ("Calibrating Current Register for Device ID: 0x%x\n", deviceId)); + LOG(logINFO, + ("Calibrating Current Register for Device ID: 0x%x\n", deviceId)); // get calibration value based on shunt resistor - uint16_t calVal = ((uint16_t)INA226_getCalibrationValue(INA226_Shunt_Resistor_Ohm)) & INA226_CALIBRATION_MSK; - LOG(logINFO, ("\tCalculated calibration reg value: 0x%0x (%d)\n", calVal, calVal)); + uint16_t calVal = + ((uint16_t)INA226_getCalibrationValue(INA226_Shunt_Resistor_Ohm)) & + INA226_CALIBRATION_MSK; + LOG(logINFO, + ("\tCalculated calibration reg value: 0x%0x (%d)\n", calVal, calVal)); calVal = ((double)calVal / INA226_CALIBRATION_CURRENT_TOLERANCE) + 0.5; - LOG(logINFO, ("\tRealculated (for tolerance) calibration reg value: 0x%0x (%d)\n", calVal, calVal)); + LOG(logINFO, + ("\tRealculated (for tolerance) calibration reg value: 0x%0x (%d)\n", + calVal, calVal)); INA226_Calibration_Register_Value = calVal; // calibrate current register @@ -86,7 +95,9 @@ void INA226_CalibrateCurrentRegister(uint32_t deviceId) { // read back calibration register int retval = I2C_Read(deviceId, INA226_CALIBRATION_REG); if (retval != calVal) { - LOG(logERROR, ("Cannot set calibration register for I2C. Set 0x%x, read 0x%x\n", calVal, retval)); + LOG(logERROR, + ("Cannot set calibration register for I2C. Set 0x%x, read 0x%x\n", + calVal, retval)); } } @@ -98,14 +109,15 @@ int INA226_ReadVoltage(uint32_t deviceId) { // value in uV int voltageuV = 0; ConvertToDifferentRange(0, INA226_BUS_VOLTAGE_MX_STPS, - INA226_BUS_VOLTAGE_VMIN_UV, INA226_BUS_VOLTAGE_VMAX_UV, - regval, &voltageuV); + INA226_BUS_VOLTAGE_VMIN_UV, + INA226_BUS_VOLTAGE_VMAX_UV, regval, &voltageuV); LOG(logDEBUG1, (" voltage: 0x%d uV\n", voltageuV)); // value in mV - int voltagemV = voltageuV / 1000; + int voltagemV = voltageuV / 1000; LOG(logDEBUG1, (" voltage: %d mV\n", voltagemV)); - LOG(logINFO, ("Voltage via I2C (Device: 0x%x): %d mV\n", deviceId, voltagemV)); + LOG(logINFO, + ("Voltage via I2C (Device: 0x%x): %d mV\n", deviceId, voltagemV)); return voltagemV; } @@ -122,13 +134,13 @@ int INA226_ReadCurrent(uint32_t deviceId) { if (shuntVoltageRegVal == 0xFFFF) { LOG(logDEBUG1, (" Reading shunt voltage reg again\n")); shuntVoltageRegVal = I2C_Read(deviceId, INA226_SHUNT_VOLTAGE_REG); - LOG(logDEBUG1, (" shunt voltage reg: %d\n", shuntVoltageRegVal)); + LOG(logDEBUG1, (" shunt voltage reg: %d\n", shuntVoltageRegVal)); } // value for current - int retval = INA226_getConvertedCurrentUnits(shuntVoltageRegVal, INA226_Calibration_Register_Value); + int retval = INA226_getConvertedCurrentUnits( + shuntVoltageRegVal, INA226_Calibration_Register_Value); LOG(logDEBUG1, (" current unit value: %d\n", retval)); - // reading directly the current reg LOG(logDEBUG1, (" Reading current reg\n")); int cuurentRegVal = I2C_Read(deviceId, INA226_CURRENT_REG); @@ -137,20 +149,23 @@ int INA226_ReadCurrent(uint32_t deviceId) { if (cuurentRegVal >= 0xFFF0) { LOG(logDEBUG1, (" Reading current reg again\n")); cuurentRegVal = I2C_Read(deviceId, INA226_CURRENT_REG); - LOG(logDEBUG1, (" current reg: %d\n", cuurentRegVal)); + LOG(logDEBUG1, (" current reg: %d\n", cuurentRegVal)); } // should be the same - LOG(logDEBUG1, (" ===============current reg: %d, current unit cal:%d=================================\n", cuurentRegVal, retval)); + LOG(logDEBUG1, (" ===============current reg: %d, current unit " + "cal:%d=================================\n", + cuurentRegVal, retval)); // current in uA int currentuA = cuurentRegVal * INA226_CURRENT_IMIN_UA; LOG(logDEBUG1, (" current: %d uA\n", currentuA)); // current in mA - int currentmA = (currentuA / 1000.00) + 0.5; + int currentmA = (currentuA / 1000.00) + 0.5; LOG(logDEBUG1, (" current: %d mA\n", currentmA)); - LOG(logINFO, ("Current via I2C (Device: 0x%x): %d mA\n", deviceId, currentmA)); + LOG(logINFO, + ("Current via I2C (Device: 0x%x): %d mA\n", deviceId, currentmA)); return currentmA; } diff --git a/slsDetectorServers/slsDetectorServer/src/LTC2620.c b/slsDetectorServers/slsDetectorServer/src/LTC2620.c old mode 100755 new mode 100644 index 02c4ef2e3..1704648bd --- a/slsDetectorServers/slsDetectorServer/src/LTC2620.c +++ b/slsDetectorServers/slsDetectorServer/src/LTC2620.c @@ -1,35 +1,46 @@ #include "LTC2620.h" -#include "commonServerFunctions.h" // blackfin.h, ansi.h -#include "common.h" #include "blackfin.h" #include "clogger.h" +#include "common.h" +#include "commonServerFunctions.h" // blackfin.h, ansi.h #include "sls_detector_defs.h" #include /* LTC2620 DAC DEFINES */ // first 4 bits are 0 as this is a 12 bit dac -#define LTC2620_DAC_DATA_OFST (4) -#define LTC2620_DAC_DATA_MSK (0x00000FFF << LTC2620_DAC_DATA_OFST) -#define LTC2620_DAC_ADDR_OFST (16) -#define LTC2620_DAC_ADDR_MSK (0x0000000F << LTC2620_DAC_ADDR_OFST) -#define LTC2620_DAC_CMD_OFST (20) -#define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_DATA_OFST (4) +#define LTC2620_DAC_DATA_MSK (0x00000FFF << LTC2620_DAC_DATA_OFST) +#define LTC2620_DAC_ADDR_OFST (16) +#define LTC2620_DAC_ADDR_MSK (0x0000000F << LTC2620_DAC_ADDR_OFST) +#define LTC2620_DAC_CMD_OFST (20) +#define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST) -#define LTC2620_DAC_CMD_WR_IN_VAL ((0x0 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // write to input register -#define LTC2620_DAC_CMD_UPDTE_DAC_VAL ((0x1 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // update dac (power up) -#define LTC2620_DAC_CMD_WR_IN_UPDTE_DAC_VAL ((0x2 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // write to input register and update dac (power up) -#define LTC2620_DAC_CMD_WR_UPDTE_DAC_VAL ((0x3 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) // write to and update dac (power up) -#define LTC2620_DAC_CMD_PWR_DWN_VAL ((0x4 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) -#define LTC2620_DAC_CMD_NO_OPRTN_VAL ((0xF << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) +#define LTC2620_DAC_CMD_WR_IN_VAL \ + ((0x0 << LTC2620_DAC_CMD_OFST) & \ + LTC2620_DAC_CMD_MSK) // write to input register +#define LTC2620_DAC_CMD_UPDTE_DAC_VAL \ + ((0x1 << LTC2620_DAC_CMD_OFST) & \ + LTC2620_DAC_CMD_MSK) // update dac (power up) +#define LTC2620_DAC_CMD_WR_IN_UPDTE_DAC_VAL \ + ((0x2 << LTC2620_DAC_CMD_OFST) & \ + LTC2620_DAC_CMD_MSK) // write to input register and update dac (power up) +#define LTC2620_DAC_CMD_WR_UPDTE_DAC_VAL \ + ((0x3 << LTC2620_DAC_CMD_OFST) & \ + LTC2620_DAC_CMD_MSK) // write to and update dac (power up) +#define LTC2620_DAC_CMD_PWR_DWN_VAL \ + ((0x4 << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) +#define LTC2620_DAC_CMD_NO_OPRTN_VAL \ + ((0xF << LTC2620_DAC_CMD_OFST) & LTC2620_DAC_CMD_MSK) -#define LTC2620_NUMBITS (24) -#define LTC2620_DAISY_CHAIN_NUMBITS (32) // due to shift register FIXME: was 33 earlier -#define LTC2620_NUMCHANNELS (8) -#define LTC2620_PWR_DOWN_VAL (-100) -#define LTC2620_MIN_VAL (0) -#define LTC2620_MAX_VAL (4095) // 12 bits -#define LTC2620_MAX_STEPS (LTC2620_MAX_VAL + 1) +#define LTC2620_NUMBITS (24) +#define LTC2620_DAISY_CHAIN_NUMBITS \ + (32) // due to shift register FIXME: was 33 earlier +#define LTC2620_NUMCHANNELS (8) +#define LTC2620_PWR_DOWN_VAL (-100) +#define LTC2620_MIN_VAL (0) +#define LTC2620_MAX_VAL (4095) // 12 bits +#define LTC2620_MAX_STEPS (LTC2620_MAX_VAL + 1) #ifdef CHIPTESTBOARDD #include "slsDetectorServer_defs.h" @@ -45,7 +56,9 @@ int LTC2620_Ndac = 0; int LTC2620_MinVoltage = 0; int LTC2620_MaxVoltage = 0; -void LTC2620_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst, int nd, int minMV, int maxMV) { +void LTC2620_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, + uint32_t dmsk, int dofst, int nd, int minMV, + int maxMV) { LTC2620_Reg = reg; LTC2620_CsMask = cmsk; LTC2620_ClkMask = clkmsk; @@ -57,75 +70,68 @@ void LTC2620_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t d } void LTC2620_Disable() { - bus_w(LTC2620_Reg, (bus_r(LTC2620_Reg) - | LTC2620_CsMask - | LTC2620_ClkMask) - & ~(LTC2620_DigMask)); + bus_w(LTC2620_Reg, (bus_r(LTC2620_Reg) | LTC2620_CsMask | LTC2620_ClkMask) & + ~(LTC2620_DigMask)); } -int LTC2620_GetPowerDownValue() { - return LTC2620_PWR_DOWN_VAL; -} +int LTC2620_GetPowerDownValue() { return LTC2620_PWR_DOWN_VAL; } -int LTC2620_GetMinInput() { - return LTC2620_MIN_VAL; -} +int LTC2620_GetMinInput() { return LTC2620_MIN_VAL; } -int LTC2620_GetMaxInput() { - return LTC2620_MAX_VAL; -} +int LTC2620_GetMaxInput() { return LTC2620_MAX_VAL; } -int LTC2620_GetMaxNumSteps() { - return LTC2620_MAX_STEPS; -} +int LTC2620_GetMaxNumSteps() { return LTC2620_MAX_STEPS; } -int LTC2620_VoltageToDac(int voltage, int* dacval) { +int LTC2620_VoltageToDac(int voltage, int *dacval) { return ConvertToDifferentRange(LTC2620_MinVoltage, LTC2620_MaxVoltage, - LTC2620_MIN_VAL, LTC2620_MAX_VAL, - voltage, dacval); + LTC2620_MIN_VAL, LTC2620_MAX_VAL, voltage, + dacval); } -int LTC2620_DacToVoltage(int dacval, int* voltage) { - return ConvertToDifferentRange( LTC2620_MIN_VAL, LTC2620_MAX_VAL, - LTC2620_MinVoltage, LTC2620_MaxVoltage, - dacval, voltage); +int LTC2620_DacToVoltage(int dacval, int *voltage) { + return ConvertToDifferentRange(LTC2620_MIN_VAL, LTC2620_MAX_VAL, + LTC2620_MinVoltage, LTC2620_MaxVoltage, + dacval, voltage); } -void LTC2620_SetSingle(int cmd, int data, int dacaddr) { - LOG(logDEBUG2, ("(Single) dac addr:%d, dac value:%d, cmd:%d\n", dacaddr, data, cmd)); +void LTC2620_SetSingle(int cmd, int data, int dacaddr) { + LOG(logDEBUG2, + ("(Single) dac addr:%d, dac value:%d, cmd:%d\n", dacaddr, data, cmd)); - uint32_t codata = (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) | - ((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) | - cmd); + uint32_t codata = + (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) | + ((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) | cmd); LOG(logDEBUG2, ("codata: 0x%x\n", codata)); - serializeToSPI (LTC2620_Reg, codata, LTC2620_CsMask, LTC2620_NUMBITS, - LTC2620_ClkMask, LTC2620_DigMask, LTC2620_DigOffset, 0); + serializeToSPI(LTC2620_Reg, codata, LTC2620_CsMask, LTC2620_NUMBITS, + LTC2620_ClkMask, LTC2620_DigMask, LTC2620_DigOffset, 0); } -void LTC2620_SendDaisyData(uint32_t* valw, uint32_t val) { +void LTC2620_SendDaisyData(uint32_t *valw, uint32_t val) { sendDataToSPI(valw, LTC2620_Reg, val, LTC2620_DAISY_CHAIN_NUMBITS, - LTC2620_ClkMask, LTC2620_DigMask, LTC2620_DigOffset); + LTC2620_ClkMask, LTC2620_DigMask, LTC2620_DigOffset); } -void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) { +void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) { int nchip = LTC2620_Ndac / LTC2620_NUMCHANNELS; uint32_t valw = 0; int ichip = 0; - LOG(logDEBUG2, ("(Daisy) desired chip index:%d, nchip:%d, dac ch:%d, val:%d, cmd:0x%x \n", - chipIndex, nchip, dacaddr, data, cmd)); + LOG(logDEBUG2, ("(Daisy) desired chip index:%d, nchip:%d, dac ch:%d, " + "val:%d, cmd:0x%x \n", + chipIndex, nchip, dacaddr, data, cmd)); // data to be bit banged - uint32_t codata = (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) | - ((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) | - cmd); + uint32_t codata = + (((data << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK) | + ((dacaddr << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) | cmd); LOG(logDEBUG2, ("codata: 0x%x\n", codata)); // select all chips (ctb daisy chain; others 1 chip) LOG(logDEBUG2, ("Selecting LTC2620\n")); - SPIChipSelect (&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask, LTC2620_DigMask, 0); + SPIChipSelect(&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask, + LTC2620_DigMask, 0); // send same data to all if (chipIndex < 0) { @@ -138,7 +144,8 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) { // send to one chip, nothing to others else { - // send nothing to subsequent ichips (daisy chain) (if any chips after desired chip) + // send nothing to subsequent ichips (daisy chain) (if any chips after + // desired chip) for (ichip = chipIndex + 1; ichip < nchip; ++ichip) { LOG(logDEBUG2, ("Send nothing to ichip %d\n", ichip)); LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL); @@ -148,7 +155,8 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) { LOG(logDEBUG2, ("Send data (0x%x) to ichip %d\n", codata, chipIndex)); LTC2620_SendDaisyData(&valw, codata); - // send nothing to preceding ichips (daisy chain) (if any chips in front of desired chip) + // send nothing to preceding ichips (daisy chain) (if any chips in front + // of desired chip) for (ichip = 0; ichip < chipIndex; ++ichip) { LOG(logDEBUG2, ("Send nothing to ichip %d\n", ichip)); LTC2620_SendDaisyData(&valw, LTC2620_DAC_CMD_NO_OPRTN_VAL); @@ -157,11 +165,13 @@ void LTC2620_SetDaisy(int cmd, int data, int dacaddr, int chipIndex) { // deselect all chips (ctb daisy chain; others 1 chip) LOG(logDEBUG2, ("Deselecting LTC2620\n")); - SPIChipDeselect(&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask, LTC2620_DigMask, 0); + SPIChipDeselect(&valw, LTC2620_Reg, LTC2620_CsMask, LTC2620_ClkMask, + LTC2620_DigMask, 0); } -void LTC2620_Set(int cmd, int data, int dacaddr, int chipIndex) { - LOG(logDEBUG1, ("cmd:0x%x, data:%d, dacaddr:%d, chipIndex:%d\n", cmd, data, dacaddr, chipIndex)); +void LTC2620_Set(int cmd, int data, int dacaddr, int chipIndex) { + LOG(logDEBUG1, ("cmd:0x%x, data:%d, dacaddr:%d, chipIndex:%d\n", cmd, data, + dacaddr, chipIndex)); LOG(logDEBUG2, (" ================================================\n")); // ctb if (LTC2620_Ndac > LTC2620_NUMCHANNELS) @@ -172,7 +182,7 @@ void LTC2620_Set(int cmd, int data, int dacaddr, int chipIndex) { LOG(logDEBUG2, (" ================================================\n")); } -void LTC2620_Configure(){ +void LTC2620_Configure() { LOG(logINFOBLUE, ("Configuring LTC2620\n")); // dac channel - all channels @@ -182,16 +192,17 @@ void LTC2620_Configure(){ int data = 0x6; // command - int cmd = LTC2620_DAC_CMD_WR_IN_VAL; //FIXME: should be command update and not write(does not power up) + int cmd = LTC2620_DAC_CMD_WR_IN_VAL; // FIXME: should be command update and + // not write(does not power up) // also why do we need to power up (for jctb, we power down next) LTC2620_Set(cmd, data, addr, -1); } -void LTC2620_SetDAC (int dacnum, int data) { +void LTC2620_SetDAC(int dacnum, int data) { LOG(logDEBUG1, ("Setting dac %d to %d\n", dacnum, data)); // LTC2620 index - int ichip = dacnum / LTC2620_NUMCHANNELS; + int ichip = dacnum / LTC2620_NUMCHANNELS; // dac channel int addr = dacnum % LTC2620_NUMCHANNELS; @@ -204,17 +215,18 @@ void LTC2620_SetDAC (int dacnum, int data) { cmd = LTC2620_DAC_CMD_PWR_DWN_VAL; LOG(logDEBUG1, ("POWER DOWN\n")); } else { - LOG(logDEBUG1,("Write to Input Register and Update\n")); + LOG(logDEBUG1, ("Write to Input Register and Update\n")); } LTC2620_Set(cmd, data, addr, ichip); } -int LTC2620_SetDACValue (int dacnum, int val, int mV, int* dacval) { +int LTC2620_SetDACValue(int dacnum, int val, int mV, int *dacval) { LOG(logDEBUG1, ("dacnum:%d, val:%d, ismV:%d\n", dacnum, val, mV)); // validate index if (dacnum < 0 || dacnum >= LTC2620_Ndac) { - LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum, LTC2620_Ndac - 1)); + LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum, + LTC2620_Ndac - 1)); return FAIL; } @@ -234,19 +246,22 @@ int LTC2620_SetDACValue (int dacnum, int val, int mV, int* dacval) { ret = LTC2620_VoltageToDac(val, dacval); } else if (val >= 0 && dacnum <= ndacsonly) { // do not convert power down dac val - //(if not ndacsonly (pwr/vchip): dont need to print mV value as it will be wrong (wrong limits)) + //(if not ndacsonly (pwr/vchip): dont need to print mV value as it will + //be wrong (wrong limits)) ret = LTC2620_DacToVoltage(val, &dacmV); } // conversion out of bounds if (ret == FAIL) { - LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum, (mV ? "mV" : "dac units"))); + LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum, + (mV ? "mV" : "dac units"))); return FAIL; } // set - if ( (*dacval >= 0) || (*dacval == LTC2620_PWR_DOWN_VAL)) { - LOG(logINFO, ("Setting DAC %d: %d dac (%d mV)\n",dacnum, *dacval, dacmV)); + if ((*dacval >= 0) || (*dacval == LTC2620_PWR_DOWN_VAL)) { + LOG(logINFO, + ("Setting DAC %d: %d dac (%d mV)\n", dacnum, *dacval, dacmV)); LTC2620_SetDAC(dacnum, *dacval); } return OK; diff --git a/slsDetectorServers/slsDetectorServer/src/LTC2620_Driver.c b/slsDetectorServers/slsDetectorServer/src/LTC2620_Driver.c old mode 100755 new mode 100644 index a5aa214c9..aeb7615ca --- a/slsDetectorServers/slsDetectorServer/src/LTC2620_Driver.c +++ b/slsDetectorServers/slsDetectorServer/src/LTC2620_Driver.c @@ -6,44 +6,44 @@ #include /* LTC2620 DAC DEFINES */ -#define LTC2620_D_PWR_DOWN_VAL (-100) -#define LTC2620_D_MAX_DAC_VAL (4095) // 12 bits -#define LTC2620_D_MAX_STEPS (LTC2620_D_MAX_DAC_VAL + 1) - +#define LTC2620_D_PWR_DOWN_VAL (-100) +#define LTC2620_D_MAX_DAC_VAL (4095) // 12 bits +#define LTC2620_D_MAX_STEPS (LTC2620_D_MAX_DAC_VAL + 1) // defines from the fpga int LTC2620_D_HardMaxVoltage = 0; char LTC2620_D_DriverFileName[MAX_STR_LENGTH]; int LTC2620_D_NumDacs = 0; -void LTC2620_D_SetDefines(int hardMaxV, char* driverfname, int numdacs) { - LOG(logINFOBLUE, ("Configuring DACs (LTC2620) to %s (numdacs:%d, hard max: %dmV)\n", driverfname, numdacs, hardMaxV)); +void LTC2620_D_SetDefines(int hardMaxV, char *driverfname, int numdacs) { + LOG(logINFOBLUE, + ("Configuring DACs (LTC2620) to %s (numdacs:%d, hard max: %dmV)\n", + driverfname, numdacs, hardMaxV)); LTC2620_D_HardMaxVoltage = hardMaxV; memset(LTC2620_D_DriverFileName, 0, MAX_STR_LENGTH); strcpy(LTC2620_D_DriverFileName, driverfname); LTC2620_D_NumDacs = numdacs; } -int LTC2620_D_GetMaxNumSteps() { - return LTC2620_D_MAX_STEPS; +int LTC2620_D_GetMaxNumSteps() { return LTC2620_D_MAX_STEPS; } + +int LTC2620_D_VoltageToDac(int voltage, int *dacval) { + return ConvertToDifferentRange(0, LTC2620_D_HardMaxVoltage, 0, + LTC2620_D_MAX_DAC_VAL, voltage, dacval); } -int LTC2620_D_VoltageToDac(int voltage, int* dacval) { - return ConvertToDifferentRange(0, LTC2620_D_HardMaxVoltage, 0, LTC2620_D_MAX_DAC_VAL, - voltage, dacval); +int LTC2620_D_DacToVoltage(int dacval, int *voltage) { + return ConvertToDifferentRange(0, LTC2620_D_MAX_DAC_VAL, 0, + LTC2620_D_HardMaxVoltage, dacval, voltage); } -int LTC2620_D_DacToVoltage(int dacval, int* voltage) { - return ConvertToDifferentRange( 0, LTC2620_D_MAX_DAC_VAL, 0, LTC2620_D_HardMaxVoltage, - dacval, voltage); -} - - -int LTC2620_D_SetDACValue (int dacnum, int val, int mV, char* dacname, int* dacval) { +int LTC2620_D_SetDACValue(int dacnum, int val, int mV, char *dacname, + int *dacval) { LOG(logDEBUG1, ("dacnum:%d, val:%d, ismV:%d\n", dacnum, val, mV)); // validate index if (dacnum < 0 || dacnum >= LTC2620_D_NumDacs) { - LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum, LTC2620_D_NumDacs - 1)); + LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum, + LTC2620_D_NumDacs - 1)); return FAIL; } @@ -64,14 +64,15 @@ int LTC2620_D_SetDACValue (int dacnum, int val, int mV, char* dacname, int* dacv // conversion out of bounds if (ret == FAIL) { - LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum, (mV ? "mV" : "dac units"))); + LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum, + (mV ? "mV" : "dac units"))); return FAIL; } // set - if ( (*dacval >= 0) || (*dacval == LTC2620_D_PWR_DOWN_VAL)) { - LOG(logINFO, ("Setting DAC %2d [%-12s] : %d dac (%d mV)\n",dacnum, dacname, *dacval, dacmV)); - + if ((*dacval >= 0) || (*dacval == LTC2620_D_PWR_DOWN_VAL)) { + LOG(logINFO, ("Setting DAC %2d [%-12s] : %d dac (%d mV)\n", dacnum, + dacname, *dacval, dacmV)); #ifndef VIRTUAL char fname[MAX_STR_LENGTH]; @@ -80,19 +81,19 @@ int LTC2620_D_SetDACValue (int dacnum, int val, int mV, char* dacname, int* dacv memset(temp, 0, sizeof(temp)); sprintf(temp, "%d", dacnum); strcat(fname, temp); - LOG(logDEBUG1, ("fname %s\n",fname)); - - //open file - FILE* fd=fopen(fname,"w"); - if (fd==NULL) { - LOG(logERROR, ("Could not open file %s for writing to set dac %d\n", fname, dacnum)); + LOG(logDEBUG1, ("fname %s\n", fname)); + + // open file + FILE *fd = fopen(fname, "w"); + if (fd == NULL) { + LOG(logERROR, ("Could not open file %s for writing to set dac %d\n", + fname, dacnum)); return FAIL; } - //convert to string, add 0 and write to file + // convert to string, add 0 and write to file fprintf(fd, "%d\n", *dacval); fclose(fd); #endif - } return OK; } diff --git a/slsDetectorServers/slsDetectorServer/src/MAX1932.c b/slsDetectorServers/slsDetectorServer/src/MAX1932.c old mode 100755 new mode 100644 index c7fca3733..0128cc01c --- a/slsDetectorServers/slsDetectorServer/src/MAX1932.c +++ b/slsDetectorServers/slsDetectorServer/src/MAX1932.c @@ -1,19 +1,19 @@ #include "MAX1932.h" -#include "commonServerFunctions.h" // blackfin.h, ansi.h #include "blackfin.h" #include "clogger.h" #include "common.h" +#include "commonServerFunctions.h" // blackfin.h, ansi.h #include "sls_detector_defs.h" /* MAX1932 HV DEFINES */ -#define MAX1932_HV_NUMBITS (8) -#define MAX1932_HV_DATA_OFST (0) -#define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST) +#define MAX1932_HV_NUMBITS (8) +#define MAX1932_HV_DATA_OFST (0) +#define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST) // higher voltage requires lower dac value, 0 is off -#define MAX1932_MIN_DAC_VAL (0xFF) -#define MAX1932_MAX_DAC_VAL (0x1) -#define MAX1932_POWER_OFF_DAC_VAL (0x0) +#define MAX1932_MIN_DAC_VAL (0xFF) +#define MAX1932_MAX_DAC_VAL (0x1) +#define MAX1932_POWER_OFF_DAC_VAL (0x0) // defines from the fpga uint32_t MAX1932_Reg = 0x0; @@ -24,8 +24,8 @@ int MAX1932_DigOffset = 0x0; int MAX1932_MinVoltage = 0; int MAX1932_MaxVoltage = 0; -void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t dmsk, int dofst, - int minMV, int maxMV) { +void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, + uint32_t dmsk, int dofst, int minMV, int maxMV) { LOG(logINFOBLUE, ("Configuring High Voltage\n")); MAX1932_Reg = reg; MAX1932_CsMask = cmsk; @@ -37,13 +37,11 @@ void MAX1932_SetDefines(uint32_t reg, uint32_t cmsk, uint32_t clkmsk, uint32_t d } void MAX1932_Disable() { - bus_w(MAX1932_Reg, (bus_r(MAX1932_Reg) - | MAX1932_CsMask - | MAX1932_ClkMask) - & ~(MAX1932_DigMask)); + bus_w(MAX1932_Reg, (bus_r(MAX1932_Reg) | MAX1932_CsMask | MAX1932_ClkMask) & + ~(MAX1932_DigMask)); } -int MAX1932_Set (int* val) { +int MAX1932_Set(int *val) { LOG(logDEBUG1, ("Setting high voltage to %d\n", *val)); if (*val < 0) return FAIL; @@ -64,17 +62,13 @@ int MAX1932_Set (int* val) { else { // no failure in conversion as limits handled (range from 0x1 to 0xFF) ConvertToDifferentRange(MAX1932_MinVoltage, MAX1932_MaxVoltage, - MAX1932_MIN_DAC_VAL, MAX1932_MAX_DAC_VAL, - *val, &dacvalue); + MAX1932_MIN_DAC_VAL, MAX1932_MAX_DAC_VAL, *val, + &dacvalue); dacvalue &= MAX1932_HV_DATA_MSK; } LOG(logINFO, ("\t%dV (dacval %d)\n", *val, dacvalue)); serializeToSPI(MAX1932_Reg, dacvalue, MAX1932_CsMask, MAX1932_HV_NUMBITS, - MAX1932_ClkMask, MAX1932_DigMask, MAX1932_DigOffset, 0); + MAX1932_ClkMask, MAX1932_DigMask, MAX1932_DigOffset, 0); return OK; } - - - - diff --git a/slsDetectorServers/slsDetectorServer/src/UDPPacketHeaderGenerator.c b/slsDetectorServers/slsDetectorServer/src/UDPPacketHeaderGenerator.c old mode 100755 new mode 100644 index 9ed9f2629..1c66439c0 --- a/slsDetectorServers/slsDetectorServer/src/UDPPacketHeaderGenerator.c +++ b/slsDetectorServers/slsDetectorServer/src/UDPPacketHeaderGenerator.c @@ -2,117 +2,122 @@ #include "clogger.h" #include "sls_detector_defs.h" -#include -#include -#include -#include #include -#include -#include -#include #include #include +#include +#include +#include +#include +#include +#include +#include -#define UDP_PACKET_HEADER_VERSION (0x1) +#define UDP_PACKET_HEADER_VERSION (0x1) extern const enum detectorType myDetectorType; extern int analogDataBytes; extern int digitalDataBytes; -extern char* analogData; -extern char* digitalData; +extern char *analogData; +extern char *digitalData; int analogOffset = 0; int digitalOffset = 0; uint32_t udpPacketNumber = 0; uint64_t udpFrameNumber = 0; +uint32_t getUDPPacketNumber() { return udpPacketNumber; } -uint32_t getUDPPacketNumber() { - return udpPacketNumber; +uint64_t getUDPFrameNumber() { return udpFrameNumber; } + +void createUDPPacketHeader(char *buffer, uint16_t id) { + memset(buffer, 0, sizeof(sls_detector_header)); + sls_detector_header *header = (sls_detector_header *)(buffer); + + header->modId = id; + // row and column remains 0 (only used by ctb now) + // uint64_t timestamp FIXME: needed? + header->detType = (uint16_t)myDetectorType; + header->version = UDP_PACKET_HEADER_VERSION; + + // reset offset + analogOffset = 0; + digitalOffset = 0; + // reset frame number + udpFrameNumber = 0; } -uint64_t getUDPFrameNumber() { - return udpFrameNumber; -} - -void createUDPPacketHeader(char* buffer, uint16_t id) { - memset(buffer, 0, sizeof(sls_detector_header)); - sls_detector_header* header = (sls_detector_header*)(buffer); - - header->modId = id; - // row and column remains 0 (only used by ctb now) - // uint64_t timestamp FIXME: needed? - header->detType = (uint16_t)myDetectorType; - header->version = UDP_PACKET_HEADER_VERSION; - - // reset offset - analogOffset = 0; - digitalOffset = 0; - // reset frame number - udpFrameNumber = 0; -} - -int fillUDPPacket(char* buffer) { - LOG(logDEBUG2, ("Analog (databytes:%d, offset:%d)\n Digital (databytes:%d offset:%d)\n", - analogDataBytes, analogOffset, digitalDataBytes, digitalOffset)); - // reached end of data for one frame - if (analogOffset >= analogDataBytes && digitalOffset >= digitalDataBytes) { - // reset offset - analogOffset = 0; - digitalOffset = 0; - return 0; - } - - sls_detector_header* header = (sls_detector_header*)(buffer); - - // update frame number, starts at 1 (reset packet number) - if (analogOffset == 0 && digitalOffset == 0) { - ++udpFrameNumber; - header->frameNumber = udpFrameNumber; - udpPacketNumber = -1; - } - - // increment and copy udp packet number (starts at 0) - ++udpPacketNumber; - header->packetNumber = udpPacketNumber; - LOG(logDEBUG2, ("Creating packet number %d (fnum:%lld)\n", udpPacketNumber, (long long int) udpFrameNumber)); - - int freeBytes = UDP_PACKET_DATA_BYTES; - - // analog data - int analogBytes = 0; - if (analogOffset < analogDataBytes) { - // bytes to copy - analogBytes = ((analogOffset + freeBytes) <= analogDataBytes) ? - freeBytes : (analogDataBytes - analogOffset); - // copy - memcpy(buffer + sizeof(sls_detector_header), analogData + analogOffset, analogBytes); - // increment offset - analogOffset += analogBytes; - // decrement free bytes - freeBytes -= analogBytes; - } - - // digital data - int digitalBytes = 0; - if (freeBytes && digitalOffset < digitalDataBytes) { - // bytes to copy - digitalBytes = ((digitalOffset + freeBytes) <= digitalDataBytes) ? - freeBytes : (digitalDataBytes - digitalOffset); - // copy - memcpy(buffer + sizeof(sls_detector_header) + analogBytes, digitalData + digitalOffset, digitalBytes); - // increment offset - digitalOffset += digitalBytes; - // decrement free bytes - freeBytes -= digitalBytes; - } - - // pad data - if (freeBytes) { - memset(buffer + sizeof(sls_detector_header) + analogBytes + digitalBytes, 0, freeBytes); - LOG(logDEBUG1, ("Padding %d bytes for fnum:%lld pnum:%d\n", freeBytes, (long long int)udpFrameNumber, udpPacketNumber)); - } - - return UDP_PACKET_DATA_BYTES + sizeof(sls_detector_header); +int fillUDPPacket(char *buffer) { + LOG(logDEBUG2, + ("Analog (databytes:%d, offset:%d)\n Digital (databytes:%d " + "offset:%d)\n", + analogDataBytes, analogOffset, digitalDataBytes, digitalOffset)); + // reached end of data for one frame + if (analogOffset >= analogDataBytes && digitalOffset >= digitalDataBytes) { + // reset offset + analogOffset = 0; + digitalOffset = 0; + return 0; + } + + sls_detector_header *header = (sls_detector_header *)(buffer); + + // update frame number, starts at 1 (reset packet number) + if (analogOffset == 0 && digitalOffset == 0) { + ++udpFrameNumber; + header->frameNumber = udpFrameNumber; + udpPacketNumber = -1; + } + + // increment and copy udp packet number (starts at 0) + ++udpPacketNumber; + header->packetNumber = udpPacketNumber; + LOG(logDEBUG2, ("Creating packet number %d (fnum:%lld)\n", udpPacketNumber, + (long long int)udpFrameNumber)); + + int freeBytes = UDP_PACKET_DATA_BYTES; + + // analog data + int analogBytes = 0; + if (analogOffset < analogDataBytes) { + // bytes to copy + analogBytes = ((analogOffset + freeBytes) <= analogDataBytes) + ? freeBytes + : (analogDataBytes - analogOffset); + // copy + memcpy(buffer + sizeof(sls_detector_header), analogData + analogOffset, + analogBytes); + // increment offset + analogOffset += analogBytes; + // decrement free bytes + freeBytes -= analogBytes; + } + + // digital data + int digitalBytes = 0; + if (freeBytes && digitalOffset < digitalDataBytes) { + // bytes to copy + digitalBytes = ((digitalOffset + freeBytes) <= digitalDataBytes) + ? freeBytes + : (digitalDataBytes - digitalOffset); + // copy + memcpy(buffer + sizeof(sls_detector_header) + analogBytes, + digitalData + digitalOffset, digitalBytes); + // increment offset + digitalOffset += digitalBytes; + // decrement free bytes + freeBytes -= digitalBytes; + } + + // pad data + if (freeBytes) { + memset(buffer + sizeof(sls_detector_header) + analogBytes + + digitalBytes, + 0, freeBytes); + LOG(logDEBUG1, ("Padding %d bytes for fnum:%lld pnum:%d\n", freeBytes, + (long long int)udpFrameNumber, udpPacketNumber)); + } + + return UDP_PACKET_DATA_BYTES + sizeof(sls_detector_header); } diff --git a/slsDetectorServers/slsDetectorServer/src/blackfin.c b/slsDetectorServers/slsDetectorServer/src/blackfin.c old mode 100755 new mode 100644 index c30ad7e45..c3989821e --- a/slsDetectorServers/slsDetectorServer/src/blackfin.c +++ b/slsDetectorServers/slsDetectorServer/src/blackfin.c @@ -1,85 +1,84 @@ #include "blackfin.h" #include "RegisterDefs.h" -#include "sls_detector_defs.h" #include "ansi.h" #include "clogger.h" +#include "sls_detector_defs.h" -#include // open -#include // mmap +#include // open +#include // mmap /* global variables */ -u_int32_t* csp0base = 0; -#define CSP0 0x20200000 +u_int32_t *csp0base = 0; +#define CSP0 0x20200000 #define MEM_SIZE 0x100000 - void bus_w16(u_int32_t offset, u_int16_t data) { - volatile u_int16_t *ptr1; - ptr1=(u_int16_t*)(csp0base + offset / 2); - *ptr1=data; + volatile u_int16_t *ptr1; + ptr1 = (u_int16_t *)(csp0base + offset / 2); + *ptr1 = data; } -u_int16_t bus_r16(u_int32_t offset){ - volatile u_int16_t *ptr1; - ptr1=(u_int16_t*)(csp0base + offset / 2); - return *ptr1; +u_int16_t bus_r16(u_int32_t offset) { + volatile u_int16_t *ptr1; + ptr1 = (u_int16_t *)(csp0base + offset / 2); + return *ptr1; } void bus_w(u_int32_t offset, u_int32_t data) { - volatile u_int32_t *ptr1; - ptr1=(u_int32_t*)(csp0base + offset / 2); - *ptr1=data; + volatile u_int32_t *ptr1; + ptr1 = (u_int32_t *)(csp0base + offset / 2); + *ptr1 = data; } u_int32_t bus_r(u_int32_t offset) { - volatile u_int32_t *ptr1; - ptr1=(u_int32_t*)(csp0base + offset / 2); - return *ptr1; + volatile u_int32_t *ptr1; + ptr1 = (u_int32_t *)(csp0base + offset / 2); + return *ptr1; } -int64_t get64BitReg(int aLSB, int aMSB){ - int64_t v64; - u_int32_t vLSB,vMSB; - vLSB=bus_r(aLSB); - vMSB=bus_r(aMSB); - v64=vMSB; - v64=(v64<<32) | vLSB; - LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, (long long unsigned int)v64)); - return v64; +int64_t get64BitReg(int aLSB, int aMSB) { + int64_t v64; + u_int32_t vLSB, vMSB; + vLSB = bus_r(aLSB); + vMSB = bus_r(aMSB); + v64 = vMSB; + v64 = (v64 << 32) | vLSB; + LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, + (long long unsigned int)v64)); + return v64; } -int64_t set64BitReg(int64_t value, int aLSB, int aMSB){ - int64_t v64; - u_int32_t vLSB,vMSB; - if (value!=-1) { - vLSB=value&(0xffffffff); - bus_w(aLSB,vLSB); - v64=value>> 32; - vMSB=v64&(0xffffffff); - bus_w(aMSB,vMSB); - } - return get64BitReg(aLSB, aMSB); - +int64_t set64BitReg(int64_t value, int aLSB, int aMSB) { + int64_t v64; + u_int32_t vLSB, vMSB; + if (value != -1) { + vLSB = value & (0xffffffff); + bus_w(aLSB, vLSB); + v64 = value >> 32; + vMSB = v64 & (0xffffffff); + bus_w(aMSB, vMSB); + } + return get64BitReg(aLSB, aMSB); } -uint64_t getU64BitReg(int aLSB, int aMSB){ - uint64_t retval = bus_r(aMSB); - retval = (retval << 32) | bus_r(aLSB); - return retval; +uint64_t getU64BitReg(int aLSB, int aMSB) { + uint64_t retval = bus_r(aMSB); + retval = (retval << 32) | bus_r(aLSB); + return retval; } -void setU64BitReg(uint64_t value, int aLSB, int aMSB){ - bus_w(aLSB, value & (0xffffffff)); - bus_w(aMSB, (value >> 32) & (0xffffffff)); +void setU64BitReg(uint64_t value, int aLSB, int aMSB) { + bus_w(aLSB, value & (0xffffffff)); + bus_w(aMSB, (value >> 32) & (0xffffffff)); } u_int32_t readRegister(u_int32_t offset) { - return bus_r(offset << MEM_MAP_SHIFT); + return bus_r(offset << MEM_MAP_SHIFT); } u_int32_t writeRegister(u_int32_t offset, u_int32_t data) { - bus_w(offset << MEM_MAP_SHIFT, data); - return readRegister(offset); + bus_w(offset << MEM_MAP_SHIFT, data); + return readRegister(offset); } u_int32_t readRegister16(u_int32_t offset) { @@ -92,39 +91,37 @@ u_int32_t writeRegister16(u_int32_t offset, u_int32_t data) { } int mapCSP0(void) { - // if not mapped - if (csp0base == 0) { - LOG(logINFO, ("Mapping memory\n")); + // if not mapped + if (csp0base == 0) { + LOG(logINFO, ("Mapping memory\n")); #ifdef VIRTUAL - csp0base = malloc(MEM_SIZE); - if (csp0base == NULL) { - LOG(logERROR, ("Could not allocate virtual memory.\n")); - return FAIL; - } - LOG(logINFO, ("memory allocated\n")); + csp0base = malloc(MEM_SIZE); + if (csp0base == NULL) { + LOG(logERROR, ("Could not allocate virtual memory.\n")); + return FAIL; + } + LOG(logINFO, ("memory allocated\n")); #else - int fd; - fd = open("/dev/mem", O_RDWR | O_SYNC, 0); - if (fd == -1) { - LOG(logERROR, ("Can't find /dev/mem\n")); - return FAIL; - } - LOG(logDEBUG1, ("/dev/mem opened\n")); - csp0base = mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, CSP0); - if (csp0base == MAP_FAILED) { - LOG(logERROR, ("Can't map memmory area\n")); - return FAIL; - } + int fd; + fd = open("/dev/mem", O_RDWR | O_SYNC, 0); + if (fd == -1) { + LOG(logERROR, ("Can't find /dev/mem\n")); + return FAIL; + } + LOG(logDEBUG1, ("/dev/mem opened\n")); + csp0base = mmap(0, MEM_SIZE, PROT_READ | PROT_WRITE, + MAP_FILE | MAP_SHARED, fd, CSP0); + if (csp0base == MAP_FAILED) { + LOG(logERROR, ("Can't map memmory area\n")); + return FAIL; + } #endif - LOG(logINFO, ("csp0base mapped from %p to %p\n", - csp0base, (csp0base + MEM_SIZE))); - LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); - }else - LOG(logINFO, ("Memory already mapped before\n")); - return OK; + LOG(logINFO, ("csp0base mapped from %p to %p\n", csp0base, + (csp0base + MEM_SIZE))); + LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); + } else + LOG(logINFO, ("Memory already mapped before\n")); + return OK; } - -uint32_t* Blackfin_getBaseAddress() { - return csp0base; -} \ No newline at end of file +uint32_t *Blackfin_getBaseAddress() { return csp0base; } \ No newline at end of file diff --git a/slsDetectorServers/slsDetectorServer/src/common.c b/slsDetectorServers/slsDetectorServer/src/common.c old mode 100755 new mode 100644 index 88ae61223..b269f754e --- a/slsDetectorServers/slsDetectorServer/src/common.c +++ b/slsDetectorServers/slsDetectorServer/src/common.c @@ -2,13 +2,14 @@ #include "clogger.h" #include "sls_detector_defs.h" -int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outputMax, - int inputValue, int* outputValue) { +int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, + int outputMax, int inputValue, int *outputValue) { LOG(logDEBUG1, (" Input Value: %d (Input:(%d - %d), Output:(%d - %d))\n", - inputValue, inputMin, inputMax, outputMin, outputMax)); + inputValue, inputMin, inputMax, outputMin, outputMax)); // validate within bounds - // eg. MAX1932 range is v(60 - 200) to dac(255 - 1), here inputMin > inputMax (when dac to voltage) + // eg. MAX1932 range is v(60 - 200) to dac(255 - 1), here inputMin > + // inputMax (when dac to voltage) int smaller = inputMin; int bigger = inputMax; if (smaller > bigger) { @@ -16,13 +17,16 @@ int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outpu bigger = inputMin; } if ((inputValue < smaller) || (inputValue > bigger)) { - LOG(logERROR, ("Input Value is outside bounds (%d to %d): %d\n", smaller, bigger, inputValue)); + LOG(logERROR, ("Input Value is outside bounds (%d to %d): %d\n", + smaller, bigger, inputValue)); *outputValue = -1; return FAIL; } - double value = ((double)(inputValue - inputMin) * (double)(outputMax - outputMin)) - / (double)(inputMax - inputMin) + outputMin; + double value = + ((double)(inputValue - inputMin) * (double)(outputMax - outputMin)) / + (double)(inputMax - inputMin) + + outputMin; // double to integer conversion (if decimal places, round to integer) if ((value - (int)value) > 0.0001) { @@ -33,4 +37,3 @@ int ConvertToDifferentRange(int inputMin, int inputMax, int outputMin, int outpu LOG(logDEBUG1, (" Converted Output Value: %d\n", *outputValue)); return OK; } - diff --git a/slsDetectorServers/slsDetectorServer/src/commonServerFunctions.c b/slsDetectorServers/slsDetectorServer/src/commonServerFunctions.c old mode 100755 new mode 100644 index 6e5af25cf..373292b81 --- a/slsDetectorServers/slsDetectorServer/src/commonServerFunctions.c +++ b/slsDetectorServers/slsDetectorServer/src/commonServerFunctions.c @@ -2,97 +2,114 @@ #include "blackfin.h" #include "clogger.h" -#include // usleep +#include // usleep -void SPIChipSelect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t clkmask, uint32_t digoutmask, int convBit) { - LOG(logDEBUG2, ("SPI chip select. valw:0x%08x addr:0x%x csmask:0x%x, clkmask:0x%x digmask:0x%x convbit:%d\n", - *valw, addr, csmask, clkmask, digoutmask, convBit)); +void SPIChipSelect(uint32_t *valw, uint32_t addr, uint32_t csmask, + uint32_t clkmask, uint32_t digoutmask, int convBit) { + LOG(logDEBUG2, ("SPI chip select. valw:0x%08x addr:0x%x csmask:0x%x, " + "clkmask:0x%x digmask:0x%x convbit:%d\n", + *valw, addr, csmask, clkmask, digoutmask, convBit)); // start point if (convBit) { - // needed for the slow adcs for apprx 20 ns before and after rising of convbit (usleep val is vague assumption) - usleep(20); - // clkmask has to be down for conversion to have correct value (for conv bit = 1) - (*valw) = (((bus_r(addr) | csmask) &(~clkmask)) &(~digoutmask)); + // needed for the slow adcs for apprx 20 ns before and after rising of + // convbit (usleep val is vague assumption) + usleep(20); + // clkmask has to be down for conversion to have correct value (for conv + // bit = 1) + (*valw) = (((bus_r(addr) | csmask) & (~clkmask)) & (~digoutmask)); } else { - (*valw) = ((bus_r(addr) | csmask | clkmask) &(~digoutmask)); + (*valw) = ((bus_r(addr) | csmask | clkmask) & (~digoutmask)); } - bus_w (addr, (*valw)); + bus_w(addr, (*valw)); LOG(logDEBUG2, ("startpoint. valw:0x%08x\n", *valw)); - // needed for the slow adcs for apprx 10 ns before and after rising of convbit (usleep val is vague assumption) + // needed for the slow adcs for apprx 10 ns before and after rising of + // convbit (usleep val is vague assumption) if (convBit) - usleep(10); + usleep(10); // chip sel bar down (*valw) &= ~csmask; - bus_w (addr, (*valw)); + bus_w(addr, (*valw)); LOG(logDEBUG2, ("chip sel bar down. valw:0x%08x\n", *valw)); } +void SPIChipDeselect(uint32_t *valw, uint32_t addr, uint32_t csmask, + uint32_t clkmask, uint32_t digoutmask, int convBit) { + LOG(logDEBUG2, ("SPI chip deselect. valw:0x%08x addr:0x%x csmask:0x%x, " + "clkmask:0x%x digmask:0x%x convbit:%d\n", + *valw, addr, csmask, clkmask, digoutmask, convBit)); -void SPIChipDeselect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t clkmask, uint32_t digoutmask, int convBit) { - LOG(logDEBUG2, ("SPI chip deselect. valw:0x%08x addr:0x%x csmask:0x%x, clkmask:0x%x digmask:0x%x convbit:%d\n", - *valw, addr, csmask, clkmask, digoutmask, convBit)); - - // needed for the slow adcs for apprx 20 ns before and after rising of convbit (usleep val is vague assumption) + // needed for the slow adcs for apprx 20 ns before and after rising of + // convbit (usleep val is vague assumption) if (convBit) - usleep(20); + usleep(20); // chip sel bar up (*valw) |= csmask; - bus_w (addr, (*valw)); + bus_w(addr, (*valw)); LOG(logDEBUG2, ("chip sel bar up. valw:0x%08x\n", *valw)); - // needed for the slow adcs for apprx 10 ns before and after rising of convbit (usleep val is vague assumption) + // needed for the slow adcs for apprx 10 ns before and after rising of + // convbit (usleep val is vague assumption) if (convBit) - usleep(10); + usleep(10); - //clk down + // clk down (*valw) &= ~clkmask; - bus_w (addr, (*valw)); + bus_w(addr, (*valw)); LOG(logDEBUG2, ("clk down. valw:0x%08x\n", *valw)); // stop point = start point of course (*valw) &= ~digoutmask; // slow adcs use convBit (has to go high and then low) instead of csmask if (convBit) { - (*valw) &= ~csmask; + (*valw) &= ~csmask; } else { - (*valw) |= csmask; + (*valw) |= csmask; } - bus_w (addr, (*valw)); //FIXME: for ctb slow adcs, might need to set it to low again + bus_w( + addr, + (*valw)); // FIXME: for ctb slow adcs, might need to set it to low again LOG(logDEBUG2, ("stop point. valw:0x%08x\n", *valw)); } -void sendDataToSPI (uint32_t* valw, uint32_t addr, uint32_t val, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset) { - LOG(logDEBUG2, ("SPI send data. valw:0x%08x addr:0x%x val:0x%x, numbitstosend:%d, clkmask:0x%x digmask:0x%x digofst:%d\n", - *valw, addr, val, numbitstosend, clkmask, digoutmask, digofset)); +void sendDataToSPI(uint32_t *valw, uint32_t addr, uint32_t val, + int numbitstosend, uint32_t clkmask, uint32_t digoutmask, + int digofset) { + LOG(logDEBUG2, + ("SPI send data. valw:0x%08x addr:0x%x val:0x%x, numbitstosend:%d, " + "clkmask:0x%x digmask:0x%x digofst:%d\n", + *valw, addr, val, numbitstosend, clkmask, digoutmask, digofset)); int i = 0; for (i = 0; i < numbitstosend; ++i) { // clk down (*valw) &= ~clkmask; - bus_w (addr, (*valw)); + bus_w(addr, (*valw)); LOG(logDEBUG2, ("clk down. valw:0x%08x\n", *valw)); // write data (i) - (*valw) = (((*valw) & ~digoutmask) + // unset bit - (((val >> (numbitstosend - 1 - i)) & 0x1) << digofset)); // each bit from val starting from msb - bus_w (addr, (*valw)); + (*valw) = (((*valw) & ~digoutmask) + // unset bit + (((val >> (numbitstosend - 1 - i)) & 0x1) + << digofset)); // each bit from val starting from msb + bus_w(addr, (*valw)); LOG(logDEBUG2, ("write data %d. valw:0x%08x\n", i, *valw)); // clk up - (*valw) |= clkmask ; - bus_w (addr, (*valw)); + (*valw) |= clkmask; + bus_w(addr, (*valw)); LOG(logDEBUG2, ("clk up. valw:0x%08x\n", *valw)); } } -uint32_t receiveDataFromSPI (uint32_t* valw, uint32_t addr, int numbitstoreceive, uint32_t clkmask, uint32_t readaddr) { - LOG(logDEBUG2, ("SPI send data. valw:0x%08x addr:0x%x numbitstoreceive:%d, clkmask:0x%x readaddr:0x%x \n", - *valw, addr, numbitstoreceive, clkmask, readaddr)); +uint32_t receiveDataFromSPI(uint32_t *valw, uint32_t addr, int numbitstoreceive, + uint32_t clkmask, uint32_t readaddr) { + LOG(logDEBUG2, ("SPI send data. valw:0x%08x addr:0x%x numbitstoreceive:%d, " + "clkmask:0x%x readaddr:0x%x \n", + *valw, addr, numbitstoreceive, clkmask, readaddr)); uint32_t retval = 0; int i = 0; @@ -101,7 +118,7 @@ uint32_t receiveDataFromSPI (uint32_t* valw, uint32_t addr, int numbitstoreceive // clk down (*valw) &= ~clkmask; - bus_w (addr, (*valw)); + bus_w(addr, (*valw)); LOG(logDEBUG2, ("clk down. valw:0x%08x\n", *valw)); // read data (i) @@ -111,17 +128,19 @@ uint32_t receiveDataFromSPI (uint32_t* valw, uint32_t addr, int numbitstoreceive usleep(20); // clk up - (*valw) |= clkmask ; - bus_w (addr, (*valw)); + (*valw) |= clkmask; + bus_w(addr, (*valw)); LOG(logDEBUG2, ("clk up. valw:0x%08x\n", *valw)); usleep(20); } - + return retval; } -void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset, int convBit) { +void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask, + int numbitstosend, uint32_t clkmask, uint32_t digoutmask, + int digofset, int convBit) { if (numbitstosend == 16) { LOG(logDEBUG2, ("Writing to SPI Register: 0x%04x\n", val)); } else { @@ -129,23 +148,28 @@ void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask, int numbitstos } uint32_t valw; - SPIChipSelect (&valw, addr, csmask, clkmask, digoutmask, convBit); + SPIChipSelect(&valw, addr, csmask, clkmask, digoutmask, convBit); - sendDataToSPI(&valw, addr, val, numbitstosend, clkmask, digoutmask, digofset); + sendDataToSPI(&valw, addr, val, numbitstosend, clkmask, digoutmask, + digofset); SPIChipDeselect(&valw, addr, csmask, clkmask, digoutmask, convBit); } -uint32_t serializeFromSPI(uint32_t addr, uint32_t csmask, int numbitstoreceive, uint32_t clkmask, uint32_t digoutmask, uint32_t readaddr, int convBit) { +uint32_t serializeFromSPI(uint32_t addr, uint32_t csmask, int numbitstoreceive, + uint32_t clkmask, uint32_t digoutmask, + uint32_t readaddr, int convBit) { uint32_t valw; - SPIChipSelect (&valw, addr, csmask, clkmask, digoutmask, convBit); + SPIChipSelect(&valw, addr, csmask, clkmask, digoutmask, convBit); - uint32_t retval = receiveDataFromSPI(&valw, addr, numbitstoreceive, clkmask, readaddr); + uint32_t retval = + receiveDataFromSPI(&valw, addr, numbitstoreceive, clkmask, readaddr); // not needed for conv bit (not a chip select) - //SPIChipDeselect(&valw, addr, csmask, clkmask, digoutmask, convBit); // moving this before bringin up earlier changes temp of slow adc + // SPIChipDeselect(&valw, addr, csmask, clkmask, digoutmask, convBit); // + // moving this before bringin up earlier changes temp of slow adc if (numbitstoreceive == 16) { LOG(logDEBUG2, ("Read From SPI Register: 0x%04x\n", retval)); diff --git a/slsDetectorServers/slsDetectorServer/src/communication_funcs.c b/slsDetectorServers/slsDetectorServer/src/communication_funcs.c old mode 100755 new mode 100644 index 959f0011f..ed73b66e1 --- a/slsDetectorServers/slsDetectorServer/src/communication_funcs.c +++ b/slsDetectorServers/slsDetectorServer/src/communication_funcs.c @@ -1,27 +1,24 @@ -#include "communication_funcs.h" +#include "communication_funcs.h" #include "clogger.h" -#include -#include #include +#include +#include #include #include - - #define SEND_REC_MAX_SIZE 4096 #define DEFAULT_PORTNO 1952 -#define DEFAULT_BACKLOG 5 +#define DEFAULT_BACKLOG 5 // blackfin limits #define CPU_DRVR_SND_LMT (30000) // rough limit #define CPU_RSND_PCKT_LOOP (10) #define CPU_RSND_WAIT_US (1) - // Global variables from errno.h -//extern int errno; +// extern int errno; // Variables that will be exported int lockStatus = 0; @@ -41,594 +38,593 @@ fd_set readset, tempset; // number of socket descrptor listening to int isock = 0; // value of socket descriptor, -//becomes max value of socket descriptor (listen) and file descriptor (accept) +// becomes max value of socket descriptor (listen) and file descriptor (accept) int maxfd = 0; - int bindSocket(unsigned short int port_number) { - ret = FAIL; - int socketDescriptor = -1; - int i = 0; - struct sockaddr_in addressS; + ret = FAIL; + int socketDescriptor = -1; + int i = 0; + struct sockaddr_in addressS; - // same port - if (myport == port_number) { - sprintf(mess, "Cannot create %s socket with port %d. Already in use before.\n", - (isControlServer ? "control":"stop"), port_number); - LOG(logERROR, (mess)); - } - // port ok - else { + // same port + if (myport == port_number) { + sprintf( + mess, + "Cannot create %s socket with port %d. Already in use before.\n", + (isControlServer ? "control" : "stop"), port_number); + LOG(logERROR, (mess)); + } + // port ok + else { - // create socket - socketDescriptor = socket(AF_INET, SOCK_STREAM,0); - // socket error - if (socketDescriptor < 0) { - sprintf(mess, "Cannot create %s socket with port %d\n", - (isControlServer ? "control":"stop"), port_number); - LOG(logERROR, (mess)); - } - // socket success - else { - i = 1; - // set port reusable - setsockopt(socketDescriptor, SOL_SOCKET, SO_REUSEADDR, &i, sizeof(i)); - // Set some fields in the serverAddress structure - addressS.sin_family = AF_INET; - addressS.sin_addr.s_addr = htonl(INADDR_ANY); - addressS.sin_port = htons(port_number); + // create socket + socketDescriptor = socket(AF_INET, SOCK_STREAM, 0); + // socket error + if (socketDescriptor < 0) { + sprintf(mess, "Cannot create %s socket with port %d\n", + (isControlServer ? "control" : "stop"), port_number); + LOG(logERROR, (mess)); + } + // socket success + else { + i = 1; + // set port reusable + setsockopt(socketDescriptor, SOL_SOCKET, SO_REUSEADDR, &i, + sizeof(i)); + // Set some fields in the serverAddress structure + addressS.sin_family = AF_INET; + addressS.sin_addr.s_addr = htonl(INADDR_ANY); + addressS.sin_port = htons(port_number); - // bind socket error - if(bind(socketDescriptor,(struct sockaddr *) &addressS,sizeof(addressS)) < 0){ - sprintf(mess, "Cannot bind %s socket to port %d.\n", - (isControlServer ? "control":"stop"), port_number); - LOG(logERROR, (mess)); - } - // bind socket ok - else { + // bind socket error + if (bind(socketDescriptor, (struct sockaddr *)&addressS, + sizeof(addressS)) < 0) { + sprintf(mess, "Cannot bind %s socket to port %d.\n", + (isControlServer ? "control" : "stop"), port_number); + LOG(logERROR, (mess)); + } + // bind socket ok + else { - // listen to socket - if (listen(socketDescriptor, DEFAULT_BACKLOG) == 0) { - // clear set of descriptors. set of descriptors needed? - if (isock == 0) { - FD_ZERO(&readset); - } - // add a socket descriptor from listen - FD_SET(socketDescriptor, &readset); - isock++; - maxfd = socketDescriptor; - // success - myport = port_number; - ret = OK; - LOG(logDEBUG1, ("%s socket bound: isock=%d, port=%d, fd=%d\n", - (isControlServer ? "Control":"Stop"), isock, port_number, socketDescriptor)); + // listen to socket + if (listen(socketDescriptor, DEFAULT_BACKLOG) == 0) { + // clear set of descriptors. set of descriptors needed? + if (isock == 0) { + FD_ZERO(&readset); + } + // add a socket descriptor from listen + FD_SET(socketDescriptor, &readset); + isock++; + maxfd = socketDescriptor; + // success + myport = port_number; + ret = OK; + LOG(logDEBUG1, + ("%s socket bound: isock=%d, port=%d, fd=%d\n", + (isControlServer ? "Control" : "Stop"), isock, + port_number, socketDescriptor)); - } - // listen socket error - else { - sprintf(mess, "Cannot bind %s socket to port %d.\n", - (isControlServer ? "control":"stop"), port_number); - LOG(logERROR, (mess)); - } - } - } - } + } + // listen socket error + else { + sprintf(mess, "Cannot bind %s socket to port %d.\n", + (isControlServer ? "control" : "stop"), + port_number); + LOG(logERROR, (mess)); + } + } + } + } - return socketDescriptor; + return socketDescriptor; } - - int acceptConnection(int socketDescriptor) { - int j; - struct sockaddr_in addressC; - int file_des = -1; - struct timeval tv; - socklen_t address_length = sizeof(struct sockaddr_in); + int j; + struct sockaddr_in addressC; + int file_des = -1; + struct timeval tv; + socklen_t address_length = sizeof(struct sockaddr_in); - if (socketDescriptor < 0) - return -1; + if (socketDescriptor < 0) + return -1; - // copy file descriptor set temporarily - memcpy(&tempset, &readset, sizeof(tempset)); + // copy file descriptor set temporarily + memcpy(&tempset, &readset, sizeof(tempset)); - // set time out as 2777.77 hours? - tv.tv_sec = 10000000; - tv.tv_usec = 0; + // set time out as 2777.77 hours? + tv.tv_sec = 10000000; + tv.tv_usec = 0; - // monitor file descrptors - int result = select(maxfd + 1, &tempset, NULL, NULL, &tv); + // monitor file descrptors + int result = select(maxfd + 1, &tempset, NULL, NULL, &tv); - // timeout - if (result == 0) { - LOG(logDEBUG3, ("%s socket select() timed out!\n", - (isControlServer ? "control":"stop"), myport)); - } + // timeout + if (result == 0) { + LOG(logDEBUG3, ("%s socket select() timed out!\n", + (isControlServer ? "control" : "stop"), myport)); + } - // error (not signal caught) - else if (result < 0 && errno != EINTR) { - LOG(logERROR, ("%s socket select() error: %s\n", - (isControlServer ? "control":"stop"), myport, strerror(errno))); - } + // error (not signal caught) + else if (result < 0 && errno != EINTR) { + LOG(logERROR, + ("%s socket select() error: %s\n", + (isControlServer ? "control" : "stop"), myport, strerror(errno))); + } - // activity in descriptor set - else if (result > 0) { - LOG(logDEBUG3, ("%s select returned!\n", (isControlServer ? "control":"stop"))); + // activity in descriptor set + else if (result > 0) { + LOG(logDEBUG3, + ("%s select returned!\n", (isControlServer ? "control" : "stop"))); - // loop through the file descriptor set - for (j = 0; j < maxfd + 1; ++j) { + // loop through the file descriptor set + for (j = 0; j < maxfd + 1; ++j) { - // checks if file descriptor part of set - if (FD_ISSET(j, &tempset)) { - LOG(logDEBUG3, ("fd %d is set\n",j)); + // checks if file descriptor part of set + if (FD_ISSET(j, &tempset)) { + LOG(logDEBUG3, ("fd %d is set\n", j)); - // clear the temporary set - FD_CLR(j, &tempset); + // clear the temporary set + FD_CLR(j, &tempset); - // accept connection (if error) - if ((file_des = accept(j,(struct sockaddr *) &addressC, &address_length)) < 0) { - LOG(logERROR, ("%s socket accept() error. Connection refused.\n", - "Error Number: %d, Message: %s\n", - (isControlServer ? "control":"stop"), - myport, errno, strerror(errno))); - switch(errno) { - case EWOULDBLOCK: - LOG(logERROR, ("ewouldblock eagain")); - break; - case EBADF: - LOG(logERROR, ("ebadf\n")); - break; - case ECONNABORTED: - LOG(logERROR, ("econnaborted\n")); - break; - case EFAULT: - LOG(logERROR, ("efault\n")); - break; - case EINTR: - LOG(logERROR, ("eintr\n")); - break; - case EINVAL: - LOG(logERROR, ("einval\n")); - break; - case EMFILE: - LOG(logERROR, ("emfile\n")); - break; - case ENFILE: - LOG(logERROR, ("enfile\n")); - break; - case ENOTSOCK: - LOG(logERROR, ("enotsock\n")); - break; - case EOPNOTSUPP: - LOG(logERROR, ("eOPNOTSUPP\n")); - break; - case ENOBUFS: - LOG(logERROR, ("ENOBUFS\n")); - break; - case ENOMEM: - LOG(logERROR, ("ENOMEM\n")); - break; - case ENOSR: - LOG(logERROR, ("ENOSR\n")); - break; - case EPROTO: - LOG(logERROR, ("EPROTO\n")); - break; - default: - LOG(logERROR, ("unknown error\n")); - } - } - // accept success - else { - char buf[INET_ADDRSTRLEN] = ""; - memset(buf, 0, INET_ADDRSTRLEN); - inet_ntop(AF_INET, &(addressC.sin_addr), buf, INET_ADDRSTRLEN); - LOG(logDEBUG3, ("%s socket accepted connection, fd= %d\n", - (isControlServer ? "control":"stop"), file_des)); - - getIpAddressFromString(buf, &dummyClientIP); + // accept connection (if error) + if ((file_des = accept(j, (struct sockaddr *)&addressC, + &address_length)) < 0) { + LOG(logERROR, + ("%s socket accept() error. Connection refused.\n", + "Error Number: %d, Message: %s\n", + (isControlServer ? "control" : "stop"), myport, errno, + strerror(errno))); + switch (errno) { + case EWOULDBLOCK: + LOG(logERROR, ("ewouldblock eagain")); + break; + case EBADF: + LOG(logERROR, ("ebadf\n")); + break; + case ECONNABORTED: + LOG(logERROR, ("econnaborted\n")); + break; + case EFAULT: + LOG(logERROR, ("efault\n")); + break; + case EINTR: + LOG(logERROR, ("eintr\n")); + break; + case EINVAL: + LOG(logERROR, ("einval\n")); + break; + case EMFILE: + LOG(logERROR, ("emfile\n")); + break; + case ENFILE: + LOG(logERROR, ("enfile\n")); + break; + case ENOTSOCK: + LOG(logERROR, ("enotsock\n")); + break; + case EOPNOTSUPP: + LOG(logERROR, ("eOPNOTSUPP\n")); + break; + case ENOBUFS: + LOG(logERROR, ("ENOBUFS\n")); + break; + case ENOMEM: + LOG(logERROR, ("ENOMEM\n")); + break; + case ENOSR: + LOG(logERROR, ("ENOSR\n")); + break; + case EPROTO: + LOG(logERROR, ("EPROTO\n")); + break; + default: + LOG(logERROR, ("unknown error\n")); + } + } + // accept success + else { + char buf[INET_ADDRSTRLEN] = ""; + memset(buf, 0, INET_ADDRSTRLEN); + inet_ntop(AF_INET, &(addressC.sin_addr), buf, + INET_ADDRSTRLEN); + LOG(logDEBUG3, + ("%s socket accepted connection, fd= %d\n", + (isControlServer ? "control" : "stop"), file_des)); - // add the file descriptor from accept - FD_SET(file_des, &readset); - maxfd = (maxfd < file_des)?file_des:maxfd; - } - } - } - } - return file_des; + getIpAddressFromString(buf, &dummyClientIP); + + // add the file descriptor from accept + FD_SET(file_des, &readset); + maxfd = (maxfd < file_des) ? file_des : maxfd; + } + } + } + } + return file_des; } - - - - - - void closeConnection(int file_des) { - if(file_des >= 0) - close(file_des); - // remove file descriptor from set - FD_CLR(file_des, &readset); + if (file_des >= 0) + close(file_des); + // remove file descriptor from set + FD_CLR(file_des, &readset); } void exitServer(int socketDescriptor) { - if (socketDescriptor >= 0) { - close(socketDescriptor); - } - LOG(logINFO, ("Closing %s server\n", (isControlServer ? "control":"stop"))); - FD_CLR(socketDescriptor, &readset); - isock--; - fflush(stdout); + if (socketDescriptor >= 0) { + close(socketDescriptor); + } + LOG(logINFO, + ("Closing %s server\n", (isControlServer ? "control" : "stop"))); + FD_CLR(socketDescriptor, &readset); + isock--; + fflush(stdout); } - - - -void swapData(void* val,int length,intType itype){ - int i; - int16_t* c = (int16_t*)val; - int32_t* a = (int32_t*)val; - int64_t* b = (int64_t*)val; - for(i = 0; length > 0; i++){ - switch(itype){ - case INT16: - c[i] = ((c[i] & 0x00FF) << 8) | ((c[i] & 0xFF00) >> 8); - length -= sizeof(int16_t); - break; - case INT32: - a[i] = ((a[i] << 8) & 0xFF00FF00) | ((a[i] >> 8) & 0xFF00FF ); - a[i] = (a[i] << 16) | ((a[i] >> 16) & 0xFFFF); - length -= sizeof(int32_t); - break; - case INT64: - b[i] = ((b[i] << 8) & 0xFF00FF00FF00FF00ULL ) | ((b[i] >> 8) & 0x00FF00FF00FF00FFULL ); - b[i] = ((b[i] << 16) & 0xFFFF0000FFFF0000ULL ) | ((b[i] >> 16) & 0x0000FFFF0000FFFFULL ); - b[i] = (b[i] << 32) | ((b[i] >> 32) & 0xFFFFFFFFULL); - length -= sizeof(int64_t); - break; - default: - length = 0; - break; - } - } +void swapData(void *val, int length, intType itype) { + int i; + int16_t *c = (int16_t *)val; + int32_t *a = (int32_t *)val; + int64_t *b = (int64_t *)val; + for (i = 0; length > 0; i++) { + switch (itype) { + case INT16: + c[i] = ((c[i] & 0x00FF) << 8) | ((c[i] & 0xFF00) >> 8); + length -= sizeof(int16_t); + break; + case INT32: + a[i] = ((a[i] << 8) & 0xFF00FF00) | ((a[i] >> 8) & 0xFF00FF); + a[i] = (a[i] << 16) | ((a[i] >> 16) & 0xFFFF); + length -= sizeof(int32_t); + break; + case INT64: + b[i] = ((b[i] << 8) & 0xFF00FF00FF00FF00ULL) | + ((b[i] >> 8) & 0x00FF00FF00FF00FFULL); + b[i] = ((b[i] << 16) & 0xFFFF0000FFFF0000ULL) | + ((b[i] >> 16) & 0x0000FFFF0000FFFFULL); + b[i] = (b[i] << 32) | ((b[i] >> 32) & 0xFFFFFFFFULL); + length -= sizeof(int64_t); + break; + default: + length = 0; + break; + } + } } -int sendData(int file_des, void* buf,int length, intType itype){ +int sendData(int file_des, void *buf, int length, intType itype) { #ifndef PCCOMPILE #ifdef EIGERD - swapData(buf, length, itype); + swapData(buf, length, itype); #endif #endif - return sendDataOnly(file_des, buf, length); + return sendDataOnly(file_des, buf, length); } - -int receiveData(int file_des, void* buf,int length, intType itype){ - int lret = receiveDataOnly(file_des, buf, length); +int receiveData(int file_des, void *buf, int length, intType itype) { + int lret = receiveDataOnly(file_des, buf, length); #ifndef PCCOMPILE #ifdef EIGERD - if (lret >= 0) swapData(buf, length, itype); + if (lret >= 0) + swapData(buf, length, itype); #endif #endif - return lret; + return lret; } +int sendDataOnly(int file_des, void *buf, int length) { + if (!length) + return 0; -int sendDataOnly(int file_des, void* buf,int length) { - if (!length) - return 0; + int bytesSent = 0; + int retry = 0; // retry index when buffer is blocked (write returns 0) + while (bytesSent < length) { + // setting a max packet size for blackfin driver (and network driver + // does not do a check if packets sent) + int bytesToSend = length - bytesSent; + if (bytesToSend > CPU_DRVR_SND_LMT) + bytesToSend = CPU_DRVR_SND_LMT; - int bytesSent = 0; - int retry = 0; // retry index when buffer is blocked (write returns 0) - while (bytesSent < length) { + // send + int rc = + write(file_des, (char *)((char *)buf + bytesSent), bytesToSend); + // error + if (rc < 0) { + LOG(logERROR, + ("Could not write to %s socket. Possible socket crash\n", + (isControlServer ? "control" : "stop"))); + return bytesSent; + } + // also error, wrote nothing, buffer blocked up, too fast sending for + // client + if (rc == 0) { + LOG(logERROR, + ("Could not write to %s socket. Buffer full. Retry: %d\n", + (isControlServer ? "control" : "stop"), retry)); + ++retry; + // wrote nothing for many loops + if (retry >= CPU_RSND_PCKT_LOOP) { + LOG(logERROR, ("Could not write to %s socket. Buffer full! Too " + "fast! No more.\n", + (isControlServer ? "control" : "stop"))); + return bytesSent; + } + usleep(CPU_RSND_WAIT_US); + } + // wrote something, reset retry + else { + retry = 0; + if (rc != bytesToSend) { + LOG(logWARNING, + ("Only partial write to %s socket. Expected to write %d " + "bytes, wrote %d\n", + (isControlServer ? "control" : "stop"), bytesToSend, rc)); + } + } + bytesSent += rc; + } - // setting a max packet size for blackfin driver (and network driver does not do a check if packets sent) - int bytesToSend = length - bytesSent; - if (bytesToSend > CPU_DRVR_SND_LMT) - bytesToSend = CPU_DRVR_SND_LMT; - - // send - int rc = write(file_des, (char*)((char*)buf + bytesSent), bytesToSend); - // error - if (rc < 0) { - LOG(logERROR, ("Could not write to %s socket. Possible socket crash\n", - (isControlServer ? "control":"stop"))); - return bytesSent; - } - // also error, wrote nothing, buffer blocked up, too fast sending for client - if (rc == 0) { - LOG(logERROR, ("Could not write to %s socket. Buffer full. Retry: %d\n", - (isControlServer ? "control":"stop"), retry)); - ++retry; - // wrote nothing for many loops - if (retry >= CPU_RSND_PCKT_LOOP) { - LOG(logERROR, ("Could not write to %s socket. Buffer full! Too fast! No more.\n", - (isControlServer ? "control":"stop"))); - return bytesSent; - } - usleep(CPU_RSND_WAIT_US); - } - // wrote something, reset retry - else { - retry = 0; - if (rc != bytesToSend) { - LOG(logWARNING, ("Only partial write to %s socket. Expected to write %d bytes, wrote %d\n", - (isControlServer ? "control":"stop"), bytesToSend, rc)); - } - } - bytesSent += rc; - } - - return bytesSent; + return bytesSent; } +int receiveDataOnly(int file_des, void *buf, int length) { -int receiveDataOnly(int file_des, void* buf,int length) { + int total_received = 0; + int nreceiving; + int nreceived; + if (file_des < 0) + return -1; + LOG(logDEBUG3, ("want to receive %d Bytes to %s server\n", length, + (isControlServer ? "control" : "stop"))); - int total_received = 0; - int nreceiving; - int nreceived; - if (file_des<0) return -1; - LOG(logDEBUG3, ("want to receive %d Bytes to %s server\n", - length, (isControlServer ? "control":"stop"))); + while (length > 0) { + nreceiving = (length > SEND_REC_MAX_SIZE) + ? SEND_REC_MAX_SIZE + : length; // (condition) ? if_true : if_false + nreceived = read(file_des, (char *)buf + total_received, nreceiving); + if (!nreceived) { + if (!total_received) { + return -1; // to handle it + } + break; + } + length -= nreceived; + total_received += nreceived; + } - while(length > 0) { - nreceiving = (length>SEND_REC_MAX_SIZE) ? SEND_REC_MAX_SIZE:length; // (condition) ? if_true : if_false - nreceived = read(file_des,(char*)buf+total_received,nreceiving); - if(!nreceived){ - if(!total_received) { - return -1; //to handle it - } - break; - } - length -= nreceived; - total_received += nreceived; - } + if (total_received > 0) + thisClientIP = dummyClientIP; - if (total_received>0) - thisClientIP = dummyClientIP; + if (lastClientIP != thisClientIP) { + differentClients = 1; + } else + differentClients = 0; - if (lastClientIP != thisClientIP) { - differentClients = 1; - } - else - differentClients = 0; - - return total_received; + return total_received; } - - - int sendModule(int file_des, sls_detector_module *myMod) { - int ts = 0, n = 0; - n = sendData(file_des,&(myMod->serialnumber),sizeof(myMod->serialnumber),INT32); - if (!n) { - return -1; - } - ts += n; - n = sendData(file_des, &(myMod->nchan), sizeof(myMod->nchan), INT32); - if (!n) { - return -1; - } - ts += n; - n = sendData(file_des, &(myMod->nchip), sizeof(myMod->nchip), INT32); - if (!n) { - return -1; - } - ts += n; - n = sendData(file_des, &(myMod->ndac), sizeof(myMod->ndac), INT32); - if (!n) { - return -1; - } - ts += n; - n = sendData(file_des, &(myMod->reg), sizeof(myMod->reg), INT32); - if (!n) { - return -1; - } - ts += n; - n = sendData(file_des, &(myMod->iodelay), sizeof(myMod->iodelay), - INT32); - if (!n) { - return -1; - } - ts += n; - n = sendData(file_des, &(myMod->tau), sizeof(myMod->tau), INT32); - if (!n) { - return -1; - } - ts += n; - n = sendData(file_des, &(myMod->eV), sizeof(myMod->eV), INT32); - if (!n) { - return -1; - } - ts += n; - // dacs - n = sendData(file_des,myMod->dacs, sizeof(int)*(myMod->ndac), INT32); - if (!n) { - return -1; - } - ts += n; - // channels + int ts = 0, n = 0; + n = sendData(file_des, &(myMod->serialnumber), sizeof(myMod->serialnumber), + INT32); + if (!n) { + return -1; + } + ts += n; + n = sendData(file_des, &(myMod->nchan), sizeof(myMod->nchan), INT32); + if (!n) { + return -1; + } + ts += n; + n = sendData(file_des, &(myMod->nchip), sizeof(myMod->nchip), INT32); + if (!n) { + return -1; + } + ts += n; + n = sendData(file_des, &(myMod->ndac), sizeof(myMod->ndac), INT32); + if (!n) { + return -1; + } + ts += n; + n = sendData(file_des, &(myMod->reg), sizeof(myMod->reg), INT32); + if (!n) { + return -1; + } + ts += n; + n = sendData(file_des, &(myMod->iodelay), sizeof(myMod->iodelay), INT32); + if (!n) { + return -1; + } + ts += n; + n = sendData(file_des, &(myMod->tau), sizeof(myMod->tau), INT32); + if (!n) { + return -1; + } + ts += n; + n = sendData(file_des, &(myMod->eV), sizeof(myMod->eV), INT32); + if (!n) { + return -1; + } + ts += n; + // dacs + n = sendData(file_des, myMod->dacs, sizeof(int) * (myMod->ndac), INT32); + if (!n) { + return -1; + } + ts += n; + // channels #ifdef EIGERD - n = sendData(file_des, myMod->chanregs, sizeof(int) * (myMod->nchan), - INT32); - if (!n) { - return -1; - } - ts += n; + n = sendData(file_des, myMod->chanregs, sizeof(int) * (myMod->nchan), + INT32); + if (!n) { + return -1; + } + ts += n; #endif - LOG(logDEBUG1, ("module of size %d sent register %x\n", ts, myMod->reg)); - return ts; + LOG(logDEBUG1, ("module of size %d sent register %x\n", ts, myMod->reg)); + return ts; } - - -int receiveModule(int file_des, sls_detector_module* myMod) { +int receiveModule(int file_des, sls_detector_module *myMod) { enum TLogLevel level = logDEBUG1; LOG(level, ("Receiving Module\n")); - int ts = 0, n = 0; - int nDacs = myMod->ndac; + int ts = 0, n = 0; + int nDacs = myMod->ndac; #ifdef EIGERD - int nChans = myMod->nchan; // can be zero for no trimbits - LOG(level, ("nChans: %d\n",nChans)); + int nChans = myMod->nchan; // can be zero for no trimbits + LOG(level, ("nChans: %d\n", nChans)); #endif - n = receiveData(file_des,&(myMod->serialnumber), sizeof(myMod->serialnumber), INT32); - if (!n) { - return -1; - } - ts += n; - LOG(level, ("serialno received. %d bytes. serialno: %d\n", n, - myMod->serialnumber)); - n = receiveData(file_des, &(myMod->nchan), sizeof(myMod->nchan), INT32); - if (!n) { - return -1; - } - ts += n; - LOG(level, - ("nchan received. %d bytes. nchan: %d\n", n, myMod->nchan)); - n = receiveData(file_des, &(myMod->nchip), sizeof(myMod->nchip), INT32); - if (!n) { - return -1; - } - ts += n; - LOG(level, - ("nchip received. %d bytes. nchip: %d\n", n, myMod->nchip)); - n = receiveData(file_des, &(myMod->ndac), sizeof(myMod->ndac), INT32); - if (!n) { - return -1; - } - ts += n; - LOG(level, - ("ndac received. %d bytes. ndac: %d\n", n, myMod->ndac)); - n = receiveData(file_des, &(myMod->reg), sizeof(myMod->reg), INT32); - if (!n) { - return -1; - } - ts += n; - LOG(level, ("reg received. %d bytes. reg: %d\n", n, myMod->reg)); - n = receiveData(file_des, &(myMod->iodelay), sizeof(myMod->iodelay), - INT32); - if (!n) { - return -1; - } - ts += n; - LOG(level, ("iodelay received. %d bytes. iodelay: %d\n", n, - myMod->iodelay)); - n = receiveData(file_des, &(myMod->tau), sizeof(myMod->tau), INT32); - if (!n) { - return -1; - } - ts += n; - LOG(level, ("tau received. %d bytes. tau: %d\n", n, myMod->tau)); - n = receiveData(file_des, &(myMod->eV), sizeof(myMod->eV), INT32); - if (!n) { - return -1; - } - ts += n; - LOG(level, ("eV received. %d bytes. eV: %d\n", n, myMod->eV)); - // dacs - if (nDacs != (myMod->ndac)) { - LOG(logERROR, ("received wrong number of dacs. " - "Expected %d, got %d\n", - nDacs, myMod->ndac)); - return 0; - } - n = receiveData(file_des, myMod->dacs, sizeof(int) * (myMod->ndac), INT32); - if (!n) { - return -1; - } - ts += n; + n = receiveData(file_des, &(myMod->serialnumber), + sizeof(myMod->serialnumber), INT32); + if (!n) { + return -1; + } + ts += n; + LOG(level, ("serialno received. %d bytes. serialno: %d\n", n, + myMod->serialnumber)); + n = receiveData(file_des, &(myMod->nchan), sizeof(myMod->nchan), INT32); + if (!n) { + return -1; + } + ts += n; + LOG(level, ("nchan received. %d bytes. nchan: %d\n", n, myMod->nchan)); + n = receiveData(file_des, &(myMod->nchip), sizeof(myMod->nchip), INT32); + if (!n) { + return -1; + } + ts += n; + LOG(level, ("nchip received. %d bytes. nchip: %d\n", n, myMod->nchip)); + n = receiveData(file_des, &(myMod->ndac), sizeof(myMod->ndac), INT32); + if (!n) { + return -1; + } + ts += n; + LOG(level, ("ndac received. %d bytes. ndac: %d\n", n, myMod->ndac)); + n = receiveData(file_des, &(myMod->reg), sizeof(myMod->reg), INT32); + if (!n) { + return -1; + } + ts += n; + LOG(level, ("reg received. %d bytes. reg: %d\n", n, myMod->reg)); + n = receiveData(file_des, &(myMod->iodelay), sizeof(myMod->iodelay), INT32); + if (!n) { + return -1; + } + ts += n; + LOG(level, + ("iodelay received. %d bytes. iodelay: %d\n", n, myMod->iodelay)); + n = receiveData(file_des, &(myMod->tau), sizeof(myMod->tau), INT32); + if (!n) { + return -1; + } + ts += n; + LOG(level, ("tau received. %d bytes. tau: %d\n", n, myMod->tau)); + n = receiveData(file_des, &(myMod->eV), sizeof(myMod->eV), INT32); + if (!n) { + return -1; + } + ts += n; + LOG(level, ("eV received. %d bytes. eV: %d\n", n, myMod->eV)); + // dacs + if (nDacs != (myMod->ndac)) { + LOG(logERROR, ("received wrong number of dacs. " + "Expected %d, got %d\n", + nDacs, myMod->ndac)); + return 0; + } + n = receiveData(file_des, myMod->dacs, sizeof(int) * (myMod->ndac), INT32); + if (!n) { + return -1; + } + ts += n; LOG(level, ("dacs received. %d bytes.\n", n)); - // channels + // channels #ifdef EIGERD - if (((myMod->nchan) != 0 ) && // no trimbits - (nChans != (myMod->nchan))) { // with trimbits - LOG(logERROR, ("received wrong number of channels. " - "Expected %d, got %d\n", nChans, (myMod->nchan))); - return 0; - } - n = receiveData(file_des, myMod->chanregs, sizeof(int) * (myMod->nchan), INT32); + if (((myMod->nchan) != 0) && // no trimbits + (nChans != (myMod->nchan))) { // with trimbits + LOG(logERROR, ("received wrong number of channels. " + "Expected %d, got %d\n", + nChans, (myMod->nchan))); + return 0; + } + n = receiveData(file_des, myMod->chanregs, sizeof(int) * (myMod->nchan), + INT32); LOG(level, ("chanregs received. %d bytes.\n", n)); - if (!n && myMod->nchan != 0){ - return -1; - } - ts += n; + if (!n && myMod->nchan != 0) { + return -1; + } + ts += n; #endif - LOG(level, ("received module of size %d register %x\n",ts,myMod->reg)); - return ts; + LOG(level, ("received module of size %d register %x\n", ts, myMod->reg)); + return ts; } - void Server_LockedError() { - ret = FAIL; - char buf[INET_ADDRSTRLEN] = ""; - getIpAddressinString(buf, dummyClientIP); - sprintf(mess,"Detector locked by %s\n", buf); - LOG(logWARNING, (mess)); + ret = FAIL; + char buf[INET_ADDRSTRLEN] = ""; + getIpAddressinString(buf, dummyClientIP); + sprintf(mess, "Detector locked by %s\n", buf); + LOG(logWARNING, (mess)); } - int Server_VerifyLock() { - if (differentClients && lockStatus) - Server_LockedError(); - return ret; + if (differentClients && lockStatus) + Server_LockedError(); + return ret; } +int Server_SendResult(int fileDes, intType itype, void *retval, + int retvalSize) { -int Server_SendResult(int fileDes, intType itype, void* retval, int retvalSize) { + // send success of operation + int ret1 = ret; + sendData(fileDes, &ret1, sizeof(ret1), INT32); + if (ret == FAIL) { + // send error message + if (strlen(mess)) + sendData(fileDes, mess, MAX_STR_LENGTH, OTHER); + // debugging feature. should not happen. + else + LOG(logERROR, ("No error message provided for this failure in %s " + "server. Will mess up TCP.\n", + (isControlServer ? "control" : "stop"))); + } + // send return value + sendData(fileDes, retval, retvalSize, itype); - // send success of operation - int ret1 = ret; - sendData(fileDes, &ret1,sizeof(ret1), INT32); - if(ret == FAIL) { - // send error message - if (strlen(mess)) - sendData(fileDes, mess, MAX_STR_LENGTH, OTHER); - // debugging feature. should not happen. - else - LOG(logERROR, ("No error message provided for this failure in %s " - "server. Will mess up TCP.\n", - (isControlServer ? "control":"stop"))); - } - // send return value - sendData(fileDes, retval, retvalSize, itype); - - return ret; + return ret; } - -void getMacAddressinString(char* cmac, int size, uint64_t mac) { - memset(cmac, 0, size); - sprintf(cmac,"%02x:%02x:%02x:%02x:%02x:%02x", - (unsigned int)((mac>>40)&0xFF), - (unsigned int)((mac>>32)&0xFF), - (unsigned int)((mac>>24)&0xFF), - (unsigned int)((mac>>16)&0xFF), - (unsigned int)((mac>>8)&0xFF), - (unsigned int)((mac>>0)&0xFF)); +void getMacAddressinString(char *cmac, int size, uint64_t mac) { + memset(cmac, 0, size); + sprintf( + cmac, "%02x:%02x:%02x:%02x:%02x:%02x", + (unsigned int)((mac >> 40) & 0xFF), (unsigned int)((mac >> 32) & 0xFF), + (unsigned int)((mac >> 24) & 0xFF), (unsigned int)((mac >> 16) & 0xFF), + (unsigned int)((mac >> 8) & 0xFF), (unsigned int)((mac >> 0) & 0xFF)); } -void getIpAddressinString(char* cip, uint32_t ip) { - memset(cip, 0, INET_ADDRSTRLEN); +void getIpAddressinString(char *cip, uint32_t ip) { + memset(cip, 0, INET_ADDRSTRLEN); #if defined(EIGERD) && !defined(VIRTUAL) - inet_ntop(AF_INET, &ip, cip, INET_ADDRSTRLEN); + inet_ntop(AF_INET, &ip, cip, INET_ADDRSTRLEN); #else - sprintf(cip, "%d.%d.%d.%d", - (ip>>24)&0xff,(ip>>16)&0xff,(ip>>8)&0xff,(ip)&0xff); + sprintf(cip, "%d.%d.%d.%d", (ip >> 24) & 0xff, (ip >> 16) & 0xff, + (ip >> 8) & 0xff, (ip)&0xff); #endif } - -void getIpAddressFromString(char* cip, uint32_t* ip) { - char buf[INET_ADDRSTRLEN]=""; - memset(buf, 0, INET_ADDRSTRLEN); - char* byte = strtok (cip,"."); - while (byte != NULL) { - sprintf(cip,"%02x",atoi(byte)); - strcat(buf, cip); - byte = strtok (NULL, "."); - } - sscanf(buf, "%x", ip); +void getIpAddressFromString(char *cip, uint32_t *ip) { + char buf[INET_ADDRSTRLEN] = ""; + memset(buf, 0, INET_ADDRSTRLEN); + char *byte = strtok(cip, "."); + while (byte != NULL) { + sprintf(cip, "%02x", atoi(byte)); + strcat(buf, cip); + byte = strtok(NULL, "."); + } + sscanf(buf, "%x", ip); } \ No newline at end of file diff --git a/slsDetectorServers/slsDetectorServer/src/communication_funcs_UDP.c b/slsDetectorServers/slsDetectorServer/src/communication_funcs_UDP.c old mode 100755 new mode 100644 index 6ebfcac02..28a2e2a71 --- a/slsDetectorServers/slsDetectorServer/src/communication_funcs_UDP.c +++ b/slsDetectorServers/slsDetectorServer/src/communication_funcs_UDP.c @@ -2,111 +2,122 @@ #include "clogger.h" #include "sls_detector_defs.h" -#include -#include -#include -#include #include -#include -#include -#include #include #include +#include +#include +#include +#include +#include +#include +#include int udpSockfd[2] = {-1, -1}; -struct addrinfo* udpServerAddrInfo[2] = {0, 0}; +struct addrinfo *udpServerAddrInfo[2] = {0, 0}; unsigned short int udpDestinationPort[2] = {0, 0}; char udpDestinationIp[2][INET_ADDRSTRLEN] = {"", ""}; -//DEFAULT_TX_UDP_PORT;// src port -int getUdPSocketDescriptor(int index) { - return udpSockfd[index]; -} +// DEFAULT_TX_UDP_PORT;// src port +int getUdPSocketDescriptor(int index) { return udpSockfd[index]; } -int setUDPDestinationDetails(int index, const char* ip, unsigned short int port) { - udpDestinationPort[index] = port; - size_t len = strlen(ip); - memset(udpDestinationIp[index], 0, INET_ADDRSTRLEN); - strncpy(udpDestinationIp[index], ip, len > INET_ADDRSTRLEN ? INET_ADDRSTRLEN : len ); +int setUDPDestinationDetails(int index, const char *ip, + unsigned short int port) { + udpDestinationPort[index] = port; + size_t len = strlen(ip); + memset(udpDestinationIp[index], 0, INET_ADDRSTRLEN); + strncpy(udpDestinationIp[index], ip, + len > INET_ADDRSTRLEN ? INET_ADDRSTRLEN : len); - if (udpServerAddrInfo[index]) { - freeaddrinfo(udpServerAddrInfo[index]); - udpServerAddrInfo[index] = 0; - } + if (udpServerAddrInfo[index]) { + freeaddrinfo(udpServerAddrInfo[index]); + udpServerAddrInfo[index] = 0; + } - // convert ip to internet address - struct addrinfo hints; - memset(&hints, 0, sizeof(hints)); - hints.ai_family = AF_INET; - hints.ai_socktype = SOCK_DGRAM; - hints.ai_flags = 0; - hints.ai_protocol = 0; - char sport[100]; - memset(sport, 0, 100); - sprintf(sport, "%d", udpDestinationPort[index]); - int err = getaddrinfo(udpDestinationIp[index], sport, &hints, &udpServerAddrInfo[index]); - if (err != 0) { - LOG(logERROR, ("Failed to resolve remote socket address %s at port %d. " - "(Error code:%d, %s)\n", udpDestinationIp[index], udpDestinationPort[index], err, gai_strerror(err))); - return FAIL; - } - if (udpServerAddrInfo[index] == NULL) { - LOG(logERROR, ("Failed to resolve remote socket address %s at port %d " - "(getaddrinfo returned NULL)\n", udpDestinationIp[index], udpDestinationPort[index])); - udpServerAddrInfo[index] = 0; - return FAIL; - } + // convert ip to internet address + struct addrinfo hints; + memset(&hints, 0, sizeof(hints)); + hints.ai_family = AF_INET; + hints.ai_socktype = SOCK_DGRAM; + hints.ai_flags = 0; + hints.ai_protocol = 0; + char sport[100]; + memset(sport, 0, 100); + sprintf(sport, "%d", udpDestinationPort[index]); + int err = getaddrinfo(udpDestinationIp[index], sport, &hints, + &udpServerAddrInfo[index]); + if (err != 0) { + LOG(logERROR, ("Failed to resolve remote socket address %s at port %d. " + "(Error code:%d, %s)\n", + udpDestinationIp[index], udpDestinationPort[index], err, + gai_strerror(err))); + return FAIL; + } + if (udpServerAddrInfo[index] == NULL) { + LOG(logERROR, ("Failed to resolve remote socket address %s at port %d " + "(getaddrinfo returned NULL)\n", + udpDestinationIp[index], udpDestinationPort[index])); + udpServerAddrInfo[index] = 0; + return FAIL; + } - return OK; + return OK; } int createUDPSocket(int index) { - LOG(logDEBUG2, ("Creating UDP Socket %d\n", index)); - if (!strlen(udpDestinationIp[index])) { - LOG(logERROR, ("No destination UDP ip specified.\n")); - return FAIL; - } + LOG(logDEBUG2, ("Creating UDP Socket %d\n", index)); + if (!strlen(udpDestinationIp[index])) { + LOG(logERROR, ("No destination UDP ip specified.\n")); + return FAIL; + } - if (udpSockfd[index] != -1) { - LOG(logERROR, ("Strange that Udp socket was still open. Closing it to create a new one\n")); - close(udpSockfd[index]); - udpSockfd[index] = -1; - } + if (udpSockfd[index] != -1) { + LOG(logERROR, ("Strange that Udp socket was still open. Closing it to " + "create a new one\n")); + close(udpSockfd[index]); + udpSockfd[index] = -1; + } - // Creating socket file descriptor - udpSockfd[index] = socket(udpServerAddrInfo[index]->ai_family, udpServerAddrInfo[index]->ai_socktype, udpServerAddrInfo[index]->ai_protocol); - if (udpSockfd[index] == -1 ) { - LOG(logERROR, ("UDP socket at port %d failed. (Error code:%d, %s)\n", - udpDestinationPort[index], errno, gai_strerror(errno))); - return FAIL; - } - LOG(logINFO, ("Udp client socket created for server (port %d, ip:%s)\n", - udpDestinationPort[index], udpDestinationIp[index])); + // Creating socket file descriptor + udpSockfd[index] = socket(udpServerAddrInfo[index]->ai_family, + udpServerAddrInfo[index]->ai_socktype, + udpServerAddrInfo[index]->ai_protocol); + if (udpSockfd[index] == -1) { + LOG(logERROR, ("UDP socket at port %d failed. (Error code:%d, %s)\n", + udpDestinationPort[index], errno, gai_strerror(errno))); + return FAIL; + } + LOG(logINFO, ("Udp client socket created for server (port %d, ip:%s)\n", + udpDestinationPort[index], udpDestinationIp[index])); - // Using connect expects that the receiver (udp server) exists to listen to these packets - // connecting allows to use "send/write" instead of "sendto", avoiding checking for server address for each packet - // using write without a connect will end in segv - LOG(logINFO, ("Udp client socket connected\n", - udpDestinationPort[index], udpDestinationIp[index])); - return OK; + // Using connect expects that the receiver (udp server) exists to listen to + // these packets connecting allows to use "send/write" instead of "sendto", + // avoiding checking for server address for each packet using write without + // a connect will end in segv + LOG(logINFO, ("Udp client socket connected\n", udpDestinationPort[index], + udpDestinationIp[index])); + return OK; } -int sendUDPPacket(int index, const char* buf, int length) { - int n = sendto(udpSockfd[index], buf, length, 0, udpServerAddrInfo[index]->ai_addr, udpServerAddrInfo[index]->ai_addrlen); - // udp sends atomically, no need to handle partial data - if (n == -1) { - LOG(logERROR, ("Could not send udp packet for socket %d. (Error code:%d, %s)\n", - index, n, errno, gai_strerror(errno))); - } else { - LOG(logDEBUG2, ("%d bytes sent\n", n)); - } - return n; +int sendUDPPacket(int index, const char *buf, int length) { + int n = sendto(udpSockfd[index], buf, length, 0, + udpServerAddrInfo[index]->ai_addr, + udpServerAddrInfo[index]->ai_addrlen); + // udp sends atomically, no need to handle partial data + if (n == -1) { + LOG(logERROR, + ("Could not send udp packet for socket %d. (Error code:%d, %s)\n", + index, n, errno, gai_strerror(errno))); + } else { + LOG(logDEBUG2, ("%d bytes sent\n", n)); + } + return n; } void closeUDPSocket(int index) { - if (udpSockfd[index] != -1) { - LOG(logINFO, ("Udp client socket closed\n")); - close(udpSockfd[index]); - udpSockfd[index] = -1; - } + if (udpSockfd[index] != -1) { + LOG(logINFO, ("Udp client socket closed\n")); + close(udpSockfd[index]); + udpSockfd[index] = -1; + } } diff --git a/slsDetectorServers/slsDetectorServer/src/communication_virtual.c b/slsDetectorServers/slsDetectorServer/src/communication_virtual.c old mode 100755 new mode 100644 index cb1cdf5d9..2d1f40fbf --- a/slsDetectorServers/slsDetectorServer/src/communication_virtual.c +++ b/slsDetectorServers/slsDetectorServer/src/communication_virtual.c @@ -1,120 +1,121 @@ #ifdef VIRTUAL -#include "communication_virtual.h" +#include "communication_virtual.h" #include "clogger.h" #include -#include // usleep +#include // usleep -#define FILE_STATUS "/tmp/sls_virtual_server_status_" -#define FILE_STOP "/tmp/sls_virtual_server_stop_" -#define FD_STATUS 0 -#define FD_STOP 1 +#define FILE_STATUS "/tmp/sls_virtual_server_status_" +#define FILE_STOP "/tmp/sls_virtual_server_stop_" +#define FD_STATUS 0 +#define FD_STOP 1 #define FILE_NAME_LENGTH 1000 -FILE* fd[2] = {NULL, NULL}; +FILE *fd[2] = {NULL, NULL}; char fnameStatus[FILE_NAME_LENGTH]; char fnameStop[FILE_NAME_LENGTH]; int portNumber = 0; int ComVirtual_createFiles(const int port) { - portNumber = port; + portNumber = port; // control server writign status file - memset(fnameStatus, 0, FILE_NAME_LENGTH); - sprintf(fnameStatus, "%s%d", FILE_STATUS, port); - FILE* fd = NULL; + memset(fnameStatus, 0, FILE_NAME_LENGTH); + sprintf(fnameStatus, "%s%d", FILE_STATUS, port); + FILE *fd = NULL; if (NULL == (fd = fopen(fnameStatus, "w"))) { - LOG(logERROR, ("Could not open the file %s for virtual communication\n", - fnameStatus)); + LOG(logERROR, ("Could not open the file %s for virtual communication\n", + fnameStatus)); return 0; } - fclose(fd); - LOG(logINFOBLUE, ("Created status file %s\n", fnameStatus)); + fclose(fd); + LOG(logINFOBLUE, ("Created status file %s\n", fnameStatus)); - // stop server writing stop file + // stop server writing stop file memset(fnameStop, 0, FILE_NAME_LENGTH); - sprintf(fnameStop, "%s%d", FILE_STOP, port); + sprintf(fnameStop, "%s%d", FILE_STOP, port); if (NULL == (fd = fopen(fnameStop, "w"))) { - LOG(logERROR, ("Could not open the file %s for virtual communication\n", - fnameStop)); + LOG(logERROR, ("Could not open the file %s for virtual communication\n", + fnameStop)); return 0; } - fclose(fd); - LOG(logINFOBLUE, ("Created stop file %s\n", fnameStop)); + fclose(fd); + LOG(logINFOBLUE, ("Created stop file %s\n", fnameStop)); - return 1; + return 1; } void ComVirtual_setFileNames(const int port) { - portNumber = port; + portNumber = port; memset(fnameStatus, 0, FILE_NAME_LENGTH); memset(fnameStop, 0, FILE_NAME_LENGTH); - sprintf(fnameStatus, "%s%d", FILE_STATUS, port); - sprintf(fnameStop, "%s%d", FILE_STOP, port); + sprintf(fnameStatus, "%s%d", FILE_STATUS, port); + sprintf(fnameStop, "%s%d", FILE_STOP, port); } void ComVirtual_setStatus(int value) { - while (!ComVirtual_writeToFile(value, fnameStatus, "Control")) { + while (!ComVirtual_writeToFile(value, fnameStatus, "Control")) { usleep(100); } } int ComVirtual_getStatus() { int retval = 0; - while (!ComVirtual_readFromFile(&retval, fnameStatus, "Stop")) { + while (!ComVirtual_readFromFile(&retval, fnameStatus, "Stop")) { usleep(100); } return retval; } void ComVirtual_setStop(int value) { - while (!ComVirtual_writeToFile(value, fnameStop, "Stop")) { + while (!ComVirtual_writeToFile(value, fnameStop, "Stop")) { usleep(100); } } int ComVirtual_getStop() { int retval = 0; - while (!ComVirtual_readFromFile(&retval, fnameStop, "Control")) { + while (!ComVirtual_readFromFile(&retval, fnameStop, "Control")) { usleep(100); } return retval; } -int ComVirtual_writeToFile(int value, const char* fname, const char* serverName) { - FILE* fd = NULL; +int ComVirtual_writeToFile(int value, const char *fname, + const char *serverName) { + FILE *fd = NULL; if (NULL == (fd = fopen(fname, "w"))) { LOG(logERROR, ("Vritual %s Server [%d] could not open " - "the file %s for writing\n", - serverName, portNumber, fname)); + "the file %s for writing\n", + serverName, portNumber, fname)); return 0; } while (fwrite(&value, sizeof(value), 1, fd) < 1) { LOG(logERROR, ("Vritual %s Server [%d] could not write " - "to file %s\n", - serverName, portNumber, fname)); + "to file %s\n", + serverName, portNumber, fname)); return 0; } fclose(fd); - return 1; + return 1; } -int ComVirtual_readFromFile(int* value, const char* fname, const char* serverName) { - FILE* fd = NULL; +int ComVirtual_readFromFile(int *value, const char *fname, + const char *serverName) { + FILE *fd = NULL; if (NULL == (fd = fopen(fname, "r"))) { LOG(logERROR, ("Vritual %s Server [%d] could not open " - "the file %s for reading\n", - serverName, portNumber, fname)); + "the file %s for reading\n", + serverName, portNumber, fname)); return 0; } while (fread(value, sizeof(int), 1, fd) < 1) { LOG(logERROR, ("Vritual %s Server [%d] could not read " - "from file %s\n", - serverName, portNumber, fname)); + "from file %s\n", + serverName, portNumber, fname)); return 0; } fclose(fd); - return 1; + return 1; } - #endif \ No newline at end of file diff --git a/slsDetectorServers/slsDetectorServer/src/nios.c b/slsDetectorServers/slsDetectorServer/src/nios.c old mode 100755 new mode 100644 index 98b4de25b..b7ba3544b --- a/slsDetectorServers/slsDetectorServer/src/nios.c +++ b/slsDetectorServers/slsDetectorServer/src/nios.c @@ -1,131 +1,130 @@ #include "nios.h" #include "RegisterDefs.h" -#include "sls_detector_defs.h" #include "ansi.h" #include "clogger.h" +#include "sls_detector_defs.h" -#include // open -#include // mmap +#include // open +#include // mmap /* global variables */ -u_int32_t* csp0base = 0; +u_int32_t *csp0base = 0; #define CSP0 0x18060000 -#define MEM_SIZE 0x100000 //TODO (1804 0000 - 1804 07FF = 800 * 4 = 2000), (1806 0000 = 10000* 4 = 40000) +#define MEM_SIZE \ + 0x100000 // TODO (1804 0000 - 1804 07FF = 800 * 4 = 2000), (1806 0000 = + // 10000* 4 = 40000) -u_int32_t* csp1base = 0; +u_int32_t *csp1base = 0; #define CSP1 0x18040000 void bus_w_csp1(u_int32_t offset, u_int32_t data) { - volatile u_int32_t *ptr1; - ptr1=(u_int32_t*)(csp1base + offset/(sizeof(u_int32_t))); - *ptr1=data; + volatile u_int32_t *ptr1; + ptr1 = (u_int32_t *)(csp1base + offset / (sizeof(u_int32_t))); + *ptr1 = data; } u_int32_t bus_r_csp1(u_int32_t offset) { - volatile u_int32_t *ptr1; - ptr1=(u_int32_t*)(csp1base + offset/(sizeof(u_int32_t))); - return *ptr1; + volatile u_int32_t *ptr1; + ptr1 = (u_int32_t *)(csp1base + offset / (sizeof(u_int32_t))); + return *ptr1; } void bus_w(u_int32_t offset, u_int32_t data) { - volatile u_int32_t *ptr1; - ptr1=(u_int32_t*)(csp0base + offset/(sizeof(u_int32_t))); - *ptr1=data; + volatile u_int32_t *ptr1; + ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t))); + *ptr1 = data; } u_int32_t bus_r(u_int32_t offset) { - volatile u_int32_t *ptr1; - ptr1=(u_int32_t*)(csp0base + offset/(sizeof(u_int32_t))); - return *ptr1; + volatile u_int32_t *ptr1; + ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t))); + return *ptr1; } -int64_t get64BitReg(int aLSB, int aMSB){ - int64_t v64; - u_int32_t vLSB,vMSB; - vLSB=bus_r(aLSB); - vMSB=bus_r(aMSB); - v64=vMSB; - v64=(v64<<32) | vLSB; - LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, (long long unsigned int)v64)); - return v64; +int64_t get64BitReg(int aLSB, int aMSB) { + int64_t v64; + u_int32_t vLSB, vMSB; + vLSB = bus_r(aLSB); + vMSB = bus_r(aMSB); + v64 = vMSB; + v64 = (v64 << 32) | vLSB; + LOG(logDEBUG5, (" reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, + (long long unsigned int)v64)); + return v64; } -int64_t set64BitReg(int64_t value, int aLSB, int aMSB){ - int64_t v64; - u_int32_t vLSB,vMSB; - if (value!=-1) { - vLSB=value&(0xffffffff); - bus_w(aLSB,vLSB); - v64=value>> 32; - vMSB=v64&(0xffffffff); - bus_w(aMSB,vMSB); - } - return get64BitReg(aLSB, aMSB); - +int64_t set64BitReg(int64_t value, int aLSB, int aMSB) { + int64_t v64; + u_int32_t vLSB, vMSB; + if (value != -1) { + vLSB = value & (0xffffffff); + bus_w(aLSB, vLSB); + v64 = value >> 32; + vMSB = v64 & (0xffffffff); + bus_w(aMSB, vMSB); + } + return get64BitReg(aLSB, aMSB); } -uint64_t getU64BitReg(int aLSB, int aMSB){ - uint64_t retval = bus_r(aMSB); - retval = (retval << 32) | bus_r(aLSB); - return retval; +uint64_t getU64BitReg(int aLSB, int aMSB) { + uint64_t retval = bus_r(aMSB); + retval = (retval << 32) | bus_r(aLSB); + return retval; } -void setU64BitReg(uint64_t value, int aLSB, int aMSB){ - bus_w(aLSB, value & (0xffffffff)); - bus_w(aMSB, (value >> 32) & (0xffffffff)); +void setU64BitReg(uint64_t value, int aLSB, int aMSB) { + bus_w(aLSB, value & (0xffffffff)); + bus_w(aMSB, (value >> 32) & (0xffffffff)); } -u_int32_t readRegister(u_int32_t offset) { - return bus_r(offset); -} +u_int32_t readRegister(u_int32_t offset) { return bus_r(offset); } u_int32_t writeRegister(u_int32_t offset, u_int32_t data) { - bus_w(offset, data); - return readRegister(offset); + bus_w(offset, data); + return readRegister(offset); } - int mapCSP0(void) { - u_int32_t csps[2] = {CSP0, CSP1}; - u_int32_t** cspbases[2] = {&csp0base, &csp1base}; - char names[2][10]={"csp0base","csp1base"}; + u_int32_t csps[2] = {CSP0, CSP1}; + u_int32_t **cspbases[2] = {&csp0base, &csp1base}; + char names[2][10] = {"csp0base", "csp1base"}; - int i = 0; - for (i = 0; i < 2; ++i) { - // if not mapped - if (*cspbases[i] == 0) { - LOG(logINFO, ("Mapping memory for %s\n", names[i])); + int i = 0; + for (i = 0; i < 2; ++i) { + // if not mapped + if (*cspbases[i] == 0) { + LOG(logINFO, ("Mapping memory for %s\n", names[i])); #ifdef VIRTUAL - *cspbases[i] = malloc(MEM_SIZE); - if (*cspbases[i] == NULL) { - LOG(logERROR, ("Could not allocate virtual memory for %s.\n", names[i])); - return FAIL; - } - LOG(logINFO, ("memory allocated for %s\n", names[i])); + *cspbases[i] = malloc(MEM_SIZE); + if (*cspbases[i] == NULL) { + LOG(logERROR, + ("Could not allocate virtual memory for %s.\n", names[i])); + return FAIL; + } + LOG(logINFO, ("memory allocated for %s\n", names[i])); #else - int fd = open("/dev/mem", O_RDWR | O_SYNC, 0); - if (fd == -1) { - LOG(logERROR, ("Can't find /dev/mem for %s\n", names[i])); - return FAIL; - } - LOG(logDEBUG1, ("/dev/mem opened for %s, (CSP:0x%x)\n", names[i], csps[i])); - *cspbases[i] = (u_int32_t*)mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, csps[i]); - if (*cspbases[i] == MAP_FAILED) { - LOG(logERROR, ("Can't map memmory area for %s\n", names[i])); - return FAIL; - } + int fd = open("/dev/mem", O_RDWR | O_SYNC, 0); + if (fd == -1) { + LOG(logERROR, ("Can't find /dev/mem for %s\n", names[i])); + return FAIL; + } + LOG(logDEBUG1, + ("/dev/mem opened for %s, (CSP:0x%x)\n", names[i], csps[i])); + *cspbases[i] = + (u_int32_t *)mmap(0, MEM_SIZE, PROT_READ | PROT_WRITE, + MAP_FILE | MAP_SHARED, fd, csps[i]); + if (*cspbases[i] == MAP_FAILED) { + LOG(logERROR, ("Can't map memmory area for %s\n", names[i])); + return FAIL; + } #endif - LOG(logINFO, ("%s mapped from %p to %p,(CSP:0x%x) \n", - names[i], *cspbases[i], *cspbases[i]+MEM_SIZE, csps[i])); - //LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); - } else - LOG(logINFO, ("Memory %s already mapped before\n", names[i])); - } - return OK; + LOG(logINFO, ("%s mapped from %p to %p,(CSP:0x%x) \n", names[i], + *cspbases[i], *cspbases[i] + MEM_SIZE, csps[i])); + // LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG))); + } else + LOG(logINFO, ("Memory %s already mapped before\n", names[i])); + } + return OK; } - - -u_int32_t* Nios_getBaseAddress() { - return csp0base; -} \ No newline at end of file +u_int32_t *Nios_getBaseAddress() { return csp0base; } \ No newline at end of file diff --git a/slsDetectorServers/slsDetectorServer/src/programFpgaBlackfin.c b/slsDetectorServers/slsDetectorServer/src/programFpgaBlackfin.c old mode 100755 new mode 100644 index 2c00da5ce..3001c976c --- a/slsDetectorServers/slsDetectorServer/src/programFpgaBlackfin.c +++ b/slsDetectorServers/slsDetectorServer/src/programFpgaBlackfin.c @@ -3,139 +3,142 @@ #include "clogger.h" #include "slsDetectorServer_defs.h" -#include // usleep #include - +#include // usleep /* global variables */ -#define MTDSIZE 10 +#define MTDSIZE 10 int gpioDefined = 0; char mtdvalue[MTDSIZE] = {0}; -void defineGPIOpins(){ - if (!gpioDefined) { - //define the gpio pins - system("echo 7 > /sys/class/gpio/export"); - system("echo 9 > /sys/class/gpio/export"); - //define their direction - system("echo in > /sys/class/gpio/gpio7/direction"); - system("echo out > /sys/class/gpio/gpio9/direction"); - LOG(logINFO, ("gpio pins defined\n")); - gpioDefined = 1; - }else LOG(logDEBUG1, ("gpio pins already defined earlier\n")); +void defineGPIOpins() { + if (!gpioDefined) { + // define the gpio pins + system("echo 7 > /sys/class/gpio/export"); + system("echo 9 > /sys/class/gpio/export"); + // define their direction + system("echo in > /sys/class/gpio/gpio7/direction"); + system("echo out > /sys/class/gpio/gpio9/direction"); + LOG(logINFO, ("gpio pins defined\n")); + gpioDefined = 1; + } else + LOG(logDEBUG1, ("gpio pins already defined earlier\n")); } -void FPGAdontTouchFlash(){ - //tell FPGA to not touch flash - system("echo 0 > /sys/class/gpio/gpio9/value"); - //usleep(100*1000); +void FPGAdontTouchFlash() { + // tell FPGA to not touch flash + system("echo 0 > /sys/class/gpio/gpio9/value"); + // usleep(100*1000); } -void FPGATouchFlash(){ - //tell FPGA to touch flash to program itself - system("echo 1 > /sys/class/gpio/gpio9/value"); +void FPGATouchFlash() { + // tell FPGA to touch flash to program itself + system("echo 1 > /sys/class/gpio/gpio9/value"); } -void resetFPGA(){ +void resetFPGA() { LOG(logINFOBLUE, ("Reseting FPGA\n")); - FPGAdontTouchFlash(); - FPGATouchFlash(); - usleep(CTRL_SRVR_INIT_TIME_US); + FPGAdontTouchFlash(); + FPGATouchFlash(); + usleep(CTRL_SRVR_INIT_TIME_US); } -void eraseFlash(){ +void eraseFlash() { LOG(logDEBUG1, ("Erasing Flash\n")); - char command[255]; - memset(command, 0, 255); - sprintf(command,"flash_eraseall %s",mtdvalue); - system(command); - LOG(logINFO, ("Flash erased\n")); + char command[255]; + memset(command, 0, 255); + sprintf(command, "flash_eraseall %s", mtdvalue); + system(command); + LOG(logINFO, ("Flash erased\n")); } -int startWritingFPGAprogram(FILE** filefp){ +int startWritingFPGAprogram(FILE **filefp) { LOG(logDEBUG1, ("Start Writing of FPGA program\n")); - //getting the drive - //root:/> cat /proc/mtd - //dev: size erasesize name - //mtd0: 00040000 00020000 "bootloader(nor)" - //mtd1: 00100000 00020000 "linux kernel(nor)" - //mtd2: 002c0000 00020000 "file system(nor)" - //mtd3: 01000000 00010000 "bitfile(spi)" - char output[255]; - memset(output, 0, 255); - FILE* fp = popen("awk \'$4== \"\\\"bitfile(spi)\\\"\" {print $1}\' /proc/mtd", "r"); - if (fp == NULL) { - LOG(logERROR, ("popen returned NULL. Need that to get mtd drive.\n")); - return 1; - } - if (fgets(output, sizeof(output), fp) == NULL) { - LOG(logERROR, ("fgets returned NULL. Need that to get mtd drive.\n")); - return 1; - } - pclose(fp); - memset(mtdvalue, 0, MTDSIZE); - strcpy(mtdvalue,"/dev/"); - char* pch = strtok(output,":"); - if(pch == NULL){ - LOG(logERROR, ("Could not get mtd value\n")); - return 1; - } - strcat(mtdvalue,pch); - LOG(logINFO, ("Flash drive found: %s\n", mtdvalue)); + // getting the drive + // root:/> cat /proc/mtd + // dev: size erasesize name + // mtd0: 00040000 00020000 "bootloader(nor)" + // mtd1: 00100000 00020000 "linux kernel(nor)" + // mtd2: 002c0000 00020000 "file system(nor)" + // mtd3: 01000000 00010000 "bitfile(spi)" + char output[255]; + memset(output, 0, 255); + FILE *fp = popen( + "awk \'$4== \"\\\"bitfile(spi)\\\"\" {print $1}\' /proc/mtd", "r"); + if (fp == NULL) { + LOG(logERROR, ("popen returned NULL. Need that to get mtd drive.\n")); + return 1; + } + if (fgets(output, sizeof(output), fp) == NULL) { + LOG(logERROR, ("fgets returned NULL. Need that to get mtd drive.\n")); + return 1; + } + pclose(fp); + memset(mtdvalue, 0, MTDSIZE); + strcpy(mtdvalue, "/dev/"); + char *pch = strtok(output, ":"); + if (pch == NULL) { + LOG(logERROR, ("Could not get mtd value\n")); + return 1; + } + strcat(mtdvalue, pch); + LOG(logINFO, ("Flash drive found: %s\n", mtdvalue)); - FPGAdontTouchFlash(); + FPGAdontTouchFlash(); - //writing the program to flash - *filefp = fopen(mtdvalue, "w"); - if(*filefp == NULL){ - LOG(logERROR, ("Unable to open %s in write mode\n", mtdvalue)); - return 1; - } - LOG(logINFO, ("Flash ready for writing\n")); + // writing the program to flash + *filefp = fopen(mtdvalue, "w"); + if (*filefp == NULL) { + LOG(logERROR, ("Unable to open %s in write mode\n", mtdvalue)); + return 1; + } + LOG(logINFO, ("Flash ready for writing\n")); - return 0; + return 0; } -void stopWritingFPGAprogram(FILE* filefp){ +void stopWritingFPGAprogram(FILE *filefp) { LOG(logDEBUG1, ("Stopping of writing FPGA program\n")); - int wait = 0; - if(filefp!= NULL){ - fclose(filefp); - wait = 1; - } + int wait = 0; + if (filefp != NULL) { + fclose(filefp); + wait = 1; + } - //touch and program - FPGATouchFlash(); + // touch and program + FPGATouchFlash(); - if(wait){ - LOG(logDEBUG1, ("Waiting for FPGA to program from flash\n")); - //waiting for success or done - char output[255]; - int res=0; - while(res == 0){ - FILE* sysFile = popen("cat /sys/class/gpio/gpio7/value", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - sscanf(output,"%d",&res); - LOG(logDEBUG1, ("gpi07 returned %d\n", res)); - } - } - LOG(logINFO, ("FPGA has picked up the program from flash\n")); + if (wait) { + LOG(logDEBUG1, ("Waiting for FPGA to program from flash\n")); + // waiting for success or done + char output[255]; + int res = 0; + while (res == 0) { + FILE *sysFile = popen("cat /sys/class/gpio/gpio7/value", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + sscanf(output, "%d", &res); + LOG(logDEBUG1, ("gpi07 returned %d\n", res)); + } + } + LOG(logINFO, ("FPGA has picked up the program from flash\n")); } -int writeFPGAProgram(char* fpgasrc, uint64_t fsize, FILE* filefp){ - LOG(logDEBUG1, ("Writing of FPGA Program\n" - "\taddress of fpgasrc:%p\n" - "\tfsize:%llu\n\tpointer:%p\n", - (void *)fpgasrc, (long long unsigned int)fsize, (void*)filefp)); +int writeFPGAProgram(char *fpgasrc, uint64_t fsize, FILE *filefp) { + LOG(logDEBUG1, + ("Writing of FPGA Program\n" + "\taddress of fpgasrc:%p\n" + "\tfsize:%llu\n\tpointer:%p\n", + (void *)fpgasrc, (long long unsigned int)fsize, (void *)filefp)); - if(fwrite((void*)fpgasrc , sizeof(char) , fsize , filefp )!= fsize){ - LOG(logERROR, ("Could not write FPGA source to flash (size:%llu)\n", (long long unsigned int)fsize)); - return 1; - } - LOG(logDEBUG1, ("program written to flash\n")); - return 0; + if (fwrite((void *)fpgasrc, sizeof(char), fsize, filefp) != fsize) { + LOG(logERROR, ("Could not write FPGA source to flash (size:%llu)\n", + (long long unsigned int)fsize)); + return 1; + } + LOG(logDEBUG1, ("program written to flash\n")); + return 0; } diff --git a/slsDetectorServers/slsDetectorServer/src/programFpgaNios.c b/slsDetectorServers/slsDetectorServer/src/programFpgaNios.c old mode 100755 new mode 100644 index a6296eb2b..d4310529b --- a/slsDetectorServers/slsDetectorServer/src/programFpgaNios.c +++ b/slsDetectorServers/slsDetectorServer/src/programFpgaNios.c @@ -3,150 +3,154 @@ #include "clogger.h" #include "slsDetectorServer_defs.h" -#include // usleep #include - +#include // usleep /* global variables */ -#define MTDSIZE 10 +#define MTDSIZE 10 char mtdvalue[MTDSIZE] = {0}; -#define NOTIFICATION_FILE "/tmp/block_shutdown" -#define MICROCONTROLLER_FILE "/dev/ttyAL0" +#define NOTIFICATION_FILE "/tmp/block_shutdown" +#define MICROCONTROLLER_FILE "/dev/ttyAL0" void NotifyServerStartSuccess() { LOG(logINFOBLUE, ("Server started successfully\n")); - char command[255]; - memset(command, 0, 255); - sprintf(command,"echo r > %s",MICROCONTROLLER_FILE); - system(command); + char command[255]; + memset(command, 0, 255); + sprintf(command, "echo r > %s", MICROCONTROLLER_FILE); + system(command); } void CreateNotificationForCriticalTasks() { - FILE* fd = fopen(NOTIFICATION_FILE, "r"); - if (fd == NULL) { - fd = fopen(NOTIFICATION_FILE, "w"); - if (fd == NULL) { - LOG(logERROR, ("Could not create notication file: %s\n", NOTIFICATION_FILE)); - return; - } - LOG(logINFOBLUE, ("Created notification file: %s\n", NOTIFICATION_FILE)); - } - fclose(fd); - NotifyCriticalTaskDone(); + FILE *fd = fopen(NOTIFICATION_FILE, "r"); + if (fd == NULL) { + fd = fopen(NOTIFICATION_FILE, "w"); + if (fd == NULL) { + LOG(logERROR, + ("Could not create notication file: %s\n", NOTIFICATION_FILE)); + return; + } + LOG(logINFOBLUE, + ("Created notification file: %s\n", NOTIFICATION_FILE)); + } + fclose(fd); + NotifyCriticalTaskDone(); } void NotifyCriticalTask() { LOG(logINFO, ("\tNotifying Critical Task Ongoing\n")); - char command[255]; - memset(command, 0, 255); - sprintf(command,"echo 1 > %s",NOTIFICATION_FILE); - system(command); + char command[255]; + memset(command, 0, 255); + sprintf(command, "echo 1 > %s", NOTIFICATION_FILE); + system(command); } void NotifyCriticalTaskDone() { LOG(logINFO, ("\tNotifying Critical Task Done\n")); - char command[255]; - memset(command, 0, 255); - sprintf(command,"echo 0 > %s",NOTIFICATION_FILE); - system(command); + char command[255]; + memset(command, 0, 255); + sprintf(command, "echo 0 > %s", NOTIFICATION_FILE); + system(command); } void rebootControllerAndFPGA() { LOG(logDEBUG1, ("Reseting FPGA...\n")); - char command[255]; - memset(command, 0, 255); - sprintf(command,"echo z > %s",MICROCONTROLLER_FILE); - system(command); + char command[255]; + memset(command, 0, 255); + sprintf(command, "echo z > %s", MICROCONTROLLER_FILE); + system(command); } -int findFlash(char* mess) { - LOG(logDEBUG1, ("Finding flash drive...\n")); - //getting the drive - // # cat /proc/mtd - // dev: size erasesize name - // mtd0: 00580000 00010000 "qspi BootInfo + Factory Image" - // mtd1: 00580000 00010000 "qspi Application Image" - // mtd2: 00800000 00010000 "qspi Linux Kernel with initramfs" - // mtd3: 00800000 00010000 "qspi Linux Kernel with initramfs Backup" - // mtd4: 02500000 00010000 "qspi ubi filesystem" - // mtd5: 04000000 00010000 "qspi Complete Flash" - char output[255]; - memset(output, 0, 255); - FILE* fp = popen("awk \'$5== \"Application\" {print $1}\' /proc/mtd", "r"); - if (fp == NULL) { - strcpy(mess, "popen returned NULL. Need that to get mtd drive.\n"); - LOG(logERROR, (mess)); - return RO_TRIGGER_IN_FALLING_EDGE; - } - if (fgets(output, sizeof(output), fp) == NULL) { - strcpy(mess, "fgets returned NULL. Need that to get mtd drive.\n"); - LOG(logERROR, (mess)); - return FAIL; - } - pclose(fp); - memset(mtdvalue, 0, MTDSIZE); - strcpy(mtdvalue, "/dev/"); - char* pch = strtok(output, ":"); - if (pch == NULL){ - strcpy (mess, "Could not get mtd value\n"); - LOG(logERROR, (mess)); - return FAIL; - } - strcat(mtdvalue, pch); - LOG(logINFO, ("\tFlash drive found: %s\n", mtdvalue)); - return OK; +int findFlash(char *mess) { + LOG(logDEBUG1, ("Finding flash drive...\n")); + // getting the drive + // # cat /proc/mtd + // dev: size erasesize name + // mtd0: 00580000 00010000 "qspi BootInfo + Factory Image" + // mtd1: 00580000 00010000 "qspi Application Image" + // mtd2: 00800000 00010000 "qspi Linux Kernel with initramfs" + // mtd3: 00800000 00010000 "qspi Linux Kernel with initramfs Backup" + // mtd4: 02500000 00010000 "qspi ubi filesystem" + // mtd5: 04000000 00010000 "qspi Complete Flash" + char output[255]; + memset(output, 0, 255); + FILE *fp = popen("awk \'$5== \"Application\" {print $1}\' /proc/mtd", "r"); + if (fp == NULL) { + strcpy(mess, "popen returned NULL. Need that to get mtd drive.\n"); + LOG(logERROR, (mess)); + return RO_TRIGGER_IN_FALLING_EDGE; + } + if (fgets(output, sizeof(output), fp) == NULL) { + strcpy(mess, "fgets returned NULL. Need that to get mtd drive.\n"); + LOG(logERROR, (mess)); + return FAIL; + } + pclose(fp); + memset(mtdvalue, 0, MTDSIZE); + strcpy(mtdvalue, "/dev/"); + char *pch = strtok(output, ":"); + if (pch == NULL) { + strcpy(mess, "Could not get mtd value\n"); + LOG(logERROR, (mess)); + return FAIL; + } + strcat(mtdvalue, pch); + LOG(logINFO, ("\tFlash drive found: %s\n", mtdvalue)); + return OK; } void eraseFlash() { LOG(logDEBUG1, ("Erasing Flash...\n")); - char command[255]; - memset(command, 0, 255); - sprintf(command,"flash_erase %s 0 0",mtdvalue); - system(command); - LOG(logINFO, ("\tFlash erased\n")); + char command[255]; + memset(command, 0, 255); + sprintf(command, "flash_erase %s 0 0", mtdvalue); + system(command); + LOG(logINFO, ("\tFlash erased\n")); } -int eraseAndWriteToFlash(char* mess, char* fpgasrc, uint64_t fsize) { - if (findFlash(mess) == FAIL) { - return FAIL; - } - NotifyCriticalTask(); - eraseFlash(); +int eraseAndWriteToFlash(char *mess, char *fpgasrc, uint64_t fsize) { + if (findFlash(mess) == FAIL) { + return FAIL; + } + NotifyCriticalTask(); + eraseFlash(); - // open file pointer to flash - FILE *filefp = fopen(mtdvalue, "w"); - if(filefp == NULL){ - NotifyCriticalTaskDone(); - sprintf (mess, "Unable to open %s in write mode\n", mtdvalue); - LOG(logERROR, (mess)); - return FAIL; - } - LOG(logINFO, ("\tFlash ready for writing\n")); + // open file pointer to flash + FILE *filefp = fopen(mtdvalue, "w"); + if (filefp == NULL) { + NotifyCriticalTaskDone(); + sprintf(mess, "Unable to open %s in write mode\n", mtdvalue); + LOG(logERROR, (mess)); + return FAIL; + } + LOG(logINFO, ("\tFlash ready for writing\n")); - // write to flash - if (writeFPGAProgram(mess, fpgasrc, fsize, filefp) == FAIL) { - NotifyCriticalTaskDone(); - fclose(filefp); - return FAIL; - } + // write to flash + if (writeFPGAProgram(mess, fpgasrc, fsize, filefp) == FAIL) { + NotifyCriticalTaskDone(); + fclose(filefp); + return FAIL; + } - fclose(filefp); - NotifyCriticalTaskDone(); - return OK; + fclose(filefp); + NotifyCriticalTaskDone(); + return OK; } -int writeFPGAProgram(char* mess, char* fpgasrc, uint64_t fsize, FILE* filefp) { +int writeFPGAProgram(char *mess, char *fpgasrc, uint64_t fsize, FILE *filefp) { LOG(logDEBUG1, ("Writing to flash...\n" - "\taddress of fpgasrc:%p\n" - "\tfsize:%lu\n\tpointer:%p\n", - (void *)fpgasrc, fsize, (void*)filefp)); + "\taddress of fpgasrc:%p\n" + "\tfsize:%lu\n\tpointer:%p\n", + (void *)fpgasrc, fsize, (void *)filefp)); - uint64_t retval = fwrite((void*)fpgasrc , sizeof(char) , fsize , filefp); - if (retval != fsize) { - sprintf (mess, "Could not write FPGA source to flash (size:%llu), write %llu\n", (long long unsigned int) fsize, (long long unsigned int)retval); - LOG(logERROR, (mess)); - return FAIL; - } - LOG(logINFO, ("\tProgram written to flash\n")); - return OK; + uint64_t retval = fwrite((void *)fpgasrc, sizeof(char), fsize, filefp); + if (retval != fsize) { + sprintf( + mess, + "Could not write FPGA source to flash (size:%llu), write %llu\n", + (long long unsigned int)fsize, (long long unsigned int)retval); + LOG(logERROR, (mess)); + return FAIL; + } + LOG(logINFO, ("\tProgram written to flash\n")); + return OK; } diff --git a/slsDetectorServers/slsDetectorServer/src/readDefaultPattern.c b/slsDetectorServers/slsDetectorServer/src/readDefaultPattern.c old mode 100755 new mode 100644 index 2b5855fd9..95125970d --- a/slsDetectorServers/slsDetectorServer/src/readDefaultPattern.c +++ b/slsDetectorServers/slsDetectorServer/src/readDefaultPattern.c @@ -1,8 +1,8 @@ #include "readDefaultPattern.h" -#include "sls_detector_defs.h" -#include "slsDetectorServer_defs.h" #include "ansi.h" #include "clogger.h" +#include "slsDetectorServer_defs.h" +#include "sls_detector_defs.h" #include @@ -14,24 +14,23 @@ extern uint64_t writePatternClkControl(uint64_t word); extern uint64_t writePatternWord(int addr, uint64_t word); extern int setPatternWaitAddress(int level, int addr); extern uint64_t setPatternWaitTime(int level, uint64_t t); -extern void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop); +extern void setPatternLoop(int level, int *startAddr, int *stopAddr, + int *nLoop); +int loadDefaultPattern(char *fname) { + if (initError == FAIL) { + return initError; + } -int loadDefaultPattern(char* fname) { - if (initError == FAIL) { - return initError; - } - - FILE* fd = fopen(fname, "r"); - if(fd == NULL) { - sprintf(initErrorMessage, "Could not open pattern file [%s].\n", fname); - initError = FAIL; - LOG(logERROR, ("%s\n\n", initErrorMessage)); + FILE *fd = fopen(fname, "r"); + if (fd == NULL) { + sprintf(initErrorMessage, "Could not open pattern file [%s].\n", fname); + initError = FAIL; + LOG(logERROR, ("%s\n\n", initErrorMessage)); return FAIL; } LOG(logINFOBLUE, ("Reading default pattern file %s\n", fname)); - // Initialization const size_t LZ = 256; char line[LZ]; @@ -41,61 +40,63 @@ int loadDefaultPattern(char* fname) { // keep reading a line while (fgets(line, LZ, fd)) { - // ignore comments + // ignore comments if (line[0] == '#') { - LOG(logDEBUG1, ("Ignoring Comment\n")); + LOG(logDEBUG1, ("Ignoring Comment\n")); continue; - } + } - // ignore empty lines - if (strlen(line) <= 1) { - LOG(logDEBUG1, ("Ignoring Empty line\n")); - continue; - } + // ignore empty lines + if (strlen(line) <= 1) { + LOG(logDEBUG1, ("Ignoring Empty line\n")); + continue; + } - // removing leading spaces - if (line[0] == ' ' || line[0] == '\t') { - int len = strlen(line); - // find first valid character - int i = 0; - for (i = 0; i < len; ++i) { - if (line[i] != ' ' && line[i] != '\t') { - break; - } - } - // ignore the line full of spaces (last char \n) - if (i >= len - 1) { - LOG(logDEBUG1, ("Ignoring line full of spaces\n")); - continue; - } - // copying only valid char - char temp[LZ]; - memset(temp, 0, LZ); - memcpy(temp, line + i, strlen(line) - i); - memset(line, 0, LZ); - memcpy(line, temp, strlen(temp)); - LOG(logDEBUG1, ("Removing leading spaces.\n")); - } - - LOG(logDEBUG1, ("Command to process: (size:%d) %.*s\n", - strlen(line), strlen(line) -1, line)); - memset(command, 0, LZ); + // removing leading spaces + if (line[0] == ' ' || line[0] == '\t') { + int len = strlen(line); + // find first valid character + int i = 0; + for (i = 0; i < len; ++i) { + if (line[i] != ' ' && line[i] != '\t') { + break; + } + } + // ignore the line full of spaces (last char \n) + if (i >= len - 1) { + LOG(logDEBUG1, ("Ignoring line full of spaces\n")); + continue; + } + // copying only valid char + char temp[LZ]; + memset(temp, 0, LZ); + memcpy(temp, line + i, strlen(line) - i); + memset(line, 0, LZ); + memcpy(line, temp, strlen(temp)); + LOG(logDEBUG1, ("Removing leading spaces.\n")); + } + + LOG(logDEBUG1, ("Command to process: (size:%d) %.*s\n", strlen(line), + strlen(line) - 1, line)); + memset(command, 0, LZ); // patword - if (!strncmp(line, "patword", strlen("patword"))) { + if (!strncmp(line, "patword", strlen("patword"))) { uint32_t addr = 0; uint64_t word = 0; - // cannot scan values + // cannot scan values #ifdef VIRTUAL - if (sscanf(line, "%s 0x%x 0x%lx", command, &addr, &word) != 3) { + if (sscanf(line, "%s 0x%x 0x%lx", command, &addr, &word) != 3) { #else - if (sscanf(line, "%s 0x%x 0x%llx", command, &addr, &word) != 3) { + if (sscanf(line, "%s 0x%x 0x%llx", command, &addr, &word) != 3) { #endif - sprintf(initErrorMessage, "Could not scan patword arguments from default " - "pattern file. Line:[%s].\n", line); - break; - } + sprintf(initErrorMessage, + "Could not scan patword arguments from default " + "pattern file. Line:[%s].\n", + line); + break; + } if (default_writePatternWord(line, addr, word) == FAIL) { break; @@ -103,19 +104,21 @@ int loadDefaultPattern(char* fname) { } // patioctrl - if (!strncmp(line, "patioctrl", strlen("patioctrl"))) { + if (!strncmp(line, "patioctrl", strlen("patioctrl"))) { uint64_t arg = 0; - // cannot scan values + // cannot scan values #ifdef VIRTUAL - if (sscanf(line, "%s 0x%lx", command, &arg) != 2) { + if (sscanf(line, "%s 0x%lx", command, &arg) != 2) { #else - if (sscanf(line, "%s 0x%llx", command, &arg) != 2) { + if (sscanf(line, "%s 0x%llx", command, &arg) != 2) { #endif - sprintf(initErrorMessage, "Could not scan patioctrl arguments from default " - "pattern file. Line:[%s].\n", line); - break; - } + sprintf(initErrorMessage, + "Could not scan patioctrl arguments from default " + "pattern file. Line:[%s].\n", + line); + break; + } if (default_writePatternIOControl(line, arg) == FAIL) { break; @@ -123,19 +126,21 @@ int loadDefaultPattern(char* fname) { } // patclkctrl - if (!strncmp(line, "patclkctrl", strlen("patclkctrl"))) { + if (!strncmp(line, "patclkctrl", strlen("patclkctrl"))) { uint64_t arg = 0; - // cannot scan values + // cannot scan values #ifdef VIRTUAL - if (sscanf(line, "%s 0x%lx", command, &arg) != 2) { + if (sscanf(line, "%s 0x%lx", command, &arg) != 2) { #else - if (sscanf(line, "%s 0x%llx", command, &arg) != 2) { + if (sscanf(line, "%s 0x%llx", command, &arg) != 2) { #endif - sprintf(initErrorMessage, "Could not scan patclkctrl arguments from default " - "pattern file. Line:[%s].\n", line); - break; - } + sprintf(initErrorMessage, + "Could not scan patclkctrl arguments from default " + "pattern file. Line:[%s].\n", + line); + break; + } if (default_writePatternClkControl(line, arg) == FAIL) { break; @@ -143,27 +148,31 @@ int loadDefaultPattern(char* fname) { } // patlimits - if (!strncmp(line, "patlimits", strlen("patlimits"))) { + if (!strncmp(line, "patlimits", strlen("patlimits"))) { uint32_t startAddr = 0; uint32_t stopAddr = 0; - // cannot scan values - if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) != 3) { - sprintf(initErrorMessage, "Could not scan patlimits arguments from default " - "pattern file. Line:[%s].\n", line); - break; - } + // cannot scan values + if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) != + 3) { + sprintf(initErrorMessage, + "Could not scan patlimits arguments from default " + "pattern file. Line:[%s].\n", + line); + break; + } - if (default_setPatternLoopLimits(line, startAddr, stopAddr) == FAIL) { + if (default_setPatternLoopLimits(line, startAddr, stopAddr) == + FAIL) { break; } } // patloop - if ((!strncmp(line, "patloop0", strlen("patloop0"))) || + if ((!strncmp(line, "patloop0", strlen("patloop0"))) || (!strncmp(line, "patloop1", strlen("patloop1"))) || (!strncmp(line, "patloop2", strlen("patloop2")))) { - + // level int level = -1; if (!strncmp(line, "patloop0", strlen("patloop0"))) { @@ -176,23 +185,27 @@ int loadDefaultPattern(char* fname) { uint32_t startAddr = 0; uint32_t stopAddr = 0; - // cannot scan values - if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) != 3) { - sprintf(initErrorMessage, "Could not scan patloop%d arguments from default " - "pattern file. Line:[%s].\n", level, line); - break; - } - - if (default_setPatternLoopAddresses(line, level, startAddr, stopAddr) == FAIL) { + // cannot scan values + if (sscanf(line, "%s 0x%x 0x%x", command, &startAddr, &stopAddr) != + 3) { + sprintf(initErrorMessage, + "Could not scan patloop%d arguments from default " + "pattern file. Line:[%s].\n", + level, line); break; } - } + + if (default_setPatternLoopAddresses(line, level, startAddr, + stopAddr) == FAIL) { + break; + } + } // patnloop - if ((!strncmp(line, "patnloop0", strlen("patnloop0"))) || + if ((!strncmp(line, "patnloop0", strlen("patnloop0"))) || (!strncmp(line, "patnloop1", strlen("patnloop1"))) || (!strncmp(line, "patnloop2", strlen("patnloop2")))) { - + // level int level = -1; if (!strncmp(line, "patnloop0", strlen("patnloop0"))) { @@ -204,20 +217,22 @@ int loadDefaultPattern(char* fname) { } int numLoops = -1; - // cannot scan values - if (sscanf(line, "%s %d", command, &numLoops) != 2) { - sprintf(initErrorMessage, "Could not scan patnloop%d arguments from default " - "pattern file. Line:[%s].\n", level, line); - break; - } + // cannot scan values + if (sscanf(line, "%s %d", command, &numLoops) != 2) { + sprintf(initErrorMessage, + "Could not scan patnloop%d arguments from default " + "pattern file. Line:[%s].\n", + level, line); + break; + } if (default_setPatternLoopCycles(line, level, numLoops) == FAIL) { break; } - } + } // patwait - if ((!strncmp(line, "patwait0", strlen("patwait0"))) || + if ((!strncmp(line, "patwait0", strlen("patwait0"))) || (!strncmp(line, "patwait1", strlen("patwait1"))) || (!strncmp(line, "patwait2", strlen("patwait2")))) { @@ -232,20 +247,22 @@ int loadDefaultPattern(char* fname) { } uint32_t addr = 0; - // cannot scan values - if (sscanf(line, "%s 0x%x", command, &addr) != 2) { - sprintf(initErrorMessage, "Could not scan patwait%d arguments from default " - "pattern file. Line:[%s].\n", level, line); - break; - } + // cannot scan values + if (sscanf(line, "%s 0x%x", command, &addr) != 2) { + sprintf(initErrorMessage, + "Could not scan patwait%d arguments from default " + "pattern file. Line:[%s].\n", + level, line); + break; + } if (default_setPatternWaitAddresses(line, level, addr) == FAIL) { break; } - } + } // patwaittime - if ((!strncmp(line, "patwaittime0", strlen("patwaittime0"))) || + if ((!strncmp(line, "patwaittime0", strlen("patwaittime0"))) || (!strncmp(line, "patwaittime1", strlen("patwaittime1"))) || (!strncmp(line, "patwaittime2", strlen("patwaittime2")))) { @@ -261,42 +278,44 @@ int loadDefaultPattern(char* fname) { uint64_t waittime = 0; - // cannot scan values + // cannot scan values #ifdef VIRTUAL - if (sscanf(line, "%s %ld", command, &waittime) != 2) { + if (sscanf(line, "%s %ld", command, &waittime) != 2) { #else - if (sscanf(line, "%s %lld", command, &waittime) != 2) { + if (sscanf(line, "%s %lld", command, &waittime) != 2) { #endif - sprintf(initErrorMessage, "Could not scan patwaittime%d arguments from default " - "pattern file. Line:[%s].\n", level, line); - break; - } + sprintf(initErrorMessage, + "Could not scan patwaittime%d arguments from default " + "pattern file. Line:[%s].\n", + level, line); + break; + } if (default_setPatternWaitTime(line, level, waittime) == FAIL) { break; } - } + } memset(line, 0, LZ); } - fclose(fd); + fclose(fd); - if (strlen(initErrorMessage)) { - initError = FAIL; - LOG(logERROR, ("%s\n\n", initErrorMessage)); - } else { - LOG(logINFOBLUE, ("Successfully read default pattern file\n")); - } + if (strlen(initErrorMessage)) { + initError = FAIL; + LOG(logERROR, ("%s\n\n", initErrorMessage)); + } else { + LOG(logINFOBLUE, ("Successfully read default pattern file\n")); + } return initError; } - -int default_writePatternWord(char* line, uint32_t addr, uint64_t word) { - //validations +int default_writePatternWord(char *line, uint32_t addr, uint64_t word) { + // validations if ((int32_t)addr < 0 || addr >= MAX_PATTERN_LENGTH) { - sprintf(initErrorMessage, "Cannot set pattern word from default " - "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", - MAX_PATTERN_LENGTH, line); + sprintf(initErrorMessage, + "Cannot set pattern word from default " + "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", + MAX_PATTERN_LENGTH, line); return FAIL; } writePatternWord(addr, word); @@ -304,151 +323,173 @@ int default_writePatternWord(char* line, uint32_t addr, uint64_t word) { return OK; } -int default_writePatternIOControl(char* line, uint64_t arg) { +int default_writePatternIOControl(char *line, uint64_t arg) { uint64_t retval = writePatternIOControl(arg); if (retval != arg) { #ifdef VIRTUAL - sprintf(initErrorMessage, "Could not set patioctrl from default pattern " - "file. Set 0x%lx, read 0x%lx. Line:[%s]\n", arg, retval, line); + sprintf(initErrorMessage, + "Could not set patioctrl from default pattern " + "file. Set 0x%lx, read 0x%lx. Line:[%s]\n", + arg, retval, line); #else - sprintf(initErrorMessage, "Could not set patioctrl from default pattern " - "file. Set 0x%llx, read 0x%llx. Line:[%s]\n", arg, retval, line); + sprintf(initErrorMessage, + "Could not set patioctrl from default pattern " + "file. Set 0x%llx, read 0x%llx. Line:[%s]\n", + arg, retval, line); #endif - return FAIL; - } + return FAIL; + } return OK; } - -int default_writePatternClkControl(char* line, uint64_t arg) { +int default_writePatternClkControl(char *line, uint64_t arg) { uint64_t retval = writePatternClkControl(arg); if (retval != arg) { #ifdef VIRTUAL - sprintf(initErrorMessage, "Could not set patclkctrl from default pattern " - "file. Set 0x%lx, read 0x%lx. Line:[%s]\n", arg, retval, line); + sprintf(initErrorMessage, + "Could not set patclkctrl from default pattern " + "file. Set 0x%lx, read 0x%lx. Line:[%s]\n", + arg, retval, line); #else - sprintf(initErrorMessage, "Could not set patclkctrl from default pattern " - "file. Set 0x%llx, read 0x%llx. Line:[%s]\n", arg, retval, line); + sprintf(initErrorMessage, + "Could not set patclkctrl from default pattern " + "file. Set 0x%llx, read 0x%llx. Line:[%s]\n", + arg, retval, line); #endif - return FAIL; - } + return FAIL; + } return OK; } -int default_setPatternLoopLimits(char* line, uint32_t startAddr, uint32_t stopAddr) { - //validations - if ((int32_t)startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH || +int default_setPatternLoopLimits(char *line, uint32_t startAddr, + uint32_t stopAddr) { + // validations + if ((int32_t)startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH || (int32_t)stopAddr < 0 || stopAddr >= MAX_PATTERN_LENGTH) { - sprintf(initErrorMessage, "Cannot set patlimits from default " - "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", - MAX_PATTERN_LENGTH, line); + sprintf(initErrorMessage, + "Cannot set patlimits from default " + "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", + MAX_PATTERN_LENGTH, line); return FAIL; - } + } int numLoops = -1; int r_startAddr = startAddr, r_stopAddr = stopAddr; setPatternLoop(-1, &r_startAddr, &r_stopAddr, &numLoops); // validate if (r_startAddr != (int)startAddr || r_stopAddr != (int)stopAddr) { - sprintf(initErrorMessage, "Could not set patlimits from default pattern " - "file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n", - r_startAddr, r_stopAddr, line); + sprintf(initErrorMessage, + "Could not set patlimits from default pattern " + "file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n", + r_startAddr, r_stopAddr, line); return FAIL; - } + } return OK; } -int default_setPatternLoopAddresses(char* line, int level, uint32_t startAddr, uint32_t stopAddr) { - //validations +int default_setPatternLoopAddresses(char *line, int level, uint32_t startAddr, + uint32_t stopAddr) { + // validations if (level < 0 || level > 2) { - sprintf(initErrorMessage, "Cannot set patloop from default " - "pattern file. Level must be between 0 and 2. Line:[%s]\n", - line); + sprintf(initErrorMessage, + "Cannot set patloop from default " + "pattern file. Level must be between 0 and 2. Line:[%s]\n", + line); return FAIL; } - if ((int32_t)startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH || + if ((int32_t)startAddr < 0 || startAddr >= MAX_PATTERN_LENGTH || (int32_t)stopAddr < 0 || stopAddr >= MAX_PATTERN_LENGTH) { - sprintf(initErrorMessage, "Cannot set patloop (level: %d) from default " - "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", - level, MAX_PATTERN_LENGTH, line); + sprintf(initErrorMessage, + "Cannot set patloop (level: %d) from default " + "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", + level, MAX_PATTERN_LENGTH, line); return FAIL; - } + } int numLoops = -1; int r_startAddr = startAddr, r_stopAddr = stopAddr; setPatternLoop(level, &r_startAddr, &r_stopAddr, &numLoops); // validate if (r_startAddr != (int)startAddr || r_stopAddr != (int)stopAddr) { - sprintf(initErrorMessage, "Could not set patloop (level: %d) from default " - "pattern file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n", - level, r_startAddr, r_stopAddr, line); + sprintf( + initErrorMessage, + "Could not set patloop (level: %d) from default " + "pattern file. Read start addr:0x%x, stop addr: 0x%x. Line:[%s]\n", + level, r_startAddr, r_stopAddr, line); return FAIL; - } - return OK; + } + return OK; } -int default_setPatternLoopCycles(char* line, int level, int numLoops) { - //validations +int default_setPatternLoopCycles(char *line, int level, int numLoops) { + // validations if (level < 0 || level > 2) { - sprintf(initErrorMessage, "Cannot set patnloop from default " - "pattern file. Level must be between 0 and 2. Line:[%s]\n", - line); + sprintf(initErrorMessage, + "Cannot set patnloop from default " + "pattern file. Level must be between 0 and 2. Line:[%s]\n", + line); return FAIL; } if (numLoops < 0) { - sprintf(initErrorMessage, "Cannot set patnloop from default " - "pattern file. Iterations must be between > 0. Line:[%s]\n", - line); - return FAIL; + sprintf(initErrorMessage, + "Cannot set patnloop from default " + "pattern file. Iterations must be between > 0. Line:[%s]\n", + line); + return FAIL; } int startAddr = -1; - int stopAddr = -1; + int stopAddr = -1; int r_numLoops = numLoops; setPatternLoop(level, &startAddr, &stopAddr, &r_numLoops); // validate if (r_numLoops != numLoops) { - sprintf(initErrorMessage, "Could not set patnloop (level: %d) from default " - "pattern file. Read %d loops. Line:[%s]\n", - level, r_numLoops, line); + sprintf(initErrorMessage, + "Could not set patnloop (level: %d) from default " + "pattern file. Read %d loops. Line:[%s]\n", + level, r_numLoops, line); return FAIL; - } - return OK; + } + return OK; } -int default_setPatternWaitAddresses(char* line, int level, uint32_t addr) { - //validations +int default_setPatternWaitAddresses(char *line, int level, uint32_t addr) { + // validations if (level < 0 || level > 2) { - sprintf(initErrorMessage, "Cannot set patwait address from default " - "pattern file. Level must be between 0 and 2. Line:[%s]\n", - line); + sprintf(initErrorMessage, + "Cannot set patwait address from default " + "pattern file. Level must be between 0 and 2. Line:[%s]\n", + line); return FAIL; } if ((int32_t)addr < 0 || addr >= MAX_PATTERN_LENGTH) { - sprintf(initErrorMessage, "Cannot set patwait address (level: %d) from default " - "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", - level, MAX_PATTERN_LENGTH, line); + sprintf(initErrorMessage, + "Cannot set patwait address (level: %d) from default " + "pattern file. Addr must be between 0 and 0x%x. Line:[%s]\n", + level, MAX_PATTERN_LENGTH, line); return FAIL; - } + } uint32_t retval = setPatternWaitAddress(level, addr); // validate if (retval != addr) { - sprintf(initErrorMessage, "Could not set patwait address (level: %d) from default " - "pattern file. Read addr: 0x%x. Line:[%s]\n", - level, retval, line); + sprintf(initErrorMessage, + "Could not set patwait address (level: %d) from default " + "pattern file. Read addr: 0x%x. Line:[%s]\n", + level, retval, line); return FAIL; - } - return OK; + } + return OK; } -int default_setPatternWaitTime(char* line, int level, uint64_t waittime) { - //validations +int default_setPatternWaitTime(char *line, int level, uint64_t waittime) { + // validations if (level < 0 || level > 2) { - sprintf(initErrorMessage, "Cannot set patwaittime from default " - "pattern file. Level must be between 0 and 2. Line:[%s]\n", - line); + sprintf(initErrorMessage, + "Cannot set patwaittime from default " + "pattern file. Level must be between 0 and 2. Line:[%s]\n", + line); return FAIL; } uint64_t retval = setPatternWaitTime(level, waittime); @@ -456,15 +497,17 @@ int default_setPatternWaitTime(char* line, int level, uint64_t waittime) { // validate if (retval != waittime) { #ifdef VIRTUAL - sprintf(initErrorMessage, "Could not set patwaittime (level: %d) from default " - "pattern file. Read %ld wait time. Line:[%s]\n", - level, retval, line); + sprintf(initErrorMessage, + "Could not set patwaittime (level: %d) from default " + "pattern file. Read %ld wait time. Line:[%s]\n", + level, retval, line); #else - sprintf(initErrorMessage, "Could not set patwaittime (level: %d) from default " - "pattern file. Read %lld wait time. Line:[%s]\n", - level, retval, line); + sprintf(initErrorMessage, + "Could not set patwaittime (level: %d) from default " + "pattern file. Read %lld wait time. Line:[%s]\n", + level, retval, line); #endif return FAIL; - } - return OK; + } + return OK; } diff --git a/slsDetectorServers/slsDetectorServer/src/slsDetectorServer.c b/slsDetectorServers/slsDetectorServer/src/slsDetectorServer.c old mode 100755 new mode 100644 index c324a9f2b..eb3a5d154 --- a/slsDetectorServers/slsDetectorServer/src/slsDetectorServer.c +++ b/slsDetectorServers/slsDetectorServer/src/slsDetectorServer.c @@ -1,11 +1,11 @@ /* A simple server in the internet domain using TCP The port number is passed as an argument */ -#include "sls_detector_defs.h" #include "clogger.h" #include "communication_funcs.h" -#include "slsDetectorServer_funcs.h" #include "slsDetectorServer_defs.h" +#include "slsDetectorServer_funcs.h" +#include "sls_detector_defs.h" #include "versionAPI.h" #ifdef VIRTUAL #include "communication_virtual.h" @@ -24,166 +24,162 @@ extern int sockfd; extern int debugflag; extern int checkModuleFlag; - // Global variables from slsDetectorFunctionList #ifdef GOTTHARDD extern int phaseShift; #endif -void error(char *msg){ - perror(msg); -} +void error(char *msg) { perror(msg); } int main(int argc, char *argv[]) { - // print version - if (argc > 1 && !strcasecmp(argv[1], "-version")) { + // print version + if (argc > 1 && !strcasecmp(argv[1], "-version")) { int version = 0; #ifdef GOTTHARDD version = APIGOTTHARD; #elif EIGERD - version = APIEIGER; + version = APIEIGER; #elif JUNGFRAUD - version = APIJUNGFRAU; + version = APIJUNGFRAU; #elif CHIPTESTBOARDD - version = APICTB; + version = APICTB; #elif MOENCHD - version = APIMOENCH; + version = APIMOENCH; #endif - LOG(logINFO, ("SLS Detector Server %s (0x%x)\n", GITBRANCH, version)); - } + LOG(logINFO, ("SLS Detector Server %s (0x%x)\n", GITBRANCH, version)); + } int portno = DEFAULT_PORTNO; - isControlServer = 1; - debugflag = 0; - checkModuleFlag = 1; + isControlServer = 1; + debugflag = 0; + checkModuleFlag = 1; - // if socket crash, ignores SISPIPE, prevents global signal handler - // subsequent read/write to socket gives error - must handle locally - signal(SIGPIPE, SIG_IGN); + // if socket crash, ignores SISPIPE, prevents global signal handler + // subsequent read/write to socket gives error - must handle locally + signal(SIGPIPE, SIG_IGN); // circumvent the basic tests - { - int i; - for (i = 1; i < argc; ++i) { - if(!strcasecmp(argv[i],"-stopserver")) { - LOG(logINFO, ("Detected stop server\n")); - isControlServer = 0; - } - else if(!strcasecmp(argv[i],"-devel")){ + { + int i; + for (i = 1; i < argc; ++i) { + if (!strcasecmp(argv[i], "-stopserver")) { + LOG(logINFO, ("Detected stop server\n")); + isControlServer = 0; + } else if (!strcasecmp(argv[i], "-devel")) { LOG(logINFO, ("Detected developer mode\n")); debugflag = 1; - } - else if(!strcasecmp(argv[i],"-nomodule")){ + } else if (!strcasecmp(argv[i], "-nomodule")) { LOG(logINFO, ("Detected No Module mode\n")); checkModuleFlag = 0; - } - else if(!strcasecmp(argv[i],"-port")){ - if ((i + 1) >= argc) { - LOG(logERROR, ("no port value given. Exiting.\n")); - return -1; - } - if (sscanf(argv[i + 1], "%d", &portno) == 0) { - LOG(logERROR, ("cannot decode port value %s. Exiting.\n", argv[i + 1])); - return -1; - } - LOG(logINFO, ("Detected port: %d\n", portno)); + } else if (!strcasecmp(argv[i], "-port")) { + if ((i + 1) >= argc) { + LOG(logERROR, ("no port value given. Exiting.\n")); + return -1; + } + if (sscanf(argv[i + 1], "%d", &portno) == 0) { + LOG(logERROR, ("cannot decode port value %s. Exiting.\n", + argv[i + 1])); + return -1; + } + LOG(logINFO, ("Detected port: %d\n", portno)); } #ifdef GOTTHARDD - else if(!strcasecmp(argv[i],"-phaseshift")){ - if ((i + 1) >= argc) { - LOG(logERROR, ("no phase shift value given. Exiting.\n")); - return -1; - } - if (sscanf(argv[i + 1], "%d", &phaseShift) == 0) { - LOG(logERROR, ("cannot decode phase shift value %s. Exiting.\n", argv[i + 1])); - return -1; - } - LOG(logINFO, ("Detected phase shift of %d\n", phaseShift)); - } + else if (!strcasecmp(argv[i], "-phaseshift")) { + if ((i + 1) >= argc) { + LOG(logERROR, ("no phase shift value given. Exiting.\n")); + return -1; + } + if (sscanf(argv[i + 1], "%d", &phaseShift) == 0) { + LOG(logERROR, + ("cannot decode phase shift value %s. Exiting.\n", + argv[i + 1])); + return -1; + } + LOG(logINFO, ("Detected phase shift of %d\n", phaseShift)); + } #endif - } - } + } + } - // control server - if (isControlServer) { + // control server + if (isControlServer) { #ifdef STOP_SERVER - // start stop server process - char cmd[MAX_STR_LENGTH]; - memset(cmd, 0, MAX_STR_LENGTH); - { - int i; - for (i = 0; i < argc; ++i) { - if (!strcasecmp(argv[i], "-port")) { - i +=2; - continue; - } - if (i > 0) { - strcat(cmd, " "); - } - strcat(cmd, argv[i]); - } - char temp[50]; - memset(temp, 0, sizeof(temp)); - sprintf(temp, " -stopserver -port %d &", portno + 1); - strcat(cmd, temp); - - LOG(logDEBUG1, ("Command to start stop server:%s\n", cmd)); - system(cmd); - } - LOG(logINFOBLUE, ("Control Server [%d]\n", portno)); + // start stop server process + char cmd[MAX_STR_LENGTH]; + memset(cmd, 0, MAX_STR_LENGTH); + { + int i; + for (i = 0; i < argc; ++i) { + if (!strcasecmp(argv[i], "-port")) { + i += 2; + continue; + } + if (i > 0) { + strcat(cmd, " "); + } + strcat(cmd, argv[i]); + } + char temp[50]; + memset(temp, 0, sizeof(temp)); + sprintf(temp, " -stopserver -port %d &", portno + 1); + strcat(cmd, temp); + + LOG(logDEBUG1, ("Command to start stop server:%s\n", cmd)); + system(cmd); + } + LOG(logINFOBLUE, ("Control Server [%d]\n", portno)); #ifdef VIRTUAL - // creating files for virtual servers to communicate with each other - if (!ComVirtual_createFiles(portno)) { - return -1; - } + // creating files for virtual servers to communicate with each other + if (!ComVirtual_createFiles(portno)) { + return -1; + } #endif #endif - } - // stop server - else { - LOG(logINFOBLUE, ("Stop Server [%d]\n", portno)); + } + // stop server + else { + LOG(logINFOBLUE, ("Stop Server [%d]\n", portno)); #ifdef VIRTUAL - ComVirtual_setFileNames(portno - 1); + ComVirtual_setFileNames(portno - 1); #endif - } + } + init_detector(); + // bind socket + sockfd = bindSocket(portno); + if (ret == FAIL) + return -1; + // assign function table + function_table(); - init_detector(); - // bind socket - sockfd = bindSocket(portno); - if (ret == FAIL) - return -1; - // assign function table - function_table(); + if (isControlServer) { + LOG(logINFOBLUE, ("Control Server Ready...\n\n")); + } else { + LOG(logINFOBLUE, ("Stop Server Ready...\n\n")); + } - if (isControlServer) { - LOG(logINFOBLUE, ("Control Server Ready...\n\n")); - } else { - LOG(logINFOBLUE, ("Stop Server Ready...\n\n")); - } + // waits for connection + int retval = OK; + while (retval != GOODBYE && retval != REBOOT) { + int fd = acceptConnection(sockfd); + if (fd > 0) { + retval = decode_function(fd); + closeConnection(fd); + } + } - // waits for connection - int retval = OK; - while(retval != GOODBYE && retval != REBOOT) { - int fd = acceptConnection(sockfd); - if (fd > 0) { - retval = decode_function(fd); - closeConnection(fd); - } - } + exitServer(sockfd); - exitServer(sockfd); - - if (retval == REBOOT) { - LOG(logINFORED,("Rebooting!\n")); - fflush(stdout); + if (retval == REBOOT) { + LOG(logINFORED, ("Rebooting!\n")); + fflush(stdout); #if defined(MYTHEN3D) || defined(GOTTHARD2D) - rebootNiosControllerAndFPGA(); + rebootNiosControllerAndFPGA(); #else - system("reboot"); + system("reboot"); #endif - } - LOG(logINFO,("Goodbye!\n")); - return 0; + } + LOG(logINFO, ("Goodbye!\n")); + return 0; } diff --git a/slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c b/slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c old mode 100755 new mode 100644 index 58fbee90d..55e398ce5 --- a/slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c +++ b/slsDetectorServers/slsDetectorServer/src/slsDetectorServer_funcs.c @@ -1,13 +1,13 @@ #include "slsDetectorServer_funcs.h" -#include "slsDetectorFunctionList.h" -#include "communication_funcs.h" #include "clogger.h" +#include "communication_funcs.h" +#include "slsDetectorFunctionList.h" -#include #include +#include #include -//defined in the detector specific Makefile +// defined in the detector specific Makefile #ifdef GOTTHARDD const enum detectorType myDetectorType = GOTTHARD; #elif EIGERD @@ -42,786 +42,981 @@ int debugflag = 0; int checkModuleFlag = 1; udpStruct udpDetails = {32410, 32411, 50001, 50002, 0, 0, 0, 0, 0, 0, 0, 0}; int configured = FAIL; -char configureMessage[MAX_STR_LENGTH]="udp parameters not configured yet"; +char configureMessage[MAX_STR_LENGTH] = "udp parameters not configured yet"; int maxydet = -1; int detectorId = -1; - - // Local variables int (*flist[NUM_DET_FUNCTIONS])(int); - /* initialization functions */ int printSocketReadError() { - LOG(logERROR, ("Error reading from socket. Possible socket crash.\n")); - return FAIL; + LOG(logERROR, ("Error reading from socket. Possible socket crash.\n")); + return FAIL; } - void init_detector() { #ifdef VIRTUAL - LOG(logINFO, ("This is a VIRTUAL detector\n")); + LOG(logINFO, ("This is a VIRTUAL detector\n")); #endif - if (isControlServer) { - basictests(); - initControlServer(); - } - else initStopServer(); - strcpy(mess,"dummy message"); - lockStatus=0; + if (isControlServer) { + basictests(); + initControlServer(); + } else + initStopServer(); + strcpy(mess, "dummy message"); + lockStatus = 0; } - int decode_function(int file_des) { - ret = FAIL; + ret = FAIL; - int n = receiveData(file_des,&fnum,sizeof(fnum),INT32); - if (n <= 0) { - LOG(logDEBUG3, ("ERROR reading from socket n=%d, fnum=%d, file_des=%d, fname=%s\n", - n, fnum, file_des, getFunctionName((enum detFuncs)fnum))); - return FAIL; - } else - LOG(logDEBUG3, ("Received %d bytes\n", n )); + int n = receiveData(file_des, &fnum, sizeof(fnum), INT32); + if (n <= 0) { + LOG(logDEBUG3, + ("ERROR reading from socket n=%d, fnum=%d, file_des=%d, fname=%s\n", + n, fnum, file_des, getFunctionName((enum detFuncs)fnum))); + return FAIL; + } else + LOG(logDEBUG3, ("Received %d bytes\n", n)); - if (fnum < 0 || fnum >= NUM_DET_FUNCTIONS) { - LOG(logERROR, ("Unknown function enum %d\n", fnum)); - ret=(M_nofunc)(file_des); - } else { - LOG(logDEBUG1, (" calling function fnum=%d, (%s)\n", - fnum, getFunctionName((enum detFuncs)fnum))); - ret = (*flist[fnum])(file_des); + if (fnum < 0 || fnum >= NUM_DET_FUNCTIONS) { + LOG(logERROR, ("Unknown function enum %d\n", fnum)); + ret = (M_nofunc)(file_des); + } else { + LOG(logDEBUG1, (" calling function fnum=%d, (%s)\n", fnum, + getFunctionName((enum detFuncs)fnum))); + ret = (*flist[fnum])(file_des); - if (ret == FAIL) { - LOG(logDEBUG1, ("Error executing the function = %d (%s)\n", - fnum, getFunctionName((enum detFuncs)fnum))); - } else LOG(logDEBUG1, ("Function (%s) executed %s\n", - getFunctionName((enum detFuncs)fnum), getRetName())); - } - return ret; + if (ret == FAIL) { + LOG(logDEBUG1, ("Error executing the function = %d (%s)\n", fnum, + getFunctionName((enum detFuncs)fnum))); + } else + LOG(logDEBUG1, + ("Function (%s) executed %s\n", + getFunctionName((enum detFuncs)fnum), getRetName())); + } + return ret; } -const char* getRetName() { - switch(ret) { - case OK: return "OK"; - case FAIL: return "FAIL"; - case GOODBYE: return "GOODBYE"; - case REBOOT: return "REBOOT"; - default: return "unknown"; - } -} - -const char* getRunStateName(enum runStatus ind) { - switch (ind) { - case IDLE: return "idle"; - case ERROR: return "error"; - case WAITING: return "waiting"; - case RUN_FINISHED: return "run_finished"; - case TRANSMITTING: return "transmitting"; - case RUNNING: return "running"; - case STOPPED: return "stopped"; - default: return "unknown"; +const char *getRetName() { + switch (ret) { + case OK: + return "OK"; + case FAIL: + return "FAIL"; + case GOODBYE: + return "GOODBYE"; + case REBOOT: + return "REBOOT"; + default: + return "unknown"; } } -const char* getFunctionName(enum detFuncs func) { - switch (func) { - case F_EXEC_COMMAND: return "F_EXEC_COMMAND"; - case F_GET_DETECTOR_TYPE: return "F_GET_DETECTOR_TYPE"; - case F_SET_EXTERNAL_SIGNAL_FLAG: return "F_SET_EXTERNAL_SIGNAL_FLAG"; - case F_SET_TIMING_MODE: return "F_SET_TIMING_MODE"; - case F_GET_FIRMWARE_VERSION: return "F_GET_FIRMWARE_VERSION"; - case F_GET_SERVER_VERSION: return "F_GET_SERVER_VERSION"; - case F_GET_SERIAL_NUMBER: return "F_GET_SERIAL_NUMBER"; - case F_SET_FIRMWARE_TEST: return "F_SET_FIRMWARE_TEST"; - case F_SET_BUS_TEST: return "F_SET_BUS_TEST"; - case F_SET_IMAGE_TEST_MODE: return "F_SET_IMAGE_TEST_MODE"; - case F_GET_IMAGE_TEST_MODE: return "F_GET_IMAGE_TEST_MODE"; - case F_SET_DAC: return "F_SET_DAC"; - case F_GET_ADC: return "F_GET_ADC"; - case F_WRITE_REGISTER: return "F_WRITE_REGISTER"; - case F_READ_REGISTER: return "F_READ_REGISTER"; - case F_SET_MODULE: return "F_SET_MODULE"; - case F_GET_MODULE: return "F_GET_MODULE"; - case F_SET_SETTINGS: return "F_SET_SETTINGS"; - case F_GET_THRESHOLD_ENERGY: return "F_GET_THRESHOLD_ENERGY"; - case F_START_ACQUISITION: return "F_START_ACQUISITION"; - case F_STOP_ACQUISITION: return "F_STOP_ACQUISITION"; - case F_START_READOUT: return "F_START_READOUT"; - case F_GET_RUN_STATUS: return "F_GET_RUN_STATUS"; - case F_START_AND_READ_ALL: return "F_START_AND_READ_ALL"; - case F_READ_ALL: return "F_READ_ALL"; - case F_GET_NUM_FRAMES: return "F_GET_NUM_FRAMES"; - case F_SET_NUM_FRAMES: return "F_SET_NUM_FRAMES"; - case F_GET_NUM_TRIGGERS: return "F_GET_NUM_TRIGGERS"; - case F_SET_NUM_TRIGGERS: return "F_SET_NUM_TRIGGERS"; - case F_GET_NUM_ADDITIONAL_STORAGE_CELLS:return "F_GET_NUM_ADDITIONAL_STORAGE_CELLS"; - case F_SET_NUM_ADDITIONAL_STORAGE_CELLS:return "F_SET_NUM_ADDITIONAL_STORAGE_CELLS"; - case F_GET_NUM_ANALOG_SAMPLES: return "F_GET_NUM_ANALOG_SAMPLES"; - case F_SET_NUM_ANALOG_SAMPLES: return "F_SET_NUM_ANALOG_SAMPLES"; - case F_GET_NUM_DIGITAL_SAMPLES: return "F_GET_NUM_DIGITAL_SAMPLES"; - case F_SET_NUM_DIGITAL_SAMPLES: return "F_SET_NUM_DIGITAL_SAMPLES"; - case F_GET_EXPTIME: return "F_GET_EXPTIME"; - case F_SET_EXPTIME: return "F_SET_EXPTIME"; - case F_GET_PERIOD: return "F_GET_PERIOD"; - case F_SET_PERIOD: return "F_SET_PERIOD"; - case F_GET_DELAY_AFTER_TRIGGER: return "F_GET_DELAY_AFTER_TRIGGER"; - case F_SET_DELAY_AFTER_TRIGGER: return "F_SET_DELAY_AFTER_TRIGGER"; - case F_GET_SUB_EXPTIME: return "F_GET_SUB_EXPTIME"; - case F_SET_SUB_EXPTIME: return "F_SET_SUB_EXPTIME"; - case F_GET_SUB_DEADTIME: return "F_GET_SUB_DEADTIME"; - case F_SET_SUB_DEADTIME: return "F_SET_SUB_DEADTIME"; - case F_GET_STORAGE_CELL_DELAY: return "F_GET_STORAGE_CELL_DELAY"; - case F_SET_STORAGE_CELL_DELAY: return "F_SET_STORAGE_CELL_DELAY"; - case F_GET_FRAMES_LEFT: return "F_GET_FRAMES_LEFT"; - case F_GET_TRIGGERS_LEFT: return "F_GET_TRIGGERS_LEFT"; - case F_GET_EXPTIME_LEFT: return "F_GET_EXPTIME_LEFT"; - case F_GET_PERIOD_LEFT: return "F_GET_PERIOD_LEFT"; - case F_GET_DELAY_AFTER_TRIGGER_LEFT: return "F_GET_DELAY_AFTER_TRIGGER_LEFT"; - case F_GET_MEASURED_PERIOD: return "F_GET_MEASURED_PERIOD"; - case F_GET_MEASURED_SUBPERIOD: return "F_GET_MEASURED_SUBPERIOD"; - case F_GET_FRAMES_FROM_START: return "F_GET_FRAMES_FROM_START"; - case F_GET_ACTUAL_TIME: return "F_GET_ACTUAL_TIME"; - case F_GET_MEASUREMENT_TIME: return "F_GET_MEASUREMENT_TIME"; - case F_SET_DYNAMIC_RANGE: return "F_SET_DYNAMIC_RANGE"; - case F_SET_ROI: return "F_SET_ROI"; - case F_GET_ROI: return "F_GET_ROI"; - case F_EXIT_SERVER: return "F_EXIT_SERVER"; - case F_LOCK_SERVER: return "F_LOCK_SERVER"; - case F_GET_LAST_CLIENT_IP: return "F_GET_LAST_CLIENT_IP"; - case F_SET_PORT: return "F_SET_PORT"; - case F_ENABLE_TEN_GIGA: return "F_ENABLE_TEN_GIGA"; - case F_SET_ALL_TRIMBITS: return "F_SET_ALL_TRIMBITS"; - case F_SET_PATTERN_IO_CONTROL: return "F_SET_PATTERN_IO_CONTROL"; - case F_SET_PATTERN_CLOCK_CONTROL: return "F_SET_PATTERN_CLOCK_CONTROL"; - case F_SET_PATTERN_WORD: return "F_SET_PATTERN_WORD"; - case F_SET_PATTERN_LOOP_ADDRESSES: return "F_SET_PATTERN_LOOP_ADDRESSES"; - case F_SET_PATTERN_LOOP_CYCLES: return "F_SET_PATTERN_LOOP_CYCLES"; - case F_SET_PATTERN_WAIT_ADDR: return "F_SET_PATTERN_WAIT_ADDR"; - case F_SET_PATTERN_WAIT_TIME: return "F_SET_PATTERN_WAIT_TIME"; - case F_SET_PATTERN_MASK: return "F_SET_PATTERN_MASK"; - case F_GET_PATTERN_MASK: return "F_GET_PATTERN_MASK"; - case F_SET_PATTERN_BIT_MASK: return "F_SET_PATTERN_BIT_MASK"; - case F_GET_PATTERN_BIT_MASK: return "F_GET_PATTERN_BIT_MASK"; - case F_WRITE_ADC_REG: return "F_WRITE_ADC_REG"; - case F_SET_COUNTER_BIT: return "F_SET_COUNTER_BIT"; - case F_PULSE_PIXEL: return "F_PULSE_PIXEL"; - case F_PULSE_PIXEL_AND_MOVE: return "F_PULSE_PIXEL_AND_MOVE"; - case F_PULSE_CHIP: return "F_PULSE_CHIP"; - case F_SET_RATE_CORRECT: return "F_SET_RATE_CORRECT"; - case F_GET_RATE_CORRECT: return "F_GET_RATE_CORRECT"; - case F_SET_TEN_GIGA_FLOW_CONTROL: return "F_SET_TEN_GIGA_FLOW_CONTROL"; - case F_GET_TEN_GIGA_FLOW_CONTROL: return "F_GET_TEN_GIGA_FLOW_CONTROL"; - case F_SET_TRANSMISSION_DELAY_FRAME: return "F_SET_TRANSMISSION_DELAY_FRAME"; - case F_GET_TRANSMISSION_DELAY_FRAME: return "F_GET_TRANSMISSION_DELAY_FRAME"; - case F_SET_TRANSMISSION_DELAY_LEFT: return "F_SET_TRANSMISSION_DELAY_LEFT"; - case F_GET_TRANSMISSION_DELAY_LEFT: return "F_GET_TRANSMISSION_DELAY_LEFT"; - case F_SET_TRANSMISSION_DELAY_RIGHT: return "F_SET_TRANSMISSION_DELAY_RIGHT"; - case F_GET_TRANSMISSION_DELAY_RIGHT: return "F_GET_TRANSMISSION_DELAY_RIGHT"; - case F_PROGRAM_FPGA: return "F_PROGRAM_FPGA"; - case F_RESET_FPGA: return "F_RESET_FPGA"; - case F_POWER_CHIP: return "F_POWER_CHIP"; - case F_ACTIVATE: return "F_ACTIVATE"; - case F_PREPARE_ACQUISITION: return "F_PREPARE_ACQUISITION"; - case F_THRESHOLD_TEMP: return "F_THRESHOLD_TEMP"; - case F_TEMP_CONTROL: return "F_TEMP_CONTROL"; - case F_TEMP_EVENT: return "F_TEMP_EVENT"; - case F_AUTO_COMP_DISABLE: return "F_AUTO_COMP_DISABLE"; - case F_STORAGE_CELL_START: return "F_STORAGE_CELL_START"; - case F_CHECK_VERSION: return "F_CHECK_VERSION"; - case F_SOFTWARE_TRIGGER: return "F_SOFTWARE_TRIGGER"; - case F_LED: return "F_LED"; - case F_DIGITAL_IO_DELAY: return "F_DIGITAL_IO_DELAY"; - case F_COPY_DET_SERVER: return "F_COPY_DET_SERVER"; - case F_REBOOT_CONTROLLER: return "F_REBOOT_CONTROLLER"; - case F_SET_ADC_ENABLE_MASK: return "F_SET_ADC_ENABLE_MASK"; - case F_GET_ADC_ENABLE_MASK: return "F_GET_ADC_ENABLE_MASK"; - case F_SET_ADC_INVERT: return "F_SET_ADC_INVERT"; - case F_GET_ADC_INVERT: return "F_GET_ADC_INVERT"; - case F_EXTERNAL_SAMPLING_SOURCE: return "F_EXTERNAL_SAMPLING_SOURCE"; - case F_EXTERNAL_SAMPLING: return "F_EXTERNAL_SAMPLING"; - case F_SET_STARTING_FRAME_NUMBER: return "F_SET_STARTING_FRAME_NUMBER"; - case F_GET_STARTING_FRAME_NUMBER: return "F_GET_STARTING_FRAME_NUMBER"; - case F_SET_QUAD: return "F_SET_QUAD"; - case F_GET_QUAD: return "F_GET_QUAD"; - case F_SET_INTERRUPT_SUBFRAME: return "F_SET_INTERRUPT_SUBFRAME"; - case F_GET_INTERRUPT_SUBFRAME: return "F_GET_INTERRUPT_SUBFRAME"; - case F_SET_READ_N_LINES: return "F_SET_READ_N_LINES"; - case F_GET_READ_N_LINES: return "F_GET_READ_N_LINES"; - case F_SET_POSITION: return "F_SET_POSITION"; - case F_SET_SOURCE_UDP_MAC: return "F_SET_SOURCE_UDP_MAC"; - case F_GET_SOURCE_UDP_MAC: return "F_GET_SOURCE_UDP_MAC"; - case F_SET_SOURCE_UDP_MAC2: return "F_SET_SOURCE_UDP_MAC2"; - case F_GET_SOURCE_UDP_MAC2: return "F_GET_SOURCE_UDP_MAC2"; - case F_SET_SOURCE_UDP_IP: return "F_SET_SOURCE_UDP_IP"; - case F_GET_SOURCE_UDP_IP: return "F_GET_SOURCE_UDP_IP"; - case F_SET_SOURCE_UDP_IP2: return "F_SET_SOURCE_UDP_IP2"; - case F_GET_SOURCE_UDP_IP2: return "F_GET_SOURCE_UDP_IP2"; - case F_SET_DEST_UDP_MAC: return "F_SET_DEST_UDP_MAC"; - case F_GET_DEST_UDP_MAC: return "F_GET_DEST_UDP_MAC"; - case F_SET_DEST_UDP_MAC2: return "F_SET_DEST_UDP_MAC2"; - case F_GET_DEST_UDP_MAC2: return "F_GET_DEST_UDP_MAC2"; - case F_SET_DEST_UDP_IP: return "F_SET_DEST_UDP_IP"; - case F_GET_DEST_UDP_IP: return "F_GET_DEST_UDP_IP"; - case F_SET_DEST_UDP_IP2: return "F_SET_DEST_UDP_IP2"; - case F_GET_DEST_UDP_IP2: return "F_GET_DEST_UDP_IP2"; - case F_SET_DEST_UDP_PORT: return "F_SET_DEST_UDP_PORT"; - case F_GET_DEST_UDP_PORT: return "F_GET_DEST_UDP_PORT"; - case F_SET_DEST_UDP_PORT2: return "F_SET_DEST_UDP_PORT2"; - case F_GET_DEST_UDP_PORT2: return "F_GET_DEST_UDP_PORT2"; - case F_SET_NUM_INTERFACES: return "F_SET_NUM_INTERFACES"; - case F_GET_NUM_INTERFACES: return "F_GET_NUM_INTERFACES"; - case F_SET_INTERFACE_SEL: return "F_SET_INTERFACE_SEL"; - case F_GET_INTERFACE_SEL: return "F_GET_INTERFACE_SEL"; - case F_SET_PARALLEL_MODE: return "F_SET_PARALLEL_MODE"; - case F_GET_PARALLEL_MODE: return "F_GET_PARALLEL_MODE"; - case F_SET_OVERFLOW_MODE: return "F_SET_OVERFLOW_MODE"; - case F_GET_OVERFLOW_MODE: return "F_GET_OVERFLOW_MODE"; - case F_SET_STOREINRAM_MODE: return "F_SET_STOREINRAM_MODE"; - case F_GET_STOREINRAM_MODE: return "F_GET_STOREINRAM_MODE"; - case F_SET_READOUT_MODE: return "F_SET_READOUT_MODE"; - case F_GET_READOUT_MODE: return "F_GET_READOUT_MODE"; - case F_SET_CLOCK_FREQUENCY: return "F_SET_CLOCK_FREQUENCY"; - case F_GET_CLOCK_FREQUENCY: return "F_GET_CLOCK_FREQUENCY"; - case F_SET_CLOCK_PHASE: return "F_SET_CLOCK_PHASE"; - case F_GET_CLOCK_PHASE: return "F_GET_CLOCK_PHASE"; - case F_GET_MAX_CLOCK_PHASE_SHIFT: return "F_GET_MAX_CLOCK_PHASE_SHIFT"; - case F_SET_CLOCK_DIVIDER: return "F_SET_CLOCK_DIVIDER"; - case F_GET_CLOCK_DIVIDER: return "F_GET_CLOCK_DIVIDER"; - case F_SET_PIPELINE: return "F_SET_PIPELINE"; - case F_GET_PIPELINE: return "F_GET_PIPELINE"; - case F_SET_ON_CHIP_DAC: return "F_SET_ON_CHIP_DAC"; - case F_GET_ON_CHIP_DAC: return "F_GET_ON_CHIP_DAC"; - case F_SET_INJECT_CHANNEL: return "F_SET_INJECT_CHANNEL"; - case F_GET_INJECT_CHANNEL: return "F_GET_INJECT_CHANNEL"; - case F_SET_VETO_PHOTON: return "F_SET_VETO_PHOTON"; - case F_GET_VETO_PHOTON: return "F_GET_VETO_PHOTON"; - case F_SET_VETO_REFERENCE: return "F_SET_VETO_REFERENCE"; - case F_GET_BURST_MODE: return "F_GET_BURST_MODE"; - case F_SET_BURST_MODE: return "F_SET_BURST_MODE"; - case F_SET_ADC_ENABLE_MASK_10G: return "F_SET_ADC_ENABLE_MASK_10G"; - case F_GET_ADC_ENABLE_MASK_10G: return "F_GET_ADC_ENABLE_MASK_10G"; - case F_SET_COUNTER_MASK: return "F_SET_COUNTER_MASK"; - case F_GET_COUNTER_MASK: return "F_GET_COUNTER_MASK"; - case F_GET_NUM_BURSTS: return "F_GET_NUM_BURSTS"; - case F_SET_NUM_BURSTS: return "F_SET_NUM_BURSTS"; - case F_GET_BURST_PERIOD: return "F_GET_BURST_PERIOD"; - case F_SET_BURST_PERIOD: return "F_SET_BURST_PERIOD"; - case F_GET_CURRENT_SOURCE: return "F_GET_CURRENT_SOURCE"; - case F_SET_CURRENT_SOURCE: return "F_SET_CURRENT_SOURCE"; - case F_GET_TIMING_SOURCE: return "F_GET_TIMING_SOURCE"; - case F_SET_TIMING_SOURCE: return "F_SET_TIMING_SOURCE"; - case F_GET_NUM_CHANNELS: return "F_GET_NUM_CHANNELS"; - case F_UPDATE_RATE_CORRECTION: return "F_UPDATE_RATE_CORRECTION"; - case F_GET_RECEIVER_PARAMETERS: return "F_GET_RECEIVER_PARAMETERS"; +const char *getRunStateName(enum runStatus ind) { + switch (ind) { + case IDLE: + return "idle"; + case ERROR: + return "error"; + case WAITING: + return "waiting"; + case RUN_FINISHED: + return "run_finished"; + case TRANSMITTING: + return "transmitting"; + case RUNNING: + return "running"; + case STOPPED: + return "stopped"; + default: + return "unknown"; + } +} - default: return "Unknown Function"; - } +const char *getFunctionName(enum detFuncs func) { + switch (func) { + case F_EXEC_COMMAND: + return "F_EXEC_COMMAND"; + case F_GET_DETECTOR_TYPE: + return "F_GET_DETECTOR_TYPE"; + case F_SET_EXTERNAL_SIGNAL_FLAG: + return "F_SET_EXTERNAL_SIGNAL_FLAG"; + case F_SET_TIMING_MODE: + return "F_SET_TIMING_MODE"; + case F_GET_FIRMWARE_VERSION: + return "F_GET_FIRMWARE_VERSION"; + case F_GET_SERVER_VERSION: + return "F_GET_SERVER_VERSION"; + case F_GET_SERIAL_NUMBER: + return "F_GET_SERIAL_NUMBER"; + case F_SET_FIRMWARE_TEST: + return "F_SET_FIRMWARE_TEST"; + case F_SET_BUS_TEST: + return "F_SET_BUS_TEST"; + case F_SET_IMAGE_TEST_MODE: + return "F_SET_IMAGE_TEST_MODE"; + case F_GET_IMAGE_TEST_MODE: + return "F_GET_IMAGE_TEST_MODE"; + case F_SET_DAC: + return "F_SET_DAC"; + case F_GET_ADC: + return "F_GET_ADC"; + case F_WRITE_REGISTER: + return "F_WRITE_REGISTER"; + case F_READ_REGISTER: + return "F_READ_REGISTER"; + case F_SET_MODULE: + return "F_SET_MODULE"; + case F_GET_MODULE: + return "F_GET_MODULE"; + case F_SET_SETTINGS: + return "F_SET_SETTINGS"; + case F_GET_THRESHOLD_ENERGY: + return "F_GET_THRESHOLD_ENERGY"; + case F_START_ACQUISITION: + return "F_START_ACQUISITION"; + case F_STOP_ACQUISITION: + return "F_STOP_ACQUISITION"; + case F_START_READOUT: + return "F_START_READOUT"; + case F_GET_RUN_STATUS: + return "F_GET_RUN_STATUS"; + case F_START_AND_READ_ALL: + return "F_START_AND_READ_ALL"; + case F_READ_ALL: + return "F_READ_ALL"; + case F_GET_NUM_FRAMES: + return "F_GET_NUM_FRAMES"; + case F_SET_NUM_FRAMES: + return "F_SET_NUM_FRAMES"; + case F_GET_NUM_TRIGGERS: + return "F_GET_NUM_TRIGGERS"; + case F_SET_NUM_TRIGGERS: + return "F_SET_NUM_TRIGGERS"; + case F_GET_NUM_ADDITIONAL_STORAGE_CELLS: + return "F_GET_NUM_ADDITIONAL_STORAGE_CELLS"; + case F_SET_NUM_ADDITIONAL_STORAGE_CELLS: + return "F_SET_NUM_ADDITIONAL_STORAGE_CELLS"; + case F_GET_NUM_ANALOG_SAMPLES: + return "F_GET_NUM_ANALOG_SAMPLES"; + case F_SET_NUM_ANALOG_SAMPLES: + return "F_SET_NUM_ANALOG_SAMPLES"; + case F_GET_NUM_DIGITAL_SAMPLES: + return "F_GET_NUM_DIGITAL_SAMPLES"; + case F_SET_NUM_DIGITAL_SAMPLES: + return "F_SET_NUM_DIGITAL_SAMPLES"; + case F_GET_EXPTIME: + return "F_GET_EXPTIME"; + case F_SET_EXPTIME: + return "F_SET_EXPTIME"; + case F_GET_PERIOD: + return "F_GET_PERIOD"; + case F_SET_PERIOD: + return "F_SET_PERIOD"; + case F_GET_DELAY_AFTER_TRIGGER: + return "F_GET_DELAY_AFTER_TRIGGER"; + case F_SET_DELAY_AFTER_TRIGGER: + return "F_SET_DELAY_AFTER_TRIGGER"; + case F_GET_SUB_EXPTIME: + return "F_GET_SUB_EXPTIME"; + case F_SET_SUB_EXPTIME: + return "F_SET_SUB_EXPTIME"; + case F_GET_SUB_DEADTIME: + return "F_GET_SUB_DEADTIME"; + case F_SET_SUB_DEADTIME: + return "F_SET_SUB_DEADTIME"; + case F_GET_STORAGE_CELL_DELAY: + return "F_GET_STORAGE_CELL_DELAY"; + case F_SET_STORAGE_CELL_DELAY: + return "F_SET_STORAGE_CELL_DELAY"; + case F_GET_FRAMES_LEFT: + return "F_GET_FRAMES_LEFT"; + case F_GET_TRIGGERS_LEFT: + return "F_GET_TRIGGERS_LEFT"; + case F_GET_EXPTIME_LEFT: + return "F_GET_EXPTIME_LEFT"; + case F_GET_PERIOD_LEFT: + return "F_GET_PERIOD_LEFT"; + case F_GET_DELAY_AFTER_TRIGGER_LEFT: + return "F_GET_DELAY_AFTER_TRIGGER_LEFT"; + case F_GET_MEASURED_PERIOD: + return "F_GET_MEASURED_PERIOD"; + case F_GET_MEASURED_SUBPERIOD: + return "F_GET_MEASURED_SUBPERIOD"; + case F_GET_FRAMES_FROM_START: + return "F_GET_FRAMES_FROM_START"; + case F_GET_ACTUAL_TIME: + return "F_GET_ACTUAL_TIME"; + case F_GET_MEASUREMENT_TIME: + return "F_GET_MEASUREMENT_TIME"; + case F_SET_DYNAMIC_RANGE: + return "F_SET_DYNAMIC_RANGE"; + case F_SET_ROI: + return "F_SET_ROI"; + case F_GET_ROI: + return "F_GET_ROI"; + case F_EXIT_SERVER: + return "F_EXIT_SERVER"; + case F_LOCK_SERVER: + return "F_LOCK_SERVER"; + case F_GET_LAST_CLIENT_IP: + return "F_GET_LAST_CLIENT_IP"; + case F_SET_PORT: + return "F_SET_PORT"; + case F_ENABLE_TEN_GIGA: + return "F_ENABLE_TEN_GIGA"; + case F_SET_ALL_TRIMBITS: + return "F_SET_ALL_TRIMBITS"; + case F_SET_PATTERN_IO_CONTROL: + return "F_SET_PATTERN_IO_CONTROL"; + case F_SET_PATTERN_CLOCK_CONTROL: + return "F_SET_PATTERN_CLOCK_CONTROL"; + case F_SET_PATTERN_WORD: + return "F_SET_PATTERN_WORD"; + case F_SET_PATTERN_LOOP_ADDRESSES: + return "F_SET_PATTERN_LOOP_ADDRESSES"; + case F_SET_PATTERN_LOOP_CYCLES: + return "F_SET_PATTERN_LOOP_CYCLES"; + case F_SET_PATTERN_WAIT_ADDR: + return "F_SET_PATTERN_WAIT_ADDR"; + case F_SET_PATTERN_WAIT_TIME: + return "F_SET_PATTERN_WAIT_TIME"; + case F_SET_PATTERN_MASK: + return "F_SET_PATTERN_MASK"; + case F_GET_PATTERN_MASK: + return "F_GET_PATTERN_MASK"; + case F_SET_PATTERN_BIT_MASK: + return "F_SET_PATTERN_BIT_MASK"; + case F_GET_PATTERN_BIT_MASK: + return "F_GET_PATTERN_BIT_MASK"; + case F_WRITE_ADC_REG: + return "F_WRITE_ADC_REG"; + case F_SET_COUNTER_BIT: + return "F_SET_COUNTER_BIT"; + case F_PULSE_PIXEL: + return "F_PULSE_PIXEL"; + case F_PULSE_PIXEL_AND_MOVE: + return "F_PULSE_PIXEL_AND_MOVE"; + case F_PULSE_CHIP: + return "F_PULSE_CHIP"; + case F_SET_RATE_CORRECT: + return "F_SET_RATE_CORRECT"; + case F_GET_RATE_CORRECT: + return "F_GET_RATE_CORRECT"; + case F_SET_TEN_GIGA_FLOW_CONTROL: + return "F_SET_TEN_GIGA_FLOW_CONTROL"; + case F_GET_TEN_GIGA_FLOW_CONTROL: + return "F_GET_TEN_GIGA_FLOW_CONTROL"; + case F_SET_TRANSMISSION_DELAY_FRAME: + return "F_SET_TRANSMISSION_DELAY_FRAME"; + case F_GET_TRANSMISSION_DELAY_FRAME: + return "F_GET_TRANSMISSION_DELAY_FRAME"; + case F_SET_TRANSMISSION_DELAY_LEFT: + return "F_SET_TRANSMISSION_DELAY_LEFT"; + case F_GET_TRANSMISSION_DELAY_LEFT: + return "F_GET_TRANSMISSION_DELAY_LEFT"; + case F_SET_TRANSMISSION_DELAY_RIGHT: + return "F_SET_TRANSMISSION_DELAY_RIGHT"; + case F_GET_TRANSMISSION_DELAY_RIGHT: + return "F_GET_TRANSMISSION_DELAY_RIGHT"; + case F_PROGRAM_FPGA: + return "F_PROGRAM_FPGA"; + case F_RESET_FPGA: + return "F_RESET_FPGA"; + case F_POWER_CHIP: + return "F_POWER_CHIP"; + case F_ACTIVATE: + return "F_ACTIVATE"; + case F_PREPARE_ACQUISITION: + return "F_PREPARE_ACQUISITION"; + case F_THRESHOLD_TEMP: + return "F_THRESHOLD_TEMP"; + case F_TEMP_CONTROL: + return "F_TEMP_CONTROL"; + case F_TEMP_EVENT: + return "F_TEMP_EVENT"; + case F_AUTO_COMP_DISABLE: + return "F_AUTO_COMP_DISABLE"; + case F_STORAGE_CELL_START: + return "F_STORAGE_CELL_START"; + case F_CHECK_VERSION: + return "F_CHECK_VERSION"; + case F_SOFTWARE_TRIGGER: + return "F_SOFTWARE_TRIGGER"; + case F_LED: + return "F_LED"; + case F_DIGITAL_IO_DELAY: + return "F_DIGITAL_IO_DELAY"; + case F_COPY_DET_SERVER: + return "F_COPY_DET_SERVER"; + case F_REBOOT_CONTROLLER: + return "F_REBOOT_CONTROLLER"; + case F_SET_ADC_ENABLE_MASK: + return "F_SET_ADC_ENABLE_MASK"; + case F_GET_ADC_ENABLE_MASK: + return "F_GET_ADC_ENABLE_MASK"; + case F_SET_ADC_INVERT: + return "F_SET_ADC_INVERT"; + case F_GET_ADC_INVERT: + return "F_GET_ADC_INVERT"; + case F_EXTERNAL_SAMPLING_SOURCE: + return "F_EXTERNAL_SAMPLING_SOURCE"; + case F_EXTERNAL_SAMPLING: + return "F_EXTERNAL_SAMPLING"; + case F_SET_STARTING_FRAME_NUMBER: + return "F_SET_STARTING_FRAME_NUMBER"; + case F_GET_STARTING_FRAME_NUMBER: + return "F_GET_STARTING_FRAME_NUMBER"; + case F_SET_QUAD: + return "F_SET_QUAD"; + case F_GET_QUAD: + return "F_GET_QUAD"; + case F_SET_INTERRUPT_SUBFRAME: + return "F_SET_INTERRUPT_SUBFRAME"; + case F_GET_INTERRUPT_SUBFRAME: + return "F_GET_INTERRUPT_SUBFRAME"; + case F_SET_READ_N_LINES: + return "F_SET_READ_N_LINES"; + case F_GET_READ_N_LINES: + return "F_GET_READ_N_LINES"; + case F_SET_POSITION: + return "F_SET_POSITION"; + case F_SET_SOURCE_UDP_MAC: + return "F_SET_SOURCE_UDP_MAC"; + case F_GET_SOURCE_UDP_MAC: + return "F_GET_SOURCE_UDP_MAC"; + case F_SET_SOURCE_UDP_MAC2: + return "F_SET_SOURCE_UDP_MAC2"; + case F_GET_SOURCE_UDP_MAC2: + return "F_GET_SOURCE_UDP_MAC2"; + case F_SET_SOURCE_UDP_IP: + return "F_SET_SOURCE_UDP_IP"; + case F_GET_SOURCE_UDP_IP: + return "F_GET_SOURCE_UDP_IP"; + case F_SET_SOURCE_UDP_IP2: + return "F_SET_SOURCE_UDP_IP2"; + case F_GET_SOURCE_UDP_IP2: + return "F_GET_SOURCE_UDP_IP2"; + case F_SET_DEST_UDP_MAC: + return "F_SET_DEST_UDP_MAC"; + case F_GET_DEST_UDP_MAC: + return "F_GET_DEST_UDP_MAC"; + case F_SET_DEST_UDP_MAC2: + return "F_SET_DEST_UDP_MAC2"; + case F_GET_DEST_UDP_MAC2: + return "F_GET_DEST_UDP_MAC2"; + case F_SET_DEST_UDP_IP: + return "F_SET_DEST_UDP_IP"; + case F_GET_DEST_UDP_IP: + return "F_GET_DEST_UDP_IP"; + case F_SET_DEST_UDP_IP2: + return "F_SET_DEST_UDP_IP2"; + case F_GET_DEST_UDP_IP2: + return "F_GET_DEST_UDP_IP2"; + case F_SET_DEST_UDP_PORT: + return "F_SET_DEST_UDP_PORT"; + case F_GET_DEST_UDP_PORT: + return "F_GET_DEST_UDP_PORT"; + case F_SET_DEST_UDP_PORT2: + return "F_SET_DEST_UDP_PORT2"; + case F_GET_DEST_UDP_PORT2: + return "F_GET_DEST_UDP_PORT2"; + case F_SET_NUM_INTERFACES: + return "F_SET_NUM_INTERFACES"; + case F_GET_NUM_INTERFACES: + return "F_GET_NUM_INTERFACES"; + case F_SET_INTERFACE_SEL: + return "F_SET_INTERFACE_SEL"; + case F_GET_INTERFACE_SEL: + return "F_GET_INTERFACE_SEL"; + case F_SET_PARALLEL_MODE: + return "F_SET_PARALLEL_MODE"; + case F_GET_PARALLEL_MODE: + return "F_GET_PARALLEL_MODE"; + case F_SET_OVERFLOW_MODE: + return "F_SET_OVERFLOW_MODE"; + case F_GET_OVERFLOW_MODE: + return "F_GET_OVERFLOW_MODE"; + case F_SET_STOREINRAM_MODE: + return "F_SET_STOREINRAM_MODE"; + case F_GET_STOREINRAM_MODE: + return "F_GET_STOREINRAM_MODE"; + case F_SET_READOUT_MODE: + return "F_SET_READOUT_MODE"; + case F_GET_READOUT_MODE: + return "F_GET_READOUT_MODE"; + case F_SET_CLOCK_FREQUENCY: + return "F_SET_CLOCK_FREQUENCY"; + case F_GET_CLOCK_FREQUENCY: + return "F_GET_CLOCK_FREQUENCY"; + case F_SET_CLOCK_PHASE: + return "F_SET_CLOCK_PHASE"; + case F_GET_CLOCK_PHASE: + return "F_GET_CLOCK_PHASE"; + case F_GET_MAX_CLOCK_PHASE_SHIFT: + return "F_GET_MAX_CLOCK_PHASE_SHIFT"; + case F_SET_CLOCK_DIVIDER: + return "F_SET_CLOCK_DIVIDER"; + case F_GET_CLOCK_DIVIDER: + return "F_GET_CLOCK_DIVIDER"; + case F_SET_PIPELINE: + return "F_SET_PIPELINE"; + case F_GET_PIPELINE: + return "F_GET_PIPELINE"; + case F_SET_ON_CHIP_DAC: + return "F_SET_ON_CHIP_DAC"; + case F_GET_ON_CHIP_DAC: + return "F_GET_ON_CHIP_DAC"; + case F_SET_INJECT_CHANNEL: + return "F_SET_INJECT_CHANNEL"; + case F_GET_INJECT_CHANNEL: + return "F_GET_INJECT_CHANNEL"; + case F_SET_VETO_PHOTON: + return "F_SET_VETO_PHOTON"; + case F_GET_VETO_PHOTON: + return "F_GET_VETO_PHOTON"; + case F_SET_VETO_REFERENCE: + return "F_SET_VETO_REFERENCE"; + case F_GET_BURST_MODE: + return "F_GET_BURST_MODE"; + case F_SET_BURST_MODE: + return "F_SET_BURST_MODE"; + case F_SET_ADC_ENABLE_MASK_10G: + return "F_SET_ADC_ENABLE_MASK_10G"; + case F_GET_ADC_ENABLE_MASK_10G: + return "F_GET_ADC_ENABLE_MASK_10G"; + case F_SET_COUNTER_MASK: + return "F_SET_COUNTER_MASK"; + case F_GET_COUNTER_MASK: + return "F_GET_COUNTER_MASK"; + case F_GET_NUM_BURSTS: + return "F_GET_NUM_BURSTS"; + case F_SET_NUM_BURSTS: + return "F_SET_NUM_BURSTS"; + case F_GET_BURST_PERIOD: + return "F_GET_BURST_PERIOD"; + case F_SET_BURST_PERIOD: + return "F_SET_BURST_PERIOD"; + case F_GET_CURRENT_SOURCE: + return "F_GET_CURRENT_SOURCE"; + case F_SET_CURRENT_SOURCE: + return "F_SET_CURRENT_SOURCE"; + case F_GET_TIMING_SOURCE: + return "F_GET_TIMING_SOURCE"; + case F_SET_TIMING_SOURCE: + return "F_SET_TIMING_SOURCE"; + case F_GET_NUM_CHANNELS: + return "F_GET_NUM_CHANNELS"; + case F_UPDATE_RATE_CORRECTION: + return "F_UPDATE_RATE_CORRECTION"; + case F_GET_RECEIVER_PARAMETERS: + return "F_GET_RECEIVER_PARAMETERS"; + + default: + return "Unknown Function"; + } } void function_table() { - flist[F_EXEC_COMMAND] = &exec_command; - flist[F_GET_DETECTOR_TYPE] = &get_detector_type; - flist[F_SET_EXTERNAL_SIGNAL_FLAG] = &set_external_signal_flag; - flist[F_SET_TIMING_MODE] = &set_timing_mode; - flist[F_GET_FIRMWARE_VERSION] = &get_firmware_version; - flist[F_GET_SERVER_VERSION] = &get_server_version; - flist[F_GET_SERIAL_NUMBER] = &get_serial_number; - flist[F_SET_FIRMWARE_TEST] = &set_firmware_test; - flist[F_SET_BUS_TEST] = &set_bus_test; - flist[F_SET_IMAGE_TEST_MODE] = &set_image_test_mode; - flist[F_GET_IMAGE_TEST_MODE] = &get_image_test_mode; - flist[F_SET_DAC] = &set_dac; - flist[F_GET_ADC] = &get_adc; - flist[F_WRITE_REGISTER] = &write_register; - flist[F_READ_REGISTER] = &read_register; - flist[F_SET_MODULE] = &set_module; - flist[F_GET_MODULE] = &get_module; - flist[F_SET_SETTINGS] = &set_settings; - flist[F_GET_THRESHOLD_ENERGY] = &get_threshold_energy; - flist[F_START_ACQUISITION] = &start_acquisition; - flist[F_STOP_ACQUISITION] = &stop_acquisition; - flist[F_START_READOUT] = &start_readout; - flist[F_GET_RUN_STATUS] = &get_run_status; - flist[F_START_AND_READ_ALL] = &start_and_read_all; - flist[F_READ_ALL] = &read_all; - flist[F_GET_NUM_FRAMES] = &get_num_frames; - flist[F_SET_NUM_FRAMES] = &set_num_frames; - flist[F_GET_NUM_TRIGGERS] = &get_num_triggers; - flist[F_SET_NUM_TRIGGERS] = &set_num_triggers; - flist[F_GET_NUM_ADDITIONAL_STORAGE_CELLS] = &get_num_additional_storage_cells; - flist[F_SET_NUM_ADDITIONAL_STORAGE_CELLS] = &set_num_additional_storage_cells; - flist[F_GET_NUM_ANALOG_SAMPLES] = &get_num_analog_samples; - flist[F_SET_NUM_ANALOG_SAMPLES] = &set_num_analog_samples; - flist[F_GET_NUM_DIGITAL_SAMPLES] = &get_num_digital_samples; - flist[F_SET_NUM_DIGITAL_SAMPLES] = &set_num_digital_samples; - flist[F_GET_EXPTIME] = &get_exptime; - flist[F_SET_EXPTIME] = &set_exptime; - flist[F_GET_PERIOD] = &get_period; - flist[F_SET_PERIOD] = &set_period; - flist[F_GET_DELAY_AFTER_TRIGGER] = &get_delay_after_trigger; - flist[F_SET_DELAY_AFTER_TRIGGER] = &set_delay_after_trigger; - flist[F_GET_SUB_EXPTIME] = &get_sub_exptime; - flist[F_SET_SUB_EXPTIME] = &set_sub_exptime; - flist[F_GET_SUB_DEADTIME] = &get_sub_deadtime; - flist[F_SET_SUB_DEADTIME] = &set_sub_deadtime; - flist[F_GET_STORAGE_CELL_DELAY] = &get_storage_cell_delay; - flist[F_SET_STORAGE_CELL_DELAY] = &set_storage_cell_delay; - flist[F_GET_FRAMES_LEFT] = &get_frames_left; - flist[F_GET_TRIGGERS_LEFT] = &get_triggers_left; - flist[F_GET_EXPTIME_LEFT] = &get_exptime_left; - flist[F_GET_PERIOD_LEFT] = &get_period_left; - flist[F_GET_DELAY_AFTER_TRIGGER_LEFT] = &get_delay_after_trigger_left; - flist[F_GET_MEASURED_PERIOD] = &get_measured_period; - flist[F_GET_MEASURED_SUBPERIOD] = &get_measured_subperiod; - flist[F_GET_FRAMES_FROM_START] = &get_frames_from_start; - flist[F_GET_ACTUAL_TIME] = &get_actual_time; - flist[F_GET_MEASUREMENT_TIME] = &get_measurement_time; - flist[F_SET_DYNAMIC_RANGE] = &set_dynamic_range; - flist[F_SET_ROI] = &set_roi; - flist[F_GET_ROI] = &get_roi; - flist[F_EXIT_SERVER] = &exit_server; - flist[F_LOCK_SERVER] = &lock_server; - flist[F_GET_LAST_CLIENT_IP] = &get_last_client_ip; - flist[F_SET_PORT] = &set_port; - flist[F_ENABLE_TEN_GIGA] = &enable_ten_giga; - flist[F_SET_ALL_TRIMBITS] = &set_all_trimbits; - flist[F_SET_PATTERN_IO_CONTROL] = &set_pattern_io_control; - flist[F_SET_PATTERN_CLOCK_CONTROL] = &set_pattern_clock_control; - flist[F_SET_PATTERN_WORD] = &set_pattern_word; - flist[F_SET_PATTERN_LOOP_ADDRESSES] = &set_pattern_loop_addresses; - flist[F_SET_PATTERN_LOOP_CYCLES] = &set_pattern_loop_cycles; - flist[F_SET_PATTERN_WAIT_ADDR] = &set_pattern_wait_addr; - flist[F_SET_PATTERN_WAIT_TIME] = &set_pattern_wait_time; - flist[F_SET_PATTERN_MASK] = &set_pattern_mask; - flist[F_GET_PATTERN_MASK] = &get_pattern_mask; - flist[F_SET_PATTERN_BIT_MASK] = &set_pattern_bit_mask; - flist[F_GET_PATTERN_BIT_MASK] = &get_pattern_bit_mask; - flist[F_WRITE_ADC_REG] = &write_adc_register; - flist[F_SET_COUNTER_BIT] = &set_counter_bit; - flist[F_PULSE_PIXEL] = &pulse_pixel; - flist[F_PULSE_PIXEL_AND_MOVE] = &pulse_pixel_and_move; - flist[F_PULSE_CHIP] = &pulse_chip; - flist[F_SET_RATE_CORRECT] = &set_rate_correct; - flist[F_GET_RATE_CORRECT] = &get_rate_correct; - flist[F_SET_TEN_GIGA_FLOW_CONTROL] = &set_ten_giga_flow_control; - flist[F_GET_TEN_GIGA_FLOW_CONTROL] = &get_ten_giga_flow_control; - flist[F_SET_TRANSMISSION_DELAY_FRAME] = &set_transmission_delay_frame; - flist[F_GET_TRANSMISSION_DELAY_FRAME] = &get_transmission_delay_frame; - flist[F_SET_TRANSMISSION_DELAY_LEFT] = &set_transmission_delay_left; - flist[F_GET_TRANSMISSION_DELAY_LEFT] = &get_transmission_delay_left; - flist[F_SET_TRANSMISSION_DELAY_RIGHT] = &set_transmission_delay_right; - flist[F_GET_TRANSMISSION_DELAY_RIGHT] = &get_transmission_delay_right; - flist[F_PROGRAM_FPGA] = &program_fpga; - flist[F_RESET_FPGA] = &reset_fpga; - flist[F_POWER_CHIP] = &power_chip; - flist[F_ACTIVATE] = &set_activate; - flist[F_PREPARE_ACQUISITION] = &prepare_acquisition; - flist[F_THRESHOLD_TEMP] = &threshold_temp; - flist[F_TEMP_CONTROL] = &temp_control; - flist[F_TEMP_EVENT] = &temp_event; - flist[F_AUTO_COMP_DISABLE] = &auto_comp_disable; - flist[F_STORAGE_CELL_START] = &storage_cell_start; - flist[F_CHECK_VERSION] = &check_version; - flist[F_SOFTWARE_TRIGGER] = &software_trigger; - flist[F_LED] = &led; - flist[F_DIGITAL_IO_DELAY] = &digital_io_delay; - flist[F_COPY_DET_SERVER] = ©_detector_server; - flist[F_REBOOT_CONTROLLER] = &reboot_controller; - flist[F_SET_ADC_ENABLE_MASK] = &set_adc_enable_mask; - flist[F_GET_ADC_ENABLE_MASK] = &get_adc_enable_mask; - flist[F_SET_ADC_INVERT] = &set_adc_invert; - flist[F_GET_ADC_INVERT] = &get_adc_invert; - flist[F_EXTERNAL_SAMPLING_SOURCE] = &set_external_sampling_source; - flist[F_EXTERNAL_SAMPLING] = &set_external_sampling; - flist[F_SET_STARTING_FRAME_NUMBER] = &set_starting_frame_number; - flist[F_GET_STARTING_FRAME_NUMBER] = &get_starting_frame_number; - flist[F_SET_QUAD] = &set_quad; - flist[F_GET_QUAD] = &get_quad; - flist[F_SET_INTERRUPT_SUBFRAME] = &set_interrupt_subframe; - flist[F_GET_INTERRUPT_SUBFRAME] = &get_interrupt_subframe; - flist[F_SET_READ_N_LINES] = &set_read_n_lines; - flist[F_GET_READ_N_LINES] = &get_read_n_lines; - flist[F_SET_POSITION] = &set_detector_position; - flist[F_SET_SOURCE_UDP_MAC] = &set_source_udp_mac; - flist[F_GET_SOURCE_UDP_MAC] = &get_source_udp_mac; - flist[F_SET_SOURCE_UDP_MAC2] = &set_source_udp_mac2; - flist[F_GET_SOURCE_UDP_MAC2] = &get_source_udp_mac2; - flist[F_SET_SOURCE_UDP_IP] = &set_source_udp_ip; - flist[F_GET_SOURCE_UDP_IP] = &get_source_udp_ip; - flist[F_SET_SOURCE_UDP_IP2] = &set_source_udp_ip2; - flist[F_GET_SOURCE_UDP_IP2] = &get_source_udp_ip2; - flist[F_SET_DEST_UDP_MAC] = &set_dest_udp_mac; - flist[F_GET_DEST_UDP_MAC] = &get_dest_udp_mac; - flist[F_SET_DEST_UDP_MAC2] = &set_dest_udp_mac2; - flist[F_GET_DEST_UDP_MAC2] = &get_dest_udp_mac2; - flist[F_SET_DEST_UDP_IP] = &set_dest_udp_ip; - flist[F_GET_DEST_UDP_IP] = &get_dest_udp_ip; - flist[F_SET_DEST_UDP_IP2] = &set_dest_udp_ip2; - flist[F_GET_DEST_UDP_IP2] = &get_dest_udp_ip2; - flist[F_SET_DEST_UDP_PORT] = &set_dest_udp_port; - flist[F_GET_DEST_UDP_PORT] = &get_dest_udp_port; - flist[F_SET_DEST_UDP_PORT2] = &set_dest_udp_port2; - flist[F_GET_DEST_UDP_PORT2] = &get_dest_udp_port2; - flist[F_SET_NUM_INTERFACES] = &set_num_interfaces; - flist[F_GET_NUM_INTERFACES] = &get_num_interfaces; - flist[F_SET_INTERFACE_SEL] = &set_interface_sel; - flist[F_GET_INTERFACE_SEL] = &get_interface_sel; - flist[F_SET_PARALLEL_MODE] = &set_parallel_mode; - flist[F_GET_PARALLEL_MODE] = &get_parallel_mode; - flist[F_SET_OVERFLOW_MODE] = &set_overflow_mode; - flist[F_GET_OVERFLOW_MODE] = &get_overflow_mode; - flist[F_SET_STOREINRAM_MODE] = &set_storeinram; - flist[F_GET_STOREINRAM_MODE] = &get_storeinram; - flist[F_SET_READOUT_MODE] = &set_readout_mode; - flist[F_GET_READOUT_MODE] = &get_readout_mode; - flist[F_SET_CLOCK_FREQUENCY] = &set_clock_frequency; - flist[F_GET_CLOCK_FREQUENCY] = &get_clock_frequency; - flist[F_SET_CLOCK_PHASE] = &set_clock_phase; - flist[F_GET_CLOCK_PHASE] = &get_clock_phase; - flist[F_GET_MAX_CLOCK_PHASE_SHIFT] = &get_max_clock_phase_shift; - flist[F_SET_CLOCK_DIVIDER] = &set_clock_divider; - flist[F_GET_CLOCK_DIVIDER] = &get_clock_divider; - flist[F_SET_PIPELINE] = &set_pipeline; - flist[F_GET_PIPELINE] = &get_pipeline; - flist[F_SET_ON_CHIP_DAC] = &set_on_chip_dac; - flist[F_GET_ON_CHIP_DAC] = &get_on_chip_dac; - flist[F_SET_INJECT_CHANNEL] = &set_inject_channel; - flist[F_GET_INJECT_CHANNEL] = &get_inject_channel; - flist[F_SET_VETO_PHOTON] = &set_veto_photon; - flist[F_GET_VETO_PHOTON] = &get_veto_photon; - flist[F_SET_VETO_REFERENCE] = &set_veto_reference; - flist[F_GET_BURST_MODE] = &get_burst_mode; - flist[F_SET_BURST_MODE] = &set_burst_mode; - flist[F_SET_ADC_ENABLE_MASK_10G] = &set_adc_enable_mask_10g; - flist[F_GET_ADC_ENABLE_MASK_10G] = &get_adc_enable_mask_10g; - flist[F_SET_COUNTER_MASK] = &set_counter_mask; - flist[F_GET_COUNTER_MASK] = &get_counter_mask; - flist[F_GET_NUM_BURSTS] = &get_num_bursts; - flist[F_SET_NUM_BURSTS] = &set_num_bursts; - flist[F_GET_BURST_PERIOD] = &get_burst_period; - flist[F_SET_BURST_PERIOD] = &set_burst_period; - flist[F_GET_CURRENT_SOURCE] = &get_current_source; - flist[F_SET_CURRENT_SOURCE] = &set_current_source; - flist[F_GET_TIMING_SOURCE] = &get_timing_source; - flist[F_SET_TIMING_SOURCE] = &set_timing_source; - flist[F_GET_NUM_CHANNELS] = &get_num_channels; - flist[F_UPDATE_RATE_CORRECTION] = &update_rate_correction; - flist[F_GET_RECEIVER_PARAMETERS] = &get_receiver_parameters; + flist[F_EXEC_COMMAND] = &exec_command; + flist[F_GET_DETECTOR_TYPE] = &get_detector_type; + flist[F_SET_EXTERNAL_SIGNAL_FLAG] = &set_external_signal_flag; + flist[F_SET_TIMING_MODE] = &set_timing_mode; + flist[F_GET_FIRMWARE_VERSION] = &get_firmware_version; + flist[F_GET_SERVER_VERSION] = &get_server_version; + flist[F_GET_SERIAL_NUMBER] = &get_serial_number; + flist[F_SET_FIRMWARE_TEST] = &set_firmware_test; + flist[F_SET_BUS_TEST] = &set_bus_test; + flist[F_SET_IMAGE_TEST_MODE] = &set_image_test_mode; + flist[F_GET_IMAGE_TEST_MODE] = &get_image_test_mode; + flist[F_SET_DAC] = &set_dac; + flist[F_GET_ADC] = &get_adc; + flist[F_WRITE_REGISTER] = &write_register; + flist[F_READ_REGISTER] = &read_register; + flist[F_SET_MODULE] = &set_module; + flist[F_GET_MODULE] = &get_module; + flist[F_SET_SETTINGS] = &set_settings; + flist[F_GET_THRESHOLD_ENERGY] = &get_threshold_energy; + flist[F_START_ACQUISITION] = &start_acquisition; + flist[F_STOP_ACQUISITION] = &stop_acquisition; + flist[F_START_READOUT] = &start_readout; + flist[F_GET_RUN_STATUS] = &get_run_status; + flist[F_START_AND_READ_ALL] = &start_and_read_all; + flist[F_READ_ALL] = &read_all; + flist[F_GET_NUM_FRAMES] = &get_num_frames; + flist[F_SET_NUM_FRAMES] = &set_num_frames; + flist[F_GET_NUM_TRIGGERS] = &get_num_triggers; + flist[F_SET_NUM_TRIGGERS] = &set_num_triggers; + flist[F_GET_NUM_ADDITIONAL_STORAGE_CELLS] = + &get_num_additional_storage_cells; + flist[F_SET_NUM_ADDITIONAL_STORAGE_CELLS] = + &set_num_additional_storage_cells; + flist[F_GET_NUM_ANALOG_SAMPLES] = &get_num_analog_samples; + flist[F_SET_NUM_ANALOG_SAMPLES] = &set_num_analog_samples; + flist[F_GET_NUM_DIGITAL_SAMPLES] = &get_num_digital_samples; + flist[F_SET_NUM_DIGITAL_SAMPLES] = &set_num_digital_samples; + flist[F_GET_EXPTIME] = &get_exptime; + flist[F_SET_EXPTIME] = &set_exptime; + flist[F_GET_PERIOD] = &get_period; + flist[F_SET_PERIOD] = &set_period; + flist[F_GET_DELAY_AFTER_TRIGGER] = &get_delay_after_trigger; + flist[F_SET_DELAY_AFTER_TRIGGER] = &set_delay_after_trigger; + flist[F_GET_SUB_EXPTIME] = &get_sub_exptime; + flist[F_SET_SUB_EXPTIME] = &set_sub_exptime; + flist[F_GET_SUB_DEADTIME] = &get_sub_deadtime; + flist[F_SET_SUB_DEADTIME] = &set_sub_deadtime; + flist[F_GET_STORAGE_CELL_DELAY] = &get_storage_cell_delay; + flist[F_SET_STORAGE_CELL_DELAY] = &set_storage_cell_delay; + flist[F_GET_FRAMES_LEFT] = &get_frames_left; + flist[F_GET_TRIGGERS_LEFT] = &get_triggers_left; + flist[F_GET_EXPTIME_LEFT] = &get_exptime_left; + flist[F_GET_PERIOD_LEFT] = &get_period_left; + flist[F_GET_DELAY_AFTER_TRIGGER_LEFT] = &get_delay_after_trigger_left; + flist[F_GET_MEASURED_PERIOD] = &get_measured_period; + flist[F_GET_MEASURED_SUBPERIOD] = &get_measured_subperiod; + flist[F_GET_FRAMES_FROM_START] = &get_frames_from_start; + flist[F_GET_ACTUAL_TIME] = &get_actual_time; + flist[F_GET_MEASUREMENT_TIME] = &get_measurement_time; + flist[F_SET_DYNAMIC_RANGE] = &set_dynamic_range; + flist[F_SET_ROI] = &set_roi; + flist[F_GET_ROI] = &get_roi; + flist[F_EXIT_SERVER] = &exit_server; + flist[F_LOCK_SERVER] = &lock_server; + flist[F_GET_LAST_CLIENT_IP] = &get_last_client_ip; + flist[F_SET_PORT] = &set_port; + flist[F_ENABLE_TEN_GIGA] = &enable_ten_giga; + flist[F_SET_ALL_TRIMBITS] = &set_all_trimbits; + flist[F_SET_PATTERN_IO_CONTROL] = &set_pattern_io_control; + flist[F_SET_PATTERN_CLOCK_CONTROL] = &set_pattern_clock_control; + flist[F_SET_PATTERN_WORD] = &set_pattern_word; + flist[F_SET_PATTERN_LOOP_ADDRESSES] = &set_pattern_loop_addresses; + flist[F_SET_PATTERN_LOOP_CYCLES] = &set_pattern_loop_cycles; + flist[F_SET_PATTERN_WAIT_ADDR] = &set_pattern_wait_addr; + flist[F_SET_PATTERN_WAIT_TIME] = &set_pattern_wait_time; + flist[F_SET_PATTERN_MASK] = &set_pattern_mask; + flist[F_GET_PATTERN_MASK] = &get_pattern_mask; + flist[F_SET_PATTERN_BIT_MASK] = &set_pattern_bit_mask; + flist[F_GET_PATTERN_BIT_MASK] = &get_pattern_bit_mask; + flist[F_WRITE_ADC_REG] = &write_adc_register; + flist[F_SET_COUNTER_BIT] = &set_counter_bit; + flist[F_PULSE_PIXEL] = &pulse_pixel; + flist[F_PULSE_PIXEL_AND_MOVE] = &pulse_pixel_and_move; + flist[F_PULSE_CHIP] = &pulse_chip; + flist[F_SET_RATE_CORRECT] = &set_rate_correct; + flist[F_GET_RATE_CORRECT] = &get_rate_correct; + flist[F_SET_TEN_GIGA_FLOW_CONTROL] = &set_ten_giga_flow_control; + flist[F_GET_TEN_GIGA_FLOW_CONTROL] = &get_ten_giga_flow_control; + flist[F_SET_TRANSMISSION_DELAY_FRAME] = &set_transmission_delay_frame; + flist[F_GET_TRANSMISSION_DELAY_FRAME] = &get_transmission_delay_frame; + flist[F_SET_TRANSMISSION_DELAY_LEFT] = &set_transmission_delay_left; + flist[F_GET_TRANSMISSION_DELAY_LEFT] = &get_transmission_delay_left; + flist[F_SET_TRANSMISSION_DELAY_RIGHT] = &set_transmission_delay_right; + flist[F_GET_TRANSMISSION_DELAY_RIGHT] = &get_transmission_delay_right; + flist[F_PROGRAM_FPGA] = &program_fpga; + flist[F_RESET_FPGA] = &reset_fpga; + flist[F_POWER_CHIP] = &power_chip; + flist[F_ACTIVATE] = &set_activate; + flist[F_PREPARE_ACQUISITION] = &prepare_acquisition; + flist[F_THRESHOLD_TEMP] = &threshold_temp; + flist[F_TEMP_CONTROL] = &temp_control; + flist[F_TEMP_EVENT] = &temp_event; + flist[F_AUTO_COMP_DISABLE] = &auto_comp_disable; + flist[F_STORAGE_CELL_START] = &storage_cell_start; + flist[F_CHECK_VERSION] = &check_version; + flist[F_SOFTWARE_TRIGGER] = &software_trigger; + flist[F_LED] = &led; + flist[F_DIGITAL_IO_DELAY] = &digital_io_delay; + flist[F_COPY_DET_SERVER] = ©_detector_server; + flist[F_REBOOT_CONTROLLER] = &reboot_controller; + flist[F_SET_ADC_ENABLE_MASK] = &set_adc_enable_mask; + flist[F_GET_ADC_ENABLE_MASK] = &get_adc_enable_mask; + flist[F_SET_ADC_INVERT] = &set_adc_invert; + flist[F_GET_ADC_INVERT] = &get_adc_invert; + flist[F_EXTERNAL_SAMPLING_SOURCE] = &set_external_sampling_source; + flist[F_EXTERNAL_SAMPLING] = &set_external_sampling; + flist[F_SET_STARTING_FRAME_NUMBER] = &set_starting_frame_number; + flist[F_GET_STARTING_FRAME_NUMBER] = &get_starting_frame_number; + flist[F_SET_QUAD] = &set_quad; + flist[F_GET_QUAD] = &get_quad; + flist[F_SET_INTERRUPT_SUBFRAME] = &set_interrupt_subframe; + flist[F_GET_INTERRUPT_SUBFRAME] = &get_interrupt_subframe; + flist[F_SET_READ_N_LINES] = &set_read_n_lines; + flist[F_GET_READ_N_LINES] = &get_read_n_lines; + flist[F_SET_POSITION] = &set_detector_position; + flist[F_SET_SOURCE_UDP_MAC] = &set_source_udp_mac; + flist[F_GET_SOURCE_UDP_MAC] = &get_source_udp_mac; + flist[F_SET_SOURCE_UDP_MAC2] = &set_source_udp_mac2; + flist[F_GET_SOURCE_UDP_MAC2] = &get_source_udp_mac2; + flist[F_SET_SOURCE_UDP_IP] = &set_source_udp_ip; + flist[F_GET_SOURCE_UDP_IP] = &get_source_udp_ip; + flist[F_SET_SOURCE_UDP_IP2] = &set_source_udp_ip2; + flist[F_GET_SOURCE_UDP_IP2] = &get_source_udp_ip2; + flist[F_SET_DEST_UDP_MAC] = &set_dest_udp_mac; + flist[F_GET_DEST_UDP_MAC] = &get_dest_udp_mac; + flist[F_SET_DEST_UDP_MAC2] = &set_dest_udp_mac2; + flist[F_GET_DEST_UDP_MAC2] = &get_dest_udp_mac2; + flist[F_SET_DEST_UDP_IP] = &set_dest_udp_ip; + flist[F_GET_DEST_UDP_IP] = &get_dest_udp_ip; + flist[F_SET_DEST_UDP_IP2] = &set_dest_udp_ip2; + flist[F_GET_DEST_UDP_IP2] = &get_dest_udp_ip2; + flist[F_SET_DEST_UDP_PORT] = &set_dest_udp_port; + flist[F_GET_DEST_UDP_PORT] = &get_dest_udp_port; + flist[F_SET_DEST_UDP_PORT2] = &set_dest_udp_port2; + flist[F_GET_DEST_UDP_PORT2] = &get_dest_udp_port2; + flist[F_SET_NUM_INTERFACES] = &set_num_interfaces; + flist[F_GET_NUM_INTERFACES] = &get_num_interfaces; + flist[F_SET_INTERFACE_SEL] = &set_interface_sel; + flist[F_GET_INTERFACE_SEL] = &get_interface_sel; + flist[F_SET_PARALLEL_MODE] = &set_parallel_mode; + flist[F_GET_PARALLEL_MODE] = &get_parallel_mode; + flist[F_SET_OVERFLOW_MODE] = &set_overflow_mode; + flist[F_GET_OVERFLOW_MODE] = &get_overflow_mode; + flist[F_SET_STOREINRAM_MODE] = &set_storeinram; + flist[F_GET_STOREINRAM_MODE] = &get_storeinram; + flist[F_SET_READOUT_MODE] = &set_readout_mode; + flist[F_GET_READOUT_MODE] = &get_readout_mode; + flist[F_SET_CLOCK_FREQUENCY] = &set_clock_frequency; + flist[F_GET_CLOCK_FREQUENCY] = &get_clock_frequency; + flist[F_SET_CLOCK_PHASE] = &set_clock_phase; + flist[F_GET_CLOCK_PHASE] = &get_clock_phase; + flist[F_GET_MAX_CLOCK_PHASE_SHIFT] = &get_max_clock_phase_shift; + flist[F_SET_CLOCK_DIVIDER] = &set_clock_divider; + flist[F_GET_CLOCK_DIVIDER] = &get_clock_divider; + flist[F_SET_PIPELINE] = &set_pipeline; + flist[F_GET_PIPELINE] = &get_pipeline; + flist[F_SET_ON_CHIP_DAC] = &set_on_chip_dac; + flist[F_GET_ON_CHIP_DAC] = &get_on_chip_dac; + flist[F_SET_INJECT_CHANNEL] = &set_inject_channel; + flist[F_GET_INJECT_CHANNEL] = &get_inject_channel; + flist[F_SET_VETO_PHOTON] = &set_veto_photon; + flist[F_GET_VETO_PHOTON] = &get_veto_photon; + flist[F_SET_VETO_REFERENCE] = &set_veto_reference; + flist[F_GET_BURST_MODE] = &get_burst_mode; + flist[F_SET_BURST_MODE] = &set_burst_mode; + flist[F_SET_ADC_ENABLE_MASK_10G] = &set_adc_enable_mask_10g; + flist[F_GET_ADC_ENABLE_MASK_10G] = &get_adc_enable_mask_10g; + flist[F_SET_COUNTER_MASK] = &set_counter_mask; + flist[F_GET_COUNTER_MASK] = &get_counter_mask; + flist[F_GET_NUM_BURSTS] = &get_num_bursts; + flist[F_SET_NUM_BURSTS] = &set_num_bursts; + flist[F_GET_BURST_PERIOD] = &get_burst_period; + flist[F_SET_BURST_PERIOD] = &set_burst_period; + flist[F_GET_CURRENT_SOURCE] = &get_current_source; + flist[F_SET_CURRENT_SOURCE] = &set_current_source; + flist[F_GET_TIMING_SOURCE] = &get_timing_source; + flist[F_SET_TIMING_SOURCE] = &set_timing_source; + flist[F_GET_NUM_CHANNELS] = &get_num_channels; + flist[F_UPDATE_RATE_CORRECTION] = &update_rate_correction; + flist[F_GET_RECEIVER_PARAMETERS] = &get_receiver_parameters; - // check - if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) { - LOG(logERROR, ("The last detector function enum has reached its limit\nGoodbye!\n")); - exit(EXIT_FAILURE); - } + // check + if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) { + LOG(logERROR, ("The last detector function enum has reached its " + "limit\nGoodbye!\n")); + exit(EXIT_FAILURE); + } - int iloop = 0; - for (iloop = 0; iloop < NUM_DET_FUNCTIONS ; ++iloop) { - LOG(logDEBUG3, ("function fnum=%d, (%s)\n", iloop, - getFunctionName((enum detFuncs)iloop))); - } + int iloop = 0; + for (iloop = 0; iloop < NUM_DET_FUNCTIONS; ++iloop) { + LOG(logDEBUG3, ("function fnum=%d, (%s)\n", iloop, + getFunctionName((enum detFuncs)iloop))); + } } void functionNotImplemented() { - ret = FAIL; - sprintf(mess, "Function (%s) is not implemented for this detector\n", - getFunctionName((enum detFuncs)fnum)); - LOG(logERROR, (mess)); + ret = FAIL; + sprintf(mess, "Function (%s) is not implemented for this detector\n", + getFunctionName((enum detFuncs)fnum)); + LOG(logERROR, (mess)); } -void modeNotImplemented(char* modename, int mode) { - ret = FAIL; - sprintf(mess, "%s (%d) is not implemented for this detector\n", modename, mode); - LOG(logERROR,(mess)); +void modeNotImplemented(char *modename, int mode) { + ret = FAIL; + sprintf(mess, "%s (%d) is not implemented for this detector\n", modename, + mode); + LOG(logERROR, (mess)); } -void validate(int arg, int retval, char* modename, enum numberMode nummode) { - if (ret == OK && arg != -1 && retval != arg) { - ret = FAIL; - if (nummode == HEX) - sprintf(mess, "Could not %s. Set 0x%x, but read 0x%x\n", - modename, arg, retval); - else - sprintf(mess, "Could not %s. Set %d, but read %d\n", - modename, arg, retval); - LOG(logERROR,(mess)); - } +void validate(int arg, int retval, char *modename, enum numberMode nummode) { + if (ret == OK && arg != -1 && retval != arg) { + ret = FAIL; + if (nummode == HEX) + sprintf(mess, "Could not %s. Set 0x%x, but read 0x%x\n", modename, + arg, retval); + else + sprintf(mess, "Could not %s. Set %d, but read %d\n", modename, arg, + retval); + LOG(logERROR, (mess)); + } } -void validate64(int64_t arg, int64_t retval, char* modename, enum numberMode nummode) { - if (ret == OK && arg != -1 && retval != arg) { - ret = FAIL; - if (nummode == HEX) - sprintf(mess, "Could not %s. Set 0x%llx, but read 0x%llx\n", - modename, (long long unsigned int)arg, (long long unsigned int)retval); - else - sprintf(mess, "Could not %s. Set %lld, but read %lld\n", - modename, (long long unsigned int)arg, (long long unsigned int)retval); - LOG(logERROR,(mess)); - } +void validate64(int64_t arg, int64_t retval, char *modename, + enum numberMode nummode) { + if (ret == OK && arg != -1 && retval != arg) { + ret = FAIL; + if (nummode == HEX) + sprintf(mess, "Could not %s. Set 0x%llx, but read 0x%llx\n", + modename, (long long unsigned int)arg, + (long long unsigned int)retval); + else + sprintf(mess, "Could not %s. Set %lld, but read %lld\n", modename, + (long long unsigned int)arg, + (long long unsigned int)retval); + LOG(logERROR, (mess)); + } } -int executeCommand(char* command, char* result, enum TLogLevel level) { - const size_t tempsize = 256; - char temp[tempsize]; - memset(temp, 0, tempsize); - memset(result, 0, MAX_STR_LENGTH); +int executeCommand(char *command, char *result, enum TLogLevel level) { + const size_t tempsize = 256; + char temp[tempsize]; + memset(temp, 0, tempsize); + memset(result, 0, MAX_STR_LENGTH); - LOG(level, ("Executing command:\n[%s]\n", command)); - strcat(command, " 2>&1"); + LOG(level, ("Executing command:\n[%s]\n", command)); + strcat(command, " 2>&1"); - fflush(stdout); - FILE* sysFile = popen(command, "r"); - while(fgets(temp, tempsize, sysFile) != NULL) { - // size left excludes terminating character - size_t sizeleft = MAX_STR_LENGTH - strlen(result) - 1; - // more than the command - if (tempsize > sizeleft) { - strncat(result, temp, sizeleft); - break; - } - strncat(result, temp, tempsize); - memset(temp, 0, tempsize); - } - int sucess = pclose(sysFile); - if (strlen(result)) { - if (sucess) { - sucess = FAIL; - LOG(logERROR, ("%s\n", result)); - } else { - LOG(level, ("Result:\n[%s]\n", result)); - } - } - return sucess; + fflush(stdout); + FILE *sysFile = popen(command, "r"); + while (fgets(temp, tempsize, sysFile) != NULL) { + // size left excludes terminating character + size_t sizeleft = MAX_STR_LENGTH - strlen(result) - 1; + // more than the command + if (tempsize > sizeleft) { + strncat(result, temp, sizeleft); + break; + } + strncat(result, temp, tempsize); + memset(temp, 0, tempsize); + } + int sucess = pclose(sysFile); + if (strlen(result)) { + if (sucess) { + sucess = FAIL; + LOG(logERROR, ("%s\n", result)); + } else { + LOG(level, ("Result:\n[%s]\n", result)); + } + } + return sucess; } -int M_nofunc(int file_des) { - ret = FAIL; - memset(mess, 0, sizeof(mess)); +int M_nofunc(int file_des) { + ret = FAIL; + memset(mess, 0, sizeof(mess)); - // to receive any arguments - int n = 1; - while (n > 0) - n = receiveData(file_des,mess,MAX_STR_LENGTH,OTHER); + // to receive any arguments + int n = 1; + while (n > 0) + n = receiveData(file_des, mess, MAX_STR_LENGTH, OTHER); - sprintf(mess,"Unrecognized Function enum %d. Please do not proceed.\n", fnum); - LOG(logERROR, (mess)); - return Server_SendResult(file_des, OTHER, NULL, 0); + sprintf(mess, "Unrecognized Function enum %d. Please do not proceed.\n", + fnum); + LOG(logERROR, (mess)); + return Server_SendResult(file_des, OTHER, NULL, 0); } #if defined(MYTHEN3D) || defined(GOTTHARD2D) -void rebootNiosControllerAndFPGA() { - rebootControllerAndFPGA(); -} +void rebootNiosControllerAndFPGA() { rebootControllerAndFPGA(); } #endif int exec_command(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - char cmd[MAX_STR_LENGTH] = {0}; - char retval[MAX_STR_LENGTH] = {0}; + ret = OK; + memset(mess, 0, sizeof(mess)); + char cmd[MAX_STR_LENGTH] = {0}; + char retval[MAX_STR_LENGTH] = {0}; - if (receiveData(file_des, cmd, MAX_STR_LENGTH, OTHER) < 0) - return printSocketReadError(); + if (receiveData(file_des, cmd, MAX_STR_LENGTH, OTHER) < 0) + return printSocketReadError(); - // set - if (Server_VerifyLock() == OK) { - ret = executeCommand(cmd, retval, logINFO); - } - return Server_SendResult(file_des, OTHER, retval, sizeof(retval)); + // set + if (Server_VerifyLock() == OK) { + ret = executeCommand(cmd, retval, logINFO); + } + return Server_SendResult(file_des, OTHER, retval, sizeof(retval)); } - - - int get_detector_type(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - enum detectorType retval = myDetectorType; - LOG(logDEBUG1,("Returning detector type %d\n", retval)); - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + ret = OK; + memset(mess, 0, sizeof(mess)); + enum detectorType retval = myDetectorType; + LOG(logDEBUG1, ("Returning detector type %d\n", retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - int set_external_signal_flag(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - enum externalSignalFlag retval= GET_EXTERNAL_SIGNAL_FLAG; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + enum externalSignalFlag retval = GET_EXTERNAL_SIGNAL_FLAG; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); - enum externalSignalFlag flag = arg; - LOG(logDEBUG1, ("Setting external signal flag to %d\n", flag)); + enum externalSignalFlag flag = arg; + LOG(logDEBUG1, ("Setting external signal flag to %d\n", flag)); #ifndef GOTTHARDD - functionNotImplemented(); + functionNotImplemented(); #else - // set - if ((flag != GET_EXTERNAL_SIGNAL_FLAG) && (Server_VerifyLock() == OK)) { - setExtSignal(flag); - } - // get - retval = getExtSignal(); - validate((int)flag, (int)retval, "set external signal flag", DEC); - LOG(logDEBUG1, ("External Signal Flag: %d\n", retval)); + // set + if ((flag != GET_EXTERNAL_SIGNAL_FLAG) && (Server_VerifyLock() == OK)) { + setExtSignal(flag); + } + // get + retval = getExtSignal(); + validate((int)flag, (int)retval, "set external signal flag", DEC); + LOG(logDEBUG1, ("External Signal Flag: %d\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_timing_mode(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - enum timingMode arg = GET_TIMING_MODE; - enum timingMode retval = GET_TIMING_MODE; + ret = OK; + memset(mess, 0, sizeof(mess)); + enum timingMode arg = GET_TIMING_MODE; + enum timingMode retval = GET_TIMING_MODE; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting external communication mode to %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting external communication mode to %d\n", arg)); - // set - if ((arg != GET_TIMING_MODE) && (Server_VerifyLock() == OK)) { - switch (arg) { - case AUTO_TIMING: - case TRIGGER_EXPOSURE: + // set + if ((arg != GET_TIMING_MODE) && (Server_VerifyLock() == OK)) { + switch (arg) { + case AUTO_TIMING: + case TRIGGER_EXPOSURE: #ifdef EIGERD - case GATED: - case BURST_TRIGGER: + case GATED: + case BURST_TRIGGER: #endif - setTiming(arg); - break; - default: - modeNotImplemented("Timing mode", (int)arg); - break; - } - } - // get - retval = getTiming(); - validate((int)arg, (int)retval, "set timing mode", DEC); - LOG(logDEBUG1, ("Timing Mode: %d\n",retval)); + setTiming(arg); + break; + default: + modeNotImplemented("Timing mode", (int)arg); + break; + } + } + // get + retval = getTiming(); + validate((int)arg, (int)retval, "set timing mode", DEC); + LOG(logDEBUG1, ("Timing Mode: %d\n", retval)); - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - int get_firmware_version(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; - retval = getFirmwareVersion(); - LOG(logDEBUG1, ("firmware version retval: 0x%llx\n", (long long int)retval)); - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; + retval = getFirmwareVersion(); + LOG(logDEBUG1, + ("firmware version retval: 0x%llx\n", (long long int)retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int get_server_version(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; - retval = getServerVersion(); - LOG(logDEBUG1, ("firmware version retval: 0x%llx\n", (long long int)retval)); - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; + retval = getServerVersion(); + LOG(logDEBUG1, + ("firmware version retval: 0x%llx\n", (long long int)retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int get_serial_number(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; - retval = getDetectorNumber(); - LOG(logDEBUG1, ("firmware version retval: 0x%llx\n", (long long int)retval)); - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; + retval = getDetectorNumber(); + LOG(logDEBUG1, + ("firmware version retval: 0x%llx\n", (long long int)retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int set_firmware_test(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - LOG(logDEBUG1, ("Executing firmware test\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + LOG(logDEBUG1, ("Executing firmware test\n")); -#if !defined(GOTTHARDD) && !defined(JUNGFRAUD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) - functionNotImplemented(); +#if !defined(GOTTHARDD) && !defined(JUNGFRAUD) && !defined(CHIPTESTBOARDD) && \ + !defined(MOENCHD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) + functionNotImplemented(); #else - ret = testFpga(); + ret = testFpga(); #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int set_bus_test(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - LOG(logDEBUG1, ("Executing bus test\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + LOG(logDEBUG1, ("Executing bus test\n")); -#if !defined(GOTTHARDD) && !defined(JUNGFRAUD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) - functionNotImplemented(); +#if !defined(GOTTHARDD) && !defined(JUNGFRAUD) && !defined(CHIPTESTBOARDD) && \ + !defined(MOENCHD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) + functionNotImplemented(); #else - ret = testBus(); + ret = testBus(); #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int set_image_test_mode(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting image test mode to \n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting image test mode to \n", arg)); -#if defined(GOTTHARDD) || ((defined(EIGERD) || defined(JUNGFRAUD)) && defined(VIRTUAL)) - setTestImageMode(arg); +#if defined(GOTTHARDD) || \ + ((defined(EIGERD) || defined(JUNGFRAUD)) && defined(VIRTUAL)) + setTestImageMode(arg); #else - functionNotImplemented(); + functionNotImplemented(); #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_image_test_mode(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; - LOG(logDEBUG1, ("Getting image test mode\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; + LOG(logDEBUG1, ("Getting image test mode\n")); -#if defined(GOTTHARDD) || ((defined(EIGERD) || defined(JUNGFRAUD)) && defined(VIRTUAL)) - retval = getTestImageMode(); - LOG(logDEBUG1, ("image test mode retval: %d\n", retval)); +#if defined(GOTTHARDD) || \ + ((defined(EIGERD) || defined(JUNGFRAUD)) && defined(VIRTUAL)) + retval = getTestImageMode(); + LOG(logDEBUG1, ("image test mode retval: %d\n", retval)); #else - functionNotImplemented(); + functionNotImplemented(); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - int set_dac(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[3] = {-1, -1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[3] = {-1, -1, -1}; int retval = -1; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); - - - enum dacIndex ind = args[0]; - int mV = args[1]; - int val = args[2]; + enum dacIndex ind = args[0]; + int mV = args[1]; + int val = args[2]; enum DACINDEX serverDacIndex = 0; // check if dac exists for this detector switch (ind) { #ifdef GOTTHARDD - case VREF_DS : + case VREF_DS: serverDacIndex = G_VREF_DS; break; case VCASCN_PB: @@ -927,30 +1122,30 @@ int set_dac(int file_des) { case V_LIMIT: break; #elif MOENCHD - case VBP_COLBUF: - serverDacIndex = MO_VBP_COLBUF; - break; - case VIPRE: - serverDacIndex = MO_VIPRE; - break; - case VIN_CM: - serverDacIndex = MO_VIN_CM; - break; - case VB_SDA: - serverDacIndex = MO_VB_SDA; - break; - case VCASC_SFP: - serverDacIndex = MO_VCASC_SFP; - break; - case VOUT_CM: - serverDacIndex = MO_VOUT_CM; - break; - case VIPRE_CDS: - serverDacIndex = MO_VIPRE_CDS; - break; - case IBIAS_SFP: - serverDacIndex = MO_IBIAS_SFP; - break; + case VBP_COLBUF: + serverDacIndex = MO_VBP_COLBUF; + break; + case VIPRE: + serverDacIndex = MO_VIPRE; + break; + case VIN_CM: + serverDacIndex = MO_VIN_CM; + break; + case VB_SDA: + serverDacIndex = MO_VB_SDA; + break; + case VCASC_SFP: + serverDacIndex = MO_VCASC_SFP; + break; + case VOUT_CM: + serverDacIndex = MO_VOUT_CM; + break; + case VIPRE_CDS: + serverDacIndex = MO_VIPRE_CDS; + break; + case IBIAS_SFP: + serverDacIndex = MO_IBIAS_SFP; + break; case ADC_VPP: case HIGH_VOLTAGE: case V_LIMIT: @@ -958,127 +1153,127 @@ int set_dac(int file_des) { #elif MYTHEN3D case HIGH_VOLTAGE: - break; - case CASSH: - serverDacIndex = M_CASSH; - break; - case VTH2: - serverDacIndex = M_VTH2; - break; - case SHAPER1: - serverDacIndex = M_VRFSH; - break; - case SHAPER2: - serverDacIndex = M_VRFSHNPOL; - break; - case VIPRE_OUT: - serverDacIndex = M_VIPRE_OUT; - break; - case VTH3: - serverDacIndex = M_VTH3; - break; - case THRESHOLD: - serverDacIndex = M_VTH1; - break; - case VICIN: - serverDacIndex = M_VICIN; - break; - case CAS: - serverDacIndex = M_CAS; - break; - case PREAMP: - serverDacIndex = M_VRF; - break; - case CALIBRATION_PULSE: - serverDacIndex = M_VPH; - break; - case VIPRE: - serverDacIndex = M_VIPRE; - break; - case VIINSH: - serverDacIndex = M_VIINSH; - break; - case VPL: - serverDacIndex = M_VPL; - break; - case TRIMBIT_SIZE: - serverDacIndex = M_VTRIM; - break; - case VDCSH: - serverDacIndex = M_VDCSH; - break; + break; + case CASSH: + serverDacIndex = M_CASSH; + break; + case VTH2: + serverDacIndex = M_VTH2; + break; + case SHAPER1: + serverDacIndex = M_VRFSH; + break; + case SHAPER2: + serverDacIndex = M_VRFSHNPOL; + break; + case VIPRE_OUT: + serverDacIndex = M_VIPRE_OUT; + break; + case VTH3: + serverDacIndex = M_VTH3; + break; + case THRESHOLD: + serverDacIndex = M_VTH1; + break; + case VICIN: + serverDacIndex = M_VICIN; + break; + case CAS: + serverDacIndex = M_CAS; + break; + case PREAMP: + serverDacIndex = M_VRF; + break; + case CALIBRATION_PULSE: + serverDacIndex = M_VPH; + break; + case VIPRE: + serverDacIndex = M_VIPRE; + break; + case VIINSH: + serverDacIndex = M_VIINSH; + break; + case VPL: + serverDacIndex = M_VPL; + break; + case TRIMBIT_SIZE: + serverDacIndex = M_VTRIM; + break; + case VDCSH: + serverDacIndex = M_VDCSH; + break; #elif GOTTHARD2D case HIGH_VOLTAGE: - break; - case VREF_H_ADC: - serverDacIndex = G2_VREF_H_ADC; - break; - case VB_COMP_FE: - serverDacIndex = G2_VB_COMP_FE; - break; - case VB_COMP_ADC: - serverDacIndex = G2_VB_COMP_ADC; - break; - case VCOM_CDS: - serverDacIndex = G2_VCOM_CDS; - break; - case VREF_RSTORE: - serverDacIndex = G2_VREF_RSTORE; - break; - case VB_OPA_1ST: - serverDacIndex = G2_VB_OPA_1ST; - break; - case VREF_COMP_FE: - serverDacIndex = G2_VREF_COMP_FE; - break; - case VCOM_ADC1: - serverDacIndex = G2_VCOM_ADC1; - break; - case VREF_PRECH: - serverDacIndex = G2_VREF_PRECH; - break; - case VREF_L_ADC: - serverDacIndex = G2_VREF_L_ADC; - break; - case VREF_CDS: - serverDacIndex = G2_VREF_CDS; - break; - case VB_CS: - serverDacIndex = G2_VB_CS; - break; - case VB_OPA_FD: - serverDacIndex = G2_VB_OPA_FD; - break; - case VCOM_ADC2: - serverDacIndex = G2_VCOM_ADC2; - break; + break; + case VREF_H_ADC: + serverDacIndex = G2_VREF_H_ADC; + break; + case VB_COMP_FE: + serverDacIndex = G2_VB_COMP_FE; + break; + case VB_COMP_ADC: + serverDacIndex = G2_VB_COMP_ADC; + break; + case VCOM_CDS: + serverDacIndex = G2_VCOM_CDS; + break; + case VREF_RSTORE: + serverDacIndex = G2_VREF_RSTORE; + break; + case VB_OPA_1ST: + serverDacIndex = G2_VB_OPA_1ST; + break; + case VREF_COMP_FE: + serverDacIndex = G2_VREF_COMP_FE; + break; + case VCOM_ADC1: + serverDacIndex = G2_VCOM_ADC1; + break; + case VREF_PRECH: + serverDacIndex = G2_VREF_PRECH; + break; + case VREF_L_ADC: + serverDacIndex = G2_VREF_L_ADC; + break; + case VREF_CDS: + serverDacIndex = G2_VREF_CDS; + break; + case VB_CS: + serverDacIndex = G2_VB_CS; + break; + case VB_OPA_FD: + serverDacIndex = G2_VB_OPA_FD; + break; + case VCOM_ADC2: + serverDacIndex = G2_VCOM_ADC2; + break; #elif JUNGFRAUD case HIGH_VOLTAGE: - break; - case VB_COMP: - serverDacIndex = J_VB_COMP; - break; - case VDD_PROT: - serverDacIndex = J_VDD_PROT; - break; - case VIN_COM: - serverDacIndex = J_VIN_COM; - break; - case VREF_PRECH: - serverDacIndex = J_VREF_PRECH; - break; - case VB_PIXBUF: - serverDacIndex = J_VB_PIXBUF; - break; - case VB_DS: - serverDacIndex = J_VB_DS; - break; - case VREF_DS: - serverDacIndex = J_VREF_DS; - break; - case VREF_COMP: - serverDacIndex = J_VREF_COMP; - break; + break; + case VB_COMP: + serverDacIndex = J_VB_COMP; + break; + case VDD_PROT: + serverDacIndex = J_VDD_PROT; + break; + case VIN_COM: + serverDacIndex = J_VIN_COM; + break; + case VREF_PRECH: + serverDacIndex = J_VREF_PRECH; + break; + case VB_PIXBUF: + serverDacIndex = J_VB_PIXBUF; + break; + case VB_DS: + serverDacIndex = J_VB_DS; + break; + case VREF_DS: + serverDacIndex = J_VREF_DS; + break; + case VREF_COMP: + serverDacIndex = J_VREF_COMP; + break; #endif default: @@ -1096,70 +1291,77 @@ int set_dac(int file_des) { if (ret == OK) { LOG(logDEBUG1, ("Setting DAC %d to %d %s\n", serverDacIndex, val, - (mV ? "mV" : "dac units"))); + (mV ? "mV" : "dac units"))); - // set & get - if ((val == -1) || (Server_VerifyLock() == OK)) { - switch(ind) { + // set & get + if ((val == -1) || (Server_VerifyLock() == OK)) { + switch (ind) { - // adc vpp + // adc vpp #if defined(CHIPTESTBOARDD) || defined(MOENCHD) - case ADC_VPP: - // set - if (val >= 0) { - ret = AD9257_SetVrefVoltage(val, mV); - if (ret == FAIL) { - sprintf(mess,"Could not set Adc Vpp. Please set a proper value\n"); - LOG(logERROR,(mess)); - } - } - retval = AD9257_GetVrefVoltage(mV); - LOG(logDEBUG1, ("Adc Vpp retval: %d %s\n", retval, (mV ? "mV" : "mode"))); - // cannot validate (its just a variable and mv gives different value) - break; + case ADC_VPP: + // set + if (val >= 0) { + ret = AD9257_SetVrefVoltage(val, mV); + if (ret == FAIL) { + sprintf(mess, "Could not set Adc Vpp. Please set a " + "proper value\n"); + LOG(logERROR, (mess)); + } + } + retval = AD9257_GetVrefVoltage(mV); + LOG(logDEBUG1, + ("Adc Vpp retval: %d %s\n", retval, (mV ? "mV" : "mode"))); + // cannot validate (its just a variable and mv gives different + // value) + break; #endif - // io delay + // io delay #ifdef EIGERD - case IO_DELAY: - retval = setIODelay(val); - LOG(logDEBUG1, ("IODelay: %d\n", retval)); - validate(val, retval, "set iodelay", DEC); - break; + case IO_DELAY: + retval = setIODelay(val); + LOG(logDEBUG1, ("IODelay: %d\n", retval)); + validate(val, retval, "set iodelay", DEC); + break; #endif - // high voltage - case HIGH_VOLTAGE: - retval = setHighVoltage(val); - LOG(logDEBUG1, ("High Voltage: %d\n", retval)); -#if defined(JUNGFRAUD) || defined (CHIPTESTBOARDD) || defined(MOENCHD) || defined(GOTTHARD2D) || defined(MYTHEN3D) - validate(val, retval, "set high voltage", DEC); + // high voltage + case HIGH_VOLTAGE: + retval = setHighVoltage(val); + LOG(logDEBUG1, ("High Voltage: %d\n", retval)); +#if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || \ + defined(GOTTHARD2D) || defined(MYTHEN3D) + validate(val, retval, "set high voltage", DEC); #endif #ifdef GOTTHARDD - if (retval == -1) { - ret = FAIL; - strcpy(mess,"Invalid Voltage. Valid values are 0, 90, 110, 120, 150, 180, 200\n"); - LOG(logERROR,(mess)); - } else - validate(val, retval, "set high voltage", DEC); + if (retval == -1) { + ret = FAIL; + strcpy(mess, "Invalid Voltage. Valid values are 0, 90, " + "110, 120, 150, 180, 200\n"); + LOG(logERROR, (mess)); + } else + validate(val, retval, "set high voltage", DEC); #elif EIGERD - if ((retval != SLAVE_HIGH_VOLTAGE_READ_VAL) && (retval < 0)) { - ret = FAIL; - if (retval == -1) - sprintf(mess, "Setting high voltage failed. Bad value %d. " - "The range is from 0 to 200 V.\n",val); - else if (retval == -2) - strcpy(mess, "Setting high voltage failed. " - "Serial/i2c communication failed.\n"); - else if (retval == -3) - strcpy(mess, "Getting high voltage failed. " - "Serial/i2c communication failed.\n"); - LOG(logERROR,(mess)); - } + if ((retval != SLAVE_HIGH_VOLTAGE_READ_VAL) && (retval < 0)) { + ret = FAIL; + if (retval == -1) + sprintf(mess, + "Setting high voltage failed. Bad value %d. " + "The range is from 0 to 200 V.\n", + val); + else if (retval == -2) + strcpy(mess, "Setting high voltage failed. " + "Serial/i2c communication failed.\n"); + else if (retval == -3) + strcpy(mess, "Getting high voltage failed. " + "Serial/i2c communication failed.\n"); + LOG(logERROR, (mess)); + } #endif - break; + break; - // power, vlimit + // power, vlimit #ifdef CHIPTESTBOARDD case V_POWER_A: case V_POWER_B: @@ -1169,44 +1371,52 @@ int set_dac(int file_des) { if (val != -1) { if (!mV) { ret = FAIL; - sprintf(mess,"Could not set power. Power regulator %d should be in mV and not dac units.\n", ind); - LOG(logERROR,(mess)); + sprintf(mess, + "Could not set power. Power regulator %d " + "should be in mV and not dac units.\n", + ind); + LOG(logERROR, (mess)); } else if (checkVLimitCompliant(val) == FAIL) { ret = FAIL; - sprintf(mess,"Could not set power. Power regulator %d exceeds voltage limit %d.\n", ind, getVLimit()); - LOG(logERROR,(mess)); + sprintf(mess, + "Could not set power. Power regulator %d " + "exceeds voltage limit %d.\n", + ind, getVLimit()); + LOG(logERROR, (mess)); } else if (!isPowerValid(serverDacIndex, val)) { ret = FAIL; - sprintf(mess,"Could not set power. Power regulator %d should be between %d and %d mV\n", - ind, (serverDacIndex == D_PWR_IO ? VIO_MIN_MV : POWER_RGLTR_MIN), (VCHIP_MAX_MV - VCHIP_POWER_INCRMNT)); - LOG(logERROR,(mess)); + sprintf(mess, + "Could not set power. Power regulator %d " + "should be between %d and %d mV\n", + ind, + (serverDacIndex == D_PWR_IO ? VIO_MIN_MV + : POWER_RGLTR_MIN), + (VCHIP_MAX_MV - VCHIP_POWER_INCRMNT)); + LOG(logERROR, (mess)); } else { setPower(serverDacIndex, val); - } } retval = getPower(serverDacIndex); LOG(logDEBUG1, ("Power regulator(%d): %d\n", ind, retval)); validate(val, retval, "set power regulator", DEC); - break; - + break; case V_POWER_CHIP: if (val >= 0) { ret = FAIL; - sprintf(mess,"Can not set Vchip. Can only be set automatically in the background (+200mV from highest power regulator voltage).\n"); - LOG(logERROR,(mess)); + sprintf(mess, "Can not set Vchip. Can only be set " + "automatically in the background (+200mV " + "from highest power regulator voltage).\n"); + LOG(logERROR, (mess)); /* restrict users from setting vchip if (!mV) { ret = FAIL; - sprintf(mess,"Could not set Vchip. Should be in mV and not dac units.\n"); - LOG(logERROR,(mess)); - } else if (!isVchipValid(val)) { - ret = FAIL; - sprintf(mess,"Could not set Vchip. Should be between %d and %d mV\n", VCHIP_MIN_MV, VCHIP_MAX_MV); - LOG(logERROR,(mess)); - } else { - setVchip(val); + sprintf(mess,"Could not set Vchip. Should be in mV and + not dac units.\n"); LOG(logERROR,(mess)); } else if + (!isVchipValid(val)) { ret = FAIL; sprintf(mess,"Could not + set Vchip. Should be between %d and %d mV\n", VCHIP_MIN_MV, + VCHIP_MAX_MV); LOG(logERROR,(mess)); } else { setVchip(val); } */ } @@ -1214,8 +1424,9 @@ int set_dac(int file_des) { LOG(logDEBUG1, ("Vchip: %d\n", retval)); if (ret == OK && val != -1 && val != -100 && retval != val) { ret = FAIL; - sprintf(mess, "Could not set vchip. Set %d, but read %d\n", val, retval); - LOG(logERROR,(mess)); + sprintf(mess, "Could not set vchip. Set %d, but read %d\n", + val, retval); + LOG(logERROR, (mess)); } break; #endif @@ -1225,8 +1436,9 @@ int set_dac(int file_des) { if (val >= 0) { if (!mV) { ret = FAIL; - strcpy(mess,"Could not set power. VLimit should be in mV and not dac units.\n"); - LOG(logERROR,(mess)); + strcpy(mess, "Could not set power. VLimit should be in " + "mV and not dac units.\n"); + LOG(logERROR, (mess)); } else { setVLimit(val); } @@ -1237,119 +1449,127 @@ int set_dac(int file_des) { break; #endif // dacs - default: - if (mV && val > DAC_MAX_MV) { - ret = FAIL; - sprintf(mess,"Could not set dac %d to value %d. Allowed limits (0 - %d mV).\n", ind, val, DAC_MAX_MV); - LOG(logERROR,(mess)); - } else if (!mV && val > getMaxDacSteps() ) { - ret = FAIL; - sprintf(mess,"Could not set dac %d to value %d. Allowed limits (0 - %d dac units).\n", ind, val, getMaxDacSteps()); - LOG(logERROR,(mess)); - } else { + default: + if (mV && val > DAC_MAX_MV) { + ret = FAIL; + sprintf(mess, + "Could not set dac %d to value %d. Allowed limits " + "(0 - %d mV).\n", + ind, val, DAC_MAX_MV); + LOG(logERROR, (mess)); + } else if (!mV && val > getMaxDacSteps()) { + ret = FAIL; + sprintf(mess, + "Could not set dac %d to value %d. Allowed limits " + "(0 - %d dac units).\n", + ind, val, getMaxDacSteps()); + LOG(logERROR, (mess)); + } else { #if defined(CHIPTESTBOARDD) || defined(MOENCHD) - if ((val != -1 && mV && checkVLimitCompliant(val) == FAIL) || - (val != -1 && !mV && checkVLimitDacCompliant(val) == FAIL)) { - ret = FAIL; - sprintf(mess,"Could not set dac %d to value %d. " - "Exceeds voltage limit %d.\n", - ind, (mV ? val : dacToVoltage(val)), getVLimit()); - LOG(logERROR,(mess)); - } else + if ((val != -1 && mV && + checkVLimitCompliant(val) == FAIL) || + (val != -1 && !mV && + checkVLimitDacCompliant(val) == FAIL)) { + ret = FAIL; + sprintf(mess, + "Could not set dac %d to value %d. " + "Exceeds voltage limit %d.\n", + ind, (mV ? val : dacToVoltage(val)), + getVLimit()); + LOG(logERROR, (mess)); + } else #endif - setDAC(serverDacIndex, val, mV); - retval = getDAC(serverDacIndex, mV); - } + setDAC(serverDacIndex, val, mV); + retval = getDAC(serverDacIndex, mV); + } #ifdef EIGERD - if (val != -1) { - //changing dac changes settings to undefined - switch(serverDacIndex) { - case E_VCMP_LL: - case E_VCMP_LR: - case E_VCMP_RL: - case E_VCMP_RR: - case E_VRF: - case E_VCP: - setSettings(UNDEFINED); - LOG(logERROR, ("Settings has been changed " - "to undefined (changed specific dacs)\n")); - break; - default: - break; - } + if (val != -1) { + // changing dac changes settings to undefined + switch (serverDacIndex) { + case E_VCMP_LL: + case E_VCMP_LR: + case E_VCMP_RL: + case E_VCMP_RR: + case E_VRF: + case E_VCP: + setSettings(UNDEFINED); + LOG(logERROR, + ("Settings has been changed " + "to undefined (changed specific dacs)\n")); + break; + default: + break; } + } #endif - //check - if (ret == OK) { - if ((abs(retval - val) <= 5) || val == -1) { - ret = OK; - } else { - ret = FAIL; - sprintf(mess,"Setting dac %d : wrote %d but read %d\n", serverDacIndex, val, retval); - LOG(logERROR,(mess)); - } + // check + if (ret == OK) { + if ((abs(retval - val) <= 5) || val == -1) { + ret = OK; + } else { + ret = FAIL; + sprintf(mess, "Setting dac %d : wrote %d but read %d\n", + serverDacIndex, val, retval); + LOG(logERROR, (mess)); } - LOG(logDEBUG1, ("Dac (%d): %d %s\n\n", serverDacIndex, retval, (mV ? "mV" : "dac units"))); - break; - } - } + } + LOG(logDEBUG1, ("Dac (%d): %d %s\n\n", serverDacIndex, retval, + (mV ? "mV" : "dac units"))); + break; + } + } } return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - - int get_adc(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - enum dacIndex ind = 0; - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + enum dacIndex ind = 0; + int retval = -1; - if (receiveData(file_des, &ind, sizeof(ind), INT32) < 0) - return printSocketReadError(); + if (receiveData(file_des, &ind, sizeof(ind), INT32) < 0) + return printSocketReadError(); #if defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) functionNotImplemented(); #else - enum ADCINDEX serverAdcIndex = 0; + enum ADCINDEX serverAdcIndex = 0; - // get - switch (ind) { + // get + switch (ind) { #if defined(GOTTHARDD) || defined(JUNGFRAUD) - case TEMPERATURE_FPGA: - serverAdcIndex = TEMP_FPGA; - break; - case TEMPERATURE_ADC: - serverAdcIndex = TEMP_ADC; - break; + case TEMPERATURE_FPGA: + serverAdcIndex = TEMP_FPGA; + break; + case TEMPERATURE_ADC: + serverAdcIndex = TEMP_ADC; + break; #elif EIGERD - case TEMPERATURE_FPGAEXT: - serverAdcIndex = TEMP_FPGAEXT; - break; - case TEMPERATURE_10GE: - serverAdcIndex = TEMP_10GE; - break; - case TEMPERATURE_DCDC: - serverAdcIndex = TEMP_DCDC; - break; - case TEMPERATURE_SODL: - serverAdcIndex = TEMP_SODL; - break; - case TEMPERATURE_SODR: - serverAdcIndex = TEMP_SODR; - break; - case TEMPERATURE_FPGA: - serverAdcIndex = TEMP_FPGA; - break; - case TEMPERATURE_FPGA2: - serverAdcIndex = TEMP_FPGAFEBL; - break; - case TEMPERATURE_FPGA3: - serverAdcIndex = TEMP_FPGAFEBR; - break; + case TEMPERATURE_FPGAEXT: + serverAdcIndex = TEMP_FPGAEXT; + break; + case TEMPERATURE_10GE: + serverAdcIndex = TEMP_10GE; + break; + case TEMPERATURE_DCDC: + serverAdcIndex = TEMP_DCDC; + break; + case TEMPERATURE_SODL: + serverAdcIndex = TEMP_SODL; + break; + case TEMPERATURE_SODR: + serverAdcIndex = TEMP_SODR; + break; + case TEMPERATURE_FPGA: + serverAdcIndex = TEMP_FPGA; + break; + case TEMPERATURE_FPGA2: + serverAdcIndex = TEMP_FPGAFEBL; + break; + case TEMPERATURE_FPGA3: + serverAdcIndex = TEMP_FPGAFEBR; + break; #elif CHIPTESTBOARDD case V_POWER_A: serverAdcIndex = V_PWR_A; @@ -1383,52 +1603,48 @@ int get_adc(int file_des) { break; case SLOW_ADC0: serverAdcIndex = S_ADC0; - break; + break; case SLOW_ADC1: serverAdcIndex = S_ADC1; - break; + break; case SLOW_ADC2: serverAdcIndex = S_ADC2; - break; + break; case SLOW_ADC3: serverAdcIndex = S_ADC3; - break; + break; case SLOW_ADC4: serverAdcIndex = S_ADC4; - break; + break; case SLOW_ADC5: serverAdcIndex = S_ADC5; - break; + break; case SLOW_ADC6: serverAdcIndex = S_ADC6; - break; + break; case SLOW_ADC7: serverAdcIndex = S_ADC7; - break; + break; case SLOW_ADC_TEMP: serverAdcIndex = S_TMP; - break; + break; #endif - default: - modeNotImplemented("Adc Index", (int)ind); - break; - } + default: + modeNotImplemented("Adc Index", (int)ind); + break; + } - // valid index - if (ret == OK) { - LOG(logDEBUG1, ("Getting ADC %d\n", serverAdcIndex)); - retval = getADC(serverAdcIndex); - LOG(logDEBUG1, ("ADC(%d): %d\n", serverAdcIndex, retval)); - } + // valid index + if (ret == OK) { + LOG(logDEBUG1, ("Getting ADC %d\n", serverAdcIndex)); + retval = getADC(serverAdcIndex); + LOG(logDEBUG1, ("ADC(%d): %d\n", serverAdcIndex, retval)); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - int write_register(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); @@ -1446,287 +1662,285 @@ int write_register(int file_des) { #ifdef GOTTHARDD retval = writeRegister16And32(addr, val); #elif EIGERD - if(writeRegister(addr, val) == FAIL) { - ret = FAIL; - sprintf(mess,"Could not write to register 0x%x.\n", addr); - LOG(logERROR,(mess)); - } else { - if(readRegister(addr, &retval) == FAIL) { - ret = FAIL; - sprintf(mess,"Could not read register 0x%x.\n", addr); - LOG(logERROR,(mess)); - } - } + if (writeRegister(addr, val) == FAIL) { + ret = FAIL; + sprintf(mess, "Could not write to register 0x%x.\n", addr); + LOG(logERROR, (mess)); + } else { + if (readRegister(addr, &retval) == FAIL) { + ret = FAIL; + sprintf(mess, "Could not read register 0x%x.\n", addr); + LOG(logERROR, (mess)); + } + } #else retval = writeRegister(addr, val); #endif // validate if (ret == OK && retval != val) { ret = FAIL; - sprintf(mess,"Could not write to register 0x%x. Wrote 0x%x but read 0x%x\n", addr, val, retval); - LOG(logERROR,(mess)); + sprintf( + mess, + "Could not write to register 0x%x. Wrote 0x%x but read 0x%x\n", + addr, val, retval); + LOG(logERROR, (mess)); } LOG(logDEBUG1, ("Write register (0x%x): 0x%x\n", retval)); } return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - int read_register(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t addr = -1; - uint32_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t addr = -1; + uint32_t retval = -1; - if (receiveData(file_des, &addr, sizeof(addr), INT32) < 0) - return printSocketReadError(); + if (receiveData(file_des, &addr, sizeof(addr), INT32) < 0) + return printSocketReadError(); - LOG(logDEBUG1, ("Reading from register 0x%x\n", addr)); + LOG(logDEBUG1, ("Reading from register 0x%x\n", addr)); - // get + // get #ifdef GOTTHARDD - retval = readRegister16And32(addr); + retval = readRegister16And32(addr); #elif EIGERD - if(readRegister(addr, &retval) == FAIL) { - ret = FAIL; - sprintf(mess,"Could not read register 0x%x.\n", addr); - LOG(logERROR,(mess)); - } + if (readRegister(addr, &retval) == FAIL) { + ret = FAIL; + sprintf(mess, "Could not read register 0x%x.\n", addr); + LOG(logERROR, (mess)); + } #else - retval = readRegister(addr); + retval = readRegister(addr); #endif - LOG(logINFO, ("Read register (0x%x): 0x%x\n", addr, retval)); + LOG(logINFO, ("Read register (0x%x): 0x%x\n", addr, retval)); - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_module(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - enum detectorSettings retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + enum detectorSettings retval = -1; -#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) +#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(MYTHEN3D) || \ + defined(GOTTHARD2D) functionNotImplemented(); #else - sls_detector_module module; - int *myDac = NULL; - int *myChan = NULL; - module.dacs = NULL; - module.chanregs = NULL; + sls_detector_module module; + int *myDac = NULL; + int *myChan = NULL; + module.dacs = NULL; + module.chanregs = NULL; - // allocate to receive arguments - // allocate dacs - myDac = (int*)malloc(getNumberOfDACs() * sizeof(int)); - // error - if (getNumberOfDACs() > 0 && myDac == NULL) { - ret = FAIL; - sprintf(mess, "Could not allocate dacs\n"); - LOG(logERROR,(mess)); - } else - module.dacs = myDac; + // allocate to receive arguments + // allocate dacs + myDac = (int *)malloc(getNumberOfDACs() * sizeof(int)); + // error + if (getNumberOfDACs() > 0 && myDac == NULL) { + ret = FAIL; + sprintf(mess, "Could not allocate dacs\n"); + LOG(logERROR, (mess)); + } else + module.dacs = myDac; #ifdef EIGERD - // allocate chans - if (ret == OK) { - myChan = (int*)malloc(getTotalNumberOfChannels() * sizeof(int)); - if (getTotalNumberOfChannels() > 0 && myChan == NULL) { - ret = FAIL; - sprintf(mess,"Could not allocate chans\n"); - LOG(logERROR,(mess)); - } else - module.chanregs = myChan; - } + // allocate chans + if (ret == OK) { + myChan = (int *)malloc(getTotalNumberOfChannels() * sizeof(int)); + if (getTotalNumberOfChannels() > 0 && myChan == NULL) { + ret = FAIL; + sprintf(mess, "Could not allocate chans\n"); + LOG(logERROR, (mess)); + } else + module.chanregs = myChan; + } #endif - // receive arguments - if (ret == OK) { - module.nchip = getNumberOfChips(); - module.nchan = getTotalNumberOfChannels(); - module.ndac = getNumberOfDACs(); - int ts = receiveModule(file_des, &module); - if (ts < 0) { - if (myChan != NULL) free(myChan); - if (myDac != NULL) free(myDac); - return printSocketReadError(); - } - LOG(logDEBUG1, ("module register is %d, nchan %d, nchip %d, " - "ndac %d, iodelay %d, tau %d, eV %d\n", - module.reg, module.nchan, module.nchip, - module.ndac, module.iodelay, module.tau, module.eV)); - // should at least have a dac - if (ts <= (int)sizeof(sls_detector_module)) { - ret = FAIL; - sprintf(mess, "Cannot set module. Received incorrect number of dacs or channels\n"); - LOG(logERROR,(mess)); - } - } + // receive arguments + if (ret == OK) { + module.nchip = getNumberOfChips(); + module.nchan = getTotalNumberOfChannels(); + module.ndac = getNumberOfDACs(); + int ts = receiveModule(file_des, &module); + if (ts < 0) { + if (myChan != NULL) + free(myChan); + if (myDac != NULL) + free(myDac); + return printSocketReadError(); + } + LOG(logDEBUG1, ("module register is %d, nchan %d, nchip %d, " + "ndac %d, iodelay %d, tau %d, eV %d\n", + module.reg, module.nchan, module.nchip, module.ndac, + module.iodelay, module.tau, module.eV)); + // should at least have a dac + if (ts <= (int)sizeof(sls_detector_module)) { + ret = FAIL; + sprintf(mess, "Cannot set module. Received incorrect number of " + "dacs or channels\n"); + LOG(logERROR, (mess)); + } + } - // receive all arguments - if (ret == FAIL) { - int n = 1; - while (n > 0) - n = receiveData(file_des, mess, MAX_STR_LENGTH, OTHER); - } + // receive all arguments + if (ret == FAIL) { + int n = 1; + while (n > 0) + n = receiveData(file_des, mess, MAX_STR_LENGTH, OTHER); + } - // only set - else if (Server_VerifyLock() == OK) { - // check index - switch (module.reg) { + // only set + else if (Server_VerifyLock() == OK) { + // check index + switch (module.reg) { #ifdef EIGERD - case STANDARD: - case HIGHGAIN: - case LOWGAIN: - case VERYHIGHGAIN: - case VERYLOWGAIN: + case STANDARD: + case HIGHGAIN: + case LOWGAIN: + case VERYHIGHGAIN: + case VERYLOWGAIN: #elif JUNGFRAUD - case GET_SETTINGS: - case DYNAMICGAIN: - case DYNAMICHG0: - case FIXGAIN1: - case FIXGAIN2: - case FORCESWITCHG1: - case FORCESWITCHG2: + case GET_SETTINGS: + case DYNAMICGAIN: + case DYNAMICHG0: + case FIXGAIN1: + case FIXGAIN2: + case FORCESWITCHG1: + case FORCESWITCHG2: #elif GOTTHARDD - case GET_SETTINGS: - case DYNAMICGAIN: - case HIGHGAIN: - case LOWGAIN: - case MEDIUMGAIN: - case VERYHIGHGAIN: + case GET_SETTINGS: + case DYNAMICGAIN: + case HIGHGAIN: + case LOWGAIN: + case MEDIUMGAIN: + case VERYHIGHGAIN: #endif - break; - default: - modeNotImplemented("Settings", (int)module.reg); - break; - } + break; + default: + modeNotImplemented("Settings", (int)module.reg); + break; + } - ret = setModule(module, mess); - retval = getSettings(); - validate(module.reg, (int)retval, "set module (settings)", DEC); - LOG(logDEBUG1, ("Settings: %d\n", retval)); - } - if (myChan != NULL) free(myChan); - if (myDac != NULL) free(myDac); + ret = setModule(module, mess); + retval = getSettings(); + validate(module.reg, (int)retval, "set module (settings)", DEC); + LOG(logDEBUG1, ("Settings: %d\n", retval)); + } + if (myChan != NULL) + free(myChan); + if (myDac != NULL) + free(myDac); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int get_module(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - sls_detector_module module; - int *myDac = NULL; - int *myChan = NULL; - module.dacs = NULL; - module.chanregs = NULL; + ret = OK; + memset(mess, 0, sizeof(mess)); + sls_detector_module module; + int *myDac = NULL; + int *myChan = NULL; + module.dacs = NULL; + module.chanregs = NULL; - // allocate to send arguments - // allocate dacs - myDac = (int*)malloc(getNumberOfDACs() * sizeof(int)); - // error - if (getNumberOfDACs() > 0 && myDac == NULL) { - ret = FAIL; - sprintf(mess, "Could not allocate dacs\n"); - LOG(logERROR,(mess)); - } else - module.dacs = myDac; + // allocate to send arguments + // allocate dacs + myDac = (int *)malloc(getNumberOfDACs() * sizeof(int)); + // error + if (getNumberOfDACs() > 0 && myDac == NULL) { + ret = FAIL; + sprintf(mess, "Could not allocate dacs\n"); + LOG(logERROR, (mess)); + } else + module.dacs = myDac; -#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(MYTHEN3D) || defined(GOTTHARD2D) +#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(MYTHEN3D) || \ + defined(GOTTHARD2D) functionNotImplemented(); #endif #ifdef EIGERD // allocate chans - if (ret == OK) { - myChan = (int*)malloc(getTotalNumberOfChannels() * sizeof(int)); - if (getTotalNumberOfChannels() > 0 && myChan == NULL) { - ret = FAIL; - sprintf(mess,"Could not allocate chans\n"); - LOG(logERROR,(mess)); - } else - module.chanregs=myChan; - } + if (ret == OK) { + myChan = (int *)malloc(getTotalNumberOfChannels() * sizeof(int)); + if (getTotalNumberOfChannels() > 0 && myChan == NULL) { + ret = FAIL; + sprintf(mess, "Could not allocate chans\n"); + LOG(logERROR, (mess)); + } else + module.chanregs = myChan; + } #endif - // get module - if (ret == OK) { - module.nchip = getNumberOfChips(); - module.nchan = getTotalNumberOfChannels(); - module.ndac = getNumberOfDACs(); + // get module + if (ret == OK) { + module.nchip = getNumberOfChips(); + module.nchan = getTotalNumberOfChannels(); + module.ndac = getNumberOfDACs(); - // only get - LOG(logDEBUG1, ("Getting module\n")); -#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) - getModule(&module); + // only get + LOG(logDEBUG1, ("Getting module\n")); +#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) && \ + !defined(GOTTHARD2D) + getModule(&module); #endif - LOG(logDEBUG1, ("Getting module. Settings:%d\n", module.reg)); - } + LOG(logDEBUG1, ("Getting module. Settings:%d\n", module.reg)); + } - Server_SendResult(file_des, INT32, NULL, 0); + Server_SendResult(file_des, INT32, NULL, 0); - // send module, 0 is to receive partially (without trimbits etc) - if (ret != FAIL) { - ret = sendModule(file_des, &module); - } - if (myChan != NULL) free(myChan); - if (myDac != NULL) free(myDac); - return ret; + // send module, 0 is to receive partially (without trimbits etc) + if (ret != FAIL) { + ret = sendModule(file_des, &module); + } + if (myChan != NULL) + free(myChan); + if (myDac != NULL) + free(myDac); + return ret; } - - - - - int set_settings(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - enum detectorSettings isett = GET_SETTINGS; - enum detectorSettings retval = GET_SETTINGS; + ret = OK; + memset(mess, 0, sizeof(mess)); + enum detectorSettings isett = GET_SETTINGS; + enum detectorSettings retval = GET_SETTINGS; - if (receiveData(file_des, &isett, sizeof(isett), INT32) < 0) - return printSocketReadError(); + if (receiveData(file_des, &isett, sizeof(isett), INT32) < 0) + return printSocketReadError(); #if defined(CHIPTESTBOARDD) || defined(MYTHEN3D) functionNotImplemented(); #else - LOG(logDEBUG1, ("Setting settings %d\n", isett)); + LOG(logDEBUG1, ("Setting settings %d\n", isett)); - //set & get - if ((isett == GET_SETTINGS) || (Server_VerifyLock() == OK)) { + // set & get + if ((isett == GET_SETTINGS) || (Server_VerifyLock() == OK)) { - // check index - switch(isett) { - case GET_SETTINGS: + // check index + switch (isett) { + case GET_SETTINGS: #ifdef JUNGFRAUD - case DYNAMICGAIN: - case DYNAMICHG0: - case FIXGAIN1: - case FIXGAIN2: - case FORCESWITCHG1: - case FORCESWITCHG2: + case DYNAMICGAIN: + case DYNAMICHG0: + case FIXGAIN1: + case FIXGAIN2: + case FORCESWITCHG1: + case FORCESWITCHG2: #elif GOTTHARDD - case DYNAMICGAIN: - case HIGHGAIN: - case LOWGAIN: - case MEDIUMGAIN: - case VERYHIGHGAIN: + case DYNAMICGAIN: + case HIGHGAIN: + case LOWGAIN: + case MEDIUMGAIN: + case VERYHIGHGAIN: #elif GOTTHARD2D - case DYNAMICGAIN: - case FIXGAIN1: - case FIXGAIN2: + case DYNAMICGAIN: + case FIXGAIN1: + case FIXGAIN2: #elif MOENCHD - case G1_HIGHGAIN: + case G1_HIGHGAIN: case G1_LOWGAIN: case G2_HIGHCAP_HIGHGAIN: case G2_HIGHCAP_LOWGAIN: @@ -1735,1229 +1949,1271 @@ int set_settings(int file_des) { case G4_HIGHGAIN: case G4_LOWGAIN: #endif - break; - default: - if (myDetectorType == EIGER) { - ret = FAIL; - sprintf(mess, "Cannot set settings via SET_SETTINGS, use SET_MODULE (set threshold)\n"); - LOG(logERROR,(mess)); - } else - modeNotImplemented("Settings Index", (int)isett); - break; - } + break; + default: + if (myDetectorType == EIGER) { + ret = FAIL; + sprintf(mess, "Cannot set settings via SET_SETTINGS, use " + "SET_MODULE (set threshold)\n"); + LOG(logERROR, (mess)); + } else + modeNotImplemented("Settings Index", (int)isett); + break; + } - // if index is okay, set & get - if (ret == OK) { - retval = setSettings(isett); - LOG(logDEBUG1, ("Settings: %d\n", retval)); - validate((int)isett, (int)retval, "set settings", DEC); -#if defined(JUNGFRAUD) || defined (GOTTHARDD) - // gotthard2 does not set default dacs - if (ret == OK && isett >= 0) { - ret = setDefaultDacs(); - if (ret == FAIL) { - strcpy(mess,"Could change settings, but could not set to default dacs\n"); - LOG(logERROR,(mess)); - } - } + // if index is okay, set & get + if (ret == OK) { + retval = setSettings(isett); + LOG(logDEBUG1, ("Settings: %d\n", retval)); + validate((int)isett, (int)retval, "set settings", DEC); +#if defined(JUNGFRAUD) || defined(GOTTHARDD) + // gotthard2 does not set default dacs + if (ret == OK && isett >= 0) { + ret = setDefaultDacs(); + if (ret == FAIL) { + strcpy(mess, "Could change settings, but could not set to " + "default dacs\n"); + LOG(logERROR, (mess)); + } + } #endif - } - } + } + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - int get_threshold_energy(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting Threshold energy\n")); + LOG(logDEBUG1, ("Getting Threshold energy\n")); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only get - retval = getThresholdEnergy(); - LOG(logDEBUG1, ("Threshold energy: %d eV\n", retval)); + // only get + retval = getThresholdEnergy(); + LOG(logDEBUG1, ("Threshold energy: %d eV\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - - int start_acquisition(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); - LOG(logDEBUG1, ("Starting Acquisition\n")); - // only set - if (Server_VerifyLock() == OK) { + LOG(logDEBUG1, ("Starting Acquisition\n")); + // only set + if (Server_VerifyLock() == OK) { #if defined(MOENCHD) - if (getNumAnalogSamples() <= 0) { - ret = FAIL; - sprintf(mess, "Could not start acquisition. Invalid number of analog samples: %d.\n", getNumAnalogSamples()); - LOG(logERROR,(mess)); - } - else + if (getNumAnalogSamples() <= 0) { + ret = FAIL; + sprintf(mess, + "Could not start acquisition. Invalid number of analog " + "samples: %d.\n", + getNumAnalogSamples()); + LOG(logERROR, (mess)); + } else #endif -#if defined(CHIPTESTBOARDD) - if ((getReadoutMode() == ANALOG_AND_DIGITAL || getReadoutMode() == ANALOG_ONLY) && (getNumAnalogSamples() <= 0)) { - ret = FAIL; - sprintf(mess, "Could not start acquisition. Invalid number of analog samples: %d.\n", getNumAnalogSamples()); - LOG(logERROR,(mess)); - } - else if ((getReadoutMode() == ANALOG_AND_DIGITAL || getReadoutMode() == DIGITAL_ONLY) && (getNumDigitalSamples() <= 0)) { - ret = FAIL; - sprintf(mess, "Could not start acquisition. Invalid number of digital samples: %d.\n", getNumDigitalSamples()); - LOG(logERROR,(mess)); - } - else +#if defined(CHIPTESTBOARDD) + if ((getReadoutMode() == ANALOG_AND_DIGITAL || + getReadoutMode() == ANALOG_ONLY) && + (getNumAnalogSamples() <= 0)) { + ret = FAIL; + sprintf(mess, + "Could not start acquisition. Invalid number of analog " + "samples: %d.\n", + getNumAnalogSamples()); + LOG(logERROR, (mess)); + } else if ((getReadoutMode() == ANALOG_AND_DIGITAL || + getReadoutMode() == DIGITAL_ONLY) && + (getNumDigitalSamples() <= 0)) { + ret = FAIL; + sprintf(mess, + "Could not start acquisition. Invalid number of digital " + "samples: %d.\n", + getNumDigitalSamples()); + LOG(logERROR, (mess)); + } else #endif #ifdef EIGERD - // check for hardware mac and hardware ip - if (udpDetails.srcmac != getDetectorMAC()) { - ret = FAIL; - uint64_t sourcemac = getDetectorMAC(); - char src_mac[50]; - getMacAddressinString(src_mac, 50, sourcemac); - sprintf(mess, "Invalid udp source mac address for this detector. Must be same as hardware detector mac address %s\n", src_mac); - LOG(logERROR,(mess)); - } - else if (!enableTenGigabitEthernet(-1) && (udpDetails.srcip != getDetectorIP())) { - ret = FAIL; - uint32_t sourceip = getDetectorIP(); - char src_ip[INET_ADDRSTRLEN]; - getIpAddressinString(src_ip, sourceip); - sprintf(mess, "Invalid udp source ip address for this detector. Must be same as hardware detector ip address %s in 1G readout mode \n", src_ip); - LOG(logERROR,(mess)); - } - else + // check for hardware mac and hardware ip + if (udpDetails.srcmac != getDetectorMAC()) { + ret = FAIL; + uint64_t sourcemac = getDetectorMAC(); + char src_mac[50]; + getMacAddressinString(src_mac, 50, sourcemac); + sprintf(mess, + "Invalid udp source mac address for this detector. Must be " + "same as hardware detector mac address %s\n", + src_mac); + LOG(logERROR, (mess)); + } else if (!enableTenGigabitEthernet(-1) && + (udpDetails.srcip != getDetectorIP())) { + ret = FAIL; + uint32_t sourceip = getDetectorIP(); + char src_ip[INET_ADDRSTRLEN]; + getIpAddressinString(src_ip, sourceip); + sprintf( + mess, + "Invalid udp source ip address for this detector. Must be same " + "as hardware detector ip address %s in 1G readout mode \n", + src_ip); + LOG(logERROR, (mess)); + } else #endif - if (configured == FAIL) { - ret = FAIL; - strcpy(mess, "Could not start acquisition because "); - strcat(mess, configureMessage); - LOG(logERROR,(mess)); - } else { - ret = startStateMachine(); - if (ret == FAIL) { + if (configured == FAIL) { + ret = FAIL; + strcpy(mess, "Could not start acquisition because "); + strcat(mess, configureMessage); + LOG(logERROR, (mess)); + } else { + ret = startStateMachine(); + if (ret == FAIL) { #if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(VIRTUAL) - sprintf(mess, "Could not start acquisition. Could not create udp socket in server. Check udp_dstip & udp_dstport.\n"); + sprintf(mess, + "Could not start acquisition. Could not create udp " + "socket in server. Check udp_dstip & udp_dstport.\n"); #else - sprintf(mess, "Could not start acquisition\n"); + sprintf(mess, "Could not start acquisition\n"); #endif - LOG(logERROR,(mess)); - } - } - LOG(logDEBUG2, ("Starting Acquisition ret: %d\n", ret)); - } - return Server_SendResult(file_des, INT32, NULL, 0); + LOG(logERROR, (mess)); + } + } + LOG(logDEBUG2, ("Starting Acquisition ret: %d\n", ret)); + } + return Server_SendResult(file_des, INT32, NULL, 0); } - - int stop_acquisition(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); - LOG(logDEBUG1, ("Stopping Acquisition\n")); - // only set - if (Server_VerifyLock() == OK) { - ret = stopStateMachine(); - if (ret == FAIL) { - sprintf(mess, "Could not stop acquisition\n"); - LOG(logERROR,(mess)); - } - LOG(logDEBUG1, ("Stopping Acquisition ret: %d\n", ret)); - } - return Server_SendResult(file_des, INT32, NULL, 0); + LOG(logDEBUG1, ("Stopping Acquisition\n")); + // only set + if (Server_VerifyLock() == OK) { + ret = stopStateMachine(); + if (ret == FAIL) { + sprintf(mess, "Could not stop acquisition\n"); + LOG(logERROR, (mess)); + } + LOG(logDEBUG1, ("Stopping Acquisition ret: %d\n", ret)); + } + return Server_SendResult(file_des, INT32, NULL, 0); } - - - - int start_readout(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); - LOG(logDEBUG1, ("Starting readout\n")); + LOG(logDEBUG1, ("Starting readout\n")); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = startReadOut(); - if (ret == FAIL) { - sprintf(mess, "Could not start readout\n"); - LOG(logERROR,(mess)); - } - LOG(logDEBUG1, ("Starting readout ret: %d\n", ret)); - } + // only set + if (Server_VerifyLock() == OK) { + ret = startReadOut(); + if (ret == FAIL) { + sprintf(mess, "Could not start readout\n"); + LOG(logERROR, (mess)); + } + LOG(logDEBUG1, ("Starting readout ret: %d\n", ret)); + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - - - - - int get_run_status(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - enum runStatus retval = ERROR; + ret = OK; + memset(mess, 0, sizeof(mess)); + enum runStatus retval = ERROR; - LOG(logDEBUG1, ("Getting status\n")); - // only get - retval = getRunStatus(); - LOG(logDEBUG1, ("Status: %d\n", retval)); - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + LOG(logDEBUG1, ("Getting status\n")); + // only get + retval = getRunStatus(); + LOG(logDEBUG1, ("Status: %d\n", retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - int start_and_read_all(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); - LOG(logDEBUG1, ("Starting Acquisition and read all frames\n")); - // start state machine - LOG(logDEBUG1, ("Starting Acquisition\n")); - // only set - if (Server_VerifyLock() == OK) { + LOG(logDEBUG1, ("Starting Acquisition and read all frames\n")); + // start state machine + LOG(logDEBUG1, ("Starting Acquisition\n")); + // only set + if (Server_VerifyLock() == OK) { #if defined(MOENCHD) - if (getNumAnalogSamples() <= 0) { - ret = FAIL; - sprintf(mess, "Could not start acquisition. Invalid number of analog samples: %d.\n", getNumAnalogSamples()); - LOG(logERROR,(mess)); - } - else + if (getNumAnalogSamples() <= 0) { + ret = FAIL; + sprintf(mess, + "Could not start acquisition. Invalid number of analog " + "samples: %d.\n", + getNumAnalogSamples()); + LOG(logERROR, (mess)); + } else #endif -#if defined(CHIPTESTBOARDD) - if ((getReadoutMode() == ANALOG_AND_DIGITAL || getReadoutMode() == ANALOG_ONLY) && (getNumAnalogSamples() <= 0)) { - ret = FAIL; - sprintf(mess, "Could not start acquisition. Invalid number of analog samples: %d.\n", getNumAnalogSamples()); - LOG(logERROR,(mess)); - } - else if ((getReadoutMode() == ANALOG_AND_DIGITAL || getReadoutMode() == DIGITAL_ONLY) && (getNumDigitalSamples() <= 0)) { - ret = FAIL; - sprintf(mess, "Could not start acquisition. Invalid number of digital samples: %d.\n", getNumDigitalSamples()); - LOG(logERROR,(mess)); - } - else +#if defined(CHIPTESTBOARDD) + if ((getReadoutMode() == ANALOG_AND_DIGITAL || + getReadoutMode() == ANALOG_ONLY) && + (getNumAnalogSamples() <= 0)) { + ret = FAIL; + sprintf(mess, + "Could not start acquisition. Invalid number of analog " + "samples: %d.\n", + getNumAnalogSamples()); + LOG(logERROR, (mess)); + } else if ((getReadoutMode() == ANALOG_AND_DIGITAL || + getReadoutMode() == DIGITAL_ONLY) && + (getNumDigitalSamples() <= 0)) { + ret = FAIL; + sprintf(mess, + "Could not start acquisition. Invalid number of digital " + "samples: %d.\n", + getNumDigitalSamples()); + LOG(logERROR, (mess)); + } else #endif #ifdef EIGERD - // check for hardware mac and hardware ip - if (udpDetails.srcmac != getDetectorMAC()) { - ret = FAIL; - uint64_t sourcemac = getDetectorMAC(); - char src_mac[50]; - getMacAddressinString(src_mac, 50, sourcemac); - sprintf(mess, "Invalid udp source mac address for this detector. Must be same as hardware detector mac address %s\n", src_mac); - LOG(logERROR,(mess)); - } - else if (!enableTenGigabitEthernet(-1) && (udpDetails.srcip != getDetectorIP())) { - ret = FAIL; - uint32_t sourceip = getDetectorIP(); - char src_ip[INET_ADDRSTRLEN]; - getIpAddressinString(src_ip, sourceip); - sprintf(mess, "Invalid udp source ip address for this detector. Must be same as hardware detector ip address %s in 1G readout mode \n", src_ip); - LOG(logERROR,(mess)); - } - else + // check for hardware mac and hardware ip + if (udpDetails.srcmac != getDetectorMAC()) { + ret = FAIL; + uint64_t sourcemac = getDetectorMAC(); + char src_mac[50]; + getMacAddressinString(src_mac, 50, sourcemac); + sprintf(mess, + "Invalid udp source mac address for this detector. Must be " + "same as hardware detector mac address %s\n", + src_mac); + LOG(logERROR, (mess)); + } else if (!enableTenGigabitEthernet(-1) && + (udpDetails.srcip != getDetectorIP())) { + ret = FAIL; + uint32_t sourceip = getDetectorIP(); + char src_ip[INET_ADDRSTRLEN]; + getIpAddressinString(src_ip, sourceip); + sprintf( + mess, + "Invalid udp source ip address for this detector. Must be same " + "as hardware detector ip address %s in 1G readout mode \n", + src_ip); + LOG(logERROR, (mess)); + } else #endif - if (configured == FAIL) { - ret = FAIL; - strcpy(mess, "Could not start acquisition because "); - strcat(mess, configureMessage); - LOG(logERROR,(mess)); - } else { - ret = startStateMachine(); - if (ret == FAIL) { + if (configured == FAIL) { + ret = FAIL; + strcpy(mess, "Could not start acquisition because "); + strcat(mess, configureMessage); + LOG(logERROR, (mess)); + } else { + ret = startStateMachine(); + if (ret == FAIL) { #if defined(VIRTUAL) || defined(CHIPTESTBOARDD) || defined(MOENCHD) - sprintf(mess, "Could not start acquisition. Could not create udp socket in server. Check udp_dstip & udp_dstport.\n"); + sprintf(mess, + "Could not start acquisition. Could not create udp " + "socket in server. Check udp_dstip & udp_dstport.\n"); #else - sprintf(mess, "Could not start acquisition\n"); + sprintf(mess, "Could not start acquisition\n"); #endif - LOG(logERROR,(mess)); - } - } - LOG(logDEBUG2, ("Starting Acquisition ret: %d\n", ret)); - } + LOG(logERROR, (mess)); + } + } + LOG(logDEBUG2, ("Starting Acquisition ret: %d\n", ret)); + } - // lock or acquisition start error - if (ret == FAIL) - return Server_SendResult(file_des, INT32, NULL, 0); + // lock or acquisition start error + if (ret == FAIL) + return Server_SendResult(file_des, INT32, NULL, 0); - // read all (again validate lock, but should pass and not fail) - return read_all(file_des); + // read all (again validate lock, but should pass and not fail) + return read_all(file_des); } - - - int read_all(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); - LOG(logDEBUG1, ("Reading all frames\n")); - // only set - if (Server_VerifyLock() == OK) { - readFrame(&ret, mess); - } - return Server_SendResult(file_des, INT32, NULL, 0); + LOG(logDEBUG1, ("Reading all frames\n")); + // only set + if (Server_VerifyLock() == OK) { + readFrame(&ret, mess); + } + return Server_SendResult(file_des, INT32, NULL, 0); } - - int get_num_frames(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; - // get only - retval = getNumFrames(); - LOG(logDEBUG1, ("retval num frames %lld\n", (long long int)retval)); - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + // get only + retval = getNumFrames(); + LOG(logDEBUG1, ("retval num frames %lld\n", (long long int)retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int set_num_frames(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting number of frames %lld\n", (long long int)arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting number of frames %lld\n", (long long int)arg)); - // only set - if (Server_VerifyLock() == OK) { + // only set + if (Server_VerifyLock() == OK) { #ifdef GOTTHARD2D - // validate #frames in burst mode - if (getBurstMode() != BURST_OFF && arg > MAX_FRAMES_IN_BURST_MODE) { - ret = FAIL; - sprintf(mess, "Could not set number of frames %lld. Must be <= %d in burst mode.\n", (long long unsigned int)arg, MAX_FRAMES_IN_BURST_MODE); - LOG(logERROR,(mess)); - } + // validate #frames in burst mode + if (getBurstMode() != BURST_OFF && arg > MAX_FRAMES_IN_BURST_MODE) { + ret = FAIL; + sprintf(mess, + "Could not set number of frames %lld. Must be <= %d in " + "burst mode.\n", + (long long unsigned int)arg, MAX_FRAMES_IN_BURST_MODE); + LOG(logERROR, (mess)); + } #endif - if (ret == OK) { - setNumFrames(arg); - int64_t retval = getNumFrames(); - LOG(logDEBUG1, ("retval num frames %lld\n", (long long int)retval)); - validate64(arg, retval, "set number of frames", DEC); - } - } - return Server_SendResult(file_des, INT64, NULL, 0); + if (ret == OK) { + setNumFrames(arg); + int64_t retval = getNumFrames(); + LOG(logDEBUG1, ("retval num frames %lld\n", (long long int)retval)); + validate64(arg, retval, "set number of frames", DEC); + } + } + return Server_SendResult(file_des, INT64, NULL, 0); } int get_num_triggers(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; - // get only - retval = getNumTriggers(); - LOG(logDEBUG1, ("retval num triggers %lld\n", (long long int)retval)); - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + // get only + retval = getNumTriggers(); + LOG(logDEBUG1, ("retval num triggers %lld\n", (long long int)retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int set_num_triggers(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting number of triggers %lld\n", (long long int)arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting number of triggers %lld\n", (long long int)arg)); - // only set - if (Server_VerifyLock() == OK) { - setNumTriggers(arg); - int64_t retval = getNumTriggers(); - LOG(logDEBUG1, ("retval num triggers %lld\n", (long long int)retval)); - validate64(arg, retval, "set number of triggers", DEC); - } - return Server_SendResult(file_des, INT64, NULL, 0); + // only set + if (Server_VerifyLock() == OK) { + setNumTriggers(arg); + int64_t retval = getNumTriggers(); + LOG(logDEBUG1, ("retval num triggers %lld\n", (long long int)retval)); + validate64(arg, retval, "set number of triggers", DEC); + } + return Server_SendResult(file_des, INT64, NULL, 0); } int get_num_additional_storage_cells(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; #ifndef JUNGFRAUD - functionNotImplemented(); -#else - // get only - retval = getNumAdditionalStorageCells(); - LOG(logDEBUG1, ("retval num addl. storage cells %d\n", retval)); -#endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + functionNotImplemented(); +#else + // get only + retval = getNumAdditionalStorageCells(); + LOG(logDEBUG1, ("retval num addl. storage cells %d\n", retval)); +#endif + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } int set_num_additional_storage_cells(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting number of addl. storage cells %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting number of addl. storage cells %d\n", arg)); #ifndef JUNGFRAUD - functionNotImplemented(); -#else - // only set - if (Server_VerifyLock() == OK) { - if (arg > MAX_STORAGE_CELL_VAL) { - ret = FAIL; - sprintf(mess,"Max Storage cell number should not exceed %d\n", MAX_STORAGE_CELL_VAL); - LOG(logERROR,(mess)); - } else { - setNumAdditionalStorageCells(arg); - int retval = getNumAdditionalStorageCells(); - LOG(logDEBUG1, ("retval num addl. storage cells %d\n", retval)); - validate(arg, retval, "set number of additional storage cells", DEC); - } - } -#endif - return Server_SendResult(file_des, INT32, NULL, 0); + functionNotImplemented(); +#else + // only set + if (Server_VerifyLock() == OK) { + if (arg > MAX_STORAGE_CELL_VAL) { + ret = FAIL; + sprintf(mess, "Max Storage cell number should not exceed %d\n", + MAX_STORAGE_CELL_VAL); + LOG(logERROR, (mess)); + } else { + setNumAdditionalStorageCells(arg); + int retval = getNumAdditionalStorageCells(); + LOG(logDEBUG1, ("retval num addl. storage cells %d\n", retval)); + validate(arg, retval, "set number of additional storage cells", + DEC); + } + } +#endif + return Server_SendResult(file_des, INT32, NULL, 0); } int get_num_analog_samples(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) - functionNotImplemented(); -#else - // get only - retval = getNumAnalogSamples(); - LOG(logDEBUG1, ("retval num analog samples %d\n", retval)); -#endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + functionNotImplemented(); +#else + // get only + retval = getNumAnalogSamples(); + LOG(logDEBUG1, ("retval num analog samples %d\n", retval)); +#endif + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } int set_num_analog_samples(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting number of analog samples %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting number of analog samples %d\n", arg)); #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) - functionNotImplemented(); -#else - // only set - if (Server_VerifyLock() == OK) { + functionNotImplemented(); +#else + // only set + if (Server_VerifyLock() == OK) { #ifdef MOENCHD - if (arg % NSAMPLES_PER_ROW != 0) { - ret = FAIL; - sprintf(mess, "Could not set number of analog samples to %d. Must be divisible by %d\n", arg, NSAMPLES_PER_ROW); - LOG(logERROR,(mess)); - } + if (arg % NSAMPLES_PER_ROW != 0) { + ret = FAIL; + sprintf(mess, + "Could not set number of analog samples to %d. Must be " + "divisible by %d\n", + arg, NSAMPLES_PER_ROW); + LOG(logERROR, (mess)); + } #endif - if (ret == OK) { - ret = setNumAnalogSamples(arg); - if (ret == FAIL) { - sprintf(mess, "Could not set number of analog samples to %d. Could not allocate RAM\n", arg); - LOG(logERROR,(mess)); - } else { - int retval = getNumAnalogSamples(); - LOG(logDEBUG1, ("retval num analog samples %d\n", retval)); - validate(arg, retval, "set number of analog samples", DEC); - } - } - } -#endif - return Server_SendResult(file_des, INT32, NULL, 0); + if (ret == OK) { + ret = setNumAnalogSamples(arg); + if (ret == FAIL) { + sprintf(mess, + "Could not set number of analog samples to %d. Could " + "not allocate RAM\n", + arg); + LOG(logERROR, (mess)); + } else { + int retval = getNumAnalogSamples(); + LOG(logDEBUG1, ("retval num analog samples %d\n", retval)); + validate(arg, retval, "set number of analog samples", DEC); + } + } + } +#endif + return Server_SendResult(file_des, INT32, NULL, 0); } int get_num_digital_samples(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; #if !defined(CHIPTESTBOARDD) - functionNotImplemented(); -#else - // get only - retval = getNumDigitalSamples(); - LOG(logDEBUG1, ("retval num digital samples %d\n", retval)); -#endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + functionNotImplemented(); +#else + // get only + retval = getNumDigitalSamples(); + LOG(logDEBUG1, ("retval num digital samples %d\n", retval)); +#endif + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } int set_num_digital_samples(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting number of digital samples %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting number of digital samples %d\n", arg)); #if !defined(CHIPTESTBOARDD) - functionNotImplemented(); -#else - // only set - if (Server_VerifyLock() == OK) { - ret = setNumDigitalSamples(arg); - if (ret == FAIL) { - sprintf(mess, "Could not set number of digital samples to %d. Could not allocate RAM\n", arg); - LOG(logERROR,(mess)); - } else { - int retval = getNumDigitalSamples(); - LOG(logDEBUG1, ("retval num digital samples %d\n", retval)); - validate(arg, retval, "set number of digital samples", DEC); - } - } -#endif - return Server_SendResult(file_des, INT32, NULL, 0); + functionNotImplemented(); +#else + // only set + if (Server_VerifyLock() == OK) { + ret = setNumDigitalSamples(arg); + if (ret == FAIL) { + sprintf(mess, + "Could not set number of digital samples to %d. Could not " + "allocate RAM\n", + arg); + LOG(logERROR, (mess)); + } else { + int retval = getNumDigitalSamples(); + LOG(logDEBUG1, ("retval num digital samples %d\n", retval)); + validate(arg, retval, "set number of digital samples", DEC); + } + } +#endif + return Server_SendResult(file_des, INT32, NULL, 0); } int get_exptime(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; - // get only - retval = getExpTime(); - LOG(logDEBUG1, ("retval exptime %lld ns\n", (long long int)retval)); - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + // get only + retval = getExpTime(); + LOG(logDEBUG1, ("retval exptime %lld ns\n", (long long int)retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int set_exptime(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting exptime %lld ns\n", (long long int)arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting exptime %lld ns\n", (long long int)arg)); - // only set - if (Server_VerifyLock() == OK) { - ret = setExpTime(arg); - int64_t retval = getExpTime(); - LOG(logDEBUG1, ("retval exptime %lld ns\n", (long long int)retval)); - if (ret == FAIL) { - sprintf(mess, "Could not set exposure time. Set %lld ns, read %lld ns.\n", (long long int)arg, (long long int)retval); - LOG(logERROR,(mess)); - } - } - return Server_SendResult(file_des, INT64, NULL, 0); + // only set + if (Server_VerifyLock() == OK) { + ret = setExpTime(arg); + int64_t retval = getExpTime(); + LOG(logDEBUG1, ("retval exptime %lld ns\n", (long long int)retval)); + if (ret == FAIL) { + sprintf(mess, + "Could not set exposure time. Set %lld ns, read %lld ns.\n", + (long long int)arg, (long long int)retval); + LOG(logERROR, (mess)); + } + } + return Server_SendResult(file_des, INT64, NULL, 0); } int get_period(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; - // get only - retval = getPeriod(); - LOG(logDEBUG1, ("retval period %lld ns\n", (long long int)retval)); - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + // get only + retval = getPeriod(); + LOG(logDEBUG1, ("retval period %lld ns\n", (long long int)retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int set_period(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting period %lld ns\n", (long long int)arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting period %lld ns\n", (long long int)arg)); - // only set - if (Server_VerifyLock() == OK) { - ret = setPeriod(arg); - int64_t retval = getPeriod(); - LOG(logDEBUG1, ("retval period %lld ns\n", (long long int)retval)); - if (ret == FAIL) { - sprintf(mess, "Could not set period. Set %lld ns, read %lld ns.\n", (long long int)arg, (long long int)retval); - LOG(logERROR,(mess)); - } - } - return Server_SendResult(file_des, INT64, NULL, 0); + // only set + if (Server_VerifyLock() == OK) { + ret = setPeriod(arg); + int64_t retval = getPeriod(); + LOG(logDEBUG1, ("retval period %lld ns\n", (long long int)retval)); + if (ret == FAIL) { + sprintf(mess, "Could not set period. Set %lld ns, read %lld ns.\n", + (long long int)arg, (long long int)retval); + LOG(logERROR, (mess)); + } + } + return Server_SendResult(file_des, INT64, NULL, 0); } int get_delay_after_trigger(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; -#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) - functionNotImplemented(); -#else - // get only - retval = getDelayAfterTrigger(); - LOG(logDEBUG1, ("retval delay after trigger %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); +#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && \ + !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) + functionNotImplemented(); +#else + // get only + retval = getDelayAfterTrigger(); + LOG(logDEBUG1, + ("retval delay after trigger %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int set_delay_after_trigger(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting delay after trigger %lld ns\n", (long long int)arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, + ("Setting delay after trigger %lld ns\n", (long long int)arg)); -#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) - functionNotImplemented(); -#else - // only set - if (Server_VerifyLock() == OK) { - ret = setDelayAfterTrigger(arg); - int64_t retval = getDelayAfterTrigger(); - LOG(logDEBUG1, ("retval delay after trigger %lld ns\n", (long long int)retval)); - if (ret == FAIL) { - sprintf(mess, "Could not set delay after trigger. Set %lld ns, read %lld ns.\n", (long long int)arg, (long long int)retval); - LOG(logERROR,(mess)); - } - } -#endif - return Server_SendResult(file_des, INT64, NULL, 0); +#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && \ + !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) + functionNotImplemented(); +#else + // only set + if (Server_VerifyLock() == OK) { + ret = setDelayAfterTrigger(arg); + int64_t retval = getDelayAfterTrigger(); + LOG(logDEBUG1, + ("retval delay after trigger %lld ns\n", (long long int)retval)); + if (ret == FAIL) { + sprintf(mess, + "Could not set delay after trigger. Set %lld ns, read %lld " + "ns.\n", + (long long int)arg, (long long int)retval); + LOG(logERROR, (mess)); + } + } +#endif + return Server_SendResult(file_des, INT64, NULL, 0); } int get_sub_exptime(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getSubExpTime(); - LOG(logDEBUG1, ("retval subexptime %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + functionNotImplemented(); +#else + // get only + retval = getSubExpTime(); + LOG(logDEBUG1, ("retval subexptime %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int set_sub_exptime(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting subexptime %lld ns\n", (long long int)arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting subexptime %lld ns\n", (long long int)arg)); #ifndef EIGERD - functionNotImplemented(); -#else - // only set - if (Server_VerifyLock() == OK) { - if (arg > ((int64_t)MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS*10) ) { - ret = FAIL; - sprintf(mess,"Sub Frame exposure time should not exceed %lf seconds\n", ((double)((int64_t)MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS * 10)/ (double)(1E9))); - LOG(logERROR,(mess)); - } else { - ret = setSubExpTime(arg); - int64_t retval = getSubExpTime(); - LOG(logDEBUG1, ("retval subexptime %lld ns\n", (long long int)retval)); - if (ret == FAIL) { - sprintf(mess, "Could not set subframe exposure time. Set %lld ns, read %lld ns.\n", (long long int)arg, (long long int)retval); - LOG(logERROR,(mess)); - } - } - } -#endif - return Server_SendResult(file_des, INT64, NULL, 0); + functionNotImplemented(); +#else + // only set + if (Server_VerifyLock() == OK) { + if (arg > ((int64_t)MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS * 10)) { + ret = FAIL; + sprintf(mess, + "Sub Frame exposure time should not exceed %lf seconds\n", + ((double)((int64_t)MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS * 10) / + (double)(1E9))); + LOG(logERROR, (mess)); + } else { + ret = setSubExpTime(arg); + int64_t retval = getSubExpTime(); + LOG(logDEBUG1, + ("retval subexptime %lld ns\n", (long long int)retval)); + if (ret == FAIL) { + sprintf(mess, + "Could not set subframe exposure time. Set %lld ns, " + "read %lld ns.\n", + (long long int)arg, (long long int)retval); + LOG(logERROR, (mess)); + } + } + } +#endif + return Server_SendResult(file_des, INT64, NULL, 0); } int get_sub_deadtime(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getSubDeadTime(); - LOG(logDEBUG1, ("retval subdeadtime %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + functionNotImplemented(); +#else + // get only + retval = getSubDeadTime(); + LOG(logDEBUG1, ("retval subdeadtime %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int set_sub_deadtime(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting subdeadtime %lld ns\n", (long long int)arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting subdeadtime %lld ns\n", (long long int)arg)); #ifndef EIGERD - functionNotImplemented(); -#else - // only set - if (Server_VerifyLock() == OK) { - int64_t subexptime = getSubExpTime(); - if ((arg + subexptime) > ((int64_t)MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS*10) ) { - ret = FAIL; - sprintf(mess,"Sub Frame Period should not exceed %lf seconds. " - "So sub frame dead time should not exceed %lf seconds " - "(subexptime = %lf seconds)\n", - ((double)((int64_t)MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS * 10)/ (double)(1E9)), - ((double)(((int64_t)MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS*10) - subexptime)/(double)1E9), - ((double)subexptime/(double)1E9)); - LOG(logERROR,(mess)); - } else { - ret = setSubDeadTime(arg); - int64_t retval = getSubDeadTime(); - LOG(logDEBUG1, ("retval subdeadtime %lld ns\n", (long long int)retval)); - if (ret == FAIL) { - sprintf(mess, "Could not set subframe dead time. Set %lld ns, read %lld ns.\n", (long long int)arg, (long long int)retval); - LOG(logERROR,(mess)); - } - } - } -#endif - return Server_SendResult(file_des, INT64, NULL, 0); + functionNotImplemented(); +#else + // only set + if (Server_VerifyLock() == OK) { + int64_t subexptime = getSubExpTime(); + if ((arg + subexptime) > + ((int64_t)MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS * 10)) { + ret = FAIL; + sprintf( + mess, + "Sub Frame Period should not exceed %lf seconds. " + "So sub frame dead time should not exceed %lf seconds " + "(subexptime = %lf seconds)\n", + ((double)((int64_t)MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS * 10) / + (double)(1E9)), + ((double)(((int64_t)MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS * 10) - + subexptime) / + (double)1E9), + ((double)subexptime / (double)1E9)); + LOG(logERROR, (mess)); + } else { + ret = setSubDeadTime(arg); + int64_t retval = getSubDeadTime(); + LOG(logDEBUG1, + ("retval subdeadtime %lld ns\n", (long long int)retval)); + if (ret == FAIL) { + sprintf(mess, + "Could not set subframe dead time. Set %lld ns, read " + "%lld ns.\n", + (long long int)arg, (long long int)retval); + LOG(logERROR, (mess)); + } + } + } +#endif + return Server_SendResult(file_des, INT64, NULL, 0); } int get_storage_cell_delay(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; #ifndef JUNGFRAUD - functionNotImplemented(); -#else - // get only - retval = getStorageCellDelay(); - LOG(logDEBUG1, ("retval storage cell delay %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + functionNotImplemented(); +#else + // get only + retval = getStorageCellDelay(); + LOG(logDEBUG1, + ("retval storage cell delay %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int set_storage_cell_delay(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting storage cell delay %lld ns\n", (long long int)arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, + ("Setting storage cell delay %lld ns\n", (long long int)arg)); #ifndef JUNGFRAUD - functionNotImplemented(); -#else - // only set - if (Server_VerifyLock() == OK) { - if (arg > MAX_STORAGE_CELL_DLY_NS_VAL) { - ret = FAIL; - sprintf(mess,"Max Storage cell delay value should not exceed %lld ns\n", (long long unsigned int)MAX_STORAGE_CELL_DLY_NS_VAL); - LOG(logERROR,(mess)); - } else { - ret = setStorageCellDelay(arg); - int64_t retval = getStorageCellDelay(); - LOG(logDEBUG1, ("retval storage cell delay %lld ns\n", (long long int)retval)); - if (ret == FAIL) { - sprintf(mess, "Could not set storage cell delay. Set %lld ns, read %lld ns.\n", (long long int)arg, (long long int)retval); - LOG(logERROR,(mess)); - } - } - } -#endif - return Server_SendResult(file_des, INT64, NULL, 0); + functionNotImplemented(); +#else + // only set + if (Server_VerifyLock() == OK) { + if (arg > MAX_STORAGE_CELL_DLY_NS_VAL) { + ret = FAIL; + sprintf(mess, + "Max Storage cell delay value should not exceed %lld ns\n", + (long long unsigned int)MAX_STORAGE_CELL_DLY_NS_VAL); + LOG(logERROR, (mess)); + } else { + ret = setStorageCellDelay(arg); + int64_t retval = getStorageCellDelay(); + LOG(logDEBUG1, + ("retval storage cell delay %lld ns\n", (long long int)retval)); + if (ret == FAIL) { + sprintf(mess, + "Could not set storage cell delay. Set %lld ns, read " + "%lld ns.\n", + (long long int)arg, (long long int)retval); + LOG(logERROR, (mess)); + } + } + } +#endif + return Server_SendResult(file_des, INT64, NULL, 0); } int get_frames_left(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; -#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) - functionNotImplemented(); -#else - // get only - retval = getNumFramesLeft(); - LOG(logDEBUG1, ("retval num frames left %lld\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); +#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && \ + !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) + functionNotImplemented(); +#else + // get only + retval = getNumFramesLeft(); + LOG(logDEBUG1, ("retval num frames left %lld\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int get_triggers_left(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; -#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) - functionNotImplemented(); -#else - // get only - retval = getNumTriggersLeft(); - LOG(logDEBUG1, ("retval num triggers left %lld\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); +#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && \ + !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) + functionNotImplemented(); +#else + // get only + retval = getNumTriggersLeft(); + LOG(logDEBUG1, ("retval num triggers left %lld\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int get_exptime_left(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; #ifndef GOTTHARDD - functionNotImplemented(); -#else - // get only - retval = getExpTimeLeft(); - LOG(logDEBUG1, ("retval exptime left %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + functionNotImplemented(); +#else + // get only + retval = getExpTimeLeft(); + LOG(logDEBUG1, ("retval exptime left %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int get_period_left(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; -#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) - functionNotImplemented(); -#else - // get only - retval = getPeriodLeft(); - LOG(logDEBUG1, ("retval period left %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); +#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && \ + !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) + functionNotImplemented(); +#else + // get only + retval = getPeriodLeft(); + LOG(logDEBUG1, ("retval period left %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int get_delay_after_trigger_left(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; -#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) - functionNotImplemented(); -#else - // get only - retval = getDelayAfterTriggerLeft(); - LOG(logDEBUG1, ("retval delay after trigger left %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); +#if !defined(JUNGFRAUD) && !defined(GOTTHARDD) && !defined(CHIPTESTBOARDD) && \ + !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) + functionNotImplemented(); +#else + // get only + retval = getDelayAfterTriggerLeft(); + LOG(logDEBUG1, + ("retval delay after trigger left %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int get_measured_period(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getMeasuredPeriod(); - LOG(logDEBUG1, ("retval measured period %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + functionNotImplemented(); +#else + // get only + retval = getMeasuredPeriod(); + LOG(logDEBUG1, ("retval measured period %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int get_measured_subperiod(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getMeasuredSubPeriod(); - LOG(logDEBUG1, ("retval measured sub period %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + functionNotImplemented(); +#else + // get only + retval = getMeasuredSubPeriod(); + LOG(logDEBUG1, + ("retval measured sub period %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int get_frames_from_start(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; -#if !defined(JUNGFRAUD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) - functionNotImplemented(); -#else - // get only - retval = getFramesFromStart(); - LOG(logDEBUG1, ("retval frames from start %lld\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); +#if !defined(JUNGFRAUD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && \ + !defined(MYTHEN3D) && !defined(GOTTHARD2D) + functionNotImplemented(); +#else + // get only + retval = getFramesFromStart(); + LOG(logDEBUG1, ("retval frames from start %lld\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int get_actual_time(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; -#if !defined(JUNGFRAUD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) - functionNotImplemented(); -#else - // get only - retval = getActualTime(); - LOG(logDEBUG1, ("retval actual time %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); +#if !defined(JUNGFRAUD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && \ + !defined(MYTHEN3D) && !defined(GOTTHARD2D) + functionNotImplemented(); +#else + // get only + retval = getActualTime(); + LOG(logDEBUG1, ("retval actual time %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int get_measurement_time(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; -#if !defined(JUNGFRAUD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) - functionNotImplemented(); -#else - // get only - retval = getMeasurementTime(); - LOG(logDEBUG1, ("retval measurement time %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); +#if !defined(JUNGFRAUD) && !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && \ + !defined(MYTHEN3D) && !defined(GOTTHARD2D) + functionNotImplemented(); +#else + // get only + retval = getMeasurementTime(); + LOG(logDEBUG1, + ("retval measurement time %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } - - - - int set_dynamic_range(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int dr = -1; - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int dr = -1; + int retval = -1; - if (receiveData(file_des, &dr, sizeof(dr), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting dr to %d\n", dr)); + if (receiveData(file_des, &dr, sizeof(dr), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting dr to %d\n", dr)); - // set & get - if ((dr == -1) || (Server_VerifyLock() == OK)) { - // check dr - switch(dr) { - case -1: + // set & get + if ((dr == -1) || (Server_VerifyLock() == OK)) { + // check dr + switch (dr) { + case -1: #ifdef MYTHEN3D - case 32: + case 32: #elif EIGERD - case 4: case 8: case 16: case 32: + case 4: + case 8: + case 16: + case 32: #endif -#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(GOTTHARD2D) - case 16: +#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || \ + defined(MOENCHD) || defined(GOTTHARD2D) + case 16: #endif - retval = setDynamicRange(dr); - LOG(logDEBUG1, ("Dynamic range: %d\n", retval)); - validate(dr, retval, "set dynamic range", DEC); - break; - default: - modeNotImplemented("Dynamic range", dr); - break; - } - } - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + retval = setDynamicRange(dr); + LOG(logDEBUG1, ("Dynamic range: %d\n", retval)); + validate(dr, retval, "set dynamic range", DEC); + break; + default: + modeNotImplemented("Dynamic range", dr); + break; + } + } + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - - - int set_roi(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - ROI arg; + ret = OK; + memset(mess, 0, sizeof(mess)); + ROI arg; - // receive ROI - if (receiveData(file_des, &arg.xmin, sizeof(int), INT32) < 0) - return printSocketReadError(); - if (receiveData(file_des, &arg.xmax, sizeof(int), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Set ROI: [%d, %d]\n", arg.xmin, arg.xmax)); + // receive ROI + if (receiveData(file_des, &arg.xmin, sizeof(int), INT32) < 0) + return printSocketReadError(); + if (receiveData(file_des, &arg.xmax, sizeof(int), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Set ROI: [%d, %d]\n", arg.xmin, arg.xmax)); #ifndef GOTTHARDD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = setROI(arg); - if (ret == FAIL) { - sprintf(mess, "Could not set ROI. Invalid xmin or xmax\n"); - LOG(logERROR,(mess)); - } - // old firmware requires a redo configure mac - else { - configure_mac(); - } - } + // only set + if (Server_VerifyLock() == OK) { + ret = setROI(arg); + if (ret == FAIL) { + sprintf(mess, "Could not set ROI. Invalid xmin or xmax\n"); + LOG(logERROR, (mess)); + } + // old firmware requires a redo configure mac + else { + configure_mac(); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_roi(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - ROI retval; + ret = OK; + memset(mess, 0, sizeof(mess)); + ROI retval; #ifndef GOTTHARDD - functionNotImplemented(); + functionNotImplemented(); #else - // only get - retval = getROI(); - LOG(logDEBUG1, ("nRois: (%d, %d)\n", retval.xmin, retval.xmax)); + // only get + retval = getROI(); + LOG(logDEBUG1, ("nRois: (%d, %d)\n", retval.xmin, retval.xmax)); #endif - Server_SendResult(file_des, INT32, NULL, 0); - if (ret != FAIL) { - sendData(file_des, &retval.xmin, sizeof(int), INT32); - sendData(file_des, &retval.xmax, sizeof(int), INT32); - } - return ret; + Server_SendResult(file_des, INT32, NULL, 0); + if (ret != FAIL) { + sendData(file_des, &retval.xmin, sizeof(int), INT32); + sendData(file_des, &retval.xmax, sizeof(int), INT32); + } + return ret; } int exit_server(int file_des) { - LOG(logINFORED, ("Closing Server\n")); - ret = OK; - memset(mess, 0, sizeof(mess)); - Server_SendResult(file_des, INT32, NULL, 0); - return GOODBYE; + LOG(logINFORED, ("Closing Server\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + Server_SendResult(file_des, INT32, NULL, 0); + return GOODBYE; } - - - int lock_server(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int lock = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int lock = 0; - if (receiveData(file_des, &lock, sizeof(lock), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Locking Server to %d\n", lock)); + if (receiveData(file_des, &lock, sizeof(lock), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Locking Server to %d\n", lock)); - // set - if (lock >= 0) { - if (!lockStatus || // if it was unlocked, anyone can lock - (lastClientIP == thisClientIP) || // if it was locked, need same ip - (lastClientIP == 0u)) { // if it was locked, must be by "none" - lockStatus = lock; - if (lock) { - char buf[INET_ADDRSTRLEN] = ""; - getIpAddressinString(buf, lastClientIP); - LOG(logINFO, ("Server lock to %s\n", buf)); - } else { - LOG(logINFO, ("Server unlocked\n")); - } - lastClientIP = thisClientIP; - } else { - Server_LockedError(); - } - } - int retval = lockStatus; - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + // set + if (lock >= 0) { + if (!lockStatus || // if it was unlocked, anyone can lock + (lastClientIP == thisClientIP) || // if it was locked, need same ip + (lastClientIP == 0u)) { // if it was locked, must be by "none" + lockStatus = lock; + if (lock) { + char buf[INET_ADDRSTRLEN] = ""; + getIpAddressinString(buf, lastClientIP); + LOG(logINFO, ("Server lock to %s\n", buf)); + } else { + LOG(logINFO, ("Server unlocked\n")); + } + lastClientIP = thisClientIP; + } else { + Server_LockedError(); + } + } + int retval = lockStatus; + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int get_last_client_ip(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t retval = lastClientIP; - retval = __builtin_bswap32(retval); - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t retval = lastClientIP; + retval = __builtin_bswap32(retval); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_port(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int p_number = -1; - uint32_t oldLastClientIP = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int p_number = -1; + uint32_t oldLastClientIP = 0; - if (receiveData(file_des, &p_number, sizeof(p_number), INT32) < 0) - return printSocketReadError(); + if (receiveData(file_des, &p_number, sizeof(p_number), INT32) < 0) + return printSocketReadError(); - // set only - int sd = -1; - if ((Server_VerifyLock() == OK)) { - // port number too low - if (p_number < 1024) { - ret = FAIL; - sprintf(mess,"%s port Number (%d) too low\n", - (isControlServer ? "control":"stop"), p_number); - LOG(logERROR,(mess)); - } else { - LOG(logINFO, ("Setting %s port to %d\n", - (isControlServer ? "control":"stop"), p_number)); - oldLastClientIP = lastClientIP; - sd = bindSocket(p_number); - } - } + // set only + int sd = -1; + if ((Server_VerifyLock() == OK)) { + // port number too low + if (p_number < 1024) { + ret = FAIL; + sprintf(mess, "%s port Number (%d) too low\n", + (isControlServer ? "control" : "stop"), p_number); + LOG(logERROR, (mess)); + } else { + LOG(logINFO, ("Setting %s port to %d\n", + (isControlServer ? "control" : "stop"), p_number)); + oldLastClientIP = lastClientIP; + sd = bindSocket(p_number); + } + } - Server_SendResult(file_des, INT32, &p_number, sizeof(p_number)); - // delete old socket - if (ret != FAIL) { - closeConnection(file_des); - exitServer(sockfd); - sockfd = sd; - lastClientIP = oldLastClientIP; - } - return ret; + Server_SendResult(file_des, INT32, &p_number, sizeof(p_number)); + // delete old socket + if (ret != FAIL) { + closeConnection(file_des); + exitServer(sockfd); + sockfd = sd; + lastClientIP = oldLastClientIP; + } + return ret; } - int enable_ten_giga(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFOBLUE, ("Setting 10GbE: %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFOBLUE, ("Setting 10GbE: %d\n", arg)); -#if defined(JUNGFRAUD) || defined(GOTTHARDD) || defined(MYTHEN3D) || defined(GOTTHARD2D) - functionNotImplemented(); +#if defined(JUNGFRAUD) || defined(GOTTHARDD) || defined(MYTHEN3D) || \ + defined(GOTTHARD2D) + functionNotImplemented(); #else - // set & get - if ((arg == -1) || (Server_VerifyLock() == OK)) { - if (arg >= 0 && enableTenGigabitEthernet(-1) != arg) { - enableTenGigabitEthernet(arg); - uint64_t hardwaremac = getDetectorMAC(); - if (udpDetails.srcmac != hardwaremac) { - LOG(logINFOBLUE, ("Updating udp source mac\n")); - udpDetails.srcmac = hardwaremac; - } - uint32_t hardwareip = getDetectorIP(); - if (arg == 0 && udpDetails.srcip != hardwareip) { - LOG(logINFOBLUE, ("Updating udp source ip\n")); - udpDetails.srcip = hardwareip; - } - configure_mac(); - } - retval = enableTenGigabitEthernet(-1); - LOG(logDEBUG1, ("10GbE: %d\n", retval)); - validate(arg, retval, "enable/disable 10GbE", DEC); - } + // set & get + if ((arg == -1) || (Server_VerifyLock() == OK)) { + if (arg >= 0 && enableTenGigabitEthernet(-1) != arg) { + enableTenGigabitEthernet(arg); + uint64_t hardwaremac = getDetectorMAC(); + if (udpDetails.srcmac != hardwaremac) { + LOG(logINFOBLUE, ("Updating udp source mac\n")); + udpDetails.srcmac = hardwaremac; + } + uint32_t hardwareip = getDetectorIP(); + if (arg == 0 && udpDetails.srcip != hardwareip) { + LOG(logINFOBLUE, ("Updating udp source ip\n")); + udpDetails.srcip = hardwareip; + } + configure_mac(); + } + retval = enableTenGigabitEthernet(-1); + LOG(logDEBUG1, ("10GbE: %d\n", retval)); + validate(arg, retval, "enable/disable 10GbE", DEC); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_all_trimbits(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Set all trmbits to %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Set all trmbits to %d\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // set - if (arg >= 0 && Server_VerifyLock() == OK) { - if (arg > MAX_TRIMBITS_VALUE) { - ret = FAIL; - sprintf(mess, "Cannot set all trimbits. Range: 0 - %d\n", MAX_TRIMBITS_VALUE); - LOG(logERROR, (mess)); - } else { - ret = setAllTrimbits(arg); - //changes settings to undefined - setSettings(UNDEFINED); - LOG(logERROR, ("Settings has been changed to undefined (change all trimbits)\n")); - } - } - // get - retval = getAllTrimbits(); - LOG(logDEBUG1, ("All trimbits: %d\n", retval)); - validate(arg, retval, "set all trimbits", DEC); + // set + if (arg >= 0 && Server_VerifyLock() == OK) { + if (arg > MAX_TRIMBITS_VALUE) { + ret = FAIL; + sprintf(mess, "Cannot set all trimbits. Range: 0 - %d\n", + MAX_TRIMBITS_VALUE); + LOG(logERROR, (mess)); + } else { + ret = setAllTrimbits(arg); + // changes settings to undefined + setSettings(UNDEFINED); + LOG(logERROR, ("Settings has been changed to undefined (change all " + "trimbits)\n")); + } + } + // get + retval = getAllTrimbits(); + LOG(logDEBUG1, ("All trimbits: %d\n", retval)); + validate(arg, retval, "set all trimbits", DEC); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - int set_pattern_io_control(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); - uint64_t arg = -1; - uint64_t retval = -1; + uint64_t arg = -1; + uint64_t retval = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) functionNotImplemented(); #else - LOG(logDEBUG1, ("Setting Pattern IO Control to 0x%llx\n", (long long int)arg)); - if (((int64_t)arg == -1) || (Server_VerifyLock() == OK)) { - retval = writePatternIOControl(arg); - LOG(logDEBUG1, ("Pattern IO Control retval: 0x%llx\n", (long long int) retval)); - validate64(arg, retval, "Pattern IO Control", HEX); - } + LOG(logDEBUG1, + ("Setting Pattern IO Control to 0x%llx\n", (long long int)arg)); + if (((int64_t)arg == -1) || (Server_VerifyLock() == OK)) { + retval = writePatternIOControl(arg); + LOG(logDEBUG1, + ("Pattern IO Control retval: 0x%llx\n", (long long int)retval)); + validate64(arg, retval, "Pattern IO Control", HEX); + } #endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); -} - - - - - + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); +} int set_pattern_clock_control(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); - uint64_t arg = -1; - uint64_t retval = -1; + uint64_t arg = -1; + uint64_t retval = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) functionNotImplemented(); #else - LOG(logDEBUG1, ("Setting Pattern Clock Control to 0x%llx\n", (long long int)arg)); - if (((int64_t)arg == -1) || (Server_VerifyLock() == OK)) { - retval = writePatternClkControl(arg); - LOG(logDEBUG1, ("Pattern Clock Control retval: 0x%llx\n", (long long int) retval)); - validate64(arg, retval, "Pattern Clock Control", HEX); - } + LOG(logDEBUG1, + ("Setting Pattern Clock Control to 0x%llx\n", (long long int)arg)); + if (((int64_t)arg == -1) || (Server_VerifyLock() == OK)) { + retval = writePatternClkControl(arg); + LOG(logDEBUG1, + ("Pattern Clock Control retval: 0x%llx\n", (long long int)retval)); + validate64(arg, retval, "Pattern Clock Control", HEX); + } #endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } - - - - - int set_pattern_word(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); @@ -2969,29 +3225,30 @@ int set_pattern_word(int file_des) { #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(MYTHEN3D) functionNotImplemented(); #else - int addr = (int)args[0]; - uint64_t word = args[1]; - LOG(logDEBUG1, ("Setting Pattern Word (addr:0x%x, word:0x%llx\n", addr, (long long int)word)); - if (Server_VerifyLock() == OK) { - // valid address - if (addr < 0 || addr >= MAX_PATTERN_LENGTH) { - ret = FAIL; - sprintf(mess, "Cannot set Pattern (Word, addr:0x%x). Addr must be between 0 and 0x%x\n", - addr, MAX_PATTERN_LENGTH); - LOG(logERROR, (mess)); + int addr = (int)args[0]; + uint64_t word = args[1]; + LOG(logDEBUG1, ("Setting Pattern Word (addr:0x%x, word:0x%llx\n", addr, + (long long int)word)); + if (Server_VerifyLock() == OK) { + // valid address + if (addr < 0 || addr >= MAX_PATTERN_LENGTH) { + ret = FAIL; + sprintf(mess, + "Cannot set Pattern (Word, addr:0x%x). Addr must be " + "between 0 and 0x%x\n", + addr, MAX_PATTERN_LENGTH); + LOG(logERROR, (mess)); } else { - retval = writePatternWord(addr, word); - LOG(logDEBUG1, ("Pattern Word retval: 0x%llx\n", (long long int) retval)); - // no validation (cannot read as it will execute the pattern) - } - } + retval = writePatternWord(addr, word); + LOG(logDEBUG1, + ("Pattern Word retval: 0x%llx\n", (long long int)retval)); + // no validation (cannot read as it will execute the pattern) + } + } #endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } - - - int set_pattern_loop_addresses(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); @@ -3004,38 +3261,48 @@ int set_pattern_loop_addresses(int file_des) { functionNotImplemented(); #else int loopLevel = args[0]; - int startAddr = args[1]; - int stopAddr = args[2]; - LOG(logDEBUG1, ("Setting Pattern loop addresses(loopLevel:%d startAddr:0x%x stopAddr:0x%x)\n", loopLevel, startAddr, stopAddr)); - if ((startAddr == -1) || (stopAddr == -1) || (Server_VerifyLock() == OK)) { - // valid loop level - if (loopLevel < -1 || loopLevel > 2) { // loop level of -1 : complete pattern - ret = FAIL; - sprintf(mess, "Cannot set Pattern loop addresses. Level %d should be between -1 and 2\n",loopLevel); - LOG(logERROR, (mess)); - } - // valid addr for loop level 0-2 - else if (startAddr >= MAX_PATTERN_LENGTH || stopAddr >= MAX_PATTERN_LENGTH ) { + int startAddr = args[1]; + int stopAddr = args[2]; + LOG(logDEBUG1, ("Setting Pattern loop addresses(loopLevel:%d " + "startAddr:0x%x stopAddr:0x%x)\n", + loopLevel, startAddr, stopAddr)); + if ((startAddr == -1) || (stopAddr == -1) || (Server_VerifyLock() == OK)) { + // valid loop level + if (loopLevel < -1 || + loopLevel > 2) { // loop level of -1 : complete pattern ret = FAIL; - sprintf(mess, "Cannot set Pattern loop addresses. Address (start addr:0x%x and stop addr:0x%x) " - "should be less than 0x%x\n", startAddr, stopAddr, MAX_PATTERN_LENGTH); - LOG(logERROR, (mess)); + sprintf(mess, + "Cannot set Pattern loop addresses. Level %d should be " + "between -1 and 2\n", + loopLevel); + LOG(logERROR, (mess)); + } + // valid addr for loop level 0-2 + else if (startAddr >= MAX_PATTERN_LENGTH || + stopAddr >= MAX_PATTERN_LENGTH) { + ret = FAIL; + sprintf(mess, + "Cannot set Pattern loop addresses. Address (start " + "addr:0x%x and stop addr:0x%x) " + "should be less than 0x%x\n", + startAddr, stopAddr, MAX_PATTERN_LENGTH); + LOG(logERROR, (mess)); } else { - int numLoops = -1; - setPatternLoop(loopLevel, &startAddr, &stopAddr, &numLoops); - LOG(logDEBUG1, ("Pattern loop addresses retval: (start:0x%x, stop:0x%x)\n", startAddr, stopAddr)); - retvals[0] = startAddr; - retvals[1] = stopAddr; - validate(args[1], startAddr, "Pattern loops' start address", HEX); - validate(args[2], stopAddr, "Pattern loops' stop address", HEX); - } - } + int numLoops = -1; + setPatternLoop(loopLevel, &startAddr, &stopAddr, &numLoops); + LOG(logDEBUG1, + ("Pattern loop addresses retval: (start:0x%x, stop:0x%x)\n", + startAddr, stopAddr)); + retvals[0] = startAddr; + retvals[1] = stopAddr; + validate(args[1], startAddr, "Pattern loops' start address", HEX); + validate(args[2], stopAddr, "Pattern loops' stop address", HEX); + } + } #endif - return Server_SendResult(file_des, INT32, retvals, sizeof(retvals)); + return Server_SendResult(file_des, INT32, retvals, sizeof(retvals)); } - - int set_pattern_loop_cycles(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); @@ -3048,36 +3315,36 @@ int set_pattern_loop_cycles(int file_des) { functionNotImplemented(); #else int loopLevel = args[0]; - int numLoops = args[1]; - LOG(logDEBUG1, ("Setting Pattern loop cycles (loopLevel:%d numLoops:%d)\n", loopLevel, numLoops)); - if ((numLoops == -1) || (Server_VerifyLock() == OK)) { - // valid loop level - if (loopLevel < 0 || loopLevel > 2) { - ret = FAIL; - sprintf(mess, "Cannot set Pattern loop cycles. Level %d should be between 0 and 2\n",loopLevel); - LOG(logERROR, (mess)); + int numLoops = args[1]; + LOG(logDEBUG1, ("Setting Pattern loop cycles (loopLevel:%d numLoops:%d)\n", + loopLevel, numLoops)); + if ((numLoops == -1) || (Server_VerifyLock() == OK)) { + // valid loop level + if (loopLevel < 0 || loopLevel > 2) { + ret = FAIL; + sprintf(mess, + "Cannot set Pattern loop cycles. Level %d should be " + "between 0 and 2\n", + loopLevel); + LOG(logERROR, (mess)); } else { - int startAddr = -1; - int stopAddr = -1; - setPatternLoop(loopLevel, &startAddr, &stopAddr, &numLoops); - retval = numLoops; - LOG(logDEBUG1, ("Pattern loop cycles retval: (ncycles:%d)\n", retval)); - validate(args[1], retval, "Pattern loops' number of cycles", DEC); - } - } + int startAddr = -1; + int stopAddr = -1; + setPatternLoop(loopLevel, &startAddr, &stopAddr, &numLoops); + retval = numLoops; + LOG(logDEBUG1, + ("Pattern loop cycles retval: (ncycles:%d)\n", retval)); + validate(args[1], retval, "Pattern loops' number of cycles", DEC); + } + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - - int set_pattern_wait_addr(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); - int args[2] = { -1, -1}; + int args[2] = {-1, -1}; int retval = -1; if (receiveData(file_des, args, sizeof(args), INT32) < 0) @@ -3086,40 +3353,41 @@ int set_pattern_wait_addr(int file_des) { functionNotImplemented(); #else int loopLevel = args[0]; - int addr = args[1]; - LOG(logDEBUG1, ("Setting Pattern wait address (loopLevel:%d addr:0x%x)\n", loopLevel, addr)); - if ((addr == -1) || (Server_VerifyLock() == OK)) { - // valid loop level 0-2 - if (loopLevel < 0 || loopLevel > 2) { - ret = FAIL; - sprintf(mess, "Cannot set Pattern wait address. Level %d should be between 0 and 2\n",loopLevel); - LOG(logERROR, (mess)); - } - // valid addr - else if (addr >= MAX_PATTERN_LENGTH) { + int addr = args[1]; + LOG(logDEBUG1, ("Setting Pattern wait address (loopLevel:%d addr:0x%x)\n", + loopLevel, addr)); + if ((addr == -1) || (Server_VerifyLock() == OK)) { + // valid loop level 0-2 + if (loopLevel < 0 || loopLevel > 2) { ret = FAIL; - sprintf(mess, "Cannot set Pattern wait address. Address (0x%x) should be between 0 and 0x%x\n", addr, MAX_PATTERN_LENGTH); - LOG(logERROR, (mess)); + sprintf(mess, + "Cannot set Pattern wait address. Level %d should be " + "between 0 and 2\n", + loopLevel); + LOG(logERROR, (mess)); } - else { - retval = setPatternWaitAddress(loopLevel, addr); - LOG(logDEBUG1, ("Pattern wait address retval: 0x%x\n", retval)); - validate(addr, retval, "Pattern wait address", HEX); - } - } + // valid addr + else if (addr >= MAX_PATTERN_LENGTH) { + ret = FAIL; + sprintf(mess, + "Cannot set Pattern wait address. Address (0x%x) should be " + "between 0 and 0x%x\n", + addr, MAX_PATTERN_LENGTH); + LOG(logERROR, (mess)); + } else { + retval = setPatternWaitAddress(loopLevel, addr); + LOG(logDEBUG1, ("Pattern wait address retval: 0x%x\n", retval)); + validate(addr, retval, "Pattern wait address", HEX); + } + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - - int set_pattern_wait_time(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); - uint64_t args[2] = { -1, -1}; + uint64_t args[2] = {-1, -1}; uint64_t retval = -1; if (receiveData(file_des, args, sizeof(args), INT32) < 0) @@ -3128,906 +3396,866 @@ int set_pattern_wait_time(int file_des) { functionNotImplemented(); #else int loopLevel = (int)args[0]; - uint64_t timeval = args[1]; - LOG(logDEBUG1, ("Setting Pattern wait time (loopLevel:%d timeval:0x%llx)\n", loopLevel, (long long int)timeval)); - if (((int64_t)timeval == -1) || (Server_VerifyLock() == OK)) { - // valid loop level 0-2 - if (loopLevel < 0 || loopLevel > 2) { - ret = FAIL; - sprintf(mess, "Cannot set Pattern wait time. Level %d should be between 0 and 2\n",loopLevel); - LOG(logERROR, (mess)); - } - else { - retval = setPatternWaitTime(loopLevel, timeval); - LOG(logDEBUG1, ("Pattern wait time retval: 0x%llx\n", (long long int)retval)); - validate64(timeval, retval, "Pattern wait time", HEX); - } - } + uint64_t timeval = args[1]; + LOG(logDEBUG1, ("Setting Pattern wait time (loopLevel:%d timeval:0x%llx)\n", + loopLevel, (long long int)timeval)); + if (((int64_t)timeval == -1) || (Server_VerifyLock() == OK)) { + // valid loop level 0-2 + if (loopLevel < 0 || loopLevel > 2) { + ret = FAIL; + sprintf(mess, + "Cannot set Pattern wait time. Level %d should be between " + "0 and 2\n", + loopLevel); + LOG(logERROR, (mess)); + } else { + retval = setPatternWaitTime(loopLevel, timeval); + LOG(logDEBUG1, + ("Pattern wait time retval: 0x%llx\n", (long long int)retval)); + validate64(timeval, retval, "Pattern wait time", HEX); + } + } #endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } - - - int set_pattern_mask(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Set Pattern Mask to %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Set Pattern Mask to %d\n", arg)); #if !defined(MOENCHD) && !defined(CHIPTESTBOARDD) && !defined(MYTHEN3D) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - setPatternMask(arg); - uint64_t retval64 = getPatternMask(); - LOG(logDEBUG1, ("Pattern mask: 0x%llx\n", (long long unsigned int) retval64)); - validate64(arg, retval64, "Set Pattern Mask", HEX); - } + // only set + if (Server_VerifyLock() == OK) { + setPatternMask(arg); + uint64_t retval64 = getPatternMask(); + LOG(logDEBUG1, + ("Pattern mask: 0x%llx\n", (long long unsigned int)retval64)); + validate64(arg, retval64, "Set Pattern Mask", HEX); + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_pattern_mask(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t retval64 = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t retval64 = -1; - LOG(logDEBUG1, ("Get Pattern Mask\n")); + LOG(logDEBUG1, ("Get Pattern Mask\n")); #if !defined(MOENCHD) && !defined(CHIPTESTBOARDD) && !defined(MYTHEN3D) - functionNotImplemented(); + functionNotImplemented(); #else - // only get - retval64 = getPatternMask(); - LOG(logDEBUG1, ("Get Pattern mask: 0x%llx\n", (long long unsigned int) retval64)); + // only get + retval64 = getPatternMask(); + LOG(logDEBUG1, + ("Get Pattern mask: 0x%llx\n", (long long unsigned int)retval64)); #endif - return Server_SendResult(file_des, INT64, &retval64, sizeof(retval64)); + return Server_SendResult(file_des, INT64, &retval64, sizeof(retval64)); } int set_pattern_bit_mask(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Set Pattern Bit Mask to %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Set Pattern Bit Mask to %d\n", arg)); #if !defined(MOENCHD) && !defined(CHIPTESTBOARDD) && !defined(MYTHEN3D) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - setPatternBitMask(arg); - uint64_t retval64 = getPatternBitMask(); - LOG(logDEBUG1, ("Pattern bit mask: 0x%llx\n", (long long unsigned int) retval64)); - validate64(arg, retval64, "Set Pattern Bit Mask", HEX); - } + // only set + if (Server_VerifyLock() == OK) { + setPatternBitMask(arg); + uint64_t retval64 = getPatternBitMask(); + LOG(logDEBUG1, + ("Pattern bit mask: 0x%llx\n", (long long unsigned int)retval64)); + validate64(arg, retval64, "Set Pattern Bit Mask", HEX); + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } -int get_pattern_bit_mask(int file_des){ - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t retval64 = -1; +int get_pattern_bit_mask(int file_des) { + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t retval64 = -1; - LOG(logDEBUG1, ("Get Pattern Bit Mask\n")); + LOG(logDEBUG1, ("Get Pattern Bit Mask\n")); #if !defined(MOENCHD) && !defined(CHIPTESTBOARDD) && !defined(MYTHEN3D) - functionNotImplemented(); + functionNotImplemented(); #else - // only get - retval64 = getPatternBitMask(); - LOG(logDEBUG1, ("Get Pattern Bitmask: 0x%llx\n", (long long unsigned int) retval64)); + // only get + retval64 = getPatternBitMask(); + LOG(logDEBUG1, + ("Get Pattern Bitmask: 0x%llx\n", (long long unsigned int)retval64)); #endif - return Server_SendResult(file_des, INT64, &retval64, sizeof(retval64)); + return Server_SendResult(file_des, INT64, &retval64, sizeof(retval64)); } int write_adc_register(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t args[2] = {-1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t args[2] = {-1, -1}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - uint32_t addr = args[0]; - uint32_t val = args[1]; - LOG(logDEBUG1, ("Writing 0x%x to ADC Register 0x%x\n", val, addr)); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + uint32_t addr = args[0]; + uint32_t val = args[1]; + LOG(logDEBUG1, ("Writing 0x%x to ADC Register 0x%x\n", val, addr)); #if defined(EIGERD) || defined(GOTTHARD2D) || defined(MYTHEN3D) - functionNotImplemented(); + functionNotImplemented(); #else #ifndef VIRTUAL - // only set - if (Server_VerifyLock() == OK) { + // only set + if (Server_VerifyLock() == OK) { #if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) - AD9257_Set(addr, val); + AD9257_Set(addr, val); #elif GOTTHARDD - if (getBoardRevision() == 1) { - AD9252_Set(addr, val); - } else { - AD9257_Set(addr, val); - } + if (getBoardRevision() == 1) { + AD9252_Set(addr, val); + } else { + AD9257_Set(addr, val); + } #endif - } + } #endif #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - - - int set_counter_bit(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Set counter bit with value: %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Set counter bit with value: %d\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // set - if (arg >= 0 && Server_VerifyLock() == OK) { - setCounterBit(arg); - } - // get - retval = setCounterBit(-1); - LOG(logDEBUG1, ("Set counter bit retval: %d\n", retval)); - validate(arg, retval, "set counter bit", DEC); + // set + if (arg >= 0 && Server_VerifyLock() == OK) { + setCounterBit(arg); + } + // get + retval = setCounterBit(-1); + LOG(logDEBUG1, ("Set counter bit retval: %d\n", retval)); + validate(arg, retval, "set counter bit", DEC); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - int pulse_pixel(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[3] = {-1,-1,-1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[3] = {-1, -1, -1}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Pulse pixel, n: %d, x: %d, y: %d\n", args[0], args[1], args[2])); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, + ("Pulse pixel, n: %d, x: %d, y: %d\n", args[0], args[1], args[2])); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = pulsePixel(args[0], args[1], args[2]); - if (ret == FAIL) { - strcpy(mess, "Could not pulse pixel\n"); - LOG(logERROR,(mess)); - } - } + // only set + if (Server_VerifyLock() == OK) { + ret = pulsePixel(args[0], args[1], args[2]); + if (ret == FAIL) { + strcpy(mess, "Could not pulse pixel\n"); + LOG(logERROR, (mess)); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - - - int pulse_pixel_and_move(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[3] = {-1,-1,-1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[3] = {-1, -1, -1}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Pulse pixel and move, n: %d, x: %d, y: %d\n", - args[0], args[1], args[2])); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Pulse pixel and move, n: %d, x: %d, y: %d\n", args[0], + args[1], args[2])); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = pulsePixelNMove(args[0], args[1], args[2]); - if (ret == FAIL) { - strcpy(mess, "Could not pulse pixel and move\n"); - LOG(logERROR,(mess)); - } - } + // only set + if (Server_VerifyLock() == OK) { + ret = pulsePixelNMove(args[0], args[1], args[2]); + if (ret == FAIL) { + strcpy(mess, "Could not pulse pixel and move\n"); + LOG(logERROR, (mess)); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - - - - - int pulse_chip(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Pulse chip: %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Pulse chip: %d\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = pulseChip(arg); - if (ret == FAIL) { - strcpy(mess, "Could not pulse chip\n"); - LOG(logERROR,(mess)); - } - } + // only set + if (Server_VerifyLock() == OK) { + ret = pulseChip(arg); + if (ret == FAIL) { + strcpy(mess, "Could not pulse chip\n"); + LOG(logERROR, (mess)); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - - - - int set_rate_correct(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t tau_ns = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t tau_ns = -1; - if (receiveData(file_des, &tau_ns, sizeof(tau_ns), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Set rate correct with tau %lld\n", (long long int)tau_ns)); + if (receiveData(file_des, &tau_ns, sizeof(tau_ns), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Set rate correct with tau %lld\n", (long long int)tau_ns)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = validateAndSetRateCorrection(tau_ns, mess); - int64_t retval = getCurrentTau(); // to update eiger_tau_ns (for update rate correction) - if (ret == FAIL) { - strcpy(mess, "Rate correction failed\n"); - LOG(logERROR, (mess)); - } else { - validate64(tau_ns, retval, "set rate correction", DEC); - } - } + // only set + if (Server_VerifyLock() == OK) { + ret = validateAndSetRateCorrection(tau_ns, mess); + int64_t retval = getCurrentTau(); // to update eiger_tau_ns (for update + // rate correction) + if (ret == FAIL) { + strcpy(mess, "Rate correction failed\n"); + LOG(logERROR, (mess)); + } else { + validate64(tau_ns, retval, "set rate correction", DEC); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - - - - int get_rate_correct(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; - LOG(logDEBUG1, ("Getting rate correction\n")); + LOG(logDEBUG1, ("Getting rate correction\n")); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - retval = getCurrentTau(); - LOG(logDEBUG1, ("Tau: %lld\n", (long long int)retval)); + retval = getCurrentTau(); + LOG(logDEBUG1, ("Tau: %lld\n", (long long int)retval)); #endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } - - int set_ten_giga_flow_control(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting ten giga flow control: %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting ten giga flow control: %d\n", arg)); #if !defined(EIGERD) && !defined(JUNGFRAUD) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = setTenGigaFlowControl(arg); - if (ret == FAIL) { - strcpy(mess,"Could not set ten giga flow control.\n"); - LOG(logERROR,(mess)); - } else { - int retval = getTenGigaFlowControl(); - LOG(logDEBUG1, ("ten giga flow control retval: %d\n", retval)); - validate(arg, retval, "set ten giga flow control", DEC); - } - } + // only set + if (Server_VerifyLock() == OK) { + ret = setTenGigaFlowControl(arg); + if (ret == FAIL) { + strcpy(mess, "Could not set ten giga flow control.\n"); + LOG(logERROR, (mess)); + } else { + int retval = getTenGigaFlowControl(); + LOG(logDEBUG1, ("ten giga flow control retval: %d\n", retval)); + validate(arg, retval, "set ten giga flow control", DEC); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_ten_giga_flow_control(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting ten giga flow control\n")); + LOG(logDEBUG1, ("Getting ten giga flow control\n")); #if !defined(EIGERD) && !defined(JUNGFRAUD) - functionNotImplemented(); -#else - // get only - retval = getTenGigaFlowControl(); - LOG(logDEBUG1, ("ten giga flow control retval: %d\n", retval)); - if (retval == -1) { - strcpy(mess,"Could not get ten giga flow control.\n"); - LOG(logERROR,(mess)); - } + functionNotImplemented(); +#else + // get only + retval = getTenGigaFlowControl(); + LOG(logDEBUG1, ("ten giga flow control retval: %d\n", retval)); + if (retval == -1) { + strcpy(mess, "Could not get ten giga flow control.\n"); + LOG(logERROR, (mess)); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - int set_transmission_delay_frame(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting transmission delay frame: %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting transmission delay frame: %d\n", arg)); #if !defined(EIGERD) && !defined(JUNGFRAUD) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { + // only set + if (Server_VerifyLock() == OK) { #ifdef JUNGFRAUD - if (arg > MAX_TIMESLOT_VAL) { - ret = FAIL; - sprintf(mess,"Transmission delay %d should be in range: 0 - %d\n", - arg, MAX_TIMESLOT_VAL); - LOG(logERROR, (mess)); - } -#endif - if (ret == OK) { - ret = setTransmissionDelayFrame(arg); - if (ret == FAIL) { - strcpy(mess,"Could not set transmission delay frame.\n"); - LOG(logERROR,(mess)); - } else { - int retval = getTransmissionDelayFrame(); - LOG(logDEBUG1, ("transmission delay frame retval: %d\n", retval)); - validate(arg, retval, "set transmission delay frame", DEC); - } - } - } + if (arg > MAX_TIMESLOT_VAL) { + ret = FAIL; + sprintf(mess, "Transmission delay %d should be in range: 0 - %d\n", + arg, MAX_TIMESLOT_VAL); + LOG(logERROR, (mess)); + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + if (ret == OK) { + ret = setTransmissionDelayFrame(arg); + if (ret == FAIL) { + strcpy(mess, "Could not set transmission delay frame.\n"); + LOG(logERROR, (mess)); + } else { + int retval = getTransmissionDelayFrame(); + LOG(logDEBUG1, + ("transmission delay frame retval: %d\n", retval)); + validate(arg, retval, "set transmission delay frame", DEC); + } + } + } +#endif + return Server_SendResult(file_des, INT32, NULL, 0); } int get_transmission_delay_frame(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting transmission delay frame\n")); + LOG(logDEBUG1, ("Getting transmission delay frame\n")); #if !defined(EIGERD) && !defined(JUNGFRAUD) - functionNotImplemented(); -#else - // get only - retval = getTransmissionDelayFrame(); - LOG(logDEBUG1, ("transmission delay frame retval: %d\n", retval)); - if (retval == -1) { - strcpy(mess,"Could not get transmission delay frame.\n"); - LOG(logERROR,(mess)); - } + functionNotImplemented(); +#else + // get only + retval = getTransmissionDelayFrame(); + LOG(logDEBUG1, ("transmission delay frame retval: %d\n", retval)); + if (retval == -1) { + strcpy(mess, "Could not get transmission delay frame.\n"); + LOG(logERROR, (mess)); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_transmission_delay_left(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting transmission delay left: %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting transmission delay left: %d\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = setTransmissionDelayLeft(arg); - if (ret == FAIL) { - strcpy(mess,"Could not set transmission delay left.\n"); - LOG(logERROR,(mess)); - } else { - int retval = getTransmissionDelayLeft(); - LOG(logDEBUG1, ("transmission delay left retval: %d\n", retval)); - validate(arg, retval, "set transmission delay left", DEC); - } - } + // only set + if (Server_VerifyLock() == OK) { + ret = setTransmissionDelayLeft(arg); + if (ret == FAIL) { + strcpy(mess, "Could not set transmission delay left.\n"); + LOG(logERROR, (mess)); + } else { + int retval = getTransmissionDelayLeft(); + LOG(logDEBUG1, ("transmission delay left retval: %d\n", retval)); + validate(arg, retval, "set transmission delay left", DEC); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_transmission_delay_left(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting transmission delay left\n")); + LOG(logDEBUG1, ("Getting transmission delay left\n")); #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getTransmissionDelayLeft(); - LOG(logDEBUG1, ("transmission delay left: %d\n", retval)); - if (retval == -1) { - strcpy(mess,"Could not get transmission delay left.\n"); - LOG(logERROR,(mess)); - } + functionNotImplemented(); +#else + // get only + retval = getTransmissionDelayLeft(); + LOG(logDEBUG1, ("transmission delay left: %d\n", retval)); + if (retval == -1) { + strcpy(mess, "Could not get transmission delay left.\n"); + LOG(logERROR, (mess)); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_transmission_delay_right(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting transmission delay right: %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting transmission delay right: %d\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = setTransmissionDelayRight(arg); - if (ret == FAIL) { - strcpy(mess,"Could not set transmission delay right.\n"); - LOG(logERROR,(mess)); - } else { - int retval = getTransmissionDelayRight(); - LOG(logDEBUG1, ("transmission delay right retval: %d\n", retval)); - validate(arg, retval, "set transmission delay right", DEC); - } - } + // only set + if (Server_VerifyLock() == OK) { + ret = setTransmissionDelayRight(arg); + if (ret == FAIL) { + strcpy(mess, "Could not set transmission delay right.\n"); + LOG(logERROR, (mess)); + } else { + int retval = getTransmissionDelayRight(); + LOG(logDEBUG1, ("transmission delay right retval: %d\n", retval)); + validate(arg, retval, "set transmission delay right", DEC); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_transmission_delay_right(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting transmission delay right\n")); + LOG(logDEBUG1, ("Getting transmission delay right\n")); #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getTransmissionDelayRight(); - LOG(logDEBUG1, ("transmission delay right retval: %d\n", retval)); - if (retval == -1) { - strcpy(mess,"Could not get transmission delay right.\n"); - LOG(logERROR,(mess)); - } + functionNotImplemented(); +#else + // get only + retval = getTransmissionDelayRight(); + LOG(logDEBUG1, ("transmission delay right retval: %d\n", retval)); + if (retval == -1) { + strcpy(mess, "Could not get transmission delay right.\n"); + LOG(logERROR, (mess)); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - int program_fpga(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); #if defined(EIGERD) || defined(GOTTHARDD) - //to receive any arguments - int n = 1; - while (n > 0) - n = receiveData(file_des,mess,MAX_STR_LENGTH,OTHER); - functionNotImplemented(); + // to receive any arguments + int n = 1; + while (n > 0) + n = receiveData(file_des, mess, MAX_STR_LENGTH, OTHER); + functionNotImplemented(); #else #ifndef VIRTUAL - // only set - if (Server_VerifyLock() == OK) { + // only set + if (Server_VerifyLock() == OK) { - LOG(logINFOBLUE, ("Programming FPGA...\n")); + LOG(logINFOBLUE, ("Programming FPGA...\n")); #if defined(MYTHEN3D) || defined(GOTTHARD2D) - uint64_t filesize = 0; - // filesize - if (receiveData(file_des,&filesize,sizeof(filesize),INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Total program size is: %llx\n", (long long unsigned int)filesize)); - if (filesize > NIOS_MAX_APP_IMAGE_SIZE) { - ret = FAIL; - sprintf(mess,"Could not start programming FPGA. File size 0x%llx exceeds max size 0x%llx. Forgot Compression?\n", (long long unsigned int) filesize, (long long unsigned int)NIOS_MAX_APP_IMAGE_SIZE); - LOG(logERROR,(mess)); - } - Server_SendResult(file_des, INT32, NULL, 0); - - // receive program - if (ret == OK) { - char* fpgasrc = (char*)malloc(filesize); - if (receiveData(file_des, fpgasrc, filesize, OTHER) < 0) - return printSocketReadError(); + uint64_t filesize = 0; + // filesize + if (receiveData(file_des, &filesize, sizeof(filesize), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Total program size is: %llx\n", + (long long unsigned int)filesize)); + if (filesize > NIOS_MAX_APP_IMAGE_SIZE) { + ret = FAIL; + sprintf(mess, + "Could not start programming FPGA. File size 0x%llx " + "exceeds max size 0x%llx. Forgot Compression?\n", + (long long unsigned int)filesize, + (long long unsigned int)NIOS_MAX_APP_IMAGE_SIZE); + LOG(logERROR, (mess)); + } + Server_SendResult(file_des, INT32, NULL, 0); - ret = eraseAndWriteToFlash(mess, fpgasrc, filesize); - Server_SendResult(file_des, INT32, NULL, 0); + // receive program + if (ret == OK) { + char *fpgasrc = (char *)malloc(filesize); + if (receiveData(file_des, fpgasrc, filesize, OTHER) < 0) + return printSocketReadError(); - //free resources - if (fpgasrc != NULL) - free(fpgasrc); - } + ret = eraseAndWriteToFlash(mess, fpgasrc, filesize); + Server_SendResult(file_des, INT32, NULL, 0); + // free resources + if (fpgasrc != NULL) + free(fpgasrc); + } #else // jungfrau, ctb, moench - uint64_t filesize = 0; - uint64_t totalsize = 0; - uint64_t unitprogramsize = 0; - char* fpgasrc = NULL; - FILE* fp = NULL; + uint64_t filesize = 0; + uint64_t totalsize = 0; + uint64_t unitprogramsize = 0; + char *fpgasrc = NULL; + FILE *fp = NULL; - // filesize - if (receiveData(file_des,&filesize,sizeof(filesize),INT32) < 0) - return printSocketReadError(); - totalsize = filesize; - LOG(logDEBUG1, ("Total program size is: %lld\n", (long long unsigned int)totalsize)); + // filesize + if (receiveData(file_des, &filesize, sizeof(filesize), INT32) < 0) + return printSocketReadError(); + totalsize = filesize; + LOG(logDEBUG1, ("Total program size is: %lld\n", + (long long unsigned int)totalsize)); + // opening file pointer to flash and telling FPGA to not touch flash + if (startWritingFPGAprogram(&fp) != OK) { + ret = FAIL; + sprintf(mess, "Could not write to flash. Error at startup.\n"); + LOG(logERROR, (mess)); + } + Server_SendResult(file_des, INT32, NULL, 0); - // opening file pointer to flash and telling FPGA to not touch flash - if (startWritingFPGAprogram(&fp) != OK) { - ret = FAIL; - sprintf(mess,"Could not write to flash. Error at startup.\n"); - LOG(logERROR,(mess)); - } - Server_SendResult(file_des, INT32, NULL, 0); + // erasing flash + if (ret != FAIL) { + eraseFlash(); + fpgasrc = (char *)malloc(MAX_FPGAPROGRAMSIZE); + } + // writing to flash part by part + while (ret != FAIL && filesize) { - //erasing flash - if (ret != FAIL) { - eraseFlash(); - fpgasrc = (char*)malloc(MAX_FPGAPROGRAMSIZE); - } + unitprogramsize = MAX_FPGAPROGRAMSIZE; // 2mb + if (unitprogramsize > filesize) // less than 2mb + unitprogramsize = filesize; + LOG(logDEBUG1, ("unit size to receive is:%lld\nfilesize:%lld\n", + (long long unsigned int)unitprogramsize, + (long long unsigned int)filesize)); + // receive part of program + if (receiveData(file_des, fpgasrc, unitprogramsize, OTHER) < 0) + return printSocketReadError(); - //writing to flash part by part - while(ret != FAIL && filesize) { + if (!(unitprogramsize - filesize)) { + fpgasrc[unitprogramsize] = '\0'; + filesize -= unitprogramsize; + unitprogramsize++; + } else + filesize -= unitprogramsize; - unitprogramsize = MAX_FPGAPROGRAMSIZE; //2mb - if (unitprogramsize > filesize) //less than 2mb - unitprogramsize = filesize; - LOG(logDEBUG1, ("unit size to receive is:%lld\nfilesize:%lld\n", (long long unsigned int)unitprogramsize, (long long unsigned int)filesize)); + // write part to flash + ret = writeFPGAProgram(fpgasrc, unitprogramsize, fp); + Server_SendResult(file_des, INT32, NULL, 0); + if (ret == FAIL) { + LOG(logERROR, ("Failure: Breaking out of program receiving\n")); + } else { + // print progress + LOG(logINFO, + ("Writing to Flash:%d%%\r", + (int)(((double)(totalsize - filesize) / totalsize) * + 100))); + fflush(stdout); + } + } + if (ret == OK) { + LOG(logINFO, ("Done copying program\n")); + } - //receive part of program - if (receiveData(file_des,fpgasrc,unitprogramsize,OTHER) < 0) - return printSocketReadError(); + // closing file pointer to flash and informing FPGA + stopWritingFPGAprogram(fp); - if (!(unitprogramsize - filesize)) { - fpgasrc[unitprogramsize] = '\0'; - filesize -= unitprogramsize; - unitprogramsize++; - } else - filesize -= unitprogramsize; - - // write part to flash - ret = writeFPGAProgram(fpgasrc, unitprogramsize, fp); - Server_SendResult(file_des, INT32, NULL, 0); - if (ret == FAIL) { - LOG(logERROR, ("Failure: Breaking out of program receiving\n")); - } else { - //print progress - LOG(logINFO, ("Writing to Flash:%d%%\r", - (int) (((double)(totalsize-filesize)/totalsize)*100) )); - fflush(stdout); - } - } - if (ret == OK) { - LOG(logINFO, ("Done copying program\n")); - } - - // closing file pointer to flash and informing FPGA - stopWritingFPGAprogram(fp); - - //free resources - if (fpgasrc != NULL) - free(fpgasrc); - if (fp != NULL) - fclose(fp); + // free resources + if (fpgasrc != NULL) + free(fpgasrc); + if (fp != NULL) + fclose(fp); #endif // end of Blackfin programming - if (ret == FAIL) { - LOG(logERROR, ("Program FPGA FAIL!\n")); - } else { - LOG(logINFOGREEN, ("Programming FPGA completed successfully\n")); - } - } + if (ret == FAIL) { + LOG(logERROR, ("Program FPGA FAIL!\n")); + } else { + LOG(logINFOGREEN, ("Programming FPGA completed successfully\n")); + } + } #endif #endif - return ret; + return ret; } - - - - int reset_fpga(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); - LOG(logDEBUG1, ("Reset FPGA\n")); -#if defined(EIGERD) || defined(GOTTHARDD) || defined(GOTTHARD2D) || defined(MYTHEN3D) - functionNotImplemented(); + LOG(logDEBUG1, ("Reset FPGA\n")); +#if defined(EIGERD) || defined(GOTTHARDD) || defined(GOTTHARD2D) || \ + defined(MYTHEN3D) + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (isControlServer) { - basictests(); // mapping of control server at least - initControlServer(); - } - else initStopServer(); //remapping of stop server - } + // only set + if (Server_VerifyLock() == OK) { + if (isControlServer) { + basictests(); // mapping of control server at least + initControlServer(); + } else + initStopServer(); // remapping of stop server + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - - int power_chip(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Powering chip to %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Powering chip to %d\n", arg)); -#if !defined(JUNGFRAUD) && !defined(MOENCHD) && !defined(MYTHEN3D) && !defined(GOTTHARD2D) - functionNotImplemented(); +#if !defined(JUNGFRAUD) && !defined(MOENCHD) && !defined(MYTHEN3D) && \ + !defined(GOTTHARD2D) + functionNotImplemented(); #else - // set & get - if ((arg == -1) || (Server_VerifyLock() == OK)) { + // set & get + if ((arg == -1) || (Server_VerifyLock() == OK)) { #if defined(MYTHEN3D) || defined(GOTTHARD2D) - // check only when powering on - if (arg != -1 && arg != 0) { - if (checkModuleFlag) { - int type_ret = checkDetectorType(); - if (type_ret == -1) { - ret = FAIL; - sprintf(mess, "Could not power on chip. Could not open file to get type of module attached.\n"); - LOG(logERROR,(mess)); - } else if (type_ret == -2) { - ret = FAIL; - sprintf(mess, "Could not power on chip. No module attached!\n"); - LOG(logERROR,(mess)); - } else if (type_ret == FAIL) { - ret = FAIL; - sprintf(mess, "Could not power on chip. Wrong module attached!\n"); - LOG(logERROR,(mess)); - } - } else { - LOG(logINFOBLUE, ("In No-Module mode: Ignoring module type. Continuing.\n")); - } - } + // check only when powering on + if (arg != -1 && arg != 0) { + if (checkModuleFlag) { + int type_ret = checkDetectorType(); + if (type_ret == -1) { + ret = FAIL; + sprintf(mess, "Could not power on chip. Could not open " + "file to get type of module attached.\n"); + LOG(logERROR, (mess)); + } else if (type_ret == -2) { + ret = FAIL; + sprintf(mess, + "Could not power on chip. No module attached!\n"); + LOG(logERROR, (mess)); + } else if (type_ret == FAIL) { + ret = FAIL; + sprintf( + mess, + "Could not power on chip. Wrong module attached!\n"); + LOG(logERROR, (mess)); + } + } else { + LOG(logINFOBLUE, + ("In No-Module mode: Ignoring module type. Continuing.\n")); + } + } #endif - if (ret == OK) { - retval = powerChip(arg); - LOG(logDEBUG1, ("Power chip: %d\n", retval)); - } - validate(arg, retval, "power on/off chip", DEC); + if (ret == OK) { + retval = powerChip(arg); + LOG(logDEBUG1, ("Power chip: %d\n", retval)); + } + validate(arg, retval, "power on/off chip", DEC); #ifdef JUNGFRAUD - // narrow down error when powering on - if (ret == FAIL && arg > 0) { - if (setTemperatureEvent(-1) == 1) - sprintf(mess,"Powering chip failed due to over-temperature event. " - "Clear event & power chip again. Set %d, read %d \n", arg, retval); - LOG(logERROR, (mess)); - } + // narrow down error when powering on + if (ret == FAIL && arg > 0) { + if (setTemperatureEvent(-1) == 1) + sprintf(mess, + "Powering chip failed due to over-temperature event. " + "Clear event & power chip again. Set %d, read %d \n", + arg, retval); + LOG(logERROR, (mess)); + } #endif - } + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_activate(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting activate mode to %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting activate mode to %d\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // set & get - if ((arg == -1) || (Server_VerifyLock() == OK)) { - retval = activate(arg); - LOG(logDEBUG1, ("Activate: %d\n", retval)); - validate(arg, retval, "set activate", DEC); - } + // set & get + if ((arg == -1) || (Server_VerifyLock() == OK)) { + retval = activate(arg); + LOG(logDEBUG1, ("Activate: %d\n", retval)); + validate(arg, retval, "set activate", DEC); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int prepare_acquisition(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); - LOG(logDEBUG1, ("Preparing Acquisition\n")); + LOG(logDEBUG1, ("Preparing Acquisition\n")); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = prepareAcquisition(); - if (ret == FAIL) { - strcpy(mess, "Could not prepare acquisition\n"); - LOG(logERROR, (mess)); - } - } + // only set + if (Server_VerifyLock() == OK) { + ret = prepareAcquisition(); + if (ret == FAIL) { + strcpy(mess, "Could not prepare acquisition\n"); + LOG(logERROR, (mess)); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - - - // stop server int threshold_temp(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting threshold temperature to %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting threshold temperature to %d\n", arg)); #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // set & get - if ((arg == -1) || (Server_VerifyLock() == OK)) { - if (arg > MAX_THRESHOLD_TEMP_VAL) { - ret = FAIL; - sprintf(mess,"Threshold Temp %d should be in range: 0 - %d\n", - arg, MAX_THRESHOLD_TEMP_VAL); - LOG(logERROR, (mess)); - } - // valid temp - else { - retval = setThresholdTemperature(arg); - LOG(logDEBUG1, ("Threshold temperature: %d\n", retval)); - validate(arg, retval, "set threshold temperature", DEC); - } - } + // set & get + if ((arg == -1) || (Server_VerifyLock() == OK)) { + if (arg > MAX_THRESHOLD_TEMP_VAL) { + ret = FAIL; + sprintf(mess, "Threshold Temp %d should be in range: 0 - %d\n", arg, + MAX_THRESHOLD_TEMP_VAL); + LOG(logERROR, (mess)); + } + // valid temp + else { + retval = setThresholdTemperature(arg); + LOG(logDEBUG1, ("Threshold temperature: %d\n", retval)); + validate(arg, retval, "set threshold temperature", DEC); + } + } #endif return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - // stop server int temp_control(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting temperature control to %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting temperature control to %d\n", arg)); #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // set & get - if ((arg == -1) || (Server_VerifyLock() == OK)) { - retval = setTemperatureControl(arg); - LOG(logDEBUG1, ("Temperature control: %d\n", retval)); - validate(arg, retval, "set temperature control", DEC); - } -#endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); -} - - - -// stop server -int temp_event(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; - - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting temperature event to %d\n", arg)); - -#ifndef JUNGFRAUD - functionNotImplemented(); -#else - // set & get - if ((arg == -1) || (Server_VerifyLock() == OK)) { - retval = setTemperatureEvent(arg); - LOG(logDEBUG1, ("Temperature event: %d\n", retval)); - validate(arg, retval, "set temperature event", DEC); - } + // set & get + if ((arg == -1) || (Server_VerifyLock() == OK)) { + retval = setTemperatureControl(arg); + LOG(logDEBUG1, ("Temperature control: %d\n", retval)); + validate(arg, retval, "set temperature control", DEC); + } #endif return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } +// stop server +int temp_event(int file_des) { + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; - - - -int auto_comp_disable(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; - - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting Auto comp disable to %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting temperature event to %d\n", arg)); #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // set & get - if ((arg == -1) || (Server_VerifyLock() == OK)) { - retval = autoCompDisable(arg); - LOG(logDEBUG1, ("Auto comp disable: %d\n", retval)); - validate(arg, retval, "set auto comp disable", DEC); - } + // set & get + if ((arg == -1) || (Server_VerifyLock() == OK)) { + retval = setTemperatureEvent(arg); + LOG(logDEBUG1, ("Temperature event: %d\n", retval)); + validate(arg, retval, "set temperature event", DEC); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } +int auto_comp_disable(int file_des) { + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting Auto comp disable to %d\n", arg)); - +#ifndef JUNGFRAUD + functionNotImplemented(); +#else + // set & get + if ((arg == -1) || (Server_VerifyLock() == OK)) { + retval = autoCompDisable(arg); + LOG(logDEBUG1, ("Auto comp disable: %d\n", retval)); + validate(arg, retval, "set auto comp disable", DEC); + } +#endif + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); +} int storage_cell_start(int file_des) { ret = OK; @@ -4046,7 +4274,7 @@ int storage_cell_start(int file_des) { if ((arg == -1) || (Server_VerifyLock() == OK)) { if (arg > MAX_STORAGE_CELL_VAL) { ret = FAIL; - strcpy(mess,"Max Storage cell number should not exceed 15\n"); + strcpy(mess, "Max Storage cell number should not exceed 15\n"); LOG(logERROR, (mess)); } else { retval = selectStoragecellStart(arg); @@ -4058,97 +4286,97 @@ int storage_cell_start(int file_des) { return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int check_version(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); - // check software- firmware compatibility and basic tests - if (isControlServer) { - LOG(logDEBUG1, ("Checking software-firmware compatibility and basic test result\n")); + // check software- firmware compatibility and basic tests + if (isControlServer) { + LOG(logDEBUG1, ("Checking software-firmware compatibility and basic " + "test result\n")); - // check if firmware check is done - if (!isInitCheckDone()) { - usleep(3 * 1000 * 1000); - if (!isInitCheckDone()) { - ret = FAIL; - strcpy(mess,"Firmware Software Compatibility Check (Server Initialization) " - "still not done done in server. Unexpected.\n"); - LOG(logERROR,(mess)); - } - } - // check firmware check result - if (ret == OK) { - char* firmware_message = NULL; - if (getInitResult(&firmware_message) == FAIL) { - ret = FAIL; - strcpy(mess, firmware_message); - LOG(logERROR,(mess)); - } - } - } + // check if firmware check is done + if (!isInitCheckDone()) { + usleep(3 * 1000 * 1000); + if (!isInitCheckDone()) { + ret = FAIL; + strcpy(mess, "Firmware Software Compatibility Check (Server " + "Initialization) " + "still not done done in server. Unexpected.\n"); + LOG(logERROR, (mess)); + } + } + // check firmware check result + if (ret == OK) { + char *firmware_message = NULL; + if (getInitResult(&firmware_message) == FAIL) { + ret = FAIL; + strcpy(mess, firmware_message); + LOG(logERROR, (mess)); + } + } + } - if (ret == OK) { - LOG(logDEBUG1, ("Checking versioning compatibility with value 0x%llx\n",arg)); + if (ret == OK) { + LOG(logDEBUG1, + ("Checking versioning compatibility with value 0x%llx\n", arg)); - int64_t client_requiredVersion = arg; - int64_t det_apiVersion = getClientServerAPIVersion(); - int64_t det_version = getServerVersion(); + int64_t client_requiredVersion = arg; + int64_t det_apiVersion = getClientServerAPIVersion(); + int64_t det_version = getServerVersion(); - // old client - if (det_apiVersion > client_requiredVersion) { - ret = FAIL; - sprintf(mess,"Client's detector SW API version: (0x%llx). " - "Detector's SW API Version: (0x%llx). " - "Incompatible, update client!\n", - (long long int)client_requiredVersion, (long long int)det_apiVersion); - LOG(logERROR,(mess)); - } + // old client + if (det_apiVersion > client_requiredVersion) { + ret = FAIL; + sprintf(mess, + "Client's detector SW API version: (0x%llx). " + "Detector's SW API Version: (0x%llx). " + "Incompatible, update client!\n", + (long long int)client_requiredVersion, + (long long int)det_apiVersion); + LOG(logERROR, (mess)); + } - // old software - else if (client_requiredVersion > det_version) { - ret = FAIL; - sprintf(mess,"Detector SW Version: (0x%llx). " - "Client's detector SW API Version: (0x%llx). " - "Incompatible, update detector software!\n", - (long long int)det_version, (long long int)client_requiredVersion); - LOG(logERROR,(mess)); - } - } - return Server_SendResult(file_des, INT32, NULL, 0); + // old software + else if (client_requiredVersion > det_version) { + ret = FAIL; + sprintf(mess, + "Detector SW Version: (0x%llx). " + "Client's detector SW API Version: (0x%llx). " + "Incompatible, update detector software!\n", + (long long int)det_version, + (long long int)client_requiredVersion); + LOG(logERROR, (mess)); + } + } + return Server_SendResult(file_des, INT32, NULL, 0); } - - - int software_trigger(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); - LOG(logDEBUG1, ("Software Trigger\n")); + LOG(logDEBUG1, ("Software Trigger\n")); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = softwareTrigger(); - if (ret == FAIL) { - sprintf(mess, "Could not send software trigger\n"); - LOG(logERROR,(mess)); - } - LOG(logDEBUG1, ("Software trigger successful\n")); - } + // only set + if (Server_VerifyLock() == OK) { + ret = softwareTrigger(); + if (ret == FAIL) { + sprintf(mess, "Could not send software trigger\n"); + LOG(logERROR, (mess)); + } + LOG(logDEBUG1, ("Software trigger successful\n")); + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int led(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); @@ -4164,50 +4392,50 @@ int led(int file_des) { #else // set & get if ((arg == -1) || (Server_VerifyLock() == OK)) { - retval = setLEDEnable(arg); - LOG(logDEBUG1, ("LED Enable: %d\n", retval)); - validate(arg, retval, "LED Enable", DEC); + retval = setLEDEnable(arg); + LOG(logDEBUG1, ("LED Enable: %d\n", retval)); + validate(arg, retval, "LED Enable", DEC); } #endif return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int digital_io_delay(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t args[2] = {-1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t args[2] = {-1, -1}; if (receiveData(file_des, args, sizeof(args), INT64) < 0) return printSocketReadError(); - LOG(logDEBUG1, ("Digital IO Delay, pinMask: 0x%llx, delay:%d ps\n", args[0], (int)args[1])); + LOG(logDEBUG1, ("Digital IO Delay, pinMask: 0x%llx, delay:%d ps\n", args[0], + (int)args[1])); #if (!defined(CHIPTESTBOARDD)) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - int delay = (int)args[1]; - if (delay < 0 || delay > DIGITAL_IO_DELAY_MAXIMUM_PS) { - ret = FAIL; - sprintf(mess, "Could not set digital IO delay. Delay maximum is %d ps\n", DIGITAL_IO_DELAY_MAXIMUM_PS); - LOG(logERROR,(mess)); - } else { - setDigitalIODelay(args[0], delay); - LOG(logDEBUG1, ("Digital IO Delay successful\n")); - } - } + // only set + if (Server_VerifyLock() == OK) { + int delay = (int)args[1]; + if (delay < 0 || delay > DIGITAL_IO_DELAY_MAXIMUM_PS) { + ret = FAIL; + sprintf(mess, + "Could not set digital IO delay. Delay maximum is %d ps\n", + DIGITAL_IO_DELAY_MAXIMUM_PS); + LOG(logERROR, (mess)); + } else { + setDigitalIODelay(args[0], delay); + LOG(logDEBUG1, ("Digital IO Delay successful\n")); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int copy_detector_server(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); char args[2][MAX_STR_LENGTH]; - char retvals[MAX_STR_LENGTH] = {0}; + char retvals[MAX_STR_LENGTH] = {0}; memset(args, 0, sizeof(args)); memset(retvals, 0, sizeof(retvals)); @@ -4221,226 +4449,228 @@ int copy_detector_server(int file_des) { // only set if (Server_VerifyLock() == OK) { - char* sname = args[0]; - char* hostname = args[1]; + char *sname = args[0]; + char *hostname = args[1]; LOG(logINFOBLUE, ("Copying server %s from host %s\n", sname, hostname)); char cmd[MAX_STR_LENGTH]; memset(cmd, 0, MAX_STR_LENGTH); // copy server - strcpy(cmd, "tftp "); - strcat(cmd, hostname); - strcat(cmd, " -r "); - strcat(cmd, sname); - strcat(cmd, " -g"); + strcpy(cmd, "tftp "); + strcat(cmd, hostname); + strcat(cmd, " -r "); + strcat(cmd, sname); + strcat(cmd, " -g"); int success = executeCommand(cmd, retvals, logDEBUG1); if (success == FAIL) { - ret = FAIL; - strcpy(mess, retvals); - //LOG(logERROR, (mess)); already printed in executecommand + ret = FAIL; + strcpy(mess, retvals); + // LOG(logERROR, (mess)); already printed in executecommand } // success else { - LOG(logINFO, ("Server copied successfully\n")); - // give permissions - strcpy(cmd, "chmod 777 "); - strcat(cmd, sname); - executeCommand(cmd, retvals, logDEBUG1); + LOG(logINFO, ("Server copied successfully\n")); + // give permissions + strcpy(cmd, "chmod 777 "); + strcat(cmd, sname); + executeCommand(cmd, retvals, logDEBUG1); - // edit /etc/inittab - // find line numbers in /etc/inittab where DetectorServer - strcpy(cmd, "sed -n '/DetectorServer/=' /etc/inittab"); - executeCommand(cmd, retvals, logDEBUG1); - while (strlen(retvals)) { - // get first linen number - int lineNumber = atoi(retvals); - // delete that line - sprintf(cmd, "sed -i \'%dd\' /etc/inittab", lineNumber); - executeCommand(cmd, retvals, logDEBUG1); - // find line numbers again - strcpy(cmd, "sed -n '/DetectorServer/=' /etc/inittab"); - executeCommand(cmd, retvals, logDEBUG1); - } - LOG(logINFO, ("Deleted all lines containing DetectorServer in /etc/inittab\n")); + // edit /etc/inittab + // find line numbers in /etc/inittab where DetectorServer + strcpy(cmd, "sed -n '/DetectorServer/=' /etc/inittab"); + executeCommand(cmd, retvals, logDEBUG1); + while (strlen(retvals)) { + // get first linen number + int lineNumber = atoi(retvals); + // delete that line + sprintf(cmd, "sed -i \'%dd\' /etc/inittab", lineNumber); + executeCommand(cmd, retvals, logDEBUG1); + // find line numbers again + strcpy(cmd, "sed -n '/DetectorServer/=' /etc/inittab"); + executeCommand(cmd, retvals, logDEBUG1); + } + LOG(logINFO, ("Deleted all lines containing DetectorServer in " + "/etc/inittab\n")); - // append line - strcpy(cmd, "echo \"ttyS0::respawn:/./"); - strcat(cmd, sname); - strcat(cmd, "\" >> /etc/inittab"); - executeCommand(cmd, retvals, logDEBUG1); + // append line + strcpy(cmd, "echo \"ttyS0::respawn:/./"); + strcat(cmd, sname); + strcat(cmd, "\" >> /etc/inittab"); + executeCommand(cmd, retvals, logDEBUG1); - LOG(logINFO, ("/etc/inittab modified to have %s\n", sname)); + LOG(logINFO, ("/etc/inittab modified to have %s\n", sname)); } } #endif return Server_SendResult(file_des, OTHER, retvals, sizeof(retvals)); } - int reboot_controller(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); #if defined(MYTHEN3D) || defined(GOTTHARD2D) - if (getHardwareVersionNumber() == 0) { - ret = FAIL; - strcpy(mess, "Old board version, reboot by yourself please!\n"); - LOG(logINFORED, (mess)); - Server_SendResult(file_des, INT32, NULL, 0); - return GOODBYE; - } - ret = REBOOT; + if (getHardwareVersionNumber() == 0) { + ret = FAIL; + strcpy(mess, "Old board version, reboot by yourself please!\n"); + LOG(logINFORED, (mess)); + Server_SendResult(file_des, INT32, NULL, 0); + return GOODBYE; + } + ret = REBOOT; #elif EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - ret = REBOOT; + ret = REBOOT; #endif - Server_SendResult(file_des, INT32, NULL, 0); - return ret; + Server_SendResult(file_des, INT32, NULL, 0); + return ret; } - int set_adc_enable_mask(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Seting 1Gb ADC Enable Mask to %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Seting 1Gb ADC Enable Mask to %u\n", arg)); #if (!defined(MOENCHD)) && (!defined(CHIPTESTBOARDD)) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - ret = setADCEnableMask(arg); - if (ret == FAIL) { - sprintf(mess, "Could not set 1Gb ADC Enable mask to 0x%x.\n", arg); - LOG(logERROR,(mess)); - } else { - uint32_t retval = getADCEnableMask(); - if (arg != retval) { - ret = FAIL; - sprintf(mess, "Could not set 1Gb ADC Enable mask. Set 0x%x, but read 0x%x\n", arg, retval); - LOG(logERROR,(mess)); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + ret = setADCEnableMask(arg); + if (ret == FAIL) { + sprintf(mess, "Could not set 1Gb ADC Enable mask to 0x%x.\n", arg); + LOG(logERROR, (mess)); + } else { + uint32_t retval = getADCEnableMask(); + if (arg != retval) { + ret = FAIL; + sprintf(mess, + "Could not set 1Gb ADC Enable mask. Set 0x%x, but read " + "0x%x\n", + arg, retval); + LOG(logERROR, (mess)); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_adc_enable_mask(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t retval = -1; - LOG(logDEBUG1, ("Getting 1Gb ADC Enable Mask \n")); + LOG(logDEBUG1, ("Getting 1Gb ADC Enable Mask \n")); #if (!defined(MOENCHD)) && (!defined(CHIPTESTBOARDD)) - functionNotImplemented(); -#else - // get - retval = getADCEnableMask(); - LOG(logDEBUG1, ("1Gb ADC Enable Mask retval: %u\n", retval)); + functionNotImplemented(); +#else + // get + retval = getADCEnableMask(); + LOG(logDEBUG1, ("1Gb ADC Enable Mask retval: %u\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } int set_adc_enable_mask_10g(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Seting 10Gb ADC Enable Mask to %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Seting 10Gb ADC Enable Mask to %u\n", arg)); #if (!defined(MOENCHD)) && (!defined(CHIPTESTBOARDD)) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - setADCEnableMask_10G(arg); - uint32_t retval = getADCEnableMask_10G(); - if (arg != retval) { - ret = FAIL; - sprintf(mess, "Could not set 10Gb ADC Enable mask. Set 0x%x, but read 0x%x\n", arg, retval); - LOG(logERROR,(mess)); - } - } + // only set + if (Server_VerifyLock() == OK) { + setADCEnableMask_10G(arg); + uint32_t retval = getADCEnableMask_10G(); + if (arg != retval) { + ret = FAIL; + sprintf( + mess, + "Could not set 10Gb ADC Enable mask. Set 0x%x, but read 0x%x\n", + arg, retval); + LOG(logERROR, (mess)); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_adc_enable_mask_10g(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t retval = -1; - LOG(logDEBUG1, ("Getting 10Gb ADC Enable Mask\n")); + LOG(logDEBUG1, ("Getting 10Gb ADC Enable Mask\n")); #if (!defined(MOENCHD)) && (!defined(CHIPTESTBOARDD)) - functionNotImplemented(); -#else - // get - retval = getADCEnableMask_10G(); - LOG(logDEBUG1, ("10Gb ADC Enable Mask retval: %u\n", retval)); + functionNotImplemented(); +#else + // get + retval = getADCEnableMask_10G(); + LOG(logDEBUG1, ("10Gb ADC Enable Mask retval: %u\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int set_adc_invert(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Seting ADC Invert to %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Seting ADC Invert to %u\n", arg)); #if (!defined(MOENCHD)) && (!defined(CHIPTESTBOARDD)) && (!defined(JUNGFRAUD)) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - setADCInvertRegister(arg); - uint32_t retval = getADCInvertRegister(); - if (arg != retval) { - ret = FAIL; - sprintf(mess, "Could not set ADC Invert register. Set 0x%x, but read 0x%x\n", arg, retval); - LOG(logERROR,(mess)); - } - } + // only set + if (Server_VerifyLock() == OK) { + setADCInvertRegister(arg); + uint32_t retval = getADCInvertRegister(); + if (arg != retval) { + ret = FAIL; + sprintf( + mess, + "Could not set ADC Invert register. Set 0x%x, but read 0x%x\n", + arg, retval); + LOG(logERROR, (mess)); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_adc_invert(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t retval = -1; - LOG(logDEBUG1, ("Getting ADC Invert register \n")); + LOG(logDEBUG1, ("Getting ADC Invert register \n")); #if (!defined(MOENCHD)) && (!defined(CHIPTESTBOARDD)) && (!defined(JUNGFRAUD)) - functionNotImplemented(); -#else - // get - retval = getADCInvertRegister(); - LOG(logDEBUG1, ("ADC Invert register retval: %u\n", retval)); + functionNotImplemented(); +#else + // get + retval = getADCInvertRegister(); + LOG(logDEBUG1, ("ADC Invert register retval: %u\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - int set_external_sampling_source(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); @@ -4456,15 +4686,18 @@ int set_external_sampling_source(int file_des) { #else // set & get if ((arg == -1) || (Server_VerifyLock() == OK)) { - if (arg < -1 || arg > 63) { - ret = FAIL; - sprintf(mess, "Could not set external sampling source to %d. Value must be 0-63.\n", arg); - LOG(logERROR,(mess)); - } else { - retval = setExternalSamplingSource(arg); - LOG(logDEBUG1, ("External Sampling source: %d\n", retval)); - validate(arg, retval, "External sampling source", DEC); - } + if (arg < -1 || arg > 63) { + ret = FAIL; + sprintf(mess, + "Could not set external sampling source to %d. Value must " + "be 0-63.\n", + arg); + LOG(logERROR, (mess)); + } else { + retval = setExternalSamplingSource(arg); + LOG(logDEBUG1, ("External Sampling source: %d\n", retval)); + validate(arg, retval, "External sampling source", DEC); + } } #endif return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); @@ -4485,2592 +4718,2666 @@ int set_external_sampling(int file_des) { #else // set & get if ((arg == -1) || (Server_VerifyLock() == OK)) { - arg = (arg > 0) ? 1 : arg; - retval = setExternalSampling(arg); - LOG(logDEBUG1, ("External Sampling enable: %d\n", retval)); - validate(arg, retval, "External sampling enable", DEC); + arg = (arg > 0) ? 1 : arg; + retval = setExternalSampling(arg); + LOG(logDEBUG1, ("External Sampling enable: %d\n", retval)); + validate(arg, retval, "External sampling enable", DEC); } #endif return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - int set_starting_frame_number(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting starting frame number to %llu\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting starting frame number to %llu\n", arg)); #if (!defined(EIGERD)) && (!defined(JUNGFRAUD)) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (arg == 0) { - ret = FAIL; - sprintf(mess, "Could not set starting frame number. Cannot be 0.\n"); - LOG(logERROR,(mess)); - } + // only set + if (Server_VerifyLock() == OK) { + if (arg == 0) { + ret = FAIL; + sprintf(mess, + "Could not set starting frame number. Cannot be 0.\n"); + LOG(logERROR, (mess)); + } #ifdef EIGERD - else if (arg > UDP_HEADER_MAX_FRAME_VALUE) { - ret = FAIL; + else if (arg > UDP_HEADER_MAX_FRAME_VALUE) { + ret = FAIL; #ifdef VIRTUAL - sprintf(mess, "Could not set starting frame number. Must be less then %ld (0x%lx)\n", UDP_HEADER_MAX_FRAME_VALUE, UDP_HEADER_MAX_FRAME_VALUE); + sprintf(mess, + "Could not set starting frame number. Must be less then " + "%ld (0x%lx)\n", + UDP_HEADER_MAX_FRAME_VALUE, UDP_HEADER_MAX_FRAME_VALUE); #else - sprintf(mess, "Could not set starting frame number. Must be less then %lld (0x%llx)\n", UDP_HEADER_MAX_FRAME_VALUE, UDP_HEADER_MAX_FRAME_VALUE); + sprintf(mess, + "Could not set starting frame number. Must be less then " + "%lld (0x%llx)\n", + UDP_HEADER_MAX_FRAME_VALUE, UDP_HEADER_MAX_FRAME_VALUE); #endif - LOG(logERROR,(mess)); - } -#endif - else { - ret = setStartingFrameNumber(arg); - if (ret == FAIL) { - sprintf(mess, "Could not set starting frame number. Failed to map address.\n"); - LOG(logERROR,(mess)); - } - if (ret == OK) { - uint64_t retval = 0; - ret = getStartingFrameNumber(&retval); - if (ret == FAIL) { - sprintf(mess, "Could not get starting frame number. Failed to map address.\n"); - LOG(logERROR,(mess)); - } else if (ret == -2) { - sprintf(mess, "Inconsistent starting frame number from left and right FPGA. Please set it.\n"); - LOG(logERROR,(mess)); - } else { - if (arg != retval) { - ret = FAIL; + LOG(logERROR, (mess)); + } +#endif + else { + ret = setStartingFrameNumber(arg); + if (ret == FAIL) { + sprintf(mess, "Could not set starting frame number. Failed to " + "map address.\n"); + LOG(logERROR, (mess)); + } + if (ret == OK) { + uint64_t retval = 0; + ret = getStartingFrameNumber(&retval); + if (ret == FAIL) { + sprintf(mess, "Could not get starting frame number. Failed " + "to map address.\n"); + LOG(logERROR, (mess)); + } else if (ret == -2) { + sprintf(mess, "Inconsistent starting frame number from " + "left and right FPGA. Please set it.\n"); + LOG(logERROR, (mess)); + } else { + if (arg != retval) { + ret = FAIL; #ifdef VIRTUAL - sprintf(mess, "Could not set starting frame number. Set 0x%lx, but read 0x%lx\n", arg, retval); + sprintf(mess, + "Could not set starting frame number. Set " + "0x%lx, but read 0x%lx\n", + arg, retval); #else - sprintf(mess, "Could not set starting frame number. Set 0x%llx, but read 0x%llx\n", arg, retval); + sprintf(mess, + "Could not set starting frame number. Set " + "0x%llx, but read 0x%llx\n", + arg, retval); #endif - LOG(logERROR,(mess)); - } - } - } - } - } + LOG(logERROR, (mess)); + } + } + } + } + } #endif - return Server_SendResult(file_des, INT64, NULL, 0); + return Server_SendResult(file_des, INT64, NULL, 0); } int get_starting_frame_number(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t retval = -1; - LOG(logDEBUG1, ("Getting Starting frame number \n")); + LOG(logDEBUG1, ("Getting Starting frame number \n")); #if (!defined(EIGERD)) && (!defined(JUNGFRAUD)) - functionNotImplemented(); -#else - // get - ret = getStartingFrameNumber(&retval); - if (ret == FAIL) { - sprintf(mess, "Could not get starting frame number. Failed to map address.\n"); - LOG(logERROR,(mess)); - } else if (ret == -2) { - sprintf(mess, "Inconsistent starting frame number from left and right FPGA. Please set it.\n"); - LOG(logERROR,(mess)); - } else { - LOG(logDEBUG1, ("Start frame number retval: %u\n", retval)); - } + functionNotImplemented(); +#else + // get + ret = getStartingFrameNumber(&retval); + if (ret == FAIL) { + sprintf( + mess, + "Could not get starting frame number. Failed to map address.\n"); + LOG(logERROR, (mess)); + } else if (ret == -2) { + sprintf(mess, "Inconsistent starting frame number from left and right " + "FPGA. Please set it.\n"); + LOG(logERROR, (mess)); + } else { + LOG(logDEBUG1, ("Start frame number retval: %u\n", retval)); + } #endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } - - - int set_quad(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting quad: %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting quad: %u\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (setQuad(arg) == FAIL) { - ret = FAIL; - sprintf(mess, "Could not set quad.\n"); - LOG(logERROR,(mess)); - } else { - int retval = getQuad(); - if (arg != retval) { - ret = FAIL; - sprintf(mess, "Could not set quad. Set %d, but read %d\n", retval, arg); - LOG(logERROR,(mess)); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (setQuad(arg) == FAIL) { + ret = FAIL; + sprintf(mess, "Could not set quad.\n"); + LOG(logERROR, (mess)); + } else { + int retval = getQuad(); + if (arg != retval) { + ret = FAIL; + sprintf(mess, "Could not set quad. Set %d, but read %d\n", + retval, arg); + LOG(logERROR, (mess)); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_quad(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting Quad\n")); + LOG(logDEBUG1, ("Getting Quad\n")); #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getQuad(); - LOG(logDEBUG1, ("Quad retval: %u\n", retval)); + functionNotImplemented(); +#else + // get only + retval = getQuad(); + LOG(logDEBUG1, ("Quad retval: %u\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } int set_interrupt_subframe(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting interrupt subframe: %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting interrupt subframe: %u\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if(setInterruptSubframe(arg) == FAIL) { - ret = FAIL; - sprintf(mess, "Could not set Intertupt Subframe in FEB.\n"); - LOG(logERROR,(mess)); - } else { - int retval = getInterruptSubframe(); - if (arg != retval) { - ret = FAIL; - sprintf(mess, "Could not set Intertupt Subframe. Set %d, but read %d\n", retval, arg); - LOG(logERROR,(mess)); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (setInterruptSubframe(arg) == FAIL) { + ret = FAIL; + sprintf(mess, "Could not set Intertupt Subframe in FEB.\n"); + LOG(logERROR, (mess)); + } else { + int retval = getInterruptSubframe(); + if (arg != retval) { + ret = FAIL; + sprintf( + mess, + "Could not set Intertupt Subframe. Set %d, but read %d\n", + retval, arg); + LOG(logERROR, (mess)); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_interrupt_subframe(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting interrupt subframe\n")); + LOG(logDEBUG1, ("Getting interrupt subframe\n")); #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getInterruptSubframe(); - if (retval == -1) { - ret = FAIL; - sprintf(mess, "Could not get Intertupt Subframe or inconsistent values between left and right. \n"); - LOG(logERROR,(mess)); - } else { - LOG(logDEBUG1, ("Interrupt subframe retval: %u\n", retval)); - } + functionNotImplemented(); +#else + // get only + retval = getInterruptSubframe(); + if (retval == -1) { + ret = FAIL; + sprintf(mess, "Could not get Intertupt Subframe or inconsistent values " + "between left and right. \n"); + LOG(logERROR, (mess)); + } else { + LOG(logDEBUG1, ("Interrupt subframe retval: %u\n", retval)); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - int set_read_n_lines(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting read n lines: %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting read n lines: %u\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (arg <= 0 || arg > MAX_ROWS_PER_READOUT) { - ret = FAIL; - sprintf(mess, "Could not set number of lines readout. Must be between 1 and %d\n", MAX_ROWS_PER_READOUT); - LOG(logERROR,(mess)); - } else { - int dr = setDynamicRange(-1); - int isTenGiga = enableTenGigabitEthernet(-1); - unsigned int maxnl = MAX_ROWS_PER_READOUT; - unsigned int maxnp = (isTenGiga ? 4 : 16) * dr; - if ((arg * maxnp) % maxnl) { - ret = FAIL; - sprintf(mess, - "Could not set %d number of lines readout. For %d bit mode and 10 giga %s, (%d (num " - "lines) x %d (max num packets for this mode)) must be divisible by %d\n", - arg, dr, isTenGiga ? "enabled" : "disabled", arg, maxnp, maxnl); - LOG(logERROR, (mess)); + // only set + if (Server_VerifyLock() == OK) { + if (arg <= 0 || arg > MAX_ROWS_PER_READOUT) { + ret = FAIL; + sprintf(mess, + "Could not set number of lines readout. Must be between 1 " + "and %d\n", + MAX_ROWS_PER_READOUT); + LOG(logERROR, (mess)); + } else { + int dr = setDynamicRange(-1); + int isTenGiga = enableTenGigabitEthernet(-1); + unsigned int maxnl = MAX_ROWS_PER_READOUT; + unsigned int maxnp = (isTenGiga ? 4 : 16) * dr; + if ((arg * maxnp) % maxnl) { + ret = FAIL; + sprintf(mess, + "Could not set %d number of lines readout. For %d bit " + "mode and 10 giga %s, (%d (num " + "lines) x %d (max num packets for this mode)) must be " + "divisible by %d\n", + arg, dr, isTenGiga ? "enabled" : "disabled", arg, maxnp, + maxnl); + LOG(logERROR, (mess)); } else { - if(setReadNLines(arg) == FAIL) { - ret = FAIL; - sprintf(mess, "Could not set read n lines.\n"); - LOG(logERROR,(mess)); - } else { - int retval = getReadNLines(); - if (arg != retval) { - ret = FAIL; - sprintf(mess, "Could not set read n lines. Set %d, but read %d\n", retval, arg); - LOG(logERROR,(mess)); - } - } - } - } - } + if (setReadNLines(arg) == FAIL) { + ret = FAIL; + sprintf(mess, "Could not set read n lines.\n"); + LOG(logERROR, (mess)); + } else { + int retval = getReadNLines(); + if (arg != retval) { + ret = FAIL; + sprintf( + mess, + "Could not set read n lines. Set %d, but read %d\n", + retval, arg); + LOG(logERROR, (mess)); + } + } + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_read_n_lines(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting read n lines\n")); + LOG(logDEBUG1, ("Getting read n lines\n")); #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getReadNLines(); - if (retval == -1) { - ret = FAIL; - sprintf(mess, "Could not get read n lines. \n"); - LOG(logERROR,(mess)); - } else { - LOG(logDEBUG1, ("Read N Lines retval: %u\n", retval)); - } + functionNotImplemented(); +#else + // get only + retval = getReadNLines(); + if (retval == -1) { + ret = FAIL; + sprintf(mess, "Could not get read n lines. \n"); + LOG(logERROR, (mess)); + } else { + LOG(logDEBUG1, ("Read N Lines retval: %u\n", retval)); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); -} - - - + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); +} void calculate_and_set_position() { - if (maxydet == -1 || detectorId == -1) { - ret = FAIL; - sprintf(mess, "Could not set detector position (did not get multi size).\n"); - LOG(logERROR,(mess)); - return; - } - int maxy = maxydet; + if (maxydet == -1 || detectorId == -1) { + ret = FAIL; + sprintf(mess, + "Could not set detector position (did not get multi size).\n"); + LOG(logERROR, (mess)); + return; + } + int maxy = maxydet; #ifdef JUNGFRAUD - maxy *= getNumberofUDPInterfaces(); + maxy *= getNumberofUDPInterfaces(); #endif - int pos[2] = {0, 0}; - // row + int pos[2] = {0, 0}; + // row pos[0] = (detectorId % maxy); // col for horiz. udp ports pos[1] = (detectorId / maxy); #ifdef EIGERD - pos[1] *= 2; + pos[1] *= 2; #endif LOG(logDEBUG, ("Setting Positions (%d,%d)\n", pos[0], pos[1])); - if(setDetectorPosition(pos) == FAIL) { - ret = FAIL; - sprintf(mess, "Could not set detector position.\n"); - LOG(logERROR,(mess)); - } - // to redo the detector mac (depends on positions) - else { - // create detector mac from x and y - if (udpDetails.srcmac == 0) { - char dmac[50]; - memset(dmac, 0, 50); - sprintf(dmac, "aa:bb:cc:dd:%02x:%02x", pos[0]&0xFF, pos[1]&0xFF); - LOG(logINFO, ("Udp source mac address created: %s\n", dmac)); - unsigned char a[6]; - sscanf(dmac, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &a[0], &a[1], &a[2], &a[3], &a[4], &a[5]); - udpDetails.srcmac = 0; - int i; - for (i = 0; i < 6; ++i) { - udpDetails.srcmac = (udpDetails.srcmac << 8) + a[i]; - } - } + if (setDetectorPosition(pos) == FAIL) { + ret = FAIL; + sprintf(mess, "Could not set detector position.\n"); + LOG(logERROR, (mess)); + } + // to redo the detector mac (depends on positions) + else { + // create detector mac from x and y + if (udpDetails.srcmac == 0) { + char dmac[50]; + memset(dmac, 0, 50); + sprintf(dmac, "aa:bb:cc:dd:%02x:%02x", pos[0] & 0xFF, + pos[1] & 0xFF); + LOG(logINFO, ("Udp source mac address created: %s\n", dmac)); + unsigned char a[6]; + sscanf(dmac, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &a[0], &a[1], &a[2], + &a[3], &a[4], &a[5]); + udpDetails.srcmac = 0; + int i; + for (i = 0; i < 6; ++i) { + udpDetails.srcmac = (udpDetails.srcmac << 8) + a[i]; + } + } #ifdef JUNGFRAUD - if (getNumberofUDPInterfaces() > 1) { - if (udpDetails.srcmac2 == 0) { - char dmac2[50]; - memset(dmac2, 0, 50); - sprintf(dmac2, "aa:bb:cc:dd:%02x:%02x", (pos[0] + 1 )&0xFF, pos[1]&0xFF); - LOG(logINFO, ("Udp source mac address2 created: %s\n", dmac2)); - unsigned char a[6]; - sscanf(dmac2, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &a[0], &a[1], &a[2], &a[3], &a[4], &a[5]); - udpDetails.srcmac2 = 0; - int i; - for (i = 0; i < 6; ++i) { - udpDetails.srcmac2 = (udpDetails.srcmac2 << 8) + a[i]; - } - } - } + if (getNumberofUDPInterfaces() > 1) { + if (udpDetails.srcmac2 == 0) { + char dmac2[50]; + memset(dmac2, 0, 50); + sprintf(dmac2, "aa:bb:cc:dd:%02x:%02x", (pos[0] + 1) & 0xFF, + pos[1] & 0xFF); + LOG(logINFO, ("Udp source mac address2 created: %s\n", dmac2)); + unsigned char a[6]; + sscanf(dmac2, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &a[0], &a[1], + &a[2], &a[3], &a[4], &a[5]); + udpDetails.srcmac2 = 0; + int i; + for (i = 0; i < 6; ++i) { + udpDetails.srcmac2 = (udpDetails.srcmac2 << 8) + a[i]; + } + } + } #endif - configure_mac(); - } - // no need to do a get (also jungfrau gives bigger set for second) + configure_mac(); + } + // no need to do a get (also jungfrau gives bigger set for second) } - int set_detector_position(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[2] = { 0, 0}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[2] = {0, 0}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting detector positions: [%u, %u]\n", args[0], args[1])); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting detector positions: [%u, %u]\n", args[0], args[1])); - // only set - if (Server_VerifyLock() == OK) { - if (check_detector_idle() == OK) { - maxydet = args[0]; - detectorId = args[1]; - calculate_and_set_position(); - } - } - return Server_SendResult(file_des, INT32, NULL, 0); + // only set + if (Server_VerifyLock() == OK) { + if (check_detector_idle() == OK) { + maxydet = args[0]; + detectorId = args[1]; + calculate_and_set_position(); + } + } + return Server_SendResult(file_des, INT32, NULL, 0); } int check_detector_idle() { - enum runStatus status = getRunStatus(); - if (status != IDLE && status != RUN_FINISHED && status != STOPPED) { - ret = FAIL; - sprintf(mess, "Cannot configure mac when detector is not idle. Detector at %s state\n", getRunStateName(status)); - LOG(logERROR,(mess)); - } - return ret; + enum runStatus status = getRunStatus(); + if (status != IDLE && status != RUN_FINISHED && status != STOPPED) { + ret = FAIL; + sprintf(mess, + "Cannot configure mac when detector is not idle. Detector at " + "%s state\n", + getRunStateName(status)); + LOG(logERROR, (mess)); + } + return ret; } int is_configurable() { - if (udpDetails.srcip == 0) { - strcpy(configureMessage, "udp source ip not configured\n"); - LOG(logWARNING, ("%s", configureMessage)); - return FAIL; - } - if (udpDetails.dstip == 0) { - strcpy(configureMessage, "udp destination ip not configured\n"); - LOG(logWARNING, ("%s", configureMessage)); - return FAIL; - } - if (udpDetails.srcmac == 0) { - strcpy(configureMessage, "udp source mac not configured\n"); - LOG(logWARNING, ("%s", configureMessage)); - return FAIL; - } - if (udpDetails.dstmac == 0) { - strcpy(configureMessage, "udp destination mac not configured\n"); - LOG(logWARNING, ("%s", configureMessage)); - return FAIL; - } + if (udpDetails.srcip == 0) { + strcpy(configureMessage, "udp source ip not configured\n"); + LOG(logWARNING, ("%s", configureMessage)); + return FAIL; + } + if (udpDetails.dstip == 0) { + strcpy(configureMessage, "udp destination ip not configured\n"); + LOG(logWARNING, ("%s", configureMessage)); + return FAIL; + } + if (udpDetails.srcmac == 0) { + strcpy(configureMessage, "udp source mac not configured\n"); + LOG(logWARNING, ("%s", configureMessage)); + return FAIL; + } + if (udpDetails.dstmac == 0) { + strcpy(configureMessage, "udp destination mac not configured\n"); + LOG(logWARNING, ("%s", configureMessage)); + return FAIL; + } #ifdef JUNGFRAUD - if (getNumberofUDPInterfaces() == 2) { - if (udpDetails.srcip2 == 0) { - strcpy(configureMessage, "udp source ip2 not configured\n"); - LOG(logWARNING, ("%s", configureMessage)); - return FAIL; - } - if (udpDetails.dstip2 == 0) { - strcpy(configureMessage, "udp destination ip2 not configured\n"); - LOG(logWARNING, ("%s", configureMessage)); - return FAIL; - } - if (udpDetails.srcmac2 == 0) { - strcpy(configureMessage, "udp source mac2 not configured\n"); - LOG(logWARNING, ("%s", configureMessage)); - return FAIL; - } - if (udpDetails.dstmac2 == 0) { - strcpy(configureMessage, "udp destination mac2 not configured\n"); - LOG(logWARNING, ("%s", configureMessage)); - return FAIL; - } + if (getNumberofUDPInterfaces() == 2) { + if (udpDetails.srcip2 == 0) { + strcpy(configureMessage, "udp source ip2 not configured\n"); + LOG(logWARNING, ("%s", configureMessage)); + return FAIL; + } + if (udpDetails.dstip2 == 0) { + strcpy(configureMessage, "udp destination ip2 not configured\n"); + LOG(logWARNING, ("%s", configureMessage)); + return FAIL; + } + if (udpDetails.srcmac2 == 0) { + strcpy(configureMessage, "udp source mac2 not configured\n"); + LOG(logWARNING, ("%s", configureMessage)); + return FAIL; + } + if (udpDetails.dstmac2 == 0) { + strcpy(configureMessage, "udp destination mac2 not configured\n"); + LOG(logWARNING, ("%s", configureMessage)); + return FAIL; + } } #endif return OK; } void configure_mac() { - if (is_configurable() == OK) { - ret = configureMAC(); - if (ret != OK) { + if (is_configurable() == OK) { + ret = configureMAC(); + if (ret != OK) { #if defined(CHIPTESTBOARDD) || defined(MOENCHD) - if (ret == -1) { - sprintf(mess, "Could not allocate RAM\n"); - } else { - sprintf(mess,"Could not configure mac because of incorrect udp 1G destination IP and port\n"); - } + if (ret == -1) { + sprintf(mess, "Could not allocate RAM\n"); + } else { + sprintf(mess, "Could not configure mac because of incorrect " + "udp 1G destination IP and port\n"); + } #else - sprintf(mess,"Configure Mac failed\n"); + sprintf(mess, "Configure Mac failed\n"); #endif - strcpy(configureMessage, mess); - LOG(logERROR,(mess)); - } else { - LOG(logINFOGREEN, ("\tConfigure MAC successful\n")); - configured = OK; - return; - } - } - configured = FAIL; - LOG(logWARNING, ("Configure FAIL, not all parameters configured yet\n")); + strcpy(configureMessage, mess); + LOG(logERROR, (mess)); + } else { + LOG(logINFOGREEN, ("\tConfigure MAC successful\n")); + configured = OK; + return; + } + } + configured = FAIL; + LOG(logWARNING, ("Configure FAIL, not all parameters configured yet\n")); } - - - int set_source_udp_ip(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - arg = __builtin_bswap32(arg); - LOG(logINFO, ("Setting udp source ip: 0x%x\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + arg = __builtin_bswap32(arg); + LOG(logINFO, ("Setting udp source ip: 0x%x\n", arg)); - // only set - if (Server_VerifyLock() == OK) { - if (check_detector_idle() == OK) { - if (udpDetails.srcip != arg) { - udpDetails.srcip = arg; - configure_mac(); - } - } - } - return Server_SendResult(file_des, INT32, NULL, 0); + // only set + if (Server_VerifyLock() == OK) { + if (check_detector_idle() == OK) { + if (udpDetails.srcip != arg) { + udpDetails.srcip = arg; + configure_mac(); + } + } + } + return Server_SendResult(file_des, INT32, NULL, 0); } int get_source_udp_ip(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t retval = -1; - LOG(logDEBUG1, ("Getting udp source ip\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t retval = -1; + LOG(logDEBUG1, ("Getting udp source ip\n")); - // get only - retval = udpDetails.srcip; - retval = __builtin_bswap32(retval); - LOG(logDEBUG1, ("udp soure ip retval: 0x%x\n", retval)); + // get only + retval = udpDetails.srcip; + retval = __builtin_bswap32(retval); + LOG(logDEBUG1, ("udp soure ip retval: 0x%x\n", retval)); - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_source_udp_ip2(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - arg = __builtin_bswap32(arg); - LOG(logINFO, ("Setting udp source ip2: 0x%x\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + arg = __builtin_bswap32(arg); + LOG(logINFO, ("Setting udp source ip2: 0x%x\n", arg)); #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (check_detector_idle() == OK) { - if (udpDetails.srcip2 != arg) { - udpDetails.srcip2 = arg; - configure_mac(); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (check_detector_idle() == OK) { + if (udpDetails.srcip2 != arg) { + udpDetails.srcip2 = arg; + configure_mac(); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_source_udp_ip2(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t retval = -1; - LOG(logDEBUG1, ("Getting udp source ip2\n")); - + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t retval = -1; + LOG(logDEBUG1, ("Getting udp source ip2\n")); + #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // get only - retval = udpDetails.srcip2; - retval = __builtin_bswap32(retval); - LOG(logDEBUG1, ("udp soure ip2 retval: 0x%x\n", retval)); + // get only + retval = udpDetails.srcip2; + retval = __builtin_bswap32(retval); + LOG(logDEBUG1, ("udp soure ip2 retval: 0x%x\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int set_dest_udp_ip(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - arg = __builtin_bswap32(arg); - LOG(logINFO, ("Setting udp destination ip: 0x%x\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + arg = __builtin_bswap32(arg); + LOG(logINFO, ("Setting udp destination ip: 0x%x\n", arg)); - // only set - if (Server_VerifyLock() == OK) { - if (check_detector_idle() == OK) { - if (udpDetails.dstip != arg) { - udpDetails.dstip = arg; - configure_mac(); - } - } - } - return Server_SendResult(file_des, INT32, NULL, 0); + // only set + if (Server_VerifyLock() == OK) { + if (check_detector_idle() == OK) { + if (udpDetails.dstip != arg) { + udpDetails.dstip = arg; + configure_mac(); + } + } + } + return Server_SendResult(file_des, INT32, NULL, 0); } int get_dest_udp_ip(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t retval = -1; - LOG(logDEBUG1, ("Getting destination ip\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t retval = -1; + LOG(logDEBUG1, ("Getting destination ip\n")); - // get only - retval = udpDetails.dstip; - retval = __builtin_bswap32(retval); - LOG(logDEBUG1, ("udp destination ip retval: 0x%x\n", retval)); + // get only + retval = udpDetails.dstip; + retval = __builtin_bswap32(retval); + LOG(logDEBUG1, ("udp destination ip retval: 0x%x\n", retval)); - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_dest_udp_ip2(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - arg = __builtin_bswap32(arg); - LOG(logINFO, ("Setting udp destination ip2: 0x%x\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + arg = __builtin_bswap32(arg); + LOG(logINFO, ("Setting udp destination ip2: 0x%x\n", arg)); #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (check_detector_idle() == OK) { - if (udpDetails.dstip2 != arg) { - udpDetails.dstip2 = arg; - configure_mac(); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (check_detector_idle() == OK) { + if (udpDetails.dstip2 != arg) { + udpDetails.dstip2 = arg; + configure_mac(); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_dest_udp_ip2(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t retval = -1; - LOG(logDEBUG1, ("Getting udp destination ip2\n")); - + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t retval = -1; + LOG(logDEBUG1, ("Getting udp destination ip2\n")); + #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // get only - retval = udpDetails.dstip2; - retval = __builtin_bswap32(retval); - LOG(logDEBUG1, ("udp destination ip2 retval: 0x%x\n", retval)); + // get only + retval = udpDetails.dstip2; + retval = __builtin_bswap32(retval); + LOG(logDEBUG1, ("udp destination ip2 retval: 0x%x\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_source_udp_mac(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting udp source mac: 0x%lx\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting udp source mac: 0x%lx\n", arg)); - // only set - if (Server_VerifyLock() == OK) { - if (check_detector_idle() == OK) { - if (udpDetails.srcmac != arg) { - udpDetails.srcmac = arg; - configure_mac(); - } - } - } - return Server_SendResult(file_des, INT64, NULL, 0); + // only set + if (Server_VerifyLock() == OK) { + if (check_detector_idle() == OK) { + if (udpDetails.srcmac != arg) { + udpDetails.srcmac = arg; + configure_mac(); + } + } + } + return Server_SendResult(file_des, INT64, NULL, 0); } - int get_source_udp_mac(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t retval = -1; - LOG(logDEBUG1, ("Getting udp source mac\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t retval = -1; + LOG(logDEBUG1, ("Getting udp source mac\n")); - // get only - retval = udpDetails.srcmac; - LOG(logDEBUG1, ("udp soure mac retval: 0x%lx\n", retval)); + // get only + retval = udpDetails.srcmac; + LOG(logDEBUG1, ("udp soure mac retval: 0x%lx\n", retval)); - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } - - int set_source_udp_mac2(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting udp source mac2: 0x%lx\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting udp source mac2: 0x%lx\n", arg)); #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (check_detector_idle() == OK) { - if (udpDetails.srcmac2 != arg) { - udpDetails.srcmac2 = arg; - configure_mac(); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (check_detector_idle() == OK) { + if (udpDetails.srcmac2 != arg) { + udpDetails.srcmac2 = arg; + configure_mac(); + } + } + } #endif - return Server_SendResult(file_des, INT64, NULL, 0); + return Server_SendResult(file_des, INT64, NULL, 0); } int get_source_udp_mac2(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t retval = -1; - LOG(logDEBUG1, ("Getting udp source mac2\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t retval = -1; + LOG(logDEBUG1, ("Getting udp source mac2\n")); #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // get only - retval = udpDetails.srcmac2; - LOG(logDEBUG1, ("udp soure mac2 retval: 0x%lx\n", retval)); + // get only + retval = udpDetails.srcmac2; + LOG(logDEBUG1, ("udp soure mac2 retval: 0x%lx\n", retval)); #endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } - - int set_dest_udp_mac(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting udp destination mac: 0x%lx\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting udp destination mac: 0x%lx\n", arg)); - // only set - if (Server_VerifyLock() == OK) { - if (check_detector_idle() == OK) { - if (udpDetails.dstmac != arg) { - udpDetails.dstmac = arg; - configure_mac(); - } - } - } - return Server_SendResult(file_des, INT64, NULL, 0); + // only set + if (Server_VerifyLock() == OK) { + if (check_detector_idle() == OK) { + if (udpDetails.dstmac != arg) { + udpDetails.dstmac = arg; + configure_mac(); + } + } + } + return Server_SendResult(file_des, INT64, NULL, 0); } int get_dest_udp_mac(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t retval = -1; - LOG(logDEBUG1, ("Getting udp destination mac\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t retval = -1; + LOG(logDEBUG1, ("Getting udp destination mac\n")); - // get only - retval = udpDetails.dstmac; - LOG(logDEBUG1, ("udp destination mac retval: 0x%lx\n", retval)); + // get only + retval = udpDetails.dstmac; + LOG(logDEBUG1, ("udp destination mac retval: 0x%lx\n", retval)); - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } - - - int set_dest_udp_mac2(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting udp destination mac2: 0x%lx\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting udp destination mac2: 0x%lx\n", arg)); #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (check_detector_idle() == OK) { - if (udpDetails.dstmac2 != arg) { - udpDetails.dstmac2 = arg; - configure_mac(); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (check_detector_idle() == OK) { + if (udpDetails.dstmac2 != arg) { + udpDetails.dstmac2 = arg; + configure_mac(); + } + } + } #endif - return Server_SendResult(file_des, INT64, NULL, 0); + return Server_SendResult(file_des, INT64, NULL, 0); } int get_dest_udp_mac2(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint64_t retval = -1; - LOG(logDEBUG1, ("Getting udp destination mac2\n")); - + ret = OK; + memset(mess, 0, sizeof(mess)); + uint64_t retval = -1; + LOG(logDEBUG1, ("Getting udp destination mac2\n")); + #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // get only - retval = udpDetails.dstmac2; - LOG(logDEBUG1, ("udp destination mac2 retval: 0x%lx\n", retval)); + // get only + retval = udpDetails.dstmac2; + LOG(logDEBUG1, ("udp destination mac2 retval: 0x%lx\n", retval)); #endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } - - - int set_dest_udp_port(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting udp destination port: %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting udp destination port: %u\n", arg)); - // only set - if (Server_VerifyLock() == OK) { - if (check_detector_idle() == OK) { - if (udpDetails.dstport != arg) { - udpDetails.dstport = arg; - configure_mac(); - } - } - } - return Server_SendResult(file_des, INT32, NULL, 0); + // only set + if (Server_VerifyLock() == OK) { + if (check_detector_idle() == OK) { + if (udpDetails.dstport != arg) { + udpDetails.dstport = arg; + configure_mac(); + } + } + } + return Server_SendResult(file_des, INT32, NULL, 0); } int get_dest_udp_port(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; - LOG(logDEBUG1, ("Getting destination porstore in ram moden")); + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; + LOG(logDEBUG1, ("Getting destination porstore in ram moden")); - // get only - retval = udpDetails.dstport; - LOG(logDEBUG, ("udp destination port retstore in ram model: %u\n", retval)); + // get only + retval = udpDetails.dstport; + LOG(logDEBUG, ("udp destination port retstore in ram model: %u\n", retval)); - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_dest_udp_port2(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting udp destination port2: %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting udp destination port2: %u\n", arg)); #if !defined(JUNGFRAUD) && !defined(EIGERD) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (check_detector_idle() == OK) { - if (udpDetails.dstport2 != arg) { - udpDetails.dstport2 = arg; - configure_mac(); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (check_detector_idle() == OK) { + if (udpDetails.dstport2 != arg) { + udpDetails.dstport2 = arg; + configure_mac(); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_dest_udp_port2(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; - LOG(logDEBUG1, ("Getting destination port2\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; + LOG(logDEBUG1, ("Getting destination port2\n")); #if !defined(JUNGFRAUD) && !defined(EIGERD) - functionNotImplemented(); + functionNotImplemented(); #else - // get only - retval = udpDetails.dstport2; - LOG(logDEBUG1, ("udp destination port2 retval: %u\n", retval)); + // get only + retval = udpDetails.dstport2; + LOG(logDEBUG1, ("udp destination port2 retval: %u\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - - int set_num_interfaces(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting number of interfaces: %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting number of interfaces: %d\n", arg)); #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (arg < 1 || arg > 2) { - ret = FAIL; - sprintf(mess, "Could not number of interfaces to %d. Options[1, 2]\n", arg); - LOG(logERROR,(mess)); - } else if (check_detector_idle() == OK) { - if (getNumberofUDPInterfaces() != arg) { - setNumberofUDPInterfaces(arg); - calculate_and_set_position(); // aleady configures mac - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (arg < 1 || arg > 2) { + ret = FAIL; + sprintf(mess, + "Could not number of interfaces to %d. Options[1, 2]\n", + arg); + LOG(logERROR, (mess)); + } else if (check_detector_idle() == OK) { + if (getNumberofUDPInterfaces() != arg) { + setNumberofUDPInterfaces(arg); + calculate_and_set_position(); // aleady configures mac + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_num_interfaces(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; - LOG(logDEBUG1, ("Getting number of udp interfaces\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; + LOG(logDEBUG1, ("Getting number of udp interfaces\n")); #ifndef JUNGFRAUD - retval = 1; + retval = 1; #else - // get only - retval = getNumberofUDPInterfaces(); + // get only + retval = getNumberofUDPInterfaces(); #endif - LOG(logDEBUG1, ("Number of udp interfaces retval: %u\n", retval)); - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + LOG(logDEBUG1, ("Number of udp interfaces retval: %u\n", retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_interface_sel(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting selected interface: %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting selected interface: %d\n", arg)); #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (arg < 0 || arg > 1) { - ret = FAIL; - sprintf(mess, "Could not set primary interface %d. Options[0, 1]\n", arg); - LOG(logERROR,(mess)); - } else if (check_detector_idle() == OK) { - if (getPrimaryInterface() != arg) { - selectPrimaryInterface(arg); - configure_mac(); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (arg < 0 || arg > 1) { + ret = FAIL; + sprintf(mess, "Could not set primary interface %d. Options[0, 1]\n", + arg); + LOG(logERROR, (mess)); + } else if (check_detector_idle() == OK) { + if (getPrimaryInterface() != arg) { + selectPrimaryInterface(arg); + configure_mac(); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_interface_sel(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; - LOG(logDEBUG1, ("Getting selected interface\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; + LOG(logDEBUG1, ("Getting selected interface\n")); #ifndef JUNGFRAUD - functionNotImplemented(); + functionNotImplemented(); #else - // get only - retval = getPrimaryInterface(); - LOG(logDEBUG1, ("Selected interface retval: %u\n", retval)); + // get only + retval = getPrimaryInterface(); + LOG(logDEBUG1, ("Selected interface retval: %u\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - int set_parallel_mode(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting parallel mode: %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting parallel mode: %u\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if(setParallelMode(arg) == FAIL) { - ret = FAIL; - sprintf(mess, "Could not set parallel mode\n"); - LOG(logERROR,(mess)); - } else { - int retval = getParallelMode(); - if (arg != retval) { - ret = FAIL; - sprintf(mess, "Could not set parallel mode. Set %d, but read %d\n", retval, arg); - LOG(logERROR,(mess)); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (setParallelMode(arg) == FAIL) { + ret = FAIL; + sprintf(mess, "Could not set parallel mode\n"); + LOG(logERROR, (mess)); + } else { + int retval = getParallelMode(); + if (arg != retval) { + ret = FAIL; + sprintf(mess, + "Could not set parallel mode. Set %d, but read %d\n", + retval, arg); + LOG(logERROR, (mess)); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_parallel_mode(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting parallel mode\n")); + LOG(logDEBUG1, ("Getting parallel mode\n")); #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getParallelMode(); - LOG(logDEBUG1, ("parallel mode retval: %u\n", retval)); + functionNotImplemented(); +#else + // get only + retval = getParallelMode(); + LOG(logDEBUG1, ("parallel mode retval: %u\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int set_overflow_mode(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting overflow mode: %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting overflow mode: %u\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if(setOverFlowMode(arg) == FAIL) { - ret = FAIL; - sprintf(mess, "Could not set overflow mode\n"); - LOG(logERROR,(mess)); - } else { - int retval = getOverFlowMode(); - if (arg != retval) { - ret = FAIL; - sprintf(mess, "Could not set overflow mode. Set %d, but read %d\n", retval, arg); - LOG(logERROR,(mess)); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (setOverFlowMode(arg) == FAIL) { + ret = FAIL; + sprintf(mess, "Could not set overflow mode\n"); + LOG(logERROR, (mess)); + } else { + int retval = getOverFlowMode(); + if (arg != retval) { + ret = FAIL; + sprintf(mess, + "Could not set overflow mode. Set %d, but read %d\n", + retval, arg); + LOG(logERROR, (mess)); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_overflow_mode(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting overflow mode\n")); + LOG(logDEBUG1, ("Getting overflow mode\n")); #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getOverFlowMode(); - LOG(logDEBUG1, ("overflow mode retval: %u\n", retval)); + functionNotImplemented(); +#else + // get only + retval = getOverFlowMode(); + LOG(logDEBUG1, ("overflow mode retval: %u\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int set_storeinram(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting store in ram mode: %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting store in ram mode: %u\n", arg)); #ifndef EIGERD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - setStoreInRamMode(arg); - } + // only set + if (Server_VerifyLock() == OK) { + setStoreInRamMode(arg); + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_storeinram(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting store in ram mode\n")); + LOG(logDEBUG1, ("Getting store in ram mode\n")); #ifndef EIGERD - functionNotImplemented(); -#else - // get only - retval = getStoreInRamMode(); - LOG(logDEBUG1, ("store in ram mode retval: %u\n", retval)); + functionNotImplemented(); +#else + // get only + retval = getStoreInRamMode(); + LOG(logDEBUG1, ("store in ram mode retval: %u\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int set_readout_mode(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting readout mode: %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting readout mode: %u\n", arg)); #ifndef CHIPTESTBOARDD - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - switch(arg){ - case ANALOG_ONLY: - case DIGITAL_ONLY: - case ANALOG_AND_DIGITAL: - break; - default: - modeNotImplemented("Readout mode", (int)arg); - break; - } - if (ret == OK) { - if (setReadoutMode(arg) == FAIL) { - ret = FAIL; - sprintf(mess, "Could not set readout mode\n"); - LOG(logERROR,(mess)); - } else { - int retval = getReadoutMode(); - if (retval == -1) { - ret = FAIL; - sprintf(mess, "Could not get readout mode\n"); - LOG(logERROR,(mess)); - } else { - LOG(logDEBUG1, ("readout mode retval: %u\n", retval)); - } - validate(arg, retval, "set readout mode", DEC); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + switch (arg) { + case ANALOG_ONLY: + case DIGITAL_ONLY: + case ANALOG_AND_DIGITAL: + break; + default: + modeNotImplemented("Readout mode", (int)arg); + break; + } + if (ret == OK) { + if (setReadoutMode(arg) == FAIL) { + ret = FAIL; + sprintf(mess, "Could not set readout mode\n"); + LOG(logERROR, (mess)); + } else { + int retval = getReadoutMode(); + if (retval == -1) { + ret = FAIL; + sprintf(mess, "Could not get readout mode\n"); + LOG(logERROR, (mess)); + } else { + LOG(logDEBUG1, ("readout mode retval: %u\n", retval)); + } + validate(arg, retval, "set readout mode", DEC); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_readout_mode(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting readout mode\n")); + LOG(logDEBUG1, ("Getting readout mode\n")); #ifndef CHIPTESTBOARDD - functionNotImplemented(); -#else - // get only - retval = getReadoutMode(); - if (retval == -1) { - ret = FAIL; - sprintf(mess, "Could not get readout mode\n"); - LOG(logERROR,(mess)); - } else { - LOG(logDEBUG1, ("readout mode retval: %u\n", retval)); - } + functionNotImplemented(); +#else + // get only + retval = getReadoutMode(); + if (retval == -1) { + ret = FAIL; + sprintf(mess, "Could not get readout mode\n"); + LOG(logERROR, (mess)); + } else { + LOG(logDEBUG1, ("readout mode retval: %u\n", retval)); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - - int set_clock_frequency(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[2] = {-1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[2] = {-1, -1}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting clock (%d) frequency : %u\n", args[0], args[1])); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting clock (%d) frequency : %u\n", args[0], args[1])); #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - int ind = args[0]; - int val = args[1]; - enum CLKINDEX c = 0; - switch (ind) { - case ADC_CLOCK: - c = ADC_CLK; - break; + // only set + if (Server_VerifyLock() == OK) { + int ind = args[0]; + int val = args[1]; + enum CLKINDEX c = 0; + switch (ind) { + case ADC_CLOCK: + c = ADC_CLK; + break; #ifdef CHIPTESTBOARDD - case DBIT_CLOCK: - c = DBIT_CLK; - break; + case DBIT_CLOCK: + c = DBIT_CLK; + break; #endif - case RUN_CLOCK: - c = RUN_CLK; - break; - case SYNC_CLOCK: - ret = FAIL; - sprintf(mess, "Cannot set sync clock frequency.\n"); - LOG(logERROR,(mess)); - break; - default: - modeNotImplemented("clock index (frequency set)", ind); - break; - } + case RUN_CLOCK: + c = RUN_CLK; + break; + case SYNC_CLOCK: + ret = FAIL; + sprintf(mess, "Cannot set sync clock frequency.\n"); + LOG(logERROR, (mess)); + break; + default: + modeNotImplemented("clock index (frequency set)", ind); + break; + } - if (ret != FAIL) { - char* clock_names[] = {CLK_NAMES}; - char modeName[50] = ""; - sprintf(modeName, "%s clock (%d) frequency", clock_names[c], (int)c); + if (ret != FAIL) { + char *clock_names[] = {CLK_NAMES}; + char modeName[50] = ""; + sprintf(modeName, "%s clock (%d) frequency", clock_names[c], + (int)c); - if (getFrequency(c) == val) { - LOG(logINFO, ("Same %s: %d %s\n", modeName, val, myDetectorType == GOTTHARD2 ? "Hz" : "MHz")); - } else { - setFrequency(c, val); - int retval = getFrequency(c); - LOG(logDEBUG1, ("retval %s: %d %s\n", modeName, retval, myDetectorType == GOTTHARD2 ? "Hz" : "MHz")); - validate(val, retval, modeName, DEC); - } - } - } + if (getFrequency(c) == val) { + LOG(logINFO, ("Same %s: %d %s\n", modeName, val, + myDetectorType == GOTTHARD2 ? "Hz" : "MHz")); + } else { + setFrequency(c, val); + int retval = getFrequency(c); + LOG(logDEBUG1, ("retval %s: %d %s\n", modeName, retval, + myDetectorType == GOTTHARD2 ? "Hz" : "MHz")); + validate(val, retval, modeName, DEC); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_clock_frequency(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; - - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Getting clock (%d) frequency\n", arg)); + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; -#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) - functionNotImplemented(); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Getting clock (%d) frequency\n", arg)); + +#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(GOTTHARD2D) && \ + !defined(MYTHEN3D) + functionNotImplemented(); #else - // get only - enum CLKINDEX c = 0; - switch (arg) { -#if defined(CHIPTESTBOARDD) || defined(MOENCHD) - case ADC_CLOCK: - c = ADC_CLK; - break; + // get only + enum CLKINDEX c = 0; + switch (arg) { +#if defined(CHIPTESTBOARDD) || defined(MOENCHD) + case ADC_CLOCK: + c = ADC_CLK; + break; #ifdef CHIPTESTBOARDD - case DBIT_CLOCK: - c = DBIT_CLK; - break; + case DBIT_CLOCK: + c = DBIT_CLK; + break; #endif - case RUN_CLOCK: - c = RUN_CLK; - break; - case SYNC_CLOCK: - c = SYNC_CLK; - break; + case RUN_CLOCK: + c = RUN_CLK; + break; + case SYNC_CLOCK: + c = SYNC_CLK; + break; #endif - default: + default: #if defined(GOTTHARD2D) || defined(MYTHEN3D) - if (arg < NUM_CLOCKS) { - c = (enum CLKINDEX)arg; - break; - } + if (arg < NUM_CLOCKS) { + c = (enum CLKINDEX)arg; + break; + } #endif - modeNotImplemented("clock index (frequency get)", arg); - break; - } - if (ret == OK) { - retval = getFrequency(c); - char* clock_names[] = {CLK_NAMES}; - LOG(logDEBUG1, ("retval %s clock (%d) frequency: %d %s\n", clock_names[c], (int)c, retval, myDetectorType == GOTTHARD2 || myDetectorType == MYTHEN3 ? "Hz" : "MHz")); - } + modeNotImplemented("clock index (frequency get)", arg); + break; + } + if (ret == OK) { + retval = getFrequency(c); + char *clock_names[] = {CLK_NAMES}; + LOG(logDEBUG1, + ("retval %s clock (%d) frequency: %d %s\n", clock_names[c], (int)c, + retval, + myDetectorType == GOTTHARD2 || myDetectorType == MYTHEN3 ? "Hz" + : "MHz")); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_clock_phase(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[3] = {-1, -1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[3] = {-1, -1, -1}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting clock (%d) phase: %u %s\n", args[0], args[1], (args[2] == 0 ? "" : "degrees"))); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting clock (%d) phase: %u %s\n", args[0], args[1], + (args[2] == 0 ? "" : "degrees"))); -#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(JUNGFRAUD)&& !defined(GOTTHARDD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) - functionNotImplemented(); +#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(JUNGFRAUD) && \ + !defined(GOTTHARDD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - int ind = args[0]; - int val = args[1]; - int inDegrees = args[2] == 0 ? 0 : 1; - enum CLKINDEX c = 0; - switch (ind) { -#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD) || defined(GOTTHARDD) - case ADC_CLOCK: - c = ADC_CLK; - break; + // only set + if (Server_VerifyLock() == OK) { + int ind = args[0]; + int val = args[1]; + int inDegrees = args[2] == 0 ? 0 : 1; + enum CLKINDEX c = 0; + switch (ind) { +#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD) || \ + defined(GOTTHARDD) + case ADC_CLOCK: + c = ADC_CLK; + break; #endif #if defined(CHIPTESTBOARDD) || defined(JUNGFRAUD) - case DBIT_CLOCK: - c = DBIT_CLK; - break; + case DBIT_CLOCK: + c = DBIT_CLK; + break; #endif - default: + default: #if defined(GOTTHARD2D) || defined(MYTHEN3D) - if (ind < NUM_CLOCKS) { - c = (enum CLKINDEX)ind; - break; - } + if (ind < NUM_CLOCKS) { + c = (enum CLKINDEX)ind; + break; + } #endif - modeNotImplemented("clock index (phase set)", ind); - break; - } - if (ret != FAIL) { - char* clock_names[] = {CLK_NAMES}; - char modeName[50] = ""; - sprintf(modeName, "%s clock (%d) phase %s", clock_names[c], (int)c, (inDegrees == 0 ? "" : "(degrees)")); + modeNotImplemented("clock index (phase set)", ind); + break; + } + if (ret != FAIL) { + char *clock_names[] = {CLK_NAMES}; + char modeName[50] = ""; + sprintf(modeName, "%s clock (%d) phase %s", clock_names[c], (int)c, + (inDegrees == 0 ? "" : "(degrees)")); - // gotthard1d doesnt take degrees and cannot get phase + // gotthard1d doesnt take degrees and cannot get phase #ifdef GOTTHARDD - if (inDegrees != 0) { - ret = FAIL; - strcpy(mess, "Cannot set phase in degrees for this detector.\n"); - LOG(logERROR, (mess)); - } + if (inDegrees != 0) { + ret = FAIL; + strcpy(mess, + "Cannot set phase in degrees for this detector.\n"); + LOG(logERROR, (mess)); + } #else - if (getPhase(c, inDegrees) == val) { - LOG(logINFO, ("Same %s: %d\n", modeName, val)); - } else if (inDegrees && (val < 0 || val > 359)) { - ret = FAIL; - sprintf(mess, "Cannot set %s to %d degrees. Phase outside limits (0 - 359°C)\n", modeName, val); - LOG(logERROR, (mess)); - } else if (!inDegrees && (val < 0 || val > getMaxPhase(c) - 1)) { - ret = FAIL; - sprintf(mess, "Cannot set %s to %d. Phase outside limits (0 - %d phase shifts)\n", modeName, val, getMaxPhase(c) - 1); - LOG(logERROR, (mess)); - } + if (getPhase(c, inDegrees) == val) { + LOG(logINFO, ("Same %s: %d\n", modeName, val)); + } else if (inDegrees && (val < 0 || val > 359)) { + ret = FAIL; + sprintf(mess, + "Cannot set %s to %d degrees. Phase outside limits (0 " + "- 359°C)\n", + modeName, val); + LOG(logERROR, (mess)); + } else if (!inDegrees && (val < 0 || val > getMaxPhase(c) - 1)) { + ret = FAIL; + sprintf(mess, + "Cannot set %s to %d. Phase outside limits (0 - %d " + "phase shifts)\n", + modeName, val, getMaxPhase(c) - 1); + LOG(logERROR, (mess)); + } #endif - else { - int ret = setPhase(c, val, inDegrees); - if (ret == FAIL) { - sprintf(mess, "Could not set %s to %d.\n", modeName, val); - LOG(logERROR, (mess)); - } + else { + int ret = setPhase(c, val, inDegrees); + if (ret == FAIL) { + sprintf(mess, "Could not set %s to %d.\n", modeName, val); + LOG(logERROR, (mess)); + } - // gotthard1d doesnt take degrees and cannot get phase -#ifndef GOTTHARDD - else { - int retval = getPhase(c, inDegrees); - LOG(logDEBUG1, ("retval %s : %d\n", modeName, retval)); - if (!inDegrees) { - validate(val, retval, modeName, DEC); - } else { - ret = validatePhaseinDegrees(c, val, retval); - if (ret == FAIL) { - sprintf(mess, "Could not set %s. Set %d degrees, got %d degrees\n", modeName, val, retval); - LOG(logERROR,(mess)); - } - } - } -#endif - } - } - } + // gotthard1d doesnt take degrees and cannot get phase +#ifndef GOTTHARDD + else { + int retval = getPhase(c, inDegrees); + LOG(logDEBUG1, ("retval %s : %d\n", modeName, retval)); + if (!inDegrees) { + validate(val, retval, modeName, DEC); + } else { + ret = validatePhaseinDegrees(c, val, retval); + if (ret == FAIL) { + sprintf(mess, + "Could not set %s. Set %d degrees, got %d " + "degrees\n", + modeName, val, retval); + LOG(logERROR, (mess)); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + } + } + } +#endif + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_clock_phase(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[2] = {-1, -1}; - int retval = -1; - - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logINFOBLUE, ("Getting clock (%d) phase %s \n", args[0], (args[1] == 0 ? "" : "in degrees"))); + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[2] = {-1, -1}; + int retval = -1; -#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) - functionNotImplemented(); -#else - // get only - int ind = args[0]; - int inDegrees = args[1] == 0 ? 0 : 1; - enum CLKINDEX c = 0; - switch (ind) { -#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD) - case ADC_CLOCK: - c = ADC_CLK; - break; + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logINFOBLUE, ("Getting clock (%d) phase %s \n", args[0], + (args[1] == 0 ? "" : "in degrees"))); + +#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(JUNGFRAUD) && \ + !defined(GOTTHARD2D) && !defined(MYTHEN3D) + functionNotImplemented(); +#else + // get only + int ind = args[0]; + int inDegrees = args[1] == 0 ? 0 : 1; + enum CLKINDEX c = 0; + switch (ind) { +#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD) + case ADC_CLOCK: + c = ADC_CLK; + break; #endif -#if defined(CHIPTESTBOARDD) || defined(JUNGFRAUD) - case DBIT_CLOCK: - c = DBIT_CLK; - break; +#if defined(CHIPTESTBOARDD) || defined(JUNGFRAUD) + case DBIT_CLOCK: + c = DBIT_CLK; + break; #endif - default: + default: #if defined(GOTTHARD2D) || defined(MYTHEN3D) - if (ind < NUM_CLOCKS) { - c = (enum CLKINDEX)ind; - LOG(logINFOBLUE, ("NUMclocks:%d c:%d\n", NUM_CLOCKS, c)); - break; - } + if (ind < NUM_CLOCKS) { + c = (enum CLKINDEX)ind; + LOG(logINFOBLUE, ("NUMclocks:%d c:%d\n", NUM_CLOCKS, c)); + break; + } #endif - modeNotImplemented("clock index (phase get)", ind); - break; - } - if (ret == OK) { - retval = getPhase(c, inDegrees); - char* clock_names[] = {CLK_NAMES}; - LOG(logDEBUG1, ("retval %s clock (%d) phase: %d %s\n", clock_names[c], (int)c, retval, (inDegrees == 0 ? "" : "degrees"))); - } + modeNotImplemented("clock index (phase get)", ind); + break; + } + if (ret == OK) { + retval = getPhase(c, inDegrees); + char *clock_names[] = {CLK_NAMES}; + LOG(logDEBUG1, ("retval %s clock (%d) phase: %d %s\n", clock_names[c], + (int)c, retval, (inDegrees == 0 ? "" : "degrees"))); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int get_max_clock_phase_shift(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; - - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Getting clock (%d) max phase shift\n", arg)); + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; -#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) - functionNotImplemented(); -#else - // get only - enum CLKINDEX c = 0; - switch (arg) { -#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD) - case ADC_CLOCK: - c = ADC_CLK; - break; + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Getting clock (%d) max phase shift\n", arg)); + +#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) && !defined(JUNGFRAUD) && \ + !defined(GOTTHARD2D) && !defined(MYTHEN3D) + functionNotImplemented(); +#else + // get only + enum CLKINDEX c = 0; + switch (arg) { +#if defined(CHIPTESTBOARDD) || defined(MOENCHD) || defined(JUNGFRAUD) + case ADC_CLOCK: + c = ADC_CLK; + break; #endif -#if defined(CHIPTESTBOARDD) || defined(JUNGFRAUD) - case DBIT_CLOCK: - c = DBIT_CLK; - break; +#if defined(CHIPTESTBOARDD) || defined(JUNGFRAUD) + case DBIT_CLOCK: + c = DBIT_CLK; + break; #endif - default: + default: #if defined(GOTTHARD2D) || defined(MYTHEN3D) - if (arg < NUM_CLOCKS) { - c = (enum CLKINDEX)arg; - break; - } + if (arg < NUM_CLOCKS) { + c = (enum CLKINDEX)arg; + break; + } #endif - modeNotImplemented("clock index (max phase get)", arg); - break; - } - if (ret == OK) { - retval = getMaxPhase(c); - char* clock_names[] = {CLK_NAMES}; - LOG(logDEBUG1, ("retval %s clock (%d) max phase shift: %d\n", clock_names[c], (int)c, retval)); - } + modeNotImplemented("clock index (max phase get)", arg); + break; + } + if (ret == OK) { + retval = getMaxPhase(c); + char *clock_names[] = {CLK_NAMES}; + LOG(logDEBUG1, ("retval %s clock (%d) max phase shift: %d\n", + clock_names[c], (int)c, retval)); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int set_clock_divider(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[2] = {-1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[2] = {-1, -1}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting clock (%d) divider: %u\n", args[0], args[1])); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting clock (%d) divider: %u\n", args[0], args[1])); -#if !defined(EIGERD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) - functionNotImplemented(); +#if !defined(EIGERD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D) && \ + !defined(MYTHEN3D) + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - int ind = args[0]; - int val = args[1]; - enum CLKINDEX c = 0; - switch (ind) { - // specific clock index -#if defined(EIGERD) || defined(JUNGFRAUD) - case RUN_CLOCK: - c = RUN_CLK; - break; + // only set + if (Server_VerifyLock() == OK) { + int ind = args[0]; + int val = args[1]; + enum CLKINDEX c = 0; + switch (ind) { + // specific clock index +#if defined(EIGERD) || defined(JUNGFRAUD) + case RUN_CLOCK: + c = RUN_CLK; + break; #endif - default: - // any clock index + default: + // any clock index #if defined(GOTTHARD2D) || defined(MYTHEN3D) - if (ind < NUM_CLOCKS) { - c = (enum CLKINDEX)ind; - break; - } + if (ind < NUM_CLOCKS) { + c = (enum CLKINDEX)ind; + break; + } #endif - modeNotImplemented("clock index (divider set)", ind); - break; - } + modeNotImplemented("clock index (divider set)", ind); + break; + } - // validate val range - if (ret != FAIL) { + // validate val range + if (ret != FAIL) { #ifdef JUNGFRAUD - if (val == (int)FULL_SPEED && isHardwareVersion2()) { - ret = FAIL; - strcpy(mess, "Full speed not implemented for this board version.\n"); - LOG(logERROR,(mess)); - } else + if (val == (int)FULL_SPEED && isHardwareVersion2()) { + ret = FAIL; + strcpy(mess, + "Full speed not implemented for this board version.\n"); + LOG(logERROR, (mess)); + } else #endif #if defined(GOTTHARD2D) || defined(MYTHEN3D) - if (val < 2 || val > getMaxClockDivider()) { - char* clock_names[] = {CLK_NAMES}; - ret = FAIL; - sprintf(mess, "Cannot set %s clock(%d) to %d. Value should be in range [2-%d]\n", clock_names[c], (int)c, val, getMaxClockDivider()); - LOG(logERROR, (mess)); - } + if (val < 2 || val > getMaxClockDivider()) { + char *clock_names[] = {CLK_NAMES}; + ret = FAIL; + sprintf(mess, + "Cannot set %s clock(%d) to %d. Value should be in " + "range [2-%d]\n", + clock_names[c], (int)c, val, getMaxClockDivider()); + LOG(logERROR, (mess)); + } #else - if (val < (int)FULL_SPEED || val > (int)QUARTER_SPEED) { - ret = FAIL; - sprintf(mess, "Cannot set speed to %d. Value should be in range [%d-%d]\n", val, (int)FULL_SPEED, (int)QUARTER_SPEED); - LOG(logERROR, (mess)); - } -#endif - } + if (val < (int)FULL_SPEED || val > (int)QUARTER_SPEED) { + ret = FAIL; + sprintf(mess, + "Cannot set speed to %d. Value should be in range " + "[%d-%d]\n", + val, (int)FULL_SPEED, (int)QUARTER_SPEED); + LOG(logERROR, (mess)); + } +#endif + } - if (ret != FAIL) { - char modeName[50] = "speed"; + if (ret != FAIL) { + char modeName[50] = "speed"; #if defined(GOTTHARD2D) || defined(MYTHEN3D) - char* clock_names[] = {CLK_NAMES}; - sprintf(modeName, "%s clock (%d) divider", clock_names[c], (int)c); + char *clock_names[] = {CLK_NAMES}; + sprintf(modeName, "%s clock (%d) divider", clock_names[c], (int)c); #endif - if (getClockDivider(c) == val) { - LOG(logINFO, ("Same %s: %d\n", modeName, val)); - } else { - int ret = setClockDivider(c, val); - if (ret == FAIL) { - sprintf(mess, "Could not set %s to %d.\n", modeName, val); - LOG(logERROR, (mess)); - } else { - int retval = getClockDivider(c); - LOG(logDEBUG1, ("retval %s : %d\n", modeName, retval)); - validate(val, retval, modeName, DEC); - } - } - } - } + if (getClockDivider(c) == val) { + LOG(logINFO, ("Same %s: %d\n", modeName, val)); + } else { + int ret = setClockDivider(c, val); + if (ret == FAIL) { + sprintf(mess, "Could not set %s to %d.\n", modeName, val); + LOG(logERROR, (mess)); + } else { + int retval = getClockDivider(c); + LOG(logDEBUG1, ("retval %s : %d\n", modeName, retval)); + validate(val, retval, modeName, DEC); + } + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_clock_divider(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; - - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Getting clock (%d) divider\n", arg)); + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; -#if !defined(EIGERD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D) && !defined(MYTHEN3D) - functionNotImplemented(); -#else - // get only - enum CLKINDEX c = 0; - switch (arg) { -#if defined(EIGERD) || defined(JUNGFRAUD) - case RUN_CLOCK: - c = RUN_CLK; - break; + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Getting clock (%d) divider\n", arg)); + +#if !defined(EIGERD) && !defined(JUNGFRAUD) && !defined(GOTTHARD2D) && \ + !defined(MYTHEN3D) + functionNotImplemented(); +#else + // get only + enum CLKINDEX c = 0; + switch (arg) { +#if defined(EIGERD) || defined(JUNGFRAUD) + case RUN_CLOCK: + c = RUN_CLK; + break; #endif - default: + default: #if defined(GOTTHARD2D) || defined(MYTHEN3D) - if (arg < NUM_CLOCKS) { - c = (enum CLKINDEX)arg; - break; - } + if (arg < NUM_CLOCKS) { + c = (enum CLKINDEX)arg; + break; + } #endif - modeNotImplemented("clock index (divider get)", arg); - break; - } - if (ret == OK) { - retval = getClockDivider(c); - char* clock_names[] = {CLK_NAMES}; - LOG(logDEBUG1, ("retval %s clock (%d) divider: %d\n", clock_names[c], (int)c, retval)); - } + modeNotImplemented("clock index (divider get)", arg); + break; + } + if (ret == OK) { + retval = getClockDivider(c); + char *clock_names[] = {CLK_NAMES}; + LOG(logDEBUG1, ("retval %s clock (%d) divider: %d\n", clock_names[c], + (int)c, retval)); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int set_pipeline(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[2] = {-1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[2] = {-1, -1}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting clock (%d) pipeline : %u\n", args[0], args[1])); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting clock (%d) pipeline : %u\n", args[0], args[1])); #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - int ind = args[0]; - int val = args[1]; - enum CLKINDEX c = 0; - switch (ind) { - case ADC_CLOCK: - c = ADC_CLK; - break; + // only set + if (Server_VerifyLock() == OK) { + int ind = args[0]; + int val = args[1]; + enum CLKINDEX c = 0; + switch (ind) { + case ADC_CLOCK: + c = ADC_CLK; + break; #ifdef CHIPTESTBOARDD - case DBIT_CLOCK: - c = DBIT_CLK; - break; + case DBIT_CLOCK: + c = DBIT_CLK; + break; #endif - default: - modeNotImplemented("clock index (pipeline set)", ind); - break; - } + default: + modeNotImplemented("clock index (pipeline set)", ind); + break; + } - if (ret != FAIL) { - char* clock_names[] = {CLK_NAMES}; - char modeName[50] = ""; - sprintf(modeName, "%s clock (%d) piepline", clock_names[c], (int)c); + if (ret != FAIL) { + char *clock_names[] = {CLK_NAMES}; + char modeName[50] = ""; + sprintf(modeName, "%s clock (%d) piepline", clock_names[c], (int)c); - setPipeline(c, val); - int retval = getPipeline(c); - LOG(logDEBUG1, ("retval %s: %d\n", modeName, retval)); - validate(val, retval, modeName, DEC); - } - } + setPipeline(c, val); + int retval = getPipeline(c); + LOG(logDEBUG1, ("retval %s: %d\n", modeName, retval)); + validate(val, retval, modeName, DEC); + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_pipeline(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retval = -1; - - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Getting clock (%d) frequency\n", arg)); + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retval = -1; + + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Getting clock (%d) frequency\n", arg)); #if !defined(CHIPTESTBOARDD) && !defined(MOENCHD) - functionNotImplemented(); + functionNotImplemented(); #else - // get only - enum CLKINDEX c = 0; - switch (arg) { - case ADC_CLOCK: - c = ADC_CLK; - break; + // get only + enum CLKINDEX c = 0; + switch (arg) { + case ADC_CLOCK: + c = ADC_CLK; + break; #ifdef CHIPTESTBOARDD - case DBIT_CLOCK: - c = DBIT_CLK; - break; + case DBIT_CLOCK: + c = DBIT_CLK; + break; #endif - default: - modeNotImplemented("clock index (pipeline get)", arg); - break; - } - if (ret == OK) { - retval = getPipeline(c); - char* clock_names[] = {CLK_NAMES}; - LOG(logDEBUG1, ("retval %s clock (%d) pipeline: %d\n", clock_names[c], (int)c, retval)); - } + default: + modeNotImplemented("clock index (pipeline get)", arg); + break; + } + if (ret == OK) { + retval = getPipeline(c); + char *clock_names[] = {CLK_NAMES}; + LOG(logDEBUG1, ("retval %s clock (%d) pipeline: %d\n", clock_names[c], + (int)c, retval)); + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - - int set_on_chip_dac(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[3] = {-1, -1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[3] = {-1, -1, -1}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting On chip dac (%d), chip %d: 0x%x\n", args[0], args[1], args[2])); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting On chip dac (%d), chip %d: 0x%x\n", args[0], + args[1], args[2])); #ifndef GOTTHARD2D - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - int ind = args[0]; - int chipIndex = args[1]; - int val = args[2]; - enum ONCHIP_DACINDEX dacIndex = 0; - switch (ind) { - case VB_COMP_FE: - dacIndex = G2_VCHIP_COMP_FE; - break; - case VB_OPA_1ST: - dacIndex = G2_VCHIP_OPA_1ST; - break; - case VB_OPA_FD: - dacIndex = G2_VCHIP_OPA_FD; - break; - case VB_COMP_ADC: - dacIndex = G2_VCHIP_COMP_ADC; - break; - case VREF_COMP_FE: - dacIndex = G2_VCHIP_REF_COMP_FE; - break; - case VB_CS: - dacIndex = G2_VCHIP_CS; - break; - default: - modeNotImplemented("on chip dac index", ind); - break; - } + // only set + if (Server_VerifyLock() == OK) { + int ind = args[0]; + int chipIndex = args[1]; + int val = args[2]; + enum ONCHIP_DACINDEX dacIndex = 0; + switch (ind) { + case VB_COMP_FE: + dacIndex = G2_VCHIP_COMP_FE; + break; + case VB_OPA_1ST: + dacIndex = G2_VCHIP_OPA_1ST; + break; + case VB_OPA_FD: + dacIndex = G2_VCHIP_OPA_FD; + break; + case VB_COMP_ADC: + dacIndex = G2_VCHIP_COMP_ADC; + break; + case VREF_COMP_FE: + dacIndex = G2_VCHIP_REF_COMP_FE; + break; + case VB_CS: + dacIndex = G2_VCHIP_CS; + break; + default: + modeNotImplemented("on chip dac index", ind); + break; + } - if (ret != FAIL) { - char* names[] = {ONCHIP_DAC_NAMES}; - char modeName[50] = ""; - sprintf(modeName, "on-chip-dac (%s, %d, chip:%d)", names[dacIndex], (int)dacIndex, chipIndex); - if (chipIndex < -1 || chipIndex >= NCHIP) { - ret = FAIL; - sprintf(mess, "Could not set %s to %d. Invalid Chip Index. Options[-1, 0 - %d]\n", modeName, val, NCHIP -1); - LOG(logERROR, (mess)); - } else if (val < 0 || val > ONCHIP_DAC_MAX_VAL ) { - ret = FAIL; - sprintf(mess, "Could not set %s to 0x%x. Invalid value. Options:[0 - 0x%x]\n", modeName, val, ONCHIP_DAC_MAX_VAL); - LOG(logERROR, (mess)); - } else { - ret = setOnChipDAC(dacIndex, chipIndex, val); - if (ret == FAIL) { - sprintf(mess, "Could not set %s to 0x%x.\n", modeName, val); - LOG(logERROR, (mess)); - } else { - int retval = getOnChipDAC(dacIndex, chipIndex); - LOG(logDEBUG1, ("retval %s: 0x%x\n", modeName, retval)); - validate(val, retval, modeName, DEC); - } - } - } - } + if (ret != FAIL) { + char *names[] = {ONCHIP_DAC_NAMES}; + char modeName[50] = ""; + sprintf(modeName, "on-chip-dac (%s, %d, chip:%d)", names[dacIndex], + (int)dacIndex, chipIndex); + if (chipIndex < -1 || chipIndex >= NCHIP) { + ret = FAIL; + sprintf(mess, + "Could not set %s to %d. Invalid Chip Index. " + "Options[-1, 0 - %d]\n", + modeName, val, NCHIP - 1); + LOG(logERROR, (mess)); + } else if (val < 0 || val > ONCHIP_DAC_MAX_VAL) { + ret = FAIL; + sprintf(mess, + "Could not set %s to 0x%x. Invalid value. Options:[0 - " + "0x%x]\n", + modeName, val, ONCHIP_DAC_MAX_VAL); + LOG(logERROR, (mess)); + } else { + ret = setOnChipDAC(dacIndex, chipIndex, val); + if (ret == FAIL) { + sprintf(mess, "Could not set %s to 0x%x.\n", modeName, val); + LOG(logERROR, (mess)); + } else { + int retval = getOnChipDAC(dacIndex, chipIndex); + LOG(logDEBUG1, ("retval %s: 0x%x\n", modeName, retval)); + validate(val, retval, modeName, DEC); + } + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_on_chip_dac(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[2] = {-1, -1}; - int retval = -1; - - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Getting On chip dac (%d), chip %d\n", args[0], args[1])); + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[2] = {-1, -1}; + int retval = -1; + + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Getting On chip dac (%d), chip %d\n", args[0], args[1])); #ifndef GOTTHARD2D - functionNotImplemented(); + functionNotImplemented(); #else - // get only - int ind = args[0]; - int chipIndex = args[1]; - enum ONCHIP_DACINDEX dacIndex = 0; - switch (ind) { - case VB_COMP_FE: - dacIndex = G2_VCHIP_COMP_FE; - break; - case VB_OPA_1ST: - dacIndex = G2_VCHIP_OPA_1ST; - break; - case VB_OPA_FD: - dacIndex = G2_VCHIP_OPA_FD; - break; - case VB_COMP_ADC: - dacIndex = G2_VCHIP_COMP_ADC; - break; - case VREF_COMP_FE: - dacIndex = G2_VCHIP_REF_COMP_FE; - break; - case VB_CS: - dacIndex = G2_VCHIP_CS; - break; - default: - modeNotImplemented("on chip dac index", ind); - break; - } - if (ret == OK) { - char* names[] = {ONCHIP_DAC_NAMES}; - char modeName[50] = ""; - sprintf(modeName, "on-chip-dac (%s, %d, chip:%d)", names[dacIndex], (int)dacIndex, chipIndex); - if (chipIndex < -1 || chipIndex >= NCHIP) { - ret = FAIL; - sprintf(mess, "Could not get %s. Invalid Chip Index. Options[-1, 0 - %d]\n", modeName, NCHIP -1); - LOG(logERROR, (mess)); - } else { - retval = getOnChipDAC(dacIndex, chipIndex); - LOG(logDEBUG1, ("retval %s: 0x%x\n", modeName, retval)); - } - } + // get only + int ind = args[0]; + int chipIndex = args[1]; + enum ONCHIP_DACINDEX dacIndex = 0; + switch (ind) { + case VB_COMP_FE: + dacIndex = G2_VCHIP_COMP_FE; + break; + case VB_OPA_1ST: + dacIndex = G2_VCHIP_OPA_1ST; + break; + case VB_OPA_FD: + dacIndex = G2_VCHIP_OPA_FD; + break; + case VB_COMP_ADC: + dacIndex = G2_VCHIP_COMP_ADC; + break; + case VREF_COMP_FE: + dacIndex = G2_VCHIP_REF_COMP_FE; + break; + case VB_CS: + dacIndex = G2_VCHIP_CS; + break; + default: + modeNotImplemented("on chip dac index", ind); + break; + } + if (ret == OK) { + char *names[] = {ONCHIP_DAC_NAMES}; + char modeName[50] = ""; + sprintf(modeName, "on-chip-dac (%s, %d, chip:%d)", names[dacIndex], + (int)dacIndex, chipIndex); + if (chipIndex < -1 || chipIndex >= NCHIP) { + ret = FAIL; + sprintf( + mess, + "Could not get %s. Invalid Chip Index. Options[-1, 0 - %d]\n", + modeName, NCHIP - 1); + LOG(logERROR, (mess)); + } else { + retval = getOnChipDAC(dacIndex, chipIndex); + LOG(logDEBUG1, ("retval %s: 0x%x\n", modeName, retval)); + } + } #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - - int set_inject_channel(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[2] = {-1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[2] = {-1, -1}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting inject channel: [%d, %d]\n", args[0], args[1])); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting inject channel: [%d, %d]\n", args[0], args[1])); #ifndef GOTTHARD2D - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - int offset = args[0]; - int increment = args[1]; - if (offset < 0 || increment < 1) { - ret = FAIL; - sprintf(mess, "Could not inject channel. Invalid offset %d or increment %d\n", offset, increment); - LOG(logERROR, (mess)); - } else { - ret = setInjectChannel(offset, increment); - if (ret == FAIL) { - strcpy(mess, "Could not inject channel\n"); - LOG(logERROR, (mess)); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + int offset = args[0]; + int increment = args[1]; + if (offset < 0 || increment < 1) { + ret = FAIL; + sprintf( + mess, + "Could not inject channel. Invalid offset %d or increment %d\n", + offset, increment); + LOG(logERROR, (mess)); + } else { + ret = setInjectChannel(offset, increment); + if (ret == FAIL) { + strcpy(mess, "Could not inject channel\n"); + LOG(logERROR, (mess)); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_inject_channel(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retvals[2] = {-1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retvals[2] = {-1, -1}; - LOG(logDEBUG1, ("Getting injected channels\n")); + LOG(logDEBUG1, ("Getting injected channels\n")); #ifndef GOTTHARD2D - functionNotImplemented(); -#else - // get only - int offset = -1, increment = -1; - getInjectedChannels(&offset, &increment); - LOG(logDEBUG1, ("Get Injected channels: [offset:%d, increment:%d]\n", offset, increment)); - retvals[0] = offset; - retvals[1] = increment; + functionNotImplemented(); +#else + // get only + int offset = -1, increment = -1; + getInjectedChannels(&offset, &increment); + LOG(logDEBUG1, ("Get Injected channels: [offset:%d, increment:%d]\n", + offset, increment)); + retvals[0] = offset; + retvals[1] = increment; #endif - return Server_SendResult(file_des, INT32, retvals, sizeof(retvals)); + return Server_SendResult(file_des, INT32, retvals, sizeof(retvals)); } - int set_veto_photon(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[3] = {-1, -1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[3] = {-1, -1, -1}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - int values[args[2]]; - if (receiveData(file_des, values, sizeof(values), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting Veto Photon: [chipIndex:%d, G%d, nch:%d]\n", args[0], args[1], args[2])); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + int values[args[2]]; + if (receiveData(file_des, values, sizeof(values), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting Veto Photon: [chipIndex:%d, G%d, nch:%d]\n", args[0], + args[1], args[2])); #ifndef GOTTHARD2D - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - int chipIndex = args[0]; - int gainIndex = args[1]; - int numChannels = args[2]; - if (chipIndex < -1 || chipIndex >= NCHIP) { - ret = FAIL; - sprintf(mess, "Could not set veto photon. Invalid chip index %d\n", chipIndex); - LOG(logERROR, (mess)); - } else if (gainIndex < 0 || gainIndex > 2) { - ret = FAIL; - sprintf(mess, "Could not set veto photon. Invalid gain index %d\n", gainIndex); - LOG(logERROR, (mess)); - } else if (numChannels != NCHAN) { - ret = FAIL; - sprintf(mess, "Could not set veto photon. Invalid number of channels %d. Expected %d\n", numChannels, NCHAN); - LOG(logERROR, (mess)); - } else { - int i = 0; - for (i = 0; i < NCHAN; ++i) { - if (values[i] > ADU_MAX_VAL) { - ret = FAIL; - sprintf(mess, "Could not set veto photon. Invalid ADU value 0x%x for channel %d, must be 12 bit.\n", i, values[i]); - LOG(logERROR, (mess)); - break; - } - } - if (ret == OK) { - ret = setVetoPhoton(chipIndex, gainIndex, values); - if (ret == FAIL) { - sprintf(mess, "Could not set veto photon for chip index %d\n", chipIndex); - LOG(logERROR, (mess)); - } - } - } - } + // only set + if (Server_VerifyLock() == OK) { + int chipIndex = args[0]; + int gainIndex = args[1]; + int numChannels = args[2]; + if (chipIndex < -1 || chipIndex >= NCHIP) { + ret = FAIL; + sprintf(mess, "Could not set veto photon. Invalid chip index %d\n", + chipIndex); + LOG(logERROR, (mess)); + } else if (gainIndex < 0 || gainIndex > 2) { + ret = FAIL; + sprintf(mess, "Could not set veto photon. Invalid gain index %d\n", + gainIndex); + LOG(logERROR, (mess)); + } else if (numChannels != NCHAN) { + ret = FAIL; + sprintf(mess, + "Could not set veto photon. Invalid number of channels %d. " + "Expected %d\n", + numChannels, NCHAN); + LOG(logERROR, (mess)); + } else { + int i = 0; + for (i = 0; i < NCHAN; ++i) { + if (values[i] > ADU_MAX_VAL) { + ret = FAIL; + sprintf(mess, + "Could not set veto photon. Invalid ADU value 0x%x " + "for channel %d, must be 12 bit.\n", + i, values[i]); + LOG(logERROR, (mess)); + break; + } + } + if (ret == OK) { + ret = setVetoPhoton(chipIndex, gainIndex, values); + if (ret == FAIL) { + sprintf(mess, + "Could not set veto photon for chip index %d\n", + chipIndex); + LOG(logERROR, (mess)); + } + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_veto_photon(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = -1; - int retvals[NCHAN]; - memset(retvals, 0, sizeof(retvals)); + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = -1; + int retvals[NCHAN]; + memset(retvals, 0, sizeof(retvals)); - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Getting veto photon [chip Index:%d]\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Getting veto photon [chip Index:%d]\n", arg)); #ifndef GOTTHARD2D - functionNotImplemented(); -#else - // get only - int chipIndex = arg; - if (chipIndex < -1 || chipIndex >= NCHIP) { - ret = FAIL; - sprintf(mess, "Could not get veto photon. Invalid chip index %d\n", chipIndex); - LOG(logERROR, (mess)); - } else { - ret = getVetoPhoton(chipIndex, retvals); - if (ret == FAIL) { - strcpy(mess, "Could not get veto photon for chipIndex -1. Not the same for all chips.\n"); - LOG(logERROR, (mess)); - } else { - int i = 0; - for (i = 0; i < NCHAN; ++i) { - LOG(logDEBUG1, ("%d:0x%x\n", i, retvals[i])); - } - } - } + functionNotImplemented(); +#else + // get only + int chipIndex = arg; + if (chipIndex < -1 || chipIndex >= NCHIP) { + ret = FAIL; + sprintf(mess, "Could not get veto photon. Invalid chip index %d\n", + chipIndex); + LOG(logERROR, (mess)); + } else { + ret = getVetoPhoton(chipIndex, retvals); + if (ret == FAIL) { + strcpy(mess, "Could not get veto photon for chipIndex -1. Not the " + "same for all chips.\n"); + LOG(logERROR, (mess)); + } else { + int i = 0; + for (i = 0; i < NCHAN; ++i) { + LOG(logDEBUG1, ("%d:0x%x\n", i, retvals[i])); + } + } + } #endif - Server_SendResult(file_des, INT32, NULL, 0); - if (ret != FAIL) { - int nch = NCHAN; - sendData(file_des, &nch, sizeof(nch), INT32); - sendData(file_des, retvals, sizeof(retvals), INT32); - } - return ret; + Server_SendResult(file_des, INT32, NULL, 0); + if (ret != FAIL) { + int nch = NCHAN; + sendData(file_des, &nch, sizeof(nch), INT32); + sendData(file_des, retvals, sizeof(retvals), INT32); + } + return ret; } - int set_veto_reference(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int args[2] = {-1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int args[2] = {-1, -1}; - if (receiveData(file_des, args, sizeof(args), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting Veto Reference: [G%d, value:0x%x]\n", args[0], args[1])); + if (receiveData(file_des, args, sizeof(args), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, + ("Setting Veto Reference: [G%d, value:0x%x]\n", args[0], args[1])); #ifndef GOTTHARD2D - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - int gainIndex = args[0]; - int value = args[1]; - if (gainIndex < 0 || gainIndex > 2) { - ret = FAIL; - sprintf(mess, "Could not set veto reference. Invalid gain index %d\n", gainIndex); - LOG(logERROR, (mess)); - } else if (value > ADU_MAX_VAL) { - ret = FAIL; - sprintf(mess, "Could not set veto reference. Invalid ADU value 0x%x, must be 12 bit.\n", value); - LOG(logERROR, (mess)); - } else { - ret = setVetoReference(gainIndex, value); - if (ret == FAIL) { - sprintf(mess, "Could not set veto reference\n"); - LOG(logERROR, (mess)); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + int gainIndex = args[0]; + int value = args[1]; + if (gainIndex < 0 || gainIndex > 2) { + ret = FAIL; + sprintf(mess, + "Could not set veto reference. Invalid gain index %d\n", + gainIndex); + LOG(logERROR, (mess)); + } else if (value > ADU_MAX_VAL) { + ret = FAIL; + sprintf(mess, + "Could not set veto reference. Invalid ADU value 0x%x, " + "must be 12 bit.\n", + value); + LOG(logERROR, (mess)); + } else { + ret = setVetoReference(gainIndex, value); + if (ret == FAIL) { + sprintf(mess, "Could not set veto reference\n"); + LOG(logERROR, (mess)); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int set_burst_mode(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - enum burstMode arg = BURST_OFF; + ret = OK; + memset(mess, 0, sizeof(mess)); + enum burstMode arg = BURST_OFF; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting burst mode: %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting burst mode: %d\n", arg)); #ifndef GOTTHARD2D - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - switch (arg) { - case BURST_OFF: - case BURST_INTERNAL: - case BURST_EXTERNAL: - break; - default: - modeNotImplemented("Burst mode", (int)arg); - break; - } - if (ret == OK) { - setBurstMode(arg); - enum burstMode retval = getBurstMode(); - LOG(logDEBUG, ("burst mode retval: %d\n", retval)); - if (retval != arg) { - ret = FAIL; - sprintf(mess, "Could not set burst type. Set %d, got %d\n", arg, retval); - LOG(logERROR, (mess)); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + switch (arg) { + case BURST_OFF: + case BURST_INTERNAL: + case BURST_EXTERNAL: + break; + default: + modeNotImplemented("Burst mode", (int)arg); + break; + } + if (ret == OK) { + setBurstMode(arg); + enum burstMode retval = getBurstMode(); + LOG(logDEBUG, ("burst mode retval: %d\n", retval)); + if (retval != arg) { + ret = FAIL; + sprintf(mess, "Could not set burst type. Set %d, got %d\n", arg, + retval); + LOG(logERROR, (mess)); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_burst_mode(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - enum burstMode retval = BURST_OFF; + ret = OK; + memset(mess, 0, sizeof(mess)); + enum burstMode retval = BURST_OFF; - LOG(logDEBUG1, ("Getting burst mode\n")); + LOG(logDEBUG1, ("Getting burst mode\n")); #ifndef GOTTHARD2D - functionNotImplemented(); -#else - // get only - retval = getBurstMode(); - LOG(logDEBUG1, ("Get burst mode retval:%d\n", retval)); + functionNotImplemented(); +#else + // get only + retval = getBurstMode(); + LOG(logDEBUG1, ("Get burst mode retval:%d\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int set_counter_mask(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); - LOG(logINFO, ("Setting Counter mask:0x%x\n", arg)); + LOG(logINFO, ("Setting Counter mask:0x%x\n", arg)); #ifndef MYTHEN3D - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - if (arg == 0) { - ret = FAIL; - sprintf(mess, "Could not set counter mask. Cannot set it to 0.\n"); - LOG(logERROR, (mess)); - } else if (arg > MAX_COUNTER_MSK) { - ret = FAIL; - sprintf(mess, "Could not set counter mask. Invalid counter bit enabled. Max number of counters: %d\n", NCOUNTERS); - LOG(logERROR, (mess)); - } else { - setCounterMask(arg); - uint32_t retval = getCounterMask(); - LOG(logDEBUG, ("counter mask retval: 0x%x\n", retval)); - if (retval != arg) { - ret = FAIL; - sprintf(mess, "Could not set counter mask. Set 0x%x mask, got 0x%x mask\n", arg, retval); - LOG(logERROR, (mess)); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + if (arg == 0) { + ret = FAIL; + sprintf(mess, "Could not set counter mask. Cannot set it to 0.\n"); + LOG(logERROR, (mess)); + } else if (arg > MAX_COUNTER_MSK) { + ret = FAIL; + sprintf(mess, + "Could not set counter mask. Invalid counter bit enabled. " + "Max number of counters: %d\n", + NCOUNTERS); + LOG(logERROR, (mess)); + } else { + setCounterMask(arg); + uint32_t retval = getCounterMask(); + LOG(logDEBUG, ("counter mask retval: 0x%x\n", retval)); + if (retval != arg) { + ret = FAIL; + sprintf(mess, + "Could not set counter mask. Set 0x%x mask, got 0x%x " + "mask\n", + arg, retval); + LOG(logERROR, (mess)); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_counter_mask(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - uint32_t retval = -1; - LOG(logDEBUG1, ("Getting counter mask\n")); + ret = OK; + memset(mess, 0, sizeof(mess)); + uint32_t retval = -1; + LOG(logDEBUG1, ("Getting counter mask\n")); #ifndef MYTHEN3D - functionNotImplemented(); -#else - // get only - retval = getCounterMask(); - LOG(logDEBUG, ("counter mask retval: 0x%x\n", retval)); + functionNotImplemented(); +#else + // get only + retval = getCounterMask(); + LOG(logDEBUG, ("counter mask retval: 0x%x\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int get_num_bursts(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; #ifndef GOTTHARD2D - functionNotImplemented(); + functionNotImplemented(); #else - // get only - retval = getNumBursts(); - LOG(logDEBUG1, ("retval num bursts %lld\n", (long long int)retval)); + // get only + retval = getNumBursts(); + LOG(logDEBUG1, ("retval num bursts %lld\n", (long long int)retval)); #endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int set_num_bursts(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting number of bursts %lld\n", (long long int)arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting number of bursts %lld\n", (long long int)arg)); #ifndef GOTTHARD2D - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - setNumBursts(arg); - int64_t retval = getNumBursts(); - LOG(logDEBUG1, ("retval num bursts %lld\n", (long long int)retval)); - validate64(arg, retval, "set number of bursts", DEC); - } + // only set + if (Server_VerifyLock() == OK) { + setNumBursts(arg); + int64_t retval = getNumBursts(); + LOG(logDEBUG1, ("retval num bursts %lld\n", (long long int)retval)); + validate64(arg, retval, "set number of bursts", DEC); + } #endif - return Server_SendResult(file_des, INT64, NULL, 0); + return Server_SendResult(file_des, INT64, NULL, 0); } int get_burst_period(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t retval = -1; #ifndef GOTTHARD2D - functionNotImplemented(); -#else - // get only - retval = getBurstPeriod(); - LOG(logDEBUG1, ("retval burst period %lld ns\n", (long long int)retval)); -#endif - return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); + functionNotImplemented(); +#else + // get only + retval = getBurstPeriod(); + LOG(logDEBUG1, ("retval burst period %lld ns\n", (long long int)retval)); +#endif + return Server_SendResult(file_des, INT64, &retval, sizeof(retval)); } int set_burst_period(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int64_t arg = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int64_t arg = -1; - if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting burst period %lld ns\n", (long long int)arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting burst period %lld ns\n", (long long int)arg)); #ifndef GOTTHARD2D - functionNotImplemented(); -#else - // only set - if (Server_VerifyLock() == OK) { - ret = setBurstPeriod(arg); - int64_t retval = getBurstPeriod(); - LOG(logDEBUG1, ("retval burst period %lld ns\n", (long long int)retval)); - if (ret == FAIL) { - sprintf(mess, "Could not set burst period. Set %lld ns, read %lld ns.\n", (long long int)arg, (long long int)retval); - LOG(logERROR,(mess)); - } - } -#endif - return Server_SendResult(file_des, INT64, NULL, 0); + functionNotImplemented(); +#else + // only set + if (Server_VerifyLock() == OK) { + ret = setBurstPeriod(arg); + int64_t retval = getBurstPeriod(); + LOG(logDEBUG1, + ("retval burst period %lld ns\n", (long long int)retval)); + if (ret == FAIL) { + sprintf(mess, + "Could not set burst period. Set %lld ns, read %lld ns.\n", + (long long int)arg, (long long int)retval); + LOG(logERROR, (mess)); + } + } +#endif + return Server_SendResult(file_des, INT64, NULL, 0); } - int set_current_source(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int arg = 0; + ret = OK; + memset(mess, 0, sizeof(mess)); + int arg = 0; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logINFO, ("Setting current source enable: %u\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logINFO, ("Setting current source enable: %u\n", arg)); #ifndef GOTTHARD2D - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - setCurrentSource(arg); - int retval = getCurrentSource(); - LOG(logDEBUG1, ("current source enable retval: %u\n", retval)); - validate(arg, retval, "current source enable", DEC); - } + // only set + if (Server_VerifyLock() == OK) { + setCurrentSource(arg); + int retval = getCurrentSource(); + LOG(logDEBUG1, ("current source enable retval: %u\n", retval)); + validate(arg, retval, "current source enable", DEC); + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_current_source(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retval = -1; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retval = -1; - LOG(logDEBUG1, ("Getting current source enable\n")); + LOG(logDEBUG1, ("Getting current source enable\n")); #ifndef GOTTHARD2D - functionNotImplemented(); -#else - // get only - retval = getCurrentSource(); - LOG(logDEBUG1, ("current source enable retval: %u\n", retval)); + functionNotImplemented(); +#else + // get only + retval = getCurrentSource(); + LOG(logDEBUG1, ("current source enable retval: %u\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int set_timing_source(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - enum timingSourceType arg = TIMING_INTERNAL; + ret = OK; + memset(mess, 0, sizeof(mess)); + enum timingSourceType arg = TIMING_INTERNAL; - if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) - return printSocketReadError(); - LOG(logDEBUG1, ("Setting timing source: %d\n", arg)); + if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0) + return printSocketReadError(); + LOG(logDEBUG1, ("Setting timing source: %d\n", arg)); #ifndef GOTTHARD2D - functionNotImplemented(); + functionNotImplemented(); #else - // only set - if (Server_VerifyLock() == OK) { - switch (arg) { - case TIMING_INTERNAL: - case TIMING_EXTERNAL: - break; - default: - modeNotImplemented("timing source", (int)arg); - break; - } - if (ret == OK) { - setTimingSource(arg); - enum timingSourceType retval = getTimingSource(); - LOG(logDEBUG, ("timing source retval: %d\n", retval)); - if (retval != arg) { - ret = FAIL; - sprintf(mess, "Could not set timing source. Set %d, got %d\n", arg, retval); - LOG(logERROR, (mess)); - } - } - } + // only set + if (Server_VerifyLock() == OK) { + switch (arg) { + case TIMING_INTERNAL: + case TIMING_EXTERNAL: + break; + default: + modeNotImplemented("timing source", (int)arg); + break; + } + if (ret == OK) { + setTimingSource(arg); + enum timingSourceType retval = getTimingSource(); + LOG(logDEBUG, ("timing source retval: %d\n", retval)); + if (retval != arg) { + ret = FAIL; + sprintf(mess, "Could not set timing source. Set %d, got %d\n", + arg, retval); + LOG(logERROR, (mess)); + } + } + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } - int get_timing_source(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - enum timingSourceType retval = TIMING_INTERNAL; + ret = OK; + memset(mess, 0, sizeof(mess)); + enum timingSourceType retval = TIMING_INTERNAL; - LOG(logDEBUG1, ("Getting timing source\n")); + LOG(logDEBUG1, ("Getting timing source\n")); #ifndef GOTTHARD2D - functionNotImplemented(); -#else - // get only - retval = getTimingSource(); - LOG(logDEBUG1, ("Get timing source retval:%d\n", retval)); + functionNotImplemented(); +#else + // get only + retval = getTimingSource(); + LOG(logDEBUG1, ("Get timing source retval:%d\n", retval)); #endif - return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); + return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); } - int get_num_channels(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); - int retvals[2] = {-1, -1}; + ret = OK; + memset(mess, 0, sizeof(mess)); + int retvals[2] = {-1, -1}; - LOG(logDEBUG1, ("Getting number of channels\n")); + LOG(logDEBUG1, ("Getting number of channels\n")); #if !defined(MOENCHD) && !defined(CHIPTESTBOARDD) - functionNotImplemented(); -#else - // get only - getNumberOfChannels(&retvals[0], &retvals[1]); - LOG(logDEBUG1, ("Get number of channels sretval:[%d, %d]\n", retvals[0], retvals[1])); + functionNotImplemented(); +#else + // get only + getNumberOfChannels(&retvals[0], &retvals[1]); + LOG(logDEBUG1, + ("Get number of channels sretval:[%d, %d]\n", retvals[0], retvals[1])); #endif - return Server_SendResult(file_des, INT32, retvals, sizeof(retvals)); + return Server_SendResult(file_des, INT32, retvals, sizeof(retvals)); } - - int update_rate_correction(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); #ifndef EIGERD - functionNotImplemented(); -#else - LOG(logINFO, ("Update Rate Correction\n")); - // only set - if (Server_VerifyLock() == OK) { - ret = updateRateCorrection(mess); - } + functionNotImplemented(); +#else + LOG(logINFO, ("Update Rate Correction\n")); + // only set + if (Server_VerifyLock() == OK) { + ret = updateRateCorrection(mess); + } #endif - return Server_SendResult(file_des, INT32, NULL, 0); + return Server_SendResult(file_des, INT32, NULL, 0); } int get_receiver_parameters(int file_des) { - ret = OK; - memset(mess, 0, sizeof(mess)); + ret = OK; + memset(mess, 0, sizeof(mess)); - LOG(logDEBUG1, ("Getting receiver parameters\n")); - // get only - Server_SendResult(file_des, INT32, NULL, 0); + LOG(logDEBUG1, ("Getting receiver parameters\n")); + // get only + Server_SendResult(file_des, INT32, NULL, 0); - int n = 0; - int i32 = 0; - int64_t i64 = 0; - uint32_t u32 = 0; - uint64_t u64 = 0; + int n = 0; + int i32 = 0; + int64_t i64 = 0; + uint32_t u32 = 0; + uint64_t u64 = 0; - // send fake parameters needed for shared memory - // (so that client can receive a struct) - // detector type - i32 = 0; - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); - // multisize - i32 = 0; - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); - i32 = 0; - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); - // detId - i32 = 0; - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); - // hostname - { - char hostname[MAX_STR_LENGTH]; - memset(hostname, 0, MAX_STR_LENGTH); - n += sendData(file_des, hostname, MAX_STR_LENGTH, OTHER); - if (n < 0) return printSocketReadError(); - } - // end of shared memory variables in struct + // send fake parameters needed for shared memory + // (so that client can receive a struct) + // detector type + i32 = 0; + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); + // multisize + i32 = 0; + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); + i32 = 0; + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); + // detId + i32 = 0; + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); + // hostname + { + char hostname[MAX_STR_LENGTH]; + memset(hostname, 0, MAX_STR_LENGTH); + n += sendData(file_des, hostname, MAX_STR_LENGTH, OTHER); + if (n < 0) + return printSocketReadError(); + } + // end of shared memory variables in struct - - // sending real detector parameters - // udp interfaces + // sending real detector parameters + // udp interfaces #ifdef JUNGFRAUD - i32 = getNumberofUDPInterfaces(); + i32 = getNumberofUDPInterfaces(); #else - i32 = 1; + i32 = 1; #endif - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - // udp dst port - i32 = udpDetails.dstport; - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + // udp dst port + i32 = udpDetails.dstport; + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - // udp dst ip - u32 = udpDetails.dstip; - u32 = __builtin_bswap32(u32); - n += sendData(file_des,&u32,sizeof(u32),INT32); - if (n < 0) return printSocketReadError(); + // udp dst ip + u32 = udpDetails.dstip; + u32 = __builtin_bswap32(u32); + n += sendData(file_des, &u32, sizeof(u32), INT32); + if (n < 0) + return printSocketReadError(); - // udp dst mac - u64 = udpDetails.dstmac; - n += sendData(file_des,&u64,sizeof(u64),INT64); - if (n < 0) return printSocketReadError(); + // udp dst mac + u64 = udpDetails.dstmac; + n += sendData(file_des, &u64, sizeof(u64), INT64); + if (n < 0) + return printSocketReadError(); - // udp dst port2 - i32 = udpDetails.dstport2; - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + // udp dst port2 + i32 = udpDetails.dstport2; + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - // udp dst ip2 - u32 = udpDetails.dstip2; - u32 = __builtin_bswap32(u32); - n += sendData(file_des,&u32,sizeof(u32),INT32); - if (n < 0) return printSocketReadError(); + // udp dst ip2 + u32 = udpDetails.dstip2; + u32 = __builtin_bswap32(u32); + n += sendData(file_des, &u32, sizeof(u32), INT32); + if (n < 0) + return printSocketReadError(); - // udp dst mac2 - u64 = udpDetails.dstmac2; - n += sendData(file_des,&u64,sizeof(u64),INT64); - if (n < 0) return printSocketReadError(); + // udp dst mac2 + u64 = udpDetails.dstmac2; + n += sendData(file_des, &u64, sizeof(u64), INT64); + if (n < 0) + return printSocketReadError(); - // frames - i64 = getNumFrames(); - n += sendData(file_des,&i64,sizeof(i64),INT64); - if (n < 0) return printSocketReadError(); + // frames + i64 = getNumFrames(); + n += sendData(file_des, &i64, sizeof(i64), INT64); + if (n < 0) + return printSocketReadError(); - // triggers - i64 = getNumTriggers(); - n += sendData(file_des,&i64,sizeof(i64),INT64); - if (n < 0) return printSocketReadError(); + // triggers + i64 = getNumTriggers(); + n += sendData(file_des, &i64, sizeof(i64), INT64); + if (n < 0) + return printSocketReadError(); - // bursts + // bursts #ifdef GOTTHARD2D - i64 = getNumBursts(); + i64 = getNumBursts(); #else - i64 = 0; + i64 = 0; #endif - n += sendData(file_des,&i64,sizeof(i64),INT64); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &i64, sizeof(i64), INT64); + if (n < 0) + return printSocketReadError(); - // analog samples + // analog samples #if defined(CHIPTESTBOARDD) || defined(MOENCHD) - i32 = getNumAnalogSamples(); + i32 = getNumAnalogSamples(); #else - i32 = 0; + i32 = 0; #endif - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - // digital samples + // digital samples #ifdef CHIPTESTBOARDD - i32 = getNumDigitalSamples(); + i32 = getNumDigitalSamples(); #else - i32 = 0; + i32 = 0; #endif - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - // exptime - i64 = getExpTime(); - n += sendData(file_des,&i64,sizeof(i64),INT64); - if (n < 0) return printSocketReadError(); + // exptime + i64 = getExpTime(); + n += sendData(file_des, &i64, sizeof(i64), INT64); + if (n < 0) + return printSocketReadError(); - // period - i64 = getPeriod(); - n += sendData(file_des,&i64,sizeof(i64),INT64); - if (n < 0) return printSocketReadError(); + // period + i64 = getPeriod(); + n += sendData(file_des, &i64, sizeof(i64), INT64); + if (n < 0) + return printSocketReadError(); - // sub exptime + // sub exptime #ifdef EIGERD - i64 = getSubExpTime(); + i64 = getSubExpTime(); #else - i64 = 0; + i64 = 0; #endif - n += sendData(file_des,&i64,sizeof(i64),INT64); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &i64, sizeof(i64), INT64); + if (n < 0) + return printSocketReadError(); - // sub deadtime + // sub deadtime #ifdef EIGERD - i64 = getSubDeadTime(); + i64 = getSubDeadTime(); #else - i64 = 0; + i64 = 0; #endif - n += sendData(file_des,&i64,sizeof(i64),INT64); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &i64, sizeof(i64), INT64); + if (n < 0) + return printSocketReadError(); - // activate + // activate #ifdef EIGERD - i32 = activate(-1); + i32 = activate(-1); #else - i32 = 0; + i32 = 0; #endif - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - // quad + // quad #ifdef EIGERD - i32 = getQuad(); + i32 = getQuad(); #else - i32 = 0; + i32 = 0; #endif - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - // dynamic range - i32 = setDynamicRange(-1); - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + // dynamic range + i32 = setDynamicRange(-1); + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - // timing mode - i32 = (int)getTiming(); - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + // timing mode + i32 = (int)getTiming(); + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - // 10 gbe + // 10 gbe #if defined(EIGERD) || defined(CHIPTESTBOARDD) || defined(MOENCHD) - i32 = enableTenGigabitEthernet(-1); + i32 = enableTenGigabitEthernet(-1); #else - i32 = 0; + i32 = 0; #endif - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - // readout mode + // readout mode #ifdef CHIPTESTBOARD - i32 = getReadoutMode(); + i32 = getReadoutMode(); #else - i32 = 0; + i32 = 0; #endif - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - // adc mask + // adc mask #if defined(CHIPTESTBOARDD) || defined(MOENCHD) - u32 = getADCEnableMask(); + u32 = getADCEnableMask(); #else - u32 = 0; + u32 = 0; #endif - n += sendData(file_des,&u32,sizeof(u32),INT32); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &u32, sizeof(u32), INT32); + if (n < 0) + return printSocketReadError(); - // 10g adc mask + // 10g adc mask #if defined(CHIPTESTBOARDD) || defined(MOENCHD) - u32 = getADCEnableMask_10G(); + u32 = getADCEnableMask_10G(); #else - u32 = 0; + u32 = 0; #endif - n += sendData(file_des,&u32,sizeof(u32),INT32); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &u32, sizeof(u32), INT32); + if (n < 0) + return printSocketReadError(); - // roi - { - ROI roi; + // roi + { + ROI roi; #ifdef GOTTHARDD - roi = getROI(); -#else - roi.xmin = -1; - roi.xmax = -1; + roi = getROI(); +#else + roi.xmin = -1; + roi.xmax = -1; #endif - n += sendData(file_des,&roi.xmin,sizeof(int),INT32); - if (n < 0) return printSocketReadError(); - n += sendData(file_des,&roi.xmax,sizeof(int),INT32); - if (n < 0) return printSocketReadError(); - } + n += sendData(file_des, &roi.xmin, sizeof(int), INT32); + if (n < 0) + return printSocketReadError(); + n += sendData(file_des, &roi.xmax, sizeof(int), INT32); + if (n < 0) + return printSocketReadError(); + } - // counter mask + // counter mask #ifdef MYTHEN3D - u32 = getCounterMask(); + u32 = getCounterMask(); #else - u32 = 0; + u32 = 0; #endif - n += sendData(file_des,&u32,sizeof(u32),INT32); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &u32, sizeof(u32), INT32); + if (n < 0) + return printSocketReadError(); - // burst mode + // burst mode #ifdef GOTTHARD2D - i32 = (int)getBurstMode(); + i32 = (int)getBurstMode(); #else - i32 = 0; + i32 = 0; #endif - n += sendData(file_des,&i32,sizeof(i32),INT32); - if (n < 0) return printSocketReadError(); + n += sendData(file_des, &i32, sizeof(i32), INT32); + if (n < 0) + return printSocketReadError(); - LOG(logINFO, ("Sent %d bytes for receiver parameters\n", n)); + LOG(logINFO, ("Sent %d bytes for receiver parameters\n", n)); - return OK; + return OK; } \ No newline at end of file From d76f43f5fd4303c2909e46e15266582f8f5afd9b Mon Sep 17 00:00:00 2001 From: Anna Bergamaschi Date: Wed, 6 May 2020 11:59:49 +0200 Subject: [PATCH 3/4] Fixed problem in cluster finder --- ctbGui/patternGenerator/generate.sh | 1 + .../dataStructures/moench04CtbZmq10GbData.h | 2 +- .../dataStructures/moench04CtbZmqData.h | 2 +- .../moenchExecutables/Makefile.zmq | 5 +- .../moenchExecutables/moenchZmqProcess.cpp | 297 ++++++++++++------ slsDetectorCalibration/singlePhotonDetector.h | 2 +- slsDetectorCalibration/single_photon_hit.h | 25 +- 7 files changed, 223 insertions(+), 111 deletions(-) diff --git a/ctbGui/patternGenerator/generate.sh b/ctbGui/patternGenerator/generate.sh index f7aac61c4..6f5512c8c 100755 --- a/ctbGui/patternGenerator/generate.sh +++ b/ctbGui/patternGenerator/generate.sh @@ -21,6 +21,7 @@ if [ -f "$infile" ] then gcc -DINFILE="\"$infile\"" -DOUTFILE="\"$outfile\"" -DOUTFILEBIN="\"$outfilebin\"" -o $exe generator.c ; echo compiling +echo gcc -DINFILE="\"$infile\"" -DOUTFILE="\"$outfile\"" -DOUTFILEBIN="\"$outfilebin\"" -o $exe generator.c ; $exe ; echo cleaning rm $exe diff --git a/slsDetectorCalibration/dataStructures/moench04CtbZmq10GbData.h b/slsDetectorCalibration/dataStructures/moench04CtbZmq10GbData.h index 45e51e133..53a0042ec 100644 --- a/slsDetectorCalibration/dataStructures/moench04CtbZmq10GbData.h +++ b/slsDetectorCalibration/dataStructures/moench04CtbZmq10GbData.h @@ -156,7 +156,7 @@ class moench04CtbZmq10GbData : public slsDetectorData { if (dSamples>isample) { ptr=data+32*(isample+1)+8*isample; sample=*((uint64_t*)ptr); - cout << isc << " " << ibit[isc] << " " << isample << hex << sample << dec << endl; + // cout << isc << " " << ibit[isc] << " " << isample << hex << sample << dec << endl; if (sample & (1< { if (dSamples>isample) { ptr=data+aoff+8*isample; sample=*((uint64_t*)ptr); - cout << isc << " " << ibit[isc] << " " << isample << hex << sample << dec << endl; + // cout << isc << " " << ibit[isc] << " " << isample << hex << sample << dec << endl; if (sample & (1<getDetectorSize(npx, npy); @@ -140,13 +155,15 @@ int main(int argc, char *argv[]) { char dummybuff[size]; - int ncol_cm=CM_ROWS; - double xt_ghost=C_GHOST; moench03CommonMode *cm=NULL; moench03GhostSummation *gs=NULL; #ifdef CORR - cm=new moench03CommonMode(ncol_cm); - gs=new moench03GhostSummation(det, xt_ghost); + + //int ncol_cm=CM_ROWS; + //double xt_ghost=C_GHOST; + + cm=new moench03CommonMode(CM_ROWS); + gs=new moench03GhostSummation(det, C_GHOST); #endif double *gainmap=NULL; float *gm; @@ -308,9 +325,10 @@ int main(int argc, char *argv[]) { uint64_t bunchId = 0; uint64_t timestamp = 0; int16_t modId = 0; + uint32_t expLength=0; uint16_t xCoord = 0; uint16_t yCoord = 0; - uint16_t zCoord = 0; + //uint16_t zCoord = 0; uint32_t debug = 0; //uint32_t dr = 16; //int16_t *dout;//=new int16_t [nnx*nny]; @@ -341,6 +359,7 @@ int main(int argc, char *argv[]) { filter->getImageSize(nnx, nny,nnsx, nnsy); + std::map addJsonHeader; @@ -350,16 +369,13 @@ int main(int argc, char *argv[]) { // cout << "+++++++++++++++++++++++++++++++LOOP" << endl; // get header, (if dummy, fail is on parse error or end of acquisition) -#ifndef NEWZMQ - if (!zmqsocket->ReceiveHeader(0, acqIndex, frameIndex, subframeIndex, filename, fileindex)){ -#endif -#ifdef NEWZMQ - rapidjson::Document doc; - if (!zmqsocket->ReceiveHeader(0, doc, SLS_DETECTOR_JSON_HEADER_VERSION)) { + + + // rapidjson::Document doc; + if (!zmqsocket->ReceiveHeader(0, zHeader, SLS_DETECTOR_JSON_HEADER_VERSION)) { /* zmqsocket->CloseHeaderMessage();*/ -#endif // if (!zmqsocket->ReceiveHeader(0, acqIndex, frameIndex, subframeIndex, filename, fileindex)) { cprintf(RED, "Got Dummy\n"); // t1=high_resolution_clock::now(); @@ -378,7 +394,11 @@ int main(int argc, char *argv[]) { if (newFrame>0) { cprintf(RED,"DIDn't receive any data!\n"); if (send) { - zmqsocket2->SendHeaderData(0, true, SLS_DETECTOR_JSON_HEADER_VERSION); + + //zHeader.data = false; + outHeader.data=false; + // zmqsocket2->SendHeaderData(0, true, SLS_DETECTOR_JSON_HEADER_VERSION); + zmqsocket2->SendHeader(0,outHeader); cprintf(RED, "Sent Dummy\n"); } } else { @@ -510,14 +530,39 @@ int main(int argc, char *argv[]) { if(send_something) { - zmqsocket2->SendHeaderData (0, false,SLS_DETECTOR_JSON_HEADER_VERSION , dr, fileindex, 1,1,nnx,nny,nnx*nny*dr/8,acqIndex, frameIndex, fname,acqIndex,0 , packetNumber,bunchId, timestamp, modId,xCoord, yCoord, zCoord,debug, roundRNumber, detType, version, 0,0, 0,&additionalJsonHeader); - + // zmqsocket2->SendHeaderData (0, false,SLS_DETECTOR_JSON_HEADER_VERSION , dr, fileindex, 1,1,nnx,nny,nnx*nny*dr/8,acqIndex, frameIndex, fname,acqIndex,0 , packetNumber,bunchId, timestamp, modId,xCoord, yCoord, zCoord,debug, roundRNumber, detType, version, 0,0, 0,&additionalJsonHeader); + outHeader.data=true; + outHeader.dynamicRange=dr; + outHeader.fileIndex=fileindex; + outHeader.ndetx=1; + outHeader.ndety=1; + outHeader.npixelsx=nnx; + outHeader.npixelsy=nny; + outHeader.imageSize=nnx*nny*dr/8; + outHeader.acqIndex=acqIndex; + outHeader.frameIndex=frameIndex; + outHeader.fname=fname; + outHeader.frameNumber=acqIndex; + outHeader.expLength=expLength; + outHeader.packetNumber=packetNumber; + outHeader.bunchId=bunchId; + outHeader.timestamp=timestamp; + outHeader.modId=modId; + outHeader.row=xCoord; + outHeader.column=yCoord; + outHeader.debug=debug; + outHeader.roundRNumber=roundRNumber; + outHeader.detType=detType; + outHeader.version=version; + + zmqsocket2->SendHeader(0,outHeader); zmqsocket2->SendData((char*)dout,nnx*nny*dr/8); cprintf(GREEN, "Sent Data\n"); } - - zmqsocket2->SendHeaderData(0, true, SLS_DETECTOR_JSON_HEADER_VERSION); + outHeader.data=false; + zmqsocket2->SendHeader(0,outHeader); + // zmqsocket2->SendHeaderData(0, true, SLS_DETECTOR_JSON_HEADER_VERSION); cprintf(RED, "Sent Dummy\n"); if (dout) delete [] dout; @@ -544,33 +589,84 @@ int main(int argc, char *argv[]) { } -#ifdef NEWZMQ + //#ifdef NEWZMQ if (newFrame) { - begin = std::chrono::steady_clock::now(); - //time(&begin); - // t0 = high_resolution_clock::now(); - //cout <<"new frame" << endl; + begin = std::chrono::steady_clock::now(); + + size = zHeader.imageSize;//doc["size"].GetUint(); + + // dynamicRange = zheader.dynamicRange; //doc["bitmode"].GetUint(); + // nPixelsX = zHeader.npixelsx; //doc["shape"][0].GetUint(); + // nPixelsY = zHeader.npixelsy;// doc["shape"][1].GetUint(); + filename = zHeader.fname;//doc["fname"].GetString(); + acqIndex = zHeader.acqIndex; //doc["acqIndex"].GetUint64(); + // frameIndex = zHeader.frameIndex;//doc["fIndex"].GetUint64(); + fileindex = zHeader.fileIndex;//doc["fileIndex"].GetUint64(); + expLength = zHeader.expLength;//doc["expLength"].GetUint(); + packetNumber=zHeader.packetNumber;//doc["packetNumber"].GetUint(); + bunchId=zHeader.bunchId;//doc["bunchId"].GetUint(); + timestamp=zHeader.timestamp;//doc["timestamp"].GetUint(); + modId=zHeader.modId;//doc["modId"].GetUint(); + debug=zHeader.debug;//doc["debug"].GetUint(); + // roundRNumber=r.roundRNumber;//doc["roundRNumber"].GetUint(); + detType=zHeader.detType;//doc["detType"].GetUint(); + version=zHeader.version;//doc["version"].GetUint(); + /*document["bitmode"].GetUint(); zHeader.dynamicRange - // acqIndex, frameIndex, subframeIndex, filename, fileindex - size = doc["size"].GetUint(); - // multisize = size;// * zmqsocket->size(); - // dynamicRange = doc["bitmode"].GetUint(); - // nPixelsX = doc["shape"][0].GetUint(); - // nPixelsY = doc["shape"][1].GetUint(); - filename = doc["fname"].GetString(); - //acqIndex = doc["acqIndex"].GetUint64(); - //frameIndex = doc["fIndex"].GetUint64(); - fileindex = doc["fileIndex"].GetUint64(); - //subFrameIndex = doc["expLength"].GetUint(); - //packetNumber=doc["packetNumber"].GetUint(); - //bunchId=doc["bunchId"].GetUint(); - //timestamp=doc["timestamp"].GetUint(); - //modId=doc["modId"].GetUint(); - //debug=doc["debug"].GetUint(); - //roundRNumber=doc["roundRNumber"].GetUint(); - //detType=doc["detType"].GetUint(); - //version=doc["version"].GetUint(); +document["fileIndex"].GetUint64(); zHeader.fileIndex +document["detshape"][0].GetUint(); +zHeader.ndetx + +document["detshape"][1].GetUint(); +zHeader.ndety + +document["shape"][0].GetUint(); +zHeader.npixelsx + +document["shape"][1].GetUint(); +zHeader.npixelsy + +document["size"].GetUint(); zHeader.imageSize + +document["acqIndex"].GetUint64(); zHeader.acqIndex + +document["frameIndex"].GetUint64(); zHeader.frameIndex + +document["fname"].GetString(); zHeader.fname + +document["frameNumber"].GetUint64(); zHeader.frameNumber + +document["expLength"].GetUint(); zHeader.expLength + +document["packetNumber"].GetUint(); zHeader.packetNumber + +document["bunchId"].GetUint64(); zHeader.bunchId + +document["timestamp"].GetUint64(); zHeader.timestamp + +document["modId"].GetUint(); zHeader.modId + +document["row"].GetUint(); zHeader.row + +document["column"].GetUint(); zHeader.column + +document["reserved"].GetUint(); zHeader.reserved + +document["debug"].GetUint(); zHeader.debug + +document["roundRNumber"].GetUint(); zHeader.roundRNumber + +document["detType"].GetUint(); zHeader.detType + +document["version"].GetUint(); zHeader.version + +document["flippedDataX"].GetUint(); zHeader.flippedDataX + +document["quad"].GetUint(); zHeader.quad + +document["completeImage"].GetUint(); zHeader.completeImage + */ //dataSize=size; //strcpy(fname,filename.c_str()); @@ -604,6 +700,8 @@ int main(int argc, char *argv[]) { // xCoord, yCoord,zCoord, // flippedDataX, packetNumber, bunchId, timestamp, modId, debug, roundRNumber, detType, version); + addJsonHeader=zHeader.addJsonHeader; + /* Analog detector commands */ //isPedestal=0; //isFlat=0; @@ -611,9 +709,10 @@ int main(int argc, char *argv[]) { fMode=eFrame; frameMode_s="frame"; cprintf(MAGENTA, "Frame mode: "); - if (doc.HasMember("frameMode")) { - if (doc["frameMode"].IsString()) { - frameMode_s=doc["frameMode"].GetString(); + // if (doc.HasMember("frameMode")) { + if (addJsonHeader.find("frameMode")!= addJsonHeader.end()) { + // if (doc["frameMode"].IsString()) { + frameMode_s=addJsonHeader.at("frameMode");//doc["frameMode"].GetString(); if (frameMode_s == "pedestal"){ fMode=ePedestal; //isPedestal=1; @@ -639,7 +738,7 @@ int main(int argc, char *argv[]) { cprintf(MAGENTA, "Resetting flatfield\n"); fMode=eFlat; } -#endif + //#endif else { fMode=eFrame; //isPedestal=0; @@ -647,19 +746,23 @@ int main(int argc, char *argv[]) { fMode=eFrame; frameMode_s="frame"; } - } + //} } cprintf(MAGENTA, "%s\n" , frameMode_s.c_str()); mt->setFrameMode(fMode); // threshold=0; - cprintf(MAGENTA, "Threshold: "); - if (doc.HasMember("threshold")) { - if (doc["threshold"].IsInt()) { - threshold=doc["threshold"].GetInt(); - mt->setThreshold(threshold); - } - } + cprintf(MAGENTA, "Threshold: "); + if (addJsonHeader.find("threshold")!= addJsonHeader.end()) { + istringstream(addJsonHeader.at("threshold")) >>threshold; + // threshold=atoi(addJsonHeader.at("threshold").c_str());//doc["frameMode"].GetString(); + } + //if (doc.HasMember("threshold")) { + //if (doc["threshold"].IsInt()) { + // threshold=doc["threshold"].GetInt(); + mt->setThreshold(threshold); + // } + // } cprintf(MAGENTA, "%d\n", threshold); xmin=0; @@ -667,40 +770,47 @@ int main(int argc, char *argv[]) { ymin=0; ymax=npy; cprintf(MAGENTA, "ROI: "); - if (doc.HasMember("roi")) { - if (doc["roi"].IsArray()) { - if (doc["roi"].Size() > 0 ) - if (doc["roi"][0].IsInt()) - xmin=doc["roi"][0].GetInt(); + + if (addJsonHeader.find("roi")!= addJsonHeader.end()) { + istringstream(addJsonHeader.at("roi")) >> xmin >> xmax >> ymin >> ymax ; + // if (doc.HasMember("roi")) { + //if (doc["roi"].IsArray()) { + // if (doc["roi"].Size() > 0 ) + // if (doc["roi"][0].IsInt()) + // xmin=doc["roi"][0].GetInt(); - if (doc["roi"].Size() > 1 ) - if (doc["roi"][1].IsInt()) - xmax=doc["roi"][1].GetInt(); + // if (doc["roi"].Size() > 1 ) + // if (doc["roi"][1].IsInt()) + // xmax=doc["roi"][1].GetInt(); - if (doc["roi"].Size() > 2 ) - if (doc["roi"][2].IsInt()) - ymin=doc["roi"][2].GetInt(); + // if (doc["roi"].Size() > 2 ) + // if (doc["roi"][2].IsInt()) + // ymin=doc["roi"][2].GetInt(); - if (doc["roi"].Size() > 3 ) - if (doc["roi"][3].IsInt()) - ymax=doc["roi"][3].GetInt(); - } + // if (doc["roi"].Size() > 3 ) + // if (doc["roi"][3].IsInt()) + // ymax=doc["roi"][3].GetInt(); + // } } cprintf(MAGENTA, "%d %d %d %d\n", xmin, xmax, ymin, ymax); mt->setROI(xmin, xmax, ymin, ymax); - - if (doc.HasMember("dynamicRange")) { - dr=doc["dynamicRange"].GetUint(); + if (addJsonHeader.find("dynamicRange")!= addJsonHeader.end()) { + istringstream(addJsonHeader.at("dynamicRange")) >> dr ; dr=32; } + // if (doc.HasMember("dynamicRange")) { + // dr=doc["dynamicRange"].GetUint(); + // dr=32; + // } dMode=eAnalog; detectorMode_s="analog"; - cprintf(MAGENTA, "Detector mode: "); - if (doc.HasMember("detectorMode")) { - if (doc["detectorMode"].IsString()) { - detectorMode_s=doc["detectorMode"].GetString(); + cprintf(MAGENTA, "Detector mode: "); + if (addJsonHeader.find("detectorMode")!= addJsonHeader.end()) {; + //if (doc.HasMember("detectorMode")) { + //if (doc["detectorMode"].IsString()) { + detectorMode_s=addJsonHeader.at("detectorMode");//=doc["detectorMode"].GetString(); #ifdef INTERP if (detectorMode_s == "interpolating"){ dMode=eInterpolating; @@ -718,7 +828,7 @@ int main(int argc, char *argv[]) { mt->setInterpolation(NULL); #endif } - } + // } } @@ -767,19 +877,19 @@ int main(int argc, char *argv[]) { // } // threshold=0; - cprintf(MAGENTA, "Subframes: "); - subframes=0; - //isubframe=0; - insubframe=0; - subnorm=1; - f0=0; - nnsubframe=0; - if (doc.HasMember("subframes")) { - if (doc["subframes"].IsInt()) { - subframes=doc["subframes"].GetInt(); - } - } - cprintf(MAGENTA, "%ld\n", subframes); + // cprintf(MAGENTA, "Subframes: "); + // subframes=0; + // //isubframe=0; + // insubframe=0; + // subnorm=1; + // f0=0; + // nnsubframe=0; + // if (doc.HasMember("subframes")) { + // if (doc["subframes"].IsInt()) { + // subframes=doc["subframes"].GetInt(); + // } + // } + // cprintf(MAGENTA, "%ld\n", subframes); newFrame=0; @@ -811,13 +921,13 @@ int main(int argc, char *argv[]) { // get data // acqIndex = doc["acqIndex"].GetUint64(); - frameIndex = doc["fIndex"].GetUint64(); + frameIndex = zHeader.frameIndex;////doc["fIndex"].GetUint64(); // subFrameIndex = doc["expLength"].GetUint(); // bunchId=doc["bunchId"].GetUint(); // timestamp=doc["timestamp"].GetUint(); - packetNumber=doc["packetNumber"].GetUint(); + packetNumber=zHeader.packetNumber; //doc["packetNumber"].GetUint(); // cout << acqIndex << " " << frameIndex << " " << subFrameIndex << " "<< bunchId << " " << timestamp << " " << packetNumber << endl; //cprintf(GREEN, "frame\n"); if (packetNumber>=40) { @@ -866,8 +976,9 @@ int main(int argc, char *argv[]) { - zmqsocket2->SendHeaderData (0, false,SLS_DETECTOR_JSON_HEADER_VERSION , dr, fileindex, 1,1,nnx,nny,nnx*nny*dr/8,acqIndex, frameIndex, fname,acqIndex,0 , packetNumber,bunchId, timestamp, modId,xCoord, yCoord, zCoord,debug, roundRNumber, detType, version, 0,0, 0,&additionalJsonHeader); - + // zmqsocket2->SendHeaderData (0, false,SLS_DETECTOR_JSON_HEADER_VERSION , dr, fileindex, 1,1,nnx,nny,nnx*nny*dr/8,acqIndex, frameIndex, fname,acqIndex,0 , packetNumber,bunchId, timestamp, modId,xCoord, yCoord, zCoord,debug, roundRNumber, detType, version, 0,0, 0,&additionalJsonHeader); + zHeader.data = true; + zmqsocket2->SendHeader(0,zHeader); zmqsocket2->SendData((char*)dout,nnx*nny*dr/8); cprintf(GREEN, "Sent subdata\n"); diff --git a/slsDetectorCalibration/singlePhotonDetector.h b/slsDetectorCalibration/singlePhotonDetector.h index fc87619a1..fccf01774 100644 --- a/slsDetectorCalibration/singlePhotonDetector.h +++ b/slsDetectorCalibration/singlePhotonDetector.h @@ -490,7 +490,7 @@ int *getClusters(char *data, int *ph=NULL) { // (clusters+nph)->ped=getPedestal(ix,iy,0); for (ir=-(clusterSizeY/2); ir<(clusterSizeY/2)+1; ir++) { for (ic=-(clusterSize/2); ic<(clusterSize/2)+1; ic++) { - if ((iy+ir)>=iy && (iy+ir)=ix && (ix+ic)set_data(val[iy+ir][ix+ic],ic,ir); } } diff --git a/slsDetectorCalibration/single_photon_hit.h b/slsDetectorCalibration/single_photon_hit.h index e1a2d530f..922527320 100644 --- a/slsDetectorCalibration/single_photon_hit.h +++ b/slsDetectorCalibration/single_photon_hit.h @@ -36,19 +36,17 @@ class single_photon_hit { \param myFile file descriptor */ size_t write(FILE *myFile) { - //fwrite((void*)this, 1, 3*sizeof(int)+4*sizeof(double)+sizeof(quad), myFile); - - // if (fwrite((void*)this, 1, sizeof(int)+2*sizeof(int16_t), myFile)) + //fwrite((void*)this, 1, 3*sizeof(int)+4*sizeof(double)+sizeof(quad), myFile); // if (fwrite((void*)this, 1, sizeof(int)+2*sizeof(int16_t), myFile)) #ifdef OLDFORMAT if (fwrite((void*)&iframe, 1, sizeof(int), myFile)) {}; #endif #ifndef WRITE_QUAD //printf("no quad "); - //if (fwrite((void*)&x, 2, sizeof(int16_t), myFile)) - return fwrite((void*)&x, 1, dx*dy*sizeof(int)+2*sizeof(int16_t), myFile); + if (fwrite((void*)&x, sizeof(int16_t), 2, myFile)) + return fwrite((void*)data, sizeof(int), dx*dy, myFile); #endif #ifdef WRITE_QUAD - // printf("quad "); + // printf("quad "); int qq[4]; switch(quad) { case TOP_LEFT: @@ -91,8 +89,8 @@ class single_photon_hit { default: ; } - if (fwrite((void*)&x, 2, sizeof(int16_t), myFile)) - return fwrite((void*)qq, 1, 4*sizeof(int), myFile); + if (fwrite((void*)&x, sizeof(int16_t), 2, myFile)) + return fwrite((void*)qq, sizeof(int), 4, myFile); #endif return 0; }; @@ -109,14 +107,14 @@ class single_photon_hit { #endif #ifndef WRITE_QUAD // printf( "no quad \n"); - if (fread((void*)&x, 2, sizeof(int16_t), myFile)) - return fread((void*)data, 1, dx*dy*sizeof(int), myFile); + if (fread((void*)&x, sizeof(int16_t),2, myFile)) + return fread((void*)data, sizeof(int), dx*dy,myFile); #endif #ifdef WRITE_QUAD int qq[4]; - // printf( "quad \n"); - if (fread((void*)&x, 2, sizeof(int16_t), myFile)) - if (fread((void*)qq, 1, 4*sizeof(int), myFile)) { + printf( "quad \n"); + if (fread((void*)&x, sizeof(int16_t), 2, myFile)) + if (fread((void*)qq, sizeof(int), 4, myFile)) { quad=TOP_RIGHT; /* int mm=qq[0]; */ @@ -216,7 +214,6 @@ class single_photon_hit { for (int iy=0; iy Date: Wed, 6 May 2020 12:02:22 +0200 Subject: [PATCH 4/4] fixed still one index in cluster finder --- slsDetectorCalibration/singlePhotonDetector.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/slsDetectorCalibration/singlePhotonDetector.h b/slsDetectorCalibration/singlePhotonDetector.h index fccf01774..5a30341f4 100644 --- a/slsDetectorCalibration/singlePhotonDetector.h +++ b/slsDetectorCalibration/singlePhotonDetector.h @@ -490,7 +490,7 @@ int *getClusters(char *data, int *ph=NULL) { // (clusters+nph)->ped=getPedestal(ix,iy,0); for (ir=-(clusterSizeY/2); ir<(clusterSizeY/2)+1; ir++) { for (ic=-(clusterSize/2); ic<(clusterSize/2)+1; ic++) { - if ((iy+ir)=0 && (iy+ir)=0 && (ix+ic)set_data(val[iy+ir][ix+ic],ic,ir); } }