g2: badchanels moved to a new register base

This commit is contained in:
maliakal_d 2021-07-14 16:03:13 +02:00
parent 2f2fe4dd47
commit a127f8c97a
3 changed files with 15 additions and 9 deletions

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@ -28,10 +28,11 @@ This document describes the differences between 5.1.0 and 5.0.1 releases.
4. Mythen3, API function to set pattern from memory
Mythen3 server
-----------------
Gotthard2 server
----------------
1. Bad Channels moved to a new register
1. Setting timing to auto, sets timing to trigger for slaves
2. Resolved Issues

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@ -34,6 +34,9 @@
#define BASE_FLOW_CONTROL (0x00200) // 0x1806_0200 - 0x1806_02FF
// https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/f37608230b4721661f29aacc20124555705ee705/flow/flow_ctrl.vhd
/** Veto processing core */
#define BASE_VETO_PRCSSNG (0x0300) // 0x1806_0300 - 0x1806_03FF?
/* UDP datagram generator */
#define BASE_UDP_RAM (0x01000) // 0x1806_1000 - 0x1806_1FFF
@ -110,10 +113,6 @@
/** DTA Offset Register */
#define DTA_OFFSET_REG (0x0A * REG_OFFSET + BASE_CONTROL)
/** Mask Strip Registers (40) */
#define MASK_STRIP_START_REG (0x18 * REG_OFFSET + BASE_CONTROL)
#define MASK_STRIP_NUM_REGS (40)
/* ASIC registers --------------------------------------------------*/
/* ASIC Config register */
@ -258,4 +257,10 @@
#define RXR_ENDPOINTS_MAX (32)
#define RXR_ENDPOINT_OFST (16 * REG_OFFSET)
/** Veto processing core --------------------------------------------------*/
/** Mask Strip Registers (40) */
#define MASK_STRIP_START_REG (0x00 * REG_OFFSET + BASE_VETO_PRCSSNG)
#define MASK_STRIP_NUM_REGS (40)
// clang-format on

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@ -1,7 +1,7 @@
#pragma once
#include "sls/sls_detector_defs.h"
#define REQRD_FRMWRE_VRSN (0x200925)
#define REQRD_FRMWRE_VRSN (0x210714)
#define KERNEL_DATE_VRSN "Wed May 20 13:58:38 CEST 2020"
#define CTRL_SRVR_INIT_TIME_US (300 * 1000)