Dev/xilinx mat update (#959)

* put back code to obtain adc and dac device indexafter loading device tree and then create folder iio_device_links and create symbolic links there according to device indices found. ln -sf operation not permitted, so folder has to be deleted and created everytime. Also refactored definitions to have all the xilinx name or detector specific stuff out of programbyArm.c

* uncommented waittransceiverreset at startup (should work now) and return of powering off chip at startup (error for transceiver alignment reset)

* updated registerdefs from firmware

* minor prints and updating names from registerdefs

* waittransceiverreset has been fixed in firmware and removing warnign for that, transceiver alignment check for powering off chip is not done in fw (giving a warning and returning ok for now)

* fixing ipchecksum (not done), removed startperiphery, allowing readout command to be allowed for xilinx when acquiring
This commit is contained in:
2024-09-10 16:19:03 +02:00
committed by GitHub
parent 5b61ff24bb
commit 9f079b17a2
19 changed files with 235 additions and 121 deletions

View File

@ -817,18 +817,16 @@
#define MATTERHORNSPICTRL (0x608)
#define MATTERHORNSPICTRL_EN_OFST (0)
#define MATTERHORNSPICTRL_EN_MSK (0x00000001 << MATTERHORNSPICTRL_EN_OFST)
#define CONFIGSTART_OFST (1)
#define CONFIGSTART_MSK (0x00000001 << CONFIGSTART_OFST)
#define START_P_OFST (2)
#define START_P_MSK (0x00000001 << START_P_OFST)
#define STARTREAD_P_OFST (3)
#define STARTREAD_P_MSK (0x00000001 << STARTREAD_P_OFST)
#define BUSY_OFST (4)
#define BUSY_MSK (0x00000001 << BUSY_OFST)
#define READOUTFROMASIC_OFST (5)
#define READOUTFROMASIC_MSK (0x00000001 << READOUTFROMASIC_OFST)
#define CONFIGSTART_P_OFST (0)
#define CONFIGSTART_P_MSK (0x00000001 << CONFIGSTART_P_OFST)
#define PERIPHERYRST_P_OFST (1)
#define PERIPHERYRST_P_MSK (0x00000001 << PERIPHERYRST_P_OFST)
#define STARTREAD_P_OFST (2)
#define STARTREAD_P_MSK (0x00000001 << STARTREAD_P_OFST)
#define BUSY_OFST (3)
#define BUSY_MSK (0x00000001 << BUSY_OFST)
#define READOUTFROMASIC_OFST (4)
#define READOUTFROMASIC_MSK (0x00000001 << READOUTFROMASIC_OFST)
#define EMPTY60CREG (0x60C)
@ -905,6 +903,8 @@
#define RESETRXPLLANDDATAPATH_MSK (0x00000001 << RESETRXPLLANDDATAPATH_OFST)
#define RESETRXDATAPATHIN_OFST (4)
#define RESETRXDATAPATHIN_MSK (0x00000001 << RESETRXDATAPATHIN_OFST)
#define RXPOLARITY_OFST (5)
#define RXPOLARITY_MSK (0x0000000f << RXPOLARITY_OFST)
#define EMPTY65CREG (0x65C)

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@ -387,15 +387,15 @@ void setupDetector() {
initializePatternWord();
#endif
// initialization only at start up (restart fpga)
// initError = waitTransceiverReset(initErrorMessage);
// if (initError == FAIL) {
// return;
// }
// // power off chip
initError = waitTransceiverReset(initErrorMessage);
if (initError == FAIL) {
return;
}
// power off chip
initError = powerChip(0, initErrorMessage);
// if (initError == FAIL) {
// return;
// }
if (initError == FAIL) {
return;
}
LTC2620_D_SetDefines(DAC_MIN_MV, DAC_MAX_MV, DAC_DRIVER_FILE_NAME, NDAC,
NPWR, DAC_POWERDOWN_DRIVER_FILE_NAME);
@ -469,11 +469,6 @@ int waitTransceiverReset(char *mess) {
sprintf(mess, "Resetting transceiver timed out, time:%.2fs\n",
(timeNs / (1E9)));
LOG(logERROR, (mess));
LOG(logINFORED, ("Waiting for Firmware to be fixed here. Skipping "
"this error for now.\n"));
return OK;
return FAIL;
}
usleep(0);
@ -557,9 +552,6 @@ int powerChip(int on, char *mess) {
if (configureChip(mess) == FAIL)
return FAIL;
startPeriphery();
chipConfigured = 1;
} else {
LOG(logINFOBLUE, ("Powering chip: off\n"));
bus_w(addr, bus_r(addr) & ~mask);
@ -573,6 +565,11 @@ int powerChip(int on, char *mess) {
if (isTransceiverAligned()) {
sprintf(mess, "Transceiver alignment not reset\n");
LOG(logERROR, (mess));
// to be removed when fixed later
LOG(logWARNING, ("Bypassing this error for now. To be fixed later...\n"));
return OK;
return FAIL;
}
LOG(logINFO, ("\tTransceiver alignment has been reset\n"));
@ -598,8 +595,8 @@ int configureChip(char *mess) {
// start configuration
uint32_t addr = MATTERHORNSPICTRL;
bus_w(addr, bus_r(addr) | CONFIGSTART_MSK);
bus_w(addr, bus_r(addr) & ~CONFIGSTART_MSK);
bus_w(addr, bus_r(addr) | CONFIGSTART_P_MSK);
bus_w(addr, bus_r(addr) & ~CONFIGSTART_P_MSK);
// wait until configuration is done
#ifndef VIRTUAL
@ -615,16 +612,11 @@ int configureChip(char *mess) {
configDone = (bus_r(MATTERHORNSPICTRL) & BUSY_MSK);
}
#endif
chipConfigured = 1;
LOG(logINFOBLUE, ("\tChip configured\n"));
return OK;
}
void startPeriphery() {
LOG(logINFOBLUE, ("\tStarting periphery\n"));
bus_w(MATTERHORNSPICTRL, bus_r(MATTERHORNSPICTRL) | START_P_MSK);
// TODO ?
}
/* set parameters - dr */
int setDynamicRange(int dr) {
@ -1223,14 +1215,21 @@ void calcChecksum(udp_header *udp) {
// ignore ethertype (from udp header)
addr++;
// ignore udp_srcmac_lsb (from udp header)
addr++;
addr++;
// from identification to srcip_lsb
// from ip_protocol to ip_checksum
while (count > 2) {
sum += *addr++;
count -= 2;
}
// ignore src udp port (from udp header)
// ignore udp_checksum (from udp header)
addr++;
// ignore udp_destport (from udp header)
addr++;
// ignore udp_srcport (from udp header)
addr++;
if (count > 0)
@ -1240,6 +1239,7 @@ void calcChecksum(udp_header *udp) {
long int checksum = sum & 0xffff;
checksum += UDP_IP_HEADER_LENGTH_BYTES;
udp->ip_checksum = checksum;
LOG(logINFO, ("\tIP checksum: 0x%x\n", checksum));
}
int configureMAC() {
@ -1334,7 +1334,7 @@ int startStateMachine() {
#endif
LOG(logINFOBLUE, ("Starting State Machine\n"));
cleanFifos();
//cleanFifos(); removing this for now as its done before readout pattern
// start state machine
bus_w(FLOW_CONTROL_REG, bus_r(FLOW_CONTROL_REG) | START_F_MSK);
@ -1356,6 +1356,7 @@ int startStateMachine() {
usleep(0);
commaDet = (bus_r(TRANSCEIVERSTATUS) & RXCOMMADET_MSK);
}
LOG(logINFORED, ("Kwords or end of acquisition detected\n"));
return OK;
}
@ -1516,6 +1517,7 @@ int startReadOut() {
usleep(0);
streamingBusy = (bus_r(STATUSREG1) & TRANSMISSIONBUSY_MSK);
}
LOG(logINFORED, ("Streaming done\n"));
return OK;
}

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@ -25,16 +25,20 @@
#define DYNAMIC_RANGE (16)
#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8)
#define DAC_DRIVER_FILE_NAME ("/root/apps/xilinx-ctb/current_board_links/ao%d")
#define DAC_POWERDOWN_DRIVER_FILE_NAME \
("/root/apps/xilinx-ctb/current_board_links/ao%d_pd")
#define MAIN_APP_FOLDER "/root/apps/xilinx-ctb"
#define FIRMWARE_FILE MAIN_APP_FOLDER "/XilinxCTB.bit"
#define DEVICE_TREE_OVERLAY_FILE MAIN_APP_FOLDER "/pl.dtbo"
#define CURRENT_BOARD_LINKS_FOLDER MAIN_APP_FOLDER "/current_board_links"
#define IIO_DEVICE_FOLDER MAIN_APP_FOLDER "/iio_device_links"
#define SLOWADC_DRIVER_FILE_NAME \
("/root/apps/xilinx-ctb/mythenIII_0.2_1.1/links/ai%d")
// #define SLOWDAC_CONVERTION_FACTOR_TO_UV (62.500953)
#define DEVICE_TREE_DST "/sys/bus/iio/devices/iio:device"
#define DEVICE_NAME_LIST "xilinx-ams", "ad7689", "dac@0", "dac@1", "dac@2"
#define DEVICE_TREE_API_FOLDER "/sys/kernel/config/device-tree/overlays/spidr"
#define TEMP_DRIVER_FILE_NAME \
("/sys/bus/iio/devices/iio:device0/in_temp7_input")
#define DAC_DRIVER_FILE_NAME CURRENT_BOARD_LINKS_FOLDER "/ao%d"
#define DAC_POWERDOWN_DRIVER_FILE_NAME CURRENT_BOARD_LINKS_FOLDER "/ao%d_pd"
#define SLOWADC_DRIVER_FILE_NAME CURRENT_BOARD_LINKS_FOLDER "/ai%d"
#define TEMP_DRIVER_FILE_NAME DEVICE_TREE_DST "0/in_temp7_input"
/** Default Parameters */
#define DEFAULT_NUM_FRAMES (1)