mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-23 06:50:02 +02:00
commit
9e1716da56
@ -67,6 +67,13 @@ filter->filterResistor
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setBottom->setFlipRows
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currentsource expects currentsrcparameters structure instread of bool
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g2:
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updated config file indetector server
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vetoalg
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vetostream
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serialnumber (put)
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dbitpipeline
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3. Firmware Requirements
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========================
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@ -2448,10 +2448,15 @@ class Detector(CppDetectorApi):
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@property
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def vetoalg(self):
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"""[Gotthard2] Algorithm used for veto
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"""[Gotthard2] Algorithm used for veto. Enum: vetoAlgorithm, streamingInterface
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Note
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----
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Options:
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(vetoAlgorithm): ALG_HITS, ALG_RAW
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(streamingInterface): ETHERNET_10GB, LOW_LATENCY_LINK
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Example
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----------
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>>> d.vetoalg = defs.DEFAULT_ALGORITHM, defs.ETHERNET_10GB
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>>> d.vetoalg = defs.ALG_HITS, defs.ETHERNET_10GB
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"""
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result = {}
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interface = [streamingInterface.LOW_LATENCY_LINK, streamingInterface.ETHERNET_10GB]
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@ -2656,7 +2661,12 @@ class Detector(CppDetectorApi):
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@property
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@element
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def dbitpipeline(self):
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"""[Ctb] Pipeline of the clock for latching digital bits. """
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"""[Ctb][Gotthard2] Pipeline of the clock for latching digital bits.
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Note
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----
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[CTB] Options: 0 - 255
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[Gotthard2] Options: 0 - 7
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"""
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return self.getDBITPipeline()
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@dbitpipeline.setter
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@ -69,6 +69,10 @@ void init_det(py::module &m) {
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(Result<int64_t>(Detector::*)(sls::Positions) const) &
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Detector::getSerialNumber,
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py::arg() = Positions{})
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.def("setSerialNumber",
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(Result<int64_t>(Detector::*)(sls::Positions) const) &
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Detector::setSerialNumber,
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py::arg(), py::arg() = Positions{})
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.def("getReceiverVersion",
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(Result<int64_t>(Detector::*)(sls::Positions) const) &
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Detector::getReceiverVersion,
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@ -303,8 +303,8 @@ void init_enums(py::module &m) {
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&operator&));
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py::enum_<slsDetectorDefs::vetoAlgorithm>(Defs, "vetoAlgorithm")
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.value("DEFAULT_ALGORITHM",
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slsDetectorDefs::vetoAlgorithm::DEFAULT_ALGORITHM)
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.value("ALG_HITS", slsDetectorDefs::vetoAlgorithm::ALG_HITS)
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.value("ALG_RAW", slsDetectorDefs::vetoAlgorithm::ALG_RAW)
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.export_values();
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py::enum_<slsDetectorDefs::gainMode>(Defs, "gainMode")
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Binary file not shown.
@ -1840,46 +1840,38 @@ void configureSyncFrequency(enum CLKINDEX ind) {
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setFrequency(SYNC_CLK, min);
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}
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void setPipeline(enum CLKINDEX ind, int val) {
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if (ind != ADC_CLK && ind != DBIT_CLK) {
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LOG(logERROR, ("Unknown clock index %d to set pipeline\n", ind));
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return;
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}
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void setADCPipeline(int val) {
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if (val < 0) {
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return;
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}
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char *clock_names[] = {CLK_NAMES};
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LOG(logINFO,
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("Setting %s clock (%d) Pipeline to %d\n", clock_names[ind], ind, val));
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uint32_t offset = ADC_OFFSET_ADC_PPLN_OFST;
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uint32_t mask = ADC_OFFSET_ADC_PPLN_MSK;
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if (ind == DBIT_CLK) {
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offset = ADC_OFFSET_DBT_PPLN_OFST;
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mask = ADC_OFFSET_DBT_PPLN_MSK;
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}
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LOG(logINFO, ("Setting adc pipeline to %d\n", val));
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uint32_t addr = ADC_OFFSET_REG;
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// reset value
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bus_w(addr, bus_r(addr) & ~mask);
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// set value
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bus_w(addr, bus_r(addr) | ((val << offset) & mask));
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LOG(logDEBUG1,
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(" %s clock (%d) Offset: 0x%8x\n", clock_names[ind], ind, bus_r(addr)));
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bus_w(addr, bus_r(addr) & ~ADC_OFFSET_ADC_PPLN_MSK);
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bus_w(addr, bus_r(addr) | ((val << ADC_OFFSET_ADC_PPLN_OFST) &
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ADC_OFFSET_ADC_PPLN_MSK));
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}
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int getPipeline(enum CLKINDEX ind) {
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if (ind != ADC_CLK && ind != DBIT_CLK) {
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LOG(logERROR, ("Unknown clock index %d to get pipeline\n", ind));
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return -1;
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}
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if (ind == DBIT_CLK) {
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return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_DBT_PPLN_MSK) >>
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ADC_OFFSET_DBT_PPLN_OFST);
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}
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int getADCPipeline() {
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return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >>
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ADC_OFFSET_ADC_PPLN_OFST);
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}
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void setDBITPipeline(int val) {
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if (val < 0) {
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return;
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}
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LOG(logINFO, ("Setting dbit pipeline to %d\n", val));
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uint32_t addr = ADC_OFFSET_REG;
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bus_w(addr, bus_r(addr) & ~ADC_OFFSET_DBT_PPLN_MSK);
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bus_w(addr, bus_r(addr) | ((val << ADC_OFFSET_DBT_PPLN_OFST) &
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ADC_OFFSET_DBT_PPLN_MSK));
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}
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int getDBITPipeline() {
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return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_DBT_PPLN_MSK) >>
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ADC_OFFSET_DBT_PPLN_OFST);
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}
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int setLEDEnable(int enable) {
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uint32_t addr = CONFIG_REG;
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Binary file not shown.
@ -90,16 +90,16 @@
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#define CONFIG_VETO_ENBL_OFST (0)
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#define CONFIG_VETO_ENBL_MSK (0x00000001 << CONFIG_VETO_ENBL_OFST)
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#define CONFIG_VETO_CH_3GB_ALG_OFST (8)
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#define CONFIG_VETO_CH_3GB_ALG_MSK (0x00000007 << CONFIG_VETO_CH_3GB_ALG_OFST)
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#define CONFIG_VETO_CH_3GB_ALG_DEFAULT_VAL ((0x0 << CONFIG_VETO_CH_3GB_ALG_OFST) & CONFIG_VETO_CH_3GB_ALG_MSK)
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#define CONFIG_VETO_CH_3GB_ENBL_OFST (11)
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#define CONFIG_VETO_CH_3GB_ENBL_MSK (0x00000001 << CONFIG_VETO_CH_3GB_ENBL_OFST)
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#define CONFIG_VETO_CH_10GB_ALG_OFST (12)
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#define CONFIG_VETO_CH_10GB_ALG_MSK (0x00000007 << CONFIG_VETO_CH_10GB_ALG_OFST)
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#define CONFIG_VETO_CH_10GB_ALG_DEFAULT_VAL ((0x0 << CONFIG_VETO_CH_10GB_ALG_OFST) & CONFIG_VETO_CH_10GB_ALG_MSK)
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#define CONFIG_VETO_CH_10GB_ENBL_OFST (15)
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#define CONFIG_VETO_CH_10GB_ENBL_MSK (0x00000001 << CONFIG_VETO_CH_10GB_ENBL_OFST)
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#define CONFIG_VETO_CH_LLL_ALG_OFST (8)
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#define CONFIG_VETO_CH_LLL_ALG_MSK (0x00000007 << CONFIG_VETO_CH_LLL_ALG_OFST)
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#define CONFIG_VETO_CH_LLL_ENBL_OFST (11)
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#define CONFIG_VETO_CH_LLL_ENBL_MSK (0x00000001 << CONFIG_VETO_CH_LLL_ENBL_OFST)
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#define CONFIG_VETO_CH_10GBE_ALG_OFST (12)
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#define CONFIG_VETO_CH_10GBE_ALG_MSK (0x00000007 << CONFIG_VETO_CH_10GBE_ALG_OFST)
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#define CONFIG_VETO_CH_10GBE_ENBL_OFST (15)
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#define CONFIG_VETO_CH_10GBE_ENBL_MSK (0x00000001 << CONFIG_VETO_CH_10GBE_ENBL_OFST)
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#define ALGORITHM_HITS_VAL (0x0)
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#define ALGORITHM_RAW_VAL (0x7)
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/* Control RW register */
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#define CONTROL_REG (0x09 * REG_OFFSET + BASE_CONTROL)
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@ -122,6 +122,13 @@
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/** DTA Offset Register */
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#define DTA_OFFSET_REG (0x0A * REG_OFFSET + BASE_CONTROL)
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#define MOD_ID_REG (0x0D * REG_OFFSET + BASE_CONTROL)
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#define MOD_ID_OFST (0)
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#define MOD_ID_MSK (0x0000FFFF << MOD_ID_OFST)
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#define MOD_MAX_VAL (0xFFFF)
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/* ASIC registers --------------------------------------------------*/
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/* ASIC Config register */
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@ -164,6 +171,16 @@
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#define ASIC_CONT_FRAMES_LSB_REG (0x06 * REG_OFFSET + BASE_ASIC)
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#define ASIC_CONT_FRAMES_MSB_REG (0x07 * REG_OFFSET + BASE_ASIC)
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/* ADIF registers --------------------------------------------------*/
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/* ADIF Config register */
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#define ADIF_CONFIG_REG (0x00 * REG_OFFSET + BASE_ADIF)
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#define ADIF_CONFIG_DBIT_PIPELINE_OFST (4)
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#define ADIF_CONFIG_DBIT_PIPELINE_MSK (0x00000007 << ADIF_CONFIG_DBIT_PIPELINE_OFST)
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/* Packetizer -------------------------------------------------------------*/
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/* Packetizer Config Register */
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@ -1,11 +1,9 @@
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#onchip dacs chip index value (max 0x3ff)
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vchip_comp_fe -1 0x137
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vchip_opa_1st -1 0x000
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vchip_opa_fd -1 0x134
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vchip_comp_adc -1 0x3FF
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vchip_ref_comp_fe -1 0x180
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vchip_ref_comp_fe -1 0x140
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vchip_cs -1 0x0D0
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#dacs value (max 4096)
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@ -29,5 +27,3 @@ confadc -1 -1 0x22
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#vetoreference gain index value(max 4095)
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vetoref 1 0
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Binary file not shown.
@ -1,11 +1,9 @@
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#onchip dacs chip index value (max 0x3ff)
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vchip_comp_fe -1 0x137
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vchip_opa_1st -1 0x000
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vchip_opa_fd -1 0x134
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vchip_comp_adc -1 0x3FF
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vchip_ref_comp_fe -1 0x180
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vchip_ref_comp_fe -1 0x140
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vchip_cs -1 0x0D0
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#dacs value (max 4096)
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@ -29,5 +27,3 @@ confadc -1 -1 0x22
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#vetoreference gain index value(max 4095)
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vetoref 1 0
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@ -280,13 +280,18 @@ u_int16_t getHardwareVersionNumber() {
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MCB_SERIAL_NO_VRSN_OFST);
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}
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u_int32_t getDetectorNumber() {
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#ifdef VIRTUAL
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return 0;
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#endif
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return bus_r(MCB_SERIAL_NO_REG);
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uint16_t getSerialNumber() {
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return ((bus_r(MOD_ID_REG) & MOD_ID_MSK) >> MOD_ID_OFST);
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}
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void setSerialNumber(uint16_t arg) {
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LOG(logINFOBLUE, ("Setting Serial Number to 0x%x\n", arg));
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bus_w(MOD_ID_REG, bus_r(MOD_ID_REG) & ~MOD_ID_MSK);
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bus_w(MOD_ID_REG, bus_r(MOD_ID_REG) | ((arg << MOD_ID_OFST) & MOD_ID_MSK));
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}
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int getMaxSerialNumber() { return MOD_MAX_VAL; }
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u_int64_t getDetectorMAC() {
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#ifdef VIRTUAL
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return 0;
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@ -481,6 +486,8 @@ void setupDetector() {
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setBurstPeriod(DEFAULT_BURST_PERIOD);
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setTiming(DEFAULT_TIMING_MODE);
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setCurrentSource(DEFAULT_CURRENT_SOURCE);
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setVetoAlgorithm(DEFAULT_ALGORITHM, LOW_LATENCY_LINK);
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setVetoAlgorithm(DEFAULT_ALGORITHM, ETHERNET_10GB);
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}
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int resetToDefaultDacs(int hardReset) {
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@ -1620,12 +1627,12 @@ void setNumberofUDPInterfaces(int val) {
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// 2 rxr interfaces (enable debugging interface)
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if (val > 1) {
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LOG(logINFOBLUE, ("Enabling 10GbE (debugging) veto streaming\n"));
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bus_w(addr, bus_r(addr) | CONFIG_VETO_CH_10GB_ENBL_MSK);
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bus_w(addr, bus_r(addr) | CONFIG_VETO_CH_10GBE_ENBL_MSK);
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}
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// 1 rxr interface (disable debugging interface)
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else {
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LOG(logINFOBLUE, ("Disabling 10GbE (debugging) veto streaming\n"));
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bus_w(addr, bus_r(addr) & ~CONFIG_VETO_CH_10GB_ENBL_MSK);
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bus_w(addr, bus_r(addr) & ~CONFIG_VETO_CH_10GBE_ENBL_MSK);
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}
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LOG(logDEBUG, ("config reg:0x%x\n", bus_r(addr)));
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}
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@ -1633,7 +1640,7 @@ void setNumberofUDPInterfaces(int val) {
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int getNumberofUDPInterfaces() {
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LOG(logDEBUG, ("config reg:0x%x\n", bus_r(CONFIG_REG)));
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// return 2 if 10gbps veto streaming enabled, else 1
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return ((bus_r(CONFIG_REG) & CONFIG_VETO_CH_10GB_ENBL_MSK) ? 2 : 1);
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return ((bus_r(CONFIG_REG) & CONFIG_VETO_CH_10GBE_ENBL_MSK) ? 2 : 1);
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}
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void setupHeader(int iRxEntry, int vetoInterface, uint32_t destip,
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@ -1756,9 +1763,9 @@ int configureMAC() {
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int i10gbe = (getNumberofUDPInterfaces() == 2 ? 1 : 0);
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if (lll) {
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LOG(logINFOGREEN, ("\tVeto (3GbE) : enabled\n\n"));
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LOG(logINFOGREEN, ("\tVeto (lll) : enabled\n\n"));
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} else {
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LOG(logINFORED, ("\tVeto (3GbE) : disabled\n\n"));
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LOG(logINFORED, ("\tVeto (lll) : disabled\n\n"));
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}
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if (i10gbe) {
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LOG(logINFOGREEN, ("\tVeto (10GbE): enabled\n"));
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@ -1905,6 +1912,22 @@ int powerChip(int on) {
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CONTROL_PWR_CHIP_OFST);
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}
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void setDBITPipeline(int val) {
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if (val < 0) {
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return;
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}
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LOG(logINFO, ("Setting dbit pipeline to %d\n", val));
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uint32_t addr = ADIF_CONFIG_REG;
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bus_w(addr, bus_r(addr) & ~ADIF_CONFIG_DBIT_PIPELINE_MSK);
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bus_w(addr, bus_r(addr) | ((val << ADIF_CONFIG_DBIT_PIPELINE_OFST) &
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ADIF_CONFIG_DBIT_PIPELINE_MSK));
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}
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int getDBITPipeline() {
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return ((bus_r(ADIF_CONFIG_REG) & ADIF_CONFIG_DBIT_PIPELINE_MSK) >>
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ADIF_CONFIG_DBIT_PIPELINE_OFST);
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}
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int setPhase(enum CLKINDEX ind, int val, int degrees) {
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if (ind < 0 || ind >= NUM_CLOCKS) {
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LOG(logERROR, ("Unknown clock index %d to set phase\n", ind));
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@ -2629,65 +2652,73 @@ void setVetoStream(int value) {
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uint32_t addr = CONFIG_REG;
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if (value) {
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LOG(logINFOBLUE, ("Enabling 3GbE veto streaming\n"));
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bus_w(addr, bus_r(addr) | CONFIG_VETO_CH_3GB_ENBL_MSK);
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LOG(logINFOBLUE, ("Enabling lll veto streaming\n"));
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bus_w(addr, bus_r(addr) | CONFIG_VETO_CH_LLL_ENBL_MSK);
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} else {
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LOG(logINFOBLUE, ("Disabling 3GbE veto streaming\n"));
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bus_w(addr, bus_r(addr) & ~CONFIG_VETO_CH_3GB_ENBL_MSK);
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LOG(logINFOBLUE, ("Disabling lll veto streaming\n"));
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bus_w(addr, bus_r(addr) & ~CONFIG_VETO_CH_LLL_ENBL_MSK);
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}
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LOG(logDEBUG, ("config reg:0x%x\n", bus_r(addr)));
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}
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int getVetoStream() {
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return ((bus_r(CONFIG_REG) & CONFIG_VETO_CH_3GB_ENBL_MSK) ? 1 : 0);
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return ((bus_r(CONFIG_REG) & CONFIG_VETO_CH_LLL_ENBL_MSK) ? 1 : 0);
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}
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enum vetoAlgorithm getVetoAlgorithm(enum streamingInterface interface) {
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// 3gbe
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int retval = 0;
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if (interface == LOW_LATENCY_LINK) {
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int retval = ((bus_r(CONFIG_REG) & CONFIG_VETO_CH_3GB_ALG_MSK) >>
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CONFIG_VETO_CH_3GB_ALG_OFST);
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switch (retval) {
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// more to follow
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case CONFIG_VETO_CH_3GB_ALG_DEFAULT_VAL:
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return DEFAULT_ALGORITHM;
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default:
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LOG(logERROR, ("unknown algorithm %d for 3gbe\n", retval));
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return -1;
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retval = ((bus_r(CONFIG_REG) & CONFIG_VETO_CH_LLL_ALG_MSK) >>
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CONFIG_VETO_CH_LLL_ALG_OFST);
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} else {
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retval = ((bus_r(CONFIG_REG) & CONFIG_VETO_CH_10GBE_ALG_MSK) >>
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CONFIG_VETO_CH_10GBE_ALG_OFST);
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}
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}
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// 10gbe
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int retval = ((bus_r(CONFIG_REG) & CONFIG_VETO_CH_10GB_ALG_MSK) >>
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CONFIG_VETO_CH_10GB_ALG_OFST);
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switch (retval) {
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// more to follow
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case CONFIG_VETO_CH_10GB_ALG_DEFAULT_VAL:
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return DEFAULT_ALGORITHM;
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case ALGORITHM_HITS_VAL:
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return ALG_HITS;
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case ALGORITHM_RAW_VAL:
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return ALG_RAW;
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default:
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LOG(logERROR, ("unknown algorithm %d for 3gbe\n", retval));
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LOG(logERROR, ("unknown algorithm %d\n", retval));
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return -1;
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}
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}
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void setVetoAlgorithm(enum streamingInterface interface,
|
||||
enum vetoAlgorithm alg) {
|
||||
void setVetoAlgorithm(enum vetoAlgorithm alg,
|
||||
enum streamingInterface interface) {
|
||||
uint32_t addr = CONFIG_REG;
|
||||
uint32_t value = bus_r(addr);
|
||||
switch (alg) {
|
||||
// more to follow
|
||||
case DEFAULT_ALGORITHM:
|
||||
case ALG_HITS:
|
||||
if (interface == LOW_LATENCY_LINK) {
|
||||
LOG(logINFO, ("Setting default veto algorithm for 3Gbe\n"));
|
||||
value &= (~CONFIG_VETO_CH_3GB_ALG_MSK);
|
||||
value |= CONFIG_VETO_CH_3GB_ALG_DEFAULT_VAL;
|
||||
LOG(logINFO, ("Setting veto algorithm [lll]: hits\n"));
|
||||
value &= (~CONFIG_VETO_CH_LLL_ALG_MSK);
|
||||
value |= ((ALGORITHM_HITS_VAL << CONFIG_VETO_CH_LLL_ALG_OFST) &
|
||||
CONFIG_VETO_CH_LLL_ALG_MSK);
|
||||
} else {
|
||||
LOG(logINFO, ("Setting default veto algorithm for 10Gbe\n"));
|
||||
value &= (~CONFIG_VETO_CH_10GB_ALG_MSK);
|
||||
value |= CONFIG_VETO_CH_10GB_ALG_DEFAULT_VAL;
|
||||
LOG(logINFO, ("Setting veto algorithm [10Gbe]: hits\n"));
|
||||
value &= (~CONFIG_VETO_CH_10GBE_ALG_MSK);
|
||||
value |= ((ALGORITHM_HITS_VAL << CONFIG_VETO_CH_10GBE_ALG_OFST) &
|
||||
CONFIG_VETO_CH_10GBE_ALG_MSK);
|
||||
}
|
||||
break;
|
||||
case ALG_RAW:
|
||||
if (interface == LOW_LATENCY_LINK) {
|
||||
LOG(logINFO, ("Setting veto algorithm [lll]: raw\n"));
|
||||
value &= (~CONFIG_VETO_CH_LLL_ALG_MSK);
|
||||
value |= ((ALGORITHM_RAW_VAL << CONFIG_VETO_CH_LLL_ALG_OFST) &
|
||||
CONFIG_VETO_CH_LLL_ALG_MSK);
|
||||
} else {
|
||||
LOG(logINFO, ("Setting veto algorithm [10Gbe]: raw\n"));
|
||||
value &= (~CONFIG_VETO_CH_10GBE_ALG_MSK);
|
||||
value |= ((ALGORITHM_RAW_VAL << CONFIG_VETO_CH_10GBE_ALG_OFST) &
|
||||
CONFIG_VETO_CH_10GBE_ALG_MSK);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
LOG(logERROR, ("unknown algorithm %d for 3gbe\n", alg));
|
||||
LOG(logERROR, ("unknown algorithm %d for lll\n", alg));
|
||||
return;
|
||||
}
|
||||
bus_w(addr, value);
|
||||
|
@ -49,6 +49,7 @@
|
||||
#define DEFAULT_SETTINGS (DYNAMICGAIN)
|
||||
#define DEFAULT_CURRENT_SOURCE (0)
|
||||
#define DEFAULT_TIMING_SOURCE (TIMING_INTERNAL)
|
||||
#define DEFAULT_ALGORITHM (ALG_HITS)
|
||||
|
||||
#define DEFAULT_READOUT_C0 (6) //(144444448) // rdo_clk, 144 MHz
|
||||
#define DEFAULT_READOUT_C1 (6) //(144444448) // rdo_x2_clk, 144 MHz
|
||||
@ -62,6 +63,7 @@
|
||||
#define INT_SYSTEM_C0_FREQUENCY (144000000) // 144 MHz
|
||||
#define READOUT_PLL_VCO_FREQ_HZ (866666688) // 866 MHz
|
||||
#define SYSTEM_PLL_VCO_FREQ_HZ (722222224) // 722 MHz
|
||||
|
||||
#define VETO_DATA_SIZE (160)
|
||||
typedef struct {
|
||||
uint64_t frameNumber;
|
||||
|
Binary file not shown.
Binary file not shown.
Binary file not shown.
@ -550,7 +550,7 @@ void setupDetector() {
|
||||
LOG(logERROR, ("%s\n\n", initErrorMessage));
|
||||
initError = FAIL;
|
||||
}
|
||||
setPipeline(ADC_CLK, DEFAULT_PIPELINE);
|
||||
setADCPipeline(DEFAULT_PIPELINE);
|
||||
if (initError != FAIL) {
|
||||
initError = loadPatternFile(DEFAULT_PATTERN_FILE, initErrorMessage);
|
||||
}
|
||||
@ -1562,35 +1562,23 @@ void configureSyncFrequency(enum CLKINDEX ind) {
|
||||
setFrequency(SYNC_CLK, min);
|
||||
}
|
||||
|
||||
// adc pipeline only
|
||||
void setPipeline(enum CLKINDEX ind, int val) {
|
||||
if (ind != ADC_CLK) {
|
||||
LOG(logERROR, ("Unknown clock index %d to set pipeline\n", ind));
|
||||
return;
|
||||
}
|
||||
void setADCPipeline(int val) {
|
||||
if (val < 0) {
|
||||
return;
|
||||
}
|
||||
LOG(logINFO, ("Setting adc clock (%d) Pipeline to %d\n", ADC_CLK, val));
|
||||
uint32_t offset = ADC_OFFSET_ADC_PPLN_OFST;
|
||||
uint32_t mask = ADC_OFFSET_ADC_PPLN_MSK;
|
||||
LOG(logINFO, ("Setting adc pipeline to %d\n", val));
|
||||
uint32_t addr = ADC_OFFSET_REG;
|
||||
// reset value
|
||||
bus_w(addr, bus_r(addr) & ~mask);
|
||||
// set value
|
||||
bus_w(addr, bus_r(addr) | ((val << offset) & mask));
|
||||
LOG(logDEBUG1, (" adc clock (%d) Offset: 0x%8x\n", ADC_CLK, bus_r(addr)));
|
||||
bus_w(addr, bus_r(addr) & ~ADC_OFFSET_ADC_PPLN_MSK);
|
||||
bus_w(addr, bus_r(addr) | ((val << ADC_OFFSET_ADC_PPLN_OFST) &
|
||||
ADC_OFFSET_ADC_PPLN_MSK));
|
||||
}
|
||||
|
||||
int getPipeline(enum CLKINDEX ind) {
|
||||
if (ind != ADC_CLK) {
|
||||
LOG(logERROR, ("Unknown clock index %d to get pipeline\n", ind));
|
||||
return -1;
|
||||
}
|
||||
int getADCPipeline() {
|
||||
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >>
|
||||
ADC_OFFSET_ADC_PPLN_OFST);
|
||||
}
|
||||
|
||||
|
||||
/* aquisition */
|
||||
|
||||
int startStateMachine() {
|
||||
|
Binary file not shown.
@ -93,6 +93,11 @@ int getChipVersion();
|
||||
void readDetectorNumber();
|
||||
#endif
|
||||
u_int32_t getDetectorNumber();
|
||||
#ifdef GOTTHARD2D
|
||||
uint16_t getSerialNumber();
|
||||
void setSerialNumber(uint16_t arg);
|
||||
int getMaxSerialNumber();
|
||||
#endif
|
||||
u_int64_t getDetectorMAC();
|
||||
u_int32_t getDetectorIP();
|
||||
#ifdef GOTTHARDD
|
||||
@ -430,11 +435,13 @@ int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval);
|
||||
int setFrequency(enum CLKINDEX ind, int val);
|
||||
int getFrequency(enum CLKINDEX ind);
|
||||
void configureSyncFrequency(enum CLKINDEX ind);
|
||||
void setPipeline(enum CLKINDEX ind, int val);
|
||||
int getPipeline(enum CLKINDEX ind);
|
||||
void setADCPipeline(int val);
|
||||
int getADCPipeline();
|
||||
#endif
|
||||
|
||||
#ifdef CHIPTESTBOARDD
|
||||
void setDBITPipeline(int val);
|
||||
int getDBITPipeline();
|
||||
int setLEDEnable(int enable);
|
||||
void setDigitalIODelay(uint64_t pinMask, int delay);
|
||||
#endif
|
||||
@ -519,6 +526,8 @@ int getClockDivider(enum CLKINDEX ind);
|
||||
#elif GOTTHARD2D
|
||||
int checkDetectorType();
|
||||
int powerChip(int on);
|
||||
void setDBITPipeline(int val);
|
||||
int getDBITPipeline();
|
||||
int setPhase(enum CLKINDEX ind, int val, int degrees);
|
||||
int getPhase(enum CLKINDEX ind, int degrees);
|
||||
int getMaxPhase(enum CLKINDEX ind);
|
||||
@ -554,7 +563,8 @@ int getVeto();
|
||||
void setVetoStream(int value);
|
||||
int getVetoStream();
|
||||
enum vetoAlgorithm getVetoAlgorithm(enum streamingInterface interface);
|
||||
void setVetoAlgorithm(enum streamingInterface interface, enum vetoAlgorithm alg);
|
||||
void setVetoAlgorithm(enum vetoAlgorithm alg,
|
||||
enum streamingInterface interface);
|
||||
void setBadChannels(int nch, int *channels);
|
||||
int *getBadChannels(int *nch);
|
||||
#endif
|
||||
|
@ -188,8 +188,6 @@ int get_clock_phase(int);
|
||||
int get_max_clock_phase_shift(int);
|
||||
int set_clock_divider(int);
|
||||
int get_clock_divider(int);
|
||||
int set_pipeline(int);
|
||||
int get_pipeline(int);
|
||||
int set_on_chip_dac(int);
|
||||
int get_on_chip_dac(int);
|
||||
int set_inject_channel(int);
|
||||
@ -265,3 +263,8 @@ int get_flip_rows(int);
|
||||
int set_flip_rows(int);
|
||||
int get_filter_cell(int);
|
||||
int set_filter_cell(int);
|
||||
int set_adc_pipeline(int);
|
||||
int get_adc_pipeline(int);
|
||||
int set_dbit_pipeline(int);
|
||||
int get_dbit_pipeline(int);
|
||||
int set_serial_number(int);
|
@ -313,8 +313,6 @@ void function_table() {
|
||||
flist[F_GET_MAX_CLOCK_PHASE_SHIFT] = &get_max_clock_phase_shift;
|
||||
flist[F_SET_CLOCK_DIVIDER] = &set_clock_divider;
|
||||
flist[F_GET_CLOCK_DIVIDER] = &get_clock_divider;
|
||||
flist[F_SET_PIPELINE] = &set_pipeline;
|
||||
flist[F_GET_PIPELINE] = &get_pipeline;
|
||||
flist[F_SET_ON_CHIP_DAC] = &set_on_chip_dac;
|
||||
flist[F_GET_ON_CHIP_DAC] = &get_on_chip_dac;
|
||||
flist[F_SET_INJECT_CHANNEL] = &set_inject_channel;
|
||||
@ -390,6 +388,11 @@ void function_table() {
|
||||
flist[F_SET_FLIP_ROWS] = &set_flip_rows;
|
||||
flist[F_GET_FILTER_CELL] = &get_filter_cell;
|
||||
flist[F_SET_FILTER_CELL] = &set_filter_cell;
|
||||
flist[F_SET_ADC_PIPELINE] = &set_adc_pipeline;
|
||||
flist[F_GET_ADC_PIPELINE] = &get_adc_pipeline;
|
||||
flist[F_SET_DBIT_PIPELINE] = &set_dbit_pipeline;
|
||||
flist[F_GET_DBIT_PIPELINE] = &get_dbit_pipeline;
|
||||
flist[F_SET_SERIAL_NUMBER] = &set_serial_number;
|
||||
|
||||
// check
|
||||
if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) {
|
||||
@ -663,11 +666,39 @@ int get_serial_number(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
int64_t retval = -1;
|
||||
#ifdef GOTTHARD2D
|
||||
retval = getSerialNumber();
|
||||
#else
|
||||
retval = getDetectorNumber();
|
||||
#endif
|
||||
LOG(logDEBUG1, ("detector number retval: 0x%llx\n", (long long int)retval));
|
||||
return Server_SendResult(file_des, INT64, &retval, sizeof(retval));
|
||||
}
|
||||
|
||||
int set_serial_number(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
int64_t arg = -1;
|
||||
|
||||
if (receiveData(file_des, &arg, sizeof(arg), INT64) < 0)
|
||||
return printSocketReadError();
|
||||
LOG(logDEBUG1, ("Setting serial number to 0x%llx\n", (long long int)arg));
|
||||
|
||||
#ifndef GOTTHARD2D
|
||||
functionNotImplemented();
|
||||
#else
|
||||
if (arg > getMaxSerialNumber()) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Could not set serial number. Max value: %d\n",
|
||||
getMaxSerialNumber());
|
||||
LOG(logERROR, (mess));
|
||||
} else {
|
||||
setSerialNumber(arg);
|
||||
}
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT64, NULL, 0);
|
||||
}
|
||||
|
||||
int set_firmware_test(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
@ -4248,7 +4279,7 @@ int copy_detector_server(int file_des) {
|
||||
strcat(cmd, sname);
|
||||
executeCommand(cmd, retvals, logDEBUG1);
|
||||
|
||||
#if !defined(GOTTHAR2D) && !defined(MYTHEN3D)
|
||||
#if !defined(GOTTHARD2D) && !defined(MYTHEN3D)
|
||||
// edit /etc/inittab
|
||||
// find line numbers in /etc/inittab where DetectorServer
|
||||
strcpy(cmd, "sed -n '/DetectorServer/=' /etc/inittab");
|
||||
@ -6075,91 +6106,6 @@ int get_clock_divider(int file_des) {
|
||||
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
|
||||
}
|
||||
|
||||
int set_pipeline(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
int args[2] = {-1, -1};
|
||||
|
||||
if (receiveData(file_des, args, sizeof(args), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
LOG(logDEBUG1, ("Setting clock (%d) pipeline : %u\n", args[0], args[1]));
|
||||
|
||||
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
|
||||
// only set
|
||||
if (Server_VerifyLock() == OK) {
|
||||
int ind = args[0];
|
||||
int val = args[1];
|
||||
enum CLKINDEX c = 0;
|
||||
switch (ind) {
|
||||
case ADC_CLOCK:
|
||||
c = ADC_CLK;
|
||||
break;
|
||||
#ifdef CHIPTESTBOARDD
|
||||
case DBIT_CLOCK:
|
||||
c = DBIT_CLK;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
modeNotImplemented("clock index (pipeline set)", ind);
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret != FAIL) {
|
||||
char *clock_names[] = {CLK_NAMES};
|
||||
char modeName[50] = "";
|
||||
sprintf(modeName, "%s clock (%d) piepline", clock_names[c], (int)c);
|
||||
|
||||
setPipeline(c, val);
|
||||
int retval = getPipeline(c);
|
||||
LOG(logDEBUG1, ("retval %s: %d\n", modeName, retval));
|
||||
validate(&ret, mess, val, retval, modeName, DEC);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, NULL, 0);
|
||||
}
|
||||
|
||||
int get_pipeline(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
int arg = -1;
|
||||
int retval = -1;
|
||||
|
||||
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
LOG(logDEBUG1, ("Getting clock (%d) frequency\n", arg));
|
||||
|
||||
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// get only
|
||||
enum CLKINDEX c = 0;
|
||||
switch (arg) {
|
||||
case ADC_CLOCK:
|
||||
c = ADC_CLK;
|
||||
break;
|
||||
#ifdef CHIPTESTBOARDD
|
||||
case DBIT_CLOCK:
|
||||
c = DBIT_CLK;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
modeNotImplemented("clock index (pipeline get)", arg);
|
||||
break;
|
||||
}
|
||||
if (ret == OK) {
|
||||
retval = getPipeline(c);
|
||||
char *clock_names[] = {CLK_NAMES};
|
||||
LOG(logDEBUG1, ("retval %s clock (%d) pipeline: %d\n", clock_names[c],
|
||||
(int)c, retval));
|
||||
}
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
|
||||
}
|
||||
|
||||
int set_on_chip_dac(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
@ -7879,7 +7825,7 @@ int get_filter_resistor(int file_des) {
|
||||
|
||||
LOG(logDEBUG1, ("Getting filter resistor\n"));
|
||||
|
||||
#if !defined(GOTTHAR2D) && !defined(JUNGFRAUD)
|
||||
#if !defined(GOTTHARD2D) && !defined(JUNGFRAUD)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// get only
|
||||
@ -7908,7 +7854,7 @@ int set_filter_resistor(int file_des) {
|
||||
return printSocketReadError();
|
||||
LOG(logINFO, ("Setting filter resistor: %u\n", arg));
|
||||
|
||||
#if !defined(GOTTHAR2D) && !defined(JUNGFRAUD)
|
||||
#if !defined(GOTTHARD2D) && !defined(JUNGFRAUD)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// only set
|
||||
@ -8519,7 +8465,7 @@ int get_veto_algorithm(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
enum streamingInterface arg = NONE;
|
||||
enum vetoAlgorithm retval = DEFAULT_ALGORITHM;
|
||||
enum vetoAlgorithm retval = ALG_HITS;
|
||||
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
|
||||
@ -8565,13 +8511,17 @@ int set_veto_algorithm(int file_des) {
|
||||
"Could not set vetoalgorithm. Invalid interface %d.\n",
|
||||
interface);
|
||||
LOG(logERROR, (mess));
|
||||
} else if (alg != DEFAULT_ALGORITHM) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,
|
||||
"Could not set vetoalgorithm. Invalid algorithm %d.\n",
|
||||
alg);
|
||||
LOG(logERROR, (mess));
|
||||
} else {
|
||||
switch (alg) {
|
||||
case ALG_HITS:
|
||||
case ALG_RAW:
|
||||
break;
|
||||
default:
|
||||
modeNotImplemented("Veto Algorithm index", (int)alg);
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (ret == OK) {
|
||||
setVetoAlgorithm(alg, interface);
|
||||
int retval = getVetoAlgorithm(interface);
|
||||
LOG(logDEBUG1, ("vetoalgorithm retval: %u\n", retval));
|
||||
@ -8922,3 +8872,84 @@ int set_filter_cell(int file_des) {
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, NULL, 0);
|
||||
}
|
||||
|
||||
int set_adc_pipeline(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
int arg = -1;
|
||||
|
||||
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
LOG(logDEBUG1, ("Setting adc pipeline : %u\n", arg));
|
||||
|
||||
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
|
||||
// only set
|
||||
if (Server_VerifyLock() == OK) {
|
||||
setADCPipeline(arg);
|
||||
int retval = getADCPipeline();
|
||||
LOG(logDEBUG1, ("retval adc pipeline: %d\n", retval));
|
||||
validate(&ret, mess, arg, retval, "set adc pipeline", DEC);
|
||||
}
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, NULL, 0);
|
||||
}
|
||||
|
||||
int get_adc_pipeline(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
int retval = -1;
|
||||
|
||||
LOG(logDEBUG1, ("Getting adc pipeline\n"));
|
||||
|
||||
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// get only
|
||||
retval = getADCPipeline();
|
||||
LOG(logDEBUG1, ("retval adc pipeline: %d\n", retval));
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
|
||||
}
|
||||
|
||||
int set_dbit_pipeline(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
int arg = -1;
|
||||
|
||||
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
LOG(logDEBUG1, ("Setting dbit pipeline : %u\n", arg));
|
||||
|
||||
#if !defined(CHIPTESTBOARDD) && !defined(GOTTHARD2D)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
|
||||
// only set
|
||||
if (Server_VerifyLock() == OK) {
|
||||
setDBITPipeline(arg);
|
||||
int retval = getDBITPipeline();
|
||||
LOG(logDEBUG1, ("retval dbit pipeline: %d\n", retval));
|
||||
validate(&ret, mess, arg, retval, "set dbit pipeline", DEC);
|
||||
}
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, NULL, 0);
|
||||
}
|
||||
|
||||
int get_dbit_pipeline(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
int retval = -1;
|
||||
LOG(logDEBUG1, ("Getting dbit pipeline\n"));
|
||||
|
||||
#if !defined(CHIPTESTBOARDD) && !defined(GOTTHARD2D)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// get only
|
||||
retval = getDBITPipeline();
|
||||
LOG(logDEBUG1, ("retval dbit pipeline: %d\n", retval));
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
|
||||
}
|
@ -80,6 +80,11 @@ class Detector {
|
||||
|
||||
Result<int64_t> getSerialNumber(Positions pos = {}) const;
|
||||
|
||||
/** [Gotthard2] Can overwrite and is sent out as mod_id in
|
||||
* sls_detector_header in header of UDP data packet streamed out from
|
||||
* detector.*/
|
||||
void setSerialNumber(const int64_t value, Positions pos = {});
|
||||
|
||||
Result<int64_t> getReceiverVersion(Positions pos = {}) const;
|
||||
|
||||
/** Options: EIGER, JUNGFRAU, GOTTHARD, MOENCH, MYTHEN3, GOTTHARD2,
|
||||
@ -496,6 +501,12 @@ class Detector {
|
||||
* (sls_detector_defs.h) on the structure and its members */
|
||||
void setCurrentSource(defs::currentSrcParameters par, Positions pos = {});
|
||||
|
||||
/** [CTB][Gotthard2] */
|
||||
Result<int> getDBITPipeline(Positions pos = {}) const;
|
||||
|
||||
/** [CTB] Options: 0-255 \n [Gotthard2] Options: 0-7 */
|
||||
void setDBITPipeline(int value, Positions pos = {});
|
||||
|
||||
///@{
|
||||
|
||||
/** @name Acquisition */
|
||||
@ -1337,7 +1348,7 @@ class Detector {
|
||||
getVetoAlgorithm(const defs::streamingInterface value,
|
||||
Positions pos = {}) const;
|
||||
|
||||
/** [Gotthard2] Options(vetoAlgorithm): DEFAULT_ALGORITHM.
|
||||
/** [Gotthard2] Options(vetoAlgorithm): ALG_HITS, ALG_RAW.
|
||||
* Options(streamingInterface): LOW_LATENCY_LINK, ETHERNET_10GB */
|
||||
void setVetoAlgorithm(const defs::vetoAlgorithm alg,
|
||||
const defs::streamingInterface value,
|
||||
@ -1502,12 +1513,6 @@ class Detector {
|
||||
/** [CTB] */
|
||||
void setDBITClock(int value_in_MHz, Positions pos = {});
|
||||
|
||||
/** [CTB] */
|
||||
Result<int> getDBITPipeline(Positions pos = {}) const;
|
||||
|
||||
/** [CTB] */
|
||||
void setDBITPipeline(int value, Positions pos = {});
|
||||
|
||||
/**
|
||||
* [CTB] mV
|
||||
* Options: V_POWER_A, V_POWER_B, V_POWER_C, V_POWER_D, V_POWER_IO */
|
||||
|
@ -257,6 +257,33 @@ std::string CmdProxy::FirmwareVersion(int action) {
|
||||
return os.str();
|
||||
}
|
||||
|
||||
std::string CmdProxy::SerialNumber(int action) {
|
||||
std::ostringstream os;
|
||||
os << cmd << ' ';
|
||||
if (action == slsDetectorDefs::HELP_ACTION)
|
||||
os << "\n\tSerial number of detector.\n\t[Gotthard2] Can overwrite and "
|
||||
"is sent out as mod_id in sls_detector_header in header of UDP "
|
||||
"data packet streamed out from detector."
|
||||
<< '\n';
|
||||
else if (action == slsDetectorDefs::GET_ACTION) {
|
||||
if (!args.empty()) {
|
||||
WrongNumberOfParameters(0);
|
||||
}
|
||||
auto t = det->getSerialNumber(std::vector<int>{det_id});
|
||||
os << OutStringHex(t) << '\n';
|
||||
} else if (action == slsDetectorDefs::PUT_ACTION) {
|
||||
if (args.size() != 1) {
|
||||
WrongNumberOfParameters(1);
|
||||
}
|
||||
det->setSerialNumber(StringTo<int64_t>(args[0]),
|
||||
std::vector<int>{det_id});
|
||||
os << args[0] << '\n';
|
||||
} else {
|
||||
throw sls::RuntimeError("Unknown action");
|
||||
}
|
||||
return os.str();
|
||||
}
|
||||
|
||||
std::string CmdProxy::Versions(int action) {
|
||||
std::ostringstream os;
|
||||
os << cmd << ' ';
|
||||
@ -2051,7 +2078,7 @@ std::string CmdProxy::VetoAlgorithm(int action) {
|
||||
std::ostringstream os;
|
||||
os << cmd << ' ';
|
||||
if (action == defs::HELP_ACTION) {
|
||||
os << "[default] [lll|10gbe]\n\t[Gotthard2] Set the veto "
|
||||
os << "[hits|raw] [lll|10gbe]\n\t[Gotthard2] Set the veto "
|
||||
"algorithm."
|
||||
<< '\n';
|
||||
} else if (action == defs::GET_ACTION) {
|
||||
|
@ -758,7 +758,7 @@ class CmdProxy {
|
||||
{"firmwareversion", &CmdProxy::FirmwareVersion},
|
||||
{"detectorserverversion", &CmdProxy::detectorserverversion},
|
||||
{"rx_version", &CmdProxy::rx_version},
|
||||
{"serialnumber", &CmdProxy::serialnumber},
|
||||
{"serialnumber", &CmdProxy::SerialNumber},
|
||||
{"type", &CmdProxy::type},
|
||||
{"nmod", &CmdProxy::nmod},
|
||||
{"detsize", &CmdProxy::DetectorSize},
|
||||
@ -804,6 +804,7 @@ class CmdProxy {
|
||||
{"parallel", &CmdProxy::parallel},
|
||||
{"filterresistor", &CmdProxy::filterresistor},
|
||||
{"currentsource", &CmdProxy::CurrentSource},
|
||||
{"dbitpipeline", &CmdProxy::dbitpipeline},
|
||||
|
||||
/** temperature */
|
||||
{"templist", &CmdProxy::templist},
|
||||
@ -986,7 +987,6 @@ class CmdProxy {
|
||||
{"dsamples", &CmdProxy::dsamples},
|
||||
{"romode", &CmdProxy::romode},
|
||||
{"dbitclk", &CmdProxy::dbitclk},
|
||||
{"dbitpipeline", &CmdProxy::dbitpipeline},
|
||||
{"v_a", &CmdProxy::v_a},
|
||||
{"v_b", &CmdProxy::v_b},
|
||||
{"v_c", &CmdProxy::v_c},
|
||||
@ -1078,6 +1078,7 @@ class CmdProxy {
|
||||
std::string Hostname(int action);
|
||||
std::string VirtualServer(int action);
|
||||
std::string FirmwareVersion(int action);
|
||||
std::string SerialNumber(int action);
|
||||
std::string Versions(int action);
|
||||
std::string PackageVersion(int action);
|
||||
std::string ClientVersion(int action);
|
||||
@ -1191,9 +1192,6 @@ class CmdProxy {
|
||||
GET_COMMAND_HEX(rx_version, getReceiverVersion,
|
||||
"\n\tReceiver version in format [0xYYMMDD].");
|
||||
|
||||
GET_COMMAND_HEX(serialnumber, getSerialNumber,
|
||||
"\n\tSerial number of detector.");
|
||||
|
||||
GET_COMMAND(type, getDetectorType,
|
||||
"\n\tReturns detector type. Can be Eiger, Jungfrau, Gotthard, "
|
||||
"Moench, Mythen3, Gotthard2, ChipTestBoard");
|
||||
@ -1356,6 +1354,12 @@ class CmdProxy {
|
||||
"for increasing resistance.\n\t[Gotthard2] Options: [0|1|2|3]. Default "
|
||||
"is 0.\n\t[Jungfrau] Options: [0|1]. Default is 1.");
|
||||
|
||||
INTEGER_COMMAND_VEC_ID(dbitpipeline, getDBITPipeline, setDBITPipeline,
|
||||
StringTo<int>,
|
||||
"[n_value]\n\t[Ctb][Gotthard2] Pipeline of the "
|
||||
"clock for latching digital bits.\n\t[Gotthard2] "
|
||||
"Options: 0-7\n\t[CTB] Options: 0-255");
|
||||
|
||||
/** temperature */
|
||||
GET_COMMAND_NOID(
|
||||
templist, getTemperatureList,
|
||||
@ -1994,10 +1998,6 @@ class CmdProxy {
|
||||
dbitclk, getDBITClock, setDBITClock, StringTo<int>,
|
||||
"[n_clk in MHz]\n\t[Ctb] Clock for latching the digital bits in MHz.");
|
||||
|
||||
INTEGER_COMMAND_VEC_ID(
|
||||
dbitpipeline, getDBITPipeline, setDBITPipeline, StringTo<int>,
|
||||
"[n_value]\n\t[Ctb] Pipeline of the clock for latching digital bits.");
|
||||
|
||||
INTEGER_IND_COMMAND(v_a, getVoltage, setVoltage, StringTo<int>,
|
||||
defs::V_POWER_A,
|
||||
"[n_value]\n\t[Ctb] Voltage supply a in mV.");
|
||||
|
@ -119,6 +119,10 @@ Result<int64_t> Detector::getSerialNumber(Positions pos) const {
|
||||
return pimpl->Parallel(&Module::getSerialNumber, pos);
|
||||
}
|
||||
|
||||
void Detector::setSerialNumber(const int64_t value, Positions pos) {
|
||||
pimpl->Parallel(&Module::setSerialNumber, pos, value);
|
||||
}
|
||||
|
||||
Result<int64_t> Detector::getReceiverVersion(Positions pos) const {
|
||||
return pimpl->Parallel(&Module::getReceiverSoftwareVersion, pos);
|
||||
}
|
||||
@ -715,6 +719,15 @@ Detector::getCurrentSource(Positions pos) const {
|
||||
void Detector::setCurrentSource(defs::currentSrcParameters par, Positions pos) {
|
||||
pimpl->Parallel(&Module::setCurrentSource, pos, par);
|
||||
}
|
||||
|
||||
Result<int> Detector::getDBITPipeline(Positions pos) const {
|
||||
return pimpl->Parallel(&Module::getDBITPipeline, pos);
|
||||
}
|
||||
|
||||
void Detector::setDBITPipeline(int value, Positions pos) {
|
||||
pimpl->Parallel(&Module::setDBITPipeline, pos, value);
|
||||
}
|
||||
|
||||
// Acquisition
|
||||
|
||||
void Detector::acquire() { pimpl->acquire(); }
|
||||
@ -1688,6 +1701,8 @@ Detector::getVetoAlgorithm(const defs::streamingInterface interface,
|
||||
void Detector::setVetoAlgorithm(const defs::vetoAlgorithm alg,
|
||||
defs::streamingInterface interface,
|
||||
Positions pos) {
|
||||
LOG(logINFOBLUE) << "alg:" << ToString(alg)
|
||||
<< " interface:" << ToString(interface);
|
||||
pimpl->Parallel(&Module::setVetoAlgorithm, pos, alg, interface);
|
||||
}
|
||||
|
||||
@ -1804,15 +1819,11 @@ Result<int> Detector::getSYNCClock(Positions pos) const {
|
||||
}
|
||||
|
||||
Result<int> Detector::getADCPipeline(Positions pos) const {
|
||||
return pimpl->Parallel(&Module::getPipeline, pos, defs::ADC_CLOCK);
|
||||
return pimpl->Parallel(&Module::getADCPipeline, pos);
|
||||
}
|
||||
|
||||
void Detector::setADCPipeline(int value, Positions pos) {
|
||||
pimpl->Parallel(&Module::setPipeline, pos, defs::ADC_CLOCK, value);
|
||||
}
|
||||
|
||||
Result<int> Detector::getDBITPipeline(Positions pos) const {
|
||||
return pimpl->Parallel(&Module::getPipeline, pos, defs::DBIT_CLOCK);
|
||||
pimpl->Parallel(&Module::setADCPipeline, pos, value);
|
||||
}
|
||||
|
||||
Result<int> Detector::getVoltage(defs::dacIndex index, Positions pos) const {
|
||||
@ -1892,10 +1903,6 @@ void Detector::setDBITClock(int value_in_MHz, Positions pos) {
|
||||
value_in_MHz);
|
||||
}
|
||||
|
||||
void Detector::setDBITPipeline(int value, Positions pos) {
|
||||
pimpl->Parallel(&Module::setPipeline, pos, defs::DBIT_CLOCK, value);
|
||||
}
|
||||
|
||||
Result<int> Detector::getMeasuredVoltage(defs::dacIndex index,
|
||||
Positions pos) const {
|
||||
switch (index) {
|
||||
|
@ -94,6 +94,10 @@ int64_t Module::getSerialNumber() const {
|
||||
return sendToDetector<int64_t>(F_GET_SERIAL_NUMBER);
|
||||
}
|
||||
|
||||
void Module::setSerialNumber(const int64_t value) {
|
||||
return sendToDetector(F_SET_SERIAL_NUMBER, value, nullptr);
|
||||
}
|
||||
|
||||
int64_t Module::getReceiverSoftwareVersion() const {
|
||||
if (shm()->useReceiverFlag) {
|
||||
return sendToReceiver<int64_t>(F_GET_RECEIVER_VERSION);
|
||||
@ -720,6 +724,14 @@ void Module::setCurrentSource(defs::currentSrcParameters par) {
|
||||
sendToDetector(F_SET_CURRENT_SOURCE, par, nullptr);
|
||||
}
|
||||
|
||||
int Module::getDBITPipeline() const {
|
||||
return sendToDetector<int>(F_GET_DBIT_PIPELINE);
|
||||
}
|
||||
|
||||
void Module::setDBITPipeline(int value) {
|
||||
sendToDetector(F_SET_DBIT_PIPELINE, value, nullptr);
|
||||
}
|
||||
|
||||
// Acquisition
|
||||
|
||||
void Module::startReceiver() {
|
||||
@ -2107,13 +2119,12 @@ void Module::setNumberOfAnalogSamples(int value) {
|
||||
}
|
||||
}
|
||||
|
||||
int Module::getPipeline(int clkIndex) const {
|
||||
return sendToDetector<int>(F_GET_PIPELINE, clkIndex);
|
||||
int Module::getADCPipeline() const {
|
||||
return sendToDetector<int>(F_GET_ADC_PIPELINE);
|
||||
}
|
||||
|
||||
void Module::setPipeline(int clkIndex, int value) {
|
||||
int args[]{clkIndex, value};
|
||||
sendToDetector(F_SET_PIPELINE, args, nullptr);
|
||||
void Module::setADCPipeline(int value) {
|
||||
sendToDetector(F_SET_ADC_PIPELINE, value, nullptr);
|
||||
}
|
||||
|
||||
uint32_t Module::getADCEnableMask() const {
|
||||
|
@ -90,6 +90,7 @@ class Module : public virtual slsDetectorDefs {
|
||||
int64_t getFirmwareVersion() const;
|
||||
int64_t getDetectorServerVersion() const;
|
||||
int64_t getSerialNumber() const;
|
||||
void setSerialNumber(const int64_t value);
|
||||
int64_t getReceiverSoftwareVersion() const;
|
||||
static detectorType getTypeFromDetector(const std::string &hostname,
|
||||
int cport = DEFAULT_PORTNO);
|
||||
@ -174,6 +175,9 @@ class Module : public virtual slsDetectorDefs {
|
||||
void setFilterResistor(int value);
|
||||
defs::currentSrcParameters getCurrentSource() const;
|
||||
void setCurrentSource(defs::currentSrcParameters par);
|
||||
int getDBITPipeline() const;
|
||||
void setDBITPipeline(int value);
|
||||
|
||||
/**************************************************
|
||||
* *
|
||||
* Acquisition *
|
||||
@ -454,8 +458,8 @@ class Module : public virtual slsDetectorDefs {
|
||||
* ************************************************/
|
||||
int getNumberOfAnalogSamples() const;
|
||||
void setNumberOfAnalogSamples(int value);
|
||||
int getPipeline(int clkIndex) const;
|
||||
void setPipeline(int clkIndex, int value);
|
||||
int getADCPipeline() const;
|
||||
void setADCPipeline(int value);
|
||||
uint32_t getADCEnableMask() const;
|
||||
void setADCEnableMask(uint32_t mask);
|
||||
uint32_t getTenGigaADCEnableMask() const;
|
||||
|
@ -519,41 +519,6 @@ TEST_CASE("dbitclk", "[.cmd]") {
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("dbitpipeline", "[.cmd]") {
|
||||
Detector det;
|
||||
CmdProxy proxy(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD) {
|
||||
auto prev_val = det.getDBITPipeline();
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("dbitpipeline", {"1"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "dbitpipeline 1\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("dbitpipeline", {"0"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "dbitpipeline 0\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("dbitpipeline", {"15"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "dbitpipeline 15\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("dbitpipeline", {}, -1, GET, oss);
|
||||
REQUIRE(oss.str() == "dbitpipeline 15\n");
|
||||
}
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setDBITPipeline(prev_val[i], {i});
|
||||
}
|
||||
} else {
|
||||
REQUIRE_THROWS(proxy.Call("dbitpipeline", {}, -1, GET));
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("v_a", "[.cmd]") {
|
||||
Detector det;
|
||||
CmdProxy proxy(&det);
|
||||
|
@ -631,34 +631,46 @@ TEST_CASE("vetoalg", "[.cmd]") {
|
||||
CmdProxy proxy(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
if (det_type == defs::GOTTHARD2) {
|
||||
auto prev_val_3g = det.getVetoAlgorithm(defs::streamingInterface::LOW_LATENCY_LINK);
|
||||
auto prev_val_lll =
|
||||
det.getVetoAlgorithm(defs::streamingInterface::LOW_LATENCY_LINK);
|
||||
auto prev_val_10g =
|
||||
det.getVetoAlgorithm(defs::streamingInterface::ETHERNET_10GB);
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("vetoalg", {"default", "lll"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "vetoalg default lll\n");
|
||||
proxy.Call("vetoalg", {"hits", "lll"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "vetoalg hits lll\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("vetoalg", {"lll"}, -1, GET, oss);
|
||||
REQUIRE(oss.str() == "vetoalg default lll\n");
|
||||
REQUIRE(oss.str() == "vetoalg hits lll\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("vetoalg", {"default", "10gbe"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "vetoalg default 10gbe\n");
|
||||
proxy.Call("vetoalg", {"hits", "10gbe"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "vetoalg hits 10gbe\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("vetoalg", {"10gbe"}, -1, GET, oss);
|
||||
REQUIRE(oss.str() == "vetoalg default 10gbe\n");
|
||||
REQUIRE(oss.str() == "vetoalg hits 10gbe\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("vetoalg", {"raw", "lll"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "vetoalg raw lll\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("vetoalg", {"raw", "10gbe"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "vetoalg raw 10gbe\n");
|
||||
}
|
||||
REQUIRE_THROWS(
|
||||
proxy.Call("vetoalg", {"default", "lll", "10gbe"}, -1, PUT));
|
||||
REQUIRE_THROWS(proxy.Call("vetoalg", {"default", "none"}, -1, PUT));
|
||||
REQUIRE_THROWS(proxy.Call("vetoalg", {"hits", "none"}, -1, PUT));
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setVetoAlgorithm(prev_val_3g[i], defs::streamingInterface::LOW_LATENCY_LINK,
|
||||
det.setVetoAlgorithm(prev_val_lll[i],
|
||||
defs::streamingInterface::LOW_LATENCY_LINK,
|
||||
{i});
|
||||
det.setVetoAlgorithm(prev_val_10g[i],
|
||||
defs::streamingInterface::ETHERNET_10GB, {i});
|
||||
|
@ -105,7 +105,22 @@ TEST_CASE("serialnumber", "[.cmd]") {
|
||||
Detector det;
|
||||
CmdProxy proxy(&det);
|
||||
REQUIRE_NOTHROW(proxy.Call("serialnumber", {}, -1, GET));
|
||||
if (det.getDetectorType().squash() == defs::GOTTHARD2) {
|
||||
auto prev_val = det.getSerialNumber();
|
||||
std::ostringstream oss1, oss2, oss3;
|
||||
proxy.Call("serialnumber", {"0x5d"}, -1, PUT, oss1);
|
||||
REQUIRE(oss1.str() == "serialnumber 0x5d\n");
|
||||
proxy.Call("serialnumber", {}, -1, GET, oss2);
|
||||
REQUIRE(oss2.str() == "serialnumber 0x5d\n");
|
||||
proxy.Call("serialnumber", {"0xffff"}, -1, PUT, oss3);
|
||||
REQUIRE(oss3.str() == "serialnumber 0xffff\n");
|
||||
REQUIRE_THROWS(proxy.Call("serialnumber", {"65536"}, -1, PUT));
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setSerialNumber(prev_val[i], {i});
|
||||
}
|
||||
} else {
|
||||
REQUIRE_THROWS(proxy.Call("serialnumber", {"0"}, -1, PUT));
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("type", "[.cmd]") {
|
||||
@ -1423,6 +1438,56 @@ TEST_CASE("filterresistor", "[.cmd]") {
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("dbitpipeline", "[.cmd]") {
|
||||
Detector det;
|
||||
CmdProxy proxy(&det);
|
||||
auto det_type = det.getDetectorType().squash();
|
||||
|
||||
if (det_type == defs::CHIPTESTBOARD || det_type == defs::GOTTHARD2) {
|
||||
auto prev_val = det.getDBITPipeline();
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("dbitpipeline", {"1"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "dbitpipeline 1\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("dbitpipeline", {"0"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "dbitpipeline 0\n");
|
||||
}
|
||||
if (det_type == defs::CHIPTESTBOARD) {
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("dbitpipeline", {"15"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "dbitpipeline 15\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("dbitpipeline", {}, -1, GET, oss);
|
||||
REQUIRE(oss.str() == "dbitpipeline 15\n");
|
||||
}
|
||||
REQUIRE_THROWS(proxy.Call("dbitpipeline", {"256"}, -1, PUT));
|
||||
} else {
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("dbitpipeline", {"7"}, -1, PUT, oss);
|
||||
REQUIRE(oss.str() == "dbitpipeline 7\n");
|
||||
}
|
||||
{
|
||||
std::ostringstream oss;
|
||||
proxy.Call("dbitpipeline", {}, -1, GET, oss);
|
||||
REQUIRE(oss.str() == "dbitpipeline 7\n");
|
||||
}
|
||||
REQUIRE_THROWS(proxy.Call("dbitpipeline", {"8"}, -1, PUT));
|
||||
}
|
||||
for (int i = 0; i != det.size(); ++i) {
|
||||
det.setDBITPipeline(prev_val[i], {i});
|
||||
}
|
||||
} else {
|
||||
REQUIRE_THROWS(proxy.Call("dbitpipeline", {}, -1, GET));
|
||||
}
|
||||
}
|
||||
|
||||
TEST_CASE("currentsource", "[.cmd]") {
|
||||
Detector det;
|
||||
CmdProxy proxy(&det);
|
||||
|
@ -413,7 +413,7 @@ typedef struct {
|
||||
ALL = LOW_LATENCY_LINK | ETHERNET_10GB
|
||||
};
|
||||
|
||||
enum vetoAlgorithm { DEFAULT_ALGORITHM };
|
||||
enum vetoAlgorithm { ALG_HITS, ALG_RAW };
|
||||
|
||||
enum gainMode {
|
||||
DYNAMIC,
|
||||
|
@ -164,8 +164,6 @@ enum detFuncs {
|
||||
F_GET_MAX_CLOCK_PHASE_SHIFT,
|
||||
F_SET_CLOCK_DIVIDER,
|
||||
F_GET_CLOCK_DIVIDER,
|
||||
F_SET_PIPELINE,
|
||||
F_GET_PIPELINE,
|
||||
F_SET_ON_CHIP_DAC,
|
||||
F_GET_ON_CHIP_DAC,
|
||||
F_SET_INJECT_CHANNEL,
|
||||
@ -241,6 +239,11 @@ enum detFuncs {
|
||||
F_SET_FLIP_ROWS,
|
||||
F_GET_FILTER_CELL,
|
||||
F_SET_FILTER_CELL,
|
||||
F_SET_ADC_PIPELINE,
|
||||
F_GET_ADC_PIPELINE,
|
||||
F_SET_DBIT_PIPELINE,
|
||||
F_GET_DBIT_PIPELINE,
|
||||
F_SET_SERIAL_NUMBER,
|
||||
|
||||
NUM_DET_FUNCTIONS,
|
||||
RECEIVER_ENUM_START = 256, /**< detector function should not exceed this
|
||||
@ -513,8 +516,6 @@ const char* getFunctionNameFromEnum(enum detFuncs func) {
|
||||
case F_GET_MAX_CLOCK_PHASE_SHIFT: return "F_GET_MAX_CLOCK_PHASE_SHIFT";
|
||||
case F_SET_CLOCK_DIVIDER: return "F_SET_CLOCK_DIVIDER";
|
||||
case F_GET_CLOCK_DIVIDER: return "F_GET_CLOCK_DIVIDER";
|
||||
case F_SET_PIPELINE: return "F_SET_PIPELINE";
|
||||
case F_GET_PIPELINE: return "F_GET_PIPELINE";
|
||||
case F_SET_ON_CHIP_DAC: return "F_SET_ON_CHIP_DAC";
|
||||
case F_GET_ON_CHIP_DAC: return "F_GET_ON_CHIP_DAC";
|
||||
case F_SET_INJECT_CHANNEL: return "F_SET_INJECT_CHANNEL";
|
||||
@ -589,6 +590,11 @@ const char* getFunctionNameFromEnum(enum detFuncs func) {
|
||||
case F_SET_FLIP_ROWS: return "F_SET_FLIP_ROWS";
|
||||
case F_GET_FILTER_CELL: return "F_GET_FILTER_CELL";
|
||||
case F_SET_FILTER_CELL: return "F_SET_FILTER_CELL";
|
||||
case F_SET_ADC_PIPELINE: return "F_SET_ADC_PIPELINE";
|
||||
case F_GET_ADC_PIPELINE: return "F_GET_ADC_PIPELINE";
|
||||
case F_SET_DBIT_PIPELINE: return "F_SET_DBIT_PIPELINE";
|
||||
case F_GET_DBIT_PIPELINE: return "F_GET_DBIT_PIPELINE";
|
||||
case F_SET_SERIAL_NUMBER: return "F_SET_SERIAL_NUMBER";
|
||||
|
||||
case NUM_DET_FUNCTIONS: return "NUM_DET_FUNCTIONS";
|
||||
case RECEIVER_ENUM_START: return "RECEIVER_ENUM_START";
|
||||
|
@ -4,10 +4,10 @@
|
||||
#define APIRECEIVER 0x210225
|
||||
#define APIGUI 0x210225
|
||||
|
||||
#define APIEIGER 0x210811
|
||||
#define APICTB 0x210811
|
||||
#define APIGOTTHARD 0x210811
|
||||
#define APIGOTTHARD2 0x210811
|
||||
#define APIJUNGFRAU 0x210811
|
||||
#define APIMYTHEN3 0x210811
|
||||
#define APIMOENCH 0x210811
|
||||
#define APIJUNGFRAU 0x210811
|
||||
#define APIGOTTHARD2 0x210811
|
||||
#define APIEIGER 0x210811
|
||||
|
@ -608,8 +608,10 @@ std::string ToString(const defs::streamingInterface s) {
|
||||
|
||||
std::string ToString(const defs::vetoAlgorithm s) {
|
||||
switch (s) {
|
||||
case defs::DEFAULT_ALGORITHM:
|
||||
return std::string("default");
|
||||
case defs::ALG_HITS:
|
||||
return std::string("hits");
|
||||
case defs::ALG_RAW:
|
||||
return std::string("raw");
|
||||
default:
|
||||
return std::string("Unknown");
|
||||
}
|
||||
@ -1014,8 +1016,10 @@ template <> defs::streamingInterface StringTo(const std::string &s) {
|
||||
}
|
||||
|
||||
template <> defs::vetoAlgorithm StringTo(const std::string &s) {
|
||||
if (s == "default")
|
||||
return defs::DEFAULT_ALGORITHM;
|
||||
if (s == "hits")
|
||||
return defs::ALG_HITS;
|
||||
if (s == "raw")
|
||||
return defs::ALG_RAW;
|
||||
throw sls::RuntimeError("Unknown veto algorithm " + s);
|
||||
}
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user