autogenerated commands and make format

This commit is contained in:
Mazzoleni Alice Francesca 2025-04-11 10:45:02 +02:00
parent f9bc2eb126
commit 9d8f9a9ba9
18 changed files with 50 additions and 63 deletions

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@ -8,10 +8,8 @@
#define REQRD_FRMWR_VRSN 0x230705 #define REQRD_FRMWR_VRSN 0x230705
#define NUM_HARDWARE_VERSIONS (1) #define NUM_HARDWARE_VERSIONS (1)
#define HARDWARE_VERSION_NUMBERS \ #define HARDWARE_VERSION_NUMBERS {0x3f}
{ 0x3f } #define HARDWARE_VERSION_NAMES {"5.1"}
#define HARDWARE_VERSION_NAMES \
{ "5.1" }
#define LINKED_SERVER_NAME "ctbDetectorServer" #define LINKED_SERVER_NAME "ctbDetectorServer"

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@ -7,8 +7,7 @@
#define NUM_HARDWARE_VERSIONS (2) #define NUM_HARDWARE_VERSIONS (2)
#define HARDWARE_VERSION_NUMBERS {0x0, 0x1}; #define HARDWARE_VERSION_NUMBERS {0x0, 0x1};
#define HARDWARE_VERSION_NAMES \ #define HARDWARE_VERSION_NAMES {"FX70T", "FX30T"}
{ "FX70T", "FX30T" }
#define REQUIRED_FIRMWARE_VERSION (32) #define REQUIRED_FIRMWARE_VERSION (32)
// virtual ones renamed for consistency // virtual ones renamed for consistency

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@ -9,8 +9,7 @@
#define NUM_HARDWARE_VERSIONS (2) #define NUM_HARDWARE_VERSIONS (2)
#define HARDWARE_VERSION_NUMBERS {0x0, 0x2}; #define HARDWARE_VERSION_NUMBERS {0x0, 0x2};
#define HARDWARE_VERSION_NAMES \ #define HARDWARE_VERSION_NAMES {"1.0", "1.2"}
{ "1.0", "1.2" }
#define LINKED_SERVER_NAME "gotthard2DetectorServer" #define LINKED_SERVER_NAME "gotthard2DetectorServer"

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@ -9,10 +9,8 @@
#define REQRD_FRMWRE_VRSN 0x250208 // 2.0 pcb (version = 011) #define REQRD_FRMWRE_VRSN 0x250208 // 2.0 pcb (version = 011)
#define NUM_HARDWARE_VERSIONS (2) #define NUM_HARDWARE_VERSIONS (2)
#define HARDWARE_VERSION_NUMBERS \ #define HARDWARE_VERSION_NUMBERS {0x2, 0x3}
{ 0x2, 0x3 } #define HARDWARE_VERSION_NAMES {"1.0", "2.0"}
#define HARDWARE_VERSION_NAMES \
{ "1.0", "2.0" }
#define ID_FILE "detid_jungfrau.txt" #define ID_FILE "detid_jungfrau.txt"
#define LINKED_SERVER_NAME "jungfrauDetectorServer" #define LINKED_SERVER_NAME "jungfrauDetectorServer"
@ -217,10 +215,8 @@ enum MASTERINDEX { MASTER_HARDWARE, OW_MASTER, OW_SLAVE };
#define NUMSETTINGS (2) #define NUMSETTINGS (2)
#define NSPECIALDACS (3) #define NSPECIALDACS (3)
#define SPECIALDACINDEX {J_VREF_PRECH, J_VREF_DS, J_VREF_COMP}; #define SPECIALDACINDEX {J_VREF_PRECH, J_VREF_DS, J_VREF_COMP};
#define SPECIAL_DEFAULT_DYNAMIC_GAIN_VALS \ #define SPECIAL_DEFAULT_DYNAMIC_GAIN_VALS {1450, 480, 420}
{ 1450, 480, 420 } #define SPECIAL_DEFAULT_DYNAMICHG0_GAIN_VALS {1550, 450, 620}
#define SPECIAL_DEFAULT_DYNAMICHG0_GAIN_VALS \
{ 1550, 450, 620 }
enum NETWORKINDEX { TXN_FRAME, FLOWCTRL_10G }; enum NETWORKINDEX { TXN_FRAME, FLOWCTRL_10G };
enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS }; enum CLKINDEX { RUN_CLK, ADC_CLK, DBIT_CLK, NUM_CLOCKS };

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@ -8,10 +8,8 @@
#define REQRD_FRMWRE_VRSN 0x231026 // 2.0 pcb (version = 011) #define REQRD_FRMWRE_VRSN 0x231026 // 2.0 pcb (version = 011)
#define NUM_HARDWARE_VERSIONS (2) #define NUM_HARDWARE_VERSIONS (2)
#define HARDWARE_VERSION_NUMBERS \ #define HARDWARE_VERSION_NUMBERS {0x2, 0x3}
{ 0x2, 0x3 } #define HARDWARE_VERSION_NAMES {"1.0", "2.0"}
#define HARDWARE_VERSION_NAMES \
{ "1.0", "2.0" }
#define ID_FILE ("detid_moench.txt") #define ID_FILE ("detid_moench.txt")
#define LINKED_SERVER_NAME "moenchDetectorServer" #define LINKED_SERVER_NAME "moenchDetectorServer"

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@ -9,8 +9,7 @@
#define NUM_HARDWARE_VERSIONS (2) #define NUM_HARDWARE_VERSIONS (2)
#define HARDWARE_VERSION_NUMBERS {0x0, 0x2}; #define HARDWARE_VERSION_NUMBERS {0x0, 0x2};
#define HARDWARE_VERSION_NAMES \ #define HARDWARE_VERSION_NAMES {"1.0", "1.2"}
{ "1.0", "1.2" }
#define LINKED_SERVER_NAME "mythen3DetectorServer" #define LINKED_SERVER_NAME "mythen3DetectorServer"
@ -133,12 +132,9 @@ enum ADCINDEX { TEMP_FPGA };
#define NUMSETTINGS (3) #define NUMSETTINGS (3)
#define NSPECIALDACS (2) #define NSPECIALDACS (2)
#define SPECIALDACINDEX {M_VRPREAMP, M_VRSHAPER}; #define SPECIALDACINDEX {M_VRPREAMP, M_VRSHAPER};
#define SPECIAL_DEFAULT_STANDARD_DAC_VALS \ #define SPECIAL_DEFAULT_STANDARD_DAC_VALS {1100, 1280}
{ 1100, 1280 } #define SPECIAL_DEFAULT_FAST_DAC_VALS {300, 1500}
#define SPECIAL_DEFAULT_FAST_DAC_VALS \ #define SPECIAL_DEFAULT_HIGHGAIN_DAC_VALS {1300, 1100}
{ 300, 1500 }
#define SPECIAL_DEFAULT_HIGHGAIN_DAC_VALS \
{ 1300, 1100 }
enum CLKINDEX { SYSTEM_C0, SYSTEM_C1, SYSTEM_C2, NUM_CLOCKS }; enum CLKINDEX { SYSTEM_C0, SYSTEM_C1, SYSTEM_C2, NUM_CLOCKS };
#define NUM_CLOCKS_TO_SET (1) #define NUM_CLOCKS_TO_SET (1)

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@ -8341,9 +8341,10 @@ rx_dbitreorder:
store_result_in_t: false store_result_in_t: false
command_name: rx_dbitreorder command_name: rx_dbitreorder
function_alias: rx_dbitreorder function_alias: rx_dbitreorder
help: "[0, 1]\n\t[Ctb] Reorder digital data to group together all samples per signal.\ help: "[0, 1]\n\t[Ctb] Reorder digital data such that it groups each signal (0-63)\
\ Default is 1. Setting to 0 means 'do not reorder' and to keep what the board\ \ from all the different samples together . Default is 1. Setting to 0 means 'do\
\ spits out, which is that all signals in a sample are grouped together." \ not reorder' and to keep what the board spits out, which is that all signals\
\ in a sample are grouped together."
infer_action: true infer_action: true
template: true template: true
rx_discardpolicy: rx_discardpolicy: