detectors/slsDetectorPackage
25
0
Fork 0
mirror of https://github.com/slsdetectorgroup/slsDetectorPackage.git synced 2025-05-04 03:40:04 +02:00
Code Issues Actions Packages Releases Activity

WIP

Browse Source
This commit is contained in:
maliakal_d 2020-06-16 12:41:39 +02:00
parent efc247f46f
commit 9a80975929
1 changed files with 14 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
slsDetectorServers/eigerDetectorServer/slsDetectorServer_defs.h
View File

@ -30,10 +30,10 @@ enum DACINDEX {
E_VISHAPER,
E_VTHRESHOLD
};
#define DAC_NAMES
"VSvP", "Vtrim", "Vrpreamp", "Vrshaper", "VSvN", "Vtgstv", "Vcmp_ll", "Vcmp_lr",
"Vcal", "Vcmp_rl", "rxb_rb", "rxb_lb", "Vcmp_rr", "Vcp", "Vcn",
"Vishaper"
#define DAC_NAMES \
"VSvP", "Vtrim", "Vrpreamp", "Vrshaper", "VSvN", "Vtgstv", "Vcmp_ll", \
"Vcmp_lr", "Vcal", "Vcmp_rl", "rxb_rb", "rxb_lb", "Vcmp_rr", "Vcp", \
"Vcn", "Vishaper"
#define DEFAULT_DAC_VALS \
{ \
0, /* VSvP */ \
@ -53,16 +53,16 @@ enum DACINDEX {
2000, /* Vcn */ \
1550 /* Vishaper */ \
};
enum ADCINDEX {
TEMP_FPGAEXT,
TEMP_10GE,
TEMP_DCDC,
TEMP_SODL,
TEMP_SODR,
TEMP_FPGA,
TEMP_FPGAFEBL,
TEMP_FPGAFEBR
};
enum ADCINDEX {
TEMP_FPGAEXT,
TEMP_10GE,
TEMP_DCDC,
TEMP_SODL,
TEMP_SODR,
TEMP_FPGA,
TEMP_FPGAFEBL,
TEMP_FPGAFEBR
};
enum NETWORKINDEX { TXN_LEFT, TXN_RIGHT, TXN_FRAME, FLOWCTRL_10G };
enum ROINDEX { E_PARALLEL, E_NON_PARALLEL };
enum CLKINDEX { RUN_CLK, NUM_CLOCKS };