g2: dbitpipeline

This commit is contained in:
maliakal_d 2021-08-11 18:01:28 +02:00
parent 7a76064223
commit 9a777b13bb
16 changed files with 258 additions and 211 deletions

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@ -2661,7 +2661,12 @@ class Detector(CppDetectorApi):
@property @property
@element @element
def dbitpipeline(self): def dbitpipeline(self):
"""[Ctb] Pipeline of the clock for latching digital bits. """ """[Ctb][Gotthard2] Pipeline of the clock for latching digital bits.
Note
----
[CTB] Options: 0 - 255
[Gotthard2] Options: 0 - 7
"""
return self.getDBITPipeline() return self.getDBITPipeline()
@dbitpipeline.setter @dbitpipeline.setter

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@ -1840,46 +1840,38 @@ void configureSyncFrequency(enum CLKINDEX ind) {
setFrequency(SYNC_CLK, min); setFrequency(SYNC_CLK, min);
} }
void setPipeline(enum CLKINDEX ind, int val) { void setADCPipeline(int val) {
if (ind != ADC_CLK && ind != DBIT_CLK) {
LOG(logERROR, ("Unknown clock index %d to set pipeline\n", ind));
return;
}
if (val < 0) { if (val < 0) {
return; return;
} }
char *clock_names[] = {CLK_NAMES}; LOG(logINFO, ("Setting adc pipeline to %d\n", val));
LOG(logINFO,
("Setting %s clock (%d) Pipeline to %d\n", clock_names[ind], ind, val));
uint32_t offset = ADC_OFFSET_ADC_PPLN_OFST;
uint32_t mask = ADC_OFFSET_ADC_PPLN_MSK;
if (ind == DBIT_CLK) {
offset = ADC_OFFSET_DBT_PPLN_OFST;
mask = ADC_OFFSET_DBT_PPLN_MSK;
}
uint32_t addr = ADC_OFFSET_REG; uint32_t addr = ADC_OFFSET_REG;
// reset value bus_w(addr, bus_r(addr) & ~ADC_OFFSET_ADC_PPLN_MSK);
bus_w(addr, bus_r(addr) & ~mask); bus_w(addr, bus_r(addr) | ((val << ADC_OFFSET_ADC_PPLN_OFST) &
// set value ADC_OFFSET_ADC_PPLN_MSK));
bus_w(addr, bus_r(addr) | ((val << offset) & mask));
LOG(logDEBUG1,
(" %s clock (%d) Offset: 0x%8x\n", clock_names[ind], ind, bus_r(addr)));
} }
int getPipeline(enum CLKINDEX ind) { int getADCPipeline() {
if (ind != ADC_CLK && ind != DBIT_CLK) {
LOG(logERROR, ("Unknown clock index %d to get pipeline\n", ind));
return -1;
}
if (ind == DBIT_CLK) {
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_DBT_PPLN_MSK) >>
ADC_OFFSET_DBT_PPLN_OFST);
}
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >> return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >>
ADC_OFFSET_ADC_PPLN_OFST); ADC_OFFSET_ADC_PPLN_OFST);
} }
void setDBITPipeline(int val) {
if (val < 0) {
return;
}
LOG(logINFO, ("Setting dbit pipeline to %d\n", val));
uint32_t addr = ADC_OFFSET_REG;
bus_w(addr, bus_r(addr) & ~ADC_OFFSET_DBT_PPLN_MSK);
bus_w(addr, bus_r(addr) | ((val << ADC_OFFSET_DBT_PPLN_OFST) &
ADC_OFFSET_DBT_PPLN_MSK));
}
int getDBITPipeline() {
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_DBT_PPLN_MSK) >>
ADC_OFFSET_DBT_PPLN_OFST);
}
int setLEDEnable(int enable) { int setLEDEnable(int enable) {
uint32_t addr = CONFIG_REG; uint32_t addr = CONFIG_REG;

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@ -170,6 +170,16 @@
#define ASIC_CONT_FRAMES_LSB_REG (0x06 * REG_OFFSET + BASE_ASIC) #define ASIC_CONT_FRAMES_LSB_REG (0x06 * REG_OFFSET + BASE_ASIC)
#define ASIC_CONT_FRAMES_MSB_REG (0x07 * REG_OFFSET + BASE_ASIC) #define ASIC_CONT_FRAMES_MSB_REG (0x07 * REG_OFFSET + BASE_ASIC)
/* ADIF registers --------------------------------------------------*/
/* ADIF Config register */
#define ADIF_CONFIG_REG (0x00 * REG_OFFSET + BASE_ADIF)
#define ADIF_CONFIG_DBIT_PIPELINE_OFST (4)
#define ADIF_CONFIG_DBIT_PIPELINE_MSK (0x00000007 << ADIF_CONFIG_DBIT_PIPELINE_OFST)
/* Packetizer -------------------------------------------------------------*/ /* Packetizer -------------------------------------------------------------*/
/* Packetizer Config Register */ /* Packetizer Config Register */

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@ -1907,6 +1907,22 @@ int powerChip(int on) {
CONTROL_PWR_CHIP_OFST); CONTROL_PWR_CHIP_OFST);
} }
void setDBITPipeline(int val) {
if (val < 0) {
return;
}
LOG(logINFO, ("Setting dbit pipeline to %d\n", val));
uint32_t addr = ADIF_CONFIG_REG;
bus_w(addr, bus_r(addr) & ~ADIF_CONFIG_DBIT_PIPELINE_MSK);
bus_w(addr, bus_r(addr) | ((val << ADIF_CONFIG_DBIT_PIPELINE_OFST) &
ADIF_CONFIG_DBIT_PIPELINE_MSK));
}
int getDBITPipeline() {
return ((bus_r(ADIF_CONFIG_REG) & ADIF_CONFIG_DBIT_PIPELINE_MSK) >>
ADIF_CONFIG_DBIT_PIPELINE_OFST);
}
int setPhase(enum CLKINDEX ind, int val, int degrees) { int setPhase(enum CLKINDEX ind, int val, int degrees) {
if (ind < 0 || ind >= NUM_CLOCKS) { if (ind < 0 || ind >= NUM_CLOCKS) {
LOG(logERROR, ("Unknown clock index %d to set phase\n", ind)); LOG(logERROR, ("Unknown clock index %d to set phase\n", ind));

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@ -550,7 +550,7 @@ void setupDetector() {
LOG(logERROR, ("%s\n\n", initErrorMessage)); LOG(logERROR, ("%s\n\n", initErrorMessage));
initError = FAIL; initError = FAIL;
} }
setPipeline(ADC_CLK, DEFAULT_PIPELINE); setADCPipeline(DEFAULT_PIPELINE);
if (initError != FAIL) { if (initError != FAIL) {
initError = loadPatternFile(DEFAULT_PATTERN_FILE, initErrorMessage); initError = loadPatternFile(DEFAULT_PATTERN_FILE, initErrorMessage);
} }
@ -1562,35 +1562,23 @@ void configureSyncFrequency(enum CLKINDEX ind) {
setFrequency(SYNC_CLK, min); setFrequency(SYNC_CLK, min);
} }
// adc pipeline only void setADCPipeline(int val) {
void setPipeline(enum CLKINDEX ind, int val) {
if (ind != ADC_CLK) {
LOG(logERROR, ("Unknown clock index %d to set pipeline\n", ind));
return;
}
if (val < 0) { if (val < 0) {
return; return;
} }
LOG(logINFO, ("Setting adc clock (%d) Pipeline to %d\n", ADC_CLK, val)); LOG(logINFO, ("Setting adc pipeline to %d\n", val));
uint32_t offset = ADC_OFFSET_ADC_PPLN_OFST;
uint32_t mask = ADC_OFFSET_ADC_PPLN_MSK;
uint32_t addr = ADC_OFFSET_REG; uint32_t addr = ADC_OFFSET_REG;
// reset value bus_w(addr, bus_r(addr) & ~ADC_OFFSET_ADC_PPLN_MSK);
bus_w(addr, bus_r(addr) & ~mask); bus_w(addr, bus_r(addr) | ((val << ADC_OFFSET_ADC_PPLN_OFST) &
// set value ADC_OFFSET_ADC_PPLN_MSK));
bus_w(addr, bus_r(addr) | ((val << offset) & mask));
LOG(logDEBUG1, (" adc clock (%d) Offset: 0x%8x\n", ADC_CLK, bus_r(addr)));
} }
int getPipeline(enum CLKINDEX ind) { int getADCPipeline() {
if (ind != ADC_CLK) {
LOG(logERROR, ("Unknown clock index %d to get pipeline\n", ind));
return -1;
}
return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >> return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >>
ADC_OFFSET_ADC_PPLN_OFST); ADC_OFFSET_ADC_PPLN_OFST);
} }
/* aquisition */ /* aquisition */
int startStateMachine() { int startStateMachine() {

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@ -430,11 +430,13 @@ int validatePhaseinDegrees(enum CLKINDEX ind, int val, int retval);
int setFrequency(enum CLKINDEX ind, int val); int setFrequency(enum CLKINDEX ind, int val);
int getFrequency(enum CLKINDEX ind); int getFrequency(enum CLKINDEX ind);
void configureSyncFrequency(enum CLKINDEX ind); void configureSyncFrequency(enum CLKINDEX ind);
void setPipeline(enum CLKINDEX ind, int val); void setADCPipeline(int val);
int getPipeline(enum CLKINDEX ind); int getADCPipeline();
#endif #endif
#ifdef CHIPTESTBOARDD #ifdef CHIPTESTBOARDD
void setDBITPipeline(int val);
int getDBITPipeline();
int setLEDEnable(int enable); int setLEDEnable(int enable);
void setDigitalIODelay(uint64_t pinMask, int delay); void setDigitalIODelay(uint64_t pinMask, int delay);
#endif #endif
@ -519,6 +521,8 @@ int getClockDivider(enum CLKINDEX ind);
#elif GOTTHARD2D #elif GOTTHARD2D
int checkDetectorType(); int checkDetectorType();
int powerChip(int on); int powerChip(int on);
void setDBITPipeline(int val);
int getDBITPipeline();
int setPhase(enum CLKINDEX ind, int val, int degrees); int setPhase(enum CLKINDEX ind, int val, int degrees);
int getPhase(enum CLKINDEX ind, int degrees); int getPhase(enum CLKINDEX ind, int degrees);
int getMaxPhase(enum CLKINDEX ind); int getMaxPhase(enum CLKINDEX ind);

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@ -188,8 +188,6 @@ int get_clock_phase(int);
int get_max_clock_phase_shift(int); int get_max_clock_phase_shift(int);
int set_clock_divider(int); int set_clock_divider(int);
int get_clock_divider(int); int get_clock_divider(int);
int set_pipeline(int);
int get_pipeline(int);
int set_on_chip_dac(int); int set_on_chip_dac(int);
int get_on_chip_dac(int); int get_on_chip_dac(int);
int set_inject_channel(int); int set_inject_channel(int);
@ -265,3 +263,7 @@ int get_flip_rows(int);
int set_flip_rows(int); int set_flip_rows(int);
int get_filter_cell(int); int get_filter_cell(int);
int set_filter_cell(int); int set_filter_cell(int);
int set_adc_pipeline(int);
int get_adc_pipeline(int);
int set_dbit_pipeline(int);
int get_dbit_pipeline(int);

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@ -313,8 +313,6 @@ void function_table() {
flist[F_GET_MAX_CLOCK_PHASE_SHIFT] = &get_max_clock_phase_shift; flist[F_GET_MAX_CLOCK_PHASE_SHIFT] = &get_max_clock_phase_shift;
flist[F_SET_CLOCK_DIVIDER] = &set_clock_divider; flist[F_SET_CLOCK_DIVIDER] = &set_clock_divider;
flist[F_GET_CLOCK_DIVIDER] = &get_clock_divider; flist[F_GET_CLOCK_DIVIDER] = &get_clock_divider;
flist[F_SET_PIPELINE] = &set_pipeline;
flist[F_GET_PIPELINE] = &get_pipeline;
flist[F_SET_ON_CHIP_DAC] = &set_on_chip_dac; flist[F_SET_ON_CHIP_DAC] = &set_on_chip_dac;
flist[F_GET_ON_CHIP_DAC] = &get_on_chip_dac; flist[F_GET_ON_CHIP_DAC] = &get_on_chip_dac;
flist[F_SET_INJECT_CHANNEL] = &set_inject_channel; flist[F_SET_INJECT_CHANNEL] = &set_inject_channel;
@ -390,6 +388,10 @@ void function_table() {
flist[F_SET_FLIP_ROWS] = &set_flip_rows; flist[F_SET_FLIP_ROWS] = &set_flip_rows;
flist[F_GET_FILTER_CELL] = &get_filter_cell; flist[F_GET_FILTER_CELL] = &get_filter_cell;
flist[F_SET_FILTER_CELL] = &set_filter_cell; flist[F_SET_FILTER_CELL] = &set_filter_cell;
flist[F_SET_ADC_PIPELINE] = &set_adc_pipeline;
flist[F_GET_ADC_PIPELINE] = &get_adc_pipeline;
flist[F_SET_DBIT_PIPELINE] = &set_dbit_pipeline;
flist[F_GET_DBIT_PIPELINE] = &get_dbit_pipeline;
// check // check
if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) { if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) {
@ -6075,91 +6077,6 @@ int get_clock_divider(int file_des) {
return Server_SendResult(file_des, INT32, &retval, sizeof(retval)); return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
} }
int set_pipeline(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int args[2] = {-1, -1};
if (receiveData(file_des, args, sizeof(args), INT32) < 0)
return printSocketReadError();
LOG(logDEBUG1, ("Setting clock (%d) pipeline : %u\n", args[0], args[1]));
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
functionNotImplemented();
#else
// only set
if (Server_VerifyLock() == OK) {
int ind = args[0];
int val = args[1];
enum CLKINDEX c = 0;
switch (ind) {
case ADC_CLOCK:
c = ADC_CLK;
break;
#ifdef CHIPTESTBOARDD
case DBIT_CLOCK:
c = DBIT_CLK;
break;
#endif
default:
modeNotImplemented("clock index (pipeline set)", ind);
break;
}
if (ret != FAIL) {
char *clock_names[] = {CLK_NAMES};
char modeName[50] = "";
sprintf(modeName, "%s clock (%d) piepline", clock_names[c], (int)c);
setPipeline(c, val);
int retval = getPipeline(c);
LOG(logDEBUG1, ("retval %s: %d\n", modeName, retval));
validate(&ret, mess, val, retval, modeName, DEC);
}
}
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
}
int get_pipeline(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int arg = -1;
int retval = -1;
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
return printSocketReadError();
LOG(logDEBUG1, ("Getting clock (%d) frequency\n", arg));
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
functionNotImplemented();
#else
// get only
enum CLKINDEX c = 0;
switch (arg) {
case ADC_CLOCK:
c = ADC_CLK;
break;
#ifdef CHIPTESTBOARDD
case DBIT_CLOCK:
c = DBIT_CLK;
break;
#endif
default:
modeNotImplemented("clock index (pipeline get)", arg);
break;
}
if (ret == OK) {
retval = getPipeline(c);
char *clock_names[] = {CLK_NAMES};
LOG(logDEBUG1, ("retval %s clock (%d) pipeline: %d\n", clock_names[c],
(int)c, retval));
}
#endif
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
}
int set_on_chip_dac(int file_des) { int set_on_chip_dac(int file_des) {
ret = OK; ret = OK;
memset(mess, 0, sizeof(mess)); memset(mess, 0, sizeof(mess));
@ -8926,3 +8843,84 @@ int set_filter_cell(int file_des) {
#endif #endif
return Server_SendResult(file_des, INT32, NULL, 0); return Server_SendResult(file_des, INT32, NULL, 0);
} }
int set_adc_pipeline(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int arg = -1;
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
return printSocketReadError();
LOG(logDEBUG1, ("Setting adc pipeline : %u\n", arg));
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
functionNotImplemented();
#else
// only set
if (Server_VerifyLock() == OK) {
setADCPipeline(arg);
int retval = getADCPipeline();
LOG(logDEBUG1, ("retval adc pipeline: %d\n", retval));
validate(&ret, mess, arg, retval, "set adc pipeline", DEC);
}
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
}
int get_adc_pipeline(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int retval = -1;
LOG(logDEBUG1, ("Getting adc pipeline\n"));
#if !defined(CHIPTESTBOARDD) && !defined(MOENCHD)
functionNotImplemented();
#else
// get only
retval = getADCPipeline();
LOG(logDEBUG1, ("retval adc pipeline: %d\n", retval));
#endif
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
}
int set_dbit_pipeline(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int arg = -1;
if (receiveData(file_des, &arg, sizeof(arg), INT32) < 0)
return printSocketReadError();
LOG(logDEBUG1, ("Setting dbit pipeline : %u\n", arg));
#if !defined(CHIPTESTBOARDD) && !defined(GOTTHARD2D)
functionNotImplemented();
#else
// only set
if (Server_VerifyLock() == OK) {
setDBITPipeline(arg);
int retval = getDBITPipeline();
LOG(logDEBUG1, ("retval dbit pipeline: %d\n", retval));
validate(&ret, mess, arg, retval, "set dbit pipeline", DEC);
}
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
}
int get_dbit_pipeline(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int retval = -1;
LOG(logDEBUG1, ("Getting dbit pipeline\n"));
#if !defined(CHIPTESTBOARDD) && !defined(GOTTHARD2D)
functionNotImplemented();
#else
// get only
retval = getDBITPipeline();
LOG(logDEBUG1, ("retval dbit pipeline: %d\n", retval));
#endif
return Server_SendResult(file_des, INT32, &retval, sizeof(retval));
}

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@ -496,6 +496,12 @@ class Detector {
* (sls_detector_defs.h) on the structure and its members */ * (sls_detector_defs.h) on the structure and its members */
void setCurrentSource(defs::currentSrcParameters par, Positions pos = {}); void setCurrentSource(defs::currentSrcParameters par, Positions pos = {});
/** [CTB][Gotthard2] */
Result<int> getDBITPipeline(Positions pos = {}) const;
/** [CTB] Options: 0-255 \n [Gotthard2] Options: 0-7 */
void setDBITPipeline(int value, Positions pos = {});
///@{ ///@{
/** @name Acquisition */ /** @name Acquisition */
@ -1502,12 +1508,6 @@ class Detector {
/** [CTB] */ /** [CTB] */
void setDBITClock(int value_in_MHz, Positions pos = {}); void setDBITClock(int value_in_MHz, Positions pos = {});
/** [CTB] */
Result<int> getDBITPipeline(Positions pos = {}) const;
/** [CTB] */
void setDBITPipeline(int value, Positions pos = {});
/** /**
* [CTB] mV * [CTB] mV
* Options: V_POWER_A, V_POWER_B, V_POWER_C, V_POWER_D, V_POWER_IO */ * Options: V_POWER_A, V_POWER_B, V_POWER_C, V_POWER_D, V_POWER_IO */

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@ -804,6 +804,7 @@ class CmdProxy {
{"parallel", &CmdProxy::parallel}, {"parallel", &CmdProxy::parallel},
{"filterresistor", &CmdProxy::filterresistor}, {"filterresistor", &CmdProxy::filterresistor},
{"currentsource", &CmdProxy::CurrentSource}, {"currentsource", &CmdProxy::CurrentSource},
{"dbitpipeline", &CmdProxy::dbitpipeline},
/** temperature */ /** temperature */
{"templist", &CmdProxy::templist}, {"templist", &CmdProxy::templist},
@ -986,7 +987,6 @@ class CmdProxy {
{"dsamples", &CmdProxy::dsamples}, {"dsamples", &CmdProxy::dsamples},
{"romode", &CmdProxy::romode}, {"romode", &CmdProxy::romode},
{"dbitclk", &CmdProxy::dbitclk}, {"dbitclk", &CmdProxy::dbitclk},
{"dbitpipeline", &CmdProxy::dbitpipeline},
{"v_a", &CmdProxy::v_a}, {"v_a", &CmdProxy::v_a},
{"v_b", &CmdProxy::v_b}, {"v_b", &CmdProxy::v_b},
{"v_c", &CmdProxy::v_c}, {"v_c", &CmdProxy::v_c},
@ -1356,6 +1356,12 @@ class CmdProxy {
"for increasing resistance.\n\t[Gotthard2] Options: [0|1|2|3]. Default " "for increasing resistance.\n\t[Gotthard2] Options: [0|1|2|3]. Default "
"is 0.\n\t[Jungfrau] Options: [0|1]. Default is 1."); "is 0.\n\t[Jungfrau] Options: [0|1]. Default is 1.");
INTEGER_COMMAND_VEC_ID(dbitpipeline, getDBITPipeline, setDBITPipeline,
StringTo<int>,
"[n_value]\n\t[Ctb][Gotthard2] Pipeline of the "
"clock for latching digital bits.\n\t[Gotthard2] "
"Options: 0-7\n\t[CTB] Options: 0-255");
/** temperature */ /** temperature */
GET_COMMAND_NOID( GET_COMMAND_NOID(
templist, getTemperatureList, templist, getTemperatureList,
@ -1994,10 +2000,6 @@ class CmdProxy {
dbitclk, getDBITClock, setDBITClock, StringTo<int>, dbitclk, getDBITClock, setDBITClock, StringTo<int>,
"[n_clk in MHz]\n\t[Ctb] Clock for latching the digital bits in MHz."); "[n_clk in MHz]\n\t[Ctb] Clock for latching the digital bits in MHz.");
INTEGER_COMMAND_VEC_ID(
dbitpipeline, getDBITPipeline, setDBITPipeline, StringTo<int>,
"[n_value]\n\t[Ctb] Pipeline of the clock for latching digital bits.");
INTEGER_IND_COMMAND(v_a, getVoltage, setVoltage, StringTo<int>, INTEGER_IND_COMMAND(v_a, getVoltage, setVoltage, StringTo<int>,
defs::V_POWER_A, defs::V_POWER_A,
"[n_value]\n\t[Ctb] Voltage supply a in mV."); "[n_value]\n\t[Ctb] Voltage supply a in mV.");

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@ -715,6 +715,15 @@ Detector::getCurrentSource(Positions pos) const {
void Detector::setCurrentSource(defs::currentSrcParameters par, Positions pos) { void Detector::setCurrentSource(defs::currentSrcParameters par, Positions pos) {
pimpl->Parallel(&Module::setCurrentSource, pos, par); pimpl->Parallel(&Module::setCurrentSource, pos, par);
} }
Result<int> Detector::getDBITPipeline(Positions pos) const {
return pimpl->Parallel(&Module::getDBITPipeline, pos);
}
void Detector::setDBITPipeline(int value, Positions pos) {
pimpl->Parallel(&Module::setDBITPipeline, pos, value);
}
// Acquisition // Acquisition
void Detector::acquire() { pimpl->acquire(); } void Detector::acquire() { pimpl->acquire(); }
@ -1806,15 +1815,11 @@ Result<int> Detector::getSYNCClock(Positions pos) const {
} }
Result<int> Detector::getADCPipeline(Positions pos) const { Result<int> Detector::getADCPipeline(Positions pos) const {
return pimpl->Parallel(&Module::getPipeline, pos, defs::ADC_CLOCK); return pimpl->Parallel(&Module::getADCPipeline, pos);
} }
void Detector::setADCPipeline(int value, Positions pos) { void Detector::setADCPipeline(int value, Positions pos) {
pimpl->Parallel(&Module::setPipeline, pos, defs::ADC_CLOCK, value); pimpl->Parallel(&Module::setADCPipeline, pos, value);
}
Result<int> Detector::getDBITPipeline(Positions pos) const {
return pimpl->Parallel(&Module::getPipeline, pos, defs::DBIT_CLOCK);
} }
Result<int> Detector::getVoltage(defs::dacIndex index, Positions pos) const { Result<int> Detector::getVoltage(defs::dacIndex index, Positions pos) const {
@ -1894,10 +1899,6 @@ void Detector::setDBITClock(int value_in_MHz, Positions pos) {
value_in_MHz); value_in_MHz);
} }
void Detector::setDBITPipeline(int value, Positions pos) {
pimpl->Parallel(&Module::setPipeline, pos, defs::DBIT_CLOCK, value);
}
Result<int> Detector::getMeasuredVoltage(defs::dacIndex index, Result<int> Detector::getMeasuredVoltage(defs::dacIndex index,
Positions pos) const { Positions pos) const {
switch (index) { switch (index) {

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@ -720,6 +720,14 @@ void Module::setCurrentSource(defs::currentSrcParameters par) {
sendToDetector(F_SET_CURRENT_SOURCE, par, nullptr); sendToDetector(F_SET_CURRENT_SOURCE, par, nullptr);
} }
int Module::getDBITPipeline() const {
return sendToDetector<int>(F_GET_DBIT_PIPELINE);
}
void Module::setDBITPipeline(int value) {
sendToDetector(F_SET_DBIT_PIPELINE, value, nullptr);
}
// Acquisition // Acquisition
void Module::startReceiver() { void Module::startReceiver() {
@ -2107,13 +2115,12 @@ void Module::setNumberOfAnalogSamples(int value) {
} }
} }
int Module::getPipeline(int clkIndex) const { int Module::getADCPipeline() const {
return sendToDetector<int>(F_GET_PIPELINE, clkIndex); return sendToDetector<int>(F_GET_ADC_PIPELINE);
} }
void Module::setPipeline(int clkIndex, int value) { void Module::setADCPipeline(int value) {
int args[]{clkIndex, value}; sendToDetector(F_SET_ADC_PIPELINE, value, nullptr);
sendToDetector(F_SET_PIPELINE, args, nullptr);
} }
uint32_t Module::getADCEnableMask() const { uint32_t Module::getADCEnableMask() const {

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@ -174,6 +174,9 @@ class Module : public virtual slsDetectorDefs {
void setFilterResistor(int value); void setFilterResistor(int value);
defs::currentSrcParameters getCurrentSource() const; defs::currentSrcParameters getCurrentSource() const;
void setCurrentSource(defs::currentSrcParameters par); void setCurrentSource(defs::currentSrcParameters par);
int getDBITPipeline() const;
void setDBITPipeline(int value);
/************************************************** /**************************************************
* * * *
* Acquisition * * Acquisition *
@ -454,8 +457,8 @@ class Module : public virtual slsDetectorDefs {
* ************************************************/ * ************************************************/
int getNumberOfAnalogSamples() const; int getNumberOfAnalogSamples() const;
void setNumberOfAnalogSamples(int value); void setNumberOfAnalogSamples(int value);
int getPipeline(int clkIndex) const; int getADCPipeline() const;
void setPipeline(int clkIndex, int value); void setADCPipeline(int value);
uint32_t getADCEnableMask() const; uint32_t getADCEnableMask() const;
void setADCEnableMask(uint32_t mask); void setADCEnableMask(uint32_t mask);
uint32_t getTenGigaADCEnableMask() const; uint32_t getTenGigaADCEnableMask() const;

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@ -519,41 +519,6 @@ TEST_CASE("dbitclk", "[.cmd]") {
} }
} }
TEST_CASE("dbitpipeline", "[.cmd]") {
Detector det;
CmdProxy proxy(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
auto prev_val = det.getDBITPipeline();
{
std::ostringstream oss;
proxy.Call("dbitpipeline", {"1"}, -1, PUT, oss);
REQUIRE(oss.str() == "dbitpipeline 1\n");
}
{
std::ostringstream oss;
proxy.Call("dbitpipeline", {"0"}, -1, PUT, oss);
REQUIRE(oss.str() == "dbitpipeline 0\n");
}
{
std::ostringstream oss;
proxy.Call("dbitpipeline", {"15"}, -1, PUT, oss);
REQUIRE(oss.str() == "dbitpipeline 15\n");
}
{
std::ostringstream oss;
proxy.Call("dbitpipeline", {}, -1, GET, oss);
REQUIRE(oss.str() == "dbitpipeline 15\n");
}
for (int i = 0; i != det.size(); ++i) {
det.setDBITPipeline(prev_val[i], {i});
}
} else {
REQUIRE_THROWS(proxy.Call("dbitpipeline", {}, -1, GET));
}
}
TEST_CASE("v_a", "[.cmd]") { TEST_CASE("v_a", "[.cmd]") {
Detector det; Detector det;
CmdProxy proxy(&det); CmdProxy proxy(&det);

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@ -1423,6 +1423,56 @@ TEST_CASE("filterresistor", "[.cmd]") {
} }
} }
TEST_CASE("dbitpipeline", "[.cmd]") {
Detector det;
CmdProxy proxy(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD || det_type == defs::GOTTHARD2) {
auto prev_val = det.getDBITPipeline();
{
std::ostringstream oss;
proxy.Call("dbitpipeline", {"1"}, -1, PUT, oss);
REQUIRE(oss.str() == "dbitpipeline 1\n");
}
{
std::ostringstream oss;
proxy.Call("dbitpipeline", {"0"}, -1, PUT, oss);
REQUIRE(oss.str() == "dbitpipeline 0\n");
}
if (det_type == defs::CHIPTESTBOARD) {
{
std::ostringstream oss;
proxy.Call("dbitpipeline", {"15"}, -1, PUT, oss);
REQUIRE(oss.str() == "dbitpipeline 15\n");
}
{
std::ostringstream oss;
proxy.Call("dbitpipeline", {}, -1, GET, oss);
REQUIRE(oss.str() == "dbitpipeline 15\n");
}
REQUIRE_THROWS(proxy.Call("dbitpipeline", {"256"}, -1, PUT));
} else {
{
std::ostringstream oss;
proxy.Call("dbitpipeline", {"7"}, -1, PUT, oss);
REQUIRE(oss.str() == "dbitpipeline 7\n");
}
{
std::ostringstream oss;
proxy.Call("dbitpipeline", {}, -1, GET, oss);
REQUIRE(oss.str() == "dbitpipeline 7\n");
}
REQUIRE_THROWS(proxy.Call("dbitpipeline", {"8"}, -1, PUT));
}
for (int i = 0; i != det.size(); ++i) {
det.setDBITPipeline(prev_val[i], {i});
}
} else {
REQUIRE_THROWS(proxy.Call("dbitpipeline", {}, -1, GET));
}
}
TEST_CASE("currentsource", "[.cmd]") { TEST_CASE("currentsource", "[.cmd]") {
Detector det; Detector det;
CmdProxy proxy(&det); CmdProxy proxy(&det);

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@ -164,8 +164,6 @@ enum detFuncs {
F_GET_MAX_CLOCK_PHASE_SHIFT, F_GET_MAX_CLOCK_PHASE_SHIFT,
F_SET_CLOCK_DIVIDER, F_SET_CLOCK_DIVIDER,
F_GET_CLOCK_DIVIDER, F_GET_CLOCK_DIVIDER,
F_SET_PIPELINE,
F_GET_PIPELINE,
F_SET_ON_CHIP_DAC, F_SET_ON_CHIP_DAC,
F_GET_ON_CHIP_DAC, F_GET_ON_CHIP_DAC,
F_SET_INJECT_CHANNEL, F_SET_INJECT_CHANNEL,
@ -241,6 +239,10 @@ enum detFuncs {
F_SET_FLIP_ROWS, F_SET_FLIP_ROWS,
F_GET_FILTER_CELL, F_GET_FILTER_CELL,
F_SET_FILTER_CELL, F_SET_FILTER_CELL,
F_SET_ADC_PIPELINE,
F_GET_ADC_PIPELINE,
F_SET_DBIT_PIPELINE,
F_GET_DBIT_PIPELINE,
NUM_DET_FUNCTIONS, NUM_DET_FUNCTIONS,
RECEIVER_ENUM_START = 256, /**< detector function should not exceed this RECEIVER_ENUM_START = 256, /**< detector function should not exceed this
@ -513,8 +515,6 @@ const char* getFunctionNameFromEnum(enum detFuncs func) {
case F_GET_MAX_CLOCK_PHASE_SHIFT: return "F_GET_MAX_CLOCK_PHASE_SHIFT"; case F_GET_MAX_CLOCK_PHASE_SHIFT: return "F_GET_MAX_CLOCK_PHASE_SHIFT";
case F_SET_CLOCK_DIVIDER: return "F_SET_CLOCK_DIVIDER"; case F_SET_CLOCK_DIVIDER: return "F_SET_CLOCK_DIVIDER";
case F_GET_CLOCK_DIVIDER: return "F_GET_CLOCK_DIVIDER"; case F_GET_CLOCK_DIVIDER: return "F_GET_CLOCK_DIVIDER";
case F_SET_PIPELINE: return "F_SET_PIPELINE";
case F_GET_PIPELINE: return "F_GET_PIPELINE";
case F_SET_ON_CHIP_DAC: return "F_SET_ON_CHIP_DAC"; case F_SET_ON_CHIP_DAC: return "F_SET_ON_CHIP_DAC";
case F_GET_ON_CHIP_DAC: return "F_GET_ON_CHIP_DAC"; case F_GET_ON_CHIP_DAC: return "F_GET_ON_CHIP_DAC";
case F_SET_INJECT_CHANNEL: return "F_SET_INJECT_CHANNEL"; case F_SET_INJECT_CHANNEL: return "F_SET_INJECT_CHANNEL";
@ -589,6 +589,10 @@ const char* getFunctionNameFromEnum(enum detFuncs func) {
case F_SET_FLIP_ROWS: return "F_SET_FLIP_ROWS"; case F_SET_FLIP_ROWS: return "F_SET_FLIP_ROWS";
case F_GET_FILTER_CELL: return "F_GET_FILTER_CELL"; case F_GET_FILTER_CELL: return "F_GET_FILTER_CELL";
case F_SET_FILTER_CELL: return "F_SET_FILTER_CELL"; case F_SET_FILTER_CELL: return "F_SET_FILTER_CELL";
case F_SET_ADC_PIPELINE: return "F_SET_ADC_PIPELINE";
case F_GET_ADC_PIPELINE: return "F_GET_ADC_PIPELINE";
case F_SET_DBIT_PIPELINE: return "F_SET_DBIT_PIPELINE";
case F_GET_DBIT_PIPELINE: return "F_GET_DBIT_PIPELINE";
case NUM_DET_FUNCTIONS: return "NUM_DET_FUNCTIONS"; case NUM_DET_FUNCTIONS: return "NUM_DET_FUNCTIONS";
case RECEIVER_ENUM_START: return "RECEIVER_ENUM_START"; case RECEIVER_ENUM_START: return "RECEIVER_ENUM_START";