mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 18:17:59 +02:00
Xilinx client tests (#887)
* implemented testbus, testfpga, set/get #frames, triggers, allowed that and for connection to client, also allowed, getnumchannels, configuremac, getrunstatus, setdetectorposition with dummy values * allowing tests for xilinx * binaries in
This commit is contained in:
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@ -5,6 +5,8 @@
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#include <inttypes.h>
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#include <sys/types.h>
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int mapCSP0(void);
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void bus_w(u_int32_t offset, u_int32_t data);
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u_int32_t bus_r(u_int32_t offset);
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u_int32_t bus_r(u_int32_t offset);
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uint64_t getU64BitReg(int aLSB, int aMSB);
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void setU64BitReg(uint64_t value, int aLSB, int aMSB);
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int mapCSP0(void);
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@ -65,10 +65,8 @@ typedef struct udpStruct_s {
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int isInitCheckDone();
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int getInitResult(char **mess);
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void basictests();
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#if !defined(EIGERD)
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int checkType();
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#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(MOENCHD) || \
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defined(CHIPTESTBOARDD) || defined(MYTHEN3D) || defined(GOTTHARD2D)
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int testFpga();
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int testBus();
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#endif
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@ -251,11 +249,11 @@ int getMaxStoragecellStart();
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int setNextFrameNumber(uint64_t value);
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int getNextFrameNumber(uint64_t *value);
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#endif
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#ifndef XILINX_CHIPTESTBOARDD
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void setNumFrames(int64_t val);
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int64_t getNumFrames();
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void setNumTriggers(int64_t val);
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int64_t getNumTriggers();
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#ifndef XILINX_CHIPTESTBOARDD
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#ifndef MYTHEN3D
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int setExpTime(int64_t val);
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int64_t getExpTime();
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@ -501,9 +499,7 @@ void calcChecksum(udp_header *udp);
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int getAdcConfigured();
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#endif
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#ifndef XILINX_CHIPTESTBOARDD
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int configureMAC();
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#endif
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int setDetectorPosition(int pos[]);
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int *getDetectorPosition();
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@ -715,9 +711,7 @@ int softwareTrigger(int block);
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#if defined(EIGERD) || defined(MYTHEN3D) || defined(CHIPTESTBOARDD)
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int startReadOut();
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#endif
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#ifndef XILINX_CHIPTESTBOARDD
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enum runStatus getRunStatus();
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#endif
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#ifdef EIGERD
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void waitForAcquisitionEnd(int *ret, char *mess);
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#else
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@ -748,9 +742,11 @@ u_int32_t runState(enum TLogLevel lev);
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#ifndef XILINX_CHIPTESTBOARDD
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int calculateDataBytes();
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int getTotalNumberOfChannels();
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#if defined(CHIPTESTBOARDD)
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#endif
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#if defined(CHIPTESTBOARDD) || defined (XILINX_CHIPTESTBOARDD)
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void getNumberOfChannels(int *nchanx, int *nchany);
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#endif
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#ifndef XILINX_CHIPTESTBOARDD
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int getNumberOfChips();
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int getNumberOfDACs();
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int getNumberOfChannelsPerChip();
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@ -2219,9 +2219,6 @@ int get_num_frames(int file_des) {
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memset(mess, 0, sizeof(mess));
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int64_t retval = -1;
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#ifdef XILINX_CHIPTESTBOARDD
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functionNotImplemented();
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#else
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// get only
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if (!scan) {
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retval = getNumFrames();
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@ -2231,7 +2228,6 @@ int get_num_frames(int file_des) {
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LOG(logDEBUG1, ("retval num frames (num scan steps) %lld\n",
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(long long int)retval));
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}
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#endif
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return Server_SendResult(file_des, INT64, &retval, sizeof(retval));
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}
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@ -2244,9 +2240,6 @@ int set_num_frames(int file_des) {
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return printSocketReadError();
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LOG(logDEBUG1, ("Setting number of frames %lld\n", (long long int)arg));
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#ifdef XILINX_CHIPTESTBOARDD
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functionNotImplemented();
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#else
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// only set
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if (Server_VerifyLock() == OK) {
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// only set number of frames if normal mode (not scan)
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@ -2292,7 +2285,6 @@ int set_num_frames(int file_des) {
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}
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}
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}
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#endif
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return Server_SendResult(file_des, INT64, NULL, 0);
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}
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@ -2301,13 +2293,9 @@ int get_num_triggers(int file_des) {
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memset(mess, 0, sizeof(mess));
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int64_t retval = -1;
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#ifdef XILINX_CHIPTESTBOARDD
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functionNotImplemented();
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#else
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// get only
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retval = getNumTriggers();
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LOG(logDEBUG1, ("retval num triggers %lld\n", (long long int)retval));
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#endif
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return Server_SendResult(file_des, INT64, &retval, sizeof(retval));
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}
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@ -2320,9 +2308,6 @@ int set_num_triggers(int file_des) {
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return printSocketReadError();
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LOG(logDEBUG1, ("Setting number of triggers %lld\n", (long long int)arg));
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#ifdef XILINX_CHIPTESTBOARDD
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functionNotImplemented();
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#else
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// only set
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if (Server_VerifyLock() == OK) {
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#if JUNGFRAUD
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@ -2342,7 +2327,6 @@ int set_num_triggers(int file_des) {
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validate64(&ret, mess, arg, retval, "set number of triggers", DEC);
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}
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}
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#endif
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return Server_SendResult(file_des, INT64, NULL, 0);
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}
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@ -3622,7 +3606,7 @@ int write_adc_register(int file_des) {
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uint32_t val = args[1];
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LOG(logDEBUG1, ("Writing 0x%x to ADC Register 0x%x\n", val, addr));
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#if defined(EIGERD) || defined(GOTTHARD2D) || defined(MYTHEN3D)
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#if defined(EIGERD) || defined(GOTTHARD2D) || defined(MYTHEN3D) || defined(XILINX_CHIPTESTBOARDD)
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functionNotImplemented();
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#else
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#ifndef VIRTUAL
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@ -4017,7 +4001,7 @@ int reset_fpga(int file_des) {
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LOG(logDEBUG1, ("Reset FPGA\n"));
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#if defined(EIGERD) || defined(GOTTHARDD) || defined(GOTTHARD2D) || \
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defined(MYTHEN3D)
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defined(MYTHEN3D) || defined (XILINX_CHIPTESTBOARDD)
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functionNotImplemented();
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#else
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// only set
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@ -5026,9 +5010,6 @@ int set_detector_position(int file_des) {
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LOG(logDEBUG, ("Setting detector positions: [maxy:%u, modIndex:%u]\n",
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args[0], args[1]));
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#ifdef XILINX_CHIPTESTBOARDD
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functionNotImplemented();
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#else
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// only set
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if (Server_VerifyLock() == OK) {
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// if in update mode, there is no need to do this (also detector not set
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@ -5039,14 +5020,10 @@ int set_detector_position(int file_des) {
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calculate_and_set_position();
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}
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}
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#endif
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return Server_SendResult(file_des, INT32, NULL, 0);
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}
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int check_detector_idle(const char *s) {
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#ifdef XILINX_CHIPTESTBOARDD
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return FAIL;
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#else
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enum runStatus status = getRunStatus();
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if (status != IDLE && status != RUN_FINISHED && status != STOPPED &&
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status != ERROR) {
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@ -5058,7 +5035,6 @@ int check_detector_idle(const char *s) {
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LOG(logERROR, (mess));
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}
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return ret;
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#endif
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}
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int is_udp_configured() {
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@ -5125,7 +5101,6 @@ int is_udp_configured() {
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}
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void configure_mac() {
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#ifndef XILINX_CHIPTESTBOARDD
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if (isControlServer) {
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if (is_udp_configured() == OK) {
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ret = configureMAC();
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@ -5152,7 +5127,6 @@ void configure_mac() {
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}
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configured = FAIL;
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LOG(logWARNING, ("Configure FAIL, not all parameters configured yet\n"));
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#endif
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}
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int set_source_udp_ip(int file_des) {
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@ -7105,7 +7079,7 @@ int get_num_channels(int file_des) {
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LOG(logDEBUG1, ("Getting number of channels\n"));
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#if !defined(CHIPTESTBOARDD)
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#if !defined(CHIPTESTBOARDD) && !defined(XILINX_CHIPTESTBOARDD)
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functionNotImplemented();
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#else
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// get only
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@ -51,14 +51,10 @@ void basictests() {
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}
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#ifndef VIRTUAL
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/*if ((!debugflag) && (!updateFlag) &&
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((validateKernelVersion(KERNEL_DATE_VRSN) == FAIL) ||
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(checkType() == FAIL) || (testFpga() == FAIL) ||
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(testBus() == FAIL))) {*/
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if ((!debugflag) && (!updateFlag) &&
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((validateKernelVersion(KERNEL_DATE_VRSN) == FAIL) ||
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(checkType() == FAIL) /*|| (testFpga() == FAIL) ||
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(testBus() == FAIL)*/)) {
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(checkType() == FAIL) || (testFpga() == FAIL) ||
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(testBus() == FAIL))) {
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sprintf(initErrorMessage,
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"Could not pass basic tests of FPGA and bus. Cannot proceed. "
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"Check Firmware. (Firmware version:0x%lx) \n",
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@ -103,6 +99,123 @@ int checkType() {
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return OK;
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}
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int testFpga() {
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#ifdef VIRTUAL
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return OK;
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#endif
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LOG(logINFO, ("Testing FPGA:\n"));
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// fixed pattern
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int ret = OK;
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/* TODO: FIX PATTERN not defined in firmware
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uint32_t val = bus_r(FIX_PATT_REG);
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if (val == FIX_PATT_VAL) {
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LOG(logINFO, ("\tFixed pattern: successful match (0x%08x)\n", val));
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} else {
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LOG(logERROR,
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("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n",
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val, FIX_PATT_VAL));
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ret = FAIL;
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}
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*/
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if (ret == OK) {
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// Delay LSB reg
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LOG(logINFO, ("\tTesting Delay LSB Register:\n"));
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uint32_t addr = DELAYINREG1;
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// store previous delay value
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uint32_t previousValue = bus_r(addr);
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volatile uint32_t val = 0, readval = 0;
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int times = 1000 * 1000;
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for (int i = 0; i < times; ++i) {
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val = 0x5A5A5A5A - i;
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bus_w(addr, val);
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readval = bus_r(addr);
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if (readval != val) {
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LOG(logERROR, ("1:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
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i, val, readval));
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ret = FAIL;
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break;
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}
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val = (i + (i << 10) + (i << 20));
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bus_w(addr, val);
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readval = bus_r(addr);
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if (readval != val) {
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LOG(logERROR, ("2:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
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i, val, readval));
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ret = FAIL;
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break;
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}
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val = 0x0F0F0F0F;
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bus_w(addr, val);
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readval = bus_r(addr);
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if (readval != val) {
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LOG(logERROR, ("3:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
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i, val, readval));
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ret = FAIL;
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break;
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}
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val = 0xF0F0F0F0;
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bus_w(addr, val);
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readval = bus_r(addr);
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if (readval != val) {
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LOG(logERROR, ("4:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n",
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i, val, readval));
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ret = FAIL;
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break;
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}
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}
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// write back previous value
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bus_w(addr, previousValue);
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if (ret == OK) {
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LOG(logINFO,
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("\tSuccessfully tested FPGA Delay LSB Register %d times\n",
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times));
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}
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}
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return ret;
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}
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int testBus() {
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#ifdef VIRTUAL
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return OK;
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#endif
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LOG(logINFO, ("Testing Bus:\n"));
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int ret = OK;
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uint32_t addr = DELAYINREG1;
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// store previous delay value
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uint32_t previousValue = bus_r(addr);
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volatile uint32_t val = 0, readval = 0;
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int times = 1000 * 1000;
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for (int i = 0; i < times; ++i) {
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val += 0xbbbbb;
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bus_w(addr, val);
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readval = bus_r(addr);
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if (readval != val) {
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LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", i,
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val, readval));
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ret = FAIL;
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}
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}
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// write back previous value
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bus_w(addr, previousValue);
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if (ret == OK) {
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LOG(logINFO, ("\tSuccessfully tested bus %d times\n", times));
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}
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return ret;
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}
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/* Ids */
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void getServerVersion(char *version) { strcpy(version, APIXILINXCTB); }
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@ -194,18 +307,81 @@ void initStopServer() {
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/* set up detector */
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void setupDetector() {
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LOG(logINFO, ("This Server is for 1 Xilinx Chip Test Board\n"));
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LOG(logINFO, ("Setting up Server for 1 Xilinx Chip Test Board\n"));
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#ifdef VIRTUAL
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sharedMemory_setStatus(IDLE);
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#endif
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LOG(logINFO, ("Goodbye...\n"));
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LOG(logINFOBLUE, ("Setting Default parameters\n"));
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setNumFrames(DEFAULT_NUM_FRAMES);
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setNumTriggers(DEFAULT_NUM_CYCLES);
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}
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/* parameters - timer */
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void setNumFrames(int64_t val) {
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if (val > 0) {
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LOG(logINFO, ("Setting number of frames %ld\n", val));
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setU64BitReg(val, FRAMESINREG1, FRAMESINREG2);
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}
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}
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int64_t getNumFrames() { return getU64BitReg(FRAMESINREG1, FRAMESINREG2); }
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void setNumTriggers(int64_t val) {
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if (val > 0) {
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LOG(logINFO, ("Setting number of triggers %ld\n", val));
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setU64BitReg(val, CYCLESINREG1, CYCLESINREG2);
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}
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}
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int64_t getNumTriggers() { return getU64BitReg(CYCLESINREG1, CYCLESINREG2); }
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int setDetectorPosition(int pos[]) {
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memcpy(detPos, pos, sizeof(detPos));
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// TODO
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return OK;
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}
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int configureMAC() {
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// TODO
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LOG(logINFO, ("Configuring MAC\n"));
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return OK;
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}
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int *getDetectorPosition() { return detPos; }
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int getNumberofUDPInterfaces() { return 1; }
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int getNumberofUDPInterfaces() { return 1; }
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/* aquisition */
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enum runStatus getRunStatus() {
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LOG(logDEBUG1, ("Getting status\n"));
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// scan error or running
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if (sharedMemory_getScanStatus() == ERROR) {
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LOG(logINFOBLUE, ("Status: scan ERROR\n"));
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return ERROR;
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}
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if (sharedMemory_getScanStatus() == RUNNING) {
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LOG(logINFOBLUE, ("Status: scan RUNNING\n"));
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return RUNNING;
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}
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#ifdef VIRTUAL
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if (sharedMemory_getStatus() == RUNNING) {
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LOG(logINFOBLUE, ("Status: RUNNING\n"));
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return RUNNING;
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}
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LOG(logINFOBLUE, ("Status: IDLE\n"));
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return IDLE;
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#endif
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//TODO: get status
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LOG(logINFOBLUE, ("Status: IDLE\n"));
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return IDLE;
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}
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void getNumberOfChannels(int *nchanx, int *nchany) {
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// TODO
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*nchanx = NCHAN;
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*nchany = 1;
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}
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@ -16,3 +16,8 @@
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enum ADCINDEX { V_PWR_IO };
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enum DACINDEX { D0 };
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/** Default Parameters */
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#define DEFAULT_NUM_FRAMES (1)
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#define DEFAULT_NUM_CYCLES (1)
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