* minor refactoring from old code

* binaries in
This commit is contained in:
Dhanya Thattil
2022-08-11 09:17:35 +02:00
committed by GitHub
parent e0207cfac1
commit 9980a419f3
3 changed files with 1 additions and 5 deletions

View File

@ -2271,10 +2271,6 @@ int setClockDivider(enum CLKINDEX ind, int val) {
clkDivider[ind] = val;
LOG(logINFO, ("\t%s clock (%d) divider set to %d\n", clock_names[ind], ind,
clkDivider[ind]));
// update system frequency
if (ind == SYSTEM_C0) {
setTimingSource(getTimingSource());
}
// phase is reset by pll (when setting output frequency)
if (ind < SYSTEM_C0) {