detectors/slsDetectorPackage
25
0
Fork 0
mirror of https://github.com/slsdetectorgroup/slsDetectorPackage.git synced 2025-06-19 16:27:13 +02:00
Code Issues Actions Packages Releases Activity

Commandline (#66)

Browse Source 
* WIP

* WIP

* removed status to string from defs

* WIP

* WIP

* WIP removed unused functions in multi

* WIP

* print hex in a terrible way

* WIP, loadconfig error

* WIP, type to string

* WIP

* fix to conversion

* WIP, hostname doesnt work

* WIP

* WIP

* WIP

* WIP, threshold

* WIP, threshold

* WIP

* WIP, triggers

* WIP, cycles to triggers

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* rx_udsocksize fx, WIP

* WIP

* WIP

* WIP

* file index (64 bit), WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* merge

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* New python mod
This commit is contained in:
Dhanya Thattil
2019-10-21 10:29:06 +02:00
committed by GitHub
parent eebc1109b0
commit 995f0924e5
95 changed files with 5320 additions and 8114 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
slsDetectorServers/moenchDetectorServer/RegisterDefs.h
View File

@ -123,7 +123,7 @@
#define DELAY_LEFT_LSB_REG (0x12 << MEM_MAP_SHIFT)
#define DELAY_LEFT_MSB_REG (0x13 << MEM_MAP_SHIFT)
/* Cycles Left 64 bit RO register TODO */
/* Triggers Left 64 bit RO register TODO */
#define CYCLES_LEFT_LSB_REG (0x14 << MEM_MAP_SHIFT)
#define CYCLES_LEFT_MSB_REG (0x15 << MEM_MAP_SHIFT)
@ -446,7 +446,7 @@
#define DELAY_LSB_REG (0x60 << MEM_MAP_SHIFT)
#define DELAY_MSB_REG (0x61 << MEM_MAP_SHIFT)
/* Cycles 64 bit RW register */
/* Triggers 64 bit RW register */
#define CYCLES_LSB_REG (0x62 << MEM_MAP_SHIFT)
#define CYCLES_MSB_REG (0x63 << MEM_MAP_SHIFT)