Commandline (#66)

* WIP

* WIP

* removed status to string from defs

* WIP

* WIP

* WIP removed unused functions in multi

* WIP

* print hex in a terrible way

* WIP, loadconfig error

* WIP, type to string

* WIP

* fix to conversion

* WIP, hostname doesnt work

* WIP

* WIP

* WIP

* WIP, threshold

* WIP, threshold

* WIP

* WIP, triggers

* WIP, cycles to triggers

* WIP

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* WIP

* WIP

* rx_udsocksize fx, WIP

* WIP

* WIP

* WIP

* file index (64 bit), WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

* WIP

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* WIP

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* merge

* WIP

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* WIP

* New python mod
This commit is contained in:
Dhanya Thattil
2019-10-21 10:29:06 +02:00
committed by GitHub
parent eebc1109b0
commit 995f0924e5
95 changed files with 5320 additions and 8114 deletions

View File

@ -122,7 +122,7 @@
#define DELAY_LEFT_LSB_REG (0x12 << MEM_MAP_SHIFT)
#define DELAY_LEFT_MSB_REG (0x13 << MEM_MAP_SHIFT)
/* Cycles Left 64 bit RO register TODO */
/* Triggers Left 64 bit RO register TODO */
#define CYCLES_LEFT_LSB_REG (0x14 << MEM_MAP_SHIFT)
#define CYCLES_LEFT_MSB_REG (0x15 << MEM_MAP_SHIFT)
@ -450,7 +450,7 @@
#define DELAY_LSB_REG (0x60 << MEM_MAP_SHIFT)
#define DELAY_MSB_REG (0x61 << MEM_MAP_SHIFT)
/* Cycles 64 bit RW register */
/* Triggers 64 bit RW register */
#define CYCLES_LSB_REG (0x62 << MEM_MAP_SHIFT)
#define CYCLES_MSB_REG (0x63 << MEM_MAP_SHIFT)

View File

@ -560,7 +560,7 @@ void setupDetector() {
setTimer(DIGITAL_SAMPLES, DEFAULT_NUM_SAMPLES); // update databytes and allocate ram
setTimer(FRAME_NUMBER, DEFAULT_NUM_FRAMES);
setTimer(ACQUISITION_TIME, DEFAULT_EXPTIME);
setTimer(CYCLES_NUMBER, DEFAULT_NUM_CYCLES);
setTimer(TRIGGER_NUMBER, DEFAULT_NUM_CYCLES);
setTimer(FRAME_PERIOD, DEFAULT_PERIOD);
setTimer(DELAY_AFTER_TRIGGER, DEFAULT_DELAY);
setTiming(DEFAULT_TIMING_MODE);
@ -904,12 +904,12 @@ int64_t setTimer(enum timerIndex ind, int64_t val) {
FILE_LOG(logINFO, ("\tGetting delay: %lldns\n", (long long int)retval));
break;
case CYCLES_NUMBER:
case TRIGGER_NUMBER:
if(val >= 0) {
FILE_LOG(logINFO, ("Setting #cycles: %lld\n", (long long int)val));
FILE_LOG(logINFO, ("Setting #triggers: %lld\n", (long long int)val));
}
retval = set64BitReg(val, CYCLES_LSB_REG, CYCLES_MSB_REG);
FILE_LOG(logINFO, ("\tGetting #cycles: %lld\n", (long long int)retval));
FILE_LOG(logINFO, ("\tGetting #triggers: %lld\n", (long long int)retval));
break;
case ANALOG_SAMPLES:
@ -974,9 +974,9 @@ int64_t getTimeLeft(enum timerIndex ind){
FILE_LOG(logINFO, ("Getting delay left: %lldns\n", (long long int)retval));
break;
case CYCLES_NUMBER:
case TRIGGER_NUMBER:
retval = get64BitReg(CYCLES_LEFT_LSB_REG, CYCLES_LEFT_MSB_REG);
FILE_LOG(logINFO, ("Getting number of cycles left: %lld\n", (long long int)retval));
FILE_LOG(logINFO, ("Getting number of triggers left: %lld\n", (long long int)retval));
break;
case ACTUAL_TIME:
@ -2200,7 +2200,7 @@ int startStateMachine(){
#ifdef VIRTUAL
void* start_timer(void* arg) {
int wait_in_s = (setTimer(FRAME_NUMBER, -1) *
setTimer(CYCLES_NUMBER, -1) *
setTimer(TRIGGER_NUMBER, -1) *
(setTimer(FRAME_PERIOD, -1)/(1E9)));
FILE_LOG(logDEBUG1, ("going to wait for %d s\n", wait_in_s));
while(!virtual_stop && (wait_in_s >= 0)) {