Partialreadout (#47)

* eiger server, rxr: partial readout, also gui messages: up last command, down clear command

* added binaries and resolved conflict

* bugfix eiger server: interrupt subframe is bit 2 and not bit number 3

* brackets in defs
This commit is contained in:
Dhanya Thattil
2019-08-07 09:08:58 +02:00
committed by GitHub
parent e20b5e6952
commit 98ddf154b2
28 changed files with 389 additions and 99 deletions

View File

@ -39,6 +39,7 @@ int Beb_top =0;
uint64_t Beb_deactivatedStartFrameNumber = 0;
int Beb_quadEnable = 0;
int Beb_positions[2] = {0, 0};
int Beb_readNLines = MAX_ROWS_PER_READOUT;
void BebInfo_BebInfo(struct BebInfo* bebInfo, unsigned int beb_num) {
@ -988,23 +989,25 @@ int Beb_StopAcquisition()
}
int Beb_RequestNImages(unsigned int beb_number, int ten_gig, unsigned int dst_number, unsigned int nimages, int test_just_send_out_packets_no_wait) {
if (!Beb_activated)
return 1;
if (dst_number>64) return 0;
unsigned int header_size = 4; //4*64 bits
unsigned int packet_size = ten_gig ? 0x200 : 0x80; // 4k or 1k packets
unsigned int npackets = ten_gig ? Beb_bit_mode*4 : Beb_bit_mode*16;
int in_two_requests = (!ten_gig&&Beb_bit_mode==32);
// volatile u_int32_t* ptrl;
// volatile u_int32_t* ptrr;
u_int32_t send_header_command;
u_int32_t send_frame_command;
if (in_two_requests) npackets/=2;
unsigned int maxnl = MAX_ROWS_PER_READOUT;
unsigned int maxnp = (ten_gig ? 4 : 16) * Beb_bit_mode;
unsigned int nl = Beb_readNLines;
unsigned int npackets = (nl * maxnp) / maxnl;
if ((nl * maxnp) % maxnl) {
FILE_LOG(logERROR, ("Read N Lines is incorrect. Switching to Full Image Readout\n"));
npackets = maxnp;
}
int in_two_requests = (npackets > MAX_PACKETS_PER_REQUEST) ? 1 : 0;
if (in_two_requests) {
npackets /= 2;
}
unsigned int header_size = 4; //4*64 bits
unsigned int packet_size = ten_gig ? 0x200 : 0x80; // 4k or 1k packets
FILE_LOG(logDEBUG1, ("----Beb_RequestNImages Start----\n"));
FILE_LOG(logDEBUG1, ("beb_number:%X, ten_gig:%X,dst_number:%X, npackets:%X, "
@ -1012,35 +1015,6 @@ int Beb_RequestNImages(unsigned int beb_number, int ten_gig, unsigned int dst_nu
beb_number, ten_gig, dst_number, npackets, Beb_bit_mode, header_size,
nimages, test_just_send_out_packets_no_wait));
// CMD_GEN core registers
//
// base for left feb fpga + 0x000
// base for right feb fpga + 0x100 Bytes
//
// OFFSETs given in Bytes
// base+00 0xC0DE0001 (static r/o)
// base+04 0x636D6467 (static r/o, ASCII for "CMDG")
//
// base+08 1st 32bits of 1st command
// base+0c 2nd 32bits of 1st command
//
// base+10 1st 32bits of 2nd command
// base+14 2nd 32bits of 2nd command
//
// base+18 command counter (sends n commands)
// <32 Bit mode : 2 commands for 1 frame neccessary (header + frame) (10 frames = 20 commands)
// 32 Bit mode : 3 commands for 1 frame neccessary (header + 1st halfframe + 2nd halfframe) (10 frames = 30 commands)
// if > 0 core starts operation
//
// base+1c command mode (for 32 bit mode)
// 0 for 2 command mode (send 1st command and 2nd command) (header + frame)
// 1 on bit 31 for 3 command mode (send 1st command, 2nd command, and 2nd command) (header + 1st halfframe + 2nd halfframe)
//
//
// Warning: Hard coded base address 0xc5000000 (TBD)
//
u_int32_t right_port_value = 0x2000;
u_int32_t* csp0base=0;
volatile u_int32_t value;
@ -1056,8 +1030,8 @@ int Beb_RequestNImages(unsigned int beb_number, int ten_gig, unsigned int dst_nu
FILE_LOG(logDEBUG1, ("%X\n",Beb_Read32(csp0base, (LEFT_OFFSET + i*4))));
}
// Generating commands
send_header_command = 0x62000000 | (!test_just_send_out_packets_no_wait) << 27 | (ten_gig==1) << 24 | header_size << 14 | 0;
send_frame_command = 0x62000000 | (!test_just_send_out_packets_no_wait) << 27 | (ten_gig==1) << 24 | packet_size << 14 | (npackets-1);
u_int32_t send_header_command = 0x62000000 | (!test_just_send_out_packets_no_wait) << 27 | (ten_gig==1) << 24 | header_size << 14 | 0;
u_int32_t send_frame_command = 0x62000000 | (!test_just_send_out_packets_no_wait) << 27 | (ten_gig==1) << 24 | packet_size << 14 | (npackets-1);
{
int i;
for (i=0; i < 10; i++)
@ -1377,6 +1351,10 @@ int Beb_GetStartingFrameNumber(uint64_t* retval, int tengigaEnable) {
return OK;
}
void Beb_SetReadNLines(int value) {
Beb_readNLines = value;
}
uint16_t Beb_swap_uint16( uint16_t val) {
return (val << 8) | (val >> 8 );

View File

@ -80,6 +80,8 @@ int Beb_SetDetectorPosition(int pos[]);
int Beb_SetStartingFrameNumber(uint64_t value);
int Beb_GetStartingFrameNumber(uint64_t* retval, int tengigaEnable);
void Beb_SetReadNLines(int value);
uint16_t Beb_swap_uint16( uint16_t val);
int Beb_open(u_int32_t** csp0base, u_int32_t offset);
u_int32_t Beb_Read32 (u_int32_t* baseaddr, u_int32_t offset);

View File

@ -2092,6 +2092,26 @@ int Feb_Control_SetQuad(int val) {
return 1;
}
int Feb_Control_SetReadNLines(int value) {
FILE_LOG(logINFO, ("Setting Read N Lines to %d\n", value));
if(!Feb_Interface_WriteRegister(Feb_Control_AddressToAll(), DAQ_REG_PARTIAL_READOUT, value, 0, 0)) {
FILE_LOG(logERROR, ("Could not write %d to read n lines reg\n", value));
return 0;
}
return 1;
}
int Feb_Control_GetReadNLines() {
uint32_t regVal = 0;
if(!Feb_Interface_ReadRegister(Feb_Control_AddressToAll(), DAQ_REG_PARTIAL_READOUT, &regVal)) {
FILE_LOG(logERROR, ("Could not read back read n lines reg\n"));
return -1;
}
FILE_LOG(logDEBUG1, ("Retval read n lines: %d\n", regVal));
return regVal;
}
int Feb_Control_WriteRegister(uint32_t offset, uint32_t data) {
uint32_t actualOffset = offset;

View File

@ -154,7 +154,8 @@ int Feb_Control_SoftwareTrigger();
int Feb_Control_SetInterruptSubframe(int val);
int Feb_Control_GetInterruptSubframe();
int Feb_Control_SetQuad(int val);
int Feb_Control_SetReadNLines(int value);
int Feb_Control_GetReadNLines();
int Feb_Control_WriteRegister(uint32_t offset, uint32_t data);
int Feb_Control_ReadRegister(uint32_t offset, uint32_t* retval);

View File

@ -13,6 +13,7 @@
#define DAQ_REG_EXPOSURE_REPEAT_TIMER 5 // == (31 downto 3) * 10^(2 downto 0)
#define DAQ_REG_SUBFRAME_EXPOSURES 6
#define DAQ_REG_SUBFRAME_PERIOD 7 //also pg and fifo status register
#define DAQ_REG_PARTIAL_READOUT 8
#define DAQ_REG_HRDWRE 12
@ -20,7 +21,7 @@
#define DAQ_REG_HRDWRE_OW_MSK (0x00000001 << DAQ_REG_HRDWRE_OW_OFST)
#define DAQ_REG_HRDWRE_TOP_OFST (1)
#define DAQ_REG_HRDWRE_TOP_MSK (0x00000001 << DAQ_REG_HRDWRE_TOP_OFST)
#define DAQ_REG_HRDWRE_INTRRPT_SF_OFST (3)
#define DAQ_REG_HRDWRE_INTRRPT_SF_OFST (2)
#define DAQ_REG_HRDWRE_INTRRPT_SF_MSK (0x00000001 << DAQ_REG_HRDWRE_INTRRPT_SF_OFST)
#define DAQ_REG_RO_OFFSET 20

View File

@ -446,6 +446,7 @@ void setupDetector() {
setIODelay(DEFAULT_IO_DELAY);
setTiming(DEFAULT_TIMING_MODE);
setStartingFrameNumber(DEFAULT_STARTING_FRAME_NUMBER);
setReadNLines(MAX_ROWS_PER_READOUT);
//SetPhotonEnergyCalibrationParameters(-5.8381e-5,1.838515,5.09948e-7,-4.32390e-11,1.32527e-15);
setRateCorrection(DEFAULT_RATE_CORRECTION);
int enable[2] = {DEFAULT_EXT_GATING_ENABLE, DEFAULT_EXT_GATING_POLARITY};
@ -1358,6 +1359,26 @@ int getInterruptSubframe() {
#endif
}
int setReadNLines(int value) {
if(value < 0)
return FAIL;
#ifndef VIRTUAL
if(!Feb_Control_SetReadNLines(value)) {
return FAIL;
}
Beb_SetReadNLines(value);
return OK;
#endif
}
int getReadNLines() {
#ifdef VIRTUAL
return 0;
#else
return Feb_Control_GetReadNLines();
#endif
}
int enableTenGigabitEthernet(int val) {
if (val!=-1) {
FILE_LOG(logINFO, ("Setting 10Gbe: %d\n", (val > 0) ? 1 : 0));

View File

@ -75,6 +75,9 @@ enum {E_PARALLEL, E_NON_PARALLEL, E_SAFE};
#define DEFAULT_TEST_MODE (0)
#define DEFAULT_HIGH_VOLTAGE (0)
#define MAX_ROWS_PER_READOUT (256)
#define MAX_PACKETS_PER_REQUEST (256)
#define UDP_HEADER_MAX_FRAME_VALUE (0xFFFFFFFFFFFF)
#define DAC_MIN_MV (0)