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mythen3: virtual server, connected timing mode, row and col in header, included pattern bit and mask

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maliakal_d
2020-01-21 18:16:27 +01:00
parent 7131f77a3a
commit 981b13494c
11 changed files with 219 additions and 65 deletions
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43
slsDetectorServers/mythen3DetectorServer/RegisterDefs.h
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@ -13,20 +13,30 @@
/* Base addresses 0x1806 0000 ---------------------------------------------*/
/* General purpose control and status registers */
#define BASE_CONTROL (0x0000) // 0x1806_0000 - 0x1806_00FF https://git.psi.ch/sls_detectors_firmware/mythen_III_mcb/blob/master/code/hdl/ctrl/ctrl.vhd
#define BASE_CONTROL (0x0000) // 0x1806_0000 - 0x1806_00FF
// https://git.psi.ch/sls_detectors_firmware/mythen_III_mcb/blob/master/code/hdl/ctrl/ctrl.vhd
/* ASIC Control */
#define BASE_ASIC (0x0100) // 0x1806_0100 - 0x1806_010F
/* ASIC Digital Interface. Data recovery core */
#define BASE_ADIF (0x0110) // 0x1806_0110 - 0x1806_011F https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/2e81ccbdbc5cb81813ba190fbdba43e8d6884eb9/adif/adif_ctrl.vhd
#define BASE_ADIF (0x0110) // 0x1806_0110 - 0x1806_011F
// https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/2e81ccbdbc5cb81813ba190fbdba43e8d6884eb9/adif/adif_ctrl.vhd
/* Formatting of data core */
#define BASE_FMT (0x0120) // 0x1806_0120 - 0x1806_012F
/* Packetizer */
#define BASE_PKT (0x0140) // 0x1806_0140 - 0x1806_014F
// https://git.psi.ch/sls_detectors_firmware/mythen_III_mcb/blob/master/code/hdl/pkt/pkt_ctrl.vhd
/* Pattern control and status registers */
#define BASE_PATTERN_CONTROL (0x00200) // 0x1806_0200 - 0x1806_02FF https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/2e81ccbdbc5cb81813ba190fbdba43e8d6884eb9/pattern_flow/pattern_flow_ctrl.vhd
#define BASE_PATTERN_CONTROL (0x00200) // 0x1806_0200 - 0x1806_02FF
// https://git.psi.ch/sls_detectors_firmware/vhdl_library/blob/2e81ccbdbc5cb81813ba190fbdba43e8d6884eb9/pattern_flow/pattern_flow_ctrl.vhd
/* UDP datagram generator */
#define BASE_UDP_RAM (0x01000) // 0x1806_1000 - 0x1806_1FFF
/* Pattern RAM. Pattern table */
#define BASE_PATTERN_RAM (0x10000) // 0x1807_0000 - 0x1807_FFFF
@ -119,6 +129,30 @@
/* Packetizer -------------------------------------------------------------*/
/* Packetizer Config Register */
#define PKT_CONFIG_REG (0x00 * REG_OFFSET + BASE_PKT)
#define PKT_CONFIG_NRXR_MAX_OFST (0)
#define PKT_CONFIG_NRXR_MAX_MSK (0x0000003F << PKT_CONFIG_NRXR_MAX_OFST)
#define PKT_CONFIG_RXR_START_ID_OFST (8)
#define PKT_CONFIG_RXR_START_ID_MSK (0x0000003F << PKT_CONFIG_RXR_START_ID_OFST)
/* Module Coordinates Register */
#define COORD_0_REG (0x02 * REG_OFFSET + BASE_PKT)
#define COORD_ROW_OFST (0)
#define COORD_ROW_MSK (0x0000FFFF << COORD_ROW_OFST)
#define COORD_COL_OFST (16)
#define COORD_COL_MSK (0x0000FFFF << COORD_COL_OFST)
/* Module ID Register */
#define COORD_1_REG (0x03 * REG_OFFSET + BASE_PKT)
#define COORD_RESERVED_OFST (0)
#define COORD_RESERVED_MSK (0x0000FFFF << COORD_RESERVED_OFST)
#define COORD_ID_OFST (16) // Not connected in firmware TODO
#define COORD_ID_MSK (0x0000FFFF << COORD_ID_OFST) // Not connected in firmware TODO
/* Pattern Control registers --------------------------------------------------*/
@ -184,6 +218,9 @@
/* External Signal register */
#define EXT_SIGNAL_REG (0x30 * REG_OFFSET + BASE_PATTERN_CONTROL)
#define EXT_SIGNAL_OFST (0)
#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST)
/* Trigger Delay 64 bit register */
#define SET_TRIGGER_DELAY_LSB_REG (0x32 * REG_OFFSET + BASE_PATTERN_CONTROL)
#define SET_TRIGGER_DELAY_MSB_REG (0x33 * REG_OFFSET + BASE_PATTERN_CONTROL)

BIN
slsDetectorServers/mythen3DetectorServer/bin/mythen3DetectorServer_developer
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Binary file not shown.

139
slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c
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@ -21,6 +21,7 @@
// Global variable from slsDetectorServer_funcs
extern int debugflag;
extern udpStruct udpDetails;
extern const enum detectorType myDetectorType;
int initError = OK;
int initCheckDone = 0;
@ -706,11 +707,27 @@ int setHighVoltage(int val){
/* parameters - timing */
void setTiming( enum timingMode arg){
// to be implemented
if(arg != GET_TIMING_MODE){
switch((int)arg){
case AUTO_TIMING:
FILE_LOG(logINFO, ("Set Timing: Auto\n"));
bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK);
break;
case TRIGGER_EXPOSURE:
FILE_LOG(logINFO, ("Set Timing: Trigger\n"));
bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) | EXT_SIGNAL_MSK);
break;
default:
FILE_LOG(logERROR, ("Unknown timing mode %d\n", arg));
return;
}
}
}
enum timingMode getTiming() {
return AUTO_TIMING;
if (bus_r(EXT_SIGNAL_REG) == EXT_SIGNAL_MSK)
return TRIGGER_EXPOSURE;
return AUTO_TIMING;
}
@ -835,6 +852,43 @@ void calcChecksum(udp_header* udp) {
udp->ip_checksum = checksum;
}
int setDetectorPosition(int pos[]) {
memcpy(detPos, pos, sizeof(detPos));
uint32_t addr = COORD_0_REG;
int value = 0;
int valueRead = 0;
int ret = OK;
// row
value = detPos[X];
bus_w(addr, (bus_r(addr) &~COORD_ROW_MSK) | ((value << COORD_ROW_OFST) & COORD_ROW_MSK));
valueRead = ((bus_r(addr) & COORD_ROW_MSK) >> COORD_ROW_OFST);
if (valueRead != value) {
FILE_LOG(logERROR, ("Could not set row. Set %d, read %d\n", value, valueRead));
ret = FAIL;
}
// col
value = detPos[Y];
bus_w(addr, (bus_r(addr) &~COORD_COL_MSK) | ((value << COORD_COL_OFST) & COORD_COL_MSK));
valueRead = ((bus_r(addr) & COORD_COL_MSK) >> COORD_COL_OFST);
if (valueRead != value) {
FILE_LOG(logERROR, ("Could not set column. Set %d, read %d\n", value, valueRead));
ret = FAIL;
}
if (ret == OK) {
FILE_LOG(logINFO, ("\tPosition set to [%d, %d]\n", detPos[X], detPos[Y]));
}
return ret;
}
int* getDetectorPosition() {
return detPos;
}
/* pattern */
uint64_t readPatternWord(int addr) {
@ -1052,6 +1106,22 @@ void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) {
}
}
void setPatternMask(uint64_t mask) {
set64BitReg(mask, PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG);
}
uint64_t getPatternMask() {
return get64BitReg(PATTERN_MASK_LSB_REG, PATTERN_MASK_MSB_REG);
}
void setPatternBitMask(uint64_t mask) {
set64BitReg(mask, PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG);
}
uint64_t getPatternBitMask() {
return get64BitReg(PATTERN_SET_LSB_REG, PATTERN_SET_MSB_REG);
}
int checkDetectorType() {
FILE_LOG(logINFO, ("Checking type of module\n"));
FILE* fd = fopen(TYPE_FILE_NAME, "r");
@ -1280,15 +1350,6 @@ int getClockDivider(enum CLKINDEX ind) {
/* aquisition */
int setDetectorPosition(int pos[]) {
memcpy(detPos, pos, sizeof(detPos));
return OK;
}
int* getDetectorPosition() {
return detPos;
}
int startStateMachine(){
#ifdef VIRTUAL
// create udp socket
@ -1327,22 +1388,70 @@ void* start_timer(void* arg) {
getNumTriggers() );
int64_t exp_ns = getExpTime();
int numCounters = __builtin_popcount(getCounterMask());
int dr = setDynamicRange(-1);
int imagesize = NCHAN_1_COUNTER * NCHIP * numCounters *
((dr > 16) ? 4 : // 32 bit
((dr > 8) ? 2 : // 16 bit
((dr > 4) ? 0.5 : // 4 bit
0.125))); // 1 bit
int datasize = imagesize / PACKETS_PER_FRAME;
int packetsize = datasize + sizeof(sls_detector_header);
int frameNr = 0;
// Generate data
char imageData[imagesize];
memset(imageData, 0, imagesize);
{
int i = 0;
for (i = 0; i < imagesize; i += sizeof(uint8_t)) {
*((uint8_t*)(imageData + i)) = i;
}
}
int frameNr = 1;
// loop over number of frames
for(frameNr=0; frameNr!= numFrames; ++frameNr ) {
for (frameNr = 0; frameNr != numFrames; ++frameNr) {
//check if virtual_stop is high
if(virtual_stop == 1){
break;
}
int srcOffset = 0;
// sleep for exposure time
struct timespec begin, end;
clock_gettime(CLOCK_REALTIME, &begin);
usleep(exp_ns / 1000);
clock_gettime(CLOCK_REALTIME, &end);
// loop packet
{
int i = 0;
for(i = 0; i!=PACKETS_PER_FRAME; ++i) {
char packetData[packetsize];
memset(packetData, 0, packetsize);
// set header
sls_detector_header* header = (sls_detector_header*)(packetData);
header->frameNumber = frameNr + 1;
header->packetNumber = i;
header->modId = 0;
header->row = detPos[X];
header->column = detPos[Y];
header->detType = (uint16_t)myDetectorType;
header->version = SLS_DETECTOR_HEADER_VERSION - 1;
// fill data
memcpy(packetData + sizeof(sls_detector_header), imageData + srcOffset, datasize);
srcOffset += datasize;
sendUDPPacket(0, packetData, packetsize);
}
}
FILE_LOG(logINFO, ("Sent frame: %d\n", frameNr));
// calculate time left in period
clock_gettime(CLOCK_REALTIME, &end);
int64_t time_ns = ((end.tv_sec - begin.tv_sec) * 1E9 +
(end.tv_nsec - begin.tv_nsec));
@ -1458,7 +1567,7 @@ u_int32_t runBusy() {
return virtual_status;
#endif
u_int32_t s = (bus_r(PAT_STATUS_REG) & PAT_STATUS_RUN_BUSY_MSK);
FILE_LOG(logDEBUG1, ("Status Register: %08x\n", s));
//FILE_LOG(logDEBUG1, ("Status Register: %08x\n", s));
return s;
}

6
slsDetectorServers/mythen3DetectorServer/slsDetectorServer_defs.h
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@ -8,7 +8,8 @@
/* Hardware Definitions */
#define NCOUNTERS (3)
#define MAX_COUNTER_MSK (0x7)
#define MAX_COUNTER_MSK (0x7)
#define NCHAN_1_COUNTER (128)
#define NCHAN (128 * NCOUNTERS)
#define NCHIP (10)
#define NDAC (16)
@ -97,4 +98,5 @@ typedef struct udp_header_struct {
uint16_t udp_checksum;
uint16_t udp_destport;
} udp_header;
#define UDP_IP_HEADER_LENGTH_BYTES (28)
#define UDP_IP_HEADER_LENGTH_BYTES (28)
#define PACKETS_PER_FRAME (2)