mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-21 17:18:00 +02:00
somewhere in between cleaning up
This commit is contained in:
@ -61,12 +61,13 @@ typedef struct ip_header_struct {
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} ip_header;
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} ip_header;
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struct timeval tss,tse,tsss; //for timing
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u_int32_t CSP0BASE;
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u_int32_t CSP0BASE;
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int highvoltage = 0;
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FILE *debugfp, *datafp;
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FILE *debugfp, *datafp;
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int fr;
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int fr;
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int wait_time;
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int wait_time;
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@ -212,10 +213,19 @@ void initializeDetector(){
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#endif
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#endif
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/*some registers set, which is in common with jungfrau, please check */
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/*some registers set, which is in common with jungfrau, please check */
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prepareADC();
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prepareADC();
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/*some registers set, which is in common with jungfrau, please check */
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/*some registers set, which is in common with jungfrau, please check */
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initDac(0); initDac(8); //initializes the two dacs
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/*initDac(0); initDac(8); Carlos later need to initialize dac 0 and dac8 doesnt exist */ //initializes the two dacs
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//set dacs
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//set dacs
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@ -278,7 +288,7 @@ void initializeDetector(){
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setPeriod(2*1000*1000);
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setPeriod(2*1000*1000);
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setDelay(0);
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setDelay(0);
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setGates(0);
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setGates(0);
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initHighVoltage(0); /* ask Carlos Set it to a value so server is always updated in a get*/
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setTiming(GET_EXTERNAL_COMMUNICATION_MODE);
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setTiming(GET_EXTERNAL_COMMUNICATION_MODE);
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setMaster(GET_MASTER);
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setMaster(GET_MASTER);
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@ -394,6 +404,7 @@ int setDAQRegister(){
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}
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}
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/** Carlos later dont know if this is even used (all over the place in mcb_funcs.c) */
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// direct pattern output
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// direct pattern output
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u_int32_t putout(char *s, int modnum) {
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u_int32_t putout(char *s, int modnum) {
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int i;
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int i;
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@ -410,8 +421,8 @@ u_int32_t putout(char *s, int modnum) {
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for (i=0;i<16;i++) {
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for (i=0;i<16;i++) {
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if (s[i]=='1') pat=pat+(1<<(15-i));
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if (s[i]=='1') pat=pat+(1<<(15-i));
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}
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}
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//addr=DAC_REG+(modnum<<4);
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//addr=SPI_REG+(modnum<<4);
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addr=DAC_REG;//+(modnum<<SHIFTMOD); commented by dhanya
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addr=SPI_REG;//+(modnum<<SHIFTMOD); commented by dhanya
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bus_w(addr, pat);
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bus_w(addr, pat);
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return OK;
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return OK;
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@ -1255,16 +1266,6 @@ int64_t getTrains(){
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}
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}
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int64_t setSamples(int64_t value){
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if (value>=0)
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bus_w(NSAMPLES_REG,value);
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return bus_r(NSAMPLES_REG);
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}
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int64_t getSamples(){
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return bus_r(NSAMPLES_REG);//get64BitReg(GET_CYCLES_LSB_REG, GET_CYCLES_MSB_REG);
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}
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int64_t setProbes(int64_t value){
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int64_t setProbes(int64_t value){
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return 0;
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return 0;
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@ -1287,15 +1288,15 @@ int64_t getProgress() {
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}
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}
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int64_t getActualTime(){
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int64_t getActualTime(){
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return get64BitReg(GET_ACTUAL_TIME_LSB_REG, GET_ACTUAL_TIME_MSB_REG)/(1E-9*CLK_FREQ);
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return get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG)/(1E-9*CLK_FREQ);
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}
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}
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int64_t getMeasurementTime(){
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int64_t getMeasurementTime(){
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int64_t v=get64BitReg(GET_MEASUREMENT_TIME_LSB_REG, GET_MEASUREMENT_TIME_MSB_REG);
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int64_t v=get64BitReg(MEASUREMENT_START_TIME_LSB_REG, MEASUREMENT_START_TIME_MSB_REG);
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return v/(1E-9*CLK_FREQ);
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return v/(1E-9*CLK_FREQ);
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}
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}
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int64_t getFramesFromStart(){
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int64_t getFramesFromStart(){ /** ask Carlos.. sending back v, but not used in firmware? */
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int64_t v=get64BitReg(FRAMES_FROM_START_LSB_REG, FRAMES_FROM_START_MSB_REG);
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int64_t v=get64BitReg(FRAMES_FROM_START_LSB_REG, FRAMES_FROM_START_MSB_REG);
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int64_t v1=get64BitReg(FRAMES_FROM_START_PG_LSB_REG, FRAMES_FROM_START_PG_MSB_REG);
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int64_t v1=get64BitReg(FRAMES_FROM_START_PG_LSB_REG, FRAMES_FROM_START_PG_MSB_REG);
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@ -1420,59 +1421,79 @@ int getTemperature(int tempSensor, int imod){
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int initHighVoltage(int val, int imod){
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int initHighVoltage(int val, int imod){
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u_int32_t addr = SPI_REG;
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u_int32_t offw,codata;
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u_int16_t valw, dacvalue;
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int i,ddx,csdx,cdx;
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float alpha=0.55;
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float alpha=0.55;
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u_int16_t valw, dacvalue;
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u_int32_t codata;
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if (val>=0) {
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int numbits = 8;
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if (val<60) {
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int valuemask = 0xff;
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dacvalue=0;
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val=60;
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// setting hv
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} else if (val>=200) {
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if (val >= 0) {
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dacvalue=0x1;
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val=200;
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// limit values
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if (val < 60) {
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dacvalue = 0;
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val = 60;
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} else if (val >= 200) {
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dacvalue = 0x1;
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val = 200;
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} else {
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} else {
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dacvalue=1.+(200.-val)/alpha;
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dacvalue = 1. + (200.-val) / alpha;
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val=200.-(dacvalue-1)*alpha;
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val=200.-(dacvalue-1)*alpha;
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}
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}
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printf ("****************************** setting val %d, dacval %d\n",val, dacvalue);
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printf ("\n Setting High voltage to %d (dacval %d)\n",val, dacvalue);
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offw=DAC_REG;
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codata = dacvalue & valuemask;
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ddx=8; csdx=10; cdx=9;
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// start point 0xffff
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codata=((dacvalue)&0xff);
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valw = 0xffff; //To make it compatible with old board
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//valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK &
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//HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK;
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bus_w (addr, valw);
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// chip sel bar down
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valw &= ~HV_SERIAL_CS_OUT_MSK;
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bus_w (addr, valw);
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{
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int i = 0;
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for (i = 0; i < numbits; i++) {
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// clk down
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valw &= ~HV_SERIAL_CLK_OUT_MSK;
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bus_w (addr, valw);
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valw=0xffff; bus_w(offw,(valw)); // start point
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// write data (i) (each bit from codata starting from msb)
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valw=((valw&(~(0x1<<csdx))));bus_w(offw,valw); //chip sel bar down
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valw = ((valw & ~HV_SERIAL_DIGITAL_OUT_MSK) +
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for (i=0;i<8;i++) {
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(((codata >> (7-i)) & 0x1) << HV_SERIAL_DIGITAL_OUT_OFST));
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valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
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bus_w (addr, valw);
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valw=((valw&(~(0x1<<ddx)))+(((codata>>(7-i))&0x1)<<ddx));bus_w(offw,valw);//write data (i)
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valw=((valw&(~(0x1<<cdx)))+(0x1<<cdx));bus_w(offw,valw);//clkup
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// clk up
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valw |= HV_SERIAL_CLK_OUT_MSK ;
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bus_w (addr, valw);
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}
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}
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}
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valw=((valw&(~(0x1<<csdx)))+(0x1<<csdx));bus_w(offw,valw); //csup
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valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
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// chip sel bar up
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valw |= HV_SERIAL_CS_OUT_MSK;
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bus_w (addr, valw);
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//clk down
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valw &= ~HV_SERIAL_CLK_OUT_MSK;
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bus_w (addr, valw);
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valw=0xffff; bus_w(offw,(valw)); // stop point =start point of course */
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// stop point = start point of course 0xffff
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valw = 0xffff; //To make it compatible with old board
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//valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK &
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//HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK;
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bus_w (addr, valw);
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printf(" High voltage set to %d (dacval %d)\n", val, dacvalue);
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printf("Writing %d in HVDAC \n",dacvalue);
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highvoltage = val;
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bus_w(HV_REG,val);
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}
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}
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return highvoltage;
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return bus_r(HV_REG);
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// return val;
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}
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}
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@ -1653,8 +1674,8 @@ int configureInterface(uint32_t destip,uint64_t destmac,uint64_t sourcemac,int
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#endif
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#endif
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/*bus_w(CONTROL_REG,0); Carlos modification
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/*bus_w(CONTROL_REG,0); Carlos modification*/
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printf("System status register is %08x\n",bus_r(SYSTEM_STATUS_REG));*/
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/*printf("System status register is %08x\n",bus_r(SYSTEM_STATUS_REG)); Carlos modification */
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printf("Reset mem machine fifos\n");
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printf("Reset mem machine fifos\n");
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bus_w(MEM_MACHINE_FIFOS_REG,0x4000);
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bus_w(MEM_MACHINE_FIFOS_REG,0x4000);
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@ -2695,57 +2716,68 @@ uint64_t setPatternWaitTime(int level, uint64_t t) {
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}
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}
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/** Carlos later, used only for 0 and 8 */
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void initDac(int dacnum) {
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void initDac(int dacnum) {
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printf("\nInitializing dac for %d\n",dacnum);
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printf("\nInitializing dac for %d\n",dacnum);
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u_int32_t offw,codata;
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u_int32_t addr = SPI_REG;
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u_int16_t valw;
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u_int16_t valw;
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int i,ddx,csdx,cdx;
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u_int32_t codata;
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int csdx = dacnum / 8 + 2; // To make it compatible with old board (16 dacs), otherwise only DAC_SERIAL_CS_OUT_OFST
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printf("Chip select bit:%d\n"
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"Dac Channel Nr:%d\n",
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csdx, 0xf);
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int numbits = 25;
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codata = (
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((0x6 << 4) + /* 110 for initdac, 011 for specific dac ?? */
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(0xf << 16)) + /* dac channel number (can be 0 - 8), f means all in initdac ??*/
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((0x0 << 4) & 0xfff0) /* value from bit 12 to 4?? */
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);
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//setting int reference
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// start point
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offw=DAC_REG;
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valw = 0xffff; //To make it compatible with old board
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//valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK &
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//HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK;
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bus_w (addr, valw);
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// chip sel bar down
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valw &= ~(0x1 << csdx);
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bus_w (addr, valw);
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ddx=0; cdx=1;
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{
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csdx=dacnum/8+2;
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int i = 0;
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for (i = 0; i < numbits; i++) {
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// clk down
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valw &= ~DAC_SERIAL_CLK_OUT_MSK;
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bus_w (addr, valw);
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printf("data bit=%d, clkbit=%d, csbit=%d\n",ddx,cdx,csdx);
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// write data (i) (each bit from codata starting from msb)
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codata=(((0x6<<4)+(0xf<<16))+((0x0<<4)&0xfff0));
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valw = ((valw & ~DAC_SERIAL_DIGITAL_OUT_MSK) +
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(((codata >> (numbits - 1 - i)) & 0x1) << DAC_SERIAL_DIGITAL_OUT_OFST));
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bus_w (addr, valw);
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valw=0xffff; bus_w(offw,(valw)); // start point
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// clk up
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valw=((valw&(~(0x1<<csdx))));bus_w(offw,valw); //chip sel bar down
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valw |= DAC_SERIAL_CLK_OUT_MSK ;
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for (i=1;i<25;i++) {
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bus_w (addr, valw);
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}
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valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
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valw=((valw&(~(0x1<<ddx)))+(((codata>>(24-i))&0x1)<<ddx));bus_w(offw,valw);//write data (i)
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// printf("%d ", ((codata>>(24-i))&0x1));
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valw=((valw&(~(0x1<<cdx)))+(0x1<<cdx));bus_w(offw,valw);//clkup
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}
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}
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// printf("\n ");
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valw=((valw&(~(0x1<<csdx)))+(0x1<<csdx));bus_w(offw,valw); //csup
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valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
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valw=0xffff; bus_w(offw,(valw)); // stop point =start point of course */
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||||||
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//end of setting int reference
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// chip sel bar up
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valw |= (0x1 << csdx);
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bus_w (addr, valw);
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//clk down
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valw &= ~DAC_SERIAL_CLK_OUT_MSK;
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bus_w (addr, valw);
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// stop point = start point of course
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valw = 0xffff; //To make it compatible with old board
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//valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK &
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//HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK;
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bus_w (addr, valw);
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}
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}
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@ -2783,44 +2815,83 @@ int getDacRegister(int dacnum) {
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}
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}
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int setDac(int dacnum,int dacvalue){
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int setDac(int dacnum, int dacvalue){
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printf("\nSetting of DAC %d with value %d\n",dacnum,dacvalue);
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printf("\nSetting of DAC %d with value %d\n",dacnum, dacvalue);
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u_int32_t offw,codata;
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u_int32_t addr = SPI_REG;
|
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u_int16_t valw;
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u_int16_t valw;
|
||||||
int i,ddx,csdx,cdx;
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u_int32_t codata;
|
||||||
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|
||||||
int dacch=0;
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|
||||||
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|
||||||
if (dacvalue>=0) {
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|
||||||
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||||||
//setting int reference
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|
||||||
offw=DAC_REG;
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|
||||||
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|
||||||
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||||||
ddx=0; cdx=1;
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int csdx = dacnum / 8 + 2; // Chip select can be DAC_SERIAL_CS_OUT_OFST(2) or 3 (compatibility with old board 16 dacs)
|
||||||
csdx=dacnum/8+2;
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int dacch = dacnum % 8; // 0-8, dac channel number (also for dacnum 9-15 in old board)
|
||||||
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int numbits = 25;
|
||||||
|
printf("Chip select bit:%d\n"
|
||||||
|
"Dac Channel Nr:%d\n",
|
||||||
|
csdx, dacch);
|
||||||
|
|
||||||
dacch=dacnum%8;
|
|
||||||
|
|
||||||
printf("data bit=%d, clkbit=%d, csbit=%d\n",ddx,cdx,csdx);
|
// setting dac
|
||||||
//modified to power down single channels
|
if (dacvalue >= 0) {
|
||||||
// codata=((((0x2)<<4)+((dacch)&0xf))<<16)+((dacvalue<<4)&0xfff0);
|
//modified to power down single channels codata=((((0x2)<<4)+((dacch)&0xf))<<16)+((dacvalue<<4)&0xfff0);
|
||||||
codata=((((0x3)<<4)+((dacch)&0xf))<<16)+((dacvalue<<4)&0xfff0);
|
|
||||||
valw=0xffff; bus_w(offw,(valw)); // start point
|
codata = (
|
||||||
valw=((valw&(~(0x1<<csdx))));bus_w(offw,valw); //chip sel bar down
|
((0x3 << 4) + /** 110 for initdac, 011 for specific dac?? */
|
||||||
for (i=1;i<25;i++) {
|
((dacch)&0xf)) /** dac ch number (can be 0 - 8). f means all in initdac ?? */
|
||||||
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
|
<< 16) + /** Carlos later, why change in bracket position */
|
||||||
valw=((valw&(~(0x1<<ddx)))+(((codata>>(24-i))&0x1)<<ddx));bus_w(offw,valw);//write data (i)
|
((dacvalue<<4)&0xfff0); /* value from bit 12 to 4?? */
|
||||||
// printf("%d ", ((codata>>(24-i))&0x1));
|
|
||||||
valw=((valw&(~(0x1<<cdx)))+(0x1<<cdx));bus_w(offw,valw);//clkup
|
|
||||||
|
|
||||||
|
|
||||||
|
codata=(((0x6<<4)+(0xf<<16))+((0x0<<4)&0xfff0));
|
||||||
|
codata=(((0x3<<4)+((dacch)&0xf))<<16)+((dacvalue<<4)&0xfff0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
// start point
|
||||||
|
valw = 0xffff; //To make it compatible with old board
|
||||||
|
//valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK &
|
||||||
|
//HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK;
|
||||||
|
bus_w (addr, valw);
|
||||||
|
|
||||||
|
// chip sel bar down
|
||||||
|
valw &= ~(0x1 << csdx);
|
||||||
|
bus_w (addr, valw);
|
||||||
|
|
||||||
|
{
|
||||||
|
int i = 0;
|
||||||
|
for (i = 0; i < numbits; i++) {
|
||||||
|
|
||||||
|
// clk down
|
||||||
|
valw &= ~DAC_SERIAL_CLK_OUT_MSK;
|
||||||
|
bus_w (addr, valw);
|
||||||
|
|
||||||
|
// write data (i) (each bit from codata starting from msb)
|
||||||
|
valw = ((valw & ~DAC_SERIAL_DIGITAL_OUT_MSK) +
|
||||||
|
(((codata >> (numbits - 1 - i)) & 0x1) << DAC_SERIAL_DIGITAL_OUT_OFST));
|
||||||
|
bus_w (addr, valw);
|
||||||
|
|
||||||
|
// clk up
|
||||||
|
valw |= DAC_SERIAL_CLK_OUT_MSK ;
|
||||||
|
bus_w (addr, valw);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
// printf("\n ");
|
|
||||||
valw=((valw&(~(0x1<<csdx)))+(0x1<<csdx));bus_w(offw,valw); //csup
|
|
||||||
valw=(valw&(~(0x1<<cdx)));bus_w(offw,valw); //cldwn
|
|
||||||
valw=0xffff; bus_w(offw,(valw)); // stop point =start point of course */
|
|
||||||
|
|
||||||
//printf("Writing %d in DAC(0-15) %d \n",dacvalue,dacnum);
|
// chip sel bar up
|
||||||
|
valw |= (0x1 << csdx);
|
||||||
|
bus_w (addr, valw);
|
||||||
|
|
||||||
|
//clk down
|
||||||
|
valw &= ~DAC_SERIAL_CLK_OUT_MSK;
|
||||||
|
bus_w (addr, valw);
|
||||||
|
|
||||||
|
// stop point = start point of course
|
||||||
|
valw = 0xffff; //To make it compatible with old board
|
||||||
|
//valw = DAC_SERIAL_DIGITAL_OUT_MSK & DAC_SERIAL_CLK_OUT_MSK & DAC_SERIAL_CS_OUT_MSK &
|
||||||
|
//HV_SERIAL_DIGITAL_OUT_MSK & HV_SERIAL_CLK_OUT_MSK & HV_SERIAL_CS_OUT_MSK;
|
||||||
|
bus_w (addr, valw);
|
||||||
|
|
||||||
printf("Writing %d in DAC %d \n",dacvalue,dacnum);
|
printf("Writing %d in DAC %d \n",dacvalue,dacnum);
|
||||||
setDacRegister(dacnum,dacvalue);
|
setDacRegister(dacnum,dacvalue);
|
||||||
} else if (dacvalue==-100) {
|
} else if (dacvalue==-100) {
|
||||||
|
@ -127,9 +127,6 @@ int64_t getTrains();
|
|||||||
int64_t setProbes(int64_t value);
|
int64_t setProbes(int64_t value);
|
||||||
int64_t getProbes();
|
int64_t getProbes();
|
||||||
|
|
||||||
int64_t setSamples(int64_t value);
|
|
||||||
int64_t getSamples();
|
|
||||||
|
|
||||||
int64_t getProgress();
|
int64_t getProgress();
|
||||||
int64_t setProgress();
|
int64_t setProgress();
|
||||||
|
|
||||||
|
@ -364,24 +364,6 @@ int getTemperatureByModule(int tempSensor, int imod)
|
|||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
int initHighVoltageByModule(int val, int imod)
|
|
||||||
{
|
|
||||||
int im;
|
|
||||||
//for the particular module
|
|
||||||
if (imod>=0 && imod<nModX) {
|
|
||||||
return initHighVoltage(val,imod);
|
|
||||||
}
|
|
||||||
else{
|
|
||||||
//checks if all modules have the same value(ALLMOD)
|
|
||||||
for (im=1; im<nModX; im++) {
|
|
||||||
if (initHighVoltage(val,im)!=initHighVoltage(val,0)) {
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
return initHighVoltage(val,0);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
int initConfGainByModule(int isettings,int val, int imod)
|
int initConfGainByModule(int isettings,int val, int imod)
|
||||||
{
|
{
|
||||||
|
@ -10,66 +10,122 @@
|
|||||||
#define MEM_SIZE 0x100000
|
#define MEM_SIZE 0x100000
|
||||||
|
|
||||||
/* FPGA Version register */
|
/* FPGA Version register */
|
||||||
|
#define FPGA_VERSION_REG (0x00 << 11)
|
||||||
|
|
||||||
#define FPGA_VERSION_REG (0x00 << 11)
|
#define BOARD_REVISION_OFST (0)
|
||||||
|
#define BOARD_REVISION_MSK (0x00FFFFFF << BOARD_REVISION_OFST)
|
||||||
#define BOARD_REVISION_OFST (0)
|
#define DETECTOR_TYPE_OFST (24)
|
||||||
#define BOARD_REVISION_MSK (0x00FFFFFF << BOARD_REVISION_OFST)
|
#define DETECTOR_TYPE_MSK (0x000000FF << DETECTOR_TYPE_OFST)
|
||||||
#define DETECTOR_TYPE_OFST (24)
|
|
||||||
#define DETECTOR_TYPE_MSK (0x000000FF << DETECTOR_TYPE_OFST)
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Fix pattern register */
|
/* Fix pattern register */
|
||||||
#define FIX_PATT_REG (0x01 << 11)
|
#define FIX_PATT_REG (0x01 << 11)
|
||||||
|
|
||||||
#define FIX_PATT_VAL 0xACDC2014
|
#define FIX_PATT_VAL 0xACDC2014
|
||||||
|
|
||||||
|
|
||||||
/* Status register */
|
/* Status register */
|
||||||
#define STATUS_REG (0x02 << 11)
|
#define STATUS_REG (0x02 << 11)
|
||||||
|
|
||||||
#define RUN_BUSY_OFST (0)
|
#define RUN_BUSY_OFST (0)
|
||||||
#define RUN_BUSY_MSK (0x00000001 << RUN_BUSY_BIT_OFST)
|
#define RUN_BUSY_MSK (0x00000001 << RUN_BUSY_BIT_OFST)
|
||||||
#define WAITING_FOR_TRIGGER_OFST (3)
|
#define WAITING_FOR_TRIGGER_OFST (3)
|
||||||
#define WAITING_FOR_TRIGGER_MSK (0x00000001 << WAITING_FOR_TRIGGER_OFST)
|
#define WAITING_FOR_TRIGGER_MSK (0x00000001 << WAITING_FOR_TRIGGER_OFST)
|
||||||
#define DELAYBEFORE_OFST (4)
|
#define DELAYBEFORE_OFST (4) //Not used in software
|
||||||
#define DELAYBEFORE_MSK (0x00000001 << DELAYBEFORE_OFST)
|
#define DELAYBEFORE_MSK (0x00000001 << DELAYBEFORE_OFST) //Not used in software
|
||||||
#define DELAYAFTER_OFST (5)
|
#define DELAYAFTER_OFST (5) //Not used in software
|
||||||
#define DELAYAFTER_MSK (0x00000001 << DELAYAFTER_OFST)
|
#define DELAYAFTER_MSK (0x00000001 << DELAYAFTER_OFST) //Not used in software
|
||||||
#define STOPPED_OFST (15)
|
#define STOPPED_OFST (15)
|
||||||
#define STOPPED_MSK (0x00000001 << STOPPED_OFST)
|
#define STOPPED_MSK (0x00000001 << STOPPED_OFST)
|
||||||
#define RUNMACHINE_BUSY_OFST (17)
|
#define RUNMACHINE_BUSY_OFST (17)
|
||||||
#define RUNMACHINE_BUSY_MSK (0x00000001 << RUNMACHINE_BUSY_OFST)
|
#define RUNMACHINE_BUSY_MSK (0x00000001 << RUNMACHINE_BUSY_OFST)
|
||||||
|
|
||||||
|
|
||||||
/* Look at me register */
|
/* Look at me register */
|
||||||
#define LOOK_AT_ME_REG (0x03 << 11) //Not used in firmware or software
|
#define LOOK_AT_ME_REG (0x03 << 11) //Not used in firmware or software
|
||||||
|
|
||||||
/* System Status register */
|
/* System Status register */
|
||||||
#define SYSTEM_STATUS_REG (0x04 << 11) //Not used in software
|
#define SYSTEM_STATUS_REG (0x04 << 11) //Not used in software
|
||||||
|
|
||||||
#define DDR3_CAL_DONE_OFST (0)
|
#define DDR3_CAL_DONE_OFST (0) //Not used in software
|
||||||
#define DDR3_CAL_DONE_MSK (0x00000001 << DDR3_CAL_DONE_OFST)
|
#define DDR3_CAL_DONE_MSK (0x00000001 << DDR3_CAL_DONE_OFST) //Not used in software
|
||||||
#define DDR3_CAL_FAIL_OFST (1)
|
#define DDR3_CAL_FAIL_OFST (1) //Not used in software
|
||||||
#define DDR3_CAL_FAIL_MSK (0x00000001 << DDR3_CAL_FAIL_OFST)
|
#define DDR3_CAL_FAIL_MSK (0x00000001 << DDR3_CAL_FAIL_OFST) //Not used in software
|
||||||
#define DDR3_CAL_FAIL_OFST (1)
|
#define DDR3_INIT_DONE_OFST (2) //Not used in software
|
||||||
#define DDR3_CAL_FAIL_MSK (0x00000001 << DDR3_CAL_FAIL_OFST)
|
#define DDR3_INIT_DONE_MSK (0x00000001 << DDR3_INIT_DONE_OFST) //Not used in software
|
||||||
|
#define RECONFIG_PLL_LCK_OFST (3) //Not used in software
|
||||||
|
#define RECONFIG_PLL_LCK_MSK (0x00000001 << RECONFIG_PLL_LCK_OFST) //Not used in software
|
||||||
|
#define PLL_A_LCK_OFST (4) //Not used in software
|
||||||
|
#define PLL_A_LCK_MSK (0x00000001 << PLL_A_LCK_OFST) //Not used in software
|
||||||
|
#define DD3_PLL_LCK_OFST (5) //Not used in software
|
||||||
|
#define DD3_PLL_LCK_MSK (0x00000001 << DD3_PLL_LCK_OFST) //Not used in software
|
||||||
|
|
||||||
|
|
||||||
|
/* Module Control Board Serial Number Register */
|
||||||
|
#define MOD_SERIAL_NUM_REG (0x0A << 11) //Not used in software
|
||||||
|
|
||||||
|
#define HARDWARE_SERIAL_NUM_OFST (0) //Not used in software
|
||||||
|
#define HARDWARE_SERIAL_NUM_MSK (0x000000FF << HARDWARE_SERIAL_NUM_OFST) //Not used in software
|
||||||
|
#define HARDWARE_VERSION_NUM_OFST (16) //Not used in software
|
||||||
|
#define HARDWARE_VERSION_NUM_MSK (0x0000003F << HARDWARE_VERSION_NUM_OFST) //Not used in software
|
||||||
|
|
||||||
|
|
||||||
/* Time from Start 64 bit register */
|
/* Time from Start 64 bit register */
|
||||||
#define TIME_FROM_START_LSB_REG (0x10 << 11)
|
#define TIME_FROM_START_LSB_REG (0x10 << 11)
|
||||||
#define TIME_FROM_START_MSB_REG (0x11 << 11)
|
#define TIME_FROM_START_MSB_REG (0x11 << 11)
|
||||||
//#define GET_ACTUAL_TIME_LSB_REG 16<<11
|
|
||||||
//#define GET_ACTUAL_TIME_MSB_REG 17<<11
|
|
||||||
|
|
||||||
|
/* Get Delay 64 bit register */
|
||||||
|
#define GET_DELAY_LSB_REG (0x12 << 11)
|
||||||
|
#define GET_DELAY_MSB_REG (0x13 << 11)
|
||||||
|
|
||||||
|
/* Get Cycles 64 bit register */
|
||||||
|
#define GET_CYCLES_LSB_REG (0x14 << 11)
|
||||||
|
#define GET_CYCLES_MSB_REG (0x15 << 11)
|
||||||
|
|
||||||
|
/* Get Frames 64 bit register */
|
||||||
|
#define GET_FRAMES_LSB_REG (0x16 << 11)
|
||||||
|
#define GET_FRAMES_MSB_REG (0x17 << 11)
|
||||||
|
|
||||||
|
/* Get Period 64 bit register */
|
||||||
|
#define GET_PERIOD_LSB_REG (0x18 << 11)
|
||||||
|
#define GET_PERIOD_MSB_REG (0x19 << 11)
|
||||||
|
|
||||||
|
/* Get Period 64 bit register */
|
||||||
|
#define GET_EXPTIME_LSB_REG (0x1A << 11)
|
||||||
|
#define GET_EXPTIME_MSB_REG (0x1B << 11)
|
||||||
|
|
||||||
|
/* Get Period 64 bit register */
|
||||||
|
#define GET_GATES_LSB_REG (0x1C << 11)
|
||||||
|
#define GET_GATES_MSB_REG (0x1D << 11)
|
||||||
|
|
||||||
|
/* Get Frames from Start 64 bit register (frames from start Data Streaming) ask Carlos used in software firmware_funcs.c getFramesFromStart, but not in firmware*/
|
||||||
|
#define FRAMES_FROM_START_LSB_REG (0x22 << 11) /*Not used in firmware,used in software*/
|
||||||
|
#define FRAMES_FROM_START_MSB_REG (0x23 << 11) /*Not used in firmware,used in software*/
|
||||||
|
|
||||||
|
/* Get Frames from Start 64 bit register (frames from start Run Control) ask Carlos*/
|
||||||
|
#define FRAMES_FROM_START_PG_LSB_REG (0x24 << 11)
|
||||||
|
#define FRAMES_FROM_START_PG_MSB_REG (0x25 << 11)
|
||||||
|
|
||||||
|
/* Measurement Time 64 bit register (start frame time) tell Carlos it should be measurement started time? */
|
||||||
|
#define MEASUREMENT_START_TIME_LSB_REG (0x26 << 11)
|
||||||
|
#define MEASUREMENT_START_TIME_MSB_REG (0x27 << 11)
|
||||||
|
|
||||||
|
/* SPI (Serial Peripheral Interface) Register */
|
||||||
|
#define SPI_REG (0x40 << 11)
|
||||||
|
|
||||||
|
#define DAC_SERIAL_DIGITAL_OUT_OFST (0)
|
||||||
|
#define DAC_SERIAL_DIGITAL_OUT_MSK (0x00000001 << DAC_SERIAL_DIGITAL_OUT_OFST)
|
||||||
|
#define DAC_SERIAL_CLK_OUT_OFST (1)
|
||||||
|
#define DAC_SERIAL_CLK_OUT_MSK (0x00000001 << DAC_SERIAL_CLK_OUT_OFST)
|
||||||
|
#define DAC_SERIAL_CS_OUT_OFST (2)
|
||||||
|
#define DAC_SERIAL_CS_OUT_MSK (0x00000001 << DAC_SERIAL_CS_OUT_OFST)
|
||||||
|
#define HV_SERIAL_DIGITAL_OUT_OFST (8)
|
||||||
|
#define HV_SERIAL_DIGITAL_OUT_MSK (0x00000001 << HV_SERIAL_DIGITAL_OUT_OFST)
|
||||||
|
#define HV_SERIAL_CLK_OUT_OFST (9)
|
||||||
|
#define HV_SERIAL_CLK_OUT_MSK (0x00000001 << HV_SERIAL_CLK_OUT_OFST)
|
||||||
|
#define HV_SERIAL_CS_OUT_OFST (10)
|
||||||
|
#define HV_SERIAL_CS_OUT_MSK (0x00000001 << HV_SERIAL_CS_OUT_OFST)
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@ -108,7 +164,6 @@
|
|||||||
//#define ADC_OFFSET_REG 66<<11 //same as CONFGAIN_REG
|
//#define ADC_OFFSET_REG 66<<11 //same as CONFGAIN_REG
|
||||||
#define ADC_INVERSION_REG 0x43<<11
|
#define ADC_INVERSION_REG 0x43<<11
|
||||||
|
|
||||||
#define DAC_REG 64<<11//0x17<<11// control the dacs
|
|
||||||
//ADC
|
//ADC
|
||||||
#define ADC_WRITE_REG 65<<11//0x18<<11
|
#define ADC_WRITE_REG 65<<11//0x18<<11
|
||||||
//#define ADC_SYNC_REG 66<<11//0x19<<11
|
//#define ADC_SYNC_REG 66<<11//0x19<<11
|
||||||
@ -164,39 +219,31 @@
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
#define GET_MEASUREMENT_TIME_LSB_REG 38<<11
|
|
||||||
#define GET_MEASUREMENT_TIME_MSB_REG 38<<11
|
|
||||||
|
|
||||||
|
|
||||||
#define SET_DELAY_LSB_REG 96<<11 //0x68<<11
|
#define SET_DELAY_LSB_REG 96<<11 //0x68<<11
|
||||||
#define SET_DELAY_MSB_REG 97<<11 //0x69<<11
|
#define SET_DELAY_MSB_REG 97<<11 //0x69<<11
|
||||||
#define GET_DELAY_LSB_REG 18<<11//0x6a<<11
|
|
||||||
#define GET_DELAY_MSB_REG 19<<11//0x6b<<11
|
|
||||||
|
|
||||||
#define SET_CYCLES_LSB_REG 98<<11//0x6c<<11
|
#define SET_CYCLES_LSB_REG 98<<11//0x6c<<11
|
||||||
#define SET_CYCLES_MSB_REG 99<<11//0x6d<<11
|
#define SET_CYCLES_MSB_REG 99<<11//0x6d<<11
|
||||||
#define GET_CYCLES_LSB_REG 20<<11//0x6e<<11
|
|
||||||
#define GET_CYCLES_MSB_REG 21<<11//0x6f<<11
|
|
||||||
|
|
||||||
#define SET_FRAMES_LSB_REG 100<<11//0x70<<11
|
#define SET_FRAMES_LSB_REG 100<<11//0x70<<11
|
||||||
#define SET_FRAMES_MSB_REG 101<<11//0x71<<11
|
#define SET_FRAMES_MSB_REG 101<<11//0x71<<11
|
||||||
#define GET_FRAMES_LSB_REG 22<<11//0x72<<11
|
|
||||||
#define GET_FRAMES_MSB_REG 23<<11//0x73<<11
|
|
||||||
|
|
||||||
#define SET_PERIOD_LSB_REG 102<<11//0x74<<11
|
#define SET_PERIOD_LSB_REG 102<<11//0x74<<11
|
||||||
#define SET_PERIOD_MSB_REG 103<<11//0x75<<11
|
#define SET_PERIOD_MSB_REG 103<<11//0x75<<11
|
||||||
#define GET_PERIOD_LSB_REG 24<<11//0x76<<11
|
|
||||||
#define GET_PERIOD_MSB_REG 25<<11//0x77<<11
|
|
||||||
|
|
||||||
#define SET_EXPTIME_LSB_REG 104<<11//0x78<<11
|
#define SET_EXPTIME_LSB_REG 104<<11//0x78<<11
|
||||||
#define SET_EXPTIME_MSB_REG 105<<11//0x79<<11
|
#define SET_EXPTIME_MSB_REG 105<<11//0x79<<11
|
||||||
#define GET_EXPTIME_LSB_REG 26<<11//0x7a<<11
|
|
||||||
#define GET_EXPTIME_MSB_REG 27<<11//0x7b<<11
|
|
||||||
|
|
||||||
#define SET_GATES_LSB_REG 106<<11//0x7c<<11
|
#define SET_GATES_LSB_REG 106<<11//0x7c<<11
|
||||||
#define SET_GATES_MSB_REG 107<<11//0x7d<<11
|
#define SET_GATES_MSB_REG 107<<11//0x7d<<11
|
||||||
#define GET_GATES_LSB_REG 28<<11//0x7e<<11
|
|
||||||
#define GET_GATES_MSB_REG 29<<11//0x7f<<11
|
|
||||||
|
|
||||||
#define DATA_IN_LSB_REG 30<<11
|
#define DATA_IN_LSB_REG 30<<11
|
||||||
#define DATA_IN_MSB_REG 31<<11
|
#define DATA_IN_MSB_REG 31<<11
|
||||||
@ -204,12 +251,6 @@
|
|||||||
#define PATTERN_OUT_LSB_REG 32<<11
|
#define PATTERN_OUT_LSB_REG 32<<11
|
||||||
#define PATTERN_OUT_MSB_REG 33<<11
|
#define PATTERN_OUT_MSB_REG 33<<11
|
||||||
|
|
||||||
#define FRAMES_FROM_START_LSB_REG 34<<11
|
|
||||||
#define FRAMES_FROM_START_MSB_REG 35<<11
|
|
||||||
|
|
||||||
#define FRAMES_FROM_START_PG_LSB_REG 36<<11
|
|
||||||
#define FRAMES_FROM_START_PG_MSB_REG 37<<11
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
@ -916,7 +916,7 @@ int set_dac(int file_des) {
|
|||||||
retval=adcvpp;;
|
retval=adcvpp;;
|
||||||
|
|
||||||
} else if (ind==HV_NEW )
|
} else if (ind==HV_NEW )
|
||||||
retval=initHighVoltageByModule(val,imod);
|
retval=initHighVoltage(val,0);
|
||||||
else
|
else
|
||||||
printf("**********No dac with index %d\n",ind);
|
printf("**********No dac with index %d\n",ind);
|
||||||
}
|
}
|
||||||
|
Reference in New Issue
Block a user